1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2020 Intel Corporation
13 #include <rte_byteorder.h>
14 #include <rte_common.h>
17 #include <rte_atomic.h>
19 #include <rte_ether.h>
20 #include <ethdev_driver.h>
21 #include <ethdev_pci.h>
22 #include <rte_malloc.h>
23 #include <rte_memzone.h>
29 #define ICE_DCF_AQ_LEN 32
30 #define ICE_DCF_AQ_BUF_SZ 4096
32 #define ICE_DCF_ARQ_MAX_RETRIES 200
33 #define ICE_DCF_ARQ_CHECK_TIME 2 /* msecs */
35 #define ICE_DCF_VF_RES_BUF_SZ \
36 (sizeof(struct virtchnl_vf_resource) + \
37 IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource))
39 static __rte_always_inline int
40 ice_dcf_send_cmd_req_no_irq(struct ice_dcf_hw *hw, enum virtchnl_ops op,
41 uint8_t *req_msg, uint16_t req_msglen)
43 return iavf_aq_send_msg_to_pf(&hw->avf, op, IAVF_SUCCESS,
44 req_msg, req_msglen, NULL);
48 ice_dcf_recv_cmd_rsp_no_irq(struct ice_dcf_hw *hw, enum virtchnl_ops op,
49 uint8_t *rsp_msgbuf, uint16_t rsp_buflen,
52 struct iavf_arq_event_info event;
53 enum virtchnl_ops v_op;
57 event.buf_len = rsp_buflen;
58 event.msg_buf = rsp_msgbuf;
61 err = iavf_clean_arq_element(&hw->avf, &event, NULL);
62 if (err != IAVF_SUCCESS)
65 v_op = rte_le_to_cpu_32(event.desc.cookie_high);
69 if (rsp_msglen != NULL)
70 *rsp_msglen = event.msg_len;
71 return rte_le_to_cpu_32(event.desc.cookie_low);
74 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
75 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
80 static __rte_always_inline void
81 ice_dcf_aq_cmd_clear(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
83 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
85 TAILQ_REMOVE(&hw->vc_cmd_queue, cmd, next);
87 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
90 static __rte_always_inline void
91 ice_dcf_vc_cmd_set(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
93 cmd->v_ret = IAVF_ERR_NOT_READY;
97 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
99 TAILQ_INSERT_TAIL(&hw->vc_cmd_queue, cmd, next);
101 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
104 static __rte_always_inline int
105 ice_dcf_vc_cmd_send(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
107 return iavf_aq_send_msg_to_pf(&hw->avf,
108 cmd->v_op, IAVF_SUCCESS,
109 cmd->req_msg, cmd->req_msglen, NULL);
112 static __rte_always_inline void
113 ice_dcf_aq_cmd_handle(struct ice_dcf_hw *hw, struct iavf_arq_event_info *info)
115 struct dcf_virtchnl_cmd *cmd;
116 enum virtchnl_ops v_op;
117 enum iavf_status v_ret;
120 aq_op = rte_le_to_cpu_16(info->desc.opcode);
121 if (unlikely(aq_op != iavf_aqc_opc_send_msg_to_vf)) {
123 "Request %u is not supported yet", aq_op);
127 v_op = rte_le_to_cpu_32(info->desc.cookie_high);
128 if (v_op == VIRTCHNL_OP_EVENT) {
129 if (hw->vc_event_msg_cb != NULL)
130 hw->vc_event_msg_cb(hw,
136 v_ret = rte_le_to_cpu_32(info->desc.cookie_low);
138 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
140 TAILQ_FOREACH(cmd, &hw->vc_cmd_queue, next) {
141 if (cmd->v_op == v_op && cmd->pending) {
143 cmd->rsp_msglen = RTE_MIN(info->msg_len,
145 if (likely(cmd->rsp_msglen != 0))
146 rte_memcpy(cmd->rsp_msgbuf, info->msg_buf,
149 /* prevent compiler reordering */
150 rte_compiler_barrier();
156 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
160 ice_dcf_handle_virtchnl_msg(struct ice_dcf_hw *hw)
162 struct iavf_arq_event_info info;
163 uint16_t pending = 1;
166 info.buf_len = ICE_DCF_AQ_BUF_SZ;
167 info.msg_buf = hw->arq_buf;
170 ret = iavf_clean_arq_element(&hw->avf, &info, &pending);
171 if (ret != IAVF_SUCCESS)
174 ice_dcf_aq_cmd_handle(hw, &info);
179 ice_dcf_init_check_api_version(struct ice_dcf_hw *hw)
181 #define ICE_CPF_VIRTCHNL_VERSION_MAJOR_START 1
182 #define ICE_CPF_VIRTCHNL_VERSION_MINOR_START 1
183 struct virtchnl_version_info version, *pver;
186 version.major = VIRTCHNL_VERSION_MAJOR;
187 version.minor = VIRTCHNL_VERSION_MINOR;
188 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_VERSION,
189 (uint8_t *)&version, sizeof(version));
191 PMD_INIT_LOG(ERR, "Failed to send OP_VERSION");
195 pver = &hw->virtchnl_version;
196 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_VERSION,
197 (uint8_t *)pver, sizeof(*pver), NULL);
199 PMD_INIT_LOG(ERR, "Failed to get response of OP_VERSION");
204 "Peer PF API version: %u.%u", pver->major, pver->minor);
206 if (pver->major < ICE_CPF_VIRTCHNL_VERSION_MAJOR_START ||
207 (pver->major == ICE_CPF_VIRTCHNL_VERSION_MAJOR_START &&
208 pver->minor < ICE_CPF_VIRTCHNL_VERSION_MINOR_START)) {
210 "VIRTCHNL API version should not be lower than (%u.%u)",
211 ICE_CPF_VIRTCHNL_VERSION_MAJOR_START,
212 ICE_CPF_VIRTCHNL_VERSION_MAJOR_START);
214 } else if (pver->major > VIRTCHNL_VERSION_MAJOR ||
215 (pver->major == VIRTCHNL_VERSION_MAJOR &&
216 pver->minor > VIRTCHNL_VERSION_MINOR)) {
218 "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
219 pver->major, pver->minor,
220 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR);
224 PMD_INIT_LOG(DEBUG, "Peer is supported PF host");
230 ice_dcf_get_vf_resource(struct ice_dcf_hw *hw)
235 caps = VIRTCHNL_VF_OFFLOAD_WB_ON_ITR | VIRTCHNL_VF_OFFLOAD_RX_POLLING |
236 VIRTCHNL_VF_CAP_ADV_LINK_SPEED | VIRTCHNL_VF_CAP_DCF |
237 VIRTCHNL_VF_OFFLOAD_VLAN_V2 |
238 VF_BASE_MODE_OFFLOADS | VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC |
239 VIRTCHNL_VF_OFFLOAD_QOS;
241 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_GET_VF_RESOURCES,
242 (uint8_t *)&caps, sizeof(caps));
244 PMD_DRV_LOG(ERR, "Failed to send msg OP_GET_VF_RESOURCE");
248 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_GET_VF_RESOURCES,
249 (uint8_t *)hw->vf_res,
250 ICE_DCF_VF_RES_BUF_SZ, NULL);
252 PMD_DRV_LOG(ERR, "Failed to get response of OP_GET_VF_RESOURCE");
256 iavf_vf_parse_hw_config(&hw->avf, hw->vf_res);
259 for (i = 0; i < hw->vf_res->num_vsis; i++) {
260 if (hw->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
261 hw->vsi_res = &hw->vf_res->vsi_res[i];
265 PMD_DRV_LOG(ERR, "no LAN VSI found");
269 hw->vsi_id = hw->vsi_res->vsi_id;
270 PMD_DRV_LOG(DEBUG, "VSI ID is %u", hw->vsi_id);
276 ice_dcf_get_vf_vsi_map(struct ice_dcf_hw *hw)
278 struct virtchnl_dcf_vsi_map *vsi_map;
279 uint32_t valid_msg_len;
283 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_DCF_GET_VSI_MAP,
286 PMD_DRV_LOG(ERR, "Failed to send msg OP_DCF_GET_VSI_MAP");
290 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_DCF_GET_VSI_MAP,
291 hw->arq_buf, ICE_DCF_AQ_BUF_SZ,
294 PMD_DRV_LOG(ERR, "Failed to get response of OP_DCF_GET_VSI_MAP");
298 vsi_map = (struct virtchnl_dcf_vsi_map *)hw->arq_buf;
299 valid_msg_len = (vsi_map->num_vfs - 1) * sizeof(vsi_map->vf_vsi[0]) +
301 if (len != valid_msg_len) {
302 PMD_DRV_LOG(ERR, "invalid vf vsi map response with length %u",
307 if (hw->num_vfs != 0 && hw->num_vfs != vsi_map->num_vfs) {
308 PMD_DRV_LOG(ERR, "The number VSI map (%u) doesn't match the number of VFs (%u)",
309 vsi_map->num_vfs, hw->num_vfs);
313 len = vsi_map->num_vfs * sizeof(vsi_map->vf_vsi[0]);
315 if (!hw->vf_vsi_map) {
316 hw->vf_vsi_map = rte_zmalloc("vf_vsi_ctx", len, 0);
317 if (!hw->vf_vsi_map) {
318 PMD_DRV_LOG(ERR, "Failed to alloc memory for VSI context");
322 hw->num_vfs = vsi_map->num_vfs;
323 hw->pf_vsi_id = vsi_map->pf_vsi;
326 if (!memcmp(hw->vf_vsi_map, vsi_map->vf_vsi, len)) {
327 PMD_DRV_LOG(DEBUG, "VF VSI map doesn't change");
331 rte_memcpy(hw->vf_vsi_map, vsi_map->vf_vsi, len);
336 ice_dcf_mode_disable(struct ice_dcf_hw *hw)
343 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_DCF_DISABLE,
346 PMD_DRV_LOG(ERR, "Failed to send msg OP_DCF_DISABLE");
350 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_DCF_DISABLE,
351 hw->arq_buf, ICE_DCF_AQ_BUF_SZ, NULL);
354 "Failed to get response of OP_DCF_DISABLE %d",
363 ice_dcf_check_reset_done(struct ice_dcf_hw *hw)
365 #define ICE_DCF_RESET_WAIT_CNT 50
366 struct iavf_hw *avf = &hw->avf;
369 for (i = 0; i < ICE_DCF_RESET_WAIT_CNT; i++) {
370 reset = IAVF_READ_REG(avf, IAVF_VFGEN_RSTAT) &
371 IAVF_VFGEN_RSTAT_VFR_STATE_MASK;
372 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT;
374 if (reset == VIRTCHNL_VFR_VFACTIVE ||
375 reset == VIRTCHNL_VFR_COMPLETED)
381 if (i >= ICE_DCF_RESET_WAIT_CNT)
388 ice_dcf_enable_irq0(struct ice_dcf_hw *hw)
390 struct iavf_hw *avf = &hw->avf;
392 /* Enable admin queue interrupt trigger */
393 IAVF_WRITE_REG(avf, IAVF_VFINT_ICR0_ENA1,
394 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK);
395 IAVF_WRITE_REG(avf, IAVF_VFINT_DYN_CTL01,
396 IAVF_VFINT_DYN_CTL01_INTENA_MASK |
397 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK |
398 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK);
400 IAVF_WRITE_FLUSH(avf);
404 ice_dcf_disable_irq0(struct ice_dcf_hw *hw)
406 struct iavf_hw *avf = &hw->avf;
408 /* Disable all interrupt types */
409 IAVF_WRITE_REG(avf, IAVF_VFINT_ICR0_ENA1, 0);
410 IAVF_WRITE_REG(avf, IAVF_VFINT_DYN_CTL01,
411 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK);
413 IAVF_WRITE_FLUSH(avf);
417 ice_dcf_dev_interrupt_handler(void *param)
419 struct ice_dcf_hw *hw = param;
421 ice_dcf_disable_irq0(hw);
423 ice_dcf_handle_virtchnl_msg(hw);
425 ice_dcf_enable_irq0(hw);
429 ice_dcf_execute_virtchnl_cmd(struct ice_dcf_hw *hw,
430 struct dcf_virtchnl_cmd *cmd)
435 if ((cmd->req_msg && !cmd->req_msglen) ||
436 (!cmd->req_msg && cmd->req_msglen) ||
437 (cmd->rsp_msgbuf && !cmd->rsp_buflen) ||
438 (!cmd->rsp_msgbuf && cmd->rsp_buflen))
441 rte_spinlock_lock(&hw->vc_cmd_send_lock);
442 ice_dcf_vc_cmd_set(hw, cmd);
444 err = ice_dcf_vc_cmd_send(hw, cmd);
446 PMD_DRV_LOG(ERR, "fail to send cmd %d", cmd->v_op);
454 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
455 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
457 if (cmd->v_ret != IAVF_SUCCESS) {
460 "No response (%d times) or return failure (%d) for cmd %d",
461 i, cmd->v_ret, cmd->v_op);
465 ice_dcf_aq_cmd_clear(hw, cmd);
466 rte_spinlock_unlock(&hw->vc_cmd_send_lock);
471 ice_dcf_send_aq_cmd(void *dcf_hw, struct ice_aq_desc *desc,
472 void *buf, uint16_t buf_size)
474 struct dcf_virtchnl_cmd desc_cmd, buff_cmd;
475 struct ice_dcf_hw *hw = dcf_hw;
479 if ((buf && !buf_size) || (!buf && buf_size) ||
480 buf_size > ICE_DCF_AQ_BUF_SZ)
483 desc_cmd.v_op = VIRTCHNL_OP_DCF_CMD_DESC;
484 desc_cmd.req_msglen = sizeof(*desc);
485 desc_cmd.req_msg = (uint8_t *)desc;
486 desc_cmd.rsp_buflen = sizeof(*desc);
487 desc_cmd.rsp_msgbuf = (uint8_t *)desc;
490 return ice_dcf_execute_virtchnl_cmd(hw, &desc_cmd);
492 desc->flags |= rte_cpu_to_le_16(ICE_AQ_FLAG_BUF);
494 buff_cmd.v_op = VIRTCHNL_OP_DCF_CMD_BUFF;
495 buff_cmd.req_msglen = buf_size;
496 buff_cmd.req_msg = buf;
497 buff_cmd.rsp_buflen = buf_size;
498 buff_cmd.rsp_msgbuf = buf;
500 rte_spinlock_lock(&hw->vc_cmd_send_lock);
501 ice_dcf_vc_cmd_set(hw, &desc_cmd);
502 ice_dcf_vc_cmd_set(hw, &buff_cmd);
504 if (ice_dcf_vc_cmd_send(hw, &desc_cmd) ||
505 ice_dcf_vc_cmd_send(hw, &buff_cmd)) {
507 PMD_DRV_LOG(ERR, "fail to send OP_DCF_CMD_DESC/BUFF");
512 if (!desc_cmd.pending && !buff_cmd.pending)
515 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
516 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
518 if (desc_cmd.v_ret != IAVF_SUCCESS || buff_cmd.v_ret != IAVF_SUCCESS) {
521 "No response (%d times) or return failure (desc: %d / buff: %d)",
522 i, desc_cmd.v_ret, buff_cmd.v_ret);
526 ice_dcf_aq_cmd_clear(hw, &desc_cmd);
527 ice_dcf_aq_cmd_clear(hw, &buff_cmd);
528 rte_spinlock_unlock(&hw->vc_cmd_send_lock);
534 ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw)
536 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(hw->eth_dev);
539 rte_spinlock_lock(&hw->vc_cmd_send_lock);
541 rte_intr_disable(&pci_dev->intr_handle);
542 ice_dcf_disable_irq0(hw);
544 if (ice_dcf_get_vf_resource(hw) || ice_dcf_get_vf_vsi_map(hw) < 0)
547 rte_intr_enable(&pci_dev->intr_handle);
548 ice_dcf_enable_irq0(hw);
550 rte_spinlock_unlock(&hw->vc_cmd_send_lock);
556 ice_dcf_get_supported_rxdid(struct ice_dcf_hw *hw)
560 err = ice_dcf_send_cmd_req_no_irq(hw,
561 VIRTCHNL_OP_GET_SUPPORTED_RXDIDS,
564 PMD_INIT_LOG(ERR, "Failed to send OP_GET_SUPPORTED_RXDIDS");
568 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_GET_SUPPORTED_RXDIDS,
569 (uint8_t *)&hw->supported_rxdid,
570 sizeof(uint64_t), NULL);
572 PMD_INIT_LOG(ERR, "Failed to get response of OP_GET_SUPPORTED_RXDIDS");
580 ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
582 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
585 hw->avf.hw_addr = pci_dev->mem_resource[0].addr;
588 hw->avf.bus.bus_id = pci_dev->addr.bus;
589 hw->avf.bus.device = pci_dev->addr.devid;
590 hw->avf.bus.func = pci_dev->addr.function;
592 hw->avf.device_id = pci_dev->id.device_id;
593 hw->avf.vendor_id = pci_dev->id.vendor_id;
594 hw->avf.subsystem_device_id = pci_dev->id.subsystem_device_id;
595 hw->avf.subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
597 hw->avf.aq.num_arq_entries = ICE_DCF_AQ_LEN;
598 hw->avf.aq.num_asq_entries = ICE_DCF_AQ_LEN;
599 hw->avf.aq.arq_buf_size = ICE_DCF_AQ_BUF_SZ;
600 hw->avf.aq.asq_buf_size = ICE_DCF_AQ_BUF_SZ;
602 rte_spinlock_init(&hw->vc_cmd_send_lock);
603 rte_spinlock_init(&hw->vc_cmd_queue_lock);
604 TAILQ_INIT(&hw->vc_cmd_queue);
606 hw->arq_buf = rte_zmalloc("arq_buf", ICE_DCF_AQ_BUF_SZ, 0);
607 if (hw->arq_buf == NULL) {
608 PMD_INIT_LOG(ERR, "unable to allocate AdminQ buffer memory");
612 ret = iavf_set_mac_type(&hw->avf);
614 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", ret);
618 ret = ice_dcf_check_reset_done(hw);
620 PMD_INIT_LOG(ERR, "VF is still resetting");
624 ret = iavf_init_adminq(&hw->avf);
626 PMD_INIT_LOG(ERR, "init_adminq failed: %d", ret);
630 if (ice_dcf_init_check_api_version(hw)) {
631 PMD_INIT_LOG(ERR, "check_api version failed");
635 hw->vf_res = rte_zmalloc("vf_res", ICE_DCF_VF_RES_BUF_SZ, 0);
636 if (hw->vf_res == NULL) {
637 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
641 if (ice_dcf_get_vf_resource(hw)) {
642 PMD_INIT_LOG(ERR, "Failed to get VF resource");
646 if (ice_dcf_get_vf_vsi_map(hw) < 0) {
647 PMD_INIT_LOG(ERR, "Failed to get VF VSI map");
648 ice_dcf_mode_disable(hw);
652 /* Allocate memory for RSS info */
653 if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
654 hw->rss_key = rte_zmalloc(NULL,
655 hw->vf_res->rss_key_size, 0);
657 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory");
660 hw->rss_lut = rte_zmalloc("rss_lut",
661 hw->vf_res->rss_lut_size, 0);
663 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory");
668 if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) {
669 if (ice_dcf_get_supported_rxdid(hw) != 0) {
670 PMD_INIT_LOG(ERR, "failed to do get supported rxdid");
675 if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) {
676 ice_dcf_tm_conf_init(eth_dev);
677 size = sizeof(struct virtchnl_dcf_bw_cfg_list *) * hw->num_vfs;
678 hw->qos_bw_cfg = rte_zmalloc("qos_bw_cfg", size, 0);
679 if (!hw->qos_bw_cfg) {
680 PMD_INIT_LOG(ERR, "no memory for qos_bw_cfg");
685 hw->eth_dev = eth_dev;
686 rte_intr_callback_register(&pci_dev->intr_handle,
687 ice_dcf_dev_interrupt_handler, hw);
688 rte_intr_enable(&pci_dev->intr_handle);
689 ice_dcf_enable_irq0(hw);
694 rte_free(hw->rss_key);
695 rte_free(hw->rss_lut);
697 rte_free(hw->vf_res);
699 iavf_shutdown_adminq(&hw->avf);
701 rte_free(hw->arq_buf);
707 ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
709 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
710 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
712 if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)
713 if (hw->tm_conf.committed) {
714 ice_dcf_clear_bw(hw);
715 ice_dcf_tm_conf_uninit(eth_dev);
718 ice_dcf_disable_irq0(hw);
719 rte_intr_disable(intr_handle);
720 rte_intr_callback_unregister(intr_handle,
721 ice_dcf_dev_interrupt_handler, hw);
723 ice_dcf_mode_disable(hw);
724 iavf_shutdown_adminq(&hw->avf);
726 rte_free(hw->arq_buf);
729 rte_free(hw->vf_vsi_map);
730 hw->vf_vsi_map = NULL;
732 rte_free(hw->vf_res);
735 rte_free(hw->rss_lut);
738 rte_free(hw->rss_key);
741 rte_free(hw->qos_bw_cfg);
742 hw->qos_bw_cfg = NULL;
744 rte_free(hw->ets_config);
745 hw->ets_config = NULL;
749 ice_dcf_configure_rss_key(struct ice_dcf_hw *hw)
751 struct virtchnl_rss_key *rss_key;
752 struct dcf_virtchnl_cmd args;
755 len = sizeof(*rss_key) + hw->vf_res->rss_key_size - 1;
756 rss_key = rte_zmalloc("rss_key", len, 0);
760 rss_key->vsi_id = hw->vsi_res->vsi_id;
761 rss_key->key_len = hw->vf_res->rss_key_size;
762 rte_memcpy(rss_key->key, hw->rss_key, hw->vf_res->rss_key_size);
764 args.v_op = VIRTCHNL_OP_CONFIG_RSS_KEY;
765 args.req_msglen = len;
766 args.req_msg = (uint8_t *)rss_key;
769 args.rsp_msgbuf = NULL;
772 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
774 PMD_INIT_LOG(ERR, "Failed to execute OP_CONFIG_RSS_KEY");
781 ice_dcf_configure_rss_lut(struct ice_dcf_hw *hw)
783 struct virtchnl_rss_lut *rss_lut;
784 struct dcf_virtchnl_cmd args;
787 len = sizeof(*rss_lut) + hw->vf_res->rss_lut_size - 1;
788 rss_lut = rte_zmalloc("rss_lut", len, 0);
792 rss_lut->vsi_id = hw->vsi_res->vsi_id;
793 rss_lut->lut_entries = hw->vf_res->rss_lut_size;
794 rte_memcpy(rss_lut->lut, hw->rss_lut, hw->vf_res->rss_lut_size);
796 args.v_op = VIRTCHNL_OP_CONFIG_RSS_LUT;
797 args.req_msglen = len;
798 args.req_msg = (uint8_t *)rss_lut;
801 args.rsp_msgbuf = NULL;
804 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
806 PMD_INIT_LOG(ERR, "Failed to execute OP_CONFIG_RSS_LUT");
813 ice_dcf_init_rss(struct ice_dcf_hw *hw)
815 struct rte_eth_dev *dev = hw->eth_dev;
816 struct rte_eth_rss_conf *rss_conf;
820 rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
821 nb_q = dev->data->nb_rx_queues;
823 if (!(hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) {
824 PMD_DRV_LOG(DEBUG, "RSS is not supported");
827 if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
828 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default");
829 /* set all lut items to default queue */
830 memset(hw->rss_lut, 0, hw->vf_res->rss_lut_size);
831 return ice_dcf_configure_rss_lut(hw);
834 /* In IAVF, RSS enablement is set by PF driver. It is not supported
835 * to set based on rss_conf->rss_hf.
838 /* configure RSS key */
839 if (!rss_conf->rss_key)
840 /* Calculate the default hash key */
841 for (i = 0; i < hw->vf_res->rss_key_size; i++)
842 hw->rss_key[i] = (uint8_t)rte_rand();
844 rte_memcpy(hw->rss_key, rss_conf->rss_key,
845 RTE_MIN(rss_conf->rss_key_len,
846 hw->vf_res->rss_key_size));
848 /* init RSS LUT table */
849 for (i = 0, j = 0; i < hw->vf_res->rss_lut_size; i++, j++) {
854 /* send virtchnnl ops to configure rss*/
855 ret = ice_dcf_configure_rss_lut(hw);
858 ret = ice_dcf_configure_rss_key(hw);
865 #define IAVF_RXDID_LEGACY_0 0
866 #define IAVF_RXDID_LEGACY_1 1
867 #define IAVF_RXDID_COMMS_OVS_1 22
870 ice_dcf_configure_queues(struct ice_dcf_hw *hw)
872 struct ice_rx_queue **rxq =
873 (struct ice_rx_queue **)hw->eth_dev->data->rx_queues;
874 struct ice_tx_queue **txq =
875 (struct ice_tx_queue **)hw->eth_dev->data->tx_queues;
876 struct virtchnl_vsi_queue_config_info *vc_config;
877 struct virtchnl_queue_pair_info *vc_qp;
878 struct dcf_virtchnl_cmd args;
882 size = sizeof(*vc_config) +
883 sizeof(vc_config->qpair[0]) * hw->num_queue_pairs;
884 vc_config = rte_zmalloc("cfg_queue", size, 0);
888 vc_config->vsi_id = hw->vsi_res->vsi_id;
889 vc_config->num_queue_pairs = hw->num_queue_pairs;
891 for (i = 0, vc_qp = vc_config->qpair;
892 i < hw->num_queue_pairs;
894 vc_qp->txq.vsi_id = hw->vsi_res->vsi_id;
895 vc_qp->txq.queue_id = i;
896 if (i < hw->eth_dev->data->nb_tx_queues) {
897 vc_qp->txq.ring_len = txq[i]->nb_tx_desc;
898 vc_qp->txq.dma_ring_addr = txq[i]->tx_ring_dma;
900 vc_qp->rxq.vsi_id = hw->vsi_res->vsi_id;
901 vc_qp->rxq.queue_id = i;
903 if (i >= hw->eth_dev->data->nb_rx_queues)
906 vc_qp->rxq.max_pkt_size = rxq[i]->max_pkt_len;
907 vc_qp->rxq.ring_len = rxq[i]->nb_rx_desc;
908 vc_qp->rxq.dma_ring_addr = rxq[i]->rx_ring_dma;
909 vc_qp->rxq.databuffer_size = rxq[i]->rx_buf_len;
911 #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC
912 if (hw->vf_res->vf_cap_flags &
913 VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC &&
914 hw->supported_rxdid &
915 BIT(IAVF_RXDID_COMMS_OVS_1)) {
916 vc_qp->rxq.rxdid = IAVF_RXDID_COMMS_OVS_1;
917 PMD_DRV_LOG(NOTICE, "request RXDID == %d in "
918 "Queue[%d]", vc_qp->rxq.rxdid, i);
920 PMD_DRV_LOG(ERR, "RXDID 16 is not supported");
924 if (hw->vf_res->vf_cap_flags &
925 VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC &&
926 hw->supported_rxdid &
927 BIT(IAVF_RXDID_LEGACY_0)) {
928 vc_qp->rxq.rxdid = IAVF_RXDID_LEGACY_0;
929 PMD_DRV_LOG(NOTICE, "request RXDID == %d in "
930 "Queue[%d]", vc_qp->rxq.rxdid, i);
932 PMD_DRV_LOG(ERR, "RXDID == 0 is not supported");
936 ice_select_rxd_to_pkt_fields_handler(rxq[i], vc_qp->rxq.rxdid);
939 memset(&args, 0, sizeof(args));
940 args.v_op = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
941 args.req_msg = (uint8_t *)vc_config;
942 args.req_msglen = size;
944 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
946 PMD_DRV_LOG(ERR, "Failed to execute command of"
947 " VIRTCHNL_OP_CONFIG_VSI_QUEUES");
954 ice_dcf_config_irq_map(struct ice_dcf_hw *hw)
956 struct virtchnl_irq_map_info *map_info;
957 struct virtchnl_vector_map *vecmap;
958 struct dcf_virtchnl_cmd args;
961 len = sizeof(struct virtchnl_irq_map_info) +
962 sizeof(struct virtchnl_vector_map) * hw->nb_msix;
964 map_info = rte_zmalloc("map_info", len, 0);
968 map_info->num_vectors = hw->nb_msix;
969 for (i = 0; i < hw->nb_msix; i++) {
970 vecmap = &map_info->vecmap[i];
971 vecmap->vsi_id = hw->vsi_res->vsi_id;
972 vecmap->rxitr_idx = 0;
973 vecmap->vector_id = hw->msix_base + i;
975 vecmap->rxq_map = hw->rxq_map[hw->msix_base + i];
978 memset(&args, 0, sizeof(args));
979 args.v_op = VIRTCHNL_OP_CONFIG_IRQ_MAP;
980 args.req_msg = (u8 *)map_info;
981 args.req_msglen = len;
983 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
985 PMD_DRV_LOG(ERR, "fail to execute command OP_CONFIG_IRQ_MAP");
992 ice_dcf_switch_queue(struct ice_dcf_hw *hw, uint16_t qid, bool rx, bool on)
994 struct virtchnl_queue_select queue_select;
995 struct dcf_virtchnl_cmd args;
998 memset(&queue_select, 0, sizeof(queue_select));
999 queue_select.vsi_id = hw->vsi_res->vsi_id;
1001 queue_select.rx_queues |= 1 << qid;
1003 queue_select.tx_queues |= 1 << qid;
1005 memset(&args, 0, sizeof(args));
1007 args.v_op = VIRTCHNL_OP_ENABLE_QUEUES;
1009 args.v_op = VIRTCHNL_OP_DISABLE_QUEUES;
1011 args.req_msg = (u8 *)&queue_select;
1012 args.req_msglen = sizeof(queue_select);
1014 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
1016 PMD_DRV_LOG(ERR, "Failed to execute command of %s",
1017 on ? "OP_ENABLE_QUEUES" : "OP_DISABLE_QUEUES");
1023 ice_dcf_disable_queues(struct ice_dcf_hw *hw)
1025 struct virtchnl_queue_select queue_select;
1026 struct dcf_virtchnl_cmd args;
1032 memset(&queue_select, 0, sizeof(queue_select));
1033 queue_select.vsi_id = hw->vsi_res->vsi_id;
1035 queue_select.rx_queues = BIT(hw->eth_dev->data->nb_rx_queues) - 1;
1036 queue_select.tx_queues = BIT(hw->eth_dev->data->nb_tx_queues) - 1;
1038 memset(&args, 0, sizeof(args));
1039 args.v_op = VIRTCHNL_OP_DISABLE_QUEUES;
1040 args.req_msg = (u8 *)&queue_select;
1041 args.req_msglen = sizeof(queue_select);
1043 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
1046 "Failed to execute command of OP_DISABLE_QUEUES");
1052 ice_dcf_query_stats(struct ice_dcf_hw *hw,
1053 struct virtchnl_eth_stats *pstats)
1055 struct virtchnl_queue_select q_stats;
1056 struct dcf_virtchnl_cmd args;
1059 memset(&q_stats, 0, sizeof(q_stats));
1060 q_stats.vsi_id = hw->vsi_res->vsi_id;
1062 args.v_op = VIRTCHNL_OP_GET_STATS;
1063 args.req_msg = (uint8_t *)&q_stats;
1064 args.req_msglen = sizeof(q_stats);
1065 args.rsp_msglen = sizeof(*pstats);
1066 args.rsp_msgbuf = (uint8_t *)pstats;
1067 args.rsp_buflen = sizeof(*pstats);
1069 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
1071 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
1079 ice_dcf_add_del_all_mac_addr(struct ice_dcf_hw *hw, bool add)
1081 struct virtchnl_ether_addr_list *list;
1082 struct rte_ether_addr *addr;
1083 struct dcf_virtchnl_cmd args;
1086 if (hw->resetting) {
1090 PMD_DRV_LOG(ERR, "fail to add all MACs for VF resetting");
1094 len = sizeof(struct virtchnl_ether_addr_list);
1095 addr = hw->eth_dev->data->mac_addrs;
1096 len += sizeof(struct virtchnl_ether_addr);
1098 list = rte_zmalloc(NULL, len, 0);
1100 PMD_DRV_LOG(ERR, "fail to allocate memory");
1104 rte_memcpy(list->list[0].addr, addr->addr_bytes,
1105 sizeof(addr->addr_bytes));
1106 PMD_DRV_LOG(DEBUG, "add/rm mac:" RTE_ETHER_ADDR_PRT_FMT,
1107 RTE_ETHER_ADDR_BYTES(addr));
1109 list->vsi_id = hw->vsi_res->vsi_id;
1110 list->num_elements = 1;
1112 memset(&args, 0, sizeof(args));
1113 args.v_op = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1114 VIRTCHNL_OP_DEL_ETH_ADDR;
1115 args.req_msg = (uint8_t *)list;
1116 args.req_msglen = len;
1117 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
1119 PMD_DRV_LOG(ERR, "fail to execute command %s",
1120 add ? "OP_ADD_ETHER_ADDRESS" :
1121 "OP_DEL_ETHER_ADDRESS");