1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2020 Intel Corporation
13 #include <rte_byteorder.h>
14 #include <rte_common.h>
17 #include <rte_atomic.h>
19 #include <rte_ether.h>
20 #include <rte_ethdev_driver.h>
21 #include <rte_ethdev_pci.h>
22 #include <rte_malloc.h>
23 #include <rte_memzone.h>
29 #define ICE_DCF_AQ_LEN 32
30 #define ICE_DCF_AQ_BUF_SZ 4096
32 #define ICE_DCF_ARQ_MAX_RETRIES 200
33 #define ICE_DCF_ARQ_CHECK_TIME 2 /* msecs */
35 #define ICE_DCF_VF_RES_BUF_SZ \
36 (sizeof(struct virtchnl_vf_resource) + \
37 IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource))
39 static __rte_always_inline int
40 ice_dcf_send_cmd_req_no_irq(struct ice_dcf_hw *hw, enum virtchnl_ops op,
41 uint8_t *req_msg, uint16_t req_msglen)
43 return iavf_aq_send_msg_to_pf(&hw->avf, op, IAVF_SUCCESS,
44 req_msg, req_msglen, NULL);
48 ice_dcf_recv_cmd_rsp_no_irq(struct ice_dcf_hw *hw, enum virtchnl_ops op,
49 uint8_t *rsp_msgbuf, uint16_t rsp_buflen,
52 struct iavf_arq_event_info event;
53 enum virtchnl_ops v_op;
57 event.buf_len = rsp_buflen;
58 event.msg_buf = rsp_msgbuf;
61 err = iavf_clean_arq_element(&hw->avf, &event, NULL);
62 if (err != IAVF_SUCCESS)
65 v_op = rte_le_to_cpu_32(event.desc.cookie_high);
69 if (rsp_msglen != NULL)
70 *rsp_msglen = event.msg_len;
71 return rte_le_to_cpu_32(event.desc.cookie_low);
74 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
75 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
80 static __rte_always_inline void
81 ice_dcf_aq_cmd_clear(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
83 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
85 TAILQ_REMOVE(&hw->vc_cmd_queue, cmd, next);
87 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
90 static __rte_always_inline void
91 ice_dcf_vc_cmd_set(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
93 cmd->v_ret = IAVF_ERR_NOT_READY;
97 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
99 TAILQ_INSERT_TAIL(&hw->vc_cmd_queue, cmd, next);
101 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
104 static __rte_always_inline int
105 ice_dcf_vc_cmd_send(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
107 return iavf_aq_send_msg_to_pf(&hw->avf,
108 cmd->v_op, IAVF_SUCCESS,
109 cmd->req_msg, cmd->req_msglen, NULL);
112 static __rte_always_inline void
113 ice_dcf_aq_cmd_handle(struct ice_dcf_hw *hw, struct iavf_arq_event_info *info)
115 struct dcf_virtchnl_cmd *cmd;
116 enum virtchnl_ops v_op;
117 enum iavf_status v_ret;
120 aq_op = rte_le_to_cpu_16(info->desc.opcode);
121 if (unlikely(aq_op != iavf_aqc_opc_send_msg_to_vf)) {
123 "Request %u is not supported yet", aq_op);
127 v_op = rte_le_to_cpu_32(info->desc.cookie_high);
128 if (v_op == VIRTCHNL_OP_EVENT) {
129 if (hw->vc_event_msg_cb != NULL)
130 hw->vc_event_msg_cb(hw,
136 v_ret = rte_le_to_cpu_32(info->desc.cookie_low);
138 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
140 TAILQ_FOREACH(cmd, &hw->vc_cmd_queue, next) {
141 if (cmd->v_op == v_op && cmd->pending) {
143 cmd->rsp_msglen = RTE_MIN(info->msg_len,
145 if (likely(cmd->rsp_msglen != 0))
146 rte_memcpy(cmd->rsp_msgbuf, info->msg_buf,
149 /* prevent compiler reordering */
150 rte_compiler_barrier();
156 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
160 ice_dcf_handle_virtchnl_msg(struct ice_dcf_hw *hw)
162 struct iavf_arq_event_info info;
163 uint16_t pending = 1;
166 info.buf_len = ICE_DCF_AQ_BUF_SZ;
167 info.msg_buf = hw->arq_buf;
170 ret = iavf_clean_arq_element(&hw->avf, &info, &pending);
171 if (ret != IAVF_SUCCESS)
174 ice_dcf_aq_cmd_handle(hw, &info);
179 ice_dcf_init_check_api_version(struct ice_dcf_hw *hw)
181 #define ICE_CPF_VIRTCHNL_VERSION_MAJOR_START 1
182 #define ICE_CPF_VIRTCHNL_VERSION_MINOR_START 1
183 struct virtchnl_version_info version, *pver;
186 version.major = VIRTCHNL_VERSION_MAJOR;
187 version.minor = VIRTCHNL_VERSION_MINOR;
188 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_VERSION,
189 (uint8_t *)&version, sizeof(version));
191 PMD_INIT_LOG(ERR, "Failed to send OP_VERSION");
195 pver = &hw->virtchnl_version;
196 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_VERSION,
197 (uint8_t *)pver, sizeof(*pver), NULL);
199 PMD_INIT_LOG(ERR, "Failed to get response of OP_VERSION");
204 "Peer PF API version: %u.%u", pver->major, pver->minor);
206 if (pver->major < ICE_CPF_VIRTCHNL_VERSION_MAJOR_START ||
207 (pver->major == ICE_CPF_VIRTCHNL_VERSION_MAJOR_START &&
208 pver->minor < ICE_CPF_VIRTCHNL_VERSION_MINOR_START)) {
210 "VIRTCHNL API version should not be lower than (%u.%u)",
211 ICE_CPF_VIRTCHNL_VERSION_MAJOR_START,
212 ICE_CPF_VIRTCHNL_VERSION_MAJOR_START);
214 } else if (pver->major > VIRTCHNL_VERSION_MAJOR ||
215 (pver->major == VIRTCHNL_VERSION_MAJOR &&
216 pver->minor > VIRTCHNL_VERSION_MINOR)) {
218 "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
219 pver->major, pver->minor,
220 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR);
224 PMD_INIT_LOG(DEBUG, "Peer is supported PF host");
230 ice_dcf_get_vf_resource(struct ice_dcf_hw *hw)
235 caps = VIRTCHNL_VF_OFFLOAD_WB_ON_ITR | VIRTCHNL_VF_OFFLOAD_RX_POLLING |
236 VIRTCHNL_VF_CAP_ADV_LINK_SPEED | VIRTCHNL_VF_CAP_DCF |
237 VF_BASE_MODE_OFFLOADS | VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC;
239 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_GET_VF_RESOURCES,
240 (uint8_t *)&caps, sizeof(caps));
242 PMD_DRV_LOG(ERR, "Failed to send msg OP_GET_VF_RESOURCE");
246 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_GET_VF_RESOURCES,
247 (uint8_t *)hw->vf_res,
248 ICE_DCF_VF_RES_BUF_SZ, NULL);
250 PMD_DRV_LOG(ERR, "Failed to get response of OP_GET_VF_RESOURCE");
254 iavf_vf_parse_hw_config(&hw->avf, hw->vf_res);
257 for (i = 0; i < hw->vf_res->num_vsis; i++) {
258 if (hw->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
259 hw->vsi_res = &hw->vf_res->vsi_res[i];
263 PMD_DRV_LOG(ERR, "no LAN VSI found");
267 hw->vsi_id = hw->vsi_res->vsi_id;
268 PMD_DRV_LOG(DEBUG, "VSI ID is %u", hw->vsi_id);
274 ice_dcf_get_vf_vsi_map(struct ice_dcf_hw *hw)
276 struct virtchnl_dcf_vsi_map *vsi_map;
277 uint32_t valid_msg_len;
281 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_DCF_GET_VSI_MAP,
284 PMD_DRV_LOG(ERR, "Failed to send msg OP_DCF_GET_VSI_MAP");
288 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_DCF_GET_VSI_MAP,
289 hw->arq_buf, ICE_DCF_AQ_BUF_SZ,
292 PMD_DRV_LOG(ERR, "Failed to get response of OP_DCF_GET_VSI_MAP");
296 vsi_map = (struct virtchnl_dcf_vsi_map *)hw->arq_buf;
297 valid_msg_len = (vsi_map->num_vfs - 1) * sizeof(vsi_map->vf_vsi[0]) +
299 if (len != valid_msg_len) {
300 PMD_DRV_LOG(ERR, "invalid vf vsi map response with length %u",
305 if (hw->num_vfs != 0 && hw->num_vfs != vsi_map->num_vfs) {
306 PMD_DRV_LOG(ERR, "The number VSI map (%u) doesn't match the number of VFs (%u)",
307 vsi_map->num_vfs, hw->num_vfs);
311 len = vsi_map->num_vfs * sizeof(vsi_map->vf_vsi[0]);
313 if (!hw->vf_vsi_map) {
314 hw->vf_vsi_map = rte_zmalloc("vf_vsi_ctx", len, 0);
315 if (!hw->vf_vsi_map) {
316 PMD_DRV_LOG(ERR, "Failed to alloc memory for VSI context");
320 hw->num_vfs = vsi_map->num_vfs;
321 hw->pf_vsi_id = vsi_map->pf_vsi;
324 if (!memcmp(hw->vf_vsi_map, vsi_map->vf_vsi, len)) {
325 PMD_DRV_LOG(DEBUG, "VF VSI map doesn't change");
329 rte_memcpy(hw->vf_vsi_map, vsi_map->vf_vsi, len);
334 ice_dcf_mode_disable(struct ice_dcf_hw *hw)
338 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_DCF_DISABLE,
341 PMD_DRV_LOG(ERR, "Failed to send msg OP_DCF_DISABLE");
345 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_DCF_DISABLE,
346 hw->arq_buf, ICE_DCF_AQ_BUF_SZ, NULL);
349 "Failed to get response of OP_DCF_DISABLE %d",
358 ice_dcf_check_reset_done(struct ice_dcf_hw *hw)
360 #define ICE_DCF_RESET_WAIT_CNT 50
361 struct iavf_hw *avf = &hw->avf;
364 for (i = 0; i < ICE_DCF_RESET_WAIT_CNT; i++) {
365 reset = IAVF_READ_REG(avf, IAVF_VFGEN_RSTAT) &
366 IAVF_VFGEN_RSTAT_VFR_STATE_MASK;
367 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT;
369 if (reset == VIRTCHNL_VFR_VFACTIVE ||
370 reset == VIRTCHNL_VFR_COMPLETED)
376 if (i >= ICE_DCF_RESET_WAIT_CNT)
383 ice_dcf_enable_irq0(struct ice_dcf_hw *hw)
385 struct iavf_hw *avf = &hw->avf;
387 /* Enable admin queue interrupt trigger */
388 IAVF_WRITE_REG(avf, IAVF_VFINT_ICR0_ENA1,
389 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK);
390 IAVF_WRITE_REG(avf, IAVF_VFINT_DYN_CTL01,
391 IAVF_VFINT_DYN_CTL01_INTENA_MASK |
392 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK |
393 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK);
395 IAVF_WRITE_FLUSH(avf);
399 ice_dcf_disable_irq0(struct ice_dcf_hw *hw)
401 struct iavf_hw *avf = &hw->avf;
403 /* Disable all interrupt types */
404 IAVF_WRITE_REG(avf, IAVF_VFINT_ICR0_ENA1, 0);
405 IAVF_WRITE_REG(avf, IAVF_VFINT_DYN_CTL01,
406 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK);
408 IAVF_WRITE_FLUSH(avf);
412 ice_dcf_dev_interrupt_handler(void *param)
414 struct ice_dcf_hw *hw = param;
416 ice_dcf_disable_irq0(hw);
418 ice_dcf_handle_virtchnl_msg(hw);
420 ice_dcf_enable_irq0(hw);
424 ice_dcf_execute_virtchnl_cmd(struct ice_dcf_hw *hw,
425 struct dcf_virtchnl_cmd *cmd)
430 if ((cmd->req_msg && !cmd->req_msglen) ||
431 (!cmd->req_msg && cmd->req_msglen) ||
432 (cmd->rsp_msgbuf && !cmd->rsp_buflen) ||
433 (!cmd->rsp_msgbuf && cmd->rsp_buflen))
436 rte_spinlock_lock(&hw->vc_cmd_send_lock);
437 ice_dcf_vc_cmd_set(hw, cmd);
439 err = ice_dcf_vc_cmd_send(hw, cmd);
441 PMD_DRV_LOG(ERR, "fail to send cmd %d", cmd->v_op);
449 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
450 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
452 if (cmd->v_ret != IAVF_SUCCESS) {
455 "No response (%d times) or return failure (%d) for cmd %d",
456 i, cmd->v_ret, cmd->v_op);
460 ice_dcf_aq_cmd_clear(hw, cmd);
461 rte_spinlock_unlock(&hw->vc_cmd_send_lock);
466 ice_dcf_send_aq_cmd(void *dcf_hw, struct ice_aq_desc *desc,
467 void *buf, uint16_t buf_size)
469 struct dcf_virtchnl_cmd desc_cmd, buff_cmd;
470 struct ice_dcf_hw *hw = dcf_hw;
474 if ((buf && !buf_size) || (!buf && buf_size) ||
475 buf_size > ICE_DCF_AQ_BUF_SZ)
478 desc_cmd.v_op = VIRTCHNL_OP_DCF_CMD_DESC;
479 desc_cmd.req_msglen = sizeof(*desc);
480 desc_cmd.req_msg = (uint8_t *)desc;
481 desc_cmd.rsp_buflen = sizeof(*desc);
482 desc_cmd.rsp_msgbuf = (uint8_t *)desc;
485 return ice_dcf_execute_virtchnl_cmd(hw, &desc_cmd);
487 desc->flags |= rte_cpu_to_le_16(ICE_AQ_FLAG_BUF);
489 buff_cmd.v_op = VIRTCHNL_OP_DCF_CMD_BUFF;
490 buff_cmd.req_msglen = buf_size;
491 buff_cmd.req_msg = buf;
492 buff_cmd.rsp_buflen = buf_size;
493 buff_cmd.rsp_msgbuf = buf;
495 rte_spinlock_lock(&hw->vc_cmd_send_lock);
496 ice_dcf_vc_cmd_set(hw, &desc_cmd);
497 ice_dcf_vc_cmd_set(hw, &buff_cmd);
499 if (ice_dcf_vc_cmd_send(hw, &desc_cmd) ||
500 ice_dcf_vc_cmd_send(hw, &buff_cmd)) {
502 PMD_DRV_LOG(ERR, "fail to send OP_DCF_CMD_DESC/BUFF");
507 if ((!desc_cmd.pending && !buff_cmd.pending) ||
508 (!desc_cmd.pending && desc_cmd.v_ret != IAVF_SUCCESS) ||
509 (!buff_cmd.pending && buff_cmd.v_ret != IAVF_SUCCESS))
512 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
513 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
515 if (desc_cmd.v_ret != IAVF_SUCCESS || buff_cmd.v_ret != IAVF_SUCCESS) {
518 "No response (%d times) or return failure (desc: %d / buff: %d)",
519 i, desc_cmd.v_ret, buff_cmd.v_ret);
523 ice_dcf_aq_cmd_clear(hw, &desc_cmd);
524 ice_dcf_aq_cmd_clear(hw, &buff_cmd);
525 rte_spinlock_unlock(&hw->vc_cmd_send_lock);
531 ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw)
533 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(hw->eth_dev);
536 rte_spinlock_lock(&hw->vc_cmd_send_lock);
538 rte_intr_disable(&pci_dev->intr_handle);
539 ice_dcf_disable_irq0(hw);
541 if (ice_dcf_get_vf_resource(hw) || ice_dcf_get_vf_vsi_map(hw) < 0)
544 rte_intr_enable(&pci_dev->intr_handle);
545 ice_dcf_enable_irq0(hw);
547 rte_spinlock_unlock(&hw->vc_cmd_send_lock);
553 ice_dcf_get_supported_rxdid(struct ice_dcf_hw *hw)
557 err = ice_dcf_send_cmd_req_no_irq(hw,
558 VIRTCHNL_OP_GET_SUPPORTED_RXDIDS,
561 PMD_INIT_LOG(ERR, "Failed to send OP_GET_SUPPORTED_RXDIDS");
565 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_GET_SUPPORTED_RXDIDS,
566 (uint8_t *)&hw->supported_rxdid,
567 sizeof(uint64_t), NULL);
569 PMD_INIT_LOG(ERR, "Failed to get response of OP_GET_SUPPORTED_RXDIDS");
577 ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
579 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
582 hw->avf.hw_addr = pci_dev->mem_resource[0].addr;
585 hw->avf.bus.bus_id = pci_dev->addr.bus;
586 hw->avf.bus.device = pci_dev->addr.devid;
587 hw->avf.bus.func = pci_dev->addr.function;
589 hw->avf.device_id = pci_dev->id.device_id;
590 hw->avf.vendor_id = pci_dev->id.vendor_id;
591 hw->avf.subsystem_device_id = pci_dev->id.subsystem_device_id;
592 hw->avf.subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
594 hw->avf.aq.num_arq_entries = ICE_DCF_AQ_LEN;
595 hw->avf.aq.num_asq_entries = ICE_DCF_AQ_LEN;
596 hw->avf.aq.arq_buf_size = ICE_DCF_AQ_BUF_SZ;
597 hw->avf.aq.asq_buf_size = ICE_DCF_AQ_BUF_SZ;
599 rte_spinlock_init(&hw->vc_cmd_send_lock);
600 rte_spinlock_init(&hw->vc_cmd_queue_lock);
601 TAILQ_INIT(&hw->vc_cmd_queue);
603 hw->arq_buf = rte_zmalloc("arq_buf", ICE_DCF_AQ_BUF_SZ, 0);
604 if (hw->arq_buf == NULL) {
605 PMD_INIT_LOG(ERR, "unable to allocate AdminQ buffer memory");
609 ret = iavf_set_mac_type(&hw->avf);
611 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", ret);
615 ret = ice_dcf_check_reset_done(hw);
617 PMD_INIT_LOG(ERR, "VF is still resetting");
621 ret = iavf_init_adminq(&hw->avf);
623 PMD_INIT_LOG(ERR, "init_adminq failed: %d", ret);
627 if (ice_dcf_init_check_api_version(hw)) {
628 PMD_INIT_LOG(ERR, "check_api version failed");
632 hw->vf_res = rte_zmalloc("vf_res", ICE_DCF_VF_RES_BUF_SZ, 0);
633 if (hw->vf_res == NULL) {
634 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
638 if (ice_dcf_get_vf_resource(hw)) {
639 PMD_INIT_LOG(ERR, "Failed to get VF resource");
643 if (ice_dcf_get_vf_vsi_map(hw) < 0) {
644 PMD_INIT_LOG(ERR, "Failed to get VF VSI map");
645 ice_dcf_mode_disable(hw);
649 /* Allocate memory for RSS info */
650 if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
651 hw->rss_key = rte_zmalloc(NULL,
652 hw->vf_res->rss_key_size, 0);
654 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory");
657 hw->rss_lut = rte_zmalloc("rss_lut",
658 hw->vf_res->rss_lut_size, 0);
660 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory");
665 if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) {
666 if (ice_dcf_get_supported_rxdid(hw) != 0) {
667 PMD_INIT_LOG(ERR, "failed to do get supported rxdid");
672 hw->eth_dev = eth_dev;
673 rte_intr_callback_register(&pci_dev->intr_handle,
674 ice_dcf_dev_interrupt_handler, hw);
675 rte_intr_enable(&pci_dev->intr_handle);
676 ice_dcf_enable_irq0(hw);
681 rte_free(hw->rss_key);
682 rte_free(hw->rss_lut);
684 rte_free(hw->vf_res);
686 iavf_shutdown_adminq(&hw->avf);
688 rte_free(hw->arq_buf);
694 ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
696 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
697 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
699 ice_dcf_disable_irq0(hw);
700 rte_intr_disable(intr_handle);
701 rte_intr_callback_unregister(intr_handle,
702 ice_dcf_dev_interrupt_handler, hw);
704 ice_dcf_mode_disable(hw);
705 iavf_shutdown_adminq(&hw->avf);
707 rte_free(hw->arq_buf);
708 rte_free(hw->vf_vsi_map);
709 rte_free(hw->vf_res);
710 rte_free(hw->rss_lut);
711 rte_free(hw->rss_key);
715 ice_dcf_configure_rss_key(struct ice_dcf_hw *hw)
717 struct virtchnl_rss_key *rss_key;
718 struct dcf_virtchnl_cmd args;
721 len = sizeof(*rss_key) + hw->vf_res->rss_key_size - 1;
722 rss_key = rte_zmalloc("rss_key", len, 0);
726 rss_key->vsi_id = hw->vsi_res->vsi_id;
727 rss_key->key_len = hw->vf_res->rss_key_size;
728 rte_memcpy(rss_key->key, hw->rss_key, hw->vf_res->rss_key_size);
730 args.v_op = VIRTCHNL_OP_CONFIG_RSS_KEY;
731 args.req_msglen = len;
732 args.req_msg = (uint8_t *)rss_key;
735 args.rsp_msgbuf = NULL;
738 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
740 PMD_INIT_LOG(ERR, "Failed to execute OP_CONFIG_RSS_KEY");
747 ice_dcf_configure_rss_lut(struct ice_dcf_hw *hw)
749 struct virtchnl_rss_lut *rss_lut;
750 struct dcf_virtchnl_cmd args;
753 len = sizeof(*rss_lut) + hw->vf_res->rss_lut_size - 1;
754 rss_lut = rte_zmalloc("rss_lut", len, 0);
758 rss_lut->vsi_id = hw->vsi_res->vsi_id;
759 rss_lut->lut_entries = hw->vf_res->rss_lut_size;
760 rte_memcpy(rss_lut->lut, hw->rss_lut, hw->vf_res->rss_lut_size);
762 args.v_op = VIRTCHNL_OP_CONFIG_RSS_LUT;
763 args.req_msglen = len;
764 args.req_msg = (uint8_t *)rss_lut;
767 args.rsp_msgbuf = NULL;
770 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
772 PMD_INIT_LOG(ERR, "Failed to execute OP_CONFIG_RSS_LUT");
779 ice_dcf_init_rss(struct ice_dcf_hw *hw)
781 struct rte_eth_dev *dev = hw->eth_dev;
782 struct rte_eth_rss_conf *rss_conf;
786 rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
787 nb_q = dev->data->nb_rx_queues;
789 if (!(hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) {
790 PMD_DRV_LOG(DEBUG, "RSS is not supported");
793 if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
794 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default");
795 /* set all lut items to default queue */
796 memset(hw->rss_lut, 0, hw->vf_res->rss_lut_size);
797 return ice_dcf_configure_rss_lut(hw);
800 /* In IAVF, RSS enablement is set by PF driver. It is not supported
801 * to set based on rss_conf->rss_hf.
804 /* configure RSS key */
805 if (!rss_conf->rss_key)
806 /* Calculate the default hash key */
807 for (i = 0; i < hw->vf_res->rss_key_size; i++)
808 hw->rss_key[i] = (uint8_t)rte_rand();
810 rte_memcpy(hw->rss_key, rss_conf->rss_key,
811 RTE_MIN(rss_conf->rss_key_len,
812 hw->vf_res->rss_key_size));
814 /* init RSS LUT table */
815 for (i = 0, j = 0; i < hw->vf_res->rss_lut_size; i++, j++) {
820 /* send virtchnnl ops to configure rss*/
821 ret = ice_dcf_configure_rss_lut(hw);
824 ret = ice_dcf_configure_rss_key(hw);
831 #define IAVF_RXDID_LEGACY_0 0
832 #define IAVF_RXDID_LEGACY_1 1
833 #define IAVF_RXDID_COMMS_GENERIC 16
836 ice_dcf_configure_queues(struct ice_dcf_hw *hw)
838 struct ice_rx_queue **rxq =
839 (struct ice_rx_queue **)hw->eth_dev->data->rx_queues;
840 struct ice_tx_queue **txq =
841 (struct ice_tx_queue **)hw->eth_dev->data->tx_queues;
842 struct virtchnl_vsi_queue_config_info *vc_config;
843 struct virtchnl_queue_pair_info *vc_qp;
844 struct dcf_virtchnl_cmd args;
848 size = sizeof(*vc_config) +
849 sizeof(vc_config->qpair[0]) * hw->num_queue_pairs;
850 vc_config = rte_zmalloc("cfg_queue", size, 0);
854 vc_config->vsi_id = hw->vsi_res->vsi_id;
855 vc_config->num_queue_pairs = hw->num_queue_pairs;
857 for (i = 0, vc_qp = vc_config->qpair;
858 i < hw->num_queue_pairs;
860 vc_qp->txq.vsi_id = hw->vsi_res->vsi_id;
861 vc_qp->txq.queue_id = i;
862 if (i < hw->eth_dev->data->nb_tx_queues) {
863 vc_qp->txq.ring_len = txq[i]->nb_tx_desc;
864 vc_qp->txq.dma_ring_addr = txq[i]->tx_ring_dma;
866 vc_qp->rxq.vsi_id = hw->vsi_res->vsi_id;
867 vc_qp->rxq.queue_id = i;
868 vc_qp->rxq.max_pkt_size = rxq[i]->max_pkt_len;
870 if (i >= hw->eth_dev->data->nb_rx_queues)
873 vc_qp->rxq.ring_len = rxq[i]->nb_rx_desc;
874 vc_qp->rxq.dma_ring_addr = rxq[i]->rx_ring_dma;
875 vc_qp->rxq.databuffer_size = rxq[i]->rx_buf_len;
877 #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC
878 if (hw->vf_res->vf_cap_flags &
879 VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC &&
880 hw->supported_rxdid &
881 BIT(IAVF_RXDID_COMMS_GENERIC)) {
882 vc_qp->rxq.rxdid = IAVF_RXDID_COMMS_GENERIC;
883 PMD_DRV_LOG(NOTICE, "request RXDID == %d in "
884 "Queue[%d]", vc_qp->rxq.rxdid, i);
886 PMD_DRV_LOG(ERR, "RXDID 16 is not supported");
890 if (hw->vf_res->vf_cap_flags &
891 VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC &&
892 hw->supported_rxdid &
893 BIT(IAVF_RXDID_LEGACY_0)) {
894 vc_qp->rxq.rxdid = IAVF_RXDID_LEGACY_0;
895 PMD_DRV_LOG(NOTICE, "request RXDID == %d in "
896 "Queue[%d]", vc_qp->rxq.rxdid, i);
898 PMD_DRV_LOG(ERR, "RXDID == 0 is not supported");
902 ice_select_rxd_to_pkt_fields_handler(rxq[i], vc_qp->rxq.rxdid);
905 memset(&args, 0, sizeof(args));
906 args.v_op = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
907 args.req_msg = (uint8_t *)vc_config;
908 args.req_msglen = size;
910 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
912 PMD_DRV_LOG(ERR, "Failed to execute command of"
913 " VIRTCHNL_OP_CONFIG_VSI_QUEUES");
920 ice_dcf_config_irq_map(struct ice_dcf_hw *hw)
922 struct virtchnl_irq_map_info *map_info;
923 struct virtchnl_vector_map *vecmap;
924 struct dcf_virtchnl_cmd args;
927 len = sizeof(struct virtchnl_irq_map_info) +
928 sizeof(struct virtchnl_vector_map) * hw->nb_msix;
930 map_info = rte_zmalloc("map_info", len, 0);
934 map_info->num_vectors = hw->nb_msix;
935 for (i = 0; i < hw->nb_msix; i++) {
936 vecmap = &map_info->vecmap[i];
937 vecmap->vsi_id = hw->vsi_res->vsi_id;
938 vecmap->rxitr_idx = 0;
939 vecmap->vector_id = hw->msix_base + i;
941 vecmap->rxq_map = hw->rxq_map[hw->msix_base + i];
944 memset(&args, 0, sizeof(args));
945 args.v_op = VIRTCHNL_OP_CONFIG_IRQ_MAP;
946 args.req_msg = (u8 *)map_info;
947 args.req_msglen = len;
949 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
951 PMD_DRV_LOG(ERR, "fail to execute command OP_CONFIG_IRQ_MAP");
958 ice_dcf_switch_queue(struct ice_dcf_hw *hw, uint16_t qid, bool rx, bool on)
960 struct virtchnl_queue_select queue_select;
961 struct dcf_virtchnl_cmd args;
964 memset(&queue_select, 0, sizeof(queue_select));
965 queue_select.vsi_id = hw->vsi_res->vsi_id;
967 queue_select.rx_queues |= 1 << qid;
969 queue_select.tx_queues |= 1 << qid;
971 memset(&args, 0, sizeof(args));
973 args.v_op = VIRTCHNL_OP_ENABLE_QUEUES;
975 args.v_op = VIRTCHNL_OP_DISABLE_QUEUES;
977 args.req_msg = (u8 *)&queue_select;
978 args.req_msglen = sizeof(queue_select);
980 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
982 PMD_DRV_LOG(ERR, "Failed to execute command of %s",
983 on ? "OP_ENABLE_QUEUES" : "OP_DISABLE_QUEUES");
989 ice_dcf_disable_queues(struct ice_dcf_hw *hw)
991 struct virtchnl_queue_select queue_select;
992 struct dcf_virtchnl_cmd args;
995 memset(&queue_select, 0, sizeof(queue_select));
996 queue_select.vsi_id = hw->vsi_res->vsi_id;
998 queue_select.rx_queues = BIT(hw->eth_dev->data->nb_rx_queues) - 1;
999 queue_select.tx_queues = BIT(hw->eth_dev->data->nb_tx_queues) - 1;
1001 memset(&args, 0, sizeof(args));
1002 args.v_op = VIRTCHNL_OP_DISABLE_QUEUES;
1003 args.req_msg = (u8 *)&queue_select;
1004 args.req_msglen = sizeof(queue_select);
1006 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
1009 "Failed to execute command of OP_DISABLE_QUEUES");
1015 ice_dcf_query_stats(struct ice_dcf_hw *hw,
1016 struct virtchnl_eth_stats *pstats)
1018 struct virtchnl_queue_select q_stats;
1019 struct dcf_virtchnl_cmd args;
1022 memset(&q_stats, 0, sizeof(q_stats));
1023 q_stats.vsi_id = hw->vsi_res->vsi_id;
1025 args.v_op = VIRTCHNL_OP_GET_STATS;
1026 args.req_msg = (uint8_t *)&q_stats;
1027 args.req_msglen = sizeof(q_stats);
1028 args.rsp_msglen = sizeof(*pstats);
1029 args.rsp_msgbuf = (uint8_t *)pstats;
1030 args.rsp_buflen = sizeof(*pstats);
1032 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
1034 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
1042 ice_dcf_add_del_all_mac_addr(struct ice_dcf_hw *hw, bool add)
1044 struct virtchnl_ether_addr_list *list;
1045 struct rte_ether_addr *addr;
1046 struct dcf_virtchnl_cmd args;
1049 len = sizeof(struct virtchnl_ether_addr_list);
1050 addr = hw->eth_dev->data->mac_addrs;
1051 len += sizeof(struct virtchnl_ether_addr);
1053 list = rte_zmalloc(NULL, len, 0);
1055 PMD_DRV_LOG(ERR, "fail to allocate memory");
1059 rte_memcpy(list->list[0].addr, addr->addr_bytes,
1060 sizeof(addr->addr_bytes));
1061 PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1062 addr->addr_bytes[0], addr->addr_bytes[1],
1063 addr->addr_bytes[2], addr->addr_bytes[3],
1064 addr->addr_bytes[4], addr->addr_bytes[5]);
1066 list->vsi_id = hw->vsi_res->vsi_id;
1067 list->num_elements = 1;
1069 memset(&args, 0, sizeof(args));
1070 args.v_op = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1071 VIRTCHNL_OP_DEL_ETH_ADDR;
1072 args.req_msg = (uint8_t *)list;
1073 args.req_msglen = len;
1074 err = ice_dcf_execute_virtchnl_cmd(hw, &args);
1076 PMD_DRV_LOG(ERR, "fail to execute command %s",
1077 add ? "OP_ADD_ETHER_ADDRESS" :
1078 "OP_DEL_ETHER_ADDRESS");