1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2020 Intel Corporation
13 #include <rte_byteorder.h>
14 #include <rte_common.h>
17 #include <rte_atomic.h>
19 #include <rte_ether.h>
20 #include <rte_ethdev_driver.h>
21 #include <rte_ethdev_pci.h>
22 #include <rte_malloc.h>
23 #include <rte_memzone.h>
28 #define ICE_DCF_AQ_LEN 32
29 #define ICE_DCF_AQ_BUF_SZ 4096
31 #define ICE_DCF_ARQ_MAX_RETRIES 200
32 #define ICE_DCF_ARQ_CHECK_TIME 2 /* msecs */
34 #define ICE_DCF_VF_RES_BUF_SZ \
35 (sizeof(struct virtchnl_vf_resource) + \
36 IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource))
38 static __rte_always_inline int
39 ice_dcf_send_cmd_req_no_irq(struct ice_dcf_hw *hw, enum virtchnl_ops op,
40 uint8_t *req_msg, uint16_t req_msglen)
42 return iavf_aq_send_msg_to_pf(&hw->avf, op, IAVF_SUCCESS,
43 req_msg, req_msglen, NULL);
47 ice_dcf_recv_cmd_rsp_no_irq(struct ice_dcf_hw *hw, enum virtchnl_ops op,
48 uint8_t *rsp_msgbuf, uint16_t rsp_buflen,
51 struct iavf_arq_event_info event;
52 enum virtchnl_ops v_op;
56 event.buf_len = rsp_buflen;
57 event.msg_buf = rsp_msgbuf;
60 err = iavf_clean_arq_element(&hw->avf, &event, NULL);
61 if (err != IAVF_SUCCESS)
64 v_op = rte_le_to_cpu_32(event.desc.cookie_high);
68 if (rsp_msglen != NULL)
69 *rsp_msglen = event.msg_len;
70 return rte_le_to_cpu_32(event.desc.cookie_low);
73 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
74 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
79 static __rte_always_inline void
80 ice_dcf_aq_cmd_clear(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
82 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
84 TAILQ_REMOVE(&hw->vc_cmd_queue, cmd, next);
86 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
89 static __rte_always_inline void
90 ice_dcf_vc_cmd_set(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
92 cmd->v_ret = IAVF_ERR_NOT_READY;
96 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
98 TAILQ_INSERT_TAIL(&hw->vc_cmd_queue, cmd, next);
100 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
103 static __rte_always_inline int
104 ice_dcf_vc_cmd_send(struct ice_dcf_hw *hw, struct dcf_virtchnl_cmd *cmd)
106 return iavf_aq_send_msg_to_pf(&hw->avf,
107 cmd->v_op, IAVF_SUCCESS,
108 cmd->req_msg, cmd->req_msglen, NULL);
111 static __rte_always_inline void
112 ice_dcf_aq_cmd_handle(struct ice_dcf_hw *hw, struct iavf_arq_event_info *info)
114 struct dcf_virtchnl_cmd *cmd;
115 enum virtchnl_ops v_op;
116 enum iavf_status v_ret;
119 aq_op = rte_le_to_cpu_16(info->desc.opcode);
120 if (unlikely(aq_op != iavf_aqc_opc_send_msg_to_vf)) {
122 "Request %u is not supported yet", aq_op);
126 v_op = rte_le_to_cpu_32(info->desc.cookie_high);
127 if (v_op == VIRTCHNL_OP_EVENT) {
128 if (hw->vc_event_msg_cb != NULL)
129 hw->vc_event_msg_cb(hw,
135 v_ret = rte_le_to_cpu_32(info->desc.cookie_low);
137 rte_spinlock_lock(&hw->vc_cmd_queue_lock);
139 TAILQ_FOREACH(cmd, &hw->vc_cmd_queue, next) {
140 if (cmd->v_op == v_op && cmd->pending) {
142 cmd->rsp_msglen = RTE_MIN(info->msg_len,
144 if (likely(cmd->rsp_msglen != 0))
145 rte_memcpy(cmd->rsp_msgbuf, info->msg_buf,
148 /* prevent compiler reordering */
149 rte_compiler_barrier();
155 rte_spinlock_unlock(&hw->vc_cmd_queue_lock);
159 ice_dcf_handle_virtchnl_msg(struct ice_dcf_hw *hw)
161 struct iavf_arq_event_info info;
162 uint16_t pending = 1;
165 info.buf_len = ICE_DCF_AQ_BUF_SZ;
166 info.msg_buf = hw->arq_buf;
169 ret = iavf_clean_arq_element(&hw->avf, &info, &pending);
170 if (ret != IAVF_SUCCESS)
173 ice_dcf_aq_cmd_handle(hw, &info);
178 ice_dcf_init_check_api_version(struct ice_dcf_hw *hw)
180 #define ICE_CPF_VIRTCHNL_VERSION_MAJOR_START 1
181 #define ICE_CPF_VIRTCHNL_VERSION_MINOR_START 1
182 struct virtchnl_version_info version, *pver;
185 version.major = VIRTCHNL_VERSION_MAJOR;
186 version.minor = VIRTCHNL_VERSION_MINOR;
187 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_VERSION,
188 (uint8_t *)&version, sizeof(version));
190 PMD_INIT_LOG(ERR, "Failed to send OP_VERSION");
194 pver = &hw->virtchnl_version;
195 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_VERSION,
196 (uint8_t *)pver, sizeof(*pver), NULL);
198 PMD_INIT_LOG(ERR, "Failed to get response of OP_VERSION");
203 "Peer PF API version: %u.%u", pver->major, pver->minor);
205 if (pver->major < ICE_CPF_VIRTCHNL_VERSION_MAJOR_START ||
206 (pver->major == ICE_CPF_VIRTCHNL_VERSION_MAJOR_START &&
207 pver->minor < ICE_CPF_VIRTCHNL_VERSION_MINOR_START)) {
209 "VIRTCHNL API version should not be lower than (%u.%u)",
210 ICE_CPF_VIRTCHNL_VERSION_MAJOR_START,
211 ICE_CPF_VIRTCHNL_VERSION_MAJOR_START);
213 } else if (pver->major > VIRTCHNL_VERSION_MAJOR ||
214 (pver->major == VIRTCHNL_VERSION_MAJOR &&
215 pver->minor > VIRTCHNL_VERSION_MINOR)) {
217 "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
218 pver->major, pver->minor,
219 VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR);
223 PMD_INIT_LOG(DEBUG, "Peer is supported PF host");
229 ice_dcf_get_vf_resource(struct ice_dcf_hw *hw)
234 caps = VIRTCHNL_VF_OFFLOAD_WB_ON_ITR | VIRTCHNL_VF_OFFLOAD_RX_POLLING |
235 VIRTCHNL_VF_CAP_ADV_LINK_SPEED | VIRTCHNL_VF_CAP_DCF |
236 VF_BASE_MODE_OFFLOADS;
238 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_GET_VF_RESOURCES,
239 (uint8_t *)&caps, sizeof(caps));
241 PMD_DRV_LOG(ERR, "Failed to send msg OP_GET_VF_RESOURCE");
245 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_GET_VF_RESOURCES,
246 (uint8_t *)hw->vf_res,
247 ICE_DCF_VF_RES_BUF_SZ, NULL);
249 PMD_DRV_LOG(ERR, "Failed to get response of OP_GET_VF_RESOURCE");
253 iavf_vf_parse_hw_config(&hw->avf, hw->vf_res);
256 for (i = 0; i < hw->vf_res->num_vsis; i++) {
257 if (hw->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
258 hw->vsi_res = &hw->vf_res->vsi_res[i];
262 PMD_DRV_LOG(ERR, "no LAN VSI found");
266 hw->vsi_id = hw->vsi_res->vsi_id;
267 PMD_DRV_LOG(DEBUG, "VSI ID is %u", hw->vsi_id);
273 ice_dcf_mode_disable(struct ice_dcf_hw *hw)
277 err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_DCF_DISABLE,
280 PMD_DRV_LOG(ERR, "Failed to send msg OP_DCF_DISABLE");
284 err = ice_dcf_recv_cmd_rsp_no_irq(hw, VIRTCHNL_OP_DCF_DISABLE,
285 hw->arq_buf, ICE_DCF_AQ_BUF_SZ, NULL);
288 "Failed to get response of OP_DCF_DISABLE %d",
297 ice_dcf_check_reset_done(struct ice_dcf_hw *hw)
299 #define ICE_DCF_RESET_WAIT_CNT 50
300 struct iavf_hw *avf = &hw->avf;
303 for (i = 0; i < ICE_DCF_RESET_WAIT_CNT; i++) {
304 reset = IAVF_READ_REG(avf, IAVF_VFGEN_RSTAT) &
305 IAVF_VFGEN_RSTAT_VFR_STATE_MASK;
306 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT;
308 if (reset == VIRTCHNL_VFR_VFACTIVE ||
309 reset == VIRTCHNL_VFR_COMPLETED)
315 if (i >= ICE_DCF_RESET_WAIT_CNT)
322 ice_dcf_enable_irq0(struct ice_dcf_hw *hw)
324 struct iavf_hw *avf = &hw->avf;
326 /* Enable admin queue interrupt trigger */
327 IAVF_WRITE_REG(avf, IAVF_VFINT_ICR0_ENA1,
328 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK);
329 IAVF_WRITE_REG(avf, IAVF_VFINT_DYN_CTL01,
330 IAVF_VFINT_DYN_CTL01_INTENA_MASK |
331 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK |
332 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK);
334 IAVF_WRITE_FLUSH(avf);
338 ice_dcf_disable_irq0(struct ice_dcf_hw *hw)
340 struct iavf_hw *avf = &hw->avf;
342 /* Disable all interrupt types */
343 IAVF_WRITE_REG(avf, IAVF_VFINT_ICR0_ENA1, 0);
344 IAVF_WRITE_REG(avf, IAVF_VFINT_DYN_CTL01,
345 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK);
347 IAVF_WRITE_FLUSH(avf);
351 ice_dcf_dev_interrupt_handler(void *param)
353 struct ice_dcf_hw *hw = param;
355 ice_dcf_disable_irq0(hw);
357 ice_dcf_handle_virtchnl_msg(hw);
359 ice_dcf_enable_irq0(hw);
363 ice_dcf_execute_virtchnl_cmd(struct ice_dcf_hw *hw,
364 struct dcf_virtchnl_cmd *cmd)
369 if ((cmd->req_msg && !cmd->req_msglen) ||
370 (!cmd->req_msg && cmd->req_msglen) ||
371 (cmd->rsp_msgbuf && !cmd->rsp_buflen) ||
372 (!cmd->rsp_msgbuf && cmd->rsp_buflen))
375 rte_spinlock_lock(&hw->vc_cmd_send_lock);
376 ice_dcf_vc_cmd_set(hw, cmd);
378 err = ice_dcf_vc_cmd_send(hw, cmd);
380 PMD_DRV_LOG(ERR, "fail to send cmd %d", cmd->v_op);
388 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
389 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
391 if (cmd->v_ret != IAVF_SUCCESS) {
394 "No response (%d times) or return failure (%d) for cmd %d",
395 i, cmd->v_ret, cmd->v_op);
399 ice_dcf_aq_cmd_clear(hw, cmd);
400 rte_spinlock_unlock(&hw->vc_cmd_send_lock);
405 ice_dcf_send_aq_cmd(void *dcf_hw, struct ice_aq_desc *desc,
406 void *buf, uint16_t buf_size)
408 struct dcf_virtchnl_cmd desc_cmd, buff_cmd;
409 struct ice_dcf_hw *hw = dcf_hw;
413 if ((buf && !buf_size) || (!buf && buf_size) ||
414 buf_size > ICE_DCF_AQ_BUF_SZ)
417 desc_cmd.v_op = VIRTCHNL_OP_DCF_CMD_DESC;
418 desc_cmd.req_msglen = sizeof(*desc);
419 desc_cmd.req_msg = (uint8_t *)desc;
420 desc_cmd.rsp_buflen = sizeof(*desc);
421 desc_cmd.rsp_msgbuf = (uint8_t *)desc;
424 return ice_dcf_execute_virtchnl_cmd(hw, &desc_cmd);
426 desc->flags |= rte_cpu_to_le_16(ICE_AQ_FLAG_BUF);
428 buff_cmd.v_op = VIRTCHNL_OP_DCF_CMD_BUFF;
429 buff_cmd.req_msglen = buf_size;
430 buff_cmd.req_msg = buf;
431 buff_cmd.rsp_buflen = buf_size;
432 buff_cmd.rsp_msgbuf = buf;
434 rte_spinlock_lock(&hw->vc_cmd_send_lock);
435 ice_dcf_vc_cmd_set(hw, &desc_cmd);
436 ice_dcf_vc_cmd_set(hw, &buff_cmd);
438 if (ice_dcf_vc_cmd_send(hw, &desc_cmd) ||
439 ice_dcf_vc_cmd_send(hw, &buff_cmd)) {
441 PMD_DRV_LOG(ERR, "fail to send OP_DCF_CMD_DESC/BUFF");
446 if ((!desc_cmd.pending && !buff_cmd.pending) ||
447 (!desc_cmd.pending && desc_cmd.v_ret != IAVF_SUCCESS) ||
448 (!buff_cmd.pending && buff_cmd.v_ret != IAVF_SUCCESS))
451 rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
452 } while (i++ < ICE_DCF_ARQ_MAX_RETRIES);
454 if (desc_cmd.v_ret != IAVF_SUCCESS || buff_cmd.v_ret != IAVF_SUCCESS) {
457 "No response (%d times) or return failure (desc: %d / buff: %d)",
458 i, desc_cmd.v_ret, buff_cmd.v_ret);
462 ice_dcf_aq_cmd_clear(hw, &desc_cmd);
463 ice_dcf_aq_cmd_clear(hw, &buff_cmd);
464 rte_spinlock_unlock(&hw->vc_cmd_send_lock);
470 ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
472 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
475 hw->avf.hw_addr = pci_dev->mem_resource[0].addr;
478 hw->avf.bus.bus_id = pci_dev->addr.bus;
479 hw->avf.bus.device = pci_dev->addr.devid;
480 hw->avf.bus.func = pci_dev->addr.function;
482 hw->avf.device_id = pci_dev->id.device_id;
483 hw->avf.vendor_id = pci_dev->id.vendor_id;
484 hw->avf.subsystem_device_id = pci_dev->id.subsystem_device_id;
485 hw->avf.subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
487 hw->avf.aq.num_arq_entries = ICE_DCF_AQ_LEN;
488 hw->avf.aq.num_asq_entries = ICE_DCF_AQ_LEN;
489 hw->avf.aq.arq_buf_size = ICE_DCF_AQ_BUF_SZ;
490 hw->avf.aq.asq_buf_size = ICE_DCF_AQ_BUF_SZ;
492 rte_spinlock_init(&hw->vc_cmd_send_lock);
493 rte_spinlock_init(&hw->vc_cmd_queue_lock);
494 TAILQ_INIT(&hw->vc_cmd_queue);
496 hw->arq_buf = rte_zmalloc("arq_buf", ICE_DCF_AQ_BUF_SZ, 0);
497 if (hw->arq_buf == NULL) {
498 PMD_INIT_LOG(ERR, "unable to allocate AdminQ buffer memory");
502 ret = iavf_set_mac_type(&hw->avf);
504 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", ret);
508 ret = ice_dcf_check_reset_done(hw);
510 PMD_INIT_LOG(ERR, "VF is still resetting");
514 ret = iavf_init_adminq(&hw->avf);
516 PMD_INIT_LOG(ERR, "init_adminq failed: %d", ret);
520 if (ice_dcf_init_check_api_version(hw)) {
521 PMD_INIT_LOG(ERR, "check_api version failed");
525 hw->vf_res = rte_zmalloc("vf_res", ICE_DCF_VF_RES_BUF_SZ, 0);
526 if (hw->vf_res == NULL) {
527 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
531 if (ice_dcf_get_vf_resource(hw)) {
532 PMD_INIT_LOG(ERR, "Failed to get VF resource");
536 rte_intr_callback_register(&pci_dev->intr_handle,
537 ice_dcf_dev_interrupt_handler, hw);
538 rte_intr_enable(&pci_dev->intr_handle);
539 ice_dcf_enable_irq0(hw);
544 rte_free(hw->vf_res);
546 iavf_shutdown_adminq(&hw->avf);
548 rte_free(hw->arq_buf);
554 ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
556 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
557 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
559 ice_dcf_disable_irq0(hw);
560 rte_intr_disable(intr_handle);
561 rte_intr_callback_unregister(intr_handle,
562 ice_dcf_dev_interrupt_handler, hw);
564 ice_dcf_mode_disable(hw);
565 iavf_shutdown_adminq(&hw->avf);
567 rte_free(hw->arq_buf);
568 rte_free(hw->vf_res);