1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019 Intel Corporation
8 #include <rte_hash_crc.h>
9 #include "base/ice_fdir.h"
10 #include "base/ice_flow.h"
11 #include "base/ice_type.h"
12 #include "ice_ethdev.h"
14 #include "ice_generic_flow.h"
16 #define ICE_FDIR_IPV6_TC_OFFSET 20
17 #define ICE_IPV6_TC_MASK (0xFF << ICE_FDIR_IPV6_TC_OFFSET)
19 #define ICE_FDIR_MAX_QREGION_SIZE 128
21 #define ICE_FDIR_INSET_ETH (\
22 ICE_INSET_DMAC | ICE_INSET_SMAC | ICE_INSET_ETHERTYPE)
24 #define ICE_FDIR_INSET_ETH_IPV4 (\
25 ICE_FDIR_INSET_ETH | \
26 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_IPV4_TOS | \
27 ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_PROTO | ICE_INSET_IPV4_PKID)
29 #define ICE_FDIR_INSET_ETH_IPV4_UDP (\
30 ICE_FDIR_INSET_ETH_IPV4 | \
31 ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
33 #define ICE_FDIR_INSET_ETH_IPV4_TCP (\
34 ICE_FDIR_INSET_ETH_IPV4 | \
35 ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
37 #define ICE_FDIR_INSET_ETH_IPV4_SCTP (\
38 ICE_FDIR_INSET_ETH_IPV4 | \
39 ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
41 #define ICE_FDIR_INSET_ETH_IPV6 (\
43 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | ICE_INSET_IPV6_TC | \
44 ICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_NEXT_HDR | \
47 #define ICE_FDIR_INSET_ETH_IPV6_UDP (\
48 ICE_FDIR_INSET_ETH_IPV6 | \
49 ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
51 #define ICE_FDIR_INSET_ETH_IPV6_TCP (\
52 ICE_FDIR_INSET_ETH_IPV6 | \
53 ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
55 #define ICE_FDIR_INSET_ETH_IPV6_SCTP (\
56 ICE_FDIR_INSET_ETH_IPV6 | \
57 ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
59 #define ICE_FDIR_INSET_IPV4 (\
60 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
63 #define ICE_FDIR_INSET_IPV4_TCP (\
64 ICE_FDIR_INSET_IPV4 | \
65 ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
67 #define ICE_FDIR_INSET_IPV4_UDP (\
68 ICE_FDIR_INSET_IPV4 | \
69 ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
71 #define ICE_FDIR_INSET_IPV4_SCTP (\
72 ICE_FDIR_INSET_IPV4 | \
73 ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
75 #define ICE_FDIR_INSET_ETH_IPV4_VXLAN (\
76 ICE_FDIR_INSET_ETH | ICE_FDIR_INSET_ETH_IPV4 | \
79 #define ICE_FDIR_INSET_IPV4_GTPU (\
80 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_GTPU_TEID)
82 #define ICE_FDIR_INSET_IPV4_GTPU_EH (\
83 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
84 ICE_INSET_GTPU_TEID | ICE_INSET_GTPU_QFI)
86 #define ICE_FDIR_INSET_IPV6_GTPU (\
87 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | ICE_INSET_GTPU_TEID)
89 #define ICE_FDIR_INSET_IPV6_GTPU_EH (\
90 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \
91 ICE_INSET_GTPU_TEID | ICE_INSET_GTPU_QFI)
93 #define ICE_FDIR_INSET_IPV4_ESP (\
94 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
97 #define ICE_FDIR_INSET_IPV6_ESP (\
98 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \
101 #define ICE_FDIR_INSET_IPV4_NATT_ESP (\
102 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
103 ICE_INSET_NAT_T_ESP_SPI)
105 #define ICE_FDIR_INSET_IPV6_NATT_ESP (\
106 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \
107 ICE_INSET_NAT_T_ESP_SPI)
109 static struct ice_pattern_match_item ice_fdir_pattern_list[] = {
110 {pattern_raw, ICE_INSET_NONE, ICE_INSET_NONE, ICE_INSET_NONE},
111 {pattern_ethertype, ICE_FDIR_INSET_ETH, ICE_INSET_NONE, ICE_INSET_NONE},
112 {pattern_eth_ipv4, ICE_FDIR_INSET_ETH_IPV4, ICE_INSET_NONE, ICE_INSET_NONE},
113 {pattern_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE, ICE_INSET_NONE},
114 {pattern_eth_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_TCP, ICE_INSET_NONE, ICE_INSET_NONE},
115 {pattern_eth_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_SCTP, ICE_INSET_NONE, ICE_INSET_NONE},
116 {pattern_eth_ipv6, ICE_FDIR_INSET_ETH_IPV6, ICE_INSET_NONE, ICE_INSET_NONE},
117 {pattern_eth_ipv6_frag_ext, ICE_FDIR_INSET_ETH_IPV6, ICE_INSET_NONE, ICE_INSET_NONE},
118 {pattern_eth_ipv6_udp, ICE_FDIR_INSET_ETH_IPV6_UDP, ICE_INSET_NONE, ICE_INSET_NONE},
119 {pattern_eth_ipv6_tcp, ICE_FDIR_INSET_ETH_IPV6_TCP, ICE_INSET_NONE, ICE_INSET_NONE},
120 {pattern_eth_ipv6_sctp, ICE_FDIR_INSET_ETH_IPV6_SCTP, ICE_INSET_NONE, ICE_INSET_NONE},
121 {pattern_eth_ipv4_esp, ICE_FDIR_INSET_IPV4_ESP, ICE_INSET_NONE, ICE_INSET_NONE},
122 {pattern_eth_ipv4_udp_esp, ICE_FDIR_INSET_IPV4_NATT_ESP, ICE_INSET_NONE, ICE_INSET_NONE},
123 {pattern_eth_ipv6_esp, ICE_FDIR_INSET_IPV6_ESP, ICE_INSET_NONE, ICE_INSET_NONE},
124 {pattern_eth_ipv6_udp_esp, ICE_FDIR_INSET_IPV6_NATT_ESP, ICE_INSET_NONE, ICE_INSET_NONE},
125 {pattern_eth_ipv4_udp_vxlan_ipv4, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_IPV4, ICE_INSET_NONE},
126 {pattern_eth_ipv4_udp_vxlan_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_IPV4_UDP, ICE_INSET_NONE},
127 {pattern_eth_ipv4_udp_vxlan_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_IPV4_TCP, ICE_INSET_NONE},
128 {pattern_eth_ipv4_udp_vxlan_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_IPV4_SCTP, ICE_INSET_NONE},
129 {pattern_eth_ipv4_udp_vxlan_eth_ipv4, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_ETH_IPV4, ICE_INSET_NONE},
130 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE},
131 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_ETH_IPV4_TCP, ICE_INSET_NONE},
132 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_ETH_IPV4_SCTP, ICE_INSET_NONE},
133 /* duplicated GTPU input set in 3rd column to align with shared code behavior. Ideally, only put GTPU field in 2nd column. */
134 {pattern_eth_ipv4_gtpu, ICE_FDIR_INSET_IPV4_GTPU, ICE_FDIR_INSET_IPV4_GTPU, ICE_INSET_NONE},
135 {pattern_eth_ipv4_gtpu_eh, ICE_FDIR_INSET_IPV4_GTPU_EH, ICE_FDIR_INSET_IPV4_GTPU_EH, ICE_INSET_NONE},
136 {pattern_eth_ipv6_gtpu, ICE_FDIR_INSET_IPV6_GTPU, ICE_FDIR_INSET_IPV6_GTPU, ICE_INSET_NONE},
137 {pattern_eth_ipv6_gtpu_eh, ICE_FDIR_INSET_IPV6_GTPU_EH, ICE_FDIR_INSET_IPV6_GTPU_EH, ICE_INSET_NONE},
140 static struct ice_flow_parser ice_fdir_parser;
143 ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type);
145 static const struct rte_memzone *
146 ice_memzone_reserve(const char *name, uint32_t len, int socket_id)
148 const struct rte_memzone *mz;
150 mz = rte_memzone_lookup(name);
154 return rte_memzone_reserve_aligned(name, len, socket_id,
155 RTE_MEMZONE_IOVA_CONTIG,
156 ICE_RING_BASE_ALIGN);
159 #define ICE_FDIR_MZ_NAME "FDIR_MEMZONE"
162 ice_fdir_prof_alloc(struct ice_hw *hw)
164 enum ice_fltr_ptype ptype, fltr_ptype;
166 if (!hw->fdir_prof) {
167 hw->fdir_prof = (struct ice_fd_hw_prof **)
168 ice_malloc(hw, ICE_FLTR_PTYPE_MAX *
169 sizeof(*hw->fdir_prof));
173 for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
174 ptype < ICE_FLTR_PTYPE_MAX;
176 if (!hw->fdir_prof[ptype]) {
177 hw->fdir_prof[ptype] = (struct ice_fd_hw_prof *)
178 ice_malloc(hw, sizeof(**hw->fdir_prof));
179 if (!hw->fdir_prof[ptype])
186 for (fltr_ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
189 rte_free(hw->fdir_prof[fltr_ptype]);
190 hw->fdir_prof[fltr_ptype] = NULL;
193 rte_free(hw->fdir_prof);
194 hw->fdir_prof = NULL;
200 ice_fdir_counter_pool_add(__rte_unused struct ice_pf *pf,
201 struct ice_fdir_counter_pool_container *container,
202 uint32_t index_start,
205 struct ice_fdir_counter_pool *pool;
209 pool = rte_zmalloc("ice_fdir_counter_pool",
211 sizeof(struct ice_fdir_counter) * len,
215 "Failed to allocate memory for fdir counter pool");
219 TAILQ_INIT(&pool->counter_list);
220 TAILQ_INSERT_TAIL(&container->pool_list, pool, next);
222 for (i = 0; i < len; i++) {
223 struct ice_fdir_counter *counter = &pool->counters[i];
225 counter->hw_index = index_start + i;
226 TAILQ_INSERT_TAIL(&pool->counter_list, counter, next);
229 if (container->index_free == ICE_FDIR_COUNTER_MAX_POOL_SIZE) {
230 PMD_INIT_LOG(ERR, "FDIR counter pool is full");
235 container->pools[container->index_free++] = pool;
244 ice_fdir_counter_init(struct ice_pf *pf)
246 struct ice_hw *hw = ICE_PF_TO_HW(pf);
247 struct ice_fdir_info *fdir_info = &pf->fdir;
248 struct ice_fdir_counter_pool_container *container =
250 uint32_t cnt_index, len;
253 TAILQ_INIT(&container->pool_list);
255 cnt_index = ICE_FDIR_COUNTER_INDEX(hw->fd_ctr_base);
256 len = ICE_FDIR_COUNTERS_PER_BLOCK;
258 ret = ice_fdir_counter_pool_add(pf, container, cnt_index, len);
260 PMD_INIT_LOG(ERR, "Failed to add fdir pool to container");
268 ice_fdir_counter_release(struct ice_pf *pf)
270 struct ice_fdir_info *fdir_info = &pf->fdir;
271 struct ice_fdir_counter_pool_container *container =
275 for (i = 0; i < container->index_free; i++) {
276 rte_free(container->pools[i]);
277 container->pools[i] = NULL;
280 TAILQ_INIT(&container->pool_list);
281 container->index_free = 0;
286 static struct ice_fdir_counter *
287 ice_fdir_counter_shared_search(struct ice_fdir_counter_pool_container
291 struct ice_fdir_counter_pool *pool;
292 struct ice_fdir_counter *counter;
295 TAILQ_FOREACH(pool, &container->pool_list, next) {
296 for (i = 0; i < ICE_FDIR_COUNTERS_PER_BLOCK; i++) {
297 counter = &pool->counters[i];
299 if (counter->shared &&
309 static struct ice_fdir_counter *
310 ice_fdir_counter_alloc(struct ice_pf *pf, uint32_t shared, uint32_t id)
312 struct ice_hw *hw = ICE_PF_TO_HW(pf);
313 struct ice_fdir_info *fdir_info = &pf->fdir;
314 struct ice_fdir_counter_pool_container *container =
316 struct ice_fdir_counter_pool *pool = NULL;
317 struct ice_fdir_counter *counter_free = NULL;
320 counter_free = ice_fdir_counter_shared_search(container, id);
322 if (counter_free->ref_cnt + 1 == 0) {
326 counter_free->ref_cnt++;
331 TAILQ_FOREACH(pool, &container->pool_list, next) {
332 counter_free = TAILQ_FIRST(&pool->counter_list);
339 PMD_DRV_LOG(ERR, "No free counter found\n");
343 counter_free->shared = shared;
344 counter_free->id = id;
345 counter_free->ref_cnt = 1;
346 counter_free->pool = pool;
348 /* reset statistic counter value */
349 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0H(counter_free->hw_index), 0);
350 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0L(counter_free->hw_index), 0);
352 TAILQ_REMOVE(&pool->counter_list, counter_free, next);
353 if (TAILQ_EMPTY(&pool->counter_list)) {
354 TAILQ_REMOVE(&container->pool_list, pool, next);
355 TAILQ_INSERT_TAIL(&container->pool_list, pool, next);
362 ice_fdir_counter_free(__rte_unused struct ice_pf *pf,
363 struct ice_fdir_counter *counter)
368 if (--counter->ref_cnt == 0) {
369 struct ice_fdir_counter_pool *pool = counter->pool;
371 TAILQ_INSERT_TAIL(&pool->counter_list, counter, next);
376 ice_fdir_init_filter_list(struct ice_pf *pf)
378 struct rte_eth_dev *dev = &rte_eth_devices[pf->dev_data->port_id];
379 struct ice_fdir_info *fdir_info = &pf->fdir;
380 char fdir_hash_name[RTE_HASH_NAMESIZE];
383 struct rte_hash_parameters fdir_hash_params = {
384 .name = fdir_hash_name,
385 .entries = ICE_MAX_FDIR_FILTER_NUM,
386 .key_len = sizeof(struct ice_fdir_fltr_pattern),
387 .hash_func = rte_hash_crc,
388 .hash_func_init_val = 0,
389 .socket_id = rte_socket_id(),
390 .extra_flag = RTE_HASH_EXTRA_FLAGS_EXT_TABLE,
393 /* Initialize hash */
394 snprintf(fdir_hash_name, RTE_HASH_NAMESIZE,
395 "fdir_%s", dev->device->name);
396 fdir_info->hash_table = rte_hash_create(&fdir_hash_params);
397 if (!fdir_info->hash_table) {
398 PMD_INIT_LOG(ERR, "Failed to create fdir hash table!");
401 fdir_info->hash_map = rte_zmalloc("ice_fdir_hash_map",
402 sizeof(*fdir_info->hash_map) *
403 ICE_MAX_FDIR_FILTER_NUM,
405 if (!fdir_info->hash_map) {
407 "Failed to allocate memory for fdir hash map!");
409 goto err_fdir_hash_map_alloc;
413 err_fdir_hash_map_alloc:
414 rte_hash_free(fdir_info->hash_table);
420 ice_fdir_release_filter_list(struct ice_pf *pf)
422 struct ice_fdir_info *fdir_info = &pf->fdir;
424 rte_free(fdir_info->hash_map);
425 rte_hash_free(fdir_info->hash_table);
427 fdir_info->hash_map = NULL;
428 fdir_info->hash_table = NULL;
432 * ice_fdir_setup - reserve and initialize the Flow Director resources
433 * @pf: board private structure
436 ice_fdir_setup(struct ice_pf *pf)
438 struct rte_eth_dev *eth_dev = &rte_eth_devices[pf->dev_data->port_id];
439 struct ice_hw *hw = ICE_PF_TO_HW(pf);
440 const struct rte_memzone *mz = NULL;
441 char z_name[RTE_MEMZONE_NAMESIZE];
443 int err = ICE_SUCCESS;
445 if ((pf->flags & ICE_FLAG_FDIR) == 0) {
446 PMD_INIT_LOG(ERR, "HW doesn't support FDIR");
450 PMD_DRV_LOG(INFO, "FDIR HW Capabilities: fd_fltr_guar = %u,"
451 " fd_fltr_best_effort = %u.",
452 hw->func_caps.fd_fltr_guar,
453 hw->func_caps.fd_fltr_best_effort);
455 if (pf->fdir.fdir_vsi) {
456 PMD_DRV_LOG(INFO, "FDIR initialization has been done.");
460 /* make new FDIR VSI */
461 vsi = ice_setup_vsi(pf, ICE_VSI_CTRL);
463 PMD_DRV_LOG(ERR, "Couldn't create FDIR VSI.");
466 pf->fdir.fdir_vsi = vsi;
468 err = ice_fdir_init_filter_list(pf);
470 PMD_DRV_LOG(ERR, "Failed to init FDIR filter list.");
474 err = ice_fdir_counter_init(pf);
476 PMD_DRV_LOG(ERR, "Failed to init FDIR counter.");
480 /*Fdir tx queue setup*/
481 err = ice_fdir_setup_tx_resources(pf);
483 PMD_DRV_LOG(ERR, "Failed to setup FDIR TX resources.");
487 /*Fdir rx queue setup*/
488 err = ice_fdir_setup_rx_resources(pf);
490 PMD_DRV_LOG(ERR, "Failed to setup FDIR RX resources.");
494 err = ice_fdir_tx_queue_start(eth_dev, pf->fdir.txq->queue_id);
496 PMD_DRV_LOG(ERR, "Failed to start FDIR TX queue.");
500 err = ice_fdir_rx_queue_start(eth_dev, pf->fdir.rxq->queue_id);
502 PMD_DRV_LOG(ERR, "Failed to start FDIR RX queue.");
506 /* Enable FDIR MSIX interrupt */
507 vsi->nb_used_qps = 1;
508 ice_vsi_queues_bind_intr(vsi);
509 ice_vsi_enable_queues_intr(vsi);
511 /* reserve memory for the fdir programming packet */
512 snprintf(z_name, sizeof(z_name), "ICE_%s_%d",
514 eth_dev->data->port_id);
515 mz = ice_memzone_reserve(z_name, ICE_FDIR_PKT_LEN, SOCKET_ID_ANY);
517 PMD_DRV_LOG(ERR, "Cannot init memzone for "
518 "flow director program packet.");
522 pf->fdir.prg_pkt = mz->addr;
523 pf->fdir.dma_addr = mz->iova;
526 err = ice_fdir_prof_alloc(hw);
528 PMD_DRV_LOG(ERR, "Cannot allocate memory for "
529 "flow director profile.");
534 PMD_DRV_LOG(INFO, "FDIR setup successfully, with programming queue %u.",
539 rte_memzone_free(pf->fdir.mz);
542 ice_rx_queue_release(pf->fdir.rxq);
545 ice_tx_queue_release(pf->fdir.txq);
548 ice_release_vsi(vsi);
549 pf->fdir.fdir_vsi = NULL;
554 ice_fdir_prof_free(struct ice_hw *hw)
556 enum ice_fltr_ptype ptype;
558 for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
559 ptype < ICE_FLTR_PTYPE_MAX;
561 rte_free(hw->fdir_prof[ptype]);
562 hw->fdir_prof[ptype] = NULL;
565 rte_free(hw->fdir_prof);
566 hw->fdir_prof = NULL;
569 /* Remove a profile for some filter type */
571 ice_fdir_prof_rm(struct ice_pf *pf, enum ice_fltr_ptype ptype, bool is_tunnel)
573 struct ice_hw *hw = ICE_PF_TO_HW(pf);
574 struct ice_fd_hw_prof *hw_prof;
579 if (!hw->fdir_prof || !hw->fdir_prof[ptype])
582 hw_prof = hw->fdir_prof[ptype];
584 prof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;
585 for (i = 0; i < pf->hw_prof_cnt[ptype][is_tunnel]; i++) {
586 if (hw_prof->entry_h[i][is_tunnel]) {
587 vsi_num = ice_get_hw_vsi_num(hw,
589 ice_rem_prof_id_flow(hw, ICE_BLK_FD,
591 ice_flow_rem_entry(hw, ICE_BLK_FD,
592 hw_prof->entry_h[i][is_tunnel]);
593 hw_prof->entry_h[i][is_tunnel] = 0;
596 ice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);
597 rte_free(hw_prof->fdir_seg[is_tunnel]);
598 hw_prof->fdir_seg[is_tunnel] = NULL;
600 for (i = 0; i < hw_prof->cnt; i++)
601 hw_prof->vsi_h[i] = 0;
602 pf->hw_prof_cnt[ptype][is_tunnel] = 0;
605 /* Remove all created profiles */
607 ice_fdir_prof_rm_all(struct ice_pf *pf)
609 enum ice_fltr_ptype ptype;
611 for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
612 ptype < ICE_FLTR_PTYPE_MAX;
614 ice_fdir_prof_rm(pf, ptype, false);
615 ice_fdir_prof_rm(pf, ptype, true);
620 * ice_fdir_teardown - release the Flow Director resources
621 * @pf: board private structure
624 ice_fdir_teardown(struct ice_pf *pf)
626 struct rte_eth_dev *eth_dev = &rte_eth_devices[pf->dev_data->port_id];
627 struct ice_hw *hw = ICE_PF_TO_HW(pf);
631 vsi = pf->fdir.fdir_vsi;
635 ice_vsi_disable_queues_intr(vsi);
637 err = ice_fdir_tx_queue_stop(eth_dev, pf->fdir.txq->queue_id);
639 PMD_DRV_LOG(ERR, "Failed to stop TX queue.");
641 err = ice_fdir_rx_queue_stop(eth_dev, pf->fdir.rxq->queue_id);
643 PMD_DRV_LOG(ERR, "Failed to stop RX queue.");
645 err = ice_fdir_counter_release(pf);
647 PMD_DRV_LOG(ERR, "Failed to release FDIR counter resource.");
649 ice_fdir_release_filter_list(pf);
651 ice_tx_queue_release(pf->fdir.txq);
653 ice_rx_queue_release(pf->fdir.rxq);
655 ice_fdir_prof_rm_all(pf);
656 ice_fdir_prof_free(hw);
657 ice_release_vsi(vsi);
658 pf->fdir.fdir_vsi = NULL;
661 err = rte_memzone_free(pf->fdir.mz);
664 PMD_DRV_LOG(ERR, "Failed to free FDIR memezone.");
669 ice_fdir_cur_prof_conflict(struct ice_pf *pf,
670 enum ice_fltr_ptype ptype,
671 struct ice_flow_seg_info *seg,
674 struct ice_hw *hw = ICE_PF_TO_HW(pf);
675 struct ice_flow_seg_info *ori_seg;
676 struct ice_fd_hw_prof *hw_prof;
678 hw_prof = hw->fdir_prof[ptype];
679 ori_seg = hw_prof->fdir_seg[is_tunnel];
681 /* profile does not exist */
685 /* if no input set conflict, return -EEXIST */
686 if ((!is_tunnel && !memcmp(ori_seg, seg, sizeof(*seg))) ||
687 (is_tunnel && !memcmp(&ori_seg[1], &seg[1], sizeof(*seg)))) {
688 PMD_DRV_LOG(DEBUG, "Profile already exists for flow type %d.",
693 /* a rule with input set conflict already exist, so give up */
694 if (pf->fdir_fltr_cnt[ptype][is_tunnel]) {
695 PMD_DRV_LOG(DEBUG, "Failed to create profile for flow type %d due to conflict with existing rule.",
700 /* it's safe to delete an empty profile */
701 ice_fdir_prof_rm(pf, ptype, is_tunnel);
706 ice_fdir_prof_resolve_conflict(struct ice_pf *pf,
707 enum ice_fltr_ptype ptype,
710 struct ice_hw *hw = ICE_PF_TO_HW(pf);
711 struct ice_fd_hw_prof *hw_prof;
712 struct ice_flow_seg_info *seg;
714 hw_prof = hw->fdir_prof[ptype];
715 seg = hw_prof->fdir_seg[is_tunnel];
717 /* profile does not exist */
721 /* profile exists and rule exists, fail to resolve the conflict */
722 if (pf->fdir_fltr_cnt[ptype][is_tunnel] != 0)
725 /* it's safe to delete an empty profile */
726 ice_fdir_prof_rm(pf, ptype, is_tunnel);
732 ice_fdir_cross_prof_conflict(struct ice_pf *pf,
733 enum ice_fltr_ptype ptype,
736 enum ice_fltr_ptype cflct_ptype;
740 case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
741 case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
742 case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
743 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
744 if (!ice_fdir_prof_resolve_conflict
745 (pf, cflct_ptype, is_tunnel))
748 case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
749 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
750 if (!ice_fdir_prof_resolve_conflict
751 (pf, cflct_ptype, is_tunnel))
753 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
754 if (!ice_fdir_prof_resolve_conflict
755 (pf, cflct_ptype, is_tunnel))
757 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
758 if (!ice_fdir_prof_resolve_conflict
759 (pf, cflct_ptype, is_tunnel))
763 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP:
764 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
765 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP:
766 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
767 if (!ice_fdir_prof_resolve_conflict
768 (pf, cflct_ptype, is_tunnel))
771 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
772 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP;
773 if (!ice_fdir_prof_resolve_conflict
774 (pf, cflct_ptype, is_tunnel))
776 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP;
777 if (!ice_fdir_prof_resolve_conflict
778 (pf, cflct_ptype, is_tunnel))
780 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP;
781 if (!ice_fdir_prof_resolve_conflict
782 (pf, cflct_ptype, is_tunnel))
786 case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
787 case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
788 case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
789 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
790 if (!ice_fdir_prof_resolve_conflict
791 (pf, cflct_ptype, is_tunnel))
794 case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
795 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
796 if (!ice_fdir_prof_resolve_conflict
797 (pf, cflct_ptype, is_tunnel))
799 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
800 if (!ice_fdir_prof_resolve_conflict
801 (pf, cflct_ptype, is_tunnel))
803 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
804 if (!ice_fdir_prof_resolve_conflict
805 (pf, cflct_ptype, is_tunnel))
808 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_UDP:
809 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_TCP:
810 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_SCTP:
811 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_OTHER;
812 if (!ice_fdir_prof_resolve_conflict
813 (pf, cflct_ptype, is_tunnel))
816 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_OTHER:
817 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_UDP;
818 if (!ice_fdir_prof_resolve_conflict
819 (pf, cflct_ptype, is_tunnel))
821 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_TCP;
822 if (!ice_fdir_prof_resolve_conflict
823 (pf, cflct_ptype, is_tunnel))
825 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_SCTP;
826 if (!ice_fdir_prof_resolve_conflict
827 (pf, cflct_ptype, is_tunnel))
835 PMD_DRV_LOG(DEBUG, "Failed to create profile for flow type %d due to conflict with existing rule of flow type %d.",
841 ice_fdir_hw_tbl_conf(struct ice_pf *pf, struct ice_vsi *vsi,
842 struct ice_vsi *ctrl_vsi,
843 struct ice_flow_seg_info *seg,
844 enum ice_fltr_ptype ptype,
847 struct ice_hw *hw = ICE_PF_TO_HW(pf);
848 enum ice_flow_dir dir = ICE_FLOW_RX;
849 struct ice_fd_hw_prof *hw_prof;
850 struct ice_flow_prof *prof;
851 uint64_t entry_1 = 0;
852 uint64_t entry_2 = 0;
857 /* check if have input set conflict on current profile. */
858 ret = ice_fdir_cur_prof_conflict(pf, ptype, seg, is_tunnel);
862 /* check if the profile is conflict with other profile. */
863 ret = ice_fdir_cross_prof_conflict(pf, ptype, is_tunnel);
867 prof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;
868 ret = ice_flow_add_prof(hw, ICE_BLK_FD, dir, prof_id, seg,
869 (is_tunnel) ? 2 : 1, NULL, 0, &prof);
872 ret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,
873 vsi->idx, ICE_FLOW_PRIO_NORMAL,
874 seg, NULL, 0, &entry_1);
876 PMD_DRV_LOG(ERR, "Failed to add main VSI flow entry for %d.",
880 ret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,
881 ctrl_vsi->idx, ICE_FLOW_PRIO_NORMAL,
882 seg, NULL, 0, &entry_2);
884 PMD_DRV_LOG(ERR, "Failed to add control VSI flow entry for %d.",
889 hw_prof = hw->fdir_prof[ptype];
890 pf->hw_prof_cnt[ptype][is_tunnel] = 0;
892 hw_prof->fdir_seg[is_tunnel] = seg;
893 hw_prof->vsi_h[hw_prof->cnt] = vsi->idx;
894 hw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_1;
895 pf->hw_prof_cnt[ptype][is_tunnel]++;
896 hw_prof->vsi_h[hw_prof->cnt] = ctrl_vsi->idx;
897 hw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_2;
898 pf->hw_prof_cnt[ptype][is_tunnel]++;
903 vsi_num = ice_get_hw_vsi_num(hw, vsi->idx);
904 ice_rem_prof_id_flow(hw, ICE_BLK_FD, vsi_num, prof_id);
905 ice_flow_rem_entry(hw, ICE_BLK_FD, entry_1);
907 ice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);
913 ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field)
917 struct ice_inset_map {
919 enum ice_flow_field fld;
921 static const struct ice_inset_map ice_inset_map[] = {
922 {ICE_INSET_DMAC, ICE_FLOW_FIELD_IDX_ETH_DA},
923 {ICE_INSET_ETHERTYPE, ICE_FLOW_FIELD_IDX_ETH_TYPE},
924 {ICE_INSET_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},
925 {ICE_INSET_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},
926 {ICE_INSET_IPV4_TOS, ICE_FLOW_FIELD_IDX_IPV4_DSCP},
927 {ICE_INSET_IPV4_TTL, ICE_FLOW_FIELD_IDX_IPV4_TTL},
928 {ICE_INSET_IPV4_PROTO, ICE_FLOW_FIELD_IDX_IPV4_PROT},
929 {ICE_INSET_IPV4_PKID, ICE_FLOW_FIELD_IDX_IPV4_ID},
930 {ICE_INSET_IPV6_SRC, ICE_FLOW_FIELD_IDX_IPV6_SA},
931 {ICE_INSET_IPV6_DST, ICE_FLOW_FIELD_IDX_IPV6_DA},
932 {ICE_INSET_IPV6_TC, ICE_FLOW_FIELD_IDX_IPV6_DSCP},
933 {ICE_INSET_IPV6_NEXT_HDR, ICE_FLOW_FIELD_IDX_IPV6_PROT},
934 {ICE_INSET_IPV6_HOP_LIMIT, ICE_FLOW_FIELD_IDX_IPV6_TTL},
935 {ICE_INSET_IPV6_PKID, ICE_FLOW_FIELD_IDX_IPV6_ID},
936 {ICE_INSET_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},
937 {ICE_INSET_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},
938 {ICE_INSET_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},
939 {ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},
940 {ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},
941 {ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},
942 {ICE_INSET_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},
943 {ICE_INSET_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},
944 {ICE_INSET_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},
945 {ICE_INSET_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},
946 {ICE_INSET_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},
947 {ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},
948 {ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},
949 {ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},
950 {ICE_INSET_GTPU_TEID, ICE_FLOW_FIELD_IDX_GTPU_IP_TEID},
951 {ICE_INSET_GTPU_QFI, ICE_FLOW_FIELD_IDX_GTPU_EH_QFI},
952 {ICE_INSET_VXLAN_VNI, ICE_FLOW_FIELD_IDX_VXLAN_VNI},
953 {ICE_INSET_ESP_SPI, ICE_FLOW_FIELD_IDX_ESP_SPI},
954 {ICE_INSET_NAT_T_ESP_SPI, ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI},
957 for (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) {
958 if ((inset & ice_inset_map[i].inset) ==
959 ice_inset_map[i].inset)
960 field[j++] = ice_inset_map[i].fld;
965 ice_fdir_input_set_hdrs(enum ice_fltr_ptype flow, struct ice_flow_seg_info *seg)
968 case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
969 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
970 ICE_FLOW_SEG_HDR_IPV4 |
971 ICE_FLOW_SEG_HDR_IPV_OTHER);
973 case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
974 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
975 ICE_FLOW_SEG_HDR_IPV4 |
976 ICE_FLOW_SEG_HDR_IPV_OTHER);
978 case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
979 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
980 ICE_FLOW_SEG_HDR_IPV4 |
981 ICE_FLOW_SEG_HDR_IPV_OTHER);
983 case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
984 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4 |
985 ICE_FLOW_SEG_HDR_IPV_OTHER);
987 case ICE_FLTR_PTYPE_FRAG_IPV4:
988 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4 |
989 ICE_FLOW_SEG_HDR_IPV_FRAG);
991 case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
992 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
993 ICE_FLOW_SEG_HDR_IPV6 |
994 ICE_FLOW_SEG_HDR_IPV_OTHER);
996 case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
997 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
998 ICE_FLOW_SEG_HDR_IPV6 |
999 ICE_FLOW_SEG_HDR_IPV_OTHER);
1001 case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
1002 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
1003 ICE_FLOW_SEG_HDR_IPV6 |
1004 ICE_FLOW_SEG_HDR_IPV_OTHER);
1006 case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
1007 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6 |
1008 ICE_FLOW_SEG_HDR_IPV_OTHER);
1010 case ICE_FLTR_PTYPE_FRAG_IPV6:
1011 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6 |
1012 ICE_FLOW_SEG_HDR_IPV_FRAG);
1014 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_UDP:
1015 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_TCP:
1016 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_SCTP:
1018 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_OTHER:
1019 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV_OTHER);
1021 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU:
1022 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
1023 ICE_FLOW_SEG_HDR_IPV4 |
1024 ICE_FLOW_SEG_HDR_IPV_OTHER);
1026 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH:
1027 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
1028 ICE_FLOW_SEG_HDR_GTPU_IP |
1029 ICE_FLOW_SEG_HDR_IPV4 |
1030 ICE_FLOW_SEG_HDR_IPV_OTHER);
1032 case ICE_FLTR_PTYPE_NONF_IPV6_GTPU:
1033 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
1034 ICE_FLOW_SEG_HDR_IPV6 |
1035 ICE_FLOW_SEG_HDR_IPV_OTHER);
1037 case ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH:
1038 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
1039 ICE_FLOW_SEG_HDR_GTPU_IP |
1040 ICE_FLOW_SEG_HDR_IPV6 |
1041 ICE_FLOW_SEG_HDR_IPV_OTHER);
1043 case ICE_FLTR_PTYPE_NON_IP_L2:
1044 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_ETH_NON_IP);
1046 case ICE_FLTR_PTYPE_NONF_IPV4_ESP:
1047 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_ESP |
1048 ICE_FLOW_SEG_HDR_IPV4 |
1049 ICE_FLOW_SEG_HDR_IPV_OTHER);
1051 case ICE_FLTR_PTYPE_NONF_IPV6_ESP:
1052 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_ESP |
1053 ICE_FLOW_SEG_HDR_IPV6 |
1054 ICE_FLOW_SEG_HDR_IPV_OTHER);
1056 case ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP:
1057 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_NAT_T_ESP |
1058 ICE_FLOW_SEG_HDR_IPV4 |
1059 ICE_FLOW_SEG_HDR_IPV_OTHER);
1061 case ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP:
1062 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_NAT_T_ESP |
1063 ICE_FLOW_SEG_HDR_IPV6 |
1064 ICE_FLOW_SEG_HDR_IPV_OTHER);
1067 PMD_DRV_LOG(ERR, "not supported filter type.");
1073 ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
1074 uint64_t inner_input_set, uint64_t outer_input_set,
1075 enum ice_fdir_tunnel_type ttype)
1077 struct ice_flow_seg_info *seg;
1078 struct ice_flow_seg_info *seg_tun = NULL;
1079 enum ice_flow_field field[ICE_FLOW_FIELD_IDX_MAX];
1084 if (!(inner_input_set | outer_input_set))
1087 seg_tun = (struct ice_flow_seg_info *)
1088 ice_malloc(hw, sizeof(*seg_tun) * ICE_FD_HW_SEG_MAX);
1090 PMD_DRV_LOG(ERR, "No memory can be allocated");
1094 /* use seg_tun[1] to record tunnel inner part */
1095 for (k = 0; k <= ICE_FD_HW_SEG_TUN; k++) {
1097 input_set = (k == ICE_FD_HW_SEG_TUN) ? inner_input_set : outer_input_set;
1101 for (i = 0; i < ICE_FLOW_FIELD_IDX_MAX; i++)
1102 field[i] = ICE_FLOW_FIELD_IDX_MAX;
1104 ice_fdir_input_set_parse(input_set, field);
1106 ice_fdir_input_set_hdrs(flow, seg);
1108 for (i = 0; field[i] != ICE_FLOW_FIELD_IDX_MAX; i++) {
1109 ice_flow_set_fld(seg, field[i],
1110 ICE_FLOW_FLD_OFF_INVAL,
1111 ICE_FLOW_FLD_OFF_INVAL,
1112 ICE_FLOW_FLD_OFF_INVAL, false);
1116 is_tunnel = ice_fdir_is_tunnel_profile(ttype);
1118 ret = ice_fdir_hw_tbl_conf(pf, pf->main_vsi, pf->fdir.fdir_vsi,
1119 seg_tun, flow, is_tunnel);
1123 } else if (ret < 0) {
1125 return (ret == -EEXIST) ? 0 : ret;
1132 ice_fdir_cnt_update(struct ice_pf *pf, enum ice_fltr_ptype ptype,
1133 bool is_tunnel, bool add)
1135 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1138 cnt = (add) ? 1 : -1;
1139 hw->fdir_active_fltr += cnt;
1140 if (ptype == ICE_FLTR_PTYPE_NONF_NONE || ptype >= ICE_FLTR_PTYPE_MAX)
1141 PMD_DRV_LOG(ERR, "Unknown filter type %d", ptype);
1143 pf->fdir_fltr_cnt[ptype][is_tunnel] += cnt;
1147 ice_fdir_init(struct ice_adapter *ad)
1149 struct ice_pf *pf = &ad->pf;
1150 struct ice_flow_parser *parser;
1153 if (ad->hw.dcf_enabled)
1156 ret = ice_fdir_setup(pf);
1160 parser = &ice_fdir_parser;
1162 return ice_register_parser(parser, ad);
1166 ice_fdir_uninit(struct ice_adapter *ad)
1168 struct ice_flow_parser *parser;
1169 struct ice_pf *pf = &ad->pf;
1171 if (ad->hw.dcf_enabled)
1174 parser = &ice_fdir_parser;
1176 ice_unregister_parser(parser, ad);
1178 ice_fdir_teardown(pf);
1182 ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type)
1184 if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN)
1191 ice_fdir_add_del_raw(struct ice_pf *pf,
1192 struct ice_fdir_filter_conf *filter,
1195 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1197 unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
1198 rte_memcpy(pkt, filter->pkt_buf, filter->pkt_len);
1200 struct ice_fltr_desc desc;
1201 memset(&desc, 0, sizeof(desc));
1202 filter->input.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
1203 ice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);
1205 return ice_fdir_programming(pf, &desc);
1209 ice_fdir_add_del_filter(struct ice_pf *pf,
1210 struct ice_fdir_filter_conf *filter,
1213 struct ice_fltr_desc desc;
1214 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1215 unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
1219 filter->input.dest_vsi = pf->main_vsi->idx;
1221 memset(&desc, 0, sizeof(desc));
1222 filter->input.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
1223 ice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);
1225 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1227 memset(pkt, 0, ICE_FDIR_PKT_LEN);
1228 ret = ice_fdir_get_gen_prgm_pkt(hw, &filter->input, pkt, false, is_tun);
1230 PMD_DRV_LOG(ERR, "Generate dummy packet failed");
1234 return ice_fdir_programming(pf, &desc);
1238 ice_fdir_extract_fltr_key(struct ice_fdir_fltr_pattern *key,
1239 struct ice_fdir_filter_conf *filter)
1241 struct ice_fdir_fltr *input = &filter->input;
1242 memset(key, 0, sizeof(*key));
1244 key->flow_type = input->flow_type;
1245 rte_memcpy(&key->ip, &input->ip, sizeof(key->ip));
1246 rte_memcpy(&key->mask, &input->mask, sizeof(key->mask));
1247 rte_memcpy(&key->ext_data, &input->ext_data, sizeof(key->ext_data));
1248 rte_memcpy(&key->ext_mask, &input->ext_mask, sizeof(key->ext_mask));
1250 rte_memcpy(&key->gtpu_data, &input->gtpu_data, sizeof(key->gtpu_data));
1251 rte_memcpy(&key->gtpu_mask, &input->gtpu_mask, sizeof(key->gtpu_mask));
1253 key->tunnel_type = filter->tunnel_type;
1256 /* Check if there exists the flow director filter */
1257 static struct ice_fdir_filter_conf *
1258 ice_fdir_entry_lookup(struct ice_fdir_info *fdir_info,
1259 const struct ice_fdir_fltr_pattern *key)
1263 ret = rte_hash_lookup(fdir_info->hash_table, key);
1267 return fdir_info->hash_map[ret];
1270 /* Add a flow director entry into the SW list */
1272 ice_fdir_entry_insert(struct ice_pf *pf,
1273 struct ice_fdir_filter_conf *entry,
1274 struct ice_fdir_fltr_pattern *key)
1276 struct ice_fdir_info *fdir_info = &pf->fdir;
1279 ret = rte_hash_add_key(fdir_info->hash_table, key);
1282 "Failed to insert fdir entry to hash table %d!",
1286 fdir_info->hash_map[ret] = entry;
1291 /* Delete a flow director entry from the SW list */
1293 ice_fdir_entry_del(struct ice_pf *pf, struct ice_fdir_fltr_pattern *key)
1295 struct ice_fdir_info *fdir_info = &pf->fdir;
1298 ret = rte_hash_del_key(fdir_info->hash_table, key);
1301 "Failed to delete fdir filter to hash table %d!",
1305 fdir_info->hash_map[ret] = NULL;
1311 ice_fdir_create_filter(struct ice_adapter *ad,
1312 struct rte_flow *flow,
1314 struct rte_flow_error *error)
1316 struct ice_pf *pf = &ad->pf;
1317 struct ice_fdir_filter_conf *filter = meta;
1318 struct ice_fdir_info *fdir_info = &pf->fdir;
1319 struct ice_fdir_filter_conf *entry, *node;
1320 struct ice_fdir_fltr_pattern key;
1325 if (filter->parser_ena) {
1326 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1328 int id = ice_find_first_bit(filter->prof->ptypes, UINT16_MAX);
1329 int ptg = hw->blk[ICE_BLK_FD].xlt1.t[id];
1330 u16 ctrl_vsi = pf->fdir.fdir_vsi->idx;
1331 u16 main_vsi = pf->main_vsi->idx;
1332 bool fv_found = false;
1334 struct ice_fdir_prof_info *pi = &ad->fdir_prof_info[ptg];
1335 if (pi->fdir_actived_cnt != 0) {
1336 for (i = 0; i < ICE_MAX_FV_WORDS; i++)
1337 if (pi->prof.fv[i].proto_id !=
1338 filter->prof->fv[i].proto_id ||
1339 pi->prof.fv[i].offset !=
1340 filter->prof->fv[i].offset ||
1341 pi->prof.fv[i].msk !=
1342 filter->prof->fv[i].msk)
1344 if (i == ICE_MAX_FV_WORDS) {
1346 pi->fdir_actived_cnt++;
1351 ret = ice_flow_set_hw_prof(hw, main_vsi, ctrl_vsi,
1352 filter->prof, ICE_BLK_FD);
1357 ret = ice_fdir_add_del_raw(pf, filter, true);
1362 for (i = 0; i < filter->prof->fv_num; i++) {
1363 pi->prof.fv[i].proto_id =
1364 filter->prof->fv[i].proto_id;
1365 pi->prof.fv[i].offset =
1366 filter->prof->fv[i].offset;
1367 pi->prof.fv[i].msk = filter->prof->fv[i].msk;
1369 pi->fdir_actived_cnt = 1;
1372 if (filter->mark_flag == 1)
1373 ice_fdir_rx_parsing_enable(ad, 1);
1375 entry = rte_zmalloc("fdir_entry", sizeof(*entry), 0);
1379 rte_memcpy(entry, filter, sizeof(*filter));
1386 ice_fdir_extract_fltr_key(&key, filter);
1387 node = ice_fdir_entry_lookup(fdir_info, &key);
1389 rte_flow_error_set(error, EEXIST,
1390 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1391 "Rule already exists!");
1395 entry = rte_zmalloc("fdir_entry", sizeof(*entry), 0);
1397 rte_flow_error_set(error, ENOMEM,
1398 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1399 "Failed to allocate memory");
1403 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1405 ret = ice_fdir_input_set_conf(pf, filter->input.flow_type,
1406 filter->input_set_i, filter->input_set_o,
1407 filter->tunnel_type);
1409 rte_flow_error_set(error, -ret,
1410 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1411 "Profile configure failed.");
1415 /* alloc counter for FDIR */
1416 if (filter->input.cnt_ena) {
1417 struct rte_flow_action_count *act_count = &filter->act_count;
1419 filter->counter = ice_fdir_counter_alloc(pf, 0, act_count->id);
1420 if (!filter->counter) {
1421 rte_flow_error_set(error, EINVAL,
1422 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1423 "Failed to alloc FDIR counter.");
1426 filter->input.cnt_index = filter->counter->hw_index;
1429 ret = ice_fdir_add_del_filter(pf, filter, true);
1431 rte_flow_error_set(error, -ret,
1432 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1433 "Add filter rule failed.");
1437 if (filter->mark_flag == 1)
1438 ice_fdir_rx_parsing_enable(ad, 1);
1440 rte_memcpy(entry, filter, sizeof(*entry));
1441 ret = ice_fdir_entry_insert(pf, entry, &key);
1443 rte_flow_error_set(error, -ret,
1444 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1445 "Insert entry to table failed.");
1450 ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, true);
1455 if (filter->counter) {
1456 ice_fdir_counter_free(pf, filter->counter);
1457 filter->counter = NULL;
1465 rte_free(filter->prof);
1466 rte_free(filter->pkt_buf);
1471 ice_fdir_destroy_filter(struct ice_adapter *ad,
1472 struct rte_flow *flow,
1473 struct rte_flow_error *error)
1475 struct ice_pf *pf = &ad->pf;
1476 struct ice_fdir_info *fdir_info = &pf->fdir;
1477 struct ice_fdir_filter_conf *filter, *entry;
1478 struct ice_fdir_fltr_pattern key;
1482 filter = (struct ice_fdir_filter_conf *)flow->rule;
1484 if (filter->parser_ena) {
1485 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1487 int id = ice_find_first_bit(filter->prof->ptypes, UINT16_MAX);
1488 int ptg = hw->blk[ICE_BLK_FD].xlt1.t[id];
1489 u16 ctrl_vsi = pf->fdir.fdir_vsi->idx;
1490 u16 main_vsi = pf->main_vsi->idx;
1491 enum ice_block blk = ICE_BLK_FD;
1494 ret = ice_fdir_add_del_raw(pf, filter, false);
1498 struct ice_fdir_prof_info *pi = &ad->fdir_prof_info[ptg];
1499 if (pi->fdir_actived_cnt != 0) {
1500 pi->fdir_actived_cnt--;
1501 if (!pi->fdir_actived_cnt) {
1502 vsi_num = ice_get_hw_vsi_num(hw, ctrl_vsi);
1503 ice_rem_prof_id_flow(hw, blk, vsi_num, id);
1505 vsi_num = ice_get_hw_vsi_num(hw, main_vsi);
1506 ice_rem_prof_id_flow(hw, blk, vsi_num, id);
1510 if (filter->mark_flag == 1)
1511 ice_fdir_rx_parsing_enable(ad, 0);
1515 rte_free(filter->prof);
1516 rte_free(filter->pkt_buf);
1522 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1524 if (filter->counter) {
1525 ice_fdir_counter_free(pf, filter->counter);
1526 filter->counter = NULL;
1529 ice_fdir_extract_fltr_key(&key, filter);
1530 entry = ice_fdir_entry_lookup(fdir_info, &key);
1532 rte_flow_error_set(error, ENOENT,
1533 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1534 "Can't find entry.");
1538 ret = ice_fdir_add_del_filter(pf, filter, false);
1540 rte_flow_error_set(error, -ret,
1541 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1542 "Del filter rule failed.");
1546 ret = ice_fdir_entry_del(pf, &key);
1548 rte_flow_error_set(error, -ret,
1549 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1550 "Remove entry from table failed.");
1554 ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, false);
1556 if (filter->mark_flag == 1)
1557 ice_fdir_rx_parsing_enable(ad, 0);
1567 ice_fdir_query_count(struct ice_adapter *ad,
1568 struct rte_flow *flow,
1569 struct rte_flow_query_count *flow_stats,
1570 struct rte_flow_error *error)
1572 struct ice_pf *pf = &ad->pf;
1573 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1574 struct ice_fdir_filter_conf *filter = flow->rule;
1575 struct ice_fdir_counter *counter = filter->counter;
1576 uint64_t hits_lo, hits_hi;
1579 rte_flow_error_set(error, EINVAL,
1580 RTE_FLOW_ERROR_TYPE_ACTION,
1582 "FDIR counters not available");
1587 * Reading the low 32-bits latches the high 32-bits into a shadow
1588 * register. Reading the high 32-bit returns the value in the
1591 hits_lo = ICE_READ_REG(hw, GLSTAT_FD_CNT0L(counter->hw_index));
1592 hits_hi = ICE_READ_REG(hw, GLSTAT_FD_CNT0H(counter->hw_index));
1594 flow_stats->hits_set = 1;
1595 flow_stats->hits = hits_lo | (hits_hi << 32);
1596 flow_stats->bytes_set = 0;
1597 flow_stats->bytes = 0;
1599 if (flow_stats->reset) {
1600 /* reset statistic counter value */
1601 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0H(counter->hw_index), 0);
1602 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0L(counter->hw_index), 0);
1608 static struct ice_flow_engine ice_fdir_engine = {
1609 .init = ice_fdir_init,
1610 .uninit = ice_fdir_uninit,
1611 .create = ice_fdir_create_filter,
1612 .destroy = ice_fdir_destroy_filter,
1613 .query_count = ice_fdir_query_count,
1614 .type = ICE_FLOW_ENGINE_FDIR,
1618 ice_fdir_parse_action_qregion(struct ice_pf *pf,
1619 struct rte_flow_error *error,
1620 const struct rte_flow_action *act,
1621 struct ice_fdir_filter_conf *filter)
1623 const struct rte_flow_action_rss *rss = act->conf;
1626 if (act->type != RTE_FLOW_ACTION_TYPE_RSS) {
1627 rte_flow_error_set(error, EINVAL,
1628 RTE_FLOW_ERROR_TYPE_ACTION, act,
1633 if (rss->queue_num <= 1) {
1634 rte_flow_error_set(error, EINVAL,
1635 RTE_FLOW_ERROR_TYPE_ACTION, act,
1636 "Queue region size can't be 0 or 1.");
1640 /* check if queue index for queue region is continuous */
1641 for (i = 0; i < rss->queue_num - 1; i++) {
1642 if (rss->queue[i + 1] != rss->queue[i] + 1) {
1643 rte_flow_error_set(error, EINVAL,
1644 RTE_FLOW_ERROR_TYPE_ACTION, act,
1645 "Discontinuous queue region");
1650 if (rss->queue[rss->queue_num - 1] >= pf->dev_data->nb_rx_queues) {
1651 rte_flow_error_set(error, EINVAL,
1652 RTE_FLOW_ERROR_TYPE_ACTION, act,
1653 "Invalid queue region indexes.");
1657 if (!(rte_is_power_of_2(rss->queue_num) &&
1658 (rss->queue_num <= ICE_FDIR_MAX_QREGION_SIZE))) {
1659 rte_flow_error_set(error, EINVAL,
1660 RTE_FLOW_ERROR_TYPE_ACTION, act,
1661 "The region size should be any of the following values:"
1662 "1, 2, 4, 8, 16, 32, 64, 128 as long as the total number "
1663 "of queues do not exceed the VSI allocation.");
1667 filter->input.q_index = rss->queue[0];
1668 filter->input.q_region = rte_fls_u32(rss->queue_num) - 1;
1669 filter->input.dest_ctl = ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP;
1675 ice_fdir_parse_action(struct ice_adapter *ad,
1676 const struct rte_flow_action actions[],
1677 struct rte_flow_error *error,
1678 struct ice_fdir_filter_conf *filter)
1680 struct ice_pf *pf = &ad->pf;
1681 const struct rte_flow_action_queue *act_q;
1682 const struct rte_flow_action_mark *mark_spec = NULL;
1683 const struct rte_flow_action_count *act_count;
1684 uint32_t dest_num = 0;
1685 uint32_t mark_num = 0;
1686 uint32_t counter_num = 0;
1689 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
1690 switch (actions->type) {
1691 case RTE_FLOW_ACTION_TYPE_VOID:
1693 case RTE_FLOW_ACTION_TYPE_QUEUE:
1696 act_q = actions->conf;
1697 filter->input.q_index = act_q->index;
1698 if (filter->input.q_index >=
1699 pf->dev_data->nb_rx_queues) {
1700 rte_flow_error_set(error, EINVAL,
1701 RTE_FLOW_ERROR_TYPE_ACTION,
1703 "Invalid queue for FDIR.");
1706 filter->input.dest_ctl =
1707 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX;
1709 case RTE_FLOW_ACTION_TYPE_DROP:
1712 filter->input.dest_ctl =
1713 ICE_FLTR_PRGM_DESC_DEST_DROP_PKT;
1715 case RTE_FLOW_ACTION_TYPE_PASSTHRU:
1718 filter->input.dest_ctl =
1719 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER;
1721 case RTE_FLOW_ACTION_TYPE_RSS:
1724 ret = ice_fdir_parse_action_qregion(pf,
1725 error, actions, filter);
1729 case RTE_FLOW_ACTION_TYPE_MARK:
1731 filter->mark_flag = 1;
1732 mark_spec = actions->conf;
1733 filter->input.fltr_id = mark_spec->id;
1734 filter->input.fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ONE;
1736 case RTE_FLOW_ACTION_TYPE_COUNT:
1739 act_count = actions->conf;
1740 filter->input.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
1741 rte_memcpy(&filter->act_count, act_count,
1742 sizeof(filter->act_count));
1746 rte_flow_error_set(error, EINVAL,
1747 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1753 if (dest_num >= 2) {
1754 rte_flow_error_set(error, EINVAL,
1755 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1756 "Unsupported action combination");
1760 if (mark_num >= 2) {
1761 rte_flow_error_set(error, EINVAL,
1762 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1763 "Too many mark actions");
1767 if (counter_num >= 2) {
1768 rte_flow_error_set(error, EINVAL,
1769 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1770 "Too many count actions");
1774 if (dest_num + mark_num + counter_num == 0) {
1775 rte_flow_error_set(error, EINVAL,
1776 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1781 /* set default action to PASSTHRU mode, in "mark/count only" case. */
1783 filter->input.dest_ctl =
1784 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER;
1790 ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
1791 const struct rte_flow_item pattern[],
1792 struct rte_flow_error *error,
1793 struct ice_fdir_filter_conf *filter)
1795 const struct rte_flow_item *item = pattern;
1796 enum rte_flow_item_type item_type;
1797 enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;
1798 enum rte_flow_item_type l4 = RTE_FLOW_ITEM_TYPE_END;
1799 enum ice_fdir_tunnel_type tunnel_type = ICE_FDIR_TUNNEL_TYPE_NONE;
1800 const struct rte_flow_item_raw *raw_spec, *raw_mask;
1801 const struct rte_flow_item_eth *eth_spec, *eth_mask;
1802 const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_last, *ipv4_mask;
1803 const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;
1804 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_spec,
1806 const struct rte_flow_item_tcp *tcp_spec, *tcp_mask;
1807 const struct rte_flow_item_udp *udp_spec, *udp_mask;
1808 const struct rte_flow_item_sctp *sctp_spec, *sctp_mask;
1809 const struct rte_flow_item_vxlan *vxlan_spec, *vxlan_mask;
1810 const struct rte_flow_item_gtp *gtp_spec, *gtp_mask;
1811 const struct rte_flow_item_gtp_psc *gtp_psc_spec, *gtp_psc_mask;
1812 const struct rte_flow_item_esp *esp_spec, *esp_mask;
1813 uint64_t input_set_i = ICE_INSET_NONE; /* only for tunnel inner */
1814 uint64_t input_set_o = ICE_INSET_NONE; /* non-tunnel and tunnel outer */
1815 uint64_t *input_set;
1816 uint8_t flow_type = ICE_FLTR_PTYPE_NONF_NONE;
1817 uint8_t ipv6_addr_mask[16] = {
1818 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1819 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
1821 uint32_t vtc_flow_cpu;
1822 uint16_t ether_type;
1823 enum rte_flow_item_type next_type;
1824 bool is_outer = true;
1825 struct ice_fdir_extra *p_ext_data;
1826 struct ice_fdir_v4 *p_v4 = NULL;
1827 struct ice_fdir_v6 *p_v6 = NULL;
1828 struct ice_parser_result rslt;
1829 struct ice_parser *psr;
1830 uint8_t item_num = 0;
1832 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
1833 if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN)
1834 tunnel_type = ICE_FDIR_TUNNEL_TYPE_VXLAN;
1835 /* To align with shared code behavior, save gtpu outer
1836 * fields in inner struct.
1838 if (item->type == RTE_FLOW_ITEM_TYPE_GTPU ||
1839 item->type == RTE_FLOW_ITEM_TYPE_GTP_PSC) {
1845 /* This loop parse flow pattern and distinguish Non-tunnel and tunnel
1846 * flow. input_set_i is used for inner part.
1848 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
1849 item_type = item->type;
1851 if (item->last && !(item_type == RTE_FLOW_ITEM_TYPE_IPV4 ||
1853 RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT)) {
1854 rte_flow_error_set(error, EINVAL,
1855 RTE_FLOW_ERROR_TYPE_ITEM, item,
1856 "Not support range");
1859 input_set = (tunnel_type && !is_outer) ?
1860 &input_set_i : &input_set_o;
1862 switch (item_type) {
1863 case RTE_FLOW_ITEM_TYPE_RAW: {
1864 raw_spec = item->spec;
1865 raw_mask = item->mask;
1870 /* convert raw spec & mask from byte string to int */
1871 unsigned char *tmp_spec =
1872 (uint8_t *)(uintptr_t)raw_spec->pattern;
1873 unsigned char *tmp_mask =
1874 (uint8_t *)(uintptr_t)raw_mask->pattern;
1875 uint16_t udp_port = 0;
1876 uint16_t tmp_val = 0;
1877 uint8_t pkt_len = 0;
1881 pkt_len = strlen((char *)(uintptr_t)raw_spec->pattern);
1882 if (strlen((char *)(uintptr_t)raw_mask->pattern) !=
1886 for (i = 0, j = 0; i < pkt_len; i += 2, j++) {
1888 if (tmp >= 'a' && tmp <= 'f')
1889 tmp_val = tmp - 'a' + 10;
1890 if (tmp >= 'A' && tmp <= 'F')
1891 tmp_val = tmp - 'A' + 10;
1892 if (tmp >= '0' && tmp <= '9')
1893 tmp_val = tmp - '0';
1896 tmp = tmp_spec[i + 1];
1897 if (tmp >= 'a' && tmp <= 'f')
1898 tmp_spec[j] = tmp_val + tmp - 'a' + 10;
1899 if (tmp >= 'A' && tmp <= 'F')
1900 tmp_spec[j] = tmp_val + tmp - 'A' + 10;
1901 if (tmp >= '0' && tmp <= '9')
1902 tmp_spec[j] = tmp_val + tmp - '0';
1905 if (tmp >= 'a' && tmp <= 'f')
1906 tmp_val = tmp - 'a' + 10;
1907 if (tmp >= 'A' && tmp <= 'F')
1908 tmp_val = tmp - 'A' + 10;
1909 if (tmp >= '0' && tmp <= '9')
1910 tmp_val = tmp - '0';
1913 tmp = tmp_mask[i + 1];
1914 if (tmp >= 'a' && tmp <= 'f')
1915 tmp_mask[j] = tmp_val + tmp - 'a' + 10;
1916 if (tmp >= 'A' && tmp <= 'F')
1917 tmp_mask[j] = tmp_val + tmp - 'A' + 10;
1918 if (tmp >= '0' && tmp <= '9')
1919 tmp_mask[j] = tmp_val + tmp - '0';
1924 if (ice_parser_create(&ad->hw, &psr))
1926 if (ice_get_open_tunnel_port(&ad->hw, TNL_VXLAN,
1928 ice_parser_vxlan_tunnel_set(psr, udp_port,
1930 if (ice_parser_run(psr, tmp_spec, pkt_len, &rslt))
1932 ice_parser_destroy(psr);
1937 filter->prof = (struct ice_parser_profile *)
1938 ice_malloc(&ad->hw, sizeof(*filter->prof));
1942 if (ice_parser_profile_init(&rslt, tmp_spec, tmp_mask,
1943 pkt_len, ICE_BLK_FD, true, filter->prof))
1946 u8 *pkt_buf = (u8 *)ice_malloc(&ad->hw, pkt_len + 1);
1949 rte_memcpy(pkt_buf, tmp_spec, pkt_len);
1950 filter->pkt_buf = pkt_buf;
1952 filter->pkt_len = pkt_len;
1954 filter->parser_ena = true;
1959 case RTE_FLOW_ITEM_TYPE_ETH:
1960 flow_type = ICE_FLTR_PTYPE_NON_IP_L2;
1961 eth_spec = item->spec;
1962 eth_mask = item->mask;
1964 if (!(eth_spec && eth_mask))
1967 if (!rte_is_zero_ether_addr(ð_mask->dst))
1968 *input_set |= ICE_INSET_DMAC;
1969 if (!rte_is_zero_ether_addr(ð_mask->src))
1970 *input_set |= ICE_INSET_SMAC;
1972 next_type = (item + 1)->type;
1973 /* Ignore this field except for ICE_FLTR_PTYPE_NON_IP_L2 */
1974 if (eth_mask->type == RTE_BE16(0xffff) &&
1975 next_type == RTE_FLOW_ITEM_TYPE_END) {
1976 *input_set |= ICE_INSET_ETHERTYPE;
1977 ether_type = rte_be_to_cpu_16(eth_spec->type);
1979 if (ether_type == RTE_ETHER_TYPE_IPV4 ||
1980 ether_type == RTE_ETHER_TYPE_IPV6) {
1981 rte_flow_error_set(error, EINVAL,
1982 RTE_FLOW_ERROR_TYPE_ITEM,
1984 "Unsupported ether_type.");
1989 p_ext_data = (tunnel_type && is_outer) ?
1990 &filter->input.ext_data_outer :
1991 &filter->input.ext_data;
1992 rte_memcpy(&p_ext_data->src_mac,
1993 ð_spec->src, RTE_ETHER_ADDR_LEN);
1994 rte_memcpy(&p_ext_data->dst_mac,
1995 ð_spec->dst, RTE_ETHER_ADDR_LEN);
1996 rte_memcpy(&p_ext_data->ether_type,
1997 ð_spec->type, sizeof(eth_spec->type));
1999 case RTE_FLOW_ITEM_TYPE_IPV4:
2000 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
2001 l3 = RTE_FLOW_ITEM_TYPE_IPV4;
2002 ipv4_spec = item->spec;
2003 ipv4_last = item->last;
2004 ipv4_mask = item->mask;
2005 p_v4 = (tunnel_type && is_outer) ?
2006 &filter->input.ip_outer.v4 :
2007 &filter->input.ip.v4;
2009 if (!(ipv4_spec && ipv4_mask))
2012 /* Check IPv4 mask and update input set */
2013 if (ipv4_mask->hdr.version_ihl ||
2014 ipv4_mask->hdr.total_length ||
2015 ipv4_mask->hdr.hdr_checksum) {
2016 rte_flow_error_set(error, EINVAL,
2017 RTE_FLOW_ERROR_TYPE_ITEM,
2019 "Invalid IPv4 mask.");
2024 (ipv4_last->hdr.version_ihl ||
2025 ipv4_last->hdr.type_of_service ||
2026 ipv4_last->hdr.time_to_live ||
2027 ipv4_last->hdr.total_length |
2028 ipv4_last->hdr.next_proto_id ||
2029 ipv4_last->hdr.hdr_checksum ||
2030 ipv4_last->hdr.src_addr ||
2031 ipv4_last->hdr.dst_addr)) {
2032 rte_flow_error_set(error, EINVAL,
2033 RTE_FLOW_ERROR_TYPE_ITEM,
2034 item, "Invalid IPv4 last.");
2038 /* Mask for IPv4 src/dst addrs not supported */
2039 if (ipv4_mask->hdr.src_addr &&
2040 ipv4_mask->hdr.src_addr != UINT32_MAX)
2042 if (ipv4_mask->hdr.dst_addr &&
2043 ipv4_mask->hdr.dst_addr != UINT32_MAX)
2046 if (ipv4_mask->hdr.dst_addr == UINT32_MAX)
2047 *input_set |= ICE_INSET_IPV4_DST;
2048 if (ipv4_mask->hdr.src_addr == UINT32_MAX)
2049 *input_set |= ICE_INSET_IPV4_SRC;
2050 if (ipv4_mask->hdr.time_to_live == UINT8_MAX)
2051 *input_set |= ICE_INSET_IPV4_TTL;
2052 if (ipv4_mask->hdr.next_proto_id == UINT8_MAX)
2053 *input_set |= ICE_INSET_IPV4_PROTO;
2054 if (ipv4_mask->hdr.type_of_service == UINT8_MAX)
2055 *input_set |= ICE_INSET_IPV4_TOS;
2057 p_v4->dst_ip = ipv4_spec->hdr.dst_addr;
2058 p_v4->src_ip = ipv4_spec->hdr.src_addr;
2059 p_v4->ttl = ipv4_spec->hdr.time_to_live;
2060 p_v4->proto = ipv4_spec->hdr.next_proto_id;
2061 p_v4->tos = ipv4_spec->hdr.type_of_service;
2064 * spec is 0x2000, mask is 0x2000
2066 if (ipv4_spec->hdr.fragment_offset ==
2067 rte_cpu_to_be_16(RTE_IPV4_HDR_MF_FLAG) &&
2068 ipv4_mask->hdr.fragment_offset ==
2069 rte_cpu_to_be_16(RTE_IPV4_HDR_MF_FLAG)) {
2070 /* all IPv4 fragment packet has the same
2071 * ethertype, if the spec and mask is valid,
2072 * set ethertype into input set.
2074 flow_type = ICE_FLTR_PTYPE_FRAG_IPV4;
2075 *input_set |= ICE_INSET_ETHERTYPE;
2076 input_set_o |= ICE_INSET_ETHERTYPE;
2077 } else if (ipv4_mask->hdr.packet_id == UINT16_MAX) {
2078 rte_flow_error_set(error, EINVAL,
2079 RTE_FLOW_ERROR_TYPE_ITEM,
2080 item, "Invalid IPv4 mask.");
2085 case RTE_FLOW_ITEM_TYPE_IPV6:
2086 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
2087 l3 = RTE_FLOW_ITEM_TYPE_IPV6;
2088 ipv6_spec = item->spec;
2089 ipv6_mask = item->mask;
2090 p_v6 = (tunnel_type && is_outer) ?
2091 &filter->input.ip_outer.v6 :
2092 &filter->input.ip.v6;
2094 if (!(ipv6_spec && ipv6_mask))
2097 /* Check IPv6 mask and update input set */
2098 if (ipv6_mask->hdr.payload_len) {
2099 rte_flow_error_set(error, EINVAL,
2100 RTE_FLOW_ERROR_TYPE_ITEM,
2102 "Invalid IPv6 mask");
2106 if (!memcmp(ipv6_mask->hdr.src_addr, ipv6_addr_mask,
2107 RTE_DIM(ipv6_mask->hdr.src_addr)))
2108 *input_set |= ICE_INSET_IPV6_SRC;
2109 if (!memcmp(ipv6_mask->hdr.dst_addr, ipv6_addr_mask,
2110 RTE_DIM(ipv6_mask->hdr.dst_addr)))
2111 *input_set |= ICE_INSET_IPV6_DST;
2113 if ((ipv6_mask->hdr.vtc_flow &
2114 rte_cpu_to_be_32(ICE_IPV6_TC_MASK))
2115 == rte_cpu_to_be_32(ICE_IPV6_TC_MASK))
2116 *input_set |= ICE_INSET_IPV6_TC;
2117 if (ipv6_mask->hdr.proto == UINT8_MAX)
2118 *input_set |= ICE_INSET_IPV6_NEXT_HDR;
2119 if (ipv6_mask->hdr.hop_limits == UINT8_MAX)
2120 *input_set |= ICE_INSET_IPV6_HOP_LIMIT;
2122 rte_memcpy(&p_v6->dst_ip, ipv6_spec->hdr.dst_addr, 16);
2123 rte_memcpy(&p_v6->src_ip, ipv6_spec->hdr.src_addr, 16);
2124 vtc_flow_cpu = rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);
2125 p_v6->tc = (uint8_t)(vtc_flow_cpu >> ICE_FDIR_IPV6_TC_OFFSET);
2126 p_v6->proto = ipv6_spec->hdr.proto;
2127 p_v6->hlim = ipv6_spec->hdr.hop_limits;
2129 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
2130 l3 = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT;
2131 flow_type = ICE_FLTR_PTYPE_FRAG_IPV6;
2132 ipv6_frag_spec = item->spec;
2133 ipv6_frag_mask = item->mask;
2135 if (!(ipv6_frag_spec && ipv6_frag_mask))
2139 * spec is 0x1, mask is 0x1
2141 if (ipv6_frag_spec->hdr.frag_data ==
2142 rte_cpu_to_be_16(1) &&
2143 ipv6_frag_mask->hdr.frag_data ==
2144 rte_cpu_to_be_16(1)) {
2145 /* all IPv6 fragment packet has the same
2146 * ethertype, if the spec and mask is valid,
2147 * set ethertype into input set.
2149 *input_set |= ICE_INSET_ETHERTYPE;
2150 input_set_o |= ICE_INSET_ETHERTYPE;
2151 } else if (ipv6_frag_mask->hdr.id == UINT32_MAX) {
2152 rte_flow_error_set(error, EINVAL,
2153 RTE_FLOW_ERROR_TYPE_ITEM,
2154 item, "Invalid IPv6 mask.");
2160 case RTE_FLOW_ITEM_TYPE_TCP:
2161 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
2162 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
2163 if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
2164 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
2166 tcp_spec = item->spec;
2167 tcp_mask = item->mask;
2169 if (!(tcp_spec && tcp_mask))
2172 /* Check TCP mask and update input set */
2173 if (tcp_mask->hdr.sent_seq ||
2174 tcp_mask->hdr.recv_ack ||
2175 tcp_mask->hdr.data_off ||
2176 tcp_mask->hdr.tcp_flags ||
2177 tcp_mask->hdr.rx_win ||
2178 tcp_mask->hdr.cksum ||
2179 tcp_mask->hdr.tcp_urp) {
2180 rte_flow_error_set(error, EINVAL,
2181 RTE_FLOW_ERROR_TYPE_ITEM,
2183 "Invalid TCP mask");
2187 /* Mask for TCP src/dst ports not supported */
2188 if (tcp_mask->hdr.src_port &&
2189 tcp_mask->hdr.src_port != UINT16_MAX)
2191 if (tcp_mask->hdr.dst_port &&
2192 tcp_mask->hdr.dst_port != UINT16_MAX)
2195 if (tcp_mask->hdr.src_port == UINT16_MAX)
2196 *input_set |= ICE_INSET_TCP_SRC_PORT;
2197 if (tcp_mask->hdr.dst_port == UINT16_MAX)
2198 *input_set |= ICE_INSET_TCP_DST_PORT;
2200 /* Get filter info */
2201 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
2203 p_v4->dst_port = tcp_spec->hdr.dst_port;
2204 p_v4->src_port = tcp_spec->hdr.src_port;
2205 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
2207 p_v6->dst_port = tcp_spec->hdr.dst_port;
2208 p_v6->src_port = tcp_spec->hdr.src_port;
2211 case RTE_FLOW_ITEM_TYPE_UDP:
2212 l4 = RTE_FLOW_ITEM_TYPE_UDP;
2213 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
2214 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
2215 if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
2216 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
2218 udp_spec = item->spec;
2219 udp_mask = item->mask;
2221 if (!(udp_spec && udp_mask))
2224 /* Check UDP mask and update input set*/
2225 if (udp_mask->hdr.dgram_len ||
2226 udp_mask->hdr.dgram_cksum) {
2227 rte_flow_error_set(error, EINVAL,
2228 RTE_FLOW_ERROR_TYPE_ITEM,
2230 "Invalid UDP mask");
2234 /* Mask for UDP src/dst ports not supported */
2235 if (udp_mask->hdr.src_port &&
2236 udp_mask->hdr.src_port != UINT16_MAX)
2238 if (udp_mask->hdr.dst_port &&
2239 udp_mask->hdr.dst_port != UINT16_MAX)
2242 if (udp_mask->hdr.src_port == UINT16_MAX)
2243 *input_set |= ICE_INSET_UDP_SRC_PORT;
2244 if (udp_mask->hdr.dst_port == UINT16_MAX)
2245 *input_set |= ICE_INSET_UDP_DST_PORT;
2247 /* Get filter info */
2248 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
2250 p_v4->dst_port = udp_spec->hdr.dst_port;
2251 p_v4->src_port = udp_spec->hdr.src_port;
2252 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
2254 p_v6->src_port = udp_spec->hdr.src_port;
2255 p_v6->dst_port = udp_spec->hdr.dst_port;
2258 case RTE_FLOW_ITEM_TYPE_SCTP:
2259 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
2260 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
2261 if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
2262 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
2264 sctp_spec = item->spec;
2265 sctp_mask = item->mask;
2267 if (!(sctp_spec && sctp_mask))
2270 /* Check SCTP mask and update input set */
2271 if (sctp_mask->hdr.cksum) {
2272 rte_flow_error_set(error, EINVAL,
2273 RTE_FLOW_ERROR_TYPE_ITEM,
2275 "Invalid UDP mask");
2279 /* Mask for SCTP src/dst ports not supported */
2280 if (sctp_mask->hdr.src_port &&
2281 sctp_mask->hdr.src_port != UINT16_MAX)
2283 if (sctp_mask->hdr.dst_port &&
2284 sctp_mask->hdr.dst_port != UINT16_MAX)
2287 if (sctp_mask->hdr.src_port == UINT16_MAX)
2288 *input_set |= ICE_INSET_SCTP_SRC_PORT;
2289 if (sctp_mask->hdr.dst_port == UINT16_MAX)
2290 *input_set |= ICE_INSET_SCTP_DST_PORT;
2292 /* Get filter info */
2293 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
2295 p_v4->dst_port = sctp_spec->hdr.dst_port;
2296 p_v4->src_port = sctp_spec->hdr.src_port;
2297 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
2299 p_v6->dst_port = sctp_spec->hdr.dst_port;
2300 p_v6->src_port = sctp_spec->hdr.src_port;
2303 case RTE_FLOW_ITEM_TYPE_VOID:
2305 case RTE_FLOW_ITEM_TYPE_VXLAN:
2306 l3 = RTE_FLOW_ITEM_TYPE_END;
2307 vxlan_spec = item->spec;
2308 vxlan_mask = item->mask;
2311 if (!(vxlan_spec && vxlan_mask))
2314 if (vxlan_mask->hdr.vx_flags) {
2315 rte_flow_error_set(error, EINVAL,
2316 RTE_FLOW_ERROR_TYPE_ITEM,
2318 "Invalid vxlan field");
2322 if (vxlan_mask->hdr.vx_vni)
2323 *input_set |= ICE_INSET_VXLAN_VNI;
2325 filter->input.vxlan_data.vni = vxlan_spec->hdr.vx_vni;
2328 case RTE_FLOW_ITEM_TYPE_GTPU:
2329 l3 = RTE_FLOW_ITEM_TYPE_END;
2330 tunnel_type = ICE_FDIR_TUNNEL_TYPE_GTPU;
2331 gtp_spec = item->spec;
2332 gtp_mask = item->mask;
2334 if (!(gtp_spec && gtp_mask))
2337 if (gtp_mask->v_pt_rsv_flags ||
2338 gtp_mask->msg_type ||
2339 gtp_mask->msg_len) {
2340 rte_flow_error_set(error, EINVAL,
2341 RTE_FLOW_ERROR_TYPE_ITEM,
2343 "Invalid GTP mask");
2347 if (gtp_mask->teid == UINT32_MAX)
2348 input_set_o |= ICE_INSET_GTPU_TEID;
2350 filter->input.gtpu_data.teid = gtp_spec->teid;
2352 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
2353 tunnel_type = ICE_FDIR_TUNNEL_TYPE_GTPU_EH;
2354 gtp_psc_spec = item->spec;
2355 gtp_psc_mask = item->mask;
2357 if (!(gtp_psc_spec && gtp_psc_mask))
2360 if (gtp_psc_mask->hdr.qfi == 0x3F)
2361 input_set_o |= ICE_INSET_GTPU_QFI;
2363 filter->input.gtpu_data.qfi =
2364 gtp_psc_spec->hdr.qfi;
2366 case RTE_FLOW_ITEM_TYPE_ESP:
2367 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4 &&
2368 l4 == RTE_FLOW_ITEM_TYPE_UDP)
2369 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP;
2370 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6 &&
2371 l4 == RTE_FLOW_ITEM_TYPE_UDP)
2372 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP;
2373 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV4 &&
2374 l4 == RTE_FLOW_ITEM_TYPE_END)
2375 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_ESP;
2376 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6 &&
2377 l4 == RTE_FLOW_ITEM_TYPE_END)
2378 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_ESP;
2380 esp_spec = item->spec;
2381 esp_mask = item->mask;
2383 if (!(esp_spec && esp_mask))
2386 if (esp_mask->hdr.spi == UINT32_MAX) {
2387 if (l4 == RTE_FLOW_ITEM_TYPE_UDP)
2388 *input_set |= ICE_INSET_NAT_T_ESP_SPI;
2390 *input_set |= ICE_INSET_ESP_SPI;
2393 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
2394 filter->input.ip.v4.sec_parm_idx =
2396 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
2397 filter->input.ip.v6.sec_parm_idx =
2401 rte_flow_error_set(error, EINVAL,
2402 RTE_FLOW_ERROR_TYPE_ITEM,
2404 "Invalid pattern item.");
2409 if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU &&
2410 flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
2411 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU;
2412 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU_EH &&
2413 flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
2414 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH;
2415 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU &&
2416 flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP)
2417 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_GTPU;
2418 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU_EH &&
2419 flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP)
2420 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH;
2421 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN &&
2422 flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
2423 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_UDP;
2424 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN &&
2425 flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP)
2426 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_TCP;
2427 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN &&
2428 flow_type == ICE_FLTR_PTYPE_NONF_IPV4_SCTP)
2429 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_SCTP;
2430 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN &&
2431 flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
2432 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN_IPV4_OTHER;
2434 filter->tunnel_type = tunnel_type;
2435 filter->input.flow_type = flow_type;
2436 filter->input_set_o = input_set_o;
2437 filter->input_set_i = input_set_i;
2443 ice_fdir_parse(struct ice_adapter *ad,
2444 struct ice_pattern_match_item *array,
2446 const struct rte_flow_item pattern[],
2447 const struct rte_flow_action actions[],
2450 struct rte_flow_error *error)
2452 struct ice_pf *pf = &ad->pf;
2453 struct ice_fdir_filter_conf *filter = &pf->fdir.conf;
2454 struct ice_pattern_match_item *item = NULL;
2459 memset(filter, 0, sizeof(*filter));
2460 item = ice_search_pattern_match_item(ad, pattern, array, array_len,
2463 if (!ad->devargs.pipe_mode_support && priority >= 1)
2469 ret = ice_fdir_parse_pattern(ad, pattern, error, filter);
2473 if (item->pattern_list[0] == RTE_FLOW_ITEM_TYPE_RAW)
2476 input_set = filter->input_set_o | filter->input_set_i;
2477 input_set = raw ? ~input_set : input_set;
2479 if (!input_set || filter->input_set_o &
2480 ~(item->input_set_mask_o | ICE_INSET_ETHERTYPE) ||
2481 filter->input_set_i & ~item->input_set_mask_i) {
2482 rte_flow_error_set(error, EINVAL,
2483 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2485 "Invalid input set");
2490 ret = ice_fdir_parse_action(ad, actions, error, filter);
2500 rte_free(filter->prof);
2501 rte_free(filter->pkt_buf);
2506 static struct ice_flow_parser ice_fdir_parser = {
2507 .engine = &ice_fdir_engine,
2508 .array = ice_fdir_pattern_list,
2509 .array_len = RTE_DIM(ice_fdir_pattern_list),
2510 .parse_pattern_action = ice_fdir_parse,
2511 .stage = ICE_FLOW_STAGE_DISTRIBUTOR,
2514 RTE_INIT(ice_fdir_engine_register)
2516 ice_register_flow_engine(&ice_fdir_engine);