1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019 Intel Corporation
8 #include <rte_hash_crc.h>
9 #include "base/ice_fdir.h"
10 #include "base/ice_flow.h"
11 #include "base/ice_type.h"
12 #include "ice_ethdev.h"
14 #include "ice_generic_flow.h"
16 #define ICE_FDIR_IPV6_TC_OFFSET 20
17 #define ICE_IPV6_TC_MASK (0xFF << ICE_FDIR_IPV6_TC_OFFSET)
19 #define ICE_FDIR_MAX_QREGION_SIZE 128
21 #define ICE_FDIR_INSET_ETH (\
22 ICE_INSET_DMAC | ICE_INSET_SMAC | ICE_INSET_ETHERTYPE)
24 #define ICE_FDIR_INSET_ETH_IPV4 (\
25 ICE_FDIR_INSET_ETH | \
26 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_IPV4_TOS | \
27 ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_PROTO | ICE_INSET_IPV4_PKID)
29 #define ICE_FDIR_INSET_ETH_IPV4_UDP (\
30 ICE_FDIR_INSET_ETH_IPV4 | \
31 ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
33 #define ICE_FDIR_INSET_ETH_IPV4_TCP (\
34 ICE_FDIR_INSET_ETH_IPV4 | \
35 ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
37 #define ICE_FDIR_INSET_ETH_IPV4_SCTP (\
38 ICE_FDIR_INSET_ETH_IPV4 | \
39 ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
41 #define ICE_FDIR_INSET_ETH_IPV6 (\
43 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | ICE_INSET_IPV6_TC | \
44 ICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_NEXT_HDR | \
47 #define ICE_FDIR_INSET_ETH_IPV6_UDP (\
48 ICE_FDIR_INSET_ETH_IPV6 | \
49 ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
51 #define ICE_FDIR_INSET_ETH_IPV6_TCP (\
52 ICE_FDIR_INSET_ETH_IPV6 | \
53 ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
55 #define ICE_FDIR_INSET_ETH_IPV6_SCTP (\
56 ICE_FDIR_INSET_ETH_IPV6 | \
57 ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
59 #define ICE_FDIR_INSET_IPV4 (\
60 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
63 #define ICE_FDIR_INSET_IPV4_TCP (\
64 ICE_FDIR_INSET_IPV4 | \
65 ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
67 #define ICE_FDIR_INSET_IPV4_UDP (\
68 ICE_FDIR_INSET_IPV4 | \
69 ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
71 #define ICE_FDIR_INSET_IPV4_SCTP (\
72 ICE_FDIR_INSET_IPV4 | \
73 ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
75 #define ICE_FDIR_INSET_ETH_IPV4_VXLAN (\
76 ICE_FDIR_INSET_ETH | ICE_FDIR_INSET_ETH_IPV4 | \
79 #define ICE_FDIR_INSET_IPV4_GTPU (\
80 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_GTPU_TEID)
82 #define ICE_FDIR_INSET_IPV4_GTPU_EH (\
83 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
84 ICE_INSET_GTPU_TEID | ICE_INSET_GTPU_QFI)
86 #define ICE_FDIR_INSET_IPV6_GTPU (\
87 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | ICE_INSET_GTPU_TEID)
89 #define ICE_FDIR_INSET_IPV6_GTPU_EH (\
90 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \
91 ICE_INSET_GTPU_TEID | ICE_INSET_GTPU_QFI)
93 #define ICE_FDIR_INSET_IPV4_ESP (\
94 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
97 #define ICE_FDIR_INSET_IPV6_ESP (\
98 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \
101 #define ICE_FDIR_INSET_IPV4_NATT_ESP (\
102 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \
105 #define ICE_FDIR_INSET_IPV6_NATT_ESP (\
106 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | \
109 static struct ice_pattern_match_item ice_fdir_pattern_list[] = {
110 {pattern_ethertype, ICE_FDIR_INSET_ETH, ICE_INSET_NONE, ICE_INSET_NONE},
111 {pattern_eth_ipv4, ICE_FDIR_INSET_ETH_IPV4, ICE_INSET_NONE, ICE_INSET_NONE},
112 {pattern_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE, ICE_INSET_NONE},
113 {pattern_eth_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_TCP, ICE_INSET_NONE, ICE_INSET_NONE},
114 {pattern_eth_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_SCTP, ICE_INSET_NONE, ICE_INSET_NONE},
115 {pattern_eth_ipv6, ICE_FDIR_INSET_ETH_IPV6, ICE_INSET_NONE, ICE_INSET_NONE},
116 {pattern_eth_ipv6_frag_ext, ICE_FDIR_INSET_ETH_IPV6, ICE_INSET_NONE, ICE_INSET_NONE},
117 {pattern_eth_ipv6_udp, ICE_FDIR_INSET_ETH_IPV6_UDP, ICE_INSET_NONE, ICE_INSET_NONE},
118 {pattern_eth_ipv6_tcp, ICE_FDIR_INSET_ETH_IPV6_TCP, ICE_INSET_NONE, ICE_INSET_NONE},
119 {pattern_eth_ipv6_sctp, ICE_FDIR_INSET_ETH_IPV6_SCTP, ICE_INSET_NONE, ICE_INSET_NONE},
120 {pattern_eth_ipv4_esp, ICE_FDIR_INSET_IPV4_ESP, ICE_INSET_NONE, ICE_INSET_NONE},
121 {pattern_eth_ipv4_udp_esp, ICE_FDIR_INSET_IPV4_NATT_ESP, ICE_INSET_NONE, ICE_INSET_NONE},
122 {pattern_eth_ipv6_esp, ICE_FDIR_INSET_IPV6_ESP, ICE_INSET_NONE, ICE_INSET_NONE},
123 {pattern_eth_ipv6_udp_esp, ICE_FDIR_INSET_IPV6_NATT_ESP, ICE_INSET_NONE, ICE_INSET_NONE},
124 {pattern_eth_ipv4_udp_vxlan_ipv4, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_IPV4, ICE_INSET_NONE},
125 {pattern_eth_ipv4_udp_vxlan_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_IPV4_UDP, ICE_INSET_NONE},
126 {pattern_eth_ipv4_udp_vxlan_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_IPV4_TCP, ICE_INSET_NONE},
127 {pattern_eth_ipv4_udp_vxlan_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_IPV4_SCTP, ICE_INSET_NONE},
128 {pattern_eth_ipv4_udp_vxlan_eth_ipv4, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_ETH_IPV4, ICE_INSET_NONE},
129 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE},
130 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_ETH_IPV4_TCP, ICE_INSET_NONE},
131 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_VXLAN, ICE_FDIR_INSET_ETH_IPV4_SCTP, ICE_INSET_NONE},
132 /* duplicated GTPU input set in 3rd column to align with shared code behavior. Ideally, only put GTPU field in 2nd column. */
133 {pattern_eth_ipv4_gtpu, ICE_FDIR_INSET_IPV4_GTPU, ICE_FDIR_INSET_IPV4_GTPU, ICE_INSET_NONE},
134 {pattern_eth_ipv4_gtpu_eh, ICE_FDIR_INSET_IPV4_GTPU_EH, ICE_FDIR_INSET_IPV4_GTPU_EH, ICE_INSET_NONE},
135 {pattern_eth_ipv6_gtpu, ICE_FDIR_INSET_IPV6_GTPU, ICE_FDIR_INSET_IPV6_GTPU, ICE_INSET_NONE},
136 {pattern_eth_ipv6_gtpu_eh, ICE_FDIR_INSET_IPV6_GTPU_EH, ICE_FDIR_INSET_IPV6_GTPU_EH, ICE_INSET_NONE},
139 static struct ice_flow_parser ice_fdir_parser;
142 ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type);
144 static const struct rte_memzone *
145 ice_memzone_reserve(const char *name, uint32_t len, int socket_id)
147 const struct rte_memzone *mz;
149 mz = rte_memzone_lookup(name);
153 return rte_memzone_reserve_aligned(name, len, socket_id,
154 RTE_MEMZONE_IOVA_CONTIG,
155 ICE_RING_BASE_ALIGN);
158 #define ICE_FDIR_MZ_NAME "FDIR_MEMZONE"
161 ice_fdir_prof_alloc(struct ice_hw *hw)
163 enum ice_fltr_ptype ptype, fltr_ptype;
165 if (!hw->fdir_prof) {
166 hw->fdir_prof = (struct ice_fd_hw_prof **)
167 ice_malloc(hw, ICE_FLTR_PTYPE_MAX *
168 sizeof(*hw->fdir_prof));
172 for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
173 ptype < ICE_FLTR_PTYPE_MAX;
175 if (!hw->fdir_prof[ptype]) {
176 hw->fdir_prof[ptype] = (struct ice_fd_hw_prof *)
177 ice_malloc(hw, sizeof(**hw->fdir_prof));
178 if (!hw->fdir_prof[ptype])
185 for (fltr_ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
188 rte_free(hw->fdir_prof[fltr_ptype]);
189 hw->fdir_prof[fltr_ptype] = NULL;
192 rte_free(hw->fdir_prof);
193 hw->fdir_prof = NULL;
199 ice_fdir_counter_pool_add(__rte_unused struct ice_pf *pf,
200 struct ice_fdir_counter_pool_container *container,
201 uint32_t index_start,
204 struct ice_fdir_counter_pool *pool;
208 pool = rte_zmalloc("ice_fdir_counter_pool",
210 sizeof(struct ice_fdir_counter) * len,
214 "Failed to allocate memory for fdir counter pool");
218 TAILQ_INIT(&pool->counter_list);
219 TAILQ_INSERT_TAIL(&container->pool_list, pool, next);
221 for (i = 0; i < len; i++) {
222 struct ice_fdir_counter *counter = &pool->counters[i];
224 counter->hw_index = index_start + i;
225 TAILQ_INSERT_TAIL(&pool->counter_list, counter, next);
228 if (container->index_free == ICE_FDIR_COUNTER_MAX_POOL_SIZE) {
229 PMD_INIT_LOG(ERR, "FDIR counter pool is full");
234 container->pools[container->index_free++] = pool;
243 ice_fdir_counter_init(struct ice_pf *pf)
245 struct ice_hw *hw = ICE_PF_TO_HW(pf);
246 struct ice_fdir_info *fdir_info = &pf->fdir;
247 struct ice_fdir_counter_pool_container *container =
249 uint32_t cnt_index, len;
252 TAILQ_INIT(&container->pool_list);
254 cnt_index = ICE_FDIR_COUNTER_INDEX(hw->fd_ctr_base);
255 len = ICE_FDIR_COUNTERS_PER_BLOCK;
257 ret = ice_fdir_counter_pool_add(pf, container, cnt_index, len);
259 PMD_INIT_LOG(ERR, "Failed to add fdir pool to container");
267 ice_fdir_counter_release(struct ice_pf *pf)
269 struct ice_fdir_info *fdir_info = &pf->fdir;
270 struct ice_fdir_counter_pool_container *container =
274 for (i = 0; i < container->index_free; i++) {
275 rte_free(container->pools[i]);
276 container->pools[i] = NULL;
279 TAILQ_INIT(&container->pool_list);
280 container->index_free = 0;
285 static struct ice_fdir_counter *
286 ice_fdir_counter_shared_search(struct ice_fdir_counter_pool_container
290 struct ice_fdir_counter_pool *pool;
291 struct ice_fdir_counter *counter;
294 TAILQ_FOREACH(pool, &container->pool_list, next) {
295 for (i = 0; i < ICE_FDIR_COUNTERS_PER_BLOCK; i++) {
296 counter = &pool->counters[i];
298 if (counter->shared &&
308 static struct ice_fdir_counter *
309 ice_fdir_counter_alloc(struct ice_pf *pf, uint32_t shared, uint32_t id)
311 struct ice_hw *hw = ICE_PF_TO_HW(pf);
312 struct ice_fdir_info *fdir_info = &pf->fdir;
313 struct ice_fdir_counter_pool_container *container =
315 struct ice_fdir_counter_pool *pool = NULL;
316 struct ice_fdir_counter *counter_free = NULL;
319 counter_free = ice_fdir_counter_shared_search(container, id);
321 if (counter_free->ref_cnt + 1 == 0) {
325 counter_free->ref_cnt++;
330 TAILQ_FOREACH(pool, &container->pool_list, next) {
331 counter_free = TAILQ_FIRST(&pool->counter_list);
338 PMD_DRV_LOG(ERR, "No free counter found\n");
342 counter_free->shared = shared;
343 counter_free->id = id;
344 counter_free->ref_cnt = 1;
345 counter_free->pool = pool;
347 /* reset statistic counter value */
348 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0H(counter_free->hw_index), 0);
349 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0L(counter_free->hw_index), 0);
351 TAILQ_REMOVE(&pool->counter_list, counter_free, next);
352 if (TAILQ_EMPTY(&pool->counter_list)) {
353 TAILQ_REMOVE(&container->pool_list, pool, next);
354 TAILQ_INSERT_TAIL(&container->pool_list, pool, next);
361 ice_fdir_counter_free(__rte_unused struct ice_pf *pf,
362 struct ice_fdir_counter *counter)
367 if (--counter->ref_cnt == 0) {
368 struct ice_fdir_counter_pool *pool = counter->pool;
370 TAILQ_INSERT_TAIL(&pool->counter_list, counter, next);
375 ice_fdir_init_filter_list(struct ice_pf *pf)
377 struct rte_eth_dev *dev = &rte_eth_devices[pf->dev_data->port_id];
378 struct ice_fdir_info *fdir_info = &pf->fdir;
379 char fdir_hash_name[RTE_HASH_NAMESIZE];
382 struct rte_hash_parameters fdir_hash_params = {
383 .name = fdir_hash_name,
384 .entries = ICE_MAX_FDIR_FILTER_NUM,
385 .key_len = sizeof(struct ice_fdir_fltr_pattern),
386 .hash_func = rte_hash_crc,
387 .hash_func_init_val = 0,
388 .socket_id = rte_socket_id(),
389 .extra_flag = RTE_HASH_EXTRA_FLAGS_EXT_TABLE,
392 /* Initialize hash */
393 snprintf(fdir_hash_name, RTE_HASH_NAMESIZE,
394 "fdir_%s", dev->device->name);
395 fdir_info->hash_table = rte_hash_create(&fdir_hash_params);
396 if (!fdir_info->hash_table) {
397 PMD_INIT_LOG(ERR, "Failed to create fdir hash table!");
400 fdir_info->hash_map = rte_zmalloc("ice_fdir_hash_map",
401 sizeof(*fdir_info->hash_map) *
402 ICE_MAX_FDIR_FILTER_NUM,
404 if (!fdir_info->hash_map) {
406 "Failed to allocate memory for fdir hash map!");
408 goto err_fdir_hash_map_alloc;
412 err_fdir_hash_map_alloc:
413 rte_hash_free(fdir_info->hash_table);
419 ice_fdir_release_filter_list(struct ice_pf *pf)
421 struct ice_fdir_info *fdir_info = &pf->fdir;
423 if (fdir_info->hash_map)
424 rte_free(fdir_info->hash_map);
425 if (fdir_info->hash_table)
426 rte_hash_free(fdir_info->hash_table);
428 fdir_info->hash_map = NULL;
429 fdir_info->hash_table = NULL;
433 * ice_fdir_setup - reserve and initialize the Flow Director resources
434 * @pf: board private structure
437 ice_fdir_setup(struct ice_pf *pf)
439 struct rte_eth_dev *eth_dev = &rte_eth_devices[pf->dev_data->port_id];
440 struct ice_hw *hw = ICE_PF_TO_HW(pf);
441 const struct rte_memzone *mz = NULL;
442 char z_name[RTE_MEMZONE_NAMESIZE];
444 int err = ICE_SUCCESS;
446 if ((pf->flags & ICE_FLAG_FDIR) == 0) {
447 PMD_INIT_LOG(ERR, "HW doesn't support FDIR");
451 PMD_DRV_LOG(INFO, "FDIR HW Capabilities: fd_fltr_guar = %u,"
452 " fd_fltr_best_effort = %u.",
453 hw->func_caps.fd_fltr_guar,
454 hw->func_caps.fd_fltr_best_effort);
456 if (pf->fdir.fdir_vsi) {
457 PMD_DRV_LOG(INFO, "FDIR initialization has been done.");
461 /* make new FDIR VSI */
462 vsi = ice_setup_vsi(pf, ICE_VSI_CTRL);
464 PMD_DRV_LOG(ERR, "Couldn't create FDIR VSI.");
467 pf->fdir.fdir_vsi = vsi;
469 err = ice_fdir_init_filter_list(pf);
471 PMD_DRV_LOG(ERR, "Failed to init FDIR filter list.");
475 err = ice_fdir_counter_init(pf);
477 PMD_DRV_LOG(ERR, "Failed to init FDIR counter.");
481 /*Fdir tx queue setup*/
482 err = ice_fdir_setup_tx_resources(pf);
484 PMD_DRV_LOG(ERR, "Failed to setup FDIR TX resources.");
488 /*Fdir rx queue setup*/
489 err = ice_fdir_setup_rx_resources(pf);
491 PMD_DRV_LOG(ERR, "Failed to setup FDIR RX resources.");
495 err = ice_fdir_tx_queue_start(eth_dev, pf->fdir.txq->queue_id);
497 PMD_DRV_LOG(ERR, "Failed to start FDIR TX queue.");
501 err = ice_fdir_rx_queue_start(eth_dev, pf->fdir.rxq->queue_id);
503 PMD_DRV_LOG(ERR, "Failed to start FDIR RX queue.");
507 /* Enable FDIR MSIX interrupt */
508 vsi->nb_used_qps = 1;
509 ice_vsi_queues_bind_intr(vsi);
510 ice_vsi_enable_queues_intr(vsi);
512 /* reserve memory for the fdir programming packet */
513 snprintf(z_name, sizeof(z_name), "ICE_%s_%d",
515 eth_dev->data->port_id);
516 mz = ice_memzone_reserve(z_name, ICE_FDIR_PKT_LEN, SOCKET_ID_ANY);
518 PMD_DRV_LOG(ERR, "Cannot init memzone for "
519 "flow director program packet.");
523 pf->fdir.prg_pkt = mz->addr;
524 pf->fdir.dma_addr = mz->iova;
527 err = ice_fdir_prof_alloc(hw);
529 PMD_DRV_LOG(ERR, "Cannot allocate memory for "
530 "flow director profile.");
535 PMD_DRV_LOG(INFO, "FDIR setup successfully, with programming queue %u.",
540 rte_memzone_free(pf->fdir.mz);
543 ice_rx_queue_release(pf->fdir.rxq);
546 ice_tx_queue_release(pf->fdir.txq);
549 ice_release_vsi(vsi);
550 pf->fdir.fdir_vsi = NULL;
555 ice_fdir_prof_free(struct ice_hw *hw)
557 enum ice_fltr_ptype ptype;
559 for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
560 ptype < ICE_FLTR_PTYPE_MAX;
562 rte_free(hw->fdir_prof[ptype]);
563 hw->fdir_prof[ptype] = NULL;
566 rte_free(hw->fdir_prof);
567 hw->fdir_prof = NULL;
570 /* Remove a profile for some filter type */
572 ice_fdir_prof_rm(struct ice_pf *pf, enum ice_fltr_ptype ptype, bool is_tunnel)
574 struct ice_hw *hw = ICE_PF_TO_HW(pf);
575 struct ice_fd_hw_prof *hw_prof;
580 if (!hw->fdir_prof || !hw->fdir_prof[ptype])
583 hw_prof = hw->fdir_prof[ptype];
585 prof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;
586 for (i = 0; i < pf->hw_prof_cnt[ptype][is_tunnel]; i++) {
587 if (hw_prof->entry_h[i][is_tunnel]) {
588 vsi_num = ice_get_hw_vsi_num(hw,
590 ice_rem_prof_id_flow(hw, ICE_BLK_FD,
592 ice_flow_rem_entry(hw, ICE_BLK_FD,
593 hw_prof->entry_h[i][is_tunnel]);
594 hw_prof->entry_h[i][is_tunnel] = 0;
597 ice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);
598 rte_free(hw_prof->fdir_seg[is_tunnel]);
599 hw_prof->fdir_seg[is_tunnel] = NULL;
601 for (i = 0; i < hw_prof->cnt; i++)
602 hw_prof->vsi_h[i] = 0;
603 pf->hw_prof_cnt[ptype][is_tunnel] = 0;
606 /* Remove all created profiles */
608 ice_fdir_prof_rm_all(struct ice_pf *pf)
610 enum ice_fltr_ptype ptype;
612 for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
613 ptype < ICE_FLTR_PTYPE_MAX;
615 ice_fdir_prof_rm(pf, ptype, false);
616 ice_fdir_prof_rm(pf, ptype, true);
621 * ice_fdir_teardown - release the Flow Director resources
622 * @pf: board private structure
625 ice_fdir_teardown(struct ice_pf *pf)
627 struct rte_eth_dev *eth_dev = &rte_eth_devices[pf->dev_data->port_id];
628 struct ice_hw *hw = ICE_PF_TO_HW(pf);
632 vsi = pf->fdir.fdir_vsi;
636 ice_vsi_disable_queues_intr(vsi);
638 err = ice_fdir_tx_queue_stop(eth_dev, pf->fdir.txq->queue_id);
640 PMD_DRV_LOG(ERR, "Failed to stop TX queue.");
642 err = ice_fdir_rx_queue_stop(eth_dev, pf->fdir.rxq->queue_id);
644 PMD_DRV_LOG(ERR, "Failed to stop RX queue.");
646 err = ice_fdir_counter_release(pf);
648 PMD_DRV_LOG(ERR, "Failed to release FDIR counter resource.");
650 ice_fdir_release_filter_list(pf);
652 ice_tx_queue_release(pf->fdir.txq);
654 ice_rx_queue_release(pf->fdir.rxq);
656 ice_fdir_prof_rm_all(pf);
657 ice_fdir_prof_free(hw);
658 ice_release_vsi(vsi);
659 pf->fdir.fdir_vsi = NULL;
662 err = rte_memzone_free(pf->fdir.mz);
665 PMD_DRV_LOG(ERR, "Failed to free FDIR memezone.");
670 ice_fdir_cur_prof_conflict(struct ice_pf *pf,
671 enum ice_fltr_ptype ptype,
672 struct ice_flow_seg_info *seg,
675 struct ice_hw *hw = ICE_PF_TO_HW(pf);
676 struct ice_flow_seg_info *ori_seg;
677 struct ice_fd_hw_prof *hw_prof;
679 hw_prof = hw->fdir_prof[ptype];
680 ori_seg = hw_prof->fdir_seg[is_tunnel];
682 /* profile does not exist */
686 /* if no input set conflict, return -EEXIST */
687 if ((!is_tunnel && !memcmp(ori_seg, seg, sizeof(*seg))) ||
688 (is_tunnel && !memcmp(&ori_seg[1], &seg[1], sizeof(*seg)))) {
689 PMD_DRV_LOG(DEBUG, "Profile already exists for flow type %d.",
694 /* a rule with input set conflict already exist, so give up */
695 if (pf->fdir_fltr_cnt[ptype][is_tunnel]) {
696 PMD_DRV_LOG(DEBUG, "Failed to create profile for flow type %d due to conflict with existing rule.",
701 /* it's safe to delete an empty profile */
702 ice_fdir_prof_rm(pf, ptype, is_tunnel);
707 ice_fdir_prof_resolve_conflict(struct ice_pf *pf,
708 enum ice_fltr_ptype ptype,
711 struct ice_hw *hw = ICE_PF_TO_HW(pf);
712 struct ice_fd_hw_prof *hw_prof;
713 struct ice_flow_seg_info *seg;
715 hw_prof = hw->fdir_prof[ptype];
716 seg = hw_prof->fdir_seg[is_tunnel];
718 /* profile does not exist */
722 /* profile exists and rule exists, fail to resolve the conflict */
723 if (pf->fdir_fltr_cnt[ptype][is_tunnel] != 0)
726 /* it's safe to delete an empty profile */
727 ice_fdir_prof_rm(pf, ptype, is_tunnel);
733 ice_fdir_cross_prof_conflict(struct ice_pf *pf,
734 enum ice_fltr_ptype ptype,
737 enum ice_fltr_ptype cflct_ptype;
741 case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
742 case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
743 case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
744 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
745 if (!ice_fdir_prof_resolve_conflict
746 (pf, cflct_ptype, is_tunnel))
749 case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
750 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
751 if (!ice_fdir_prof_resolve_conflict
752 (pf, cflct_ptype, is_tunnel))
754 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
755 if (!ice_fdir_prof_resolve_conflict
756 (pf, cflct_ptype, is_tunnel))
758 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
759 if (!ice_fdir_prof_resolve_conflict
760 (pf, cflct_ptype, is_tunnel))
764 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP:
765 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
766 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP:
767 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
768 if (!ice_fdir_prof_resolve_conflict
769 (pf, cflct_ptype, is_tunnel))
772 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
773 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP;
774 if (!ice_fdir_prof_resolve_conflict
775 (pf, cflct_ptype, is_tunnel))
777 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP;
778 if (!ice_fdir_prof_resolve_conflict
779 (pf, cflct_ptype, is_tunnel))
781 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP;
782 if (!ice_fdir_prof_resolve_conflict
783 (pf, cflct_ptype, is_tunnel))
787 case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
788 case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
789 case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
790 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
791 if (!ice_fdir_prof_resolve_conflict
792 (pf, cflct_ptype, is_tunnel))
795 case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
796 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
797 if (!ice_fdir_prof_resolve_conflict
798 (pf, cflct_ptype, is_tunnel))
800 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
801 if (!ice_fdir_prof_resolve_conflict
802 (pf, cflct_ptype, is_tunnel))
804 cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
805 if (!ice_fdir_prof_resolve_conflict
806 (pf, cflct_ptype, is_tunnel))
814 PMD_DRV_LOG(DEBUG, "Failed to create profile for flow type %d due to conflict with existing rule of flow type %d.",
820 ice_fdir_hw_tbl_conf(struct ice_pf *pf, struct ice_vsi *vsi,
821 struct ice_vsi *ctrl_vsi,
822 struct ice_flow_seg_info *seg,
823 enum ice_fltr_ptype ptype,
826 struct ice_hw *hw = ICE_PF_TO_HW(pf);
827 enum ice_flow_dir dir = ICE_FLOW_RX;
828 struct ice_fd_hw_prof *hw_prof;
829 struct ice_flow_prof *prof;
830 uint64_t entry_1 = 0;
831 uint64_t entry_2 = 0;
836 /* check if have input set conflict on current profile. */
837 ret = ice_fdir_cur_prof_conflict(pf, ptype, seg, is_tunnel);
841 /* check if the profile is conflict with other profile. */
842 ret = ice_fdir_cross_prof_conflict(pf, ptype, is_tunnel);
846 prof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;
847 ret = ice_flow_add_prof(hw, ICE_BLK_FD, dir, prof_id, seg,
848 (is_tunnel) ? 2 : 1, NULL, 0, &prof);
851 ret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,
852 vsi->idx, ICE_FLOW_PRIO_NORMAL,
853 seg, NULL, 0, &entry_1);
855 PMD_DRV_LOG(ERR, "Failed to add main VSI flow entry for %d.",
859 ret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,
860 ctrl_vsi->idx, ICE_FLOW_PRIO_NORMAL,
861 seg, NULL, 0, &entry_2);
863 PMD_DRV_LOG(ERR, "Failed to add control VSI flow entry for %d.",
868 hw_prof = hw->fdir_prof[ptype];
869 pf->hw_prof_cnt[ptype][is_tunnel] = 0;
871 hw_prof->fdir_seg[is_tunnel] = seg;
872 hw_prof->vsi_h[hw_prof->cnt] = vsi->idx;
873 hw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_1;
874 pf->hw_prof_cnt[ptype][is_tunnel]++;
875 hw_prof->vsi_h[hw_prof->cnt] = ctrl_vsi->idx;
876 hw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_2;
877 pf->hw_prof_cnt[ptype][is_tunnel]++;
882 vsi_num = ice_get_hw_vsi_num(hw, vsi->idx);
883 ice_rem_prof_id_flow(hw, ICE_BLK_FD, vsi_num, prof_id);
884 ice_flow_rem_entry(hw, ICE_BLK_FD, entry_1);
886 ice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);
892 ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field)
896 struct ice_inset_map {
898 enum ice_flow_field fld;
900 static const struct ice_inset_map ice_inset_map[] = {
901 {ICE_INSET_DMAC, ICE_FLOW_FIELD_IDX_ETH_DA},
902 {ICE_INSET_ETHERTYPE, ICE_FLOW_FIELD_IDX_ETH_TYPE},
903 {ICE_INSET_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},
904 {ICE_INSET_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},
905 {ICE_INSET_IPV4_TOS, ICE_FLOW_FIELD_IDX_IPV4_DSCP},
906 {ICE_INSET_IPV4_TTL, ICE_FLOW_FIELD_IDX_IPV4_TTL},
907 {ICE_INSET_IPV4_PROTO, ICE_FLOW_FIELD_IDX_IPV4_PROT},
908 {ICE_INSET_IPV4_PKID, ICE_FLOW_FIELD_IDX_IPV4_ID},
909 {ICE_INSET_IPV6_SRC, ICE_FLOW_FIELD_IDX_IPV6_SA},
910 {ICE_INSET_IPV6_DST, ICE_FLOW_FIELD_IDX_IPV6_DA},
911 {ICE_INSET_IPV6_TC, ICE_FLOW_FIELD_IDX_IPV6_DSCP},
912 {ICE_INSET_IPV6_NEXT_HDR, ICE_FLOW_FIELD_IDX_IPV6_PROT},
913 {ICE_INSET_IPV6_HOP_LIMIT, ICE_FLOW_FIELD_IDX_IPV6_TTL},
914 {ICE_INSET_IPV6_PKID, ICE_FLOW_FIELD_IDX_IPV6_ID},
915 {ICE_INSET_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},
916 {ICE_INSET_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},
917 {ICE_INSET_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},
918 {ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},
919 {ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},
920 {ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},
921 {ICE_INSET_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},
922 {ICE_INSET_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},
923 {ICE_INSET_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},
924 {ICE_INSET_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},
925 {ICE_INSET_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},
926 {ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},
927 {ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},
928 {ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},
929 {ICE_INSET_GTPU_TEID, ICE_FLOW_FIELD_IDX_GTPU_IP_TEID},
930 {ICE_INSET_GTPU_QFI, ICE_FLOW_FIELD_IDX_GTPU_EH_QFI},
931 {ICE_INSET_VXLAN_VNI, ICE_FLOW_FIELD_IDX_VXLAN_VNI},
934 for (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) {
935 if ((inset & ice_inset_map[i].inset) ==
936 ice_inset_map[i].inset)
937 field[j++] = ice_inset_map[i].fld;
942 ice_fdir_input_set_hdrs(enum ice_fltr_ptype flow, struct ice_flow_seg_info *seg)
945 case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
946 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
947 ICE_FLOW_SEG_HDR_IPV4 |
948 ICE_FLOW_SEG_HDR_IPV_OTHER);
950 case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
951 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
952 ICE_FLOW_SEG_HDR_IPV4 |
953 ICE_FLOW_SEG_HDR_IPV_OTHER);
955 case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
956 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
957 ICE_FLOW_SEG_HDR_IPV4 |
958 ICE_FLOW_SEG_HDR_IPV_OTHER);
960 case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
961 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4 |
962 ICE_FLOW_SEG_HDR_IPV_OTHER);
964 case ICE_FLTR_PTYPE_FRAG_IPV4:
965 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4 |
966 ICE_FLOW_SEG_HDR_IPV_FRAG);
968 case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
969 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
970 ICE_FLOW_SEG_HDR_IPV6 |
971 ICE_FLOW_SEG_HDR_IPV_OTHER);
973 case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
974 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
975 ICE_FLOW_SEG_HDR_IPV6 |
976 ICE_FLOW_SEG_HDR_IPV_OTHER);
978 case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
979 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
980 ICE_FLOW_SEG_HDR_IPV6 |
981 ICE_FLOW_SEG_HDR_IPV_OTHER);
983 case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
984 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6 |
985 ICE_FLOW_SEG_HDR_IPV_OTHER);
987 case ICE_FLTR_PTYPE_FRAG_IPV6:
988 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6 |
989 ICE_FLOW_SEG_HDR_IPV_FRAG);
991 case ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN:
992 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
993 ICE_FLOW_SEG_HDR_IPV4 |
994 ICE_FLOW_SEG_HDR_VXLAN |
995 ICE_FLOW_SEG_HDR_IPV_OTHER);
997 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU:
998 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
999 ICE_FLOW_SEG_HDR_IPV4 |
1000 ICE_FLOW_SEG_HDR_IPV_OTHER);
1002 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH:
1003 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
1004 ICE_FLOW_SEG_HDR_GTPU_IP |
1005 ICE_FLOW_SEG_HDR_IPV4 |
1006 ICE_FLOW_SEG_HDR_IPV_OTHER);
1008 case ICE_FLTR_PTYPE_NONF_IPV6_GTPU:
1009 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
1010 ICE_FLOW_SEG_HDR_IPV6 |
1011 ICE_FLOW_SEG_HDR_IPV_OTHER);
1013 case ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH:
1014 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
1015 ICE_FLOW_SEG_HDR_GTPU_IP |
1016 ICE_FLOW_SEG_HDR_IPV6 |
1017 ICE_FLOW_SEG_HDR_IPV_OTHER);
1019 case ICE_FLTR_PTYPE_NON_IP_L2:
1020 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_ETH_NON_IP);
1022 case ICE_FLTR_PTYPE_NONF_IPV4_ESP:
1023 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_ESP |
1024 ICE_FLOW_SEG_HDR_IPV4 |
1025 ICE_FLOW_SEG_HDR_IPV_OTHER);
1027 case ICE_FLTR_PTYPE_NONF_IPV6_ESP:
1028 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_ESP |
1029 ICE_FLOW_SEG_HDR_IPV6 |
1030 ICE_FLOW_SEG_HDR_IPV_OTHER);
1032 case ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP:
1033 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_NAT_T_ESP |
1034 ICE_FLOW_SEG_HDR_IPV4 |
1035 ICE_FLOW_SEG_HDR_IPV_OTHER);
1037 case ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP:
1038 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_NAT_T_ESP |
1039 ICE_FLOW_SEG_HDR_IPV6 |
1040 ICE_FLOW_SEG_HDR_IPV_OTHER);
1043 PMD_DRV_LOG(ERR, "not supported filter type.");
1049 ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
1050 uint64_t inner_input_set, uint64_t outer_input_set,
1051 enum ice_fdir_tunnel_type ttype)
1053 struct ice_flow_seg_info *seg;
1054 struct ice_flow_seg_info *seg_tun = NULL;
1055 enum ice_flow_field field[ICE_FLOW_FIELD_IDX_MAX];
1060 if (!(inner_input_set | outer_input_set))
1063 seg_tun = (struct ice_flow_seg_info *)
1064 ice_malloc(hw, sizeof(*seg_tun) * ICE_FD_HW_SEG_MAX);
1066 PMD_DRV_LOG(ERR, "No memory can be allocated");
1070 /* use seg_tun[1] to record tunnel inner part */
1071 for (k = 0; k <= ICE_FD_HW_SEG_TUN; k++) {
1073 input_set = (k == ICE_FD_HW_SEG_TUN) ? inner_input_set : outer_input_set;
1077 for (i = 0; i < ICE_FLOW_FIELD_IDX_MAX; i++)
1078 field[i] = ICE_FLOW_FIELD_IDX_MAX;
1080 ice_fdir_input_set_parse(input_set, field);
1082 ice_fdir_input_set_hdrs(flow, seg);
1084 for (i = 0; field[i] != ICE_FLOW_FIELD_IDX_MAX; i++) {
1085 ice_flow_set_fld(seg, field[i],
1086 ICE_FLOW_FLD_OFF_INVAL,
1087 ICE_FLOW_FLD_OFF_INVAL,
1088 ICE_FLOW_FLD_OFF_INVAL, false);
1092 is_tunnel = ice_fdir_is_tunnel_profile(ttype);
1094 ret = ice_fdir_hw_tbl_conf(pf, pf->main_vsi, pf->fdir.fdir_vsi,
1095 seg_tun, flow, is_tunnel);
1099 } else if (ret < 0) {
1101 return (ret == -EEXIST) ? 0 : ret;
1108 ice_fdir_cnt_update(struct ice_pf *pf, enum ice_fltr_ptype ptype,
1109 bool is_tunnel, bool add)
1111 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1114 cnt = (add) ? 1 : -1;
1115 hw->fdir_active_fltr += cnt;
1116 if (ptype == ICE_FLTR_PTYPE_NONF_NONE || ptype >= ICE_FLTR_PTYPE_MAX)
1117 PMD_DRV_LOG(ERR, "Unknown filter type %d", ptype);
1119 pf->fdir_fltr_cnt[ptype][is_tunnel] += cnt;
1123 ice_fdir_init(struct ice_adapter *ad)
1125 struct ice_pf *pf = &ad->pf;
1126 struct ice_flow_parser *parser;
1129 if (ad->hw.dcf_enabled)
1132 ret = ice_fdir_setup(pf);
1136 parser = &ice_fdir_parser;
1138 return ice_register_parser(parser, ad);
1142 ice_fdir_uninit(struct ice_adapter *ad)
1144 struct ice_flow_parser *parser;
1145 struct ice_pf *pf = &ad->pf;
1147 if (ad->hw.dcf_enabled)
1150 parser = &ice_fdir_parser;
1152 ice_unregister_parser(parser, ad);
1154 ice_fdir_teardown(pf);
1158 ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type)
1160 if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN)
1167 ice_fdir_add_del_filter(struct ice_pf *pf,
1168 struct ice_fdir_filter_conf *filter,
1171 struct ice_fltr_desc desc;
1172 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1173 unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
1177 filter->input.dest_vsi = pf->main_vsi->idx;
1179 memset(&desc, 0, sizeof(desc));
1180 filter->input.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
1181 ice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);
1183 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1185 memset(pkt, 0, ICE_FDIR_PKT_LEN);
1186 ret = ice_fdir_get_gen_prgm_pkt(hw, &filter->input, pkt, false, is_tun);
1188 PMD_DRV_LOG(ERR, "Generate dummy packet failed");
1192 return ice_fdir_programming(pf, &desc);
1196 ice_fdir_extract_fltr_key(struct ice_fdir_fltr_pattern *key,
1197 struct ice_fdir_filter_conf *filter)
1199 struct ice_fdir_fltr *input = &filter->input;
1200 memset(key, 0, sizeof(*key));
1202 key->flow_type = input->flow_type;
1203 rte_memcpy(&key->ip, &input->ip, sizeof(key->ip));
1204 rte_memcpy(&key->mask, &input->mask, sizeof(key->mask));
1205 rte_memcpy(&key->ext_data, &input->ext_data, sizeof(key->ext_data));
1206 rte_memcpy(&key->ext_mask, &input->ext_mask, sizeof(key->ext_mask));
1208 rte_memcpy(&key->gtpu_data, &input->gtpu_data, sizeof(key->gtpu_data));
1209 rte_memcpy(&key->gtpu_mask, &input->gtpu_mask, sizeof(key->gtpu_mask));
1211 key->tunnel_type = filter->tunnel_type;
1214 /* Check if there exists the flow director filter */
1215 static struct ice_fdir_filter_conf *
1216 ice_fdir_entry_lookup(struct ice_fdir_info *fdir_info,
1217 const struct ice_fdir_fltr_pattern *key)
1221 ret = rte_hash_lookup(fdir_info->hash_table, key);
1225 return fdir_info->hash_map[ret];
1228 /* Add a flow director entry into the SW list */
1230 ice_fdir_entry_insert(struct ice_pf *pf,
1231 struct ice_fdir_filter_conf *entry,
1232 struct ice_fdir_fltr_pattern *key)
1234 struct ice_fdir_info *fdir_info = &pf->fdir;
1237 ret = rte_hash_add_key(fdir_info->hash_table, key);
1240 "Failed to insert fdir entry to hash table %d!",
1244 fdir_info->hash_map[ret] = entry;
1249 /* Delete a flow director entry from the SW list */
1251 ice_fdir_entry_del(struct ice_pf *pf, struct ice_fdir_fltr_pattern *key)
1253 struct ice_fdir_info *fdir_info = &pf->fdir;
1256 ret = rte_hash_del_key(fdir_info->hash_table, key);
1259 "Failed to delete fdir filter to hash table %d!",
1263 fdir_info->hash_map[ret] = NULL;
1269 ice_fdir_create_filter(struct ice_adapter *ad,
1270 struct rte_flow *flow,
1272 struct rte_flow_error *error)
1274 struct ice_pf *pf = &ad->pf;
1275 struct ice_fdir_filter_conf *filter = meta;
1276 struct ice_fdir_info *fdir_info = &pf->fdir;
1277 struct ice_fdir_filter_conf *entry, *node;
1278 struct ice_fdir_fltr_pattern key;
1282 ice_fdir_extract_fltr_key(&key, filter);
1283 node = ice_fdir_entry_lookup(fdir_info, &key);
1285 rte_flow_error_set(error, EEXIST,
1286 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1287 "Rule already exists!");
1291 entry = rte_zmalloc("fdir_entry", sizeof(*entry), 0);
1293 rte_flow_error_set(error, ENOMEM,
1294 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1295 "Failed to allocate memory");
1299 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1301 ret = ice_fdir_input_set_conf(pf, filter->input.flow_type,
1302 filter->input_set_i, filter->input_set_o,
1303 filter->tunnel_type);
1305 rte_flow_error_set(error, -ret,
1306 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1307 "Profile configure failed.");
1311 /* alloc counter for FDIR */
1312 if (filter->input.cnt_ena) {
1313 struct rte_flow_action_count *act_count = &filter->act_count;
1315 filter->counter = ice_fdir_counter_alloc(pf,
1318 if (!filter->counter) {
1319 rte_flow_error_set(error, EINVAL,
1320 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1321 "Failed to alloc FDIR counter.");
1324 filter->input.cnt_index = filter->counter->hw_index;
1327 ret = ice_fdir_add_del_filter(pf, filter, true);
1329 rte_flow_error_set(error, -ret,
1330 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1331 "Add filter rule failed.");
1335 if (filter->mark_flag == 1)
1336 ice_fdir_rx_parsing_enable(ad, 1);
1338 rte_memcpy(entry, filter, sizeof(*entry));
1339 ret = ice_fdir_entry_insert(pf, entry, &key);
1341 rte_flow_error_set(error, -ret,
1342 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1343 "Insert entry to table failed.");
1348 ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, true);
1353 if (filter->counter) {
1354 ice_fdir_counter_free(pf, filter->counter);
1355 filter->counter = NULL;
1364 ice_fdir_destroy_filter(struct ice_adapter *ad,
1365 struct rte_flow *flow,
1366 struct rte_flow_error *error)
1368 struct ice_pf *pf = &ad->pf;
1369 struct ice_fdir_info *fdir_info = &pf->fdir;
1370 struct ice_fdir_filter_conf *filter, *entry;
1371 struct ice_fdir_fltr_pattern key;
1375 filter = (struct ice_fdir_filter_conf *)flow->rule;
1377 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1379 if (filter->counter) {
1380 ice_fdir_counter_free(pf, filter->counter);
1381 filter->counter = NULL;
1384 ice_fdir_extract_fltr_key(&key, filter);
1385 entry = ice_fdir_entry_lookup(fdir_info, &key);
1387 rte_flow_error_set(error, ENOENT,
1388 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1389 "Can't find entry.");
1393 ret = ice_fdir_add_del_filter(pf, filter, false);
1395 rte_flow_error_set(error, -ret,
1396 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1397 "Del filter rule failed.");
1401 ret = ice_fdir_entry_del(pf, &key);
1403 rte_flow_error_set(error, -ret,
1404 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1405 "Remove entry from table failed.");
1409 ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, false);
1411 if (filter->mark_flag == 1)
1412 ice_fdir_rx_parsing_enable(ad, 0);
1422 ice_fdir_query_count(struct ice_adapter *ad,
1423 struct rte_flow *flow,
1424 struct rte_flow_query_count *flow_stats,
1425 struct rte_flow_error *error)
1427 struct ice_pf *pf = &ad->pf;
1428 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1429 struct ice_fdir_filter_conf *filter = flow->rule;
1430 struct ice_fdir_counter *counter = filter->counter;
1431 uint64_t hits_lo, hits_hi;
1434 rte_flow_error_set(error, EINVAL,
1435 RTE_FLOW_ERROR_TYPE_ACTION,
1437 "FDIR counters not available");
1442 * Reading the low 32-bits latches the high 32-bits into a shadow
1443 * register. Reading the high 32-bit returns the value in the
1446 hits_lo = ICE_READ_REG(hw, GLSTAT_FD_CNT0L(counter->hw_index));
1447 hits_hi = ICE_READ_REG(hw, GLSTAT_FD_CNT0H(counter->hw_index));
1449 flow_stats->hits_set = 1;
1450 flow_stats->hits = hits_lo | (hits_hi << 32);
1451 flow_stats->bytes_set = 0;
1452 flow_stats->bytes = 0;
1454 if (flow_stats->reset) {
1455 /* reset statistic counter value */
1456 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0H(counter->hw_index), 0);
1457 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0L(counter->hw_index), 0);
1463 static struct ice_flow_engine ice_fdir_engine = {
1464 .init = ice_fdir_init,
1465 .uninit = ice_fdir_uninit,
1466 .create = ice_fdir_create_filter,
1467 .destroy = ice_fdir_destroy_filter,
1468 .query_count = ice_fdir_query_count,
1469 .type = ICE_FLOW_ENGINE_FDIR,
1473 ice_fdir_parse_action_qregion(struct ice_pf *pf,
1474 struct rte_flow_error *error,
1475 const struct rte_flow_action *act,
1476 struct ice_fdir_filter_conf *filter)
1478 const struct rte_flow_action_rss *rss = act->conf;
1481 if (act->type != RTE_FLOW_ACTION_TYPE_RSS) {
1482 rte_flow_error_set(error, EINVAL,
1483 RTE_FLOW_ERROR_TYPE_ACTION, act,
1488 if (rss->queue_num <= 1) {
1489 rte_flow_error_set(error, EINVAL,
1490 RTE_FLOW_ERROR_TYPE_ACTION, act,
1491 "Queue region size can't be 0 or 1.");
1495 /* check if queue index for queue region is continuous */
1496 for (i = 0; i < rss->queue_num - 1; i++) {
1497 if (rss->queue[i + 1] != rss->queue[i] + 1) {
1498 rte_flow_error_set(error, EINVAL,
1499 RTE_FLOW_ERROR_TYPE_ACTION, act,
1500 "Discontinuous queue region");
1505 if (rss->queue[rss->queue_num - 1] >= pf->dev_data->nb_rx_queues) {
1506 rte_flow_error_set(error, EINVAL,
1507 RTE_FLOW_ERROR_TYPE_ACTION, act,
1508 "Invalid queue region indexes.");
1512 if (!(rte_is_power_of_2(rss->queue_num) &&
1513 (rss->queue_num <= ICE_FDIR_MAX_QREGION_SIZE))) {
1514 rte_flow_error_set(error, EINVAL,
1515 RTE_FLOW_ERROR_TYPE_ACTION, act,
1516 "The region size should be any of the following values:"
1517 "1, 2, 4, 8, 16, 32, 64, 128 as long as the total number "
1518 "of queues do not exceed the VSI allocation.");
1522 filter->input.q_index = rss->queue[0];
1523 filter->input.q_region = rte_fls_u32(rss->queue_num) - 1;
1524 filter->input.dest_ctl = ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP;
1530 ice_fdir_parse_action(struct ice_adapter *ad,
1531 const struct rte_flow_action actions[],
1532 struct rte_flow_error *error,
1533 struct ice_fdir_filter_conf *filter)
1535 struct ice_pf *pf = &ad->pf;
1536 const struct rte_flow_action_queue *act_q;
1537 const struct rte_flow_action_mark *mark_spec = NULL;
1538 const struct rte_flow_action_count *act_count;
1539 uint32_t dest_num = 0;
1540 uint32_t mark_num = 0;
1541 uint32_t counter_num = 0;
1544 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
1545 switch (actions->type) {
1546 case RTE_FLOW_ACTION_TYPE_VOID:
1548 case RTE_FLOW_ACTION_TYPE_QUEUE:
1551 act_q = actions->conf;
1552 filter->input.q_index = act_q->index;
1553 if (filter->input.q_index >=
1554 pf->dev_data->nb_rx_queues) {
1555 rte_flow_error_set(error, EINVAL,
1556 RTE_FLOW_ERROR_TYPE_ACTION,
1558 "Invalid queue for FDIR.");
1561 filter->input.dest_ctl =
1562 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX;
1564 case RTE_FLOW_ACTION_TYPE_DROP:
1567 filter->input.dest_ctl =
1568 ICE_FLTR_PRGM_DESC_DEST_DROP_PKT;
1570 case RTE_FLOW_ACTION_TYPE_PASSTHRU:
1573 filter->input.dest_ctl =
1574 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER;
1576 case RTE_FLOW_ACTION_TYPE_RSS:
1579 ret = ice_fdir_parse_action_qregion(pf,
1580 error, actions, filter);
1584 case RTE_FLOW_ACTION_TYPE_MARK:
1586 filter->mark_flag = 1;
1587 mark_spec = actions->conf;
1588 filter->input.fltr_id = mark_spec->id;
1589 filter->input.fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ONE;
1591 case RTE_FLOW_ACTION_TYPE_COUNT:
1594 act_count = actions->conf;
1595 filter->input.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
1596 rte_memcpy(&filter->act_count, act_count,
1597 sizeof(filter->act_count));
1601 rte_flow_error_set(error, EINVAL,
1602 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1608 if (dest_num >= 2) {
1609 rte_flow_error_set(error, EINVAL,
1610 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1611 "Unsupported action combination");
1615 if (mark_num >= 2) {
1616 rte_flow_error_set(error, EINVAL,
1617 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1618 "Too many mark actions");
1622 if (counter_num >= 2) {
1623 rte_flow_error_set(error, EINVAL,
1624 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1625 "Too many count actions");
1629 if (dest_num + mark_num + counter_num == 0) {
1630 rte_flow_error_set(error, EINVAL,
1631 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1636 /* set default action to PASSTHRU mode, in "mark/count only" case. */
1638 filter->input.dest_ctl =
1639 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER;
1645 ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
1646 const struct rte_flow_item pattern[],
1647 struct rte_flow_error *error,
1648 struct ice_fdir_filter_conf *filter)
1650 const struct rte_flow_item *item = pattern;
1651 enum rte_flow_item_type item_type;
1652 enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;
1653 enum rte_flow_item_type l4 = RTE_FLOW_ITEM_TYPE_END;
1654 enum ice_fdir_tunnel_type tunnel_type = ICE_FDIR_TUNNEL_TYPE_NONE;
1655 const struct rte_flow_item_eth *eth_spec, *eth_mask;
1656 const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_last, *ipv4_mask;
1657 const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;
1658 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_spec,
1659 *ipv6_frag_last, *ipv6_frag_mask;
1660 const struct rte_flow_item_tcp *tcp_spec, *tcp_mask;
1661 const struct rte_flow_item_udp *udp_spec, *udp_mask;
1662 const struct rte_flow_item_sctp *sctp_spec, *sctp_mask;
1663 const struct rte_flow_item_vxlan *vxlan_spec, *vxlan_mask;
1664 const struct rte_flow_item_gtp *gtp_spec, *gtp_mask;
1665 const struct rte_flow_item_gtp_psc *gtp_psc_spec, *gtp_psc_mask;
1666 const struct rte_flow_item_esp *esp_spec, *esp_mask;
1667 uint64_t input_set_i = ICE_INSET_NONE; /* only for tunnel inner */
1668 uint64_t input_set_o = ICE_INSET_NONE; /* non-tunnel and tunnel outer */
1669 uint64_t *input_set;
1670 uint8_t flow_type = ICE_FLTR_PTYPE_NONF_NONE;
1671 uint8_t ipv6_addr_mask[16] = {
1672 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1673 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
1675 uint32_t vtc_flow_cpu;
1676 uint16_t ether_type;
1677 enum rte_flow_item_type next_type;
1678 bool is_outer = true;
1679 struct ice_fdir_extra *p_ext_data;
1680 struct ice_fdir_v4 *p_v4 = NULL;
1681 struct ice_fdir_v6 *p_v6 = NULL;
1683 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
1684 if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN)
1685 tunnel_type = ICE_FDIR_TUNNEL_TYPE_VXLAN;
1686 /* To align with shared code behavior, save gtpu outer
1687 * fields in inner struct.
1689 if (item->type == RTE_FLOW_ITEM_TYPE_GTPU ||
1690 item->type == RTE_FLOW_ITEM_TYPE_GTP_PSC) {
1695 /* This loop parse flow pattern and distinguish Non-tunnel and tunnel
1696 * flow. input_set_i is used for inner part.
1698 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
1699 item_type = item->type;
1701 if (item->last && !(item_type == RTE_FLOW_ITEM_TYPE_IPV4 ||
1703 RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT)) {
1704 rte_flow_error_set(error, EINVAL,
1705 RTE_FLOW_ERROR_TYPE_ITEM, item,
1706 "Not support range");
1709 input_set = (tunnel_type && !is_outer) ?
1710 &input_set_i : &input_set_o;
1712 switch (item_type) {
1713 case RTE_FLOW_ITEM_TYPE_ETH:
1714 flow_type = ICE_FLTR_PTYPE_NON_IP_L2;
1715 eth_spec = item->spec;
1716 eth_mask = item->mask;
1718 if (!(eth_spec && eth_mask))
1721 if (!rte_is_zero_ether_addr(ð_mask->dst))
1722 *input_set |= ICE_INSET_DMAC;
1723 if (!rte_is_zero_ether_addr(ð_mask->src))
1724 *input_set |= ICE_INSET_SMAC;
1726 next_type = (item + 1)->type;
1727 /* Ignore this field except for ICE_FLTR_PTYPE_NON_IP_L2 */
1728 if (eth_mask->type == RTE_BE16(0xffff) &&
1729 next_type == RTE_FLOW_ITEM_TYPE_END) {
1730 *input_set |= ICE_INSET_ETHERTYPE;
1731 ether_type = rte_be_to_cpu_16(eth_spec->type);
1733 if (ether_type == RTE_ETHER_TYPE_IPV4 ||
1734 ether_type == RTE_ETHER_TYPE_IPV6) {
1735 rte_flow_error_set(error, EINVAL,
1736 RTE_FLOW_ERROR_TYPE_ITEM,
1738 "Unsupported ether_type.");
1743 p_ext_data = (tunnel_type && is_outer) ?
1744 &filter->input.ext_data_outer :
1745 &filter->input.ext_data;
1746 rte_memcpy(&p_ext_data->src_mac,
1747 ð_spec->src, RTE_ETHER_ADDR_LEN);
1748 rte_memcpy(&p_ext_data->dst_mac,
1749 ð_spec->dst, RTE_ETHER_ADDR_LEN);
1750 rte_memcpy(&p_ext_data->ether_type,
1751 ð_spec->type, sizeof(eth_spec->type));
1753 case RTE_FLOW_ITEM_TYPE_IPV4:
1754 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
1755 l3 = RTE_FLOW_ITEM_TYPE_IPV4;
1756 ipv4_spec = item->spec;
1757 ipv4_last = item->last;
1758 ipv4_mask = item->mask;
1759 p_v4 = (tunnel_type && is_outer) ?
1760 &filter->input.ip_outer.v4 :
1761 &filter->input.ip.v4;
1763 if (!(ipv4_spec && ipv4_mask))
1766 /* Check IPv4 mask and update input set */
1767 if (ipv4_mask->hdr.version_ihl ||
1768 ipv4_mask->hdr.total_length ||
1769 ipv4_mask->hdr.hdr_checksum) {
1770 rte_flow_error_set(error, EINVAL,
1771 RTE_FLOW_ERROR_TYPE_ITEM,
1773 "Invalid IPv4 mask.");
1778 (ipv4_last->hdr.version_ihl ||
1779 ipv4_last->hdr.type_of_service ||
1780 ipv4_last->hdr.time_to_live ||
1781 ipv4_last->hdr.total_length |
1782 ipv4_last->hdr.next_proto_id ||
1783 ipv4_last->hdr.hdr_checksum ||
1784 ipv4_last->hdr.src_addr ||
1785 ipv4_last->hdr.dst_addr)) {
1786 rte_flow_error_set(error, EINVAL,
1787 RTE_FLOW_ERROR_TYPE_ITEM,
1788 item, "Invalid IPv4 last.");
1792 if (ipv4_mask->hdr.dst_addr == UINT32_MAX)
1793 *input_set |= ICE_INSET_IPV4_DST;
1794 if (ipv4_mask->hdr.src_addr == UINT32_MAX)
1795 *input_set |= ICE_INSET_IPV4_SRC;
1796 if (ipv4_mask->hdr.time_to_live == UINT8_MAX)
1797 *input_set |= ICE_INSET_IPV4_TTL;
1798 if (ipv4_mask->hdr.next_proto_id == UINT8_MAX)
1799 *input_set |= ICE_INSET_IPV4_PROTO;
1800 if (ipv4_mask->hdr.type_of_service == UINT8_MAX)
1801 *input_set |= ICE_INSET_IPV4_TOS;
1803 p_v4->dst_ip = ipv4_spec->hdr.dst_addr;
1804 p_v4->src_ip = ipv4_spec->hdr.src_addr;
1805 p_v4->ttl = ipv4_spec->hdr.time_to_live;
1806 p_v4->proto = ipv4_spec->hdr.next_proto_id;
1807 p_v4->tos = ipv4_spec->hdr.type_of_service;
1809 /* only support any packet id for fragment IPv4
1811 * spec is 0, last is 0xffff, mask is 0xffff
1813 * spec is 0x2000, mask is 0xffff
1815 if (ipv4_last && ipv4_spec->hdr.packet_id == 0 &&
1816 ipv4_last->hdr.packet_id == UINT16_MAX &&
1817 ipv4_mask->hdr.packet_id == UINT16_MAX &&
1818 ipv4_spec->hdr.fragment_offset ==
1819 rte_cpu_to_be_16(RTE_IPV4_HDR_MF_FLAG) &&
1820 ipv4_mask->hdr.fragment_offset == UINT16_MAX) {
1821 /* all IPv4 fragment packet has the same
1822 * ethertype, if the spec is for all valid
1823 * packet id, set ethertype into input set.
1825 flow_type = ICE_FLTR_PTYPE_FRAG_IPV4;
1826 *input_set |= ICE_INSET_ETHERTYPE;
1827 input_set_o |= ICE_INSET_ETHERTYPE;
1828 } else if (ipv4_mask->hdr.packet_id == UINT16_MAX) {
1829 rte_flow_error_set(error, EINVAL,
1830 RTE_FLOW_ERROR_TYPE_ITEM,
1831 item, "Invalid IPv4 mask.");
1836 case RTE_FLOW_ITEM_TYPE_IPV6:
1837 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
1838 l3 = RTE_FLOW_ITEM_TYPE_IPV6;
1839 ipv6_spec = item->spec;
1840 ipv6_mask = item->mask;
1841 p_v6 = (tunnel_type && is_outer) ?
1842 &filter->input.ip_outer.v6 :
1843 &filter->input.ip.v6;
1845 if (!(ipv6_spec && ipv6_mask))
1848 /* Check IPv6 mask and update input set */
1849 if (ipv6_mask->hdr.payload_len) {
1850 rte_flow_error_set(error, EINVAL,
1851 RTE_FLOW_ERROR_TYPE_ITEM,
1853 "Invalid IPv6 mask");
1857 if (!memcmp(ipv6_mask->hdr.src_addr, ipv6_addr_mask,
1858 RTE_DIM(ipv6_mask->hdr.src_addr)))
1859 *input_set |= ICE_INSET_IPV6_SRC;
1860 if (!memcmp(ipv6_mask->hdr.dst_addr, ipv6_addr_mask,
1861 RTE_DIM(ipv6_mask->hdr.dst_addr)))
1862 *input_set |= ICE_INSET_IPV6_DST;
1864 if ((ipv6_mask->hdr.vtc_flow &
1865 rte_cpu_to_be_32(ICE_IPV6_TC_MASK))
1866 == rte_cpu_to_be_32(ICE_IPV6_TC_MASK))
1867 *input_set |= ICE_INSET_IPV6_TC;
1868 if (ipv6_mask->hdr.proto == UINT8_MAX)
1869 *input_set |= ICE_INSET_IPV6_NEXT_HDR;
1870 if (ipv6_mask->hdr.hop_limits == UINT8_MAX)
1871 *input_set |= ICE_INSET_IPV6_HOP_LIMIT;
1873 rte_memcpy(&p_v6->dst_ip, ipv6_spec->hdr.dst_addr, 16);
1874 rte_memcpy(&p_v6->src_ip, ipv6_spec->hdr.src_addr, 16);
1875 vtc_flow_cpu = rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);
1876 p_v6->tc = (uint8_t)(vtc_flow_cpu >> ICE_FDIR_IPV6_TC_OFFSET);
1877 p_v6->proto = ipv6_spec->hdr.proto;
1878 p_v6->hlim = ipv6_spec->hdr.hop_limits;
1880 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
1881 l3 = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT;
1882 flow_type = ICE_FLTR_PTYPE_FRAG_IPV6;
1883 ipv6_frag_spec = item->spec;
1884 ipv6_frag_last = item->last;
1885 ipv6_frag_mask = item->mask;
1887 if (!(ipv6_frag_spec && ipv6_frag_mask))
1890 /* only support any packet id for fragment IPv6
1892 * spec is 0, last is 0xffffffff, mask is 0xffffffff
1894 * spec is 0x1, mask is 0xffff
1896 if (ipv6_frag_last && ipv6_frag_spec->hdr.id == 0 &&
1897 ipv6_frag_last->hdr.id == UINT32_MAX &&
1898 ipv6_frag_mask->hdr.id == UINT32_MAX &&
1899 ipv6_frag_spec->hdr.frag_data ==
1900 rte_cpu_to_be_16(1) &&
1901 ipv6_frag_mask->hdr.frag_data == UINT16_MAX) {
1902 /* all IPv6 fragment packet has the same
1903 * ethertype, if the spec is for all valid
1904 * packet id, set ethertype into input set.
1906 *input_set |= ICE_INSET_ETHERTYPE;
1907 input_set_o |= ICE_INSET_ETHERTYPE;
1908 } else if (ipv6_frag_mask->hdr.id == UINT32_MAX) {
1909 rte_flow_error_set(error, EINVAL,
1910 RTE_FLOW_ERROR_TYPE_ITEM,
1911 item, "Invalid IPv6 mask.");
1917 case RTE_FLOW_ITEM_TYPE_TCP:
1918 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
1919 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
1920 if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
1921 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
1923 tcp_spec = item->spec;
1924 tcp_mask = item->mask;
1926 if (!(tcp_spec && tcp_mask))
1929 /* Check TCP mask and update input set */
1930 if (tcp_mask->hdr.sent_seq ||
1931 tcp_mask->hdr.recv_ack ||
1932 tcp_mask->hdr.data_off ||
1933 tcp_mask->hdr.tcp_flags ||
1934 tcp_mask->hdr.rx_win ||
1935 tcp_mask->hdr.cksum ||
1936 tcp_mask->hdr.tcp_urp) {
1937 rte_flow_error_set(error, EINVAL,
1938 RTE_FLOW_ERROR_TYPE_ITEM,
1940 "Invalid TCP mask");
1944 if (tcp_mask->hdr.src_port == UINT16_MAX)
1945 *input_set |= ICE_INSET_TCP_SRC_PORT;
1946 if (tcp_mask->hdr.dst_port == UINT16_MAX)
1947 *input_set |= ICE_INSET_TCP_DST_PORT;
1949 /* Get filter info */
1950 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
1952 p_v4->dst_port = tcp_spec->hdr.dst_port;
1953 p_v4->src_port = tcp_spec->hdr.src_port;
1954 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
1956 p_v6->dst_port = tcp_spec->hdr.dst_port;
1957 p_v6->src_port = tcp_spec->hdr.src_port;
1960 case RTE_FLOW_ITEM_TYPE_UDP:
1961 l4 = RTE_FLOW_ITEM_TYPE_UDP;
1962 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
1963 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
1964 if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
1965 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
1967 udp_spec = item->spec;
1968 udp_mask = item->mask;
1970 if (!(udp_spec && udp_mask))
1973 /* Check UDP mask and update input set*/
1974 if (udp_mask->hdr.dgram_len ||
1975 udp_mask->hdr.dgram_cksum) {
1976 rte_flow_error_set(error, EINVAL,
1977 RTE_FLOW_ERROR_TYPE_ITEM,
1979 "Invalid UDP mask");
1983 if (udp_mask->hdr.src_port == UINT16_MAX)
1984 *input_set |= ICE_INSET_UDP_SRC_PORT;
1985 if (udp_mask->hdr.dst_port == UINT16_MAX)
1986 *input_set |= ICE_INSET_UDP_DST_PORT;
1988 /* Get filter info */
1989 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
1991 p_v4->dst_port = udp_spec->hdr.dst_port;
1992 p_v4->src_port = udp_spec->hdr.src_port;
1993 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
1995 p_v6->src_port = udp_spec->hdr.src_port;
1996 p_v6->dst_port = udp_spec->hdr.dst_port;
1999 case RTE_FLOW_ITEM_TYPE_SCTP:
2000 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
2001 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
2002 if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
2003 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
2005 sctp_spec = item->spec;
2006 sctp_mask = item->mask;
2008 if (!(sctp_spec && sctp_mask))
2011 /* Check SCTP mask and update input set */
2012 if (sctp_mask->hdr.cksum) {
2013 rte_flow_error_set(error, EINVAL,
2014 RTE_FLOW_ERROR_TYPE_ITEM,
2016 "Invalid UDP mask");
2020 if (sctp_mask->hdr.src_port == UINT16_MAX)
2021 *input_set |= ICE_INSET_SCTP_SRC_PORT;
2022 if (sctp_mask->hdr.dst_port == UINT16_MAX)
2023 *input_set |= ICE_INSET_SCTP_DST_PORT;
2025 /* Get filter info */
2026 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
2028 p_v4->dst_port = sctp_spec->hdr.dst_port;
2029 p_v4->src_port = sctp_spec->hdr.src_port;
2030 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
2032 p_v6->dst_port = sctp_spec->hdr.dst_port;
2033 p_v6->src_port = sctp_spec->hdr.src_port;
2036 case RTE_FLOW_ITEM_TYPE_VOID:
2038 case RTE_FLOW_ITEM_TYPE_VXLAN:
2039 l3 = RTE_FLOW_ITEM_TYPE_END;
2040 vxlan_spec = item->spec;
2041 vxlan_mask = item->mask;
2044 if (!(vxlan_spec && vxlan_mask))
2047 if (vxlan_mask->hdr.vx_flags) {
2048 rte_flow_error_set(error, EINVAL,
2049 RTE_FLOW_ERROR_TYPE_ITEM,
2051 "Invalid vxlan field");
2055 if (vxlan_mask->hdr.vx_vni)
2056 *input_set |= ICE_INSET_VXLAN_VNI;
2058 filter->input.vxlan_data.vni = vxlan_spec->hdr.vx_vni;
2061 case RTE_FLOW_ITEM_TYPE_GTPU:
2062 l3 = RTE_FLOW_ITEM_TYPE_END;
2063 tunnel_type = ICE_FDIR_TUNNEL_TYPE_GTPU;
2064 gtp_spec = item->spec;
2065 gtp_mask = item->mask;
2067 if (!(gtp_spec && gtp_mask))
2070 if (gtp_mask->v_pt_rsv_flags ||
2071 gtp_mask->msg_type ||
2072 gtp_mask->msg_len) {
2073 rte_flow_error_set(error, EINVAL,
2074 RTE_FLOW_ERROR_TYPE_ITEM,
2076 "Invalid GTP mask");
2080 if (gtp_mask->teid == UINT32_MAX)
2081 input_set_o |= ICE_INSET_GTPU_TEID;
2083 filter->input.gtpu_data.teid = gtp_spec->teid;
2085 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
2086 tunnel_type = ICE_FDIR_TUNNEL_TYPE_GTPU_EH;
2087 gtp_psc_spec = item->spec;
2088 gtp_psc_mask = item->mask;
2090 if (!(gtp_psc_spec && gtp_psc_mask))
2093 if (gtp_psc_mask->qfi == UINT8_MAX)
2094 input_set_o |= ICE_INSET_GTPU_QFI;
2096 filter->input.gtpu_data.qfi =
2099 case RTE_FLOW_ITEM_TYPE_ESP:
2100 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4 &&
2101 l4 == RTE_FLOW_ITEM_TYPE_UDP)
2102 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP;
2103 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6 &&
2104 l4 == RTE_FLOW_ITEM_TYPE_UDP)
2105 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP;
2106 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV4 &&
2107 l4 == RTE_FLOW_ITEM_TYPE_END)
2108 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_ESP;
2109 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6 &&
2110 l4 == RTE_FLOW_ITEM_TYPE_END)
2111 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_ESP;
2113 esp_spec = item->spec;
2114 esp_mask = item->mask;
2116 if (!(esp_spec && esp_mask))
2119 if (esp_mask->hdr.spi == UINT32_MAX)
2120 *input_set |= ICE_INSET_ESP_SPI;
2122 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
2123 filter->input.ip.v4.sec_parm_idx =
2125 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
2126 filter->input.ip.v6.sec_parm_idx =
2130 rte_flow_error_set(error, EINVAL,
2131 RTE_FLOW_ERROR_TYPE_ITEM,
2133 "Invalid pattern item.");
2138 if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU &&
2139 flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
2140 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU;
2141 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU_EH &&
2142 flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
2143 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH;
2144 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU &&
2145 flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP)
2146 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_GTPU;
2147 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU_EH &&
2148 flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP)
2149 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH;
2150 else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN)
2151 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN;
2153 filter->tunnel_type = tunnel_type;
2154 filter->input.flow_type = flow_type;
2155 filter->input_set_o = input_set_o;
2156 filter->input_set_i = input_set_i;
2162 ice_fdir_parse(struct ice_adapter *ad,
2163 struct ice_pattern_match_item *array,
2165 const struct rte_flow_item pattern[],
2166 const struct rte_flow_action actions[],
2167 uint32_t priority __rte_unused,
2169 struct rte_flow_error *error)
2171 struct ice_pf *pf = &ad->pf;
2172 struct ice_fdir_filter_conf *filter = &pf->fdir.conf;
2173 struct ice_pattern_match_item *item = NULL;
2177 memset(filter, 0, sizeof(*filter));
2178 item = ice_search_pattern_match_item(ad, pattern, array, array_len,
2183 ret = ice_fdir_parse_pattern(ad, pattern, error, filter);
2186 input_set = filter->input_set_o | filter->input_set_i;
2187 if (!input_set || filter->input_set_o &
2188 ~(item->input_set_mask_o | ICE_INSET_ETHERTYPE) ||
2189 filter->input_set_i & ~item->input_set_mask_i) {
2190 rte_flow_error_set(error, EINVAL,
2191 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2193 "Invalid input set");
2198 ret = ice_fdir_parse_action(ad, actions, error, filter);
2209 static struct ice_flow_parser ice_fdir_parser = {
2210 .engine = &ice_fdir_engine,
2211 .array = ice_fdir_pattern_list,
2212 .array_len = RTE_DIM(ice_fdir_pattern_list),
2213 .parse_pattern_action = ice_fdir_parse,
2214 .stage = ICE_FLOW_STAGE_DISTRIBUTOR,
2217 RTE_INIT(ice_fdir_engine_register)
2219 ice_register_flow_engine(&ice_fdir_engine);