4 #include <rte_hash_crc.h>
5 #include "base/ice_fdir.h"
6 #include "base/ice_flow.h"
7 #include "base/ice_type.h"
8 #include "ice_ethdev.h"
10 #include "ice_generic_flow.h"
12 #define ICE_FDIR_IPV6_TC_OFFSET 20
13 #define ICE_IPV6_TC_MASK (0xFF << ICE_FDIR_IPV6_TC_OFFSET)
15 #define ICE_FDIR_MAX_QREGION_SIZE 128
17 #define ICE_FDIR_INSET_ETH_IPV4 (\
19 ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_IPV4_TOS | \
20 ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_PROTO)
22 #define ICE_FDIR_INSET_ETH_IPV4_UDP (\
23 ICE_FDIR_INSET_ETH_IPV4 | \
24 ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
26 #define ICE_FDIR_INSET_ETH_IPV4_TCP (\
27 ICE_FDIR_INSET_ETH_IPV4 | \
28 ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
30 #define ICE_FDIR_INSET_ETH_IPV4_SCTP (\
31 ICE_FDIR_INSET_ETH_IPV4 | \
32 ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
34 #define ICE_FDIR_INSET_ETH_IPV6 (\
36 ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | ICE_INSET_IPV6_TC | \
37 ICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_NEXT_HDR)
39 #define ICE_FDIR_INSET_ETH_IPV6_UDP (\
40 ICE_FDIR_INSET_ETH_IPV6 | \
41 ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
43 #define ICE_FDIR_INSET_ETH_IPV6_TCP (\
44 ICE_FDIR_INSET_ETH_IPV6 | \
45 ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
47 #define ICE_FDIR_INSET_ETH_IPV6_SCTP (\
48 ICE_FDIR_INSET_ETH_IPV6 | \
49 ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
51 #define ICE_FDIR_INSET_VXLAN_IPV4 (\
52 ICE_INSET_TUN_IPV4_SRC | ICE_INSET_TUN_IPV4_DST)
54 #define ICE_FDIR_INSET_VXLAN_IPV4_TCP (\
55 ICE_FDIR_INSET_VXLAN_IPV4 | \
56 ICE_INSET_TUN_TCP_SRC_PORT | ICE_INSET_TUN_TCP_DST_PORT)
58 #define ICE_FDIR_INSET_VXLAN_IPV4_UDP (\
59 ICE_FDIR_INSET_VXLAN_IPV4 | \
60 ICE_INSET_TUN_UDP_SRC_PORT | ICE_INSET_TUN_UDP_DST_PORT)
62 #define ICE_FDIR_INSET_VXLAN_IPV4_SCTP (\
63 ICE_FDIR_INSET_VXLAN_IPV4 | \
64 ICE_INSET_TUN_SCTP_SRC_PORT | ICE_INSET_TUN_SCTP_DST_PORT)
66 #define ICE_FDIR_INSET_GTPU_IPV4 (\
67 ICE_INSET_GTPU_TEID | ICE_INSET_GTPU_QFI)
69 static struct ice_pattern_match_item ice_fdir_pattern_os[] = {
70 {pattern_eth_ipv4, ICE_FDIR_INSET_ETH_IPV4, ICE_INSET_NONE},
71 {pattern_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE},
72 {pattern_eth_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_TCP, ICE_INSET_NONE},
73 {pattern_eth_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_SCTP, ICE_INSET_NONE},
74 {pattern_eth_ipv6, ICE_FDIR_INSET_ETH_IPV6, ICE_INSET_NONE},
75 {pattern_eth_ipv6_udp, ICE_FDIR_INSET_ETH_IPV6_UDP, ICE_INSET_NONE},
76 {pattern_eth_ipv6_tcp, ICE_FDIR_INSET_ETH_IPV6_TCP, ICE_INSET_NONE},
77 {pattern_eth_ipv6_sctp, ICE_FDIR_INSET_ETH_IPV6_SCTP, ICE_INSET_NONE},
78 {pattern_eth_ipv4_udp_vxlan_ipv4,
79 ICE_FDIR_INSET_VXLAN_IPV4, ICE_INSET_NONE},
80 {pattern_eth_ipv4_udp_vxlan_ipv4_udp,
81 ICE_FDIR_INSET_VXLAN_IPV4_UDP, ICE_INSET_NONE},
82 {pattern_eth_ipv4_udp_vxlan_ipv4_tcp,
83 ICE_FDIR_INSET_VXLAN_IPV4_TCP, ICE_INSET_NONE},
84 {pattern_eth_ipv4_udp_vxlan_ipv4_sctp,
85 ICE_FDIR_INSET_VXLAN_IPV4_SCTP, ICE_INSET_NONE},
86 {pattern_eth_ipv4_udp_vxlan_eth_ipv4,
87 ICE_FDIR_INSET_VXLAN_IPV4, ICE_INSET_NONE},
88 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_udp,
89 ICE_FDIR_INSET_VXLAN_IPV4_UDP, ICE_INSET_NONE},
90 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_tcp,
91 ICE_FDIR_INSET_VXLAN_IPV4_TCP, ICE_INSET_NONE},
92 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_sctp,
93 ICE_FDIR_INSET_VXLAN_IPV4_SCTP, ICE_INSET_NONE},
96 static struct ice_pattern_match_item ice_fdir_pattern_comms[] = {
97 {pattern_eth_ipv4, ICE_FDIR_INSET_ETH_IPV4, ICE_INSET_NONE},
98 {pattern_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE},
99 {pattern_eth_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_TCP, ICE_INSET_NONE},
100 {pattern_eth_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_SCTP, ICE_INSET_NONE},
101 {pattern_eth_ipv6, ICE_FDIR_INSET_ETH_IPV6, ICE_INSET_NONE},
102 {pattern_eth_ipv6_udp, ICE_FDIR_INSET_ETH_IPV6_UDP, ICE_INSET_NONE},
103 {pattern_eth_ipv6_tcp, ICE_FDIR_INSET_ETH_IPV6_TCP, ICE_INSET_NONE},
104 {pattern_eth_ipv6_sctp, ICE_FDIR_INSET_ETH_IPV6_SCTP, ICE_INSET_NONE},
105 {pattern_eth_ipv4_udp_vxlan_ipv4,
106 ICE_FDIR_INSET_VXLAN_IPV4, ICE_INSET_NONE},
107 {pattern_eth_ipv4_udp_vxlan_ipv4_udp,
108 ICE_FDIR_INSET_VXLAN_IPV4_UDP, ICE_INSET_NONE},
109 {pattern_eth_ipv4_udp_vxlan_ipv4_tcp,
110 ICE_FDIR_INSET_VXLAN_IPV4_TCP, ICE_INSET_NONE},
111 {pattern_eth_ipv4_udp_vxlan_ipv4_sctp,
112 ICE_FDIR_INSET_VXLAN_IPV4_SCTP, ICE_INSET_NONE},
113 {pattern_eth_ipv4_udp_vxlan_eth_ipv4,
114 ICE_FDIR_INSET_VXLAN_IPV4, ICE_INSET_NONE},
115 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_udp,
116 ICE_FDIR_INSET_VXLAN_IPV4_UDP, ICE_INSET_NONE},
117 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_tcp,
118 ICE_FDIR_INSET_VXLAN_IPV4_TCP, ICE_INSET_NONE},
119 {pattern_eth_ipv4_udp_vxlan_eth_ipv4_sctp,
120 ICE_FDIR_INSET_VXLAN_IPV4_SCTP, ICE_INSET_NONE},
121 {pattern_eth_ipv4_gtpu_ipv4, ICE_FDIR_INSET_GTPU_IPV4, ICE_INSET_NONE},
124 static struct ice_flow_parser ice_fdir_parser_os;
125 static struct ice_flow_parser ice_fdir_parser_comms;
127 static const struct rte_memzone *
128 ice_memzone_reserve(const char *name, uint32_t len, int socket_id)
130 return rte_memzone_reserve_aligned(name, len, socket_id,
131 RTE_MEMZONE_IOVA_CONTIG,
132 ICE_RING_BASE_ALIGN);
135 #define ICE_FDIR_MZ_NAME "FDIR_MEMZONE"
138 ice_fdir_prof_alloc(struct ice_hw *hw)
140 enum ice_fltr_ptype ptype, fltr_ptype;
142 if (!hw->fdir_prof) {
143 hw->fdir_prof = (struct ice_fd_hw_prof **)
144 ice_malloc(hw, ICE_FLTR_PTYPE_MAX *
145 sizeof(*hw->fdir_prof));
149 for (ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
150 ptype < ICE_FLTR_PTYPE_MAX;
152 if (!hw->fdir_prof[ptype]) {
153 hw->fdir_prof[ptype] = (struct ice_fd_hw_prof *)
154 ice_malloc(hw, sizeof(**hw->fdir_prof));
155 if (!hw->fdir_prof[ptype])
162 for (fltr_ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
165 rte_free(hw->fdir_prof[fltr_ptype]);
166 rte_free(hw->fdir_prof);
171 ice_fdir_counter_pool_add(__rte_unused struct ice_pf *pf,
172 struct ice_fdir_counter_pool_container *container,
173 uint32_t index_start,
176 struct ice_fdir_counter_pool *pool;
180 pool = rte_zmalloc("ice_fdir_counter_pool",
182 sizeof(struct ice_fdir_counter) * len,
186 "Failed to allocate memory for fdir counter pool");
190 TAILQ_INIT(&pool->counter_list);
191 TAILQ_INSERT_TAIL(&container->pool_list, pool, next);
193 for (i = 0; i < len; i++) {
194 struct ice_fdir_counter *counter = &pool->counters[i];
196 counter->hw_index = index_start + i;
197 TAILQ_INSERT_TAIL(&pool->counter_list, counter, next);
200 if (container->index_free == ICE_FDIR_COUNTER_MAX_POOL_SIZE) {
201 PMD_INIT_LOG(ERR, "FDIR counter pool is full");
206 container->pools[container->index_free++] = pool;
215 ice_fdir_counter_init(struct ice_pf *pf)
217 struct ice_hw *hw = ICE_PF_TO_HW(pf);
218 struct ice_fdir_info *fdir_info = &pf->fdir;
219 struct ice_fdir_counter_pool_container *container =
221 uint32_t cnt_index, len;
224 TAILQ_INIT(&container->pool_list);
226 cnt_index = ICE_FDIR_COUNTER_INDEX(hw->fd_ctr_base);
227 len = ICE_FDIR_COUNTERS_PER_BLOCK;
229 ret = ice_fdir_counter_pool_add(pf, container, cnt_index, len);
231 PMD_INIT_LOG(ERR, "Failed to add fdir pool to container");
239 ice_fdir_counter_release(struct ice_pf *pf)
241 struct ice_fdir_info *fdir_info = &pf->fdir;
242 struct ice_fdir_counter_pool_container *container =
246 for (i = 0; i < container->index_free; i++)
247 rte_free(container->pools[i]);
252 static struct ice_fdir_counter *
253 ice_fdir_counter_shared_search(struct ice_fdir_counter_pool_container
257 struct ice_fdir_counter_pool *pool;
258 struct ice_fdir_counter *counter;
261 TAILQ_FOREACH(pool, &container->pool_list, next) {
262 for (i = 0; i < ICE_FDIR_COUNTERS_PER_BLOCK; i++) {
263 counter = &pool->counters[i];
265 if (counter->shared &&
275 static struct ice_fdir_counter *
276 ice_fdir_counter_alloc(struct ice_pf *pf, uint32_t shared, uint32_t id)
278 struct ice_hw *hw = ICE_PF_TO_HW(pf);
279 struct ice_fdir_info *fdir_info = &pf->fdir;
280 struct ice_fdir_counter_pool_container *container =
282 struct ice_fdir_counter_pool *pool = NULL;
283 struct ice_fdir_counter *counter_free = NULL;
286 counter_free = ice_fdir_counter_shared_search(container, id);
288 if (counter_free->ref_cnt + 1 == 0) {
292 counter_free->ref_cnt++;
297 TAILQ_FOREACH(pool, &container->pool_list, next) {
298 counter_free = TAILQ_FIRST(&pool->counter_list);
305 PMD_DRV_LOG(ERR, "No free counter found\n");
309 counter_free->shared = shared;
310 counter_free->id = id;
311 counter_free->ref_cnt = 1;
312 counter_free->pool = pool;
314 /* reset statistic counter value */
315 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0H(counter_free->hw_index), 0);
316 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0L(counter_free->hw_index), 0);
318 TAILQ_REMOVE(&pool->counter_list, counter_free, next);
319 if (TAILQ_EMPTY(&pool->counter_list)) {
320 TAILQ_REMOVE(&container->pool_list, pool, next);
321 TAILQ_INSERT_TAIL(&container->pool_list, pool, next);
328 ice_fdir_counter_free(__rte_unused struct ice_pf *pf,
329 struct ice_fdir_counter *counter)
334 if (--counter->ref_cnt == 0) {
335 struct ice_fdir_counter_pool *pool = counter->pool;
337 TAILQ_INSERT_TAIL(&pool->counter_list, counter, next);
342 ice_fdir_init_filter_list(struct ice_pf *pf)
344 struct rte_eth_dev *dev = pf->adapter->eth_dev;
345 struct ice_fdir_info *fdir_info = &pf->fdir;
346 char fdir_hash_name[RTE_HASH_NAMESIZE];
349 struct rte_hash_parameters fdir_hash_params = {
350 .name = fdir_hash_name,
351 .entries = ICE_MAX_FDIR_FILTER_NUM,
352 .key_len = sizeof(struct ice_fdir_fltr_pattern),
353 .hash_func = rte_hash_crc,
354 .hash_func_init_val = 0,
355 .socket_id = rte_socket_id(),
356 .extra_flag = RTE_HASH_EXTRA_FLAGS_EXT_TABLE,
359 /* Initialize hash */
360 snprintf(fdir_hash_name, RTE_HASH_NAMESIZE,
361 "fdir_%s", dev->device->name);
362 fdir_info->hash_table = rte_hash_create(&fdir_hash_params);
363 if (!fdir_info->hash_table) {
364 PMD_INIT_LOG(ERR, "Failed to create fdir hash table!");
367 fdir_info->hash_map = rte_zmalloc("ice_fdir_hash_map",
368 sizeof(*fdir_info->hash_map) *
369 ICE_MAX_FDIR_FILTER_NUM,
371 if (!fdir_info->hash_map) {
373 "Failed to allocate memory for fdir hash map!");
375 goto err_fdir_hash_map_alloc;
379 err_fdir_hash_map_alloc:
380 rte_hash_free(fdir_info->hash_table);
386 ice_fdir_release_filter_list(struct ice_pf *pf)
388 struct ice_fdir_info *fdir_info = &pf->fdir;
390 if (fdir_info->hash_map)
391 rte_free(fdir_info->hash_map);
392 if (fdir_info->hash_table)
393 rte_hash_free(fdir_info->hash_table);
397 * ice_fdir_setup - reserve and initialize the Flow Director resources
398 * @pf: board private structure
401 ice_fdir_setup(struct ice_pf *pf)
403 struct rte_eth_dev *eth_dev = pf->adapter->eth_dev;
404 struct ice_hw *hw = ICE_PF_TO_HW(pf);
405 const struct rte_memzone *mz = NULL;
406 char z_name[RTE_MEMZONE_NAMESIZE];
408 int err = ICE_SUCCESS;
410 if ((pf->flags & ICE_FLAG_FDIR) == 0) {
411 PMD_INIT_LOG(ERR, "HW doesn't support FDIR");
415 PMD_DRV_LOG(INFO, "FDIR HW Capabilities: fd_fltr_guar = %u,"
416 " fd_fltr_best_effort = %u.",
417 hw->func_caps.fd_fltr_guar,
418 hw->func_caps.fd_fltr_best_effort);
420 if (pf->fdir.fdir_vsi) {
421 PMD_DRV_LOG(INFO, "FDIR initialization has been done.");
425 /* make new FDIR VSI */
426 vsi = ice_setup_vsi(pf, ICE_VSI_CTRL);
428 PMD_DRV_LOG(ERR, "Couldn't create FDIR VSI.");
431 pf->fdir.fdir_vsi = vsi;
433 err = ice_fdir_init_filter_list(pf);
435 PMD_DRV_LOG(ERR, "Failed to init FDIR filter list.");
439 err = ice_fdir_counter_init(pf);
441 PMD_DRV_LOG(ERR, "Failed to init FDIR counter.");
445 /*Fdir tx queue setup*/
446 err = ice_fdir_setup_tx_resources(pf);
448 PMD_DRV_LOG(ERR, "Failed to setup FDIR TX resources.");
452 /*Fdir rx queue setup*/
453 err = ice_fdir_setup_rx_resources(pf);
455 PMD_DRV_LOG(ERR, "Failed to setup FDIR RX resources.");
459 err = ice_fdir_tx_queue_start(eth_dev, pf->fdir.txq->queue_id);
461 PMD_DRV_LOG(ERR, "Failed to start FDIR TX queue.");
465 err = ice_fdir_rx_queue_start(eth_dev, pf->fdir.rxq->queue_id);
467 PMD_DRV_LOG(ERR, "Failed to start FDIR RX queue.");
471 /* reserve memory for the fdir programming packet */
472 snprintf(z_name, sizeof(z_name), "ICE_%s_%d",
474 eth_dev->data->port_id);
475 mz = ice_memzone_reserve(z_name, ICE_FDIR_PKT_LEN, SOCKET_ID_ANY);
477 PMD_DRV_LOG(ERR, "Cannot init memzone for "
478 "flow director program packet.");
482 pf->fdir.prg_pkt = mz->addr;
483 pf->fdir.dma_addr = mz->iova;
485 err = ice_fdir_prof_alloc(hw);
487 PMD_DRV_LOG(ERR, "Cannot allocate memory for "
488 "flow director profile.");
493 PMD_DRV_LOG(INFO, "FDIR setup successfully, with programming queue %u.",
498 ice_rx_queue_release(pf->fdir.rxq);
501 ice_tx_queue_release(pf->fdir.txq);
504 ice_release_vsi(vsi);
505 pf->fdir.fdir_vsi = NULL;
510 ice_fdir_prof_free(struct ice_hw *hw)
512 enum ice_fltr_ptype ptype;
514 for (ptype = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
515 ptype < ICE_FLTR_PTYPE_MAX;
517 rte_free(hw->fdir_prof[ptype]);
519 rte_free(hw->fdir_prof);
522 /* Remove a profile for some filter type */
524 ice_fdir_prof_rm(struct ice_pf *pf, enum ice_fltr_ptype ptype, bool is_tunnel)
526 struct ice_hw *hw = ICE_PF_TO_HW(pf);
527 struct ice_fd_hw_prof *hw_prof;
532 if (!hw->fdir_prof || !hw->fdir_prof[ptype])
535 hw_prof = hw->fdir_prof[ptype];
537 prof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;
538 for (i = 0; i < pf->hw_prof_cnt[ptype][is_tunnel]; i++) {
539 if (hw_prof->entry_h[i][is_tunnel]) {
540 vsi_num = ice_get_hw_vsi_num(hw,
542 ice_rem_prof_id_flow(hw, ICE_BLK_FD,
544 ice_flow_rem_entry(hw,
545 hw_prof->entry_h[i][is_tunnel]);
546 hw_prof->entry_h[i][is_tunnel] = 0;
549 ice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);
550 rte_free(hw_prof->fdir_seg[is_tunnel]);
551 hw_prof->fdir_seg[is_tunnel] = NULL;
553 for (i = 0; i < hw_prof->cnt; i++)
554 hw_prof->vsi_h[i] = 0;
555 pf->hw_prof_cnt[ptype][is_tunnel] = 0;
558 /* Remove all created profiles */
560 ice_fdir_prof_rm_all(struct ice_pf *pf)
562 enum ice_fltr_ptype ptype;
564 for (ptype = ICE_FLTR_PTYPE_NONF_NONE;
565 ptype < ICE_FLTR_PTYPE_MAX;
567 ice_fdir_prof_rm(pf, ptype, false);
568 ice_fdir_prof_rm(pf, ptype, true);
573 * ice_fdir_teardown - release the Flow Director resources
574 * @pf: board private structure
577 ice_fdir_teardown(struct ice_pf *pf)
579 struct rte_eth_dev *eth_dev = pf->adapter->eth_dev;
580 struct ice_hw *hw = ICE_PF_TO_HW(pf);
584 vsi = pf->fdir.fdir_vsi;
588 err = ice_fdir_tx_queue_stop(eth_dev, pf->fdir.txq->queue_id);
590 PMD_DRV_LOG(ERR, "Failed to stop TX queue.");
592 err = ice_fdir_rx_queue_stop(eth_dev, pf->fdir.rxq->queue_id);
594 PMD_DRV_LOG(ERR, "Failed to stop RX queue.");
596 err = ice_fdir_counter_release(pf);
598 PMD_DRV_LOG(ERR, "Failed to release FDIR counter resource.");
600 ice_fdir_release_filter_list(pf);
602 ice_tx_queue_release(pf->fdir.txq);
604 ice_rx_queue_release(pf->fdir.rxq);
606 ice_fdir_prof_rm_all(pf);
607 ice_fdir_prof_free(hw);
608 ice_release_vsi(vsi);
609 pf->fdir.fdir_vsi = NULL;
613 ice_fdir_hw_tbl_conf(struct ice_pf *pf, struct ice_vsi *vsi,
614 struct ice_vsi *ctrl_vsi,
615 struct ice_flow_seg_info *seg,
616 enum ice_fltr_ptype ptype,
619 struct ice_hw *hw = ICE_PF_TO_HW(pf);
620 enum ice_flow_dir dir = ICE_FLOW_RX;
621 struct ice_flow_seg_info *ori_seg;
622 struct ice_fd_hw_prof *hw_prof;
623 struct ice_flow_prof *prof;
624 uint64_t entry_1 = 0;
625 uint64_t entry_2 = 0;
630 hw_prof = hw->fdir_prof[ptype];
631 ori_seg = hw_prof->fdir_seg[is_tunnel];
634 if (!memcmp(ori_seg, seg, sizeof(*seg)))
637 if (!memcmp(&ori_seg[1], &seg[1], sizeof(*seg)))
641 if (pf->fdir_fltr_cnt[ptype][is_tunnel])
644 ice_fdir_prof_rm(pf, ptype, is_tunnel);
647 prof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;
648 ret = ice_flow_add_prof(hw, ICE_BLK_FD, dir, prof_id, seg,
649 (is_tunnel) ? 2 : 1, NULL, 0, &prof);
652 ret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,
653 vsi->idx, ICE_FLOW_PRIO_NORMAL,
654 seg, NULL, 0, &entry_1);
656 PMD_DRV_LOG(ERR, "Failed to add main VSI flow entry for %d.",
660 ret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,
661 ctrl_vsi->idx, ICE_FLOW_PRIO_NORMAL,
662 seg, NULL, 0, &entry_2);
664 PMD_DRV_LOG(ERR, "Failed to add control VSI flow entry for %d.",
669 pf->hw_prof_cnt[ptype][is_tunnel] = 0;
671 hw_prof->fdir_seg[is_tunnel] = seg;
672 hw_prof->vsi_h[hw_prof->cnt] = vsi->idx;
673 hw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_1;
674 pf->hw_prof_cnt[ptype][is_tunnel]++;
675 hw_prof->vsi_h[hw_prof->cnt] = ctrl_vsi->idx;
676 hw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_2;
677 pf->hw_prof_cnt[ptype][is_tunnel]++;
682 vsi_num = ice_get_hw_vsi_num(hw, vsi->idx);
683 ice_rem_prof_id_flow(hw, ICE_BLK_FD, vsi_num, prof_id);
684 ice_flow_rem_entry(hw, entry_1);
686 ice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);
692 ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field)
696 struct ice_inset_map {
698 enum ice_flow_field fld;
700 static const struct ice_inset_map ice_inset_map[] = {
701 {ICE_INSET_DMAC, ICE_FLOW_FIELD_IDX_ETH_DA},
702 {ICE_INSET_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},
703 {ICE_INSET_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},
704 {ICE_INSET_IPV4_TOS, ICE_FLOW_FIELD_IDX_IPV4_DSCP},
705 {ICE_INSET_IPV4_TTL, ICE_FLOW_FIELD_IDX_IPV4_TTL},
706 {ICE_INSET_IPV4_PROTO, ICE_FLOW_FIELD_IDX_IPV4_PROT},
707 {ICE_INSET_IPV6_SRC, ICE_FLOW_FIELD_IDX_IPV6_SA},
708 {ICE_INSET_IPV6_DST, ICE_FLOW_FIELD_IDX_IPV6_DA},
709 {ICE_INSET_IPV6_TC, ICE_FLOW_FIELD_IDX_IPV6_DSCP},
710 {ICE_INSET_IPV6_NEXT_HDR, ICE_FLOW_FIELD_IDX_IPV6_PROT},
711 {ICE_INSET_IPV6_HOP_LIMIT, ICE_FLOW_FIELD_IDX_IPV6_TTL},
712 {ICE_INSET_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},
713 {ICE_INSET_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},
714 {ICE_INSET_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},
715 {ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},
716 {ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},
717 {ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},
718 {ICE_INSET_TUN_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},
719 {ICE_INSET_TUN_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},
720 {ICE_INSET_TUN_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},
721 {ICE_INSET_TUN_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},
722 {ICE_INSET_TUN_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},
723 {ICE_INSET_TUN_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},
724 {ICE_INSET_TUN_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},
725 {ICE_INSET_TUN_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},
726 {ICE_INSET_GTPU_TEID, ICE_FLOW_FIELD_IDX_GTPU_EH_TEID},
727 {ICE_INSET_GTPU_QFI, ICE_FLOW_FIELD_IDX_GTPU_EH_QFI},
730 for (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) {
731 if ((inset & ice_inset_map[i].inset) ==
732 ice_inset_map[i].inset)
733 field[j++] = ice_inset_map[i].fld;
738 ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
739 uint64_t input_set, bool is_tunnel)
741 struct ice_flow_seg_info *seg;
742 struct ice_flow_seg_info *seg_tun = NULL;
743 enum ice_flow_field field[ICE_FLOW_FIELD_IDX_MAX];
749 seg = (struct ice_flow_seg_info *)
750 ice_malloc(hw, sizeof(*seg));
752 PMD_DRV_LOG(ERR, "No memory can be allocated");
756 for (i = 0; i < ICE_FLOW_FIELD_IDX_MAX; i++)
757 field[i] = ICE_FLOW_FIELD_IDX_MAX;
758 ice_fdir_input_set_parse(input_set, field);
761 case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
762 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
763 ICE_FLOW_SEG_HDR_IPV4);
765 case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
766 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
767 ICE_FLOW_SEG_HDR_IPV4);
769 case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
770 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
771 ICE_FLOW_SEG_HDR_IPV4);
773 case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
774 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4);
776 case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
777 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
778 ICE_FLOW_SEG_HDR_IPV6);
780 case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
781 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
782 ICE_FLOW_SEG_HDR_IPV6);
784 case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
785 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
786 ICE_FLOW_SEG_HDR_IPV6);
788 case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
789 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6);
791 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP:
792 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
793 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP:
794 case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
795 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
796 ICE_FLOW_SEG_HDR_IPV4);
799 PMD_DRV_LOG(ERR, "not supported filter type.");
803 for (i = 0; field[i] != ICE_FLOW_FIELD_IDX_MAX; i++) {
804 ice_flow_set_fld(seg, field[i],
805 ICE_FLOW_FLD_OFF_INVAL,
806 ICE_FLOW_FLD_OFF_INVAL,
807 ICE_FLOW_FLD_OFF_INVAL, false);
811 ret = ice_fdir_hw_tbl_conf(pf, pf->main_vsi, pf->fdir.fdir_vsi,
814 seg_tun = (struct ice_flow_seg_info *)
815 ice_malloc(hw, sizeof(*seg) * ICE_FD_HW_SEG_MAX);
817 PMD_DRV_LOG(ERR, "No memory can be allocated");
821 rte_memcpy(&seg_tun[1], seg, sizeof(*seg));
822 ret = ice_fdir_hw_tbl_conf(pf, pf->main_vsi, pf->fdir.fdir_vsi,
823 seg_tun, flow, true);
828 } else if (ret < 0) {
832 return (ret == -EAGAIN) ? 0 : ret;
839 ice_fdir_cnt_update(struct ice_pf *pf, enum ice_fltr_ptype ptype,
840 bool is_tunnel, bool add)
842 struct ice_hw *hw = ICE_PF_TO_HW(pf);
845 cnt = (add) ? 1 : -1;
846 hw->fdir_active_fltr += cnt;
847 if (ptype == ICE_FLTR_PTYPE_NONF_NONE || ptype >= ICE_FLTR_PTYPE_MAX)
848 PMD_DRV_LOG(ERR, "Unknown filter type %d", ptype);
850 pf->fdir_fltr_cnt[ptype][is_tunnel] += cnt;
854 ice_fdir_init(struct ice_adapter *ad)
856 struct ice_pf *pf = &ad->pf;
857 struct ice_flow_parser *parser;
860 ret = ice_fdir_setup(pf);
864 if (ad->active_pkg_type == ICE_PKG_TYPE_COMMS)
865 parser = &ice_fdir_parser_comms;
866 else if (ad->active_pkg_type == ICE_PKG_TYPE_OS_DEFAULT)
867 parser = &ice_fdir_parser_os;
871 return ice_register_parser(parser, ad);
875 ice_fdir_uninit(struct ice_adapter *ad)
877 struct ice_pf *pf = &ad->pf;
878 struct ice_flow_parser *parser;
880 if (ad->active_pkg_type == ICE_PKG_TYPE_COMMS)
881 parser = &ice_fdir_parser_comms;
883 parser = &ice_fdir_parser_os;
885 ice_unregister_parser(parser, ad);
887 ice_fdir_teardown(pf);
891 ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type)
893 if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN)
900 ice_fdir_add_del_filter(struct ice_pf *pf,
901 struct ice_fdir_filter_conf *filter,
904 struct ice_fltr_desc desc;
905 struct ice_hw *hw = ICE_PF_TO_HW(pf);
906 unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
910 filter->input.dest_vsi = pf->main_vsi->idx;
912 memset(&desc, 0, sizeof(desc));
913 ice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);
915 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
917 memset(pkt, 0, ICE_FDIR_PKT_LEN);
918 ret = ice_fdir_get_gen_prgm_pkt(hw, &filter->input, pkt, false, is_tun);
920 PMD_DRV_LOG(ERR, "Generate dummy packet failed");
924 return ice_fdir_programming(pf, &desc);
928 ice_fdir_extract_fltr_key(struct ice_fdir_fltr_pattern *key,
929 struct ice_fdir_filter_conf *filter)
931 struct ice_fdir_fltr *input = &filter->input;
932 memset(key, 0, sizeof(*key));
934 key->flow_type = input->flow_type;
935 rte_memcpy(&key->ip, &input->ip, sizeof(key->ip));
936 rte_memcpy(&key->mask, &input->mask, sizeof(key->mask));
937 rte_memcpy(&key->ext_data, &input->ext_data, sizeof(key->ext_data));
938 rte_memcpy(&key->ext_mask, &input->ext_mask, sizeof(key->ext_mask));
940 rte_memcpy(&key->gtpu_data, &input->gtpu_data, sizeof(key->gtpu_data));
941 rte_memcpy(&key->gtpu_mask, &input->gtpu_mask, sizeof(key->gtpu_mask));
943 key->tunnel_type = filter->tunnel_type;
946 /* Check if there exists the flow director filter */
947 static struct ice_fdir_filter_conf *
948 ice_fdir_entry_lookup(struct ice_fdir_info *fdir_info,
949 const struct ice_fdir_fltr_pattern *key)
953 ret = rte_hash_lookup(fdir_info->hash_table, key);
957 return fdir_info->hash_map[ret];
960 /* Add a flow director entry into the SW list */
962 ice_fdir_entry_insert(struct ice_pf *pf,
963 struct ice_fdir_filter_conf *entry,
964 struct ice_fdir_fltr_pattern *key)
966 struct ice_fdir_info *fdir_info = &pf->fdir;
969 ret = rte_hash_add_key(fdir_info->hash_table, key);
972 "Failed to insert fdir entry to hash table %d!",
976 fdir_info->hash_map[ret] = entry;
981 /* Delete a flow director entry from the SW list */
983 ice_fdir_entry_del(struct ice_pf *pf, struct ice_fdir_fltr_pattern *key)
985 struct ice_fdir_info *fdir_info = &pf->fdir;
988 ret = rte_hash_del_key(fdir_info->hash_table, key);
991 "Failed to delete fdir filter to hash table %d!",
995 fdir_info->hash_map[ret] = NULL;
1001 ice_fdir_create_filter(struct ice_adapter *ad,
1002 struct rte_flow *flow,
1004 struct rte_flow_error *error)
1006 struct ice_pf *pf = &ad->pf;
1007 struct ice_fdir_filter_conf *filter = meta;
1008 struct ice_fdir_info *fdir_info = &pf->fdir;
1009 struct ice_fdir_filter_conf *entry, *node;
1010 struct ice_fdir_fltr_pattern key;
1014 ice_fdir_extract_fltr_key(&key, filter);
1015 node = ice_fdir_entry_lookup(fdir_info, &key);
1017 rte_flow_error_set(error, EEXIST,
1018 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1019 "Rule already exists!");
1023 entry = rte_zmalloc("fdir_entry", sizeof(*entry), 0);
1025 rte_flow_error_set(error, ENOMEM,
1026 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1027 "Failed to allocate memory");
1031 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1033 ret = ice_fdir_input_set_conf(pf, filter->input.flow_type,
1034 filter->input_set, is_tun);
1036 rte_flow_error_set(error, -ret,
1037 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1038 "Profile configure failed.");
1042 /* alloc counter for FDIR */
1043 if (filter->input.cnt_ena) {
1044 struct rte_flow_action_count *act_count = &filter->act_count;
1046 filter->counter = ice_fdir_counter_alloc(pf,
1049 if (!filter->counter) {
1050 rte_flow_error_set(error, EINVAL,
1051 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1052 "Failed to alloc FDIR counter.");
1055 filter->input.cnt_index = filter->counter->hw_index;
1058 ret = ice_fdir_add_del_filter(pf, filter, true);
1060 rte_flow_error_set(error, -ret,
1061 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1062 "Add filter rule failed.");
1066 rte_memcpy(entry, filter, sizeof(*entry));
1067 ret = ice_fdir_entry_insert(pf, entry, &key);
1069 rte_flow_error_set(error, -ret,
1070 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1071 "Insert entry to table failed.");
1076 ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, true);
1081 if (filter->counter) {
1082 ice_fdir_counter_free(pf, filter->counter);
1083 filter->counter = NULL;
1092 ice_fdir_destroy_filter(struct ice_adapter *ad,
1093 struct rte_flow *flow,
1094 struct rte_flow_error *error)
1096 struct ice_pf *pf = &ad->pf;
1097 struct ice_fdir_info *fdir_info = &pf->fdir;
1098 struct ice_fdir_filter_conf *filter, *entry;
1099 struct ice_fdir_fltr_pattern key;
1103 filter = (struct ice_fdir_filter_conf *)flow->rule;
1105 is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1107 if (filter->counter) {
1108 ice_fdir_counter_free(pf, filter->counter);
1109 filter->counter = NULL;
1112 ice_fdir_extract_fltr_key(&key, filter);
1113 entry = ice_fdir_entry_lookup(fdir_info, &key);
1115 rte_flow_error_set(error, ENOENT,
1116 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1117 "Can't find entry.");
1121 ret = ice_fdir_add_del_filter(pf, filter, false);
1123 rte_flow_error_set(error, -ret,
1124 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1125 "Del filter rule failed.");
1129 ret = ice_fdir_entry_del(pf, &key);
1131 rte_flow_error_set(error, -ret,
1132 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1133 "Remove entry from table failed.");
1137 ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, false);
1146 ice_fdir_query_count(struct ice_adapter *ad,
1147 struct rte_flow *flow,
1148 struct rte_flow_query_count *flow_stats,
1149 struct rte_flow_error *error)
1151 struct ice_pf *pf = &ad->pf;
1152 struct ice_hw *hw = ICE_PF_TO_HW(pf);
1153 struct ice_fdir_filter_conf *filter = flow->rule;
1154 struct ice_fdir_counter *counter = filter->counter;
1155 uint64_t hits_lo, hits_hi;
1158 rte_flow_error_set(error, EINVAL,
1159 RTE_FLOW_ERROR_TYPE_ACTION,
1161 "FDIR counters not available");
1166 * Reading the low 32-bits latches the high 32-bits into a shadow
1167 * register. Reading the high 32-bit returns the value in the
1170 hits_lo = ICE_READ_REG(hw, GLSTAT_FD_CNT0L(counter->hw_index));
1171 hits_hi = ICE_READ_REG(hw, GLSTAT_FD_CNT0H(counter->hw_index));
1173 flow_stats->hits_set = 1;
1174 flow_stats->hits = hits_lo | (hits_hi << 32);
1175 flow_stats->bytes_set = 0;
1176 flow_stats->bytes = 0;
1178 if (flow_stats->reset) {
1179 /* reset statistic counter value */
1180 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0H(counter->hw_index), 0);
1181 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0L(counter->hw_index), 0);
1187 static struct ice_flow_engine ice_fdir_engine = {
1188 .init = ice_fdir_init,
1189 .uninit = ice_fdir_uninit,
1190 .create = ice_fdir_create_filter,
1191 .destroy = ice_fdir_destroy_filter,
1192 .query_count = ice_fdir_query_count,
1193 .type = ICE_FLOW_ENGINE_FDIR,
1197 ice_fdir_parse_action_qregion(struct ice_pf *pf,
1198 struct rte_flow_error *error,
1199 const struct rte_flow_action *act,
1200 struct ice_fdir_filter_conf *filter)
1202 const struct rte_flow_action_rss *rss = act->conf;
1205 if (act->type != RTE_FLOW_ACTION_TYPE_RSS) {
1206 rte_flow_error_set(error, EINVAL,
1207 RTE_FLOW_ERROR_TYPE_ACTION, act,
1212 if (rss->queue_num <= 1) {
1213 rte_flow_error_set(error, EINVAL,
1214 RTE_FLOW_ERROR_TYPE_ACTION, act,
1215 "Queue region size can't be 0 or 1.");
1219 /* check if queue index for queue region is continuous */
1220 for (i = 0; i < rss->queue_num - 1; i++) {
1221 if (rss->queue[i + 1] != rss->queue[i] + 1) {
1222 rte_flow_error_set(error, EINVAL,
1223 RTE_FLOW_ERROR_TYPE_ACTION, act,
1224 "Discontinuous queue region");
1229 if (rss->queue[rss->queue_num - 1] >= pf->dev_data->nb_rx_queues) {
1230 rte_flow_error_set(error, EINVAL,
1231 RTE_FLOW_ERROR_TYPE_ACTION, act,
1232 "Invalid queue region indexes.");
1236 if (!(rte_is_power_of_2(rss->queue_num) &&
1237 (rss->queue_num <= ICE_FDIR_MAX_QREGION_SIZE))) {
1238 rte_flow_error_set(error, EINVAL,
1239 RTE_FLOW_ERROR_TYPE_ACTION, act,
1240 "The region size should be any of the following values:"
1241 "1, 2, 4, 8, 16, 32, 64, 128 as long as the total number "
1242 "of queues do not exceed the VSI allocation.");
1246 filter->input.q_index = rss->queue[0];
1247 filter->input.q_region = rte_fls_u32(rss->queue_num) - 1;
1248 filter->input.dest_ctl = ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP;
1254 ice_fdir_parse_action(struct ice_adapter *ad,
1255 const struct rte_flow_action actions[],
1256 struct rte_flow_error *error,
1257 struct ice_fdir_filter_conf *filter)
1259 struct ice_pf *pf = &ad->pf;
1260 const struct rte_flow_action_queue *act_q;
1261 const struct rte_flow_action_mark *mark_spec = NULL;
1262 const struct rte_flow_action_count *act_count;
1263 uint32_t dest_num = 0;
1264 uint32_t mark_num = 0;
1265 uint32_t counter_num = 0;
1268 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
1269 switch (actions->type) {
1270 case RTE_FLOW_ACTION_TYPE_VOID:
1272 case RTE_FLOW_ACTION_TYPE_QUEUE:
1275 act_q = actions->conf;
1276 filter->input.q_index = act_q->index;
1277 if (filter->input.q_index >=
1278 pf->dev_data->nb_rx_queues) {
1279 rte_flow_error_set(error, EINVAL,
1280 RTE_FLOW_ERROR_TYPE_ACTION,
1282 "Invalid queue for FDIR.");
1285 filter->input.dest_ctl =
1286 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX;
1288 case RTE_FLOW_ACTION_TYPE_DROP:
1291 filter->input.dest_ctl =
1292 ICE_FLTR_PRGM_DESC_DEST_DROP_PKT;
1294 case RTE_FLOW_ACTION_TYPE_PASSTHRU:
1297 filter->input.dest_ctl =
1298 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX;
1299 filter->input.q_index = 0;
1301 case RTE_FLOW_ACTION_TYPE_RSS:
1304 ret = ice_fdir_parse_action_qregion(pf,
1305 error, actions, filter);
1309 case RTE_FLOW_ACTION_TYPE_MARK:
1312 mark_spec = actions->conf;
1313 filter->input.fltr_id = mark_spec->id;
1315 case RTE_FLOW_ACTION_TYPE_COUNT:
1318 act_count = actions->conf;
1319 filter->input.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
1320 rte_memcpy(&filter->act_count, act_count,
1321 sizeof(filter->act_count));
1325 rte_flow_error_set(error, EINVAL,
1326 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1332 if (dest_num == 0 || dest_num >= 2) {
1333 rte_flow_error_set(error, EINVAL,
1334 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1335 "Unsupported action combination");
1339 if (mark_num >= 2) {
1340 rte_flow_error_set(error, EINVAL,
1341 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1342 "Too many mark actions");
1346 if (counter_num >= 2) {
1347 rte_flow_error_set(error, EINVAL,
1348 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1349 "Too many count actions");
1357 ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
1358 const struct rte_flow_item pattern[],
1359 struct rte_flow_error *error,
1360 struct ice_fdir_filter_conf *filter)
1362 const struct rte_flow_item *item = pattern;
1363 enum rte_flow_item_type item_type;
1364 enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;
1365 enum ice_fdir_tunnel_type tunnel_type = ICE_FDIR_TUNNEL_TYPE_NONE;
1366 const struct rte_flow_item_eth *eth_spec, *eth_mask;
1367 const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_mask;
1368 const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;
1369 const struct rte_flow_item_tcp *tcp_spec, *tcp_mask;
1370 const struct rte_flow_item_udp *udp_spec, *udp_mask;
1371 const struct rte_flow_item_sctp *sctp_spec, *sctp_mask;
1372 const struct rte_flow_item_vxlan *vxlan_spec, *vxlan_mask;
1373 const struct rte_flow_item_gtp *gtp_spec, *gtp_mask;
1374 const struct rte_flow_item_gtp_psc *gtp_psc_spec, *gtp_psc_mask;
1375 uint64_t input_set = ICE_INSET_NONE;
1376 uint8_t flow_type = ICE_FLTR_PTYPE_NONF_NONE;
1377 uint8_t ipv6_addr_mask[16] = {
1378 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1379 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
1381 uint32_t vtc_flow_cpu;
1384 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
1386 rte_flow_error_set(error, EINVAL,
1387 RTE_FLOW_ERROR_TYPE_ITEM,
1389 "Not support range");
1392 item_type = item->type;
1394 switch (item_type) {
1395 case RTE_FLOW_ITEM_TYPE_ETH:
1396 eth_spec = item->spec;
1397 eth_mask = item->mask;
1399 if (eth_spec && eth_mask) {
1400 if (!rte_is_zero_ether_addr(ð_spec->src) ||
1401 !rte_is_zero_ether_addr(ð_mask->src)) {
1402 rte_flow_error_set(error, EINVAL,
1403 RTE_FLOW_ERROR_TYPE_ITEM,
1405 "Src mac not support");
1409 if (!rte_is_broadcast_ether_addr(ð_mask->dst)) {
1410 rte_flow_error_set(error, EINVAL,
1411 RTE_FLOW_ERROR_TYPE_ITEM,
1413 "Invalid mac addr mask");
1417 input_set |= ICE_INSET_DMAC;
1418 rte_memcpy(&filter->input.ext_data.dst_mac,
1420 RTE_ETHER_ADDR_LEN);
1423 case RTE_FLOW_ITEM_TYPE_IPV4:
1424 l3 = RTE_FLOW_ITEM_TYPE_IPV4;
1425 ipv4_spec = item->spec;
1426 ipv4_mask = item->mask;
1428 if (ipv4_spec && ipv4_mask) {
1429 /* Check IPv4 mask and update input set */
1430 if (ipv4_mask->hdr.version_ihl ||
1431 ipv4_mask->hdr.total_length ||
1432 ipv4_mask->hdr.packet_id ||
1433 ipv4_mask->hdr.fragment_offset ||
1434 ipv4_mask->hdr.hdr_checksum) {
1435 rte_flow_error_set(error, EINVAL,
1436 RTE_FLOW_ERROR_TYPE_ITEM,
1438 "Invalid IPv4 mask.");
1441 if (ipv4_mask->hdr.src_addr == UINT32_MAX)
1442 input_set |= tunnel_type ?
1443 ICE_INSET_TUN_IPV4_SRC :
1445 if (ipv4_mask->hdr.dst_addr == UINT32_MAX)
1446 input_set |= tunnel_type ?
1447 ICE_INSET_TUN_IPV4_DST :
1449 if (ipv4_mask->hdr.type_of_service == UINT8_MAX)
1450 input_set |= ICE_INSET_IPV4_TOS;
1451 if (ipv4_mask->hdr.time_to_live == UINT8_MAX)
1452 input_set |= ICE_INSET_IPV4_TTL;
1453 if (ipv4_mask->hdr.next_proto_id == UINT8_MAX)
1454 input_set |= ICE_INSET_IPV4_PROTO;
1456 filter->input.ip.v4.dst_ip =
1457 ipv4_spec->hdr.src_addr;
1458 filter->input.ip.v4.src_ip =
1459 ipv4_spec->hdr.dst_addr;
1460 filter->input.ip.v4.tos =
1461 ipv4_spec->hdr.type_of_service;
1462 filter->input.ip.v4.ttl =
1463 ipv4_spec->hdr.time_to_live;
1464 filter->input.ip.v4.proto =
1465 ipv4_spec->hdr.next_proto_id;
1468 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
1470 case RTE_FLOW_ITEM_TYPE_IPV6:
1471 l3 = RTE_FLOW_ITEM_TYPE_IPV6;
1472 ipv6_spec = item->spec;
1473 ipv6_mask = item->mask;
1475 if (ipv6_spec && ipv6_mask) {
1476 /* Check IPv6 mask and update input set */
1477 if (ipv6_mask->hdr.payload_len) {
1478 rte_flow_error_set(error, EINVAL,
1479 RTE_FLOW_ERROR_TYPE_ITEM,
1481 "Invalid IPv6 mask");
1485 if (!memcmp(ipv6_mask->hdr.src_addr,
1487 RTE_DIM(ipv6_mask->hdr.src_addr)))
1488 input_set |= ICE_INSET_IPV6_SRC;
1489 if (!memcmp(ipv6_mask->hdr.dst_addr,
1491 RTE_DIM(ipv6_mask->hdr.dst_addr)))
1492 input_set |= ICE_INSET_IPV6_DST;
1494 if ((ipv6_mask->hdr.vtc_flow &
1495 rte_cpu_to_be_32(ICE_IPV6_TC_MASK))
1496 == rte_cpu_to_be_32(ICE_IPV6_TC_MASK))
1497 input_set |= ICE_INSET_IPV6_TC;
1498 if (ipv6_mask->hdr.proto == UINT8_MAX)
1499 input_set |= ICE_INSET_IPV6_NEXT_HDR;
1500 if (ipv6_mask->hdr.hop_limits == UINT8_MAX)
1501 input_set |= ICE_INSET_IPV6_HOP_LIMIT;
1503 rte_memcpy(filter->input.ip.v6.dst_ip,
1504 ipv6_spec->hdr.src_addr, 16);
1505 rte_memcpy(filter->input.ip.v6.src_ip,
1506 ipv6_spec->hdr.dst_addr, 16);
1509 rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);
1510 filter->input.ip.v6.tc =
1511 (uint8_t)(vtc_flow_cpu >>
1512 ICE_FDIR_IPV6_TC_OFFSET);
1513 filter->input.ip.v6.proto =
1514 ipv6_spec->hdr.proto;
1515 filter->input.ip.v6.hlim =
1516 ipv6_spec->hdr.hop_limits;
1519 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
1521 case RTE_FLOW_ITEM_TYPE_TCP:
1522 tcp_spec = item->spec;
1523 tcp_mask = item->mask;
1525 if (tcp_spec && tcp_mask) {
1526 /* Check TCP mask and update input set */
1527 if (tcp_mask->hdr.sent_seq ||
1528 tcp_mask->hdr.recv_ack ||
1529 tcp_mask->hdr.data_off ||
1530 tcp_mask->hdr.tcp_flags ||
1531 tcp_mask->hdr.rx_win ||
1532 tcp_mask->hdr.cksum ||
1533 tcp_mask->hdr.tcp_urp) {
1534 rte_flow_error_set(error, EINVAL,
1535 RTE_FLOW_ERROR_TYPE_ITEM,
1537 "Invalid TCP mask");
1541 if (tcp_mask->hdr.src_port == UINT16_MAX)
1542 input_set |= tunnel_type ?
1543 ICE_INSET_TUN_TCP_SRC_PORT :
1544 ICE_INSET_TCP_SRC_PORT;
1545 if (tcp_mask->hdr.dst_port == UINT16_MAX)
1546 input_set |= tunnel_type ?
1547 ICE_INSET_TUN_TCP_DST_PORT :
1548 ICE_INSET_TCP_DST_PORT;
1550 /* Get filter info */
1551 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
1552 filter->input.ip.v4.dst_port =
1553 tcp_spec->hdr.src_port;
1554 filter->input.ip.v4.src_port =
1555 tcp_spec->hdr.dst_port;
1557 ICE_FLTR_PTYPE_NONF_IPV4_TCP;
1558 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
1559 filter->input.ip.v6.dst_port =
1560 tcp_spec->hdr.src_port;
1561 filter->input.ip.v6.src_port =
1562 tcp_spec->hdr.dst_port;
1564 ICE_FLTR_PTYPE_NONF_IPV6_TCP;
1568 case RTE_FLOW_ITEM_TYPE_UDP:
1569 udp_spec = item->spec;
1570 udp_mask = item->mask;
1572 if (udp_spec && udp_mask) {
1573 /* Check UDP mask and update input set*/
1574 if (udp_mask->hdr.dgram_len ||
1575 udp_mask->hdr.dgram_cksum) {
1576 rte_flow_error_set(error, EINVAL,
1577 RTE_FLOW_ERROR_TYPE_ITEM,
1579 "Invalid UDP mask");
1583 if (udp_mask->hdr.src_port == UINT16_MAX)
1584 input_set |= tunnel_type ?
1585 ICE_INSET_TUN_UDP_SRC_PORT :
1586 ICE_INSET_UDP_SRC_PORT;
1587 if (udp_mask->hdr.dst_port == UINT16_MAX)
1588 input_set |= tunnel_type ?
1589 ICE_INSET_TUN_UDP_DST_PORT :
1590 ICE_INSET_UDP_DST_PORT;
1592 /* Get filter info */
1593 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
1594 filter->input.ip.v4.dst_port =
1595 udp_spec->hdr.src_port;
1596 filter->input.ip.v4.src_port =
1597 udp_spec->hdr.dst_port;
1599 ICE_FLTR_PTYPE_NONF_IPV4_UDP;
1600 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
1601 filter->input.ip.v6.src_port =
1602 udp_spec->hdr.dst_port;
1603 filter->input.ip.v6.dst_port =
1604 udp_spec->hdr.src_port;
1606 ICE_FLTR_PTYPE_NONF_IPV6_UDP;
1610 case RTE_FLOW_ITEM_TYPE_SCTP:
1611 sctp_spec = item->spec;
1612 sctp_mask = item->mask;
1614 if (sctp_spec && sctp_mask) {
1615 /* Check SCTP mask and update input set */
1616 if (sctp_mask->hdr.cksum) {
1617 rte_flow_error_set(error, EINVAL,
1618 RTE_FLOW_ERROR_TYPE_ITEM,
1620 "Invalid UDP mask");
1624 if (sctp_mask->hdr.src_port == UINT16_MAX)
1625 input_set |= tunnel_type ?
1626 ICE_INSET_TUN_SCTP_SRC_PORT :
1627 ICE_INSET_SCTP_SRC_PORT;
1628 if (sctp_mask->hdr.dst_port == UINT16_MAX)
1629 input_set |= tunnel_type ?
1630 ICE_INSET_TUN_SCTP_DST_PORT :
1631 ICE_INSET_SCTP_DST_PORT;
1633 /* Get filter info */
1634 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
1635 filter->input.ip.v4.dst_port =
1636 sctp_spec->hdr.src_port;
1637 filter->input.ip.v4.src_port =
1638 sctp_spec->hdr.dst_port;
1640 ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
1641 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
1642 filter->input.ip.v6.dst_port =
1643 sctp_spec->hdr.src_port;
1644 filter->input.ip.v6.src_port =
1645 sctp_spec->hdr.dst_port;
1647 ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
1651 case RTE_FLOW_ITEM_TYPE_VOID:
1653 case RTE_FLOW_ITEM_TYPE_VXLAN:
1654 l3 = RTE_FLOW_ITEM_TYPE_END;
1655 vxlan_spec = item->spec;
1656 vxlan_mask = item->mask;
1658 if (vxlan_spec || vxlan_mask) {
1659 rte_flow_error_set(error, EINVAL,
1660 RTE_FLOW_ERROR_TYPE_ITEM,
1662 "Invalid vxlan field");
1666 tunnel_type = ICE_FDIR_TUNNEL_TYPE_VXLAN;
1668 case RTE_FLOW_ITEM_TYPE_GTPU:
1669 l3 = RTE_FLOW_ITEM_TYPE_END;
1670 gtp_spec = item->spec;
1671 gtp_mask = item->mask;
1673 if (gtp_spec && gtp_mask) {
1674 if (gtp_mask->v_pt_rsv_flags ||
1675 gtp_mask->msg_type ||
1676 gtp_mask->msg_len) {
1677 rte_flow_error_set(error, EINVAL,
1678 RTE_FLOW_ERROR_TYPE_ITEM,
1680 "Invalid GTP mask");
1684 if (gtp_mask->teid == UINT32_MAX)
1685 input_set |= ICE_INSET_GTPU_TEID;
1687 filter->input.gtpu_data.teid = gtp_spec->teid;
1690 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
1691 gtp_psc_spec = item->spec;
1692 gtp_psc_mask = item->mask;
1694 if (gtp_psc_spec && gtp_psc_mask) {
1695 if (gtp_psc_mask->qfi == UINT8_MAX)
1696 input_set |= ICE_INSET_GTPU_QFI;
1698 filter->input.gtpu_data.qfi =
1702 tunnel_type = ICE_FDIR_TUNNEL_TYPE_GTPU;
1705 rte_flow_error_set(error, EINVAL,
1706 RTE_FLOW_ERROR_TYPE_ITEM,
1708 "Invalid pattern item.");
1713 if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU)
1714 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
1716 filter->tunnel_type = tunnel_type;
1717 filter->input.flow_type = flow_type;
1718 filter->input_set = input_set;
1724 ice_fdir_parse(struct ice_adapter *ad,
1725 struct ice_pattern_match_item *array,
1727 const struct rte_flow_item pattern[],
1728 const struct rte_flow_action actions[],
1730 struct rte_flow_error *error)
1732 struct ice_pf *pf = &ad->pf;
1733 struct ice_fdir_filter_conf *filter = &pf->fdir.conf;
1734 struct ice_pattern_match_item *item = NULL;
1738 memset(filter, 0, sizeof(*filter));
1739 item = ice_search_pattern_match_item(pattern, array, array_len, error);
1743 ret = ice_fdir_parse_pattern(ad, pattern, error, filter);
1746 input_set = filter->input_set;
1747 if (!input_set || input_set & ~item->input_set_mask) {
1748 rte_flow_error_set(error, EINVAL,
1749 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1751 "Invalid input set");
1755 ret = ice_fdir_parse_action(ad, actions, error, filter);
1764 static struct ice_flow_parser ice_fdir_parser_os = {
1765 .engine = &ice_fdir_engine,
1766 .array = ice_fdir_pattern_os,
1767 .array_len = RTE_DIM(ice_fdir_pattern_os),
1768 .parse_pattern_action = ice_fdir_parse,
1769 .stage = ICE_FLOW_STAGE_DISTRIBUTOR,
1772 static struct ice_flow_parser ice_fdir_parser_comms = {
1773 .engine = &ice_fdir_engine,
1774 .array = ice_fdir_pattern_comms,
1775 .array_len = RTE_DIM(ice_fdir_pattern_comms),
1776 .parse_pattern_action = ice_fdir_parse,
1777 .stage = ICE_FLOW_STAGE_DISTRIBUTOR,
1780 RTE_INIT(ice_fdir_engine_register)
1782 ice_register_flow_engine(&ice_fdir_engine);