1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019-2020 Intel Corporation
8 #include <rte_ethdev.h>
10 #include "base/igc_osdep.h"
11 #include "base/igc_hw.h"
12 #include "base/igc_i225.h"
13 #include "base/igc_api.h"
19 #define IGC_QUEUE_PAIRS_NUM 4
21 /* structure for interrupt relative data */
22 struct igc_interrupt {
28 * Structure to store private data for each driver instance (for each port).
32 struct igc_interrupt intr;
36 #define IGC_DEV_PRIVATE(_dev) ((_dev)->data->dev_private)
38 #define IGC_DEV_PRIVATE_HW(_dev) \
39 (&((struct igc_adapter *)(_dev)->data->dev_private)->hw)
41 #define IGC_DEV_PRIVATE_INTR(_dev) \
42 (&((struct igc_adapter *)(_dev)->data->dev_private)->intr)
45 igc_read_reg_check_set_bits(struct igc_hw *hw, uint32_t reg, uint32_t bits)
47 uint32_t reg_val = IGC_READ_REG(hw, reg);
51 return; /* no need to write back */
53 IGC_WRITE_REG(hw, reg, bits);
57 igc_read_reg_check_clear_bits(struct igc_hw *hw, uint32_t reg, uint32_t bits)
59 uint32_t reg_val = IGC_READ_REG(hw, reg);
61 bits = reg_val & ~bits;
63 return; /* no need to write back */
65 IGC_WRITE_REG(hw, reg, bits);
72 #endif /* _IGC_ETHDEV_H_ */