drivers/net/ionic/ionic_ethdev.c

   1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
   2  * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev.h>
   8 #include <rte_ethdev_driver.h>
   9 #include <rte_malloc.h>
  10 #include <rte_ethdev_pci.h>
  11
  12 #include "ionic_logs.h"
  13 #include "ionic.h"
  14 #include "ionic_dev.h"
  15 #include "ionic_mac_api.h"
  16 #include "ionic_lif.h"
  17 #include "ionic_ethdev.h"
  18 #include "ionic_rxtx.h"
  19
  20 static int  eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params);
  21 static int  eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev);
  22 static int  ionic_dev_info_get(struct rte_eth_dev *eth_dev,
  23         struct rte_eth_dev_info *dev_info);
  24 static int  ionic_dev_configure(struct rte_eth_dev *dev);
  25 static int  ionic_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
  26 static int  ionic_dev_start(struct rte_eth_dev *dev);
  27 static void ionic_dev_stop(struct rte_eth_dev *dev);
  28 static void ionic_dev_close(struct rte_eth_dev *dev);
  29 static int  ionic_dev_set_link_up(struct rte_eth_dev *dev);
  30 static int  ionic_dev_set_link_down(struct rte_eth_dev *dev);
  31 static int  ionic_dev_link_update(struct rte_eth_dev *eth_dev,
  32         int wait_to_complete);
  33 static int  ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev,
  34         struct rte_eth_fc_conf *fc_conf);
  35 static int  ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev,
  36         struct rte_eth_fc_conf *fc_conf);
  37 static int  ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask);
  38 static int  ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
  39         struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size);
  40 static int  ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
  41         struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size);
  42 static int  ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
  43         struct rte_eth_rss_conf *rss_conf);
  44 static int  ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev,
  45         struct rte_eth_rss_conf *rss_conf);
  46 static int  ionic_dev_stats_get(struct rte_eth_dev *eth_dev,
  47         struct rte_eth_stats *stats);
  48 static int  ionic_dev_stats_reset(struct rte_eth_dev *eth_dev);
  49 static int  ionic_dev_xstats_get(struct rte_eth_dev *dev,
  50         struct rte_eth_xstat *xstats, unsigned int n);
  51 static int  ionic_dev_xstats_get_by_id(struct rte_eth_dev *dev,
  52         const uint64_t *ids, uint64_t *values, unsigned int n);
  53 static int  ionic_dev_xstats_reset(struct rte_eth_dev *dev);
  54 static int  ionic_dev_xstats_get_names(struct rte_eth_dev *dev,
  55         struct rte_eth_xstat_name *xstats_names, unsigned int size);
  56 static int  ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *dev,
  57         struct rte_eth_xstat_name *xstats_names, const uint64_t *ids,
  58         unsigned int limit);
  59
  60 int ionic_logtype;
  61
  62 static const struct rte_pci_id pci_id_ionic_map[] = {
  63         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_PF) },
  64         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_VF) },
  65         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_MGMT) },
  66         { .vendor_id = 0, /* sentinel */ },
  67 };
  68
  69 static const struct rte_eth_desc_lim rx_desc_lim = {
  70         .nb_max = IONIC_MAX_RING_DESC,
  71         .nb_min = IONIC_MIN_RING_DESC,
  72         .nb_align = 1,
  73 };
  74
  75 static const struct rte_eth_desc_lim tx_desc_lim = {
  76         .nb_max = IONIC_MAX_RING_DESC,
  77         .nb_min = IONIC_MIN_RING_DESC,
  78         .nb_align = 1,
  79         .nb_seg_max = IONIC_TX_MAX_SG_ELEMS,
  80         .nb_mtu_seg_max = IONIC_TX_MAX_SG_ELEMS,
  81 };
  82
  83 static const struct eth_dev_ops ionic_eth_dev_ops = {
  84         .dev_infos_get          = ionic_dev_info_get,
  85         .dev_configure          = ionic_dev_configure,
  86         .mtu_set                = ionic_dev_mtu_set,
  87         .dev_start              = ionic_dev_start,
  88         .dev_stop               = ionic_dev_stop,
  89         .dev_close              = ionic_dev_close,
  90         .link_update            = ionic_dev_link_update,
  91         .dev_set_link_up        = ionic_dev_set_link_up,
  92         .dev_set_link_down      = ionic_dev_set_link_down,
  93         .mac_addr_add           = ionic_dev_add_mac,
  94         .mac_addr_remove        = ionic_dev_remove_mac,
  95         .mac_addr_set           = ionic_dev_set_mac,
  96         .vlan_filter_set        = ionic_dev_vlan_filter_set,
  97         .promiscuous_enable     = ionic_dev_promiscuous_enable,
  98         .promiscuous_disable    = ionic_dev_promiscuous_disable,
  99         .allmulticast_enable    = ionic_dev_allmulticast_enable,
 100         .allmulticast_disable   = ionic_dev_allmulticast_disable,
 101         .flow_ctrl_get          = ionic_flow_ctrl_get,
 102         .flow_ctrl_set          = ionic_flow_ctrl_set,
 103         .rxq_info_get           = ionic_rxq_info_get,
 104         .txq_info_get           = ionic_txq_info_get,
 105         .rx_queue_setup         = ionic_dev_rx_queue_setup,
 106         .rx_queue_release       = ionic_dev_rx_queue_release,
 107         .rx_queue_start         = ionic_dev_rx_queue_start,
 108         .rx_queue_stop          = ionic_dev_rx_queue_stop,
 109         .tx_queue_setup         = ionic_dev_tx_queue_setup,
 110         .tx_queue_release       = ionic_dev_tx_queue_release,
 111         .tx_queue_start         = ionic_dev_tx_queue_start,
 112         .tx_queue_stop          = ionic_dev_tx_queue_stop,
 113         .vlan_offload_set       = ionic_vlan_offload_set,
 114         .reta_update            = ionic_dev_rss_reta_update,
 115         .reta_query             = ionic_dev_rss_reta_query,
 116         .rss_hash_conf_get      = ionic_dev_rss_hash_conf_get,
 117         .rss_hash_update        = ionic_dev_rss_hash_update,
 118         .stats_get              = ionic_dev_stats_get,
 119         .stats_reset            = ionic_dev_stats_reset,
 120         .xstats_get             = ionic_dev_xstats_get,
 121         .xstats_get_by_id       = ionic_dev_xstats_get_by_id,
 122         .xstats_reset           = ionic_dev_xstats_reset,
 123         .xstats_get_names       = ionic_dev_xstats_get_names,
 124         .xstats_get_names_by_id = ionic_dev_xstats_get_names_by_id,
 125 };
 126
 127 struct rte_ionic_xstats_name_off {
 128         char name[RTE_ETH_XSTATS_NAME_SIZE];
 129         unsigned int offset;
 130 };
 131
 132 static const struct rte_ionic_xstats_name_off rte_ionic_xstats_strings[] = {
 133         /* RX */
 134         {"rx_ucast_bytes", offsetof(struct ionic_lif_stats,
 135                         rx_ucast_bytes)},
 136         {"rx_ucast_packets", offsetof(struct ionic_lif_stats,
 137                         rx_ucast_packets)},
 138         {"rx_mcast_bytes", offsetof(struct ionic_lif_stats,
 139                         rx_mcast_bytes)},
 140         {"rx_mcast_packets", offsetof(struct ionic_lif_stats,
 141                         rx_mcast_packets)},
 142         {"rx_bcast_bytes", offsetof(struct ionic_lif_stats,
 143                         rx_bcast_bytes)},
 144         {"rx_bcast_packets", offsetof(struct ionic_lif_stats,
 145                         rx_bcast_packets)},
 146         /* RX drops */
 147         {"rx_ucast_drop_bytes", offsetof(struct ionic_lif_stats,
 148                         rx_ucast_drop_bytes)},
 149         {"rx_ucast_drop_packets", offsetof(struct ionic_lif_stats,
 150                         rx_ucast_drop_packets)},
 151         {"rx_mcast_drop_bytes", offsetof(struct ionic_lif_stats,
 152                         rx_mcast_drop_bytes)},
 153         {"rx_mcast_drop_packets", offsetof(struct ionic_lif_stats,
 154                         rx_mcast_drop_packets)},
 155         {"rx_bcast_drop_bytes", offsetof(struct ionic_lif_stats,
 156                         rx_bcast_drop_bytes)},
 157         {"rx_bcast_drop_packets", offsetof(struct ionic_lif_stats,
 158                         rx_bcast_drop_packets)},
 159         {"rx_dma_error", offsetof(struct ionic_lif_stats,
 160                         rx_dma_error)},
 161         /* TX */
 162         {"tx_ucast_bytes", offsetof(struct ionic_lif_stats,
 163                         tx_ucast_bytes)},
 164         {"tx_ucast_packets", offsetof(struct ionic_lif_stats,
 165                         tx_ucast_packets)},
 166         {"tx_mcast_bytes", offsetof(struct ionic_lif_stats,
 167                         tx_mcast_bytes)},
 168         {"tx_mcast_packets", offsetof(struct ionic_lif_stats,
 169                         tx_mcast_packets)},
 170         {"tx_bcast_bytes", offsetof(struct ionic_lif_stats,
 171                         tx_bcast_bytes)},
 172         {"tx_bcast_packets", offsetof(struct ionic_lif_stats,
 173                         tx_bcast_packets)},
 174         /* TX drops */
 175         {"tx_ucast_drop_bytes", offsetof(struct ionic_lif_stats,
 176                         tx_ucast_drop_bytes)},
 177         {"tx_ucast_drop_packets", offsetof(struct ionic_lif_stats,
 178                         tx_ucast_drop_packets)},
 179         {"tx_mcast_drop_bytes", offsetof(struct ionic_lif_stats,
 180                         tx_mcast_drop_bytes)},
 181         {"tx_mcast_drop_packets", offsetof(struct ionic_lif_stats,
 182                         tx_mcast_drop_packets)},
 183         {"tx_bcast_drop_bytes", offsetof(struct ionic_lif_stats,
 184                         tx_bcast_drop_bytes)},
 185         {"tx_bcast_drop_packets", offsetof(struct ionic_lif_stats,
 186                         tx_bcast_drop_packets)},
 187         {"tx_dma_error", offsetof(struct ionic_lif_stats,
 188                         tx_dma_error)},
 189         /* Rx Queue/Ring drops */
 190         {"rx_queue_disabled", offsetof(struct ionic_lif_stats,
 191                         rx_queue_disabled)},
 192         {"rx_queue_empty", offsetof(struct ionic_lif_stats,
 193                         rx_queue_empty)},
 194         {"rx_queue_error", offsetof(struct ionic_lif_stats,
 195                         rx_queue_error)},
 196         {"rx_desc_fetch_error", offsetof(struct ionic_lif_stats,
 197                         rx_desc_fetch_error)},
 198         {"rx_desc_data_error", offsetof(struct ionic_lif_stats,
 199                         rx_desc_data_error)},
 200         /* Tx Queue/Ring drops */
 201         {"tx_queue_disabled", offsetof(struct ionic_lif_stats,
 202                         tx_queue_disabled)},
 203         {"tx_queue_error", offsetof(struct ionic_lif_stats,
 204                         tx_queue_error)},
 205         {"tx_desc_fetch_error", offsetof(struct ionic_lif_stats,
 206                         tx_desc_fetch_error)},
 207         {"tx_desc_data_error", offsetof(struct ionic_lif_stats,
 208                         tx_desc_data_error)},
 209 };
 210
 211 #define IONIC_NB_HW_STATS (sizeof(rte_ionic_xstats_strings) / \
 212                 sizeof(rte_ionic_xstats_strings[0]))
 213
 214 /*
 215  * Set device link up, enable tx.
 216  */
 217 static int
 218 ionic_dev_set_link_up(struct rte_eth_dev *eth_dev)
 219 {
 220         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 221         struct ionic_adapter *adapter = lif->adapter;
 222         struct ionic_dev *idev = &adapter->idev;
 223         int err;
 224
 225         IONIC_PRINT_CALL();
 226
 227         ionic_dev_cmd_port_state(idev, IONIC_PORT_ADMIN_STATE_UP);
 228
 229         err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 230         if (err) {
 231                 IONIC_PRINT(WARNING, "Failed to bring port UP");
 232                 return err;
 233         }
 234
 235         return 0;
 236 }
 237
 238 /*
 239  * Set device link down, disable tx.
 240  */
 241 static int
 242 ionic_dev_set_link_down(struct rte_eth_dev *eth_dev)
 243 {
 244         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 245         struct ionic_adapter *adapter = lif->adapter;
 246         struct ionic_dev *idev = &adapter->idev;
 247         int err;
 248
 249         IONIC_PRINT_CALL();
 250
 251         ionic_dev_cmd_port_state(idev, IONIC_PORT_ADMIN_STATE_DOWN);
 252
 253         err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 254         if (err) {
 255                 IONIC_PRINT(WARNING, "Failed to bring port DOWN");
 256                 return err;
 257         }
 258
 259         return 0;
 260 }
 261
 262 static int
 263 ionic_dev_link_update(struct rte_eth_dev *eth_dev,
 264                 int wait_to_complete __rte_unused)
 265 {
 266         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 267         struct ionic_adapter *adapter = lif->adapter;
 268         struct rte_eth_link link;
 269
 270         IONIC_PRINT_CALL();
 271
 272         /* Initialize */
 273         memset(&link, 0, sizeof(link));
 274         link.link_autoneg = ETH_LINK_AUTONEG;
 275
 276         if (!adapter->link_up) {
 277                 /* Interface is down */
 278                 link.link_status = ETH_LINK_DOWN;
 279                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
 280                 link.link_speed = ETH_SPEED_NUM_NONE;
 281         } else {
 282                 /* Interface is up */
 283                 link.link_status = ETH_LINK_UP;
 284                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 285                 switch (adapter->link_speed) {
 286                 case  10000:
 287                         link.link_speed = ETH_SPEED_NUM_10G;
 288                         break;
 289                 case  25000:
 290                         link.link_speed = ETH_SPEED_NUM_25G;
 291                         break;
 292                 case  40000:
 293                         link.link_speed = ETH_SPEED_NUM_40G;
 294                         break;
 295                 case  50000:
 296                         link.link_speed = ETH_SPEED_NUM_50G;
 297                         break;
 298                 case 100000:
 299                         link.link_speed = ETH_SPEED_NUM_100G;
 300                         break;
 301                 default:
 302                         link.link_speed = ETH_SPEED_NUM_NONE;
 303                         break;
 304                 }
 305         }
 306
 307         return rte_eth_linkstatus_set(eth_dev, &link);
 308 }
 309
 310 /**
 311  * Interrupt handler triggered by NIC for handling
 312  * specific interrupt.
 313  *
 314  * @param param
 315  *  The address of parameter registered before.
 316  *
 317  * @return
 318  *  void
 319  */
 320 static void
 321 ionic_dev_interrupt_handler(void *param)
 322 {
 323         struct ionic_adapter *adapter = (struct ionic_adapter *)param;
 324         uint32_t i;
 325
 326         IONIC_PRINT(DEBUG, "->");
 327
 328         for (i = 0; i < adapter->nlifs; i++) {
 329                 if (adapter->lifs[i])
 330                         ionic_notifyq_handler(adapter->lifs[i], -1);
 331         }
 332 }
 333
 334 static int
 335 ionic_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 336 {
 337         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 338         uint32_t max_frame_size;
 339         int err;
 340
 341         IONIC_PRINT_CALL();
 342
 343         /*
 344          * Note: mtu check against IONIC_MIN_MTU, IONIC_MAX_MTU
 345          * is done by the the API.
 346          */
 347
 348         /*
 349          * Max frame size is MTU + Ethernet header + VLAN + QinQ
 350          * (plus ETHER_CRC_LEN if the adapter is able to keep CRC)
 351          */
 352         max_frame_size = mtu + RTE_ETHER_HDR_LEN + 4 + 4;
 353
 354         if (eth_dev->data->dev_conf.rxmode.max_rx_pkt_len < max_frame_size)
 355                 return -EINVAL;
 356
 357         err = ionic_lif_change_mtu(lif, mtu);
 358         if (err)
 359                 return err;
 360
 361         return 0;
 362 }
 363
 364 static int
 365 ionic_dev_info_get(struct rte_eth_dev *eth_dev,
 366                 struct rte_eth_dev_info *dev_info)
 367 {
 368         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 369         struct ionic_adapter *adapter = lif->adapter;
 370         struct ionic_identity *ident = &adapter->ident;
 371
 372         IONIC_PRINT_CALL();
 373
 374         dev_info->max_rx_queues = (uint16_t)
 375                 ident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ];
 376         dev_info->max_tx_queues = (uint16_t)
 377                 ident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ];
 378         /* Also add ETHER_CRC_LEN if the adapter is able to keep CRC */
 379         dev_info->min_rx_bufsize = IONIC_MIN_MTU + RTE_ETHER_HDR_LEN;
 380         dev_info->max_rx_pktlen = IONIC_MAX_MTU + RTE_ETHER_HDR_LEN;
 381         dev_info->max_mac_addrs = adapter->max_mac_addrs;
 382         dev_info->min_mtu = IONIC_MIN_MTU;
 383         dev_info->max_mtu = IONIC_MAX_MTU;
 384
 385         dev_info->hash_key_size = IONIC_RSS_HASH_KEY_SIZE;
 386         dev_info->reta_size = ident->lif.eth.rss_ind_tbl_sz;
 387         dev_info->flow_type_rss_offloads = IONIC_ETH_RSS_OFFLOAD_ALL;
 388
 389         dev_info->speed_capa =
 390                 ETH_LINK_SPEED_10G |
 391                 ETH_LINK_SPEED_25G |
 392                 ETH_LINK_SPEED_40G |
 393                 ETH_LINK_SPEED_50G |
 394                 ETH_LINK_SPEED_100G;
 395
 396         /*
 397          * Per-queue capabilities. Actually most of the offloads are enabled
 398          * by default on the port and can be used on selected queues (by adding
 399          * packet flags at runtime when required)
 400          */
 401
 402         dev_info->rx_queue_offload_capa =
 403                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 404                 DEV_RX_OFFLOAD_UDP_CKSUM |
 405                 DEV_RX_OFFLOAD_TCP_CKSUM |
 406                 0;
 407
 408         dev_info->tx_queue_offload_capa =
 409                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 410                 DEV_TX_OFFLOAD_UDP_CKSUM |
 411                 DEV_TX_OFFLOAD_TCP_CKSUM |
 412                 DEV_TX_OFFLOAD_VLAN_INSERT |
 413                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 414                 DEV_TX_OFFLOAD_OUTER_UDP_CKSUM |
 415                 0;
 416
 417         /*
 418          * Per-port capabilities
 419          * See ionic_set_features to request and check supported features
 420          */
 421
 422         dev_info->rx_offload_capa = dev_info->rx_queue_offload_capa |
 423                 DEV_RX_OFFLOAD_JUMBO_FRAME |
 424                 DEV_RX_OFFLOAD_VLAN_FILTER |
 425                 DEV_RX_OFFLOAD_VLAN_STRIP |
 426                 DEV_RX_OFFLOAD_SCATTER |
 427                 0;
 428
 429         dev_info->tx_offload_capa = dev_info->tx_queue_offload_capa |
 430                 DEV_TX_OFFLOAD_MULTI_SEGS |
 431                 DEV_TX_OFFLOAD_TCP_TSO |
 432                 0;
 433
 434         dev_info->rx_desc_lim = rx_desc_lim;
 435         dev_info->tx_desc_lim = tx_desc_lim;
 436
 437         /* Driver-preferred Rx/Tx parameters */
 438         dev_info->default_rxportconf.burst_size = 32;
 439         dev_info->default_txportconf.burst_size = 32;
 440         dev_info->default_rxportconf.nb_queues = 1;
 441         dev_info->default_txportconf.nb_queues = 1;
 442         dev_info->default_rxportconf.ring_size = IONIC_DEF_TXRX_DESC;
 443         dev_info->default_txportconf.ring_size = IONIC_DEF_TXRX_DESC;
 444
 445         return 0;
 446 }
 447
 448 static int
 449 ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev,
 450                 struct rte_eth_fc_conf *fc_conf)
 451 {
 452         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 453         struct ionic_adapter *adapter = lif->adapter;
 454         struct ionic_dev *idev = &adapter->idev;
 455
 456         if (idev->port_info) {
 457                 fc_conf->autoneg = idev->port_info->config.an_enable;
 458
 459                 if (idev->port_info->config.pause_type)
 460                         fc_conf->mode = RTE_FC_FULL;
 461                 else
 462                         fc_conf->mode = RTE_FC_NONE;
 463         }
 464
 465         return 0;
 466 }
 467
 468 static int
 469 ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev,
 470                 struct rte_eth_fc_conf *fc_conf)
 471 {
 472         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 473         struct ionic_adapter *adapter = lif->adapter;
 474         struct ionic_dev *idev = &adapter->idev;
 475         uint8_t pause_type = IONIC_PORT_PAUSE_TYPE_NONE;
 476         uint8_t an_enable;
 477
 478         switch (fc_conf->mode) {
 479         case RTE_FC_NONE:
 480                 pause_type = IONIC_PORT_PAUSE_TYPE_NONE;
 481                 break;
 482         case RTE_FC_FULL:
 483                 pause_type = IONIC_PORT_PAUSE_TYPE_LINK;
 484                 break;
 485         case RTE_FC_RX_PAUSE:
 486         case RTE_FC_TX_PAUSE:
 487                 return -ENOTSUP;
 488         }
 489
 490         an_enable = fc_conf->autoneg;
 491
 492         ionic_dev_cmd_port_pause(idev, pause_type);
 493         ionic_dev_cmd_port_autoneg(idev, an_enable);
 494
 495         return 0;
 496 }
 497
 498 static int
 499 ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 500 {
 501         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 502         struct rte_eth_rxmode *rxmode;
 503         rxmode = &eth_dev->data->dev_conf.rxmode;
 504         int i;
 505
 506         if (mask & ETH_VLAN_STRIP_MASK) {
 507                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) {
 508                         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 509                                 struct ionic_qcq *rxq =
 510                                         eth_dev->data->rx_queues[i];
 511                                 rxq->offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
 512                         }
 513                         lif->features |= IONIC_ETH_HW_VLAN_RX_STRIP;
 514                 } else {
 515                         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 516                                 struct ionic_qcq *rxq =
 517                                         eth_dev->data->rx_queues[i];
 518                                 rxq->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
 519                         }
 520                         lif->features &= ~IONIC_ETH_HW_VLAN_RX_STRIP;
 521                 }
 522         }
 523
 524         if (mask & ETH_VLAN_FILTER_MASK) {
 525                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 526                         lif->features |= IONIC_ETH_HW_VLAN_RX_FILTER;
 527                 else
 528                         lif->features &= ~IONIC_ETH_HW_VLAN_RX_FILTER;
 529         }
 530
 531         ionic_lif_set_features(lif);
 532
 533         return 0;
 534 }
 535
 536 static int
 537 ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
 538                 struct rte_eth_rss_reta_entry64 *reta_conf,
 539                 uint16_t reta_size)
 540 {
 541         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 542         struct ionic_adapter *adapter = lif->adapter;
 543         struct ionic_identity *ident = &adapter->ident;
 544         uint32_t i, j, index, num;
 545
 546         IONIC_PRINT_CALL();
 547
 548         if (!lif->rss_ind_tbl) {
 549                 IONIC_PRINT(ERR, "RSS RETA not initialized, "
 550                         "can't update the table");
 551                 return -EINVAL;
 552         }
 553
 554         if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 555                 IONIC_PRINT(ERR, "The size of hash lookup table configured "
 556                         "(%d) doesn't match the number hardware can supported "
 557                         "(%d)",
 558                         reta_size, ident->lif.eth.rss_ind_tbl_sz);
 559                 return -EINVAL;
 560         }
 561
 562         num = lif->adapter->ident.lif.eth.rss_ind_tbl_sz / RTE_RETA_GROUP_SIZE;
 563
 564         for (i = 0; i < num; i++) {
 565                 for (j = 0; j < RTE_RETA_GROUP_SIZE; j++) {
 566                         if (reta_conf[i].mask & ((uint64_t)1 << j)) {
 567                                 index = (i * RTE_RETA_GROUP_SIZE) + j;
 568                                 lif->rss_ind_tbl[index] = reta_conf[i].reta[j];
 569                         }
 570                 }
 571         }
 572
 573         return ionic_lif_rss_config(lif, lif->rss_types, NULL, NULL);
 574 }
 575
 576 static int
 577 ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
 578                 struct rte_eth_rss_reta_entry64 *reta_conf,
 579                 uint16_t reta_size)
 580 {
 581         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 582         struct ionic_adapter *adapter = lif->adapter;
 583         struct ionic_identity *ident = &adapter->ident;
 584         int i, num;
 585
 586         IONIC_PRINT_CALL();
 587
 588         if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 589                 IONIC_PRINT(ERR, "The size of hash lookup table configured "
 590                         "(%d) doesn't match the number hardware can supported "
 591                         "(%d)",
 592                         reta_size, ident->lif.eth.rss_ind_tbl_sz);
 593                 return -EINVAL;
 594         }
 595
 596         if (!lif->rss_ind_tbl) {
 597                 IONIC_PRINT(ERR, "RSS RETA has not been built yet");
 598                 return -EINVAL;
 599         }
 600
 601         num = reta_size / RTE_RETA_GROUP_SIZE;
 602
 603         for (i = 0; i < num; i++) {
 604                 memcpy(reta_conf->reta,
 605                         &lif->rss_ind_tbl[i * RTE_RETA_GROUP_SIZE],
 606                         RTE_RETA_GROUP_SIZE);
 607                 reta_conf++;
 608         }
 609
 610         return 0;
 611 }
 612
 613 static int
 614 ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
 615                 struct rte_eth_rss_conf *rss_conf)
 616 {
 617         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 618         uint64_t rss_hf = 0;
 619
 620         IONIC_PRINT_CALL();
 621
 622         if (!lif->rss_ind_tbl) {
 623                 IONIC_PRINT(NOTICE, "RSS not enabled");
 624                 return 0;
 625         }
 626
 627         /* Get key value (if not null, rss_key is 40-byte) */
 628         if (rss_conf->rss_key != NULL &&
 629                         rss_conf->rss_key_len >= IONIC_RSS_HASH_KEY_SIZE)
 630                 memcpy(rss_conf->rss_key, lif->rss_hash_key,
 631                         IONIC_RSS_HASH_KEY_SIZE);
 632
 633         if (lif->rss_types & IONIC_RSS_TYPE_IPV4)
 634                 rss_hf |= ETH_RSS_IPV4;
 635         if (lif->rss_types & IONIC_RSS_TYPE_IPV4_TCP)
 636                 rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 637         if (lif->rss_types & IONIC_RSS_TYPE_IPV4_UDP)
 638                 rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 639         if (lif->rss_types & IONIC_RSS_TYPE_IPV6)
 640                 rss_hf |= ETH_RSS_IPV6;
 641         if (lif->rss_types & IONIC_RSS_TYPE_IPV6_TCP)
 642                 rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 643         if (lif->rss_types & IONIC_RSS_TYPE_IPV6_UDP)
 644                 rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 645
 646         rss_conf->rss_hf = rss_hf;
 647
 648         return 0;
 649 }
 650
 651 static int
 652 ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev,
 653                 struct rte_eth_rss_conf *rss_conf)
 654 {
 655         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 656         uint32_t rss_types = 0;
 657         uint8_t *key = NULL;
 658
 659         IONIC_PRINT_CALL();
 660
 661         if (rss_conf->rss_key)
 662                 key = rss_conf->rss_key;
 663
 664         if ((rss_conf->rss_hf & IONIC_ETH_RSS_OFFLOAD_ALL) == 0) {
 665                 /*
 666                  * Can't disable rss through hash flags,
 667                  * if it is enabled by default during init
 668                  */
 669                 if (lif->rss_ind_tbl)
 670                         return -EINVAL;
 671         } else {
 672                 /* Can't enable rss if disabled by default during init */
 673                 if (!lif->rss_ind_tbl)
 674                         return -EINVAL;
 675
 676                 if (rss_conf->rss_hf & ETH_RSS_IPV4)
 677                         rss_types |= IONIC_RSS_TYPE_IPV4;
 678                 if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 679                         rss_types |= IONIC_RSS_TYPE_IPV4_TCP;
 680                 if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 681                         rss_types |= IONIC_RSS_TYPE_IPV4_UDP;
 682                 if (rss_conf->rss_hf & ETH_RSS_IPV6)
 683                         rss_types |= IONIC_RSS_TYPE_IPV6;
 684                 if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 685                         rss_types |= IONIC_RSS_TYPE_IPV6_TCP;
 686                 if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 687                         rss_types |= IONIC_RSS_TYPE_IPV6_UDP;
 688
 689                 ionic_lif_rss_config(lif, rss_types, key, NULL);
 690         }
 691
 692         return 0;
 693 }
 694
 695 static int
 696 ionic_dev_stats_get(struct rte_eth_dev *eth_dev,
 697                 struct rte_eth_stats *stats)
 698 {
 699         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 700
 701         ionic_lif_get_stats(lif, stats);
 702
 703         return 0;
 704 }
 705
 706 static int
 707 ionic_dev_stats_reset(struct rte_eth_dev *eth_dev)
 708 {
 709         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 710
 711         IONIC_PRINT_CALL();
 712
 713         ionic_lif_reset_stats(lif);
 714
 715         return 0;
 716 }
 717
 718 static int
 719 ionic_dev_xstats_get_names(__rte_unused struct rte_eth_dev *eth_dev,
 720                 struct rte_eth_xstat_name *xstats_names,
 721                 __rte_unused unsigned int size)
 722 {
 723         unsigned int i;
 724
 725         if (xstats_names != NULL) {
 726                 for (i = 0; i < IONIC_NB_HW_STATS; i++) {
 727                         snprintf(xstats_names[i].name,
 728                                         sizeof(xstats_names[i].name),
 729                                         "%s", rte_ionic_xstats_strings[i].name);
 730                 }
 731         }
 732
 733         return IONIC_NB_HW_STATS;
 734 }
 735
 736 static int
 737 ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *eth_dev,
 738                 struct rte_eth_xstat_name *xstats_names, const uint64_t *ids,
 739                 unsigned int limit)
 740 {
 741         struct rte_eth_xstat_name xstats_names_copy[IONIC_NB_HW_STATS];
 742         uint16_t i;
 743
 744         if (!ids) {
 745                 if (xstats_names != NULL) {
 746                         for (i = 0; i < IONIC_NB_HW_STATS; i++) {
 747                                 snprintf(xstats_names[i].name,
 748                                         sizeof(xstats_names[i].name),
 749                                         "%s", rte_ionic_xstats_strings[i].name);
 750                         }
 751                 }
 752
 753                 return IONIC_NB_HW_STATS;
 754         }
 755
 756         ionic_dev_xstats_get_names_by_id(eth_dev, xstats_names_copy, NULL,
 757                 IONIC_NB_HW_STATS);
 758
 759         for (i = 0; i < limit; i++) {
 760                 if (ids[i] >= IONIC_NB_HW_STATS) {
 761                         IONIC_PRINT(ERR, "id value isn't valid");
 762                         return -1;
 763                 }
 764
 765                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 766         }
 767
 768         return limit;
 769 }
 770
 771 static int
 772 ionic_dev_xstats_get(struct rte_eth_dev *eth_dev, struct rte_eth_xstat *xstats,
 773                 unsigned int n)
 774 {
 775         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 776         struct ionic_lif_stats hw_stats;
 777         uint16_t i;
 778
 779         if (n < IONIC_NB_HW_STATS)
 780                 return IONIC_NB_HW_STATS;
 781
 782         ionic_lif_get_hw_stats(lif, &hw_stats);
 783
 784         for (i = 0; i < IONIC_NB_HW_STATS; i++) {
 785                 xstats[i].value = *(uint64_t *)(((char *)&hw_stats) +
 786                                 rte_ionic_xstats_strings[i].offset);
 787                 xstats[i].id = i;
 788         }
 789
 790         return IONIC_NB_HW_STATS;
 791 }
 792
 793 static int
 794 ionic_dev_xstats_get_by_id(struct rte_eth_dev *eth_dev, const uint64_t *ids,
 795                 uint64_t *values, unsigned int n)
 796 {
 797         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 798         struct ionic_lif_stats hw_stats;
 799         uint64_t values_copy[IONIC_NB_HW_STATS];
 800         uint16_t i;
 801
 802         if (!ids) {
 803                 if (!ids && n < IONIC_NB_HW_STATS)
 804                         return IONIC_NB_HW_STATS;
 805
 806                 ionic_lif_get_hw_stats(lif, &hw_stats);
 807
 808                 for (i = 0; i < IONIC_NB_HW_STATS; i++) {
 809                         values[i] = *(uint64_t *)(((char *)&hw_stats) +
 810                                         rte_ionic_xstats_strings[i].offset);
 811                 }
 812
 813                 return IONIC_NB_HW_STATS;
 814         }
 815
 816         ionic_dev_xstats_get_by_id(eth_dev, NULL, values_copy,
 817                         IONIC_NB_HW_STATS);
 818
 819         for (i = 0; i < n; i++) {
 820                 if (ids[i] >= IONIC_NB_HW_STATS) {
 821                         IONIC_PRINT(ERR, "id value isn't valid");
 822                         return -1;
 823                 }
 824
 825                 values[i] = values_copy[ids[i]];
 826         }
 827
 828         return n;
 829 }
 830
 831 static int
 832 ionic_dev_xstats_reset(struct rte_eth_dev *eth_dev)
 833 {
 834         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 835
 836         ionic_lif_reset_hw_stats(lif);
 837
 838         return 0;
 839 }
 840
 841 static int
 842 ionic_dev_configure(struct rte_eth_dev *eth_dev)
 843 {
 844         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 845         int err;
 846
 847         IONIC_PRINT_CALL();
 848
 849         err = ionic_lif_configure(lif);
 850         if (err) {
 851                 IONIC_PRINT(ERR, "Cannot configure LIF: %d", err);
 852                 return err;
 853         }
 854
 855         return 0;
 856 }
 857
 858 static inline uint32_t
 859 ionic_parse_link_speeds(uint16_t link_speeds)
 860 {
 861         if (link_speeds & ETH_LINK_SPEED_100G)
 862                 return 100000;
 863         else if (link_speeds & ETH_LINK_SPEED_50G)
 864                 return 50000;
 865         else if (link_speeds & ETH_LINK_SPEED_40G)
 866                 return 40000;
 867         else if (link_speeds & ETH_LINK_SPEED_25G)
 868                 return 25000;
 869         else if (link_speeds & ETH_LINK_SPEED_10G)
 870                 return 10000;
 871         else
 872                 return 0;
 873 }
 874
 875 /*
 876  * Configure device link speed and setup link.
 877  * It returns 0 on success.
 878  */
 879 static int
 880 ionic_dev_start(struct rte_eth_dev *eth_dev)
 881 {
 882         struct rte_eth_conf *dev_conf = &eth_dev->data->dev_conf;
 883         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 884         struct ionic_adapter *adapter = lif->adapter;
 885         struct ionic_dev *idev = &adapter->idev;
 886         uint32_t allowed_speeds;
 887         int err;
 888
 889         IONIC_PRINT_CALL();
 890
 891         allowed_speeds =
 892                 ETH_LINK_SPEED_FIXED |
 893                 ETH_LINK_SPEED_10G |
 894                 ETH_LINK_SPEED_25G |
 895                 ETH_LINK_SPEED_40G |
 896                 ETH_LINK_SPEED_50G |
 897                 ETH_LINK_SPEED_100G;
 898
 899         if (dev_conf->link_speeds & ~allowed_speeds) {
 900                 IONIC_PRINT(ERR, "Invalid link setting");
 901                 return -EINVAL;
 902         }
 903
 904         err = ionic_lif_start(lif);
 905         if (err) {
 906                 IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
 907                 return err;
 908         }
 909
 910         if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
 911                 uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
 912
 913                 if (speed)
 914                         ionic_dev_cmd_port_speed(idev, speed);
 915         }
 916
 917         ionic_dev_link_update(eth_dev, 0);
 918
 919         return 0;
 920 }
 921
 922 /*
 923  * Stop device: disable rx and tx functions to allow for reconfiguring.
 924  */
 925 static void
 926 ionic_dev_stop(struct rte_eth_dev *eth_dev)
 927 {
 928         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 929         int err;
 930
 931         IONIC_PRINT_CALL();
 932
 933         err = ionic_lif_stop(lif);
 934         if (err)
 935                 IONIC_PRINT(ERR, "Cannot stop LIF: %d", err);
 936 }
 937
 938 /*
 939  * Reset and stop device.
 940  */
 941 static void
 942 ionic_dev_close(struct rte_eth_dev *eth_dev)
 943 {
 944         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 945         int err;
 946
 947         IONIC_PRINT_CALL();
 948
 949         err = ionic_lif_stop(lif);
 950         if (err) {
 951                 IONIC_PRINT(ERR, "Cannot stop LIF: %d", err);
 952                 return;
 953         }
 954
 955         err = eth_ionic_dev_uninit(eth_dev);
 956         if (err) {
 957                 IONIC_PRINT(ERR, "Cannot destroy LIF: %d", err);
 958                 return;
 959         }
 960 }
 961
 962 static int
 963 eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params)
 964 {
 965         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 966         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 967         struct ionic_adapter *adapter = (struct ionic_adapter *)init_params;
 968         int err;
 969
 970         IONIC_PRINT_CALL();
 971
 972         eth_dev->dev_ops = &ionic_eth_dev_ops;
 973         eth_dev->rx_pkt_burst = &ionic_recv_pkts;
 974         eth_dev->tx_pkt_burst = &ionic_xmit_pkts;
 975         eth_dev->tx_pkt_prepare = &ionic_prep_pkts;
 976
 977         /* Multi-process not supported, primary does initialization anyway */
 978         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 979                 return 0;
 980
 981         rte_eth_copy_pci_info(eth_dev, pci_dev);
 982
 983         lif->index = adapter->nlifs;
 984         lif->eth_dev = eth_dev;
 985         lif->adapter = adapter;
 986         adapter->lifs[adapter->nlifs] = lif;
 987
 988         IONIC_PRINT(DEBUG, "Up to %u MAC addresses supported",
 989                 adapter->max_mac_addrs);
 990
 991         /* Allocate memory for storing MAC addresses */
 992         eth_dev->data->mac_addrs = rte_zmalloc("ionic",
 993                 RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs, 0);
 994
 995         if (eth_dev->data->mac_addrs == NULL) {
 996                 IONIC_PRINT(ERR, "Failed to allocate %u bytes needed to "
 997                         "store MAC addresses",
 998                         RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs);
 999                 err = -ENOMEM;
1000                 goto err;
1001         }
1002
1003         err = ionic_lif_alloc(lif);
1004         if (err) {
1005                 IONIC_PRINT(ERR, "Cannot allocate LIFs: %d, aborting",
1006                         err);
1007                 goto err;
1008         }
1009
1010         err = ionic_lif_init(lif);
1011         if (err) {
1012                 IONIC_PRINT(ERR, "Cannot init LIFs: %d, aborting", err);
1013                 goto err_free_lif;
1014         }
1015
1016         /* Copy the MAC address */
1017         rte_ether_addr_copy((struct rte_ether_addr *)lif->mac_addr,
1018                 &eth_dev->data->mac_addrs[0]);
1019
1020         IONIC_PRINT(DEBUG, "Port %u initialized", eth_dev->data->port_id);
1021
1022         return 0;
1023
1024 err_free_lif:
1025         ionic_lif_free(lif);
1026 err:
1027         return err;
1028 }
1029
1030 static int
1031 eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev)
1032 {
1033         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
1034         struct ionic_adapter *adapter = lif->adapter;
1035
1036         IONIC_PRINT_CALL();
1037
1038         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1039                 return 0;
1040
1041         adapter->lifs[lif->index] = NULL;
1042
1043         ionic_lif_deinit(lif);
1044         ionic_lif_free(lif);
1045
1046         eth_dev->dev_ops = NULL;
1047         eth_dev->rx_pkt_burst = NULL;
1048         eth_dev->tx_pkt_burst = NULL;
1049         eth_dev->tx_pkt_prepare = NULL;
1050
1051         return 0;
1052 }
1053
1054 static int
1055 ionic_configure_intr(struct ionic_adapter *adapter)
1056 {
1057         struct rte_pci_device *pci_dev = adapter->pci_dev;
1058         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1059         int err;
1060
1061         IONIC_PRINT(DEBUG, "Configuring %u intrs", adapter->nintrs);
1062
1063         if (rte_intr_efd_enable(intr_handle, adapter->nintrs)) {
1064                 IONIC_PRINT(ERR, "Fail to create eventfd");
1065                 return -1;
1066         }
1067
1068         if (rte_intr_dp_is_en(intr_handle))
1069                 IONIC_PRINT(DEBUG,
1070                         "Packet I/O interrupt on datapath is enabled");
1071
1072         if (!intr_handle->intr_vec) {
1073                 intr_handle->intr_vec = rte_zmalloc("intr_vec",
1074                         adapter->nintrs * sizeof(int), 0);
1075
1076                 if (!intr_handle->intr_vec) {
1077                         IONIC_PRINT(ERR, "Failed to allocate %u vectors",
1078                                 adapter->nintrs);
1079                         return -ENOMEM;
1080                 }
1081         }
1082
1083         err = rte_intr_callback_register(intr_handle,
1084                 ionic_dev_interrupt_handler,
1085                 adapter);
1086
1087         if (err) {
1088                 IONIC_PRINT(ERR,
1089                         "Failure registering interrupts handler (%d)",
1090                         err);
1091                 return err;
1092         }
1093
1094         /* enable intr mapping */
1095         err = rte_intr_enable(intr_handle);
1096
1097         if (err) {
1098                 IONIC_PRINT(ERR, "Failure enabling interrupts (%d)", err);
1099                 return err;
1100         }
1101
1102         return 0;
1103 }
1104
1105 static void
1106 ionic_unconfigure_intr(struct ionic_adapter *adapter)
1107 {
1108         struct rte_pci_device *pci_dev = adapter->pci_dev;
1109         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1110
1111         rte_intr_disable(intr_handle);
1112
1113         rte_intr_callback_unregister(intr_handle,
1114                 ionic_dev_interrupt_handler,
1115                 adapter);
1116 }
1117
1118 static int
1119 eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1120                 struct rte_pci_device *pci_dev)
1121 {
1122         char name[RTE_ETH_NAME_MAX_LEN];
1123         struct rte_mem_resource *resource;
1124         struct ionic_adapter *adapter;
1125         struct ionic_hw *hw;
1126         unsigned long i;
1127         int err;
1128
1129         /* Check structs (trigger error at compilation time) */
1130         ionic_struct_size_checks();
1131
1132         /* Multi-process not supported */
1133         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1134                 err = -EPERM;
1135                 goto err;
1136         }
1137
1138         IONIC_PRINT(DEBUG, "Initializing device %s",
1139                 pci_dev->device.name);
1140
1141         adapter = rte_zmalloc("ionic", sizeof(*adapter), 0);
1142         if (!adapter) {
1143                 IONIC_PRINT(ERR, "OOM");
1144                 err = -ENOMEM;
1145                 goto err;
1146         }
1147
1148         adapter->pci_dev = pci_dev;
1149         hw = &adapter->hw;
1150
1151         hw->device_id = pci_dev->id.device_id;
1152         hw->vendor_id = pci_dev->id.vendor_id;
1153
1154         err = ionic_init_mac(hw);
1155         if (err != 0) {
1156                 IONIC_PRINT(ERR, "Mac init failed: %d", err);
1157                 err = -EIO;
1158                 goto err_free_adapter;
1159         }
1160
1161         adapter->is_mgmt_nic = (pci_dev->id.device_id == IONIC_DEV_ID_ETH_MGMT);
1162
1163         adapter->num_bars = 0;
1164         for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {
1165                 resource = &pci_dev->mem_resource[i];
1166                 if (resource->phys_addr == 0 || resource->len == 0)
1167                         continue;
1168                 adapter->bars[adapter->num_bars].vaddr = resource->addr;
1169                 adapter->bars[adapter->num_bars].bus_addr = resource->phys_addr;
1170                 adapter->bars[adapter->num_bars].len = resource->len;
1171                 adapter->num_bars++;
1172         }
1173
1174         /* Discover ionic dev resources */
1175
1176         err = ionic_setup(adapter);
1177         if (err) {
1178                 IONIC_PRINT(ERR, "Cannot setup device: %d, aborting", err);
1179                 goto err_free_adapter;
1180         }
1181
1182         err = ionic_identify(adapter);
1183         if (err) {
1184                 IONIC_PRINT(ERR, "Cannot identify device: %d, aborting",
1185                         err);
1186                 goto err_free_adapter;
1187         }
1188
1189         err = ionic_init(adapter);
1190         if (err) {
1191                 IONIC_PRINT(ERR, "Cannot init device: %d, aborting", err);
1192                 goto err_free_adapter;
1193         }
1194
1195         /* Configure the ports */
1196         err = ionic_port_identify(adapter);
1197         if (err) {
1198                 IONIC_PRINT(ERR, "Cannot identify port: %d, aborting",
1199                         err);
1200                 goto err_free_adapter;
1201         }
1202
1203         err = ionic_port_init(adapter);
1204         if (err) {
1205                 IONIC_PRINT(ERR, "Cannot init port: %d, aborting", err);
1206                 goto err_free_adapter;
1207         }
1208
1209         /* Configure LIFs */
1210         err = ionic_lif_identify(adapter);
1211         if (err) {
1212                 IONIC_PRINT(ERR, "Cannot identify lif: %d, aborting", err);
1213                 goto err_free_adapter;
1214         }
1215
1216         /* Allocate and init LIFs */
1217         err = ionic_lifs_size(adapter);
1218         if (err) {
1219                 IONIC_PRINT(ERR, "Cannot size LIFs: %d, aborting", err);
1220                 goto err_free_adapter;
1221         }
1222
1223         adapter->max_mac_addrs = adapter->ident.lif.eth.max_ucast_filters;
1224
1225         adapter->nlifs = 0;
1226         for (i = 0; i < adapter->ident.dev.nlifs; i++) {
1227                 snprintf(name, sizeof(name), "net_%s_lif_%lu",
1228                         pci_dev->device.name, i);
1229
1230                 err = rte_eth_dev_create(&pci_dev->device, name,
1231                         sizeof(struct ionic_lif),
1232                         NULL, NULL,
1233                         eth_ionic_dev_init, adapter);
1234                 if (err) {
1235                         IONIC_PRINT(ERR, "Cannot create eth device for "
1236                                 "ionic lif %s", name);
1237                         break;
1238                 }
1239
1240                 adapter->nlifs++;
1241         }
1242
1243         err = ionic_configure_intr(adapter);
1244
1245         if (err) {
1246                 IONIC_PRINT(ERR, "Failed to configure interrupts");
1247                 goto err_free_adapter;
1248         }
1249
1250         return 0;
1251
1252 err_free_adapter:
1253         rte_free(adapter);
1254 err:
1255         return err;
1256 }
1257
1258 static int
1259 eth_ionic_pci_remove(struct rte_pci_device *pci_dev __rte_unused)
1260 {
1261         char name[RTE_ETH_NAME_MAX_LEN];
1262         struct ionic_adapter *adapter = NULL;
1263         struct rte_eth_dev *eth_dev;
1264         struct ionic_lif *lif;
1265         uint32_t i;
1266
1267         /* Adapter lookup is using (the first) eth_dev name */
1268         snprintf(name, sizeof(name), "net_%s_lif_0",
1269                 pci_dev->device.name);
1270
1271         eth_dev = rte_eth_dev_allocated(name);
1272         if (eth_dev) {
1273                 lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
1274                 adapter = lif->adapter;
1275         }
1276
1277         if (adapter) {
1278                 ionic_unconfigure_intr(adapter);
1279
1280                 for (i = 0; i < adapter->nlifs; i++) {
1281                         lif = adapter->lifs[i];
1282                         rte_eth_dev_destroy(lif->eth_dev, eth_ionic_dev_uninit);
1283                 }
1284
1285                 rte_free(adapter);
1286         }
1287
1288         return 0;
1289 }
1290
1291 static struct rte_pci_driver rte_ionic_pmd = {
1292         .id_table = pci_id_ionic_map,
1293         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1294         .probe = eth_ionic_pci_probe,
1295         .remove = eth_ionic_pci_remove,
1296 };
1297
1298 RTE_PMD_REGISTER_PCI(net_ionic, rte_ionic_pmd);
1299 RTE_PMD_REGISTER_PCI_TABLE(net_ionic, pci_id_ionic_map);
1300 RTE_PMD_REGISTER_KMOD_DEP(net_ionic, "* igb_uio | uio_pci_generic | vfio-pci");
1301
1302 RTE_INIT(ionic_init_log)
1303 {
1304         ionic_logtype = rte_log_register("pmd.net.ionic");
1305         if (ionic_logtype >= 0)
1306                 rte_log_set_level(ionic_logtype, RTE_LOG_NOTICE);
1307 }