net/ionic: fix link speed and autonegotiation
[dpdk.git] / drivers / net / ionic / ionic_ethdev.c
1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2  * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
3  */
4
5 #include <rte_pci.h>
6 #include <rte_bus_pci.h>
7 #include <rte_ethdev.h>
8 #include <rte_ethdev_driver.h>
9 #include <rte_malloc.h>
10 #include <rte_ethdev_pci.h>
11
12 #include "ionic_logs.h"
13 #include "ionic.h"
14 #include "ionic_dev.h"
15 #include "ionic_mac_api.h"
16 #include "ionic_lif.h"
17 #include "ionic_ethdev.h"
18 #include "ionic_rxtx.h"
19
20 static int  eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params);
21 static int  eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev);
22 static int  ionic_dev_info_get(struct rte_eth_dev *eth_dev,
23         struct rte_eth_dev_info *dev_info);
24 static int  ionic_dev_configure(struct rte_eth_dev *dev);
25 static int  ionic_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
26 static int  ionic_dev_start(struct rte_eth_dev *dev);
27 static int  ionic_dev_stop(struct rte_eth_dev *dev);
28 static int  ionic_dev_close(struct rte_eth_dev *dev);
29 static int  ionic_dev_set_link_up(struct rte_eth_dev *dev);
30 static int  ionic_dev_set_link_down(struct rte_eth_dev *dev);
31 static int  ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev,
32         struct rte_eth_fc_conf *fc_conf);
33 static int  ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev,
34         struct rte_eth_fc_conf *fc_conf);
35 static int  ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask);
36 static int  ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
37         struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size);
38 static int  ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
39         struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size);
40 static int  ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
41         struct rte_eth_rss_conf *rss_conf);
42 static int  ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev,
43         struct rte_eth_rss_conf *rss_conf);
44 static int  ionic_dev_stats_get(struct rte_eth_dev *eth_dev,
45         struct rte_eth_stats *stats);
46 static int  ionic_dev_stats_reset(struct rte_eth_dev *eth_dev);
47 static int  ionic_dev_xstats_get(struct rte_eth_dev *dev,
48         struct rte_eth_xstat *xstats, unsigned int n);
49 static int  ionic_dev_xstats_get_by_id(struct rte_eth_dev *dev,
50         const uint64_t *ids, uint64_t *values, unsigned int n);
51 static int  ionic_dev_xstats_reset(struct rte_eth_dev *dev);
52 static int  ionic_dev_xstats_get_names(struct rte_eth_dev *dev,
53         struct rte_eth_xstat_name *xstats_names, unsigned int size);
54 static int  ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *dev,
55         struct rte_eth_xstat_name *xstats_names, const uint64_t *ids,
56         unsigned int limit);
57 static int  ionic_dev_fw_version_get(struct rte_eth_dev *eth_dev,
58         char *fw_version, size_t fw_size);
59
60 static const struct rte_pci_id pci_id_ionic_map[] = {
61         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_PF) },
62         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_VF) },
63         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_MGMT) },
64         { .vendor_id = 0, /* sentinel */ },
65 };
66
67 static const struct rte_eth_desc_lim rx_desc_lim = {
68         .nb_max = IONIC_MAX_RING_DESC,
69         .nb_min = IONIC_MIN_RING_DESC,
70         .nb_align = 1,
71 };
72
73 static const struct rte_eth_desc_lim tx_desc_lim = {
74         .nb_max = IONIC_MAX_RING_DESC,
75         .nb_min = IONIC_MIN_RING_DESC,
76         .nb_align = 1,
77         .nb_seg_max = IONIC_TX_MAX_SG_ELEMS,
78         .nb_mtu_seg_max = IONIC_TX_MAX_SG_ELEMS,
79 };
80
81 static const struct eth_dev_ops ionic_eth_dev_ops = {
82         .dev_infos_get          = ionic_dev_info_get,
83         .dev_configure          = ionic_dev_configure,
84         .mtu_set                = ionic_dev_mtu_set,
85         .dev_start              = ionic_dev_start,
86         .dev_stop               = ionic_dev_stop,
87         .dev_close              = ionic_dev_close,
88         .link_update            = ionic_dev_link_update,
89         .dev_set_link_up        = ionic_dev_set_link_up,
90         .dev_set_link_down      = ionic_dev_set_link_down,
91         .mac_addr_add           = ionic_dev_add_mac,
92         .mac_addr_remove        = ionic_dev_remove_mac,
93         .mac_addr_set           = ionic_dev_set_mac,
94         .vlan_filter_set        = ionic_dev_vlan_filter_set,
95         .promiscuous_enable     = ionic_dev_promiscuous_enable,
96         .promiscuous_disable    = ionic_dev_promiscuous_disable,
97         .allmulticast_enable    = ionic_dev_allmulticast_enable,
98         .allmulticast_disable   = ionic_dev_allmulticast_disable,
99         .flow_ctrl_get          = ionic_flow_ctrl_get,
100         .flow_ctrl_set          = ionic_flow_ctrl_set,
101         .rxq_info_get           = ionic_rxq_info_get,
102         .txq_info_get           = ionic_txq_info_get,
103         .rx_queue_setup         = ionic_dev_rx_queue_setup,
104         .rx_queue_release       = ionic_dev_rx_queue_release,
105         .rx_queue_start         = ionic_dev_rx_queue_start,
106         .rx_queue_stop          = ionic_dev_rx_queue_stop,
107         .tx_queue_setup         = ionic_dev_tx_queue_setup,
108         .tx_queue_release       = ionic_dev_tx_queue_release,
109         .tx_queue_start         = ionic_dev_tx_queue_start,
110         .tx_queue_stop          = ionic_dev_tx_queue_stop,
111         .vlan_offload_set       = ionic_vlan_offload_set,
112         .reta_update            = ionic_dev_rss_reta_update,
113         .reta_query             = ionic_dev_rss_reta_query,
114         .rss_hash_conf_get      = ionic_dev_rss_hash_conf_get,
115         .rss_hash_update        = ionic_dev_rss_hash_update,
116         .stats_get              = ionic_dev_stats_get,
117         .stats_reset            = ionic_dev_stats_reset,
118         .xstats_get             = ionic_dev_xstats_get,
119         .xstats_get_by_id       = ionic_dev_xstats_get_by_id,
120         .xstats_reset           = ionic_dev_xstats_reset,
121         .xstats_get_names       = ionic_dev_xstats_get_names,
122         .xstats_get_names_by_id = ionic_dev_xstats_get_names_by_id,
123         .fw_version_get         = ionic_dev_fw_version_get,
124 };
125
126 struct rte_ionic_xstats_name_off {
127         char name[RTE_ETH_XSTATS_NAME_SIZE];
128         unsigned int offset;
129 };
130
131 static const struct rte_ionic_xstats_name_off rte_ionic_xstats_strings[] = {
132         /* RX */
133         {"rx_ucast_bytes", offsetof(struct ionic_lif_stats,
134                         rx_ucast_bytes)},
135         {"rx_ucast_packets", offsetof(struct ionic_lif_stats,
136                         rx_ucast_packets)},
137         {"rx_mcast_bytes", offsetof(struct ionic_lif_stats,
138                         rx_mcast_bytes)},
139         {"rx_mcast_packets", offsetof(struct ionic_lif_stats,
140                         rx_mcast_packets)},
141         {"rx_bcast_bytes", offsetof(struct ionic_lif_stats,
142                         rx_bcast_bytes)},
143         {"rx_bcast_packets", offsetof(struct ionic_lif_stats,
144                         rx_bcast_packets)},
145         /* RX drops */
146         {"rx_ucast_drop_bytes", offsetof(struct ionic_lif_stats,
147                         rx_ucast_drop_bytes)},
148         {"rx_ucast_drop_packets", offsetof(struct ionic_lif_stats,
149                         rx_ucast_drop_packets)},
150         {"rx_mcast_drop_bytes", offsetof(struct ionic_lif_stats,
151                         rx_mcast_drop_bytes)},
152         {"rx_mcast_drop_packets", offsetof(struct ionic_lif_stats,
153                         rx_mcast_drop_packets)},
154         {"rx_bcast_drop_bytes", offsetof(struct ionic_lif_stats,
155                         rx_bcast_drop_bytes)},
156         {"rx_bcast_drop_packets", offsetof(struct ionic_lif_stats,
157                         rx_bcast_drop_packets)},
158         {"rx_dma_error", offsetof(struct ionic_lif_stats,
159                         rx_dma_error)},
160         /* TX */
161         {"tx_ucast_bytes", offsetof(struct ionic_lif_stats,
162                         tx_ucast_bytes)},
163         {"tx_ucast_packets", offsetof(struct ionic_lif_stats,
164                         tx_ucast_packets)},
165         {"tx_mcast_bytes", offsetof(struct ionic_lif_stats,
166                         tx_mcast_bytes)},
167         {"tx_mcast_packets", offsetof(struct ionic_lif_stats,
168                         tx_mcast_packets)},
169         {"tx_bcast_bytes", offsetof(struct ionic_lif_stats,
170                         tx_bcast_bytes)},
171         {"tx_bcast_packets", offsetof(struct ionic_lif_stats,
172                         tx_bcast_packets)},
173         /* TX drops */
174         {"tx_ucast_drop_bytes", offsetof(struct ionic_lif_stats,
175                         tx_ucast_drop_bytes)},
176         {"tx_ucast_drop_packets", offsetof(struct ionic_lif_stats,
177                         tx_ucast_drop_packets)},
178         {"tx_mcast_drop_bytes", offsetof(struct ionic_lif_stats,
179                         tx_mcast_drop_bytes)},
180         {"tx_mcast_drop_packets", offsetof(struct ionic_lif_stats,
181                         tx_mcast_drop_packets)},
182         {"tx_bcast_drop_bytes", offsetof(struct ionic_lif_stats,
183                         tx_bcast_drop_bytes)},
184         {"tx_bcast_drop_packets", offsetof(struct ionic_lif_stats,
185                         tx_bcast_drop_packets)},
186         {"tx_dma_error", offsetof(struct ionic_lif_stats,
187                         tx_dma_error)},
188         /* Rx Queue/Ring drops */
189         {"rx_queue_disabled", offsetof(struct ionic_lif_stats,
190                         rx_queue_disabled)},
191         {"rx_queue_empty", offsetof(struct ionic_lif_stats,
192                         rx_queue_empty)},
193         {"rx_queue_error", offsetof(struct ionic_lif_stats,
194                         rx_queue_error)},
195         {"rx_desc_fetch_error", offsetof(struct ionic_lif_stats,
196                         rx_desc_fetch_error)},
197         {"rx_desc_data_error", offsetof(struct ionic_lif_stats,
198                         rx_desc_data_error)},
199         /* Tx Queue/Ring drops */
200         {"tx_queue_disabled", offsetof(struct ionic_lif_stats,
201                         tx_queue_disabled)},
202         {"tx_queue_error", offsetof(struct ionic_lif_stats,
203                         tx_queue_error)},
204         {"tx_desc_fetch_error", offsetof(struct ionic_lif_stats,
205                         tx_desc_fetch_error)},
206         {"tx_desc_data_error", offsetof(struct ionic_lif_stats,
207                         tx_desc_data_error)},
208 };
209
210 #define IONIC_NB_HW_STATS (sizeof(rte_ionic_xstats_strings) / \
211                 sizeof(rte_ionic_xstats_strings[0]))
212
213 static int
214 ionic_dev_fw_version_get(struct rte_eth_dev *eth_dev,
215                 char *fw_version, size_t fw_size)
216 {
217         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
218         struct ionic_adapter *adapter = lif->adapter;
219
220         if (fw_version == NULL || fw_size <= 0)
221                 return -EINVAL;
222
223         snprintf(fw_version, fw_size, "%s",
224                  adapter->fw_version);
225         fw_version[fw_size - 1] = '\0';
226
227         return 0;
228 }
229
230 /*
231  * Set device link up, enable tx.
232  */
233 static int
234 ionic_dev_set_link_up(struct rte_eth_dev *eth_dev)
235 {
236         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
237         int err;
238
239         IONIC_PRINT_CALL();
240
241         err = ionic_lif_start(lif);
242         if (err)
243                 IONIC_PRINT(ERR, "Could not start lif to set link up");
244
245         ionic_dev_link_update(lif->eth_dev, 0);
246
247         return err;
248 }
249
250 /*
251  * Set device link down, disable tx.
252  */
253 static int
254 ionic_dev_set_link_down(struct rte_eth_dev *eth_dev)
255 {
256         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
257
258         IONIC_PRINT_CALL();
259
260         ionic_lif_stop(lif);
261
262         ionic_dev_link_update(lif->eth_dev, 0);
263
264         return 0;
265 }
266
267 int
268 ionic_dev_link_update(struct rte_eth_dev *eth_dev,
269                 int wait_to_complete __rte_unused)
270 {
271         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
272         struct ionic_adapter *adapter = lif->adapter;
273         struct rte_eth_link link;
274
275         IONIC_PRINT_CALL();
276
277         /* Initialize */
278         memset(&link, 0, sizeof(link));
279
280         if (adapter->idev.port_info->config.an_enable) {
281                 link.link_autoneg = ETH_LINK_AUTONEG;
282         }
283
284         if (!adapter->link_up ||
285             !(lif->state & IONIC_LIF_F_UP)) {
286                 /* Interface is down */
287                 link.link_status = ETH_LINK_DOWN;
288                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
289                 link.link_speed = ETH_SPEED_NUM_NONE;
290         } else {
291                 /* Interface is up */
292                 link.link_status = ETH_LINK_UP;
293                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
294                 switch (adapter->link_speed) {
295                 case  10000:
296                         link.link_speed = ETH_SPEED_NUM_10G;
297                         break;
298                 case  25000:
299                         link.link_speed = ETH_SPEED_NUM_25G;
300                         break;
301                 case  40000:
302                         link.link_speed = ETH_SPEED_NUM_40G;
303                         break;
304                 case  50000:
305                         link.link_speed = ETH_SPEED_NUM_50G;
306                         break;
307                 case 100000:
308                         link.link_speed = ETH_SPEED_NUM_100G;
309                         break;
310                 default:
311                         link.link_speed = ETH_SPEED_NUM_NONE;
312                         break;
313                 }
314         }
315
316         return rte_eth_linkstatus_set(eth_dev, &link);
317 }
318
319 /**
320  * Interrupt handler triggered by NIC for handling
321  * specific interrupt.
322  *
323  * @param param
324  *  The address of parameter registered before.
325  *
326  * @return
327  *  void
328  */
329 static void
330 ionic_dev_interrupt_handler(void *param)
331 {
332         struct ionic_adapter *adapter = (struct ionic_adapter *)param;
333
334         IONIC_PRINT(DEBUG, "->");
335
336         if (adapter->lif)
337                 ionic_notifyq_handler(adapter->lif, -1);
338 }
339
340 static int
341 ionic_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
342 {
343         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
344         uint32_t max_frame_size;
345         int err;
346
347         IONIC_PRINT_CALL();
348
349         /*
350          * Note: mtu check against IONIC_MIN_MTU, IONIC_MAX_MTU
351          * is done by the the API.
352          */
353
354         /*
355          * Max frame size is MTU + Ethernet header + VLAN + QinQ
356          * (plus ETHER_CRC_LEN if the adapter is able to keep CRC)
357          */
358         max_frame_size = mtu + RTE_ETHER_HDR_LEN + 4 + 4;
359
360         if (eth_dev->data->dev_conf.rxmode.max_rx_pkt_len < max_frame_size)
361                 return -EINVAL;
362
363         err = ionic_lif_change_mtu(lif, mtu);
364         if (err)
365                 return err;
366
367         return 0;
368 }
369
370 static int
371 ionic_dev_info_get(struct rte_eth_dev *eth_dev,
372                 struct rte_eth_dev_info *dev_info)
373 {
374         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
375         struct ionic_adapter *adapter = lif->adapter;
376         struct ionic_identity *ident = &adapter->ident;
377
378         IONIC_PRINT_CALL();
379
380         dev_info->max_rx_queues = (uint16_t)
381                 ident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ];
382         dev_info->max_tx_queues = (uint16_t)
383                 ident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ];
384         /* Also add ETHER_CRC_LEN if the adapter is able to keep CRC */
385         dev_info->min_rx_bufsize = IONIC_MIN_MTU + RTE_ETHER_HDR_LEN;
386         dev_info->max_rx_pktlen = IONIC_MAX_MTU + RTE_ETHER_HDR_LEN;
387         dev_info->max_mac_addrs = adapter->max_mac_addrs;
388         dev_info->min_mtu = IONIC_MIN_MTU;
389         dev_info->max_mtu = IONIC_MAX_MTU;
390
391         dev_info->hash_key_size = IONIC_RSS_HASH_KEY_SIZE;
392         dev_info->reta_size = ident->lif.eth.rss_ind_tbl_sz;
393         dev_info->flow_type_rss_offloads = IONIC_ETH_RSS_OFFLOAD_ALL;
394
395         dev_info->speed_capa =
396                 ETH_LINK_SPEED_10G |
397                 ETH_LINK_SPEED_25G |
398                 ETH_LINK_SPEED_40G |
399                 ETH_LINK_SPEED_50G |
400                 ETH_LINK_SPEED_100G;
401
402         /*
403          * Per-queue capabilities
404          * RTE does not support disabling a feature on a queue if it is
405          * enabled globally on the device. Thus the driver does not advertise
406          * capabilities like DEV_TX_OFFLOAD_IPV4_CKSUM as per-queue even
407          * though the driver would be otherwise capable of disabling it on
408          * a per-queue basis.
409          */
410
411         dev_info->rx_queue_offload_capa = 0;
412         dev_info->tx_queue_offload_capa = 0;
413
414         /*
415          * Per-port capabilities
416          * See ionic_set_features to request and check supported features
417          */
418
419         dev_info->rx_offload_capa = dev_info->rx_queue_offload_capa |
420                 DEV_RX_OFFLOAD_IPV4_CKSUM |
421                 DEV_RX_OFFLOAD_UDP_CKSUM |
422                 DEV_RX_OFFLOAD_TCP_CKSUM |
423                 DEV_RX_OFFLOAD_JUMBO_FRAME |
424                 DEV_RX_OFFLOAD_VLAN_FILTER |
425                 DEV_RX_OFFLOAD_VLAN_STRIP |
426                 DEV_RX_OFFLOAD_SCATTER |
427                 DEV_RX_OFFLOAD_RSS_HASH |
428                 0;
429
430         dev_info->tx_offload_capa = dev_info->tx_queue_offload_capa |
431                 DEV_TX_OFFLOAD_IPV4_CKSUM |
432                 DEV_TX_OFFLOAD_UDP_CKSUM |
433                 DEV_TX_OFFLOAD_TCP_CKSUM |
434                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
435                 DEV_TX_OFFLOAD_OUTER_UDP_CKSUM |
436                 DEV_TX_OFFLOAD_MULTI_SEGS |
437                 DEV_TX_OFFLOAD_TCP_TSO |
438                 DEV_TX_OFFLOAD_VLAN_INSERT |
439                 0;
440
441         dev_info->rx_desc_lim = rx_desc_lim;
442         dev_info->tx_desc_lim = tx_desc_lim;
443
444         /* Driver-preferred Rx/Tx parameters */
445         dev_info->default_rxportconf.burst_size = 32;
446         dev_info->default_txportconf.burst_size = 32;
447         dev_info->default_rxportconf.nb_queues = 1;
448         dev_info->default_txportconf.nb_queues = 1;
449         dev_info->default_rxportconf.ring_size = IONIC_DEF_TXRX_DESC;
450         dev_info->default_txportconf.ring_size = IONIC_DEF_TXRX_DESC;
451
452         dev_info->default_rxconf = (struct rte_eth_rxconf) {
453                 /* Packets are always dropped if no desc are available */
454                 .rx_drop_en = 1,
455         };
456
457         return 0;
458 }
459
460 static int
461 ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev,
462                 struct rte_eth_fc_conf *fc_conf)
463 {
464         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
465         struct ionic_adapter *adapter = lif->adapter;
466         struct ionic_dev *idev = &adapter->idev;
467
468         if (idev->port_info) {
469                 /* Flow control autoneg not supported */
470                 fc_conf->autoneg = 0;
471
472                 if (idev->port_info->config.pause_type)
473                         fc_conf->mode = RTE_FC_FULL;
474                 else
475                         fc_conf->mode = RTE_FC_NONE;
476         }
477
478         return 0;
479 }
480
481 static int
482 ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev,
483                 struct rte_eth_fc_conf *fc_conf)
484 {
485         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
486         struct ionic_adapter *adapter = lif->adapter;
487         struct ionic_dev *idev = &adapter->idev;
488         uint8_t pause_type = IONIC_PORT_PAUSE_TYPE_NONE;
489         int err;
490
491         if (fc_conf->autoneg) {
492                 IONIC_PRINT(WARNING, "Flow control autoneg not supported");
493                 return -ENOTSUP;
494         }
495
496         switch (fc_conf->mode) {
497         case RTE_FC_NONE:
498                 pause_type = IONIC_PORT_PAUSE_TYPE_NONE;
499                 break;
500         case RTE_FC_FULL:
501                 pause_type = IONIC_PORT_PAUSE_TYPE_LINK;
502                 break;
503         case RTE_FC_RX_PAUSE:
504         case RTE_FC_TX_PAUSE:
505                 return -ENOTSUP;
506         }
507
508         ionic_dev_cmd_port_pause(idev, pause_type);
509         err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
510         if (err)
511                 IONIC_PRINT(WARNING, "Failed to configure flow control");
512
513         return err;
514 }
515
516 static int
517 ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
518 {
519         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
520
521         ionic_lif_configure_vlan_offload(lif, mask);
522
523         ionic_lif_set_features(lif);
524
525         return 0;
526 }
527
528 static int
529 ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
530                 struct rte_eth_rss_reta_entry64 *reta_conf,
531                 uint16_t reta_size)
532 {
533         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
534         struct ionic_adapter *adapter = lif->adapter;
535         struct ionic_identity *ident = &adapter->ident;
536         uint32_t i, j, index, num;
537
538         IONIC_PRINT_CALL();
539
540         if (!lif->rss_ind_tbl) {
541                 IONIC_PRINT(ERR, "RSS RETA not initialized, "
542                         "can't update the table");
543                 return -EINVAL;
544         }
545
546         if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
547                 IONIC_PRINT(ERR, "The size of hash lookup table configured "
548                         "(%d) does not match the number hardware can support "
549                         "(%d)",
550                         reta_size, ident->lif.eth.rss_ind_tbl_sz);
551                 return -EINVAL;
552         }
553
554         num = lif->adapter->ident.lif.eth.rss_ind_tbl_sz / RTE_RETA_GROUP_SIZE;
555
556         for (i = 0; i < num; i++) {
557                 for (j = 0; j < RTE_RETA_GROUP_SIZE; j++) {
558                         if (reta_conf[i].mask & ((uint64_t)1 << j)) {
559                                 index = (i * RTE_RETA_GROUP_SIZE) + j;
560                                 lif->rss_ind_tbl[index] = reta_conf[i].reta[j];
561                         }
562                 }
563         }
564
565         return ionic_lif_rss_config(lif, lif->rss_types, NULL, NULL);
566 }
567
568 static int
569 ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
570                 struct rte_eth_rss_reta_entry64 *reta_conf,
571                 uint16_t reta_size)
572 {
573         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
574         struct ionic_adapter *adapter = lif->adapter;
575         struct ionic_identity *ident = &adapter->ident;
576         int i, num;
577
578         IONIC_PRINT_CALL();
579
580         if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
581                 IONIC_PRINT(ERR, "The size of hash lookup table configured "
582                         "(%d) does not match the number hardware can support "
583                         "(%d)",
584                         reta_size, ident->lif.eth.rss_ind_tbl_sz);
585                 return -EINVAL;
586         }
587
588         if (!lif->rss_ind_tbl) {
589                 IONIC_PRINT(ERR, "RSS RETA has not been built yet");
590                 return -EINVAL;
591         }
592
593         num = reta_size / RTE_RETA_GROUP_SIZE;
594
595         for (i = 0; i < num; i++) {
596                 memcpy(reta_conf->reta,
597                         &lif->rss_ind_tbl[i * RTE_RETA_GROUP_SIZE],
598                         RTE_RETA_GROUP_SIZE);
599                 reta_conf++;
600         }
601
602         return 0;
603 }
604
605 static int
606 ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
607                 struct rte_eth_rss_conf *rss_conf)
608 {
609         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
610         uint64_t rss_hf = 0;
611
612         IONIC_PRINT_CALL();
613
614         if (!lif->rss_ind_tbl) {
615                 IONIC_PRINT(NOTICE, "RSS not enabled");
616                 return 0;
617         }
618
619         /* Get key value (if not null, rss_key is 40-byte) */
620         if (rss_conf->rss_key != NULL &&
621                         rss_conf->rss_key_len >= IONIC_RSS_HASH_KEY_SIZE)
622                 memcpy(rss_conf->rss_key, lif->rss_hash_key,
623                         IONIC_RSS_HASH_KEY_SIZE);
624
625         if (lif->rss_types & IONIC_RSS_TYPE_IPV4)
626                 rss_hf |= ETH_RSS_IPV4;
627         if (lif->rss_types & IONIC_RSS_TYPE_IPV4_TCP)
628                 rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
629         if (lif->rss_types & IONIC_RSS_TYPE_IPV4_UDP)
630                 rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
631         if (lif->rss_types & IONIC_RSS_TYPE_IPV6)
632                 rss_hf |= ETH_RSS_IPV6;
633         if (lif->rss_types & IONIC_RSS_TYPE_IPV6_TCP)
634                 rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
635         if (lif->rss_types & IONIC_RSS_TYPE_IPV6_UDP)
636                 rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
637
638         rss_conf->rss_hf = rss_hf;
639
640         return 0;
641 }
642
643 static int
644 ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev,
645                 struct rte_eth_rss_conf *rss_conf)
646 {
647         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
648         uint32_t rss_types = 0;
649         uint8_t *key = NULL;
650
651         IONIC_PRINT_CALL();
652
653         if (rss_conf->rss_key)
654                 key = rss_conf->rss_key;
655
656         if ((rss_conf->rss_hf & IONIC_ETH_RSS_OFFLOAD_ALL) == 0) {
657                 /*
658                  * Can't disable rss through hash flags,
659                  * if it is enabled by default during init
660                  */
661                 if (lif->rss_ind_tbl)
662                         return -EINVAL;
663         } else {
664                 /* Can't enable rss if disabled by default during init */
665                 if (!lif->rss_ind_tbl)
666                         return -EINVAL;
667
668                 if (rss_conf->rss_hf & ETH_RSS_IPV4)
669                         rss_types |= IONIC_RSS_TYPE_IPV4;
670                 if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
671                         rss_types |= IONIC_RSS_TYPE_IPV4_TCP;
672                 if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
673                         rss_types |= IONIC_RSS_TYPE_IPV4_UDP;
674                 if (rss_conf->rss_hf & ETH_RSS_IPV6)
675                         rss_types |= IONIC_RSS_TYPE_IPV6;
676                 if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
677                         rss_types |= IONIC_RSS_TYPE_IPV6_TCP;
678                 if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
679                         rss_types |= IONIC_RSS_TYPE_IPV6_UDP;
680
681                 ionic_lif_rss_config(lif, rss_types, key, NULL);
682         }
683
684         return 0;
685 }
686
687 static int
688 ionic_dev_stats_get(struct rte_eth_dev *eth_dev,
689                 struct rte_eth_stats *stats)
690 {
691         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
692
693         ionic_lif_get_stats(lif, stats);
694
695         return 0;
696 }
697
698 static int
699 ionic_dev_stats_reset(struct rte_eth_dev *eth_dev)
700 {
701         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
702
703         IONIC_PRINT_CALL();
704
705         ionic_lif_reset_stats(lif);
706
707         return 0;
708 }
709
710 static int
711 ionic_dev_xstats_get_names(__rte_unused struct rte_eth_dev *eth_dev,
712                 struct rte_eth_xstat_name *xstats_names,
713                 __rte_unused unsigned int size)
714 {
715         unsigned int i;
716
717         if (xstats_names != NULL) {
718                 for (i = 0; i < IONIC_NB_HW_STATS; i++) {
719                         snprintf(xstats_names[i].name,
720                                         sizeof(xstats_names[i].name),
721                                         "%s", rte_ionic_xstats_strings[i].name);
722                 }
723         }
724
725         return IONIC_NB_HW_STATS;
726 }
727
728 static int
729 ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *eth_dev,
730                 struct rte_eth_xstat_name *xstats_names, const uint64_t *ids,
731                 unsigned int limit)
732 {
733         struct rte_eth_xstat_name xstats_names_copy[IONIC_NB_HW_STATS];
734         uint16_t i;
735
736         if (!ids) {
737                 if (xstats_names != NULL) {
738                         for (i = 0; i < IONIC_NB_HW_STATS; i++) {
739                                 snprintf(xstats_names[i].name,
740                                         sizeof(xstats_names[i].name),
741                                         "%s", rte_ionic_xstats_strings[i].name);
742                         }
743                 }
744
745                 return IONIC_NB_HW_STATS;
746         }
747
748         ionic_dev_xstats_get_names_by_id(eth_dev, xstats_names_copy, NULL,
749                 IONIC_NB_HW_STATS);
750
751         for (i = 0; i < limit; i++) {
752                 if (ids[i] >= IONIC_NB_HW_STATS) {
753                         IONIC_PRINT(ERR, "id value isn't valid");
754                         return -1;
755                 }
756
757                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
758         }
759
760         return limit;
761 }
762
763 static int
764 ionic_dev_xstats_get(struct rte_eth_dev *eth_dev, struct rte_eth_xstat *xstats,
765                 unsigned int n)
766 {
767         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
768         struct ionic_lif_stats hw_stats;
769         uint16_t i;
770
771         if (n < IONIC_NB_HW_STATS)
772                 return IONIC_NB_HW_STATS;
773
774         ionic_lif_get_hw_stats(lif, &hw_stats);
775
776         for (i = 0; i < IONIC_NB_HW_STATS; i++) {
777                 xstats[i].value = *(uint64_t *)(((char *)&hw_stats) +
778                                 rte_ionic_xstats_strings[i].offset);
779                 xstats[i].id = i;
780         }
781
782         return IONIC_NB_HW_STATS;
783 }
784
785 static int
786 ionic_dev_xstats_get_by_id(struct rte_eth_dev *eth_dev, const uint64_t *ids,
787                 uint64_t *values, unsigned int n)
788 {
789         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
790         struct ionic_lif_stats hw_stats;
791         uint64_t values_copy[IONIC_NB_HW_STATS];
792         uint16_t i;
793
794         if (!ids) {
795                 if (!ids && n < IONIC_NB_HW_STATS)
796                         return IONIC_NB_HW_STATS;
797
798                 ionic_lif_get_hw_stats(lif, &hw_stats);
799
800                 for (i = 0; i < IONIC_NB_HW_STATS; i++) {
801                         values[i] = *(uint64_t *)(((char *)&hw_stats) +
802                                         rte_ionic_xstats_strings[i].offset);
803                 }
804
805                 return IONIC_NB_HW_STATS;
806         }
807
808         ionic_dev_xstats_get_by_id(eth_dev, NULL, values_copy,
809                         IONIC_NB_HW_STATS);
810
811         for (i = 0; i < n; i++) {
812                 if (ids[i] >= IONIC_NB_HW_STATS) {
813                         IONIC_PRINT(ERR, "id value isn't valid");
814                         return -1;
815                 }
816
817                 values[i] = values_copy[ids[i]];
818         }
819
820         return n;
821 }
822
823 static int
824 ionic_dev_xstats_reset(struct rte_eth_dev *eth_dev)
825 {
826         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
827
828         ionic_lif_reset_hw_stats(lif);
829
830         return 0;
831 }
832
833 static int
834 ionic_dev_configure(struct rte_eth_dev *eth_dev)
835 {
836         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
837
838         IONIC_PRINT_CALL();
839
840         ionic_lif_configure(lif);
841
842         ionic_lif_set_features(lif);
843
844         return 0;
845 }
846
847 static inline uint32_t
848 ionic_parse_link_speeds(uint16_t link_speeds)
849 {
850         if (link_speeds & ETH_LINK_SPEED_100G)
851                 return 100000;
852         else if (link_speeds & ETH_LINK_SPEED_50G)
853                 return 50000;
854         else if (link_speeds & ETH_LINK_SPEED_40G)
855                 return 40000;
856         else if (link_speeds & ETH_LINK_SPEED_25G)
857                 return 25000;
858         else if (link_speeds & ETH_LINK_SPEED_10G)
859                 return 10000;
860         else
861                 return 0;
862 }
863
864 /*
865  * Configure device link speed and setup link.
866  * It returns 0 on success.
867  */
868 static int
869 ionic_dev_start(struct rte_eth_dev *eth_dev)
870 {
871         struct rte_eth_conf *dev_conf = &eth_dev->data->dev_conf;
872         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
873         struct ionic_adapter *adapter = lif->adapter;
874         struct ionic_dev *idev = &adapter->idev;
875         uint32_t speed = 0, allowed_speeds;
876         uint8_t an_enable;
877         int err;
878
879         IONIC_PRINT_CALL();
880
881         allowed_speeds =
882                 ETH_LINK_SPEED_FIXED |
883                 ETH_LINK_SPEED_10G |
884                 ETH_LINK_SPEED_25G |
885                 ETH_LINK_SPEED_40G |
886                 ETH_LINK_SPEED_50G |
887                 ETH_LINK_SPEED_100G;
888
889         if (dev_conf->link_speeds & ~allowed_speeds) {
890                 IONIC_PRINT(ERR, "Invalid link setting");
891                 return -EINVAL;
892         }
893
894         if (dev_conf->lpbk_mode)
895                 IONIC_PRINT(WARNING, "Loopback mode not supported");
896
897         err = ionic_lif_start(lif);
898         if (err) {
899                 IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
900                 return err;
901         }
902
903         /* Configure link */
904         an_enable = (dev_conf->link_speeds & ETH_LINK_SPEED_FIXED) == 0;
905
906         ionic_dev_cmd_port_autoneg(idev, an_enable);
907         err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
908         if (err)
909                 IONIC_PRINT(WARNING, "Failed to %s autonegotiation",
910                         an_enable ? "enable" : "disable");
911
912         if (!an_enable)
913                 speed = ionic_parse_link_speeds(dev_conf->link_speeds);
914         if (speed) {
915                 ionic_dev_cmd_port_speed(idev, speed);
916                 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
917                 if (err)
918                         IONIC_PRINT(WARNING, "Failed to set link speed %u",
919                                 speed);
920         }
921
922         ionic_dev_link_update(eth_dev, 0);
923
924         return 0;
925 }
926
927 /*
928  * Stop device: disable rx and tx functions to allow for reconfiguring.
929  */
930 static int
931 ionic_dev_stop(struct rte_eth_dev *eth_dev)
932 {
933         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
934
935         IONIC_PRINT_CALL();
936
937         ionic_lif_stop(lif);
938
939         return 0;
940 }
941
942 static void ionic_unconfigure_intr(struct ionic_adapter *adapter);
943
944 /*
945  * Reset and stop device.
946  */
947 static int
948 ionic_dev_close(struct rte_eth_dev *eth_dev)
949 {
950         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
951         struct ionic_adapter *adapter = lif->adapter;
952
953         IONIC_PRINT_CALL();
954         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
955                 return 0;
956
957         ionic_lif_stop(lif);
958
959         ionic_lif_free_queues(lif);
960
961         IONIC_PRINT(NOTICE, "Removing device %s", eth_dev->device->name);
962         ionic_unconfigure_intr(adapter);
963
964         rte_eth_dev_destroy(eth_dev, eth_ionic_dev_uninit);
965
966         ionic_port_reset(adapter);
967         ionic_reset(adapter);
968
969         rte_free(adapter);
970
971         return 0;
972 }
973
974 static int
975 eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params)
976 {
977         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
978         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
979         struct ionic_adapter *adapter = (struct ionic_adapter *)init_params;
980         int err;
981
982         IONIC_PRINT_CALL();
983
984         eth_dev->dev_ops = &ionic_eth_dev_ops;
985         eth_dev->rx_pkt_burst = &ionic_recv_pkts;
986         eth_dev->tx_pkt_burst = &ionic_xmit_pkts;
987         eth_dev->tx_pkt_prepare = &ionic_prep_pkts;
988
989         /* Multi-process not supported, primary does initialization anyway */
990         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
991                 return 0;
992
993         rte_eth_copy_pci_info(eth_dev, pci_dev);
994         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
995
996         lif->eth_dev = eth_dev;
997         lif->adapter = adapter;
998         adapter->lif = lif;
999
1000         IONIC_PRINT(DEBUG, "Up to %u MAC addresses supported",
1001                 adapter->max_mac_addrs);
1002
1003         /* Allocate memory for storing MAC addresses */
1004         eth_dev->data->mac_addrs = rte_zmalloc("ionic",
1005                 RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs, 0);
1006
1007         if (eth_dev->data->mac_addrs == NULL) {
1008                 IONIC_PRINT(ERR, "Failed to allocate %u bytes needed to "
1009                         "store MAC addresses",
1010                         RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs);
1011                 err = -ENOMEM;
1012                 goto err;
1013         }
1014
1015         err = ionic_lif_alloc(lif);
1016         if (err) {
1017                 IONIC_PRINT(ERR, "Cannot allocate LIFs: %d, aborting",
1018                         err);
1019                 goto err;
1020         }
1021
1022         err = ionic_lif_init(lif);
1023         if (err) {
1024                 IONIC_PRINT(ERR, "Cannot init LIFs: %d, aborting", err);
1025                 goto err_free_lif;
1026         }
1027
1028         /* Copy the MAC address */
1029         rte_ether_addr_copy((struct rte_ether_addr *)lif->mac_addr,
1030                 &eth_dev->data->mac_addrs[0]);
1031
1032         IONIC_PRINT(DEBUG, "Port %u initialized", eth_dev->data->port_id);
1033
1034         return 0;
1035
1036 err_free_lif:
1037         ionic_lif_free(lif);
1038 err:
1039         return err;
1040 }
1041
1042 static int
1043 eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev)
1044 {
1045         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
1046         struct ionic_adapter *adapter = lif->adapter;
1047
1048         IONIC_PRINT_CALL();
1049
1050         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1051                 return 0;
1052
1053         adapter->lif = NULL;
1054
1055         ionic_lif_deinit(lif);
1056         ionic_lif_free(lif);
1057
1058         if (!(lif->state & IONIC_LIF_F_FW_RESET))
1059                 ionic_lif_reset(lif);
1060
1061         return 0;
1062 }
1063
1064 static int
1065 ionic_configure_intr(struct ionic_adapter *adapter)
1066 {
1067         struct rte_pci_device *pci_dev = adapter->pci_dev;
1068         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1069         int err;
1070
1071         IONIC_PRINT(DEBUG, "Configuring %u intrs", adapter->nintrs);
1072
1073         if (rte_intr_efd_enable(intr_handle, adapter->nintrs)) {
1074                 IONIC_PRINT(ERR, "Fail to create eventfd");
1075                 return -1;
1076         }
1077
1078         if (rte_intr_dp_is_en(intr_handle))
1079                 IONIC_PRINT(DEBUG,
1080                         "Packet I/O interrupt on datapath is enabled");
1081
1082         if (!intr_handle->intr_vec) {
1083                 intr_handle->intr_vec = rte_zmalloc("intr_vec",
1084                         adapter->nintrs * sizeof(int), 0);
1085
1086                 if (!intr_handle->intr_vec) {
1087                         IONIC_PRINT(ERR, "Failed to allocate %u vectors",
1088                                 adapter->nintrs);
1089                         return -ENOMEM;
1090                 }
1091         }
1092
1093         err = rte_intr_callback_register(intr_handle,
1094                 ionic_dev_interrupt_handler,
1095                 adapter);
1096
1097         if (err) {
1098                 IONIC_PRINT(ERR,
1099                         "Failure registering interrupts handler (%d)",
1100                         err);
1101                 return err;
1102         }
1103
1104         /* enable intr mapping */
1105         err = rte_intr_enable(intr_handle);
1106
1107         if (err) {
1108                 IONIC_PRINT(ERR, "Failure enabling interrupts (%d)", err);
1109                 return err;
1110         }
1111
1112         return 0;
1113 }
1114
1115 static void
1116 ionic_unconfigure_intr(struct ionic_adapter *adapter)
1117 {
1118         struct rte_pci_device *pci_dev = adapter->pci_dev;
1119         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1120
1121         rte_intr_disable(intr_handle);
1122
1123         rte_intr_callback_unregister(intr_handle,
1124                 ionic_dev_interrupt_handler,
1125                 adapter);
1126 }
1127
1128 static int
1129 eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1130                 struct rte_pci_device *pci_dev)
1131 {
1132         char name[RTE_ETH_NAME_MAX_LEN];
1133         struct rte_mem_resource *resource;
1134         struct ionic_adapter *adapter;
1135         struct ionic_hw *hw;
1136         unsigned long i;
1137         int err;
1138
1139         /* Check structs (trigger error at compilation time) */
1140         ionic_struct_size_checks();
1141
1142         /* Multi-process not supported */
1143         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1144                 err = -EPERM;
1145                 goto err;
1146         }
1147
1148         IONIC_PRINT(DEBUG, "Initializing device %s",
1149                 pci_dev->device.name);
1150
1151         adapter = rte_zmalloc("ionic", sizeof(*adapter), 0);
1152         if (!adapter) {
1153                 IONIC_PRINT(ERR, "OOM");
1154                 err = -ENOMEM;
1155                 goto err;
1156         }
1157
1158         adapter->pci_dev = pci_dev;
1159         hw = &adapter->hw;
1160
1161         hw->device_id = pci_dev->id.device_id;
1162         hw->vendor_id = pci_dev->id.vendor_id;
1163
1164         err = ionic_init_mac(hw);
1165         if (err != 0) {
1166                 IONIC_PRINT(ERR, "Mac init failed: %d", err);
1167                 err = -EIO;
1168                 goto err_free_adapter;
1169         }
1170
1171         adapter->num_bars = 0;
1172         for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {
1173                 resource = &pci_dev->mem_resource[i];
1174                 if (resource->phys_addr == 0 || resource->len == 0)
1175                         continue;
1176                 adapter->bars[adapter->num_bars].vaddr = resource->addr;
1177                 adapter->bars[adapter->num_bars].bus_addr = resource->phys_addr;
1178                 adapter->bars[adapter->num_bars].len = resource->len;
1179                 adapter->num_bars++;
1180         }
1181
1182         /* Discover ionic dev resources */
1183
1184         err = ionic_setup(adapter);
1185         if (err) {
1186                 IONIC_PRINT(ERR, "Cannot setup device: %d, aborting", err);
1187                 goto err_free_adapter;
1188         }
1189
1190         err = ionic_identify(adapter);
1191         if (err) {
1192                 IONIC_PRINT(ERR, "Cannot identify device: %d, aborting",
1193                         err);
1194                 goto err_free_adapter;
1195         }
1196
1197         err = ionic_init(adapter);
1198         if (err) {
1199                 IONIC_PRINT(ERR, "Cannot init device: %d, aborting", err);
1200                 goto err_free_adapter;
1201         }
1202
1203         /* Configure the ports */
1204         err = ionic_port_identify(adapter);
1205         if (err) {
1206                 IONIC_PRINT(ERR, "Cannot identify port: %d, aborting",
1207                         err);
1208                 goto err_free_adapter;
1209         }
1210
1211         err = ionic_port_init(adapter);
1212         if (err) {
1213                 IONIC_PRINT(ERR, "Cannot init port: %d, aborting", err);
1214                 goto err_free_adapter;
1215         }
1216
1217         /* Configure LIFs */
1218         err = ionic_lif_identify(adapter);
1219         if (err) {
1220                 IONIC_PRINT(ERR, "Cannot identify lif: %d, aborting", err);
1221                 goto err_free_adapter;
1222         }
1223
1224         /* Allocate and init LIFs */
1225         err = ionic_lifs_size(adapter);
1226         if (err) {
1227                 IONIC_PRINT(ERR, "Cannot size LIFs: %d, aborting", err);
1228                 goto err_free_adapter;
1229         }
1230
1231         adapter->max_mac_addrs = adapter->ident.lif.eth.max_ucast_filters;
1232
1233         if (adapter->ident.dev.nlifs != 1) {
1234                 IONIC_PRINT(ERR, "Unexpected request for %d LIFs",
1235                         adapter->ident.dev.nlifs);
1236                 goto err_free_adapter;
1237         }
1238
1239         snprintf(name, sizeof(name), "%s_lif", pci_dev->device.name);
1240         err = rte_eth_dev_create(&pci_dev->device,
1241                         name, sizeof(struct ionic_lif),
1242                         NULL, NULL, eth_ionic_dev_init, adapter);
1243         if (err) {
1244                 IONIC_PRINT(ERR, "Cannot create eth device for %s", name);
1245                 goto err_free_adapter;
1246         }
1247
1248         err = ionic_configure_intr(adapter);
1249
1250         if (err) {
1251                 IONIC_PRINT(ERR, "Failed to configure interrupts");
1252                 goto err_free_adapter;
1253         }
1254
1255         return 0;
1256
1257 err_free_adapter:
1258         rte_free(adapter);
1259 err:
1260         return err;
1261 }
1262
1263 static int
1264 eth_ionic_pci_remove(struct rte_pci_device *pci_dev)
1265 {
1266         char name[RTE_ETH_NAME_MAX_LEN];
1267         struct rte_eth_dev *eth_dev;
1268
1269         /* Adapter lookup is using the eth_dev name */
1270         snprintf(name, sizeof(name), "%s_lif", pci_dev->device.name);
1271
1272         eth_dev = rte_eth_dev_allocated(name);
1273         if (eth_dev)
1274                 ionic_dev_close(eth_dev);
1275         else
1276                 IONIC_PRINT(DEBUG, "Cannot find device %s",
1277                         pci_dev->device.name);
1278
1279         return 0;
1280 }
1281
1282 static struct rte_pci_driver rte_ionic_pmd = {
1283         .id_table = pci_id_ionic_map,
1284         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1285         .probe = eth_ionic_pci_probe,
1286         .remove = eth_ionic_pci_remove,
1287 };
1288
1289 RTE_PMD_REGISTER_PCI(net_ionic, rte_ionic_pmd);
1290 RTE_PMD_REGISTER_PCI_TABLE(net_ionic, pci_id_ionic_map);
1291 RTE_PMD_REGISTER_KMOD_DEP(net_ionic, "* igb_uio | uio_pci_generic | vfio-pci");
1292 RTE_LOG_REGISTER(ionic_logtype, pmd.net.ionic, NOTICE);