1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
37 #define IXGBE_EMPTY_PARAM
39 static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
40 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
43 static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
44 IXGBE_MVALS_INIT(_X540)
47 static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
48 IXGBE_MVALS_INIT(_X550)
51 static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
52 IXGBE_MVALS_INIT(_X550EM_x)
55 static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
56 IXGBE_MVALS_INIT(_X550EM_a)
60 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
61 * @hw: pointer to hardware structure
62 * @map: pointer to u8 arr for returning map
64 * Read the rtrup2tc HW register and resolve its content into map
66 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
68 if (hw->mac.ops.get_rtrup2tc)
69 hw->mac.ops.get_rtrup2tc(hw, map);
73 * ixgbe_init_shared_code - Initialize the shared code
74 * @hw: pointer to hardware structure
76 * This will assign function pointers and assign the MAC type and PHY code.
77 * Does not touch the hardware. This function must be called prior to any
78 * other function in the shared code. The ixgbe_hw structure should be
79 * memset to 0 prior to calling this function. The following fields in
80 * hw structure should be filled in prior to calling this function:
81 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
82 * subsystem_vendor_id, and revision_id
84 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
88 DEBUGFUNC("ixgbe_init_shared_code");
93 ixgbe_set_mac_type(hw);
95 switch (hw->mac.type) {
96 case ixgbe_mac_82598EB:
97 status = ixgbe_init_ops_82598(hw);
99 case ixgbe_mac_82599EB:
100 status = ixgbe_init_ops_82599(hw);
103 status = ixgbe_init_ops_X540(hw);
106 status = ixgbe_init_ops_X550(hw);
108 case ixgbe_mac_X550EM_x:
109 status = ixgbe_init_ops_X550EM_x(hw);
111 case ixgbe_mac_X550EM_a:
112 status = ixgbe_init_ops_X550EM_a(hw);
114 case ixgbe_mac_82599_vf:
115 case ixgbe_mac_X540_vf:
116 case ixgbe_mac_X550_vf:
117 case ixgbe_mac_X550EM_x_vf:
118 case ixgbe_mac_X550EM_a_vf:
119 status = ixgbe_init_ops_vf(hw);
122 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
125 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
131 * ixgbe_set_mac_type - Sets MAC type
132 * @hw: pointer to the HW structure
134 * This function sets the mac type of the adapter based on the
135 * vendor ID and device ID stored in the hw structure.
137 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
139 s32 ret_val = IXGBE_SUCCESS;
141 DEBUGFUNC("ixgbe_set_mac_type\n");
143 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
144 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
145 "Unsupported vendor id: %x", hw->vendor_id);
146 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
149 hw->mvals = ixgbe_mvals_base;
151 switch (hw->device_id) {
152 case IXGBE_DEV_ID_82598:
153 case IXGBE_DEV_ID_82598_BX:
154 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
155 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
156 case IXGBE_DEV_ID_82598AT:
157 case IXGBE_DEV_ID_82598AT2:
158 case IXGBE_DEV_ID_82598EB_CX4:
159 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
160 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
161 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
162 case IXGBE_DEV_ID_82598EB_XF_LR:
163 case IXGBE_DEV_ID_82598EB_SFP_LOM:
164 hw->mac.type = ixgbe_mac_82598EB;
166 case IXGBE_DEV_ID_82599_KX4:
167 case IXGBE_DEV_ID_82599_KX4_MEZZ:
168 case IXGBE_DEV_ID_82599_XAUI_LOM:
169 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
170 case IXGBE_DEV_ID_82599_KR:
171 case IXGBE_DEV_ID_82599_SFP:
172 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
173 case IXGBE_DEV_ID_82599_SFP_FCOE:
174 case IXGBE_DEV_ID_82599_SFP_EM:
175 case IXGBE_DEV_ID_82599_SFP_SF2:
176 case IXGBE_DEV_ID_82599_SFP_SF_QP:
177 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
178 case IXGBE_DEV_ID_82599EN_SFP:
179 case IXGBE_DEV_ID_82599_CX4:
180 case IXGBE_DEV_ID_82599_LS:
181 case IXGBE_DEV_ID_82599_T3_LOM:
182 hw->mac.type = ixgbe_mac_82599EB;
184 case IXGBE_DEV_ID_82599_VF:
185 case IXGBE_DEV_ID_82599_VF_HV:
186 hw->mac.type = ixgbe_mac_82599_vf;
188 case IXGBE_DEV_ID_X540_VF:
189 case IXGBE_DEV_ID_X540_VF_HV:
190 hw->mac.type = ixgbe_mac_X540_vf;
191 hw->mvals = ixgbe_mvals_X540;
193 case IXGBE_DEV_ID_X540T:
194 case IXGBE_DEV_ID_X540T1:
195 hw->mac.type = ixgbe_mac_X540;
196 hw->mvals = ixgbe_mvals_X540;
198 case IXGBE_DEV_ID_X550T:
199 case IXGBE_DEV_ID_X550T1:
200 hw->mac.type = ixgbe_mac_X550;
201 hw->mvals = ixgbe_mvals_X550;
203 case IXGBE_DEV_ID_X550EM_X_KX4:
204 case IXGBE_DEV_ID_X550EM_X_KR:
205 case IXGBE_DEV_ID_X550EM_X_10G_T:
206 case IXGBE_DEV_ID_X550EM_X_1G_T:
207 case IXGBE_DEV_ID_X550EM_X_SFP:
208 case IXGBE_DEV_ID_X550EM_X_XFI:
209 hw->mac.type = ixgbe_mac_X550EM_x;
210 hw->mvals = ixgbe_mvals_X550EM_x;
212 case IXGBE_DEV_ID_X550EM_A_KR:
213 case IXGBE_DEV_ID_X550EM_A_KR_L:
214 case IXGBE_DEV_ID_X550EM_A_SFP_N:
215 case IXGBE_DEV_ID_X550EM_A_SGMII:
216 case IXGBE_DEV_ID_X550EM_A_SGMII_L:
217 case IXGBE_DEV_ID_X550EM_A_1G_T:
218 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
219 case IXGBE_DEV_ID_X550EM_A_10G_T:
220 case IXGBE_DEV_ID_X550EM_A_QSFP:
221 case IXGBE_DEV_ID_X550EM_A_QSFP_N:
222 case IXGBE_DEV_ID_X550EM_A_SFP:
223 hw->mac.type = ixgbe_mac_X550EM_a;
224 hw->mvals = ixgbe_mvals_X550EM_a;
226 case IXGBE_DEV_ID_X550_VF:
227 case IXGBE_DEV_ID_X550_VF_HV:
228 hw->mac.type = ixgbe_mac_X550_vf;
229 hw->mvals = ixgbe_mvals_X550;
231 case IXGBE_DEV_ID_X550EM_X_VF:
232 case IXGBE_DEV_ID_X550EM_X_VF_HV:
233 hw->mac.type = ixgbe_mac_X550EM_x_vf;
234 hw->mvals = ixgbe_mvals_X550EM_x;
236 case IXGBE_DEV_ID_X550EM_A_VF:
237 case IXGBE_DEV_ID_X550EM_A_VF_HV:
238 hw->mac.type = ixgbe_mac_X550EM_a_vf;
239 hw->mvals = ixgbe_mvals_X550EM_a;
242 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
243 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
244 "Unsupported device id: %x",
249 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
250 hw->mac.type, ret_val);
255 * ixgbe_init_hw - Initialize the hardware
256 * @hw: pointer to hardware structure
258 * Initialize the hardware by resetting and then starting the hardware
260 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
262 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
263 IXGBE_NOT_IMPLEMENTED);
267 * ixgbe_reset_hw - Performs a hardware reset
268 * @hw: pointer to hardware structure
270 * Resets the hardware by resetting the transmit and receive units, masks and
271 * clears all interrupts, performs a PHY reset, and performs a MAC reset
273 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
275 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
276 IXGBE_NOT_IMPLEMENTED);
280 * ixgbe_start_hw - Prepares hardware for Rx/Tx
281 * @hw: pointer to hardware structure
283 * Starts the hardware by filling the bus info structure and media type,
284 * clears all on chip counters, initializes receive address registers,
285 * multicast table, VLAN filter table, calls routine to setup link and
286 * flow control settings, and leaves transmit and receive units disabled
289 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
291 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
292 IXGBE_NOT_IMPLEMENTED);
296 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
297 * which is disabled by default in ixgbe_start_hw();
299 * @hw: pointer to hardware structure
301 * Enable relaxed ordering;
303 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
305 if (hw->mac.ops.enable_relaxed_ordering)
306 hw->mac.ops.enable_relaxed_ordering(hw);
310 * ixgbe_clear_hw_cntrs - Clear hardware counters
311 * @hw: pointer to hardware structure
313 * Clears all hardware statistics counters by reading them from the hardware
314 * Statistics counters are clear on read.
316 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
318 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
319 IXGBE_NOT_IMPLEMENTED);
323 * ixgbe_get_media_type - Get media type
324 * @hw: pointer to hardware structure
326 * Returns the media type (fiber, copper, backplane)
328 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
330 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
331 ixgbe_media_type_unknown);
335 * ixgbe_get_mac_addr - Get MAC address
336 * @hw: pointer to hardware structure
337 * @mac_addr: Adapter MAC address
339 * Reads the adapter's MAC address from the first Receive Address Register
340 * (RAR0) A reset of the adapter must have been performed prior to calling
341 * this function in order for the MAC address to have been loaded from the
344 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
346 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
347 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
351 * ixgbe_get_san_mac_addr - Get SAN MAC address
352 * @hw: pointer to hardware structure
353 * @san_mac_addr: SAN MAC address
355 * Reads the SAN MAC address from the EEPROM, if it's available. This is
356 * per-port, so set_lan_id() must be called before reading the addresses.
358 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
360 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
361 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
365 * ixgbe_set_san_mac_addr - Write a SAN MAC address
366 * @hw: pointer to hardware structure
367 * @san_mac_addr: SAN MAC address
369 * Writes A SAN MAC address to the EEPROM.
371 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
373 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
374 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
378 * ixgbe_get_device_caps - Get additional device capabilities
379 * @hw: pointer to hardware structure
380 * @device_caps: the EEPROM word for device capabilities
382 * Reads the extra device capabilities from the EEPROM
384 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
386 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
387 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
391 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
392 * @hw: pointer to hardware structure
393 * @wwnn_prefix: the alternative WWNN prefix
394 * @wwpn_prefix: the alternative WWPN prefix
396 * This function will read the EEPROM from the alternative SAN MAC address
397 * block to check the support for the alternative WWNN/WWPN prefix support.
399 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
402 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
403 (hw, wwnn_prefix, wwpn_prefix),
404 IXGBE_NOT_IMPLEMENTED);
408 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
409 * @hw: pointer to hardware structure
410 * @bs: the fcoe boot status
412 * This function will read the FCOE boot status from the iSCSI FCOE block
414 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
416 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
418 IXGBE_NOT_IMPLEMENTED);
422 * ixgbe_get_bus_info - Set PCI bus info
423 * @hw: pointer to hardware structure
425 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
427 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
429 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
430 IXGBE_NOT_IMPLEMENTED);
434 * ixgbe_get_num_of_tx_queues - Get Tx queues
435 * @hw: pointer to hardware structure
437 * Returns the number of transmit queues for the given adapter.
439 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
441 return hw->mac.max_tx_queues;
445 * ixgbe_get_num_of_rx_queues - Get Rx queues
446 * @hw: pointer to hardware structure
448 * Returns the number of receive queues for the given adapter.
450 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
452 return hw->mac.max_rx_queues;
456 * ixgbe_stop_adapter - Disable Rx/Tx units
457 * @hw: pointer to hardware structure
459 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
460 * disables transmit and receive units. The adapter_stopped flag is used by
461 * the shared code and drivers to determine if the adapter is in a stopped
462 * state and should not touch the hardware.
464 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
466 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
467 IXGBE_NOT_IMPLEMENTED);
471 * ixgbe_read_pba_string - Reads part number string from EEPROM
472 * @hw: pointer to hardware structure
473 * @pba_num: stores the part number string from the EEPROM
474 * @pba_num_size: part number string buffer length
476 * Reads the part number string from the EEPROM.
478 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
480 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
484 * ixgbe_read_pba_num - Reads part number from EEPROM
485 * @hw: pointer to hardware structure
486 * @pba_num: stores the part number from the EEPROM
488 * Reads the part number from the EEPROM.
490 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
492 return ixgbe_read_pba_num_generic(hw, pba_num);
496 * ixgbe_identify_phy - Get PHY type
497 * @hw: pointer to hardware structure
499 * Determines the physical layer module found on the current adapter.
501 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
503 s32 status = IXGBE_SUCCESS;
505 if (hw->phy.type == ixgbe_phy_unknown) {
506 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
507 IXGBE_NOT_IMPLEMENTED);
514 * ixgbe_reset_phy - Perform a PHY reset
515 * @hw: pointer to hardware structure
517 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
519 s32 status = IXGBE_SUCCESS;
521 if (hw->phy.type == ixgbe_phy_unknown) {
522 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
523 status = IXGBE_ERR_PHY;
526 if (status == IXGBE_SUCCESS) {
527 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
528 IXGBE_NOT_IMPLEMENTED);
534 * ixgbe_get_phy_firmware_version -
535 * @hw: pointer to hardware structure
536 * @firmware_version: pointer to firmware version
538 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
540 s32 status = IXGBE_SUCCESS;
542 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
543 (hw, firmware_version),
544 IXGBE_NOT_IMPLEMENTED);
549 * ixgbe_read_phy_reg - Read PHY register
550 * @hw: pointer to hardware structure
551 * @reg_addr: 32 bit address of PHY register to read
552 * @device_type: type of device you want to communicate with
553 * @phy_data: Pointer to read data from PHY register
555 * Reads a value from a specified PHY register
557 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
561 ixgbe_identify_phy(hw);
563 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
564 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
568 * ixgbe_write_phy_reg - Write PHY register
569 * @hw: pointer to hardware structure
570 * @reg_addr: 32 bit PHY register to write
571 * @device_type: type of device you want to communicate with
572 * @phy_data: Data to write to the PHY register
574 * Writes a value to specified PHY register
576 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
580 ixgbe_identify_phy(hw);
582 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
583 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
587 * ixgbe_setup_phy_link - Restart PHY autoneg
588 * @hw: pointer to hardware structure
590 * Restart autonegotiation and PHY and waits for completion.
592 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
594 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
595 IXGBE_NOT_IMPLEMENTED);
599 * ixgbe_setup_internal_phy - Configure integrated PHY
600 * @hw: pointer to hardware structure
602 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
603 * Returns success if not implemented, since nothing needs to be done in this
606 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
608 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
613 * ixgbe_check_phy_link - Determine link and speed status
614 * @hw: pointer to hardware structure
616 * @link_up: true when link is up
618 * Reads a PHY register to determine if link is up and the current speed for
621 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
624 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
625 link_up), IXGBE_NOT_IMPLEMENTED);
629 * ixgbe_setup_phy_link_speed - Set auto advertise
630 * @hw: pointer to hardware structure
631 * @speed: new link speed
632 * @autoneg_wait_to_complete: true when waiting for completion is needed
634 * Sets the auto advertised capabilities
636 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
637 bool autoneg_wait_to_complete)
639 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
640 autoneg_wait_to_complete),
641 IXGBE_NOT_IMPLEMENTED);
645 * ixgbe_set_phy_power - Control the phy power state
646 * @hw: pointer to hardware structure
647 * @on: true for on, false for off
649 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
651 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
652 IXGBE_NOT_IMPLEMENTED);
656 * ixgbe_check_link - Get link and speed status
657 * @hw: pointer to hardware structure
658 * @speed: pointer to link speed
659 * @link_up: true when link is up
660 * @link_up_wait_to_complete: bool used to wait for link up or not
662 * Reads the links register to determine if link is up and the current speed
664 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
665 bool *link_up, bool link_up_wait_to_complete)
667 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
668 link_up, link_up_wait_to_complete),
669 IXGBE_NOT_IMPLEMENTED);
673 * ixgbe_disable_tx_laser - Disable Tx laser
674 * @hw: pointer to hardware structure
676 * If the driver needs to disable the laser on SFI optics.
678 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
680 if (hw->mac.ops.disable_tx_laser)
681 hw->mac.ops.disable_tx_laser(hw);
685 * ixgbe_enable_tx_laser - Enable Tx laser
686 * @hw: pointer to hardware structure
688 * If the driver needs to enable the laser on SFI optics.
690 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
692 if (hw->mac.ops.enable_tx_laser)
693 hw->mac.ops.enable_tx_laser(hw);
697 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
698 * @hw: pointer to hardware structure
700 * When the driver changes the link speeds that it can support then
701 * flap the tx laser to alert the link partner to start autotry
702 * process on its end.
704 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
706 if (hw->mac.ops.flap_tx_laser)
707 hw->mac.ops.flap_tx_laser(hw);
711 * ixgbe_setup_link - Set link speed
712 * @hw: pointer to hardware structure
713 * @speed: new link speed
714 * @autoneg_wait_to_complete: true when waiting for completion is needed
716 * Configures link settings. Restarts the link.
717 * Performs autonegotiation if needed.
719 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
720 bool autoneg_wait_to_complete)
722 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
723 autoneg_wait_to_complete),
724 IXGBE_NOT_IMPLEMENTED);
728 * ixgbe_setup_mac_link - Set link speed
729 * @hw: pointer to hardware structure
730 * @speed: new link speed
731 * @autoneg_wait_to_complete: true when waiting for completion is needed
733 * Configures link settings. Restarts the link.
734 * Performs autonegotiation if needed.
736 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
737 bool autoneg_wait_to_complete)
739 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
740 autoneg_wait_to_complete),
741 IXGBE_NOT_IMPLEMENTED);
745 * ixgbe_get_link_capabilities - Returns link capabilities
746 * @hw: pointer to hardware structure
747 * @speed: link speed capabilities
748 * @autoneg: true when autoneg or autotry is enabled
750 * Determines the link capabilities of the current configuration.
752 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
755 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
756 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
760 * ixgbe_led_on - Turn on LEDs
761 * @hw: pointer to hardware structure
762 * @index: led number to turn on
764 * Turns on the software controllable LEDs.
766 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
768 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
769 IXGBE_NOT_IMPLEMENTED);
773 * ixgbe_led_off - Turn off LEDs
774 * @hw: pointer to hardware structure
775 * @index: led number to turn off
777 * Turns off the software controllable LEDs.
779 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
781 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
782 IXGBE_NOT_IMPLEMENTED);
786 * ixgbe_blink_led_start - Blink LEDs
787 * @hw: pointer to hardware structure
788 * @index: led number to blink
790 * Blink LED based on index.
792 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
794 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
795 IXGBE_NOT_IMPLEMENTED);
799 * ixgbe_blink_led_stop - Stop blinking LEDs
800 * @hw: pointer to hardware structure
801 * @index: led number to stop
803 * Stop blinking LED based on index.
805 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
807 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
808 IXGBE_NOT_IMPLEMENTED);
812 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
813 * @hw: pointer to hardware structure
815 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
816 * ixgbe_hw struct in order to set up EEPROM access.
818 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
820 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
821 IXGBE_NOT_IMPLEMENTED);
826 * ixgbe_write_eeprom - Write word to EEPROM
827 * @hw: pointer to hardware structure
828 * @offset: offset within the EEPROM to be written to
829 * @data: 16 bit word to be written to the EEPROM
831 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
832 * called after this function, the EEPROM will most likely contain an
835 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
837 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
838 IXGBE_NOT_IMPLEMENTED);
842 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
843 * @hw: pointer to hardware structure
844 * @offset: offset within the EEPROM to be written to
845 * @data: 16 bit word(s) to be written to the EEPROM
846 * @words: number of words
848 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
849 * called after this function, the EEPROM will most likely contain an
852 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
855 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
856 (hw, offset, words, data),
857 IXGBE_NOT_IMPLEMENTED);
861 * ixgbe_read_eeprom - Read word from EEPROM
862 * @hw: pointer to hardware structure
863 * @offset: offset within the EEPROM to be read
864 * @data: read 16 bit value from EEPROM
866 * Reads 16 bit value from EEPROM
868 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
870 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
871 IXGBE_NOT_IMPLEMENTED);
875 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
876 * @hw: pointer to hardware structure
877 * @offset: offset within the EEPROM to be read
878 * @data: read 16 bit word(s) from EEPROM
879 * @words: number of words
881 * Reads 16 bit word(s) from EEPROM
883 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
884 u16 words, u16 *data)
886 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
887 (hw, offset, words, data),
888 IXGBE_NOT_IMPLEMENTED);
892 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
893 * @hw: pointer to hardware structure
894 * @checksum_val: calculated checksum
896 * Performs checksum calculation and validates the EEPROM checksum
898 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
900 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
901 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
905 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
906 * @hw: pointer to hardware structure
908 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
910 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
911 IXGBE_NOT_IMPLEMENTED);
915 * ixgbe_insert_mac_addr - Find a RAR for this mac address
916 * @hw: pointer to hardware structure
917 * @addr: Address to put into receive address register
918 * @vmdq: VMDq pool to assign
920 * Puts an ethernet address into a receive address register, or
921 * finds the rar that it is aleady in; adds to the pool list
923 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
925 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
927 IXGBE_NOT_IMPLEMENTED);
931 * ixgbe_set_rar - Set Rx address register
932 * @hw: pointer to hardware structure
933 * @index: Receive address register to write
934 * @addr: Address to put into receive address register
936 * @enable_addr: set flag that address is active
938 * Puts an ethernet address into a receive address register.
940 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
943 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
944 enable_addr), IXGBE_NOT_IMPLEMENTED);
948 * ixgbe_clear_rar - Clear Rx address register
949 * @hw: pointer to hardware structure
950 * @index: Receive address register to write
952 * Puts an ethernet address into a receive address register.
954 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
956 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
957 IXGBE_NOT_IMPLEMENTED);
961 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
962 * @hw: pointer to hardware structure
963 * @rar: receive address register index to associate with VMDq index
964 * @vmdq: VMDq set or pool index
966 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
968 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
969 IXGBE_NOT_IMPLEMENTED);
974 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
975 * @hw: pointer to hardware structure
976 * @vmdq: VMDq default pool index
978 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
980 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
981 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
985 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
986 * @hw: pointer to hardware structure
987 * @rar: receive address register index to disassociate with VMDq index
988 * @vmdq: VMDq set or pool index
990 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
992 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
993 IXGBE_NOT_IMPLEMENTED);
997 * ixgbe_init_rx_addrs - Initializes receive address filters.
998 * @hw: pointer to hardware structure
1000 * Places the MAC address in receive address register 0 and clears the rest
1001 * of the receive address registers. Clears the multicast table. Assumes
1002 * the receiver is in reset when the routine is called.
1004 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
1006 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
1007 IXGBE_NOT_IMPLEMENTED);
1011 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
1012 * @hw: pointer to hardware structure
1014 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
1016 return hw->mac.num_rar_entries;
1020 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
1021 * @hw: pointer to hardware structure
1022 * @addr_list: the list of new multicast addresses
1023 * @addr_count: number of addresses
1024 * @func: iterator function to walk the multicast address list
1026 * The given list replaces any existing list. Clears the secondary addrs from
1027 * receive address registers. Uses unused receive address registers for the
1028 * first secondary addresses, and falls back to promiscuous mode as needed.
1030 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
1031 u32 addr_count, ixgbe_mc_addr_itr func)
1033 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
1034 addr_list, addr_count, func),
1035 IXGBE_NOT_IMPLEMENTED);
1039 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
1040 * @hw: pointer to hardware structure
1041 * @mc_addr_list: the list of new multicast addresses
1042 * @mc_addr_count: number of addresses
1043 * @func: iterator function to walk the multicast address list
1044 * @clear: flag, when set clears the table beforehand
1046 * The given list replaces any existing list. Clears the MC addrs from receive
1047 * address registers and the multicast table. Uses unused receive address
1048 * registers for the first multicast addresses, and hashes the rest into the
1051 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1052 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1055 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1056 mc_addr_list, mc_addr_count, func, clear),
1057 IXGBE_NOT_IMPLEMENTED);
1061 * ixgbe_enable_mc - Enable multicast address in RAR
1062 * @hw: pointer to hardware structure
1064 * Enables multicast address in RAR and the use of the multicast hash table.
1066 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1068 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1069 IXGBE_NOT_IMPLEMENTED);
1073 * ixgbe_disable_mc - Disable multicast address in RAR
1074 * @hw: pointer to hardware structure
1076 * Disables multicast address in RAR and the use of the multicast hash table.
1078 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1080 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1081 IXGBE_NOT_IMPLEMENTED);
1085 * ixgbe_clear_vfta - Clear VLAN filter table
1086 * @hw: pointer to hardware structure
1088 * Clears the VLAN filer table, and the VMDq index associated with the filter
1090 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1092 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1093 IXGBE_NOT_IMPLEMENTED);
1097 * ixgbe_set_vfta - Set VLAN filter table
1098 * @hw: pointer to hardware structure
1099 * @vlan: VLAN id to write to VLAN filter
1100 * @vind: VMDq output index that maps queue to VLAN id in VLVFB
1101 * @vlan_on: boolean flag to turn on/off VLAN
1102 * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1104 * Turn on/off specified VLAN in the VLAN filter table.
1106 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1109 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1110 vlan_on, vlvf_bypass), IXGBE_NOT_IMPLEMENTED);
1114 * ixgbe_set_vlvf - Set VLAN Pool Filter
1115 * @hw: pointer to hardware structure
1116 * @vlan: VLAN id to write to VLAN filter
1117 * @vind: VMDq output index that maps queue to VLAN id in VLVFB
1118 * @vlan_on: boolean flag to turn on/off VLAN in VLVF
1119 * @vfta_delta: pointer to the difference between the current value of VFTA
1120 * and the desired value
1121 * @vfta: the desired value of the VFTA
1122 * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1124 * Turn on/off specified bit in VLVF table.
1126 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1127 u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
1129 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1130 vlan_on, vfta_delta, vfta, vlvf_bypass),
1131 IXGBE_NOT_IMPLEMENTED);
1135 * ixgbe_fc_enable - Enable flow control
1136 * @hw: pointer to hardware structure
1138 * Configures the flow control settings based on SW configuration.
1140 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1142 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1143 IXGBE_NOT_IMPLEMENTED);
1147 * ixgbe_setup_fc - Set up flow control
1148 * @hw: pointer to hardware structure
1150 * Called at init time to set up flow control.
1152 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1154 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1155 IXGBE_NOT_IMPLEMENTED);
1159 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1160 * @hw: pointer to hardware structure
1161 * @maj: driver major number to be sent to firmware
1162 * @min: driver minor number to be sent to firmware
1163 * @build: driver build number to be sent to firmware
1164 * @ver: driver version number to be sent to firmware
1165 * @len: length of driver_ver string
1166 * @driver_ver: driver string
1168 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1169 u8 ver, u16 len, char *driver_ver)
1171 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1172 build, ver, len, driver_ver),
1173 IXGBE_NOT_IMPLEMENTED);
1178 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1179 * @hw: pointer to hardware structure
1181 * Updates the temperatures in mac.thermal_sensor_data
1183 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1185 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1186 IXGBE_NOT_IMPLEMENTED);
1190 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1191 * @hw: pointer to hardware structure
1193 * Inits the thermal sensor thresholds according to the NVM map
1195 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1197 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1198 IXGBE_NOT_IMPLEMENTED);
1202 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1203 * @hw: pointer to hardware structure
1205 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1206 * When disabling dmac, dmac enable dmac bit is cleared.
1208 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1210 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1211 IXGBE_NOT_IMPLEMENTED);
1215 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1216 * @hw: pointer to hardware structure
1218 * Disables dmac, updates per TC settings, and then enable dmac.
1220 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1222 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1223 IXGBE_NOT_IMPLEMENTED);
1227 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1228 * @hw: pointer to hardware structure
1230 * Configure DMA coalescing threshold per TC and set high priority bit for
1231 * FCOE TC. The dmac enable bit must be cleared before configuring.
1233 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1235 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1236 IXGBE_NOT_IMPLEMENTED);
1240 * ixgbe_setup_eee - Enable/disable EEE support
1241 * @hw: pointer to the HW structure
1242 * @enable_eee: boolean flag to enable EEE
1244 * Enable/disable EEE based on enable_ee flag.
1245 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1249 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1251 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1252 IXGBE_NOT_IMPLEMENTED);
1256 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1257 * @hw: pointer to hardware structure
1258 * @enable: enable or disable source address pruning
1259 * @pool: Rx pool - Rx pool to toggle source address pruning
1261 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1264 if (hw->mac.ops.set_source_address_pruning)
1265 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1269 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1270 * @hw: pointer to hardware structure
1271 * @enable: enable or disable switch for Ethertype anti-spoofing
1272 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1275 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1277 if (hw->mac.ops.set_ethertype_anti_spoofing)
1278 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1282 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1283 * @hw: pointer to hardware structure
1284 * @reg_addr: 32 bit address of PHY register to read
1285 * @device_type: type of device you want to communicate with
1286 * @phy_data: Pointer to read data from PHY register
1288 * Reads a value from a specified PHY register
1290 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1291 u32 device_type, u32 *phy_data)
1293 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1294 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1298 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1299 * @hw: pointer to hardware structure
1300 * @reg_addr: 32 bit PHY register to write
1301 * @device_type: type of device you want to communicate with
1302 * @phy_data: Data to write to the PHY register
1304 * Writes a value to specified PHY register
1306 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1307 u32 device_type, u32 phy_data)
1309 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1310 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1314 * ixgbe_disable_mdd - Disable malicious driver detection
1315 * @hw: pointer to hardware structure
1318 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1320 if (hw->mac.ops.disable_mdd)
1321 hw->mac.ops.disable_mdd(hw);
1325 * ixgbe_enable_mdd - Enable malicious driver detection
1326 * @hw: pointer to hardware structure
1329 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1331 if (hw->mac.ops.enable_mdd)
1332 hw->mac.ops.enable_mdd(hw);
1336 * ixgbe_mdd_event - Handle malicious driver detection event
1337 * @hw: pointer to hardware structure
1338 * @vf_bitmap: vf bitmap of malicious vfs
1341 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1343 if (hw->mac.ops.mdd_event)
1344 hw->mac.ops.mdd_event(hw, vf_bitmap);
1348 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1350 * @hw: pointer to hardware structure
1354 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1356 if (hw->mac.ops.restore_mdd_vf)
1357 hw->mac.ops.restore_mdd_vf(hw, vf);
1361 * ixgbe_enter_lplu - Transition to low power states
1362 * @hw: pointer to hardware structure
1364 * Configures Low Power Link Up on transition to low power states
1365 * (from D0 to non-D0).
1367 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1369 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1370 IXGBE_NOT_IMPLEMENTED);
1374 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1375 * @hw: pointer to hardware structure
1377 * Handle external Base T PHY interrupt. If high temperature
1378 * failure alarm then return error, else if link status change
1379 * then setup internal/external PHY link
1381 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1382 * failure alarm, else return PHY access status.
1384 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1386 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1387 IXGBE_NOT_IMPLEMENTED);
1391 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1392 * @hw: pointer to hardware structure
1393 * @reg: analog register to read
1396 * Performs write operation to analog register specified.
1398 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1400 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1401 val), IXGBE_NOT_IMPLEMENTED);
1405 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1406 * @hw: pointer to hardware structure
1407 * @reg: analog register to write
1408 * @val: value to write
1410 * Performs write operation to Atlas analog register specified.
1412 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1414 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1415 val), IXGBE_NOT_IMPLEMENTED);
1419 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1420 * @hw: pointer to hardware structure
1422 * Initializes the Unicast Table Arrays to zero on device load. This
1423 * is part of the Rx init addr execution path.
1425 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1427 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1428 IXGBE_NOT_IMPLEMENTED);
1432 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1433 * @hw: pointer to hardware structure
1434 * @byte_offset: byte offset to read
1435 * @dev_addr: I2C bus address to read from
1438 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1440 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1443 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1444 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1448 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1449 * @hw: pointer to hardware structure
1450 * @byte_offset: byte offset to read
1451 * @dev_addr: I2C bus address to read from
1454 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1456 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1457 u8 dev_addr, u8 *data)
1459 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1460 (hw, byte_offset, dev_addr, data),
1461 IXGBE_NOT_IMPLEMENTED);
1465 * ixgbe_read_link - Perform read operation on link device
1466 * @hw: pointer to the hardware structure
1467 * @addr: bus address to read from
1468 * @reg: device register to read from
1469 * @val: pointer to location to receive read value
1471 * Returns an error code on error.
1473 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1475 return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
1476 reg, val), IXGBE_NOT_IMPLEMENTED);
1480 * ixgbe_read_link_unlocked - Perform read operation on link device
1481 * @hw: pointer to the hardware structure
1482 * @addr: bus address to read from
1483 * @reg: device register to read from
1484 * @val: pointer to location to receive read value
1486 * Returns an error code on error.
1488 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1490 return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
1491 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1495 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1496 * @hw: pointer to hardware structure
1497 * @byte_offset: byte offset to write
1498 * @dev_addr: I2C bus address to write to
1499 * @data: value to write
1501 * Performs byte write operation to SFP module's EEPROM over I2C interface
1502 * at a specified device address.
1504 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1507 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1508 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1512 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1513 * @hw: pointer to hardware structure
1514 * @byte_offset: byte offset to write
1515 * @dev_addr: I2C bus address to write to
1516 * @data: value to write
1518 * Performs byte write operation to SFP module's EEPROM over I2C interface
1519 * at a specified device address.
1521 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1522 u8 dev_addr, u8 data)
1524 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1525 (hw, byte_offset, dev_addr, data),
1526 IXGBE_NOT_IMPLEMENTED);
1530 * ixgbe_write_link - Perform write operation on link device
1531 * @hw: pointer to the hardware structure
1532 * @addr: bus address to write to
1533 * @reg: device register to write to
1534 * @val: value to write
1536 * Returns an error code on error.
1538 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1540 return ixgbe_call_func(hw, hw->link.ops.write_link,
1541 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1545 * ixgbe_write_link_unlocked - Perform write operation on link device
1546 * @hw: pointer to the hardware structure
1547 * @addr: bus address to write to
1548 * @reg: device register to write to
1549 * @val: value to write
1551 * Returns an error code on error.
1553 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1555 return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
1556 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1560 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1561 * @hw: pointer to hardware structure
1562 * @byte_offset: EEPROM byte offset to write
1563 * @eeprom_data: value to write
1565 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1567 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1568 u8 byte_offset, u8 eeprom_data)
1570 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1571 (hw, byte_offset, eeprom_data),
1572 IXGBE_NOT_IMPLEMENTED);
1576 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1577 * @hw: pointer to hardware structure
1578 * @byte_offset: EEPROM byte offset to read
1579 * @eeprom_data: value read
1581 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1583 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1585 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1586 (hw, byte_offset, eeprom_data),
1587 IXGBE_NOT_IMPLEMENTED);
1591 * ixgbe_get_supported_physical_layer - Returns physical layer type
1592 * @hw: pointer to hardware structure
1594 * Determines physical layer capabilities of the current configuration.
1596 u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1598 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1599 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1603 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1604 * @hw: pointer to hardware structure
1605 * @regval: bitfield to write to the Rx DMA register
1607 * Enables the Rx DMA unit of the device.
1609 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1611 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1612 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1616 * ixgbe_disable_sec_rx_path - Stops the receive data path
1617 * @hw: pointer to hardware structure
1619 * Stops the receive data path.
1621 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1623 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1624 (hw), IXGBE_NOT_IMPLEMENTED);
1628 * ixgbe_enable_sec_rx_path - Enables the receive data path
1629 * @hw: pointer to hardware structure
1631 * Enables the receive data path.
1633 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1635 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1636 (hw), IXGBE_NOT_IMPLEMENTED);
1640 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1641 * @hw: pointer to hardware structure
1642 * @mask: Mask to specify which semaphore to acquire
1644 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1645 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1647 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1649 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1650 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1654 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1655 * @hw: pointer to hardware structure
1656 * @mask: Mask to specify which semaphore to release
1658 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1659 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1661 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1663 if (hw->mac.ops.release_swfw_sync)
1664 hw->mac.ops.release_swfw_sync(hw, mask);
1668 * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
1669 * @hw: pointer to hardware structure
1671 * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
1672 * Regardless of whether is succeeds or not it then release the semaphore.
1673 * This is function is called to recover from catastrophic failures that
1674 * may have left the semaphore locked.
1676 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)
1678 if (hw->mac.ops.init_swfw_sync)
1679 hw->mac.ops.init_swfw_sync(hw);
1683 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1685 if (hw->mac.ops.disable_rx)
1686 hw->mac.ops.disable_rx(hw);
1689 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1691 if (hw->mac.ops.enable_rx)
1692 hw->mac.ops.enable_rx(hw);
1696 * ixgbe_set_rate_select_speed - Set module link speed
1697 * @hw: pointer to hardware structure
1698 * @speed: link speed to set
1700 * Set module link speed via the rate select.
1702 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1704 if (hw->mac.ops.set_rate_select_speed)
1705 hw->mac.ops.set_rate_select_speed(hw, speed);