1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
38 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
39 * @hw: pointer to hardware structure
40 * @map: pointer to u8 arr for returning map
42 * Read the rtrup2tc HW register and resolve its content into map
44 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
46 if (hw->mac.ops.get_rtrup2tc)
47 hw->mac.ops.get_rtrup2tc(hw, map);
51 * ixgbe_init_shared_code - Initialize the shared code
52 * @hw: pointer to hardware structure
54 * This will assign function pointers and assign the MAC type and PHY code.
55 * Does not touch the hardware. This function must be called prior to any
56 * other function in the shared code. The ixgbe_hw structure should be
57 * memset to 0 prior to calling this function. The following fields in
58 * hw structure should be filled in prior to calling this function:
59 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
60 * subsystem_vendor_id, and revision_id
62 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
66 DEBUGFUNC("ixgbe_init_shared_code");
71 ixgbe_set_mac_type(hw);
73 switch (hw->mac.type) {
74 case ixgbe_mac_82598EB:
75 status = ixgbe_init_ops_82598(hw);
77 case ixgbe_mac_82599EB:
78 status = ixgbe_init_ops_82599(hw);
81 status = ixgbe_init_ops_X540(hw);
84 status = ixgbe_init_ops_X550(hw);
86 case ixgbe_mac_X550EM_x:
87 status = ixgbe_init_ops_X550EM(hw);
89 case ixgbe_mac_82599_vf:
90 case ixgbe_mac_X540_vf:
91 case ixgbe_mac_X550_vf:
92 case ixgbe_mac_X550EM_x_vf:
93 status = ixgbe_init_ops_vf(hw);
96 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
104 * ixgbe_set_mac_type - Sets MAC type
105 * @hw: pointer to the HW structure
107 * This function sets the mac type of the adapter based on the
108 * vendor ID and device ID stored in the hw structure.
110 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
112 s32 ret_val = IXGBE_SUCCESS;
114 DEBUGFUNC("ixgbe_set_mac_type\n");
116 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
117 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
118 "Unsupported vendor id: %x", hw->vendor_id);
119 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
122 switch (hw->device_id) {
123 case IXGBE_DEV_ID_82598:
124 case IXGBE_DEV_ID_82598_BX:
125 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
126 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
127 case IXGBE_DEV_ID_82598AT:
128 case IXGBE_DEV_ID_82598AT2:
129 case IXGBE_DEV_ID_82598EB_CX4:
130 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
131 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
132 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
133 case IXGBE_DEV_ID_82598EB_XF_LR:
134 case IXGBE_DEV_ID_82598EB_SFP_LOM:
135 hw->mac.type = ixgbe_mac_82598EB;
137 case IXGBE_DEV_ID_82599_KX4:
138 case IXGBE_DEV_ID_82599_KX4_MEZZ:
139 case IXGBE_DEV_ID_82599_XAUI_LOM:
140 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
141 case IXGBE_DEV_ID_82599_KR:
142 case IXGBE_DEV_ID_82599_SFP:
143 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
144 case IXGBE_DEV_ID_82599_SFP_FCOE:
145 case IXGBE_DEV_ID_82599_SFP_EM:
146 case IXGBE_DEV_ID_82599_SFP_SF2:
147 case IXGBE_DEV_ID_82599_SFP_SF_QP:
148 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
149 case IXGBE_DEV_ID_82599EN_SFP:
150 case IXGBE_DEV_ID_82599_CX4:
151 case IXGBE_DEV_ID_82599_LS:
152 case IXGBE_DEV_ID_82599_T3_LOM:
153 hw->mac.type = ixgbe_mac_82599EB;
155 case IXGBE_DEV_ID_82599_VF:
156 case IXGBE_DEV_ID_82599_VF_HV:
157 hw->mac.type = ixgbe_mac_82599_vf;
159 case IXGBE_DEV_ID_X540_VF:
160 case IXGBE_DEV_ID_X540_VF_HV:
161 hw->mac.type = ixgbe_mac_X540_vf;
163 case IXGBE_DEV_ID_X540T:
164 case IXGBE_DEV_ID_X540T1:
165 hw->mac.type = ixgbe_mac_X540;
167 case IXGBE_DEV_ID_X550T:
168 hw->mac.type = ixgbe_mac_X550;
170 case IXGBE_DEV_ID_X550EM_X_KX4:
171 case IXGBE_DEV_ID_X550EM_X_KR:
172 case IXGBE_DEV_ID_X550EM_X_10G_T:
173 case IXGBE_DEV_ID_X550EM_X_1G_T:
174 case IXGBE_DEV_ID_X550EM_X_SFP:
175 hw->mac.type = ixgbe_mac_X550EM_x;
177 case IXGBE_DEV_ID_X550_VF:
178 case IXGBE_DEV_ID_X550_VF_HV:
179 hw->mac.type = ixgbe_mac_X550_vf;
181 case IXGBE_DEV_ID_X550EM_X_VF:
182 case IXGBE_DEV_ID_X550EM_X_VF_HV:
183 hw->mac.type = ixgbe_mac_X550EM_x_vf;
186 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
187 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
188 "Unsupported device id: %x",
193 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
194 hw->mac.type, ret_val);
199 * ixgbe_init_hw - Initialize the hardware
200 * @hw: pointer to hardware structure
202 * Initialize the hardware by resetting and then starting the hardware
204 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
206 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
207 IXGBE_NOT_IMPLEMENTED);
211 * ixgbe_reset_hw - Performs a hardware reset
212 * @hw: pointer to hardware structure
214 * Resets the hardware by resetting the transmit and receive units, masks and
215 * clears all interrupts, performs a PHY reset, and performs a MAC reset
217 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
219 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
220 IXGBE_NOT_IMPLEMENTED);
224 * ixgbe_start_hw - Prepares hardware for Rx/Tx
225 * @hw: pointer to hardware structure
227 * Starts the hardware by filling the bus info structure and media type,
228 * clears all on chip counters, initializes receive address registers,
229 * multicast table, VLAN filter table, calls routine to setup link and
230 * flow control settings, and leaves transmit and receive units disabled
233 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
235 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
236 IXGBE_NOT_IMPLEMENTED);
240 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
241 * which is disabled by default in ixgbe_start_hw();
243 * @hw: pointer to hardware structure
245 * Enable relaxed ordering;
247 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
249 if (hw->mac.ops.enable_relaxed_ordering)
250 hw->mac.ops.enable_relaxed_ordering(hw);
254 * ixgbe_clear_hw_cntrs - Clear hardware counters
255 * @hw: pointer to hardware structure
257 * Clears all hardware statistics counters by reading them from the hardware
258 * Statistics counters are clear on read.
260 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
262 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
263 IXGBE_NOT_IMPLEMENTED);
267 * ixgbe_get_media_type - Get media type
268 * @hw: pointer to hardware structure
270 * Returns the media type (fiber, copper, backplane)
272 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
274 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
275 ixgbe_media_type_unknown);
279 * ixgbe_get_mac_addr - Get MAC address
280 * @hw: pointer to hardware structure
281 * @mac_addr: Adapter MAC address
283 * Reads the adapter's MAC address from the first Receive Address Register
284 * (RAR0) A reset of the adapter must have been performed prior to calling
285 * this function in order for the MAC address to have been loaded from the
288 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
290 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
291 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
295 * ixgbe_get_san_mac_addr - Get SAN MAC address
296 * @hw: pointer to hardware structure
297 * @san_mac_addr: SAN MAC address
299 * Reads the SAN MAC address from the EEPROM, if it's available. This is
300 * per-port, so set_lan_id() must be called before reading the addresses.
302 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
304 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
305 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
309 * ixgbe_set_san_mac_addr - Write a SAN MAC address
310 * @hw: pointer to hardware structure
311 * @san_mac_addr: SAN MAC address
313 * Writes A SAN MAC address to the EEPROM.
315 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
317 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
318 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
322 * ixgbe_get_device_caps - Get additional device capabilities
323 * @hw: pointer to hardware structure
324 * @device_caps: the EEPROM word for device capabilities
326 * Reads the extra device capabilities from the EEPROM
328 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
330 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
331 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
335 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
336 * @hw: pointer to hardware structure
337 * @wwnn_prefix: the alternative WWNN prefix
338 * @wwpn_prefix: the alternative WWPN prefix
340 * This function will read the EEPROM from the alternative SAN MAC address
341 * block to check the support for the alternative WWNN/WWPN prefix support.
343 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
346 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
347 (hw, wwnn_prefix, wwpn_prefix),
348 IXGBE_NOT_IMPLEMENTED);
352 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
353 * @hw: pointer to hardware structure
354 * @bs: the fcoe boot status
356 * This function will read the FCOE boot status from the iSCSI FCOE block
358 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
360 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
362 IXGBE_NOT_IMPLEMENTED);
366 * ixgbe_get_bus_info - Set PCI bus info
367 * @hw: pointer to hardware structure
369 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
371 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
373 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
374 IXGBE_NOT_IMPLEMENTED);
378 * ixgbe_get_num_of_tx_queues - Get Tx queues
379 * @hw: pointer to hardware structure
381 * Returns the number of transmit queues for the given adapter.
383 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
385 return hw->mac.max_tx_queues;
389 * ixgbe_get_num_of_rx_queues - Get Rx queues
390 * @hw: pointer to hardware structure
392 * Returns the number of receive queues for the given adapter.
394 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
396 return hw->mac.max_rx_queues;
400 * ixgbe_stop_adapter - Disable Rx/Tx units
401 * @hw: pointer to hardware structure
403 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
404 * disables transmit and receive units. The adapter_stopped flag is used by
405 * the shared code and drivers to determine if the adapter is in a stopped
406 * state and should not touch the hardware.
408 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
410 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
411 IXGBE_NOT_IMPLEMENTED);
415 * ixgbe_read_pba_string - Reads part number string from EEPROM
416 * @hw: pointer to hardware structure
417 * @pba_num: stores the part number string from the EEPROM
418 * @pba_num_size: part number string buffer length
420 * Reads the part number string from the EEPROM.
422 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
424 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
428 * ixgbe_read_pba_num - Reads part number from EEPROM
429 * @hw: pointer to hardware structure
430 * @pba_num: stores the part number from the EEPROM
432 * Reads the part number from the EEPROM.
434 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
436 return ixgbe_read_pba_num_generic(hw, pba_num);
440 * ixgbe_identify_phy - Get PHY type
441 * @hw: pointer to hardware structure
443 * Determines the physical layer module found on the current adapter.
445 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
447 s32 status = IXGBE_SUCCESS;
449 if (hw->phy.type == ixgbe_phy_unknown) {
450 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
451 IXGBE_NOT_IMPLEMENTED);
458 * ixgbe_reset_phy - Perform a PHY reset
459 * @hw: pointer to hardware structure
461 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
463 s32 status = IXGBE_SUCCESS;
465 if (hw->phy.type == ixgbe_phy_unknown) {
466 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
467 status = IXGBE_ERR_PHY;
470 if (status == IXGBE_SUCCESS) {
471 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
472 IXGBE_NOT_IMPLEMENTED);
478 * ixgbe_get_phy_firmware_version -
479 * @hw: pointer to hardware structure
480 * @firmware_version: pointer to firmware version
482 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
484 s32 status = IXGBE_SUCCESS;
486 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
487 (hw, firmware_version),
488 IXGBE_NOT_IMPLEMENTED);
493 * ixgbe_read_phy_reg - Read PHY register
494 * @hw: pointer to hardware structure
495 * @reg_addr: 32 bit address of PHY register to read
496 * @phy_data: Pointer to read data from PHY register
498 * Reads a value from a specified PHY register
500 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
504 ixgbe_identify_phy(hw);
506 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
507 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
511 * ixgbe_write_phy_reg - Write PHY register
512 * @hw: pointer to hardware structure
513 * @reg_addr: 32 bit PHY register to write
514 * @phy_data: Data to write to the PHY register
516 * Writes a value to specified PHY register
518 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
522 ixgbe_identify_phy(hw);
524 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
525 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
529 * ixgbe_setup_phy_link - Restart PHY autoneg
530 * @hw: pointer to hardware structure
532 * Restart autonegotiation and PHY and waits for completion.
534 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
536 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
537 IXGBE_NOT_IMPLEMENTED);
541 * ixgbe_setup_internal_phy - Configure integrated PHY
542 * @hw: pointer to hardware structure
544 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
545 * Returns success if not implemented, since nothing needs to be done in this
548 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
550 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
555 * ixgbe_check_phy_link - Determine link and speed status
556 * @hw: pointer to hardware structure
558 * Reads a PHY register to determine if link is up and the current speed for
561 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
564 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
565 link_up), IXGBE_NOT_IMPLEMENTED);
569 * ixgbe_setup_phy_link_speed - Set auto advertise
570 * @hw: pointer to hardware structure
571 * @speed: new link speed
573 * Sets the auto advertised capabilities
575 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
576 bool autoneg_wait_to_complete)
578 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
579 autoneg_wait_to_complete),
580 IXGBE_NOT_IMPLEMENTED);
584 * ixgbe_set_phy_power - Control the phy power state
585 * @hw: pointer to hardware structure
586 * @on: true for on, false for off
588 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
590 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
591 IXGBE_NOT_IMPLEMENTED);
595 * ixgbe_check_link - Get link and speed status
596 * @hw: pointer to hardware structure
598 * Reads the links register to determine if link is up and the current speed
600 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
601 bool *link_up, bool link_up_wait_to_complete)
603 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
604 link_up, link_up_wait_to_complete),
605 IXGBE_NOT_IMPLEMENTED);
609 * ixgbe_disable_tx_laser - Disable Tx laser
610 * @hw: pointer to hardware structure
612 * If the driver needs to disable the laser on SFI optics.
614 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
616 if (hw->mac.ops.disable_tx_laser)
617 hw->mac.ops.disable_tx_laser(hw);
621 * ixgbe_enable_tx_laser - Enable Tx laser
622 * @hw: pointer to hardware structure
624 * If the driver needs to enable the laser on SFI optics.
626 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
628 if (hw->mac.ops.enable_tx_laser)
629 hw->mac.ops.enable_tx_laser(hw);
633 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
634 * @hw: pointer to hardware structure
636 * When the driver changes the link speeds that it can support then
637 * flap the tx laser to alert the link partner to start autotry
638 * process on its end.
640 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
642 if (hw->mac.ops.flap_tx_laser)
643 hw->mac.ops.flap_tx_laser(hw);
647 * ixgbe_setup_link - Set link speed
648 * @hw: pointer to hardware structure
649 * @speed: new link speed
651 * Configures link settings. Restarts the link.
652 * Performs autonegotiation if needed.
654 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
655 bool autoneg_wait_to_complete)
657 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
658 autoneg_wait_to_complete),
659 IXGBE_NOT_IMPLEMENTED);
663 * ixgbe_get_link_capabilities - Returns link capabilities
664 * @hw: pointer to hardware structure
666 * Determines the link capabilities of the current configuration.
668 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
671 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
672 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
676 * ixgbe_led_on - Turn on LEDs
677 * @hw: pointer to hardware structure
678 * @index: led number to turn on
680 * Turns on the software controllable LEDs.
682 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
684 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
685 IXGBE_NOT_IMPLEMENTED);
689 * ixgbe_led_off - Turn off LEDs
690 * @hw: pointer to hardware structure
691 * @index: led number to turn off
693 * Turns off the software controllable LEDs.
695 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
697 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
698 IXGBE_NOT_IMPLEMENTED);
702 * ixgbe_blink_led_start - Blink LEDs
703 * @hw: pointer to hardware structure
704 * @index: led number to blink
706 * Blink LED based on index.
708 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
710 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
711 IXGBE_NOT_IMPLEMENTED);
715 * ixgbe_blink_led_stop - Stop blinking LEDs
716 * @hw: pointer to hardware structure
718 * Stop blinking LED based on index.
720 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
722 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
723 IXGBE_NOT_IMPLEMENTED);
727 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
728 * @hw: pointer to hardware structure
730 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
731 * ixgbe_hw struct in order to set up EEPROM access.
733 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
735 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
736 IXGBE_NOT_IMPLEMENTED);
741 * ixgbe_write_eeprom - Write word to EEPROM
742 * @hw: pointer to hardware structure
743 * @offset: offset within the EEPROM to be written to
744 * @data: 16 bit word to be written to the EEPROM
746 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
747 * called after this function, the EEPROM will most likely contain an
750 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
752 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
753 IXGBE_NOT_IMPLEMENTED);
757 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
758 * @hw: pointer to hardware structure
759 * @offset: offset within the EEPROM to be written to
760 * @data: 16 bit word(s) to be written to the EEPROM
761 * @words: number of words
763 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
764 * called after this function, the EEPROM will most likely contain an
767 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
770 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
771 (hw, offset, words, data),
772 IXGBE_NOT_IMPLEMENTED);
776 * ixgbe_read_eeprom - Read word from EEPROM
777 * @hw: pointer to hardware structure
778 * @offset: offset within the EEPROM to be read
779 * @data: read 16 bit value from EEPROM
781 * Reads 16 bit value from EEPROM
783 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
785 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
786 IXGBE_NOT_IMPLEMENTED);
790 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
791 * @hw: pointer to hardware structure
792 * @offset: offset within the EEPROM to be read
793 * @data: read 16 bit word(s) from EEPROM
794 * @words: number of words
796 * Reads 16 bit word(s) from EEPROM
798 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
799 u16 words, u16 *data)
801 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
802 (hw, offset, words, data),
803 IXGBE_NOT_IMPLEMENTED);
807 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
808 * @hw: pointer to hardware structure
809 * @checksum_val: calculated checksum
811 * Performs checksum calculation and validates the EEPROM checksum
813 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
815 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
816 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
820 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
821 * @hw: pointer to hardware structure
823 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
825 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
826 IXGBE_NOT_IMPLEMENTED);
830 * ixgbe_insert_mac_addr - Find a RAR for this mac address
831 * @hw: pointer to hardware structure
832 * @addr: Address to put into receive address register
833 * @vmdq: VMDq pool to assign
835 * Puts an ethernet address into a receive address register, or
836 * finds the rar that it is aleady in; adds to the pool list
838 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
840 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
842 IXGBE_NOT_IMPLEMENTED);
846 * ixgbe_set_rar - Set Rx address register
847 * @hw: pointer to hardware structure
848 * @index: Receive address register to write
849 * @addr: Address to put into receive address register
851 * @enable_addr: set flag that address is active
853 * Puts an ethernet address into a receive address register.
855 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
858 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
859 enable_addr), IXGBE_NOT_IMPLEMENTED);
863 * ixgbe_clear_rar - Clear Rx address register
864 * @hw: pointer to hardware structure
865 * @index: Receive address register to write
867 * Puts an ethernet address into a receive address register.
869 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
871 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
872 IXGBE_NOT_IMPLEMENTED);
876 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
877 * @hw: pointer to hardware structure
878 * @rar: receive address register index to associate with VMDq index
879 * @vmdq: VMDq set or pool index
881 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
883 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
884 IXGBE_NOT_IMPLEMENTED);
889 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
890 * @hw: pointer to hardware structure
891 * @vmdq: VMDq default pool index
893 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
895 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
896 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
900 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
901 * @hw: pointer to hardware structure
902 * @rar: receive address register index to disassociate with VMDq index
903 * @vmdq: VMDq set or pool index
905 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
907 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
908 IXGBE_NOT_IMPLEMENTED);
912 * ixgbe_init_rx_addrs - Initializes receive address filters.
913 * @hw: pointer to hardware structure
915 * Places the MAC address in receive address register 0 and clears the rest
916 * of the receive address registers. Clears the multicast table. Assumes
917 * the receiver is in reset when the routine is called.
919 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
921 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
922 IXGBE_NOT_IMPLEMENTED);
926 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
927 * @hw: pointer to hardware structure
929 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
931 return hw->mac.num_rar_entries;
935 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
936 * @hw: pointer to hardware structure
937 * @addr_list: the list of new multicast addresses
938 * @addr_count: number of addresses
939 * @func: iterator function to walk the multicast address list
941 * The given list replaces any existing list. Clears the secondary addrs from
942 * receive address registers. Uses unused receive address registers for the
943 * first secondary addresses, and falls back to promiscuous mode as needed.
945 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
946 u32 addr_count, ixgbe_mc_addr_itr func)
948 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
949 addr_list, addr_count, func),
950 IXGBE_NOT_IMPLEMENTED);
954 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
955 * @hw: pointer to hardware structure
956 * @mc_addr_list: the list of new multicast addresses
957 * @mc_addr_count: number of addresses
958 * @func: iterator function to walk the multicast address list
960 * The given list replaces any existing list. Clears the MC addrs from receive
961 * address registers and the multicast table. Uses unused receive address
962 * registers for the first multicast addresses, and hashes the rest into the
965 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
966 u32 mc_addr_count, ixgbe_mc_addr_itr func,
969 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
970 mc_addr_list, mc_addr_count, func, clear),
971 IXGBE_NOT_IMPLEMENTED);
975 * ixgbe_enable_mc - Enable multicast address in RAR
976 * @hw: pointer to hardware structure
978 * Enables multicast address in RAR and the use of the multicast hash table.
980 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
982 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
983 IXGBE_NOT_IMPLEMENTED);
987 * ixgbe_disable_mc - Disable multicast address in RAR
988 * @hw: pointer to hardware structure
990 * Disables multicast address in RAR and the use of the multicast hash table.
992 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
994 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
995 IXGBE_NOT_IMPLEMENTED);
999 * ixgbe_clear_vfta - Clear VLAN filter table
1000 * @hw: pointer to hardware structure
1002 * Clears the VLAN filer table, and the VMDq index associated with the filter
1004 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1006 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1007 IXGBE_NOT_IMPLEMENTED);
1011 * ixgbe_set_vfta - Set VLAN filter table
1012 * @hw: pointer to hardware structure
1013 * @vlan: VLAN id to write to VLAN filter
1014 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1015 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1017 * Turn on/off specified VLAN in the VLAN filter table.
1019 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1021 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1022 vlan_on), IXGBE_NOT_IMPLEMENTED);
1026 * ixgbe_set_vlvf - Set VLAN Pool Filter
1027 * @hw: pointer to hardware structure
1028 * @vlan: VLAN id to write to VLAN filter
1029 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1030 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1031 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1034 * Turn on/off specified bit in VLVF table.
1036 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1039 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1040 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1044 * ixgbe_fc_enable - Enable flow control
1045 * @hw: pointer to hardware structure
1047 * Configures the flow control settings based on SW configuration.
1049 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1051 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1052 IXGBE_NOT_IMPLEMENTED);
1056 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1057 * @hw: pointer to hardware structure
1058 * @maj: driver major number to be sent to firmware
1059 * @min: driver minor number to be sent to firmware
1060 * @build: driver build number to be sent to firmware
1061 * @ver: driver version number to be sent to firmware
1063 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1066 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1067 build, ver), IXGBE_NOT_IMPLEMENTED);
1072 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1073 * @hw: pointer to hardware structure
1075 * Updates the temperatures in mac.thermal_sensor_data
1077 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1079 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1080 IXGBE_NOT_IMPLEMENTED);
1084 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1085 * @hw: pointer to hardware structure
1087 * Inits the thermal sensor thresholds according to the NVM map
1089 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1091 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1092 IXGBE_NOT_IMPLEMENTED);
1096 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1097 * @hw: pointer to hardware structure
1099 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1100 * When disabling dmac, dmac enable dmac bit is cleared.
1102 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1104 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1105 IXGBE_NOT_IMPLEMENTED);
1109 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1110 * @hw: pointer to hardware structure
1112 * Disables dmac, updates per TC settings, and then enable dmac.
1114 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1116 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1117 IXGBE_NOT_IMPLEMENTED);
1121 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1122 * @hw: pointer to hardware structure
1124 * Configure DMA coalescing threshold per TC and set high priority bit for
1125 * FCOE TC. The dmac enable bit must be cleared before configuring.
1127 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1129 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1130 IXGBE_NOT_IMPLEMENTED);
1134 * ixgbe_setup_eee - Enable/disable EEE support
1135 * @hw: pointer to the HW structure
1136 * @enable_eee: boolean flag to enable EEE
1138 * Enable/disable EEE based on enable_ee flag.
1139 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1143 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1145 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1146 IXGBE_NOT_IMPLEMENTED);
1150 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1151 * @hw: pointer to hardware structure
1152 * @enbale: enable or disable source address pruning
1153 * @pool: Rx pool - Rx pool to toggle source address pruning
1155 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1158 if (hw->mac.ops.set_source_address_pruning)
1159 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1163 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1164 * @hw: pointer to hardware structure
1165 * @enable: enable or disable switch for Ethertype anti-spoofing
1166 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1169 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1171 if (hw->mac.ops.set_ethertype_anti_spoofing)
1172 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1176 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1177 * @hw: pointer to hardware structure
1178 * @reg_addr: 32 bit address of PHY register to read
1179 * @device_type: type of device you want to communicate with
1180 * @phy_data: Pointer to read data from PHY register
1182 * Reads a value from a specified PHY register
1184 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1185 u32 device_type, u32 *phy_data)
1187 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1188 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1192 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1193 * @hw: pointer to hardware structure
1194 * @reg_addr: 32 bit PHY register to write
1195 * @device_type: type of device you want to communicate with
1196 * @phy_data: Data to write to the PHY register
1198 * Writes a value to specified PHY register
1200 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1201 u32 device_type, u32 phy_data)
1203 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1204 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1208 * ixgbe_disable_mdd - Disable malicious driver detection
1209 * @hw: pointer to hardware structure
1212 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1214 if (hw->mac.ops.disable_mdd)
1215 hw->mac.ops.disable_mdd(hw);
1219 * ixgbe_enable_mdd - Enable malicious driver detection
1220 * @hw: pointer to hardware structure
1223 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1225 if (hw->mac.ops.enable_mdd)
1226 hw->mac.ops.enable_mdd(hw);
1230 * ixgbe_mdd_event - Handle malicious driver detection event
1231 * @hw: pointer to hardware structure
1232 * @vf_bitmap: vf bitmap of malicious vfs
1235 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1237 if (hw->mac.ops.mdd_event)
1238 hw->mac.ops.mdd_event(hw, vf_bitmap);
1242 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1244 * @hw: pointer to hardware structure
1248 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1250 if (hw->mac.ops.restore_mdd_vf)
1251 hw->mac.ops.restore_mdd_vf(hw, vf);
1255 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1256 * @hw: pointer to hardware structure
1257 * @reg: analog register to read
1260 * Performs write operation to analog register specified.
1262 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1264 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1265 val), IXGBE_NOT_IMPLEMENTED);
1269 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1270 * @hw: pointer to hardware structure
1271 * @reg: analog register to write
1272 * @val: value to write
1274 * Performs write operation to Atlas analog register specified.
1276 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1278 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1279 val), IXGBE_NOT_IMPLEMENTED);
1283 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1284 * @hw: pointer to hardware structure
1286 * Initializes the Unicast Table Arrays to zero on device load. This
1287 * is part of the Rx init addr execution path.
1289 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1291 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1292 IXGBE_NOT_IMPLEMENTED);
1296 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1297 * @hw: pointer to hardware structure
1298 * @byte_offset: byte offset to read
1299 * @dev_addr: I2C bus address to read from
1302 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1304 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1307 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1308 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1312 * ixgbe_read_i2c_combined - Perform I2C read combined operation
1313 * @hw: pointer to the hardware structure
1314 * @addr: I2C bus address to read from
1315 * @reg: I2C device register to read from
1316 * @val: pointer to location to receive read value
1318 * Returns an error code on error.
1320 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1322 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
1323 reg, val), IXGBE_NOT_IMPLEMENTED);
1327 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1328 * @hw: pointer to hardware structure
1329 * @byte_offset: byte offset to write
1330 * @dev_addr: I2C bus address to write to
1331 * @data: value to write
1333 * Performs byte write operation to SFP module's EEPROM over I2C interface
1334 * at a specified device address.
1336 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1339 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1340 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1344 * ixgbe_write_i2c_combined - Perform I2C write combined operation
1345 * @hw: pointer to the hardware structure
1346 * @addr: I2C bus address to write to
1347 * @reg: I2C device register to write to
1348 * @val: value to write
1350 * Returns an error code on error.
1352 s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1354 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
1355 reg, val), IXGBE_NOT_IMPLEMENTED);
1359 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1360 * @hw: pointer to hardware structure
1361 * @byte_offset: EEPROM byte offset to write
1362 * @eeprom_data: value to write
1364 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1366 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1367 u8 byte_offset, u8 eeprom_data)
1369 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1370 (hw, byte_offset, eeprom_data),
1371 IXGBE_NOT_IMPLEMENTED);
1375 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1376 * @hw: pointer to hardware structure
1377 * @byte_offset: EEPROM byte offset to read
1378 * @eeprom_data: value read
1380 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1382 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1384 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1385 (hw, byte_offset, eeprom_data),
1386 IXGBE_NOT_IMPLEMENTED);
1390 * ixgbe_get_supported_physical_layer - Returns physical layer type
1391 * @hw: pointer to hardware structure
1393 * Determines physical layer capabilities of the current configuration.
1395 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1397 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1398 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1402 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1403 * @hw: pointer to hardware structure
1404 * @regval: bitfield to write to the Rx DMA register
1406 * Enables the Rx DMA unit of the device.
1408 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1410 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1411 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1415 * ixgbe_disable_sec_rx_path - Stops the receive data path
1416 * @hw: pointer to hardware structure
1418 * Stops the receive data path.
1420 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1422 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1423 (hw), IXGBE_NOT_IMPLEMENTED);
1427 * ixgbe_enable_sec_rx_path - Enables the receive data path
1428 * @hw: pointer to hardware structure
1430 * Enables the receive data path.
1432 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1434 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1435 (hw), IXGBE_NOT_IMPLEMENTED);
1439 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1440 * @hw: pointer to hardware structure
1441 * @mask: Mask to specify which semaphore to acquire
1443 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1444 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1446 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1448 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1449 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1453 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1454 * @hw: pointer to hardware structure
1455 * @mask: Mask to specify which semaphore to release
1457 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1458 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1460 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1462 if (hw->mac.ops.release_swfw_sync)
1463 hw->mac.ops.release_swfw_sync(hw, mask);
1467 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1469 if (hw->mac.ops.disable_rx)
1470 hw->mac.ops.disable_rx(hw);
1473 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1475 if (hw->mac.ops.enable_rx)
1476 hw->mac.ops.enable_rx(hw);