1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
37 #define IXGBE_EMPTY_PARAM
39 static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
40 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
43 static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
44 IXGBE_MVALS_INIT(_X540)
47 static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
48 IXGBE_MVALS_INIT(_X550)
51 static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
52 IXGBE_MVALS_INIT(_X550EM_x)
55 static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
56 IXGBE_MVALS_INIT(_X550EM_a)
60 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
61 * @hw: pointer to hardware structure
62 * @map: pointer to u8 arr for returning map
64 * Read the rtrup2tc HW register and resolve its content into map
66 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
68 if (hw->mac.ops.get_rtrup2tc)
69 hw->mac.ops.get_rtrup2tc(hw, map);
73 * ixgbe_init_shared_code - Initialize the shared code
74 * @hw: pointer to hardware structure
76 * This will assign function pointers and assign the MAC type and PHY code.
77 * Does not touch the hardware. This function must be called prior to any
78 * other function in the shared code. The ixgbe_hw structure should be
79 * memset to 0 prior to calling this function. The following fields in
80 * hw structure should be filled in prior to calling this function:
81 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
82 * subsystem_vendor_id, and revision_id
84 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
88 DEBUGFUNC("ixgbe_init_shared_code");
93 ixgbe_set_mac_type(hw);
95 switch (hw->mac.type) {
96 case ixgbe_mac_82598EB:
97 status = ixgbe_init_ops_82598(hw);
99 case ixgbe_mac_82599EB:
100 status = ixgbe_init_ops_82599(hw);
103 status = ixgbe_init_ops_X540(hw);
106 status = ixgbe_init_ops_X550(hw);
108 case ixgbe_mac_X550EM_x:
109 case ixgbe_mac_X550EM_a:
110 status = ixgbe_init_ops_X550EM(hw);
112 case ixgbe_mac_82599_vf:
113 case ixgbe_mac_X540_vf:
114 case ixgbe_mac_X550_vf:
115 case ixgbe_mac_X550EM_x_vf:
116 case ixgbe_mac_X550EM_a_vf:
117 status = ixgbe_init_ops_vf(hw);
120 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
123 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
129 * ixgbe_set_mac_type - Sets MAC type
130 * @hw: pointer to the HW structure
132 * This function sets the mac type of the adapter based on the
133 * vendor ID and device ID stored in the hw structure.
135 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
137 s32 ret_val = IXGBE_SUCCESS;
139 DEBUGFUNC("ixgbe_set_mac_type\n");
141 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
142 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
143 "Unsupported vendor id: %x", hw->vendor_id);
144 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
147 hw->mvals = ixgbe_mvals_base;
149 switch (hw->device_id) {
150 case IXGBE_DEV_ID_82598:
151 case IXGBE_DEV_ID_82598_BX:
152 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
153 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
154 case IXGBE_DEV_ID_82598AT:
155 case IXGBE_DEV_ID_82598AT2:
156 case IXGBE_DEV_ID_82598EB_CX4:
157 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
158 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
159 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
160 case IXGBE_DEV_ID_82598EB_XF_LR:
161 case IXGBE_DEV_ID_82598EB_SFP_LOM:
162 hw->mac.type = ixgbe_mac_82598EB;
164 case IXGBE_DEV_ID_82599_KX4:
165 case IXGBE_DEV_ID_82599_KX4_MEZZ:
166 case IXGBE_DEV_ID_82599_XAUI_LOM:
167 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
168 case IXGBE_DEV_ID_82599_KR:
169 case IXGBE_DEV_ID_82599_SFP:
170 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
171 case IXGBE_DEV_ID_82599_SFP_FCOE:
172 case IXGBE_DEV_ID_82599_SFP_EM:
173 case IXGBE_DEV_ID_82599_SFP_SF2:
174 case IXGBE_DEV_ID_82599_SFP_SF_QP:
175 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
176 case IXGBE_DEV_ID_82599EN_SFP:
177 case IXGBE_DEV_ID_82599_CX4:
178 case IXGBE_DEV_ID_82599_LS:
179 case IXGBE_DEV_ID_82599_T3_LOM:
180 hw->mac.type = ixgbe_mac_82599EB;
182 case IXGBE_DEV_ID_82599_VF:
183 case IXGBE_DEV_ID_82599_VF_HV:
184 hw->mac.type = ixgbe_mac_82599_vf;
186 case IXGBE_DEV_ID_X540_VF:
187 case IXGBE_DEV_ID_X540_VF_HV:
188 hw->mac.type = ixgbe_mac_X540_vf;
189 hw->mvals = ixgbe_mvals_X540;
191 case IXGBE_DEV_ID_X540T:
192 case IXGBE_DEV_ID_X540T1:
193 hw->mac.type = ixgbe_mac_X540;
194 hw->mvals = ixgbe_mvals_X540;
196 case IXGBE_DEV_ID_X550T:
197 case IXGBE_DEV_ID_X550T1:
198 hw->mac.type = ixgbe_mac_X550;
199 hw->mvals = ixgbe_mvals_X550;
201 case IXGBE_DEV_ID_X550EM_X_KX4:
202 case IXGBE_DEV_ID_X550EM_X_KR:
203 case IXGBE_DEV_ID_X550EM_X_10G_T:
204 case IXGBE_DEV_ID_X550EM_X_1G_T:
205 case IXGBE_DEV_ID_X550EM_X_SFP:
206 hw->mac.type = ixgbe_mac_X550EM_x;
207 hw->mvals = ixgbe_mvals_X550EM_x;
209 case IXGBE_DEV_ID_X550EM_A_KR:
210 case IXGBE_DEV_ID_X550EM_A_KR_L:
211 case IXGBE_DEV_ID_X550EM_A_SFP_N:
212 case IXGBE_DEV_ID_X550EM_A_1G_T:
213 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
214 case IXGBE_DEV_ID_X550EM_A_10G_T:
215 case IXGBE_DEV_ID_X550EM_A_QSFP:
216 case IXGBE_DEV_ID_X550EM_A_QSFP_N:
217 case IXGBE_DEV_ID_X550EM_A_SFP:
218 hw->mac.type = ixgbe_mac_X550EM_a;
219 hw->mvals = ixgbe_mvals_X550EM_a;
221 case IXGBE_DEV_ID_X550_VF:
222 case IXGBE_DEV_ID_X550_VF_HV:
223 hw->mac.type = ixgbe_mac_X550_vf;
224 hw->mvals = ixgbe_mvals_X550;
226 case IXGBE_DEV_ID_X550EM_X_VF:
227 case IXGBE_DEV_ID_X550EM_X_VF_HV:
228 hw->mac.type = ixgbe_mac_X550EM_x_vf;
229 hw->mvals = ixgbe_mvals_X550EM_x;
231 case IXGBE_DEV_ID_X550EM_A_VF:
232 case IXGBE_DEV_ID_X550EM_A_VF_HV:
233 hw->mac.type = ixgbe_mac_X550EM_a_vf;
234 hw->mvals = ixgbe_mvals_X550EM_a;
237 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
238 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
239 "Unsupported device id: %x",
244 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
245 hw->mac.type, ret_val);
250 * ixgbe_init_hw - Initialize the hardware
251 * @hw: pointer to hardware structure
253 * Initialize the hardware by resetting and then starting the hardware
255 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
257 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
258 IXGBE_NOT_IMPLEMENTED);
262 * ixgbe_reset_hw - Performs a hardware reset
263 * @hw: pointer to hardware structure
265 * Resets the hardware by resetting the transmit and receive units, masks and
266 * clears all interrupts, performs a PHY reset, and performs a MAC reset
268 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
270 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
271 IXGBE_NOT_IMPLEMENTED);
275 * ixgbe_start_hw - Prepares hardware for Rx/Tx
276 * @hw: pointer to hardware structure
278 * Starts the hardware by filling the bus info structure and media type,
279 * clears all on chip counters, initializes receive address registers,
280 * multicast table, VLAN filter table, calls routine to setup link and
281 * flow control settings, and leaves transmit and receive units disabled
284 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
286 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
287 IXGBE_NOT_IMPLEMENTED);
291 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
292 * which is disabled by default in ixgbe_start_hw();
294 * @hw: pointer to hardware structure
296 * Enable relaxed ordering;
298 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
300 if (hw->mac.ops.enable_relaxed_ordering)
301 hw->mac.ops.enable_relaxed_ordering(hw);
305 * ixgbe_clear_hw_cntrs - Clear hardware counters
306 * @hw: pointer to hardware structure
308 * Clears all hardware statistics counters by reading them from the hardware
309 * Statistics counters are clear on read.
311 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
313 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
314 IXGBE_NOT_IMPLEMENTED);
318 * ixgbe_get_media_type - Get media type
319 * @hw: pointer to hardware structure
321 * Returns the media type (fiber, copper, backplane)
323 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
325 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
326 ixgbe_media_type_unknown);
330 * ixgbe_get_mac_addr - Get MAC address
331 * @hw: pointer to hardware structure
332 * @mac_addr: Adapter MAC address
334 * Reads the adapter's MAC address from the first Receive Address Register
335 * (RAR0) A reset of the adapter must have been performed prior to calling
336 * this function in order for the MAC address to have been loaded from the
339 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
341 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
342 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
346 * ixgbe_get_san_mac_addr - Get SAN MAC address
347 * @hw: pointer to hardware structure
348 * @san_mac_addr: SAN MAC address
350 * Reads the SAN MAC address from the EEPROM, if it's available. This is
351 * per-port, so set_lan_id() must be called before reading the addresses.
353 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
355 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
356 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
360 * ixgbe_set_san_mac_addr - Write a SAN MAC address
361 * @hw: pointer to hardware structure
362 * @san_mac_addr: SAN MAC address
364 * Writes A SAN MAC address to the EEPROM.
366 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
368 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
369 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
373 * ixgbe_get_device_caps - Get additional device capabilities
374 * @hw: pointer to hardware structure
375 * @device_caps: the EEPROM word for device capabilities
377 * Reads the extra device capabilities from the EEPROM
379 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
381 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
382 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
386 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
387 * @hw: pointer to hardware structure
388 * @wwnn_prefix: the alternative WWNN prefix
389 * @wwpn_prefix: the alternative WWPN prefix
391 * This function will read the EEPROM from the alternative SAN MAC address
392 * block to check the support for the alternative WWNN/WWPN prefix support.
394 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
397 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
398 (hw, wwnn_prefix, wwpn_prefix),
399 IXGBE_NOT_IMPLEMENTED);
403 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
404 * @hw: pointer to hardware structure
405 * @bs: the fcoe boot status
407 * This function will read the FCOE boot status from the iSCSI FCOE block
409 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
411 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
413 IXGBE_NOT_IMPLEMENTED);
417 * ixgbe_get_bus_info - Set PCI bus info
418 * @hw: pointer to hardware structure
420 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
422 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
424 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
425 IXGBE_NOT_IMPLEMENTED);
429 * ixgbe_get_num_of_tx_queues - Get Tx queues
430 * @hw: pointer to hardware structure
432 * Returns the number of transmit queues for the given adapter.
434 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
436 return hw->mac.max_tx_queues;
440 * ixgbe_get_num_of_rx_queues - Get Rx queues
441 * @hw: pointer to hardware structure
443 * Returns the number of receive queues for the given adapter.
445 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
447 return hw->mac.max_rx_queues;
451 * ixgbe_stop_adapter - Disable Rx/Tx units
452 * @hw: pointer to hardware structure
454 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
455 * disables transmit and receive units. The adapter_stopped flag is used by
456 * the shared code and drivers to determine if the adapter is in a stopped
457 * state and should not touch the hardware.
459 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
461 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
462 IXGBE_NOT_IMPLEMENTED);
466 * ixgbe_read_pba_string - Reads part number string from EEPROM
467 * @hw: pointer to hardware structure
468 * @pba_num: stores the part number string from the EEPROM
469 * @pba_num_size: part number string buffer length
471 * Reads the part number string from the EEPROM.
473 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
475 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
479 * ixgbe_read_pba_num - Reads part number from EEPROM
480 * @hw: pointer to hardware structure
481 * @pba_num: stores the part number from the EEPROM
483 * Reads the part number from the EEPROM.
485 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
487 return ixgbe_read_pba_num_generic(hw, pba_num);
491 * ixgbe_identify_phy - Get PHY type
492 * @hw: pointer to hardware structure
494 * Determines the physical layer module found on the current adapter.
496 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
498 s32 status = IXGBE_SUCCESS;
500 if (hw->phy.type == ixgbe_phy_unknown) {
501 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
502 IXGBE_NOT_IMPLEMENTED);
509 * ixgbe_reset_phy - Perform a PHY reset
510 * @hw: pointer to hardware structure
512 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
514 s32 status = IXGBE_SUCCESS;
516 if (hw->phy.type == ixgbe_phy_unknown) {
517 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
518 status = IXGBE_ERR_PHY;
521 if (status == IXGBE_SUCCESS) {
522 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
523 IXGBE_NOT_IMPLEMENTED);
529 * ixgbe_get_phy_firmware_version -
530 * @hw: pointer to hardware structure
531 * @firmware_version: pointer to firmware version
533 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
535 s32 status = IXGBE_SUCCESS;
537 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
538 (hw, firmware_version),
539 IXGBE_NOT_IMPLEMENTED);
544 * ixgbe_read_phy_reg - Read PHY register
545 * @hw: pointer to hardware structure
546 * @reg_addr: 32 bit address of PHY register to read
547 * @phy_data: Pointer to read data from PHY register
549 * Reads a value from a specified PHY register
551 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
555 ixgbe_identify_phy(hw);
557 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
558 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
562 * ixgbe_write_phy_reg - Write PHY register
563 * @hw: pointer to hardware structure
564 * @reg_addr: 32 bit PHY register to write
565 * @phy_data: Data to write to the PHY register
567 * Writes a value to specified PHY register
569 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
573 ixgbe_identify_phy(hw);
575 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
576 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
580 * ixgbe_setup_phy_link - Restart PHY autoneg
581 * @hw: pointer to hardware structure
583 * Restart autonegotiation and PHY and waits for completion.
585 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
587 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
588 IXGBE_NOT_IMPLEMENTED);
592 * ixgbe_setup_internal_phy - Configure integrated PHY
593 * @hw: pointer to hardware structure
595 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
596 * Returns success if not implemented, since nothing needs to be done in this
599 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
601 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
606 * ixgbe_check_phy_link - Determine link and speed status
607 * @hw: pointer to hardware structure
609 * Reads a PHY register to determine if link is up and the current speed for
612 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
615 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
616 link_up), IXGBE_NOT_IMPLEMENTED);
620 * ixgbe_setup_phy_link_speed - Set auto advertise
621 * @hw: pointer to hardware structure
622 * @speed: new link speed
624 * Sets the auto advertised capabilities
626 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
627 bool autoneg_wait_to_complete)
629 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
630 autoneg_wait_to_complete),
631 IXGBE_NOT_IMPLEMENTED);
635 * ixgbe_set_phy_power - Control the phy power state
636 * @hw: pointer to hardware structure
637 * @on: true for on, false for off
639 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
641 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
642 IXGBE_NOT_IMPLEMENTED);
646 * ixgbe_check_link - Get link and speed status
647 * @hw: pointer to hardware structure
649 * Reads the links register to determine if link is up and the current speed
651 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
652 bool *link_up, bool link_up_wait_to_complete)
654 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
655 link_up, link_up_wait_to_complete),
656 IXGBE_NOT_IMPLEMENTED);
660 * ixgbe_disable_tx_laser - Disable Tx laser
661 * @hw: pointer to hardware structure
663 * If the driver needs to disable the laser on SFI optics.
665 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
667 if (hw->mac.ops.disable_tx_laser)
668 hw->mac.ops.disable_tx_laser(hw);
672 * ixgbe_enable_tx_laser - Enable Tx laser
673 * @hw: pointer to hardware structure
675 * If the driver needs to enable the laser on SFI optics.
677 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
679 if (hw->mac.ops.enable_tx_laser)
680 hw->mac.ops.enable_tx_laser(hw);
684 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
685 * @hw: pointer to hardware structure
687 * When the driver changes the link speeds that it can support then
688 * flap the tx laser to alert the link partner to start autotry
689 * process on its end.
691 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
693 if (hw->mac.ops.flap_tx_laser)
694 hw->mac.ops.flap_tx_laser(hw);
698 * ixgbe_setup_link - Set link speed
699 * @hw: pointer to hardware structure
700 * @speed: new link speed
702 * Configures link settings. Restarts the link.
703 * Performs autonegotiation if needed.
705 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
706 bool autoneg_wait_to_complete)
708 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
709 autoneg_wait_to_complete),
710 IXGBE_NOT_IMPLEMENTED);
714 * ixgbe_setup_mac_link - Set link speed
715 * @hw: pointer to hardware structure
716 * @speed: new link speed
718 * Configures link settings. Restarts the link.
719 * Performs autonegotiation if needed.
721 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
722 bool autoneg_wait_to_complete)
724 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
725 autoneg_wait_to_complete),
726 IXGBE_NOT_IMPLEMENTED);
730 * ixgbe_get_link_capabilities - Returns link capabilities
731 * @hw: pointer to hardware structure
733 * Determines the link capabilities of the current configuration.
735 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
738 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
739 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
743 * ixgbe_led_on - Turn on LEDs
744 * @hw: pointer to hardware structure
745 * @index: led number to turn on
747 * Turns on the software controllable LEDs.
749 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
751 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
752 IXGBE_NOT_IMPLEMENTED);
756 * ixgbe_led_off - Turn off LEDs
757 * @hw: pointer to hardware structure
758 * @index: led number to turn off
760 * Turns off the software controllable LEDs.
762 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
764 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
765 IXGBE_NOT_IMPLEMENTED);
769 * ixgbe_blink_led_start - Blink LEDs
770 * @hw: pointer to hardware structure
771 * @index: led number to blink
773 * Blink LED based on index.
775 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
777 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
778 IXGBE_NOT_IMPLEMENTED);
782 * ixgbe_blink_led_stop - Stop blinking LEDs
783 * @hw: pointer to hardware structure
785 * Stop blinking LED based on index.
787 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
789 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
790 IXGBE_NOT_IMPLEMENTED);
794 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
795 * @hw: pointer to hardware structure
797 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
798 * ixgbe_hw struct in order to set up EEPROM access.
800 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
802 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
803 IXGBE_NOT_IMPLEMENTED);
808 * ixgbe_write_eeprom - Write word to EEPROM
809 * @hw: pointer to hardware structure
810 * @offset: offset within the EEPROM to be written to
811 * @data: 16 bit word to be written to the EEPROM
813 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
814 * called after this function, the EEPROM will most likely contain an
817 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
819 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
820 IXGBE_NOT_IMPLEMENTED);
824 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
825 * @hw: pointer to hardware structure
826 * @offset: offset within the EEPROM to be written to
827 * @data: 16 bit word(s) to be written to the EEPROM
828 * @words: number of words
830 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
831 * called after this function, the EEPROM will most likely contain an
834 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
837 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
838 (hw, offset, words, data),
839 IXGBE_NOT_IMPLEMENTED);
843 * ixgbe_read_eeprom - Read word from EEPROM
844 * @hw: pointer to hardware structure
845 * @offset: offset within the EEPROM to be read
846 * @data: read 16 bit value from EEPROM
848 * Reads 16 bit value from EEPROM
850 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
852 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
853 IXGBE_NOT_IMPLEMENTED);
857 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
858 * @hw: pointer to hardware structure
859 * @offset: offset within the EEPROM to be read
860 * @data: read 16 bit word(s) from EEPROM
861 * @words: number of words
863 * Reads 16 bit word(s) from EEPROM
865 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
866 u16 words, u16 *data)
868 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
869 (hw, offset, words, data),
870 IXGBE_NOT_IMPLEMENTED);
874 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
875 * @hw: pointer to hardware structure
876 * @checksum_val: calculated checksum
878 * Performs checksum calculation and validates the EEPROM checksum
880 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
882 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
883 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
887 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
888 * @hw: pointer to hardware structure
890 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
892 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
893 IXGBE_NOT_IMPLEMENTED);
897 * ixgbe_insert_mac_addr - Find a RAR for this mac address
898 * @hw: pointer to hardware structure
899 * @addr: Address to put into receive address register
900 * @vmdq: VMDq pool to assign
902 * Puts an ethernet address into a receive address register, or
903 * finds the rar that it is aleady in; adds to the pool list
905 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
907 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
909 IXGBE_NOT_IMPLEMENTED);
913 * ixgbe_set_rar - Set Rx address register
914 * @hw: pointer to hardware structure
915 * @index: Receive address register to write
916 * @addr: Address to put into receive address register
918 * @enable_addr: set flag that address is active
920 * Puts an ethernet address into a receive address register.
922 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
925 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
926 enable_addr), IXGBE_NOT_IMPLEMENTED);
930 * ixgbe_clear_rar - Clear Rx address register
931 * @hw: pointer to hardware structure
932 * @index: Receive address register to write
934 * Puts an ethernet address into a receive address register.
936 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
938 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
939 IXGBE_NOT_IMPLEMENTED);
943 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
944 * @hw: pointer to hardware structure
945 * @rar: receive address register index to associate with VMDq index
946 * @vmdq: VMDq set or pool index
948 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
950 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
951 IXGBE_NOT_IMPLEMENTED);
956 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
957 * @hw: pointer to hardware structure
958 * @vmdq: VMDq default pool index
960 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
962 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
963 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
967 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
968 * @hw: pointer to hardware structure
969 * @rar: receive address register index to disassociate with VMDq index
970 * @vmdq: VMDq set or pool index
972 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
974 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
975 IXGBE_NOT_IMPLEMENTED);
979 * ixgbe_init_rx_addrs - Initializes receive address filters.
980 * @hw: pointer to hardware structure
982 * Places the MAC address in receive address register 0 and clears the rest
983 * of the receive address registers. Clears the multicast table. Assumes
984 * the receiver is in reset when the routine is called.
986 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
988 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
989 IXGBE_NOT_IMPLEMENTED);
993 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
994 * @hw: pointer to hardware structure
996 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
998 return hw->mac.num_rar_entries;
1002 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
1003 * @hw: pointer to hardware structure
1004 * @addr_list: the list of new multicast addresses
1005 * @addr_count: number of addresses
1006 * @func: iterator function to walk the multicast address list
1008 * The given list replaces any existing list. Clears the secondary addrs from
1009 * receive address registers. Uses unused receive address registers for the
1010 * first secondary addresses, and falls back to promiscuous mode as needed.
1012 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
1013 u32 addr_count, ixgbe_mc_addr_itr func)
1015 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
1016 addr_list, addr_count, func),
1017 IXGBE_NOT_IMPLEMENTED);
1021 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
1022 * @hw: pointer to hardware structure
1023 * @mc_addr_list: the list of new multicast addresses
1024 * @mc_addr_count: number of addresses
1025 * @func: iterator function to walk the multicast address list
1027 * The given list replaces any existing list. Clears the MC addrs from receive
1028 * address registers and the multicast table. Uses unused receive address
1029 * registers for the first multicast addresses, and hashes the rest into the
1032 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1033 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1036 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1037 mc_addr_list, mc_addr_count, func, clear),
1038 IXGBE_NOT_IMPLEMENTED);
1042 * ixgbe_enable_mc - Enable multicast address in RAR
1043 * @hw: pointer to hardware structure
1045 * Enables multicast address in RAR and the use of the multicast hash table.
1047 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1049 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1050 IXGBE_NOT_IMPLEMENTED);
1054 * ixgbe_disable_mc - Disable multicast address in RAR
1055 * @hw: pointer to hardware structure
1057 * Disables multicast address in RAR and the use of the multicast hash table.
1059 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1061 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1062 IXGBE_NOT_IMPLEMENTED);
1066 * ixgbe_clear_vfta - Clear VLAN filter table
1067 * @hw: pointer to hardware structure
1069 * Clears the VLAN filer table, and the VMDq index associated with the filter
1071 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1073 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1074 IXGBE_NOT_IMPLEMENTED);
1078 * ixgbe_set_vfta - Set VLAN filter table
1079 * @hw: pointer to hardware structure
1080 * @vlan: VLAN id to write to VLAN filter
1081 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1082 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1084 * Turn on/off specified VLAN in the VLAN filter table.
1086 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1088 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1089 vlan_on), IXGBE_NOT_IMPLEMENTED);
1093 * ixgbe_set_vlvf - Set VLAN Pool Filter
1094 * @hw: pointer to hardware structure
1095 * @vlan: VLAN id to write to VLAN filter
1096 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1097 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1098 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1101 * Turn on/off specified bit in VLVF table.
1103 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1106 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1107 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1111 * ixgbe_fc_enable - Enable flow control
1112 * @hw: pointer to hardware structure
1114 * Configures the flow control settings based on SW configuration.
1116 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1118 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1119 IXGBE_NOT_IMPLEMENTED);
1123 * ixgbe_setup_fc - Set up flow control
1124 * @hw: pointer to hardware structure
1126 * Called at init time to set up flow control.
1128 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1130 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1131 IXGBE_NOT_IMPLEMENTED);
1135 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1136 * @hw: pointer to hardware structure
1137 * @maj: driver major number to be sent to firmware
1138 * @min: driver minor number to be sent to firmware
1139 * @build: driver build number to be sent to firmware
1140 * @ver: driver version number to be sent to firmware
1142 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1145 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1146 build, ver), IXGBE_NOT_IMPLEMENTED);
1151 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1152 * @hw: pointer to hardware structure
1154 * Updates the temperatures in mac.thermal_sensor_data
1156 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1158 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1159 IXGBE_NOT_IMPLEMENTED);
1163 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1164 * @hw: pointer to hardware structure
1166 * Inits the thermal sensor thresholds according to the NVM map
1168 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1170 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1171 IXGBE_NOT_IMPLEMENTED);
1175 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1176 * @hw: pointer to hardware structure
1178 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1179 * When disabling dmac, dmac enable dmac bit is cleared.
1181 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1183 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1184 IXGBE_NOT_IMPLEMENTED);
1188 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1189 * @hw: pointer to hardware structure
1191 * Disables dmac, updates per TC settings, and then enable dmac.
1193 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1195 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1196 IXGBE_NOT_IMPLEMENTED);
1200 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1201 * @hw: pointer to hardware structure
1203 * Configure DMA coalescing threshold per TC and set high priority bit for
1204 * FCOE TC. The dmac enable bit must be cleared before configuring.
1206 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1208 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1209 IXGBE_NOT_IMPLEMENTED);
1213 * ixgbe_setup_eee - Enable/disable EEE support
1214 * @hw: pointer to the HW structure
1215 * @enable_eee: boolean flag to enable EEE
1217 * Enable/disable EEE based on enable_ee flag.
1218 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1222 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1224 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1225 IXGBE_NOT_IMPLEMENTED);
1229 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1230 * @hw: pointer to hardware structure
1231 * @enbale: enable or disable source address pruning
1232 * @pool: Rx pool - Rx pool to toggle source address pruning
1234 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1237 if (hw->mac.ops.set_source_address_pruning)
1238 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1242 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1243 * @hw: pointer to hardware structure
1244 * @enable: enable or disable switch for Ethertype anti-spoofing
1245 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1248 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1250 if (hw->mac.ops.set_ethertype_anti_spoofing)
1251 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1255 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1256 * @hw: pointer to hardware structure
1257 * @reg_addr: 32 bit address of PHY register to read
1258 * @device_type: type of device you want to communicate with
1259 * @phy_data: Pointer to read data from PHY register
1261 * Reads a value from a specified PHY register
1263 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1264 u32 device_type, u32 *phy_data)
1266 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1267 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1271 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1272 * @hw: pointer to hardware structure
1273 * @reg_addr: 32 bit PHY register to write
1274 * @device_type: type of device you want to communicate with
1275 * @phy_data: Data to write to the PHY register
1277 * Writes a value to specified PHY register
1279 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1280 u32 device_type, u32 phy_data)
1282 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1283 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1287 * ixgbe_disable_mdd - Disable malicious driver detection
1288 * @hw: pointer to hardware structure
1291 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1293 if (hw->mac.ops.disable_mdd)
1294 hw->mac.ops.disable_mdd(hw);
1298 * ixgbe_enable_mdd - Enable malicious driver detection
1299 * @hw: pointer to hardware structure
1302 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1304 if (hw->mac.ops.enable_mdd)
1305 hw->mac.ops.enable_mdd(hw);
1309 * ixgbe_mdd_event - Handle malicious driver detection event
1310 * @hw: pointer to hardware structure
1311 * @vf_bitmap: vf bitmap of malicious vfs
1314 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1316 if (hw->mac.ops.mdd_event)
1317 hw->mac.ops.mdd_event(hw, vf_bitmap);
1321 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1323 * @hw: pointer to hardware structure
1327 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1329 if (hw->mac.ops.restore_mdd_vf)
1330 hw->mac.ops.restore_mdd_vf(hw, vf);
1334 * ixgbe_enter_lplu - Transition to low power states
1335 * @hw: pointer to hardware structure
1337 * Configures Low Power Link Up on transition to low power states
1338 * (from D0 to non-D0).
1340 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1342 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1343 IXGBE_NOT_IMPLEMENTED);
1347 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1348 * @hw: pointer to hardware structure
1350 * Handle external Base T PHY interrupt. If high temperature
1351 * failure alarm then return error, else if link status change
1352 * then setup internal/external PHY link
1354 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1355 * failure alarm, else return PHY access status.
1357 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1359 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1360 IXGBE_NOT_IMPLEMENTED);
1364 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1365 * @hw: pointer to hardware structure
1366 * @reg: analog register to read
1369 * Performs write operation to analog register specified.
1371 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1373 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1374 val), IXGBE_NOT_IMPLEMENTED);
1378 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1379 * @hw: pointer to hardware structure
1380 * @reg: analog register to write
1381 * @val: value to write
1383 * Performs write operation to Atlas analog register specified.
1385 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1387 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1388 val), IXGBE_NOT_IMPLEMENTED);
1392 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1393 * @hw: pointer to hardware structure
1395 * Initializes the Unicast Table Arrays to zero on device load. This
1396 * is part of the Rx init addr execution path.
1398 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1400 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1401 IXGBE_NOT_IMPLEMENTED);
1405 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1406 * @hw: pointer to hardware structure
1407 * @byte_offset: byte offset to read
1408 * @dev_addr: I2C bus address to read from
1411 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1413 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1416 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1417 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1421 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1422 * @hw: pointer to hardware structure
1423 * @byte_offset: byte offset to read
1424 * @dev_addr: I2C bus address to read from
1427 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1429 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1430 u8 dev_addr, u8 *data)
1432 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1433 (hw, byte_offset, dev_addr, data),
1434 IXGBE_NOT_IMPLEMENTED);
1438 * ixgbe_read_link - Perform read operation on link device
1439 * @hw: pointer to the hardware structure
1440 * @addr: bus address to read from
1441 * @reg: device register to read from
1442 * @val: pointer to location to receive read value
1444 * Returns an error code on error.
1446 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1448 return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
1449 reg, val), IXGBE_NOT_IMPLEMENTED);
1453 * ixgbe_read_link_unlocked - Perform read operation on link device
1454 * @hw: pointer to the hardware structure
1455 * @addr: bus address to read from
1456 * @reg: device register to read from
1457 * @val: pointer to location to receive read value
1459 * Returns an error code on error.
1461 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1463 return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
1464 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1468 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1469 * @hw: pointer to hardware structure
1470 * @byte_offset: byte offset to write
1471 * @dev_addr: I2C bus address to write to
1472 * @data: value to write
1474 * Performs byte write operation to SFP module's EEPROM over I2C interface
1475 * at a specified device address.
1477 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1480 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1481 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1485 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1486 * @hw: pointer to hardware structure
1487 * @byte_offset: byte offset to write
1488 * @dev_addr: I2C bus address to write to
1489 * @data: value to write
1491 * Performs byte write operation to SFP module's EEPROM over I2C interface
1492 * at a specified device address.
1494 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1495 u8 dev_addr, u8 data)
1497 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1498 (hw, byte_offset, dev_addr, data),
1499 IXGBE_NOT_IMPLEMENTED);
1503 * ixgbe_write_link - Perform write operation on link device
1504 * @hw: pointer to the hardware structure
1505 * @addr: bus address to write to
1506 * @reg: device register to write to
1507 * @val: value to write
1509 * Returns an error code on error.
1511 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1513 return ixgbe_call_func(hw, hw->link.ops.write_link,
1514 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1518 * ixgbe_write_link_unlocked - Perform write operation on link device
1519 * @hw: pointer to the hardware structure
1520 * @addr: bus address to write to
1521 * @reg: device register to write to
1522 * @val: value to write
1524 * Returns an error code on error.
1526 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1528 return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
1529 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1533 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1534 * @hw: pointer to hardware structure
1535 * @byte_offset: EEPROM byte offset to write
1536 * @eeprom_data: value to write
1538 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1540 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1541 u8 byte_offset, u8 eeprom_data)
1543 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1544 (hw, byte_offset, eeprom_data),
1545 IXGBE_NOT_IMPLEMENTED);
1549 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1550 * @hw: pointer to hardware structure
1551 * @byte_offset: EEPROM byte offset to read
1552 * @eeprom_data: value read
1554 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1556 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1558 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1559 (hw, byte_offset, eeprom_data),
1560 IXGBE_NOT_IMPLEMENTED);
1564 * ixgbe_get_supported_physical_layer - Returns physical layer type
1565 * @hw: pointer to hardware structure
1567 * Determines physical layer capabilities of the current configuration.
1569 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1571 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1572 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1576 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1577 * @hw: pointer to hardware structure
1578 * @regval: bitfield to write to the Rx DMA register
1580 * Enables the Rx DMA unit of the device.
1582 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1584 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1585 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1589 * ixgbe_disable_sec_rx_path - Stops the receive data path
1590 * @hw: pointer to hardware structure
1592 * Stops the receive data path.
1594 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1596 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1597 (hw), IXGBE_NOT_IMPLEMENTED);
1601 * ixgbe_enable_sec_rx_path - Enables the receive data path
1602 * @hw: pointer to hardware structure
1604 * Enables the receive data path.
1606 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1608 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1609 (hw), IXGBE_NOT_IMPLEMENTED);
1613 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1614 * @hw: pointer to hardware structure
1615 * @mask: Mask to specify which semaphore to acquire
1617 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1618 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1620 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1622 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1623 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1627 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1628 * @hw: pointer to hardware structure
1629 * @mask: Mask to specify which semaphore to release
1631 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1632 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1634 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1636 if (hw->mac.ops.release_swfw_sync)
1637 hw->mac.ops.release_swfw_sync(hw, mask);
1641 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1643 if (hw->mac.ops.disable_rx)
1644 hw->mac.ops.disable_rx(hw);
1647 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1649 if (hw->mac.ops.enable_rx)
1650 hw->mac.ops.enable_rx(hw);
1654 * ixgbe_set_rate_select_speed - Set module link speed
1655 * @hw: pointer to hardware structure
1656 * @speed: link speed to set
1658 * Set module link speed via the rate select.
1660 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1662 if (hw->mac.ops.set_rate_select_speed)
1663 hw->mac.ops.set_rate_select_speed(hw, speed);