1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
37 #define IXGBE_EMPTY_PARAM
39 static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
40 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
43 static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
44 IXGBE_MVALS_INIT(_X540)
47 static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
48 IXGBE_MVALS_INIT(_X550)
51 static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
52 IXGBE_MVALS_INIT(_X550EM_x)
55 static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
56 IXGBE_MVALS_INIT(_X550EM_a)
60 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
61 * @hw: pointer to hardware structure
62 * @map: pointer to u8 arr for returning map
64 * Read the rtrup2tc HW register and resolve its content into map
66 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
68 if (hw->mac.ops.get_rtrup2tc)
69 hw->mac.ops.get_rtrup2tc(hw, map);
73 * ixgbe_init_shared_code - Initialize the shared code
74 * @hw: pointer to hardware structure
76 * This will assign function pointers and assign the MAC type and PHY code.
77 * Does not touch the hardware. This function must be called prior to any
78 * other function in the shared code. The ixgbe_hw structure should be
79 * memset to 0 prior to calling this function. The following fields in
80 * hw structure should be filled in prior to calling this function:
81 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
82 * subsystem_vendor_id, and revision_id
84 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
88 DEBUGFUNC("ixgbe_init_shared_code");
93 ixgbe_set_mac_type(hw);
95 switch (hw->mac.type) {
96 case ixgbe_mac_82598EB:
97 status = ixgbe_init_ops_82598(hw);
99 case ixgbe_mac_82599EB:
100 status = ixgbe_init_ops_82599(hw);
103 status = ixgbe_init_ops_X540(hw);
106 status = ixgbe_init_ops_X550(hw);
108 case ixgbe_mac_X550EM_x:
109 case ixgbe_mac_X550EM_a:
110 status = ixgbe_init_ops_X550EM(hw);
112 case ixgbe_mac_82599_vf:
113 case ixgbe_mac_X540_vf:
114 case ixgbe_mac_X550_vf:
115 case ixgbe_mac_X550EM_x_vf:
116 case ixgbe_mac_X550EM_a_vf:
117 status = ixgbe_init_ops_vf(hw);
120 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
123 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
129 * ixgbe_set_mac_type - Sets MAC type
130 * @hw: pointer to the HW structure
132 * This function sets the mac type of the adapter based on the
133 * vendor ID and device ID stored in the hw structure.
135 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
137 s32 ret_val = IXGBE_SUCCESS;
139 DEBUGFUNC("ixgbe_set_mac_type\n");
141 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
142 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
143 "Unsupported vendor id: %x", hw->vendor_id);
144 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
147 hw->mvals = ixgbe_mvals_base;
149 switch (hw->device_id) {
150 case IXGBE_DEV_ID_82598:
151 case IXGBE_DEV_ID_82598_BX:
152 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
153 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
154 case IXGBE_DEV_ID_82598AT:
155 case IXGBE_DEV_ID_82598AT2:
156 case IXGBE_DEV_ID_82598EB_CX4:
157 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
158 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
159 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
160 case IXGBE_DEV_ID_82598EB_XF_LR:
161 case IXGBE_DEV_ID_82598EB_SFP_LOM:
162 hw->mac.type = ixgbe_mac_82598EB;
164 case IXGBE_DEV_ID_82599_KX4:
165 case IXGBE_DEV_ID_82599_KX4_MEZZ:
166 case IXGBE_DEV_ID_82599_XAUI_LOM:
167 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
168 case IXGBE_DEV_ID_82599_KR:
169 case IXGBE_DEV_ID_82599_SFP:
170 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
171 case IXGBE_DEV_ID_82599_SFP_FCOE:
172 case IXGBE_DEV_ID_82599_SFP_EM:
173 case IXGBE_DEV_ID_82599_SFP_SF2:
174 case IXGBE_DEV_ID_82599_SFP_SF_QP:
175 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
176 case IXGBE_DEV_ID_82599EN_SFP:
177 case IXGBE_DEV_ID_82599_CX4:
178 case IXGBE_DEV_ID_82599_LS:
179 case IXGBE_DEV_ID_82599_T3_LOM:
180 hw->mac.type = ixgbe_mac_82599EB;
182 case IXGBE_DEV_ID_82599_VF:
183 case IXGBE_DEV_ID_82599_VF_HV:
184 hw->mac.type = ixgbe_mac_82599_vf;
186 case IXGBE_DEV_ID_X540_VF:
187 case IXGBE_DEV_ID_X540_VF_HV:
188 hw->mac.type = ixgbe_mac_X540_vf;
189 hw->mvals = ixgbe_mvals_X540;
191 case IXGBE_DEV_ID_X540T:
192 case IXGBE_DEV_ID_X540T1:
193 hw->mac.type = ixgbe_mac_X540;
194 hw->mvals = ixgbe_mvals_X540;
196 case IXGBE_DEV_ID_X550T:
197 case IXGBE_DEV_ID_X550T1:
198 hw->mac.type = ixgbe_mac_X550;
199 hw->mvals = ixgbe_mvals_X550;
201 case IXGBE_DEV_ID_X550EM_X_KX4:
202 case IXGBE_DEV_ID_X550EM_X_KR:
203 case IXGBE_DEV_ID_X550EM_X_10G_T:
204 case IXGBE_DEV_ID_X550EM_X_1G_T:
205 case IXGBE_DEV_ID_X550EM_X_SFP:
206 hw->mac.type = ixgbe_mac_X550EM_x;
207 hw->mvals = ixgbe_mvals_X550EM_x;
209 case IXGBE_DEV_ID_X550EM_A_KR:
210 case IXGBE_DEV_ID_X550EM_A_KR_L:
211 case IXGBE_DEV_ID_X550EM_A_SFP_N:
212 case IXGBE_DEV_ID_X550EM_A_SGMII:
213 case IXGBE_DEV_ID_X550EM_A_SGMII_L:
214 case IXGBE_DEV_ID_X550EM_A_1G_T:
215 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
216 case IXGBE_DEV_ID_X550EM_A_10G_T:
217 case IXGBE_DEV_ID_X550EM_A_QSFP:
218 case IXGBE_DEV_ID_X550EM_A_QSFP_N:
219 case IXGBE_DEV_ID_X550EM_A_SFP:
220 hw->mac.type = ixgbe_mac_X550EM_a;
221 hw->mvals = ixgbe_mvals_X550EM_a;
223 case IXGBE_DEV_ID_X550_VF:
224 case IXGBE_DEV_ID_X550_VF_HV:
225 hw->mac.type = ixgbe_mac_X550_vf;
226 hw->mvals = ixgbe_mvals_X550;
228 case IXGBE_DEV_ID_X550EM_X_VF:
229 case IXGBE_DEV_ID_X550EM_X_VF_HV:
230 hw->mac.type = ixgbe_mac_X550EM_x_vf;
231 hw->mvals = ixgbe_mvals_X550EM_x;
233 case IXGBE_DEV_ID_X550EM_A_VF:
234 case IXGBE_DEV_ID_X550EM_A_VF_HV:
235 hw->mac.type = ixgbe_mac_X550EM_a_vf;
236 hw->mvals = ixgbe_mvals_X550EM_a;
239 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
240 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
241 "Unsupported device id: %x",
246 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
247 hw->mac.type, ret_val);
252 * ixgbe_init_hw - Initialize the hardware
253 * @hw: pointer to hardware structure
255 * Initialize the hardware by resetting and then starting the hardware
257 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
259 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
260 IXGBE_NOT_IMPLEMENTED);
264 * ixgbe_reset_hw - Performs a hardware reset
265 * @hw: pointer to hardware structure
267 * Resets the hardware by resetting the transmit and receive units, masks and
268 * clears all interrupts, performs a PHY reset, and performs a MAC reset
270 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
272 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
273 IXGBE_NOT_IMPLEMENTED);
277 * ixgbe_start_hw - Prepares hardware for Rx/Tx
278 * @hw: pointer to hardware structure
280 * Starts the hardware by filling the bus info structure and media type,
281 * clears all on chip counters, initializes receive address registers,
282 * multicast table, VLAN filter table, calls routine to setup link and
283 * flow control settings, and leaves transmit and receive units disabled
286 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
288 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
289 IXGBE_NOT_IMPLEMENTED);
293 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
294 * which is disabled by default in ixgbe_start_hw();
296 * @hw: pointer to hardware structure
298 * Enable relaxed ordering;
300 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
302 if (hw->mac.ops.enable_relaxed_ordering)
303 hw->mac.ops.enable_relaxed_ordering(hw);
307 * ixgbe_clear_hw_cntrs - Clear hardware counters
308 * @hw: pointer to hardware structure
310 * Clears all hardware statistics counters by reading them from the hardware
311 * Statistics counters are clear on read.
313 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
315 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
316 IXGBE_NOT_IMPLEMENTED);
320 * ixgbe_get_media_type - Get media type
321 * @hw: pointer to hardware structure
323 * Returns the media type (fiber, copper, backplane)
325 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
327 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
328 ixgbe_media_type_unknown);
332 * ixgbe_get_mac_addr - Get MAC address
333 * @hw: pointer to hardware structure
334 * @mac_addr: Adapter MAC address
336 * Reads the adapter's MAC address from the first Receive Address Register
337 * (RAR0) A reset of the adapter must have been performed prior to calling
338 * this function in order for the MAC address to have been loaded from the
341 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
343 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
344 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
348 * ixgbe_get_san_mac_addr - Get SAN MAC address
349 * @hw: pointer to hardware structure
350 * @san_mac_addr: SAN MAC address
352 * Reads the SAN MAC address from the EEPROM, if it's available. This is
353 * per-port, so set_lan_id() must be called before reading the addresses.
355 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
357 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
358 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
362 * ixgbe_set_san_mac_addr - Write a SAN MAC address
363 * @hw: pointer to hardware structure
364 * @san_mac_addr: SAN MAC address
366 * Writes A SAN MAC address to the EEPROM.
368 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
370 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
371 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
375 * ixgbe_get_device_caps - Get additional device capabilities
376 * @hw: pointer to hardware structure
377 * @device_caps: the EEPROM word for device capabilities
379 * Reads the extra device capabilities from the EEPROM
381 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
383 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
384 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
388 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
389 * @hw: pointer to hardware structure
390 * @wwnn_prefix: the alternative WWNN prefix
391 * @wwpn_prefix: the alternative WWPN prefix
393 * This function will read the EEPROM from the alternative SAN MAC address
394 * block to check the support for the alternative WWNN/WWPN prefix support.
396 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
399 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
400 (hw, wwnn_prefix, wwpn_prefix),
401 IXGBE_NOT_IMPLEMENTED);
405 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
406 * @hw: pointer to hardware structure
407 * @bs: the fcoe boot status
409 * This function will read the FCOE boot status from the iSCSI FCOE block
411 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
413 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
415 IXGBE_NOT_IMPLEMENTED);
419 * ixgbe_get_bus_info - Set PCI bus info
420 * @hw: pointer to hardware structure
422 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
424 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
426 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
427 IXGBE_NOT_IMPLEMENTED);
431 * ixgbe_get_num_of_tx_queues - Get Tx queues
432 * @hw: pointer to hardware structure
434 * Returns the number of transmit queues for the given adapter.
436 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
438 return hw->mac.max_tx_queues;
442 * ixgbe_get_num_of_rx_queues - Get Rx queues
443 * @hw: pointer to hardware structure
445 * Returns the number of receive queues for the given adapter.
447 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
449 return hw->mac.max_rx_queues;
453 * ixgbe_stop_adapter - Disable Rx/Tx units
454 * @hw: pointer to hardware structure
456 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
457 * disables transmit and receive units. The adapter_stopped flag is used by
458 * the shared code and drivers to determine if the adapter is in a stopped
459 * state and should not touch the hardware.
461 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
463 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
464 IXGBE_NOT_IMPLEMENTED);
468 * ixgbe_read_pba_string - Reads part number string from EEPROM
469 * @hw: pointer to hardware structure
470 * @pba_num: stores the part number string from the EEPROM
471 * @pba_num_size: part number string buffer length
473 * Reads the part number string from the EEPROM.
475 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
477 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
481 * ixgbe_read_pba_num - Reads part number from EEPROM
482 * @hw: pointer to hardware structure
483 * @pba_num: stores the part number from the EEPROM
485 * Reads the part number from the EEPROM.
487 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
489 return ixgbe_read_pba_num_generic(hw, pba_num);
493 * ixgbe_identify_phy - Get PHY type
494 * @hw: pointer to hardware structure
496 * Determines the physical layer module found on the current adapter.
498 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
500 s32 status = IXGBE_SUCCESS;
502 if (hw->phy.type == ixgbe_phy_unknown) {
503 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
504 IXGBE_NOT_IMPLEMENTED);
511 * ixgbe_reset_phy - Perform a PHY reset
512 * @hw: pointer to hardware structure
514 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
516 s32 status = IXGBE_SUCCESS;
518 if (hw->phy.type == ixgbe_phy_unknown) {
519 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
520 status = IXGBE_ERR_PHY;
523 if (status == IXGBE_SUCCESS) {
524 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
525 IXGBE_NOT_IMPLEMENTED);
531 * ixgbe_get_phy_firmware_version -
532 * @hw: pointer to hardware structure
533 * @firmware_version: pointer to firmware version
535 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
537 s32 status = IXGBE_SUCCESS;
539 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
540 (hw, firmware_version),
541 IXGBE_NOT_IMPLEMENTED);
546 * ixgbe_read_phy_reg - Read PHY register
547 * @hw: pointer to hardware structure
548 * @reg_addr: 32 bit address of PHY register to read
549 * @phy_data: Pointer to read data from PHY register
551 * Reads a value from a specified PHY register
553 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
557 ixgbe_identify_phy(hw);
559 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
560 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
564 * ixgbe_write_phy_reg - Write PHY register
565 * @hw: pointer to hardware structure
566 * @reg_addr: 32 bit PHY register to write
567 * @phy_data: Data to write to the PHY register
569 * Writes a value to specified PHY register
571 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
575 ixgbe_identify_phy(hw);
577 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
578 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
582 * ixgbe_setup_phy_link - Restart PHY autoneg
583 * @hw: pointer to hardware structure
585 * Restart autonegotiation and PHY and waits for completion.
587 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
589 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
590 IXGBE_NOT_IMPLEMENTED);
594 * ixgbe_setup_internal_phy - Configure integrated PHY
595 * @hw: pointer to hardware structure
597 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
598 * Returns success if not implemented, since nothing needs to be done in this
601 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
603 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
608 * ixgbe_check_phy_link - Determine link and speed status
609 * @hw: pointer to hardware structure
611 * Reads a PHY register to determine if link is up and the current speed for
614 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
617 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
618 link_up), IXGBE_NOT_IMPLEMENTED);
622 * ixgbe_setup_phy_link_speed - Set auto advertise
623 * @hw: pointer to hardware structure
624 * @speed: new link speed
626 * Sets the auto advertised capabilities
628 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
629 bool autoneg_wait_to_complete)
631 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
632 autoneg_wait_to_complete),
633 IXGBE_NOT_IMPLEMENTED);
637 * ixgbe_set_phy_power - Control the phy power state
638 * @hw: pointer to hardware structure
639 * @on: true for on, false for off
641 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
643 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
644 IXGBE_NOT_IMPLEMENTED);
648 * ixgbe_check_link - Get link and speed status
649 * @hw: pointer to hardware structure
651 * Reads the links register to determine if link is up and the current speed
653 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
654 bool *link_up, bool link_up_wait_to_complete)
656 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
657 link_up, link_up_wait_to_complete),
658 IXGBE_NOT_IMPLEMENTED);
662 * ixgbe_disable_tx_laser - Disable Tx laser
663 * @hw: pointer to hardware structure
665 * If the driver needs to disable the laser on SFI optics.
667 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
669 if (hw->mac.ops.disable_tx_laser)
670 hw->mac.ops.disable_tx_laser(hw);
674 * ixgbe_enable_tx_laser - Enable Tx laser
675 * @hw: pointer to hardware structure
677 * If the driver needs to enable the laser on SFI optics.
679 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
681 if (hw->mac.ops.enable_tx_laser)
682 hw->mac.ops.enable_tx_laser(hw);
686 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
687 * @hw: pointer to hardware structure
689 * When the driver changes the link speeds that it can support then
690 * flap the tx laser to alert the link partner to start autotry
691 * process on its end.
693 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
695 if (hw->mac.ops.flap_tx_laser)
696 hw->mac.ops.flap_tx_laser(hw);
700 * ixgbe_setup_link - Set link speed
701 * @hw: pointer to hardware structure
702 * @speed: new link speed
704 * Configures link settings. Restarts the link.
705 * Performs autonegotiation if needed.
707 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
708 bool autoneg_wait_to_complete)
710 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
711 autoneg_wait_to_complete),
712 IXGBE_NOT_IMPLEMENTED);
716 * ixgbe_setup_mac_link - Set link speed
717 * @hw: pointer to hardware structure
718 * @speed: new link speed
720 * Configures link settings. Restarts the link.
721 * Performs autonegotiation if needed.
723 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
724 bool autoneg_wait_to_complete)
726 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
727 autoneg_wait_to_complete),
728 IXGBE_NOT_IMPLEMENTED);
732 * ixgbe_get_link_capabilities - Returns link capabilities
733 * @hw: pointer to hardware structure
735 * Determines the link capabilities of the current configuration.
737 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
740 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
741 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
745 * ixgbe_led_on - Turn on LEDs
746 * @hw: pointer to hardware structure
747 * @index: led number to turn on
749 * Turns on the software controllable LEDs.
751 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
753 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
754 IXGBE_NOT_IMPLEMENTED);
758 * ixgbe_led_off - Turn off LEDs
759 * @hw: pointer to hardware structure
760 * @index: led number to turn off
762 * Turns off the software controllable LEDs.
764 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
766 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
767 IXGBE_NOT_IMPLEMENTED);
771 * ixgbe_blink_led_start - Blink LEDs
772 * @hw: pointer to hardware structure
773 * @index: led number to blink
775 * Blink LED based on index.
777 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
779 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
780 IXGBE_NOT_IMPLEMENTED);
784 * ixgbe_blink_led_stop - Stop blinking LEDs
785 * @hw: pointer to hardware structure
787 * Stop blinking LED based on index.
789 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
791 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
792 IXGBE_NOT_IMPLEMENTED);
796 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
797 * @hw: pointer to hardware structure
799 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
800 * ixgbe_hw struct in order to set up EEPROM access.
802 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
804 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
805 IXGBE_NOT_IMPLEMENTED);
810 * ixgbe_write_eeprom - Write word to EEPROM
811 * @hw: pointer to hardware structure
812 * @offset: offset within the EEPROM to be written to
813 * @data: 16 bit word to be written to the EEPROM
815 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
816 * called after this function, the EEPROM will most likely contain an
819 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
821 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
822 IXGBE_NOT_IMPLEMENTED);
826 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
827 * @hw: pointer to hardware structure
828 * @offset: offset within the EEPROM to be written to
829 * @data: 16 bit word(s) to be written to the EEPROM
830 * @words: number of words
832 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
833 * called after this function, the EEPROM will most likely contain an
836 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
839 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
840 (hw, offset, words, data),
841 IXGBE_NOT_IMPLEMENTED);
845 * ixgbe_read_eeprom - Read word from EEPROM
846 * @hw: pointer to hardware structure
847 * @offset: offset within the EEPROM to be read
848 * @data: read 16 bit value from EEPROM
850 * Reads 16 bit value from EEPROM
852 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
854 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
855 IXGBE_NOT_IMPLEMENTED);
859 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
860 * @hw: pointer to hardware structure
861 * @offset: offset within the EEPROM to be read
862 * @data: read 16 bit word(s) from EEPROM
863 * @words: number of words
865 * Reads 16 bit word(s) from EEPROM
867 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
868 u16 words, u16 *data)
870 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
871 (hw, offset, words, data),
872 IXGBE_NOT_IMPLEMENTED);
876 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
877 * @hw: pointer to hardware structure
878 * @checksum_val: calculated checksum
880 * Performs checksum calculation and validates the EEPROM checksum
882 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
884 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
885 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
889 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
890 * @hw: pointer to hardware structure
892 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
894 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
895 IXGBE_NOT_IMPLEMENTED);
899 * ixgbe_insert_mac_addr - Find a RAR for this mac address
900 * @hw: pointer to hardware structure
901 * @addr: Address to put into receive address register
902 * @vmdq: VMDq pool to assign
904 * Puts an ethernet address into a receive address register, or
905 * finds the rar that it is aleady in; adds to the pool list
907 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
909 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
911 IXGBE_NOT_IMPLEMENTED);
915 * ixgbe_set_rar - Set Rx address register
916 * @hw: pointer to hardware structure
917 * @index: Receive address register to write
918 * @addr: Address to put into receive address register
920 * @enable_addr: set flag that address is active
922 * Puts an ethernet address into a receive address register.
924 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
927 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
928 enable_addr), IXGBE_NOT_IMPLEMENTED);
932 * ixgbe_clear_rar - Clear Rx address register
933 * @hw: pointer to hardware structure
934 * @index: Receive address register to write
936 * Puts an ethernet address into a receive address register.
938 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
940 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
941 IXGBE_NOT_IMPLEMENTED);
945 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
946 * @hw: pointer to hardware structure
947 * @rar: receive address register index to associate with VMDq index
948 * @vmdq: VMDq set or pool index
950 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
952 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
953 IXGBE_NOT_IMPLEMENTED);
958 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
959 * @hw: pointer to hardware structure
960 * @vmdq: VMDq default pool index
962 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
964 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
965 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
969 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
970 * @hw: pointer to hardware structure
971 * @rar: receive address register index to disassociate with VMDq index
972 * @vmdq: VMDq set or pool index
974 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
976 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
977 IXGBE_NOT_IMPLEMENTED);
981 * ixgbe_init_rx_addrs - Initializes receive address filters.
982 * @hw: pointer to hardware structure
984 * Places the MAC address in receive address register 0 and clears the rest
985 * of the receive address registers. Clears the multicast table. Assumes
986 * the receiver is in reset when the routine is called.
988 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
990 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
991 IXGBE_NOT_IMPLEMENTED);
995 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
996 * @hw: pointer to hardware structure
998 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
1000 return hw->mac.num_rar_entries;
1004 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
1005 * @hw: pointer to hardware structure
1006 * @addr_list: the list of new multicast addresses
1007 * @addr_count: number of addresses
1008 * @func: iterator function to walk the multicast address list
1010 * The given list replaces any existing list. Clears the secondary addrs from
1011 * receive address registers. Uses unused receive address registers for the
1012 * first secondary addresses, and falls back to promiscuous mode as needed.
1014 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
1015 u32 addr_count, ixgbe_mc_addr_itr func)
1017 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
1018 addr_list, addr_count, func),
1019 IXGBE_NOT_IMPLEMENTED);
1023 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
1024 * @hw: pointer to hardware structure
1025 * @mc_addr_list: the list of new multicast addresses
1026 * @mc_addr_count: number of addresses
1027 * @func: iterator function to walk the multicast address list
1029 * The given list replaces any existing list. Clears the MC addrs from receive
1030 * address registers and the multicast table. Uses unused receive address
1031 * registers for the first multicast addresses, and hashes the rest into the
1034 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1035 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1038 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1039 mc_addr_list, mc_addr_count, func, clear),
1040 IXGBE_NOT_IMPLEMENTED);
1044 * ixgbe_enable_mc - Enable multicast address in RAR
1045 * @hw: pointer to hardware structure
1047 * Enables multicast address in RAR and the use of the multicast hash table.
1049 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1051 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1052 IXGBE_NOT_IMPLEMENTED);
1056 * ixgbe_disable_mc - Disable multicast address in RAR
1057 * @hw: pointer to hardware structure
1059 * Disables multicast address in RAR and the use of the multicast hash table.
1061 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1063 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1064 IXGBE_NOT_IMPLEMENTED);
1068 * ixgbe_clear_vfta - Clear VLAN filter table
1069 * @hw: pointer to hardware structure
1071 * Clears the VLAN filer table, and the VMDq index associated with the filter
1073 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1075 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1076 IXGBE_NOT_IMPLEMENTED);
1080 * ixgbe_set_vfta - Set VLAN filter table
1081 * @hw: pointer to hardware structure
1082 * @vlan: VLAN id to write to VLAN filter
1083 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1084 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1086 * Turn on/off specified VLAN in the VLAN filter table.
1088 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1090 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1091 vlan_on), IXGBE_NOT_IMPLEMENTED);
1095 * ixgbe_set_vlvf - Set VLAN Pool Filter
1096 * @hw: pointer to hardware structure
1097 * @vlan: VLAN id to write to VLAN filter
1098 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1099 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1100 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1103 * Turn on/off specified bit in VLVF table.
1105 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1108 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1109 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1113 * ixgbe_fc_enable - Enable flow control
1114 * @hw: pointer to hardware structure
1116 * Configures the flow control settings based on SW configuration.
1118 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1120 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1121 IXGBE_NOT_IMPLEMENTED);
1125 * ixgbe_setup_fc - Set up flow control
1126 * @hw: pointer to hardware structure
1128 * Called at init time to set up flow control.
1130 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1132 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1133 IXGBE_NOT_IMPLEMENTED);
1137 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1138 * @hw: pointer to hardware structure
1139 * @maj: driver major number to be sent to firmware
1140 * @min: driver minor number to be sent to firmware
1141 * @build: driver build number to be sent to firmware
1142 * @ver: driver version number to be sent to firmware
1144 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1147 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1148 build, ver), IXGBE_NOT_IMPLEMENTED);
1153 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1154 * @hw: pointer to hardware structure
1156 * Updates the temperatures in mac.thermal_sensor_data
1158 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1160 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1161 IXGBE_NOT_IMPLEMENTED);
1165 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1166 * @hw: pointer to hardware structure
1168 * Inits the thermal sensor thresholds according to the NVM map
1170 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1172 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1173 IXGBE_NOT_IMPLEMENTED);
1177 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1178 * @hw: pointer to hardware structure
1180 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1181 * When disabling dmac, dmac enable dmac bit is cleared.
1183 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1185 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1186 IXGBE_NOT_IMPLEMENTED);
1190 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1191 * @hw: pointer to hardware structure
1193 * Disables dmac, updates per TC settings, and then enable dmac.
1195 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1197 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1198 IXGBE_NOT_IMPLEMENTED);
1202 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1203 * @hw: pointer to hardware structure
1205 * Configure DMA coalescing threshold per TC and set high priority bit for
1206 * FCOE TC. The dmac enable bit must be cleared before configuring.
1208 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1210 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1211 IXGBE_NOT_IMPLEMENTED);
1215 * ixgbe_setup_eee - Enable/disable EEE support
1216 * @hw: pointer to the HW structure
1217 * @enable_eee: boolean flag to enable EEE
1219 * Enable/disable EEE based on enable_ee flag.
1220 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1224 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1226 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1227 IXGBE_NOT_IMPLEMENTED);
1231 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1232 * @hw: pointer to hardware structure
1233 * @enbale: enable or disable source address pruning
1234 * @pool: Rx pool - Rx pool to toggle source address pruning
1236 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1239 if (hw->mac.ops.set_source_address_pruning)
1240 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1244 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1245 * @hw: pointer to hardware structure
1246 * @enable: enable or disable switch for Ethertype anti-spoofing
1247 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1250 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1252 if (hw->mac.ops.set_ethertype_anti_spoofing)
1253 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1257 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1258 * @hw: pointer to hardware structure
1259 * @reg_addr: 32 bit address of PHY register to read
1260 * @device_type: type of device you want to communicate with
1261 * @phy_data: Pointer to read data from PHY register
1263 * Reads a value from a specified PHY register
1265 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1266 u32 device_type, u32 *phy_data)
1268 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1269 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1273 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1274 * @hw: pointer to hardware structure
1275 * @reg_addr: 32 bit PHY register to write
1276 * @device_type: type of device you want to communicate with
1277 * @phy_data: Data to write to the PHY register
1279 * Writes a value to specified PHY register
1281 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1282 u32 device_type, u32 phy_data)
1284 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1285 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1289 * ixgbe_disable_mdd - Disable malicious driver detection
1290 * @hw: pointer to hardware structure
1293 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1295 if (hw->mac.ops.disable_mdd)
1296 hw->mac.ops.disable_mdd(hw);
1300 * ixgbe_enable_mdd - Enable malicious driver detection
1301 * @hw: pointer to hardware structure
1304 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1306 if (hw->mac.ops.enable_mdd)
1307 hw->mac.ops.enable_mdd(hw);
1311 * ixgbe_mdd_event - Handle malicious driver detection event
1312 * @hw: pointer to hardware structure
1313 * @vf_bitmap: vf bitmap of malicious vfs
1316 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1318 if (hw->mac.ops.mdd_event)
1319 hw->mac.ops.mdd_event(hw, vf_bitmap);
1323 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1325 * @hw: pointer to hardware structure
1329 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1331 if (hw->mac.ops.restore_mdd_vf)
1332 hw->mac.ops.restore_mdd_vf(hw, vf);
1336 * ixgbe_enter_lplu - Transition to low power states
1337 * @hw: pointer to hardware structure
1339 * Configures Low Power Link Up on transition to low power states
1340 * (from D0 to non-D0).
1342 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1344 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1345 IXGBE_NOT_IMPLEMENTED);
1349 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1350 * @hw: pointer to hardware structure
1352 * Handle external Base T PHY interrupt. If high temperature
1353 * failure alarm then return error, else if link status change
1354 * then setup internal/external PHY link
1356 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1357 * failure alarm, else return PHY access status.
1359 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1361 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1362 IXGBE_NOT_IMPLEMENTED);
1366 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1367 * @hw: pointer to hardware structure
1368 * @reg: analog register to read
1371 * Performs write operation to analog register specified.
1373 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1375 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1376 val), IXGBE_NOT_IMPLEMENTED);
1380 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1381 * @hw: pointer to hardware structure
1382 * @reg: analog register to write
1383 * @val: value to write
1385 * Performs write operation to Atlas analog register specified.
1387 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1389 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1390 val), IXGBE_NOT_IMPLEMENTED);
1394 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1395 * @hw: pointer to hardware structure
1397 * Initializes the Unicast Table Arrays to zero on device load. This
1398 * is part of the Rx init addr execution path.
1400 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1402 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1403 IXGBE_NOT_IMPLEMENTED);
1407 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1408 * @hw: pointer to hardware structure
1409 * @byte_offset: byte offset to read
1410 * @dev_addr: I2C bus address to read from
1413 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1415 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1418 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1419 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1423 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1424 * @hw: pointer to hardware structure
1425 * @byte_offset: byte offset to read
1426 * @dev_addr: I2C bus address to read from
1429 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1431 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1432 u8 dev_addr, u8 *data)
1434 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1435 (hw, byte_offset, dev_addr, data),
1436 IXGBE_NOT_IMPLEMENTED);
1440 * ixgbe_read_link - Perform read operation on link device
1441 * @hw: pointer to the hardware structure
1442 * @addr: bus address to read from
1443 * @reg: device register to read from
1444 * @val: pointer to location to receive read value
1446 * Returns an error code on error.
1448 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1450 return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
1451 reg, val), IXGBE_NOT_IMPLEMENTED);
1455 * ixgbe_read_link_unlocked - Perform read operation on link device
1456 * @hw: pointer to the hardware structure
1457 * @addr: bus address to read from
1458 * @reg: device register to read from
1459 * @val: pointer to location to receive read value
1461 * Returns an error code on error.
1463 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1465 return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
1466 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1470 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1471 * @hw: pointer to hardware structure
1472 * @byte_offset: byte offset to write
1473 * @dev_addr: I2C bus address to write to
1474 * @data: value to write
1476 * Performs byte write operation to SFP module's EEPROM over I2C interface
1477 * at a specified device address.
1479 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1482 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1483 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1487 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1488 * @hw: pointer to hardware structure
1489 * @byte_offset: byte offset to write
1490 * @dev_addr: I2C bus address to write to
1491 * @data: value to write
1493 * Performs byte write operation to SFP module's EEPROM over I2C interface
1494 * at a specified device address.
1496 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1497 u8 dev_addr, u8 data)
1499 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1500 (hw, byte_offset, dev_addr, data),
1501 IXGBE_NOT_IMPLEMENTED);
1505 * ixgbe_write_link - Perform write operation on link device
1506 * @hw: pointer to the hardware structure
1507 * @addr: bus address to write to
1508 * @reg: device register to write to
1509 * @val: value to write
1511 * Returns an error code on error.
1513 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1515 return ixgbe_call_func(hw, hw->link.ops.write_link,
1516 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1520 * ixgbe_write_link_unlocked - Perform write operation on link device
1521 * @hw: pointer to the hardware structure
1522 * @addr: bus address to write to
1523 * @reg: device register to write to
1524 * @val: value to write
1526 * Returns an error code on error.
1528 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1530 return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
1531 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1535 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1536 * @hw: pointer to hardware structure
1537 * @byte_offset: EEPROM byte offset to write
1538 * @eeprom_data: value to write
1540 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1542 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1543 u8 byte_offset, u8 eeprom_data)
1545 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1546 (hw, byte_offset, eeprom_data),
1547 IXGBE_NOT_IMPLEMENTED);
1551 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1552 * @hw: pointer to hardware structure
1553 * @byte_offset: EEPROM byte offset to read
1554 * @eeprom_data: value read
1556 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1558 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1560 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1561 (hw, byte_offset, eeprom_data),
1562 IXGBE_NOT_IMPLEMENTED);
1566 * ixgbe_get_supported_physical_layer - Returns physical layer type
1567 * @hw: pointer to hardware structure
1569 * Determines physical layer capabilities of the current configuration.
1571 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1573 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1574 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1578 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1579 * @hw: pointer to hardware structure
1580 * @regval: bitfield to write to the Rx DMA register
1582 * Enables the Rx DMA unit of the device.
1584 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1586 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1587 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1591 * ixgbe_disable_sec_rx_path - Stops the receive data path
1592 * @hw: pointer to hardware structure
1594 * Stops the receive data path.
1596 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1598 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1599 (hw), IXGBE_NOT_IMPLEMENTED);
1603 * ixgbe_enable_sec_rx_path - Enables the receive data path
1604 * @hw: pointer to hardware structure
1606 * Enables the receive data path.
1608 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1610 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1611 (hw), IXGBE_NOT_IMPLEMENTED);
1615 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1616 * @hw: pointer to hardware structure
1617 * @mask: Mask to specify which semaphore to acquire
1619 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1620 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1622 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1624 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1625 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1629 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1630 * @hw: pointer to hardware structure
1631 * @mask: Mask to specify which semaphore to release
1633 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1634 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1636 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1638 if (hw->mac.ops.release_swfw_sync)
1639 hw->mac.ops.release_swfw_sync(hw, mask);
1643 * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
1644 * @hw: pointer to hardware structure
1646 * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
1647 * Regardless of whether is succeeds or not it then release the semaphore.
1648 * This is function is called to recover from catastrophic failures that
1649 * may have left the semaphore locked.
1651 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)
1653 if (hw->mac.ops.init_swfw_sync)
1654 hw->mac.ops.init_swfw_sync(hw);
1657 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1659 if (hw->mac.ops.disable_rx)
1660 hw->mac.ops.disable_rx(hw);
1663 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1665 if (hw->mac.ops.enable_rx)
1666 hw->mac.ops.enable_rx(hw);
1670 * ixgbe_set_rate_select_speed - Set module link speed
1671 * @hw: pointer to hardware structure
1672 * @speed: link speed to set
1674 * Set module link speed via the rate select.
1676 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1678 if (hw->mac.ops.set_rate_select_speed)
1679 hw->mac.ops.set_rate_select_speed(hw, speed);