1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
37 #define IXGBE_EMPTY_PARAM
39 static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
40 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
43 static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
44 IXGBE_MVALS_INIT(_X540)
47 static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
48 IXGBE_MVALS_INIT(_X550)
51 static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
52 IXGBE_MVALS_INIT(_X550EM_x)
56 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
57 * @hw: pointer to hardware structure
58 * @map: pointer to u8 arr for returning map
60 * Read the rtrup2tc HW register and resolve its content into map
62 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
64 if (hw->mac.ops.get_rtrup2tc)
65 hw->mac.ops.get_rtrup2tc(hw, map);
69 * ixgbe_init_shared_code - Initialize the shared code
70 * @hw: pointer to hardware structure
72 * This will assign function pointers and assign the MAC type and PHY code.
73 * Does not touch the hardware. This function must be called prior to any
74 * other function in the shared code. The ixgbe_hw structure should be
75 * memset to 0 prior to calling this function. The following fields in
76 * hw structure should be filled in prior to calling this function:
77 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
78 * subsystem_vendor_id, and revision_id
80 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
84 DEBUGFUNC("ixgbe_init_shared_code");
89 ixgbe_set_mac_type(hw);
91 switch (hw->mac.type) {
92 case ixgbe_mac_82598EB:
93 status = ixgbe_init_ops_82598(hw);
95 case ixgbe_mac_82599EB:
96 status = ixgbe_init_ops_82599(hw);
99 status = ixgbe_init_ops_X540(hw);
102 status = ixgbe_init_ops_X550(hw);
104 case ixgbe_mac_X550EM_x:
105 status = ixgbe_init_ops_X550EM(hw);
107 case ixgbe_mac_82599_vf:
108 case ixgbe_mac_X540_vf:
109 case ixgbe_mac_X550_vf:
110 case ixgbe_mac_X550EM_x_vf:
111 status = ixgbe_init_ops_vf(hw);
114 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
117 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
123 * ixgbe_set_mac_type - Sets MAC type
124 * @hw: pointer to the HW structure
126 * This function sets the mac type of the adapter based on the
127 * vendor ID and device ID stored in the hw structure.
129 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
131 s32 ret_val = IXGBE_SUCCESS;
133 DEBUGFUNC("ixgbe_set_mac_type\n");
135 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
136 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
137 "Unsupported vendor id: %x", hw->vendor_id);
138 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
141 hw->mvals = ixgbe_mvals_base;
143 switch (hw->device_id) {
144 case IXGBE_DEV_ID_82598:
145 case IXGBE_DEV_ID_82598_BX:
146 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
147 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
148 case IXGBE_DEV_ID_82598AT:
149 case IXGBE_DEV_ID_82598AT2:
150 case IXGBE_DEV_ID_82598EB_CX4:
151 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
152 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
153 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
154 case IXGBE_DEV_ID_82598EB_XF_LR:
155 case IXGBE_DEV_ID_82598EB_SFP_LOM:
156 hw->mac.type = ixgbe_mac_82598EB;
158 case IXGBE_DEV_ID_82599_KX4:
159 case IXGBE_DEV_ID_82599_KX4_MEZZ:
160 case IXGBE_DEV_ID_82599_XAUI_LOM:
161 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
162 case IXGBE_DEV_ID_82599_KR:
163 case IXGBE_DEV_ID_82599_SFP:
164 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
165 case IXGBE_DEV_ID_82599_SFP_FCOE:
166 case IXGBE_DEV_ID_82599_SFP_EM:
167 case IXGBE_DEV_ID_82599_SFP_SF2:
168 case IXGBE_DEV_ID_82599_SFP_SF_QP:
169 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
170 case IXGBE_DEV_ID_82599EN_SFP:
171 case IXGBE_DEV_ID_82599_CX4:
172 case IXGBE_DEV_ID_82599_LS:
173 case IXGBE_DEV_ID_82599_T3_LOM:
174 hw->mac.type = ixgbe_mac_82599EB;
176 case IXGBE_DEV_ID_82599_VF:
177 case IXGBE_DEV_ID_82599_VF_HV:
178 hw->mac.type = ixgbe_mac_82599_vf;
180 case IXGBE_DEV_ID_X540_VF:
181 case IXGBE_DEV_ID_X540_VF_HV:
182 hw->mac.type = ixgbe_mac_X540_vf;
183 hw->mvals = ixgbe_mvals_X540;
185 case IXGBE_DEV_ID_X540T:
186 case IXGBE_DEV_ID_X540T1:
187 hw->mac.type = ixgbe_mac_X540;
188 hw->mvals = ixgbe_mvals_X540;
190 case IXGBE_DEV_ID_X550T:
191 case IXGBE_DEV_ID_X550T1:
192 hw->mac.type = ixgbe_mac_X550;
193 hw->mvals = ixgbe_mvals_X550;
195 case IXGBE_DEV_ID_X550EM_X_KX4:
196 case IXGBE_DEV_ID_X550EM_X_KR:
197 case IXGBE_DEV_ID_X550EM_X_10G_T:
198 case IXGBE_DEV_ID_X550EM_X_1G_T:
199 case IXGBE_DEV_ID_X550EM_X_SFP:
200 hw->mac.type = ixgbe_mac_X550EM_x;
201 hw->mvals = ixgbe_mvals_X550EM_x;
203 case IXGBE_DEV_ID_X550_VF:
204 case IXGBE_DEV_ID_X550_VF_HV:
205 hw->mac.type = ixgbe_mac_X550_vf;
206 hw->mvals = ixgbe_mvals_X550;
208 case IXGBE_DEV_ID_X550EM_X_VF:
209 case IXGBE_DEV_ID_X550EM_X_VF_HV:
210 hw->mac.type = ixgbe_mac_X550EM_x_vf;
211 hw->mvals = ixgbe_mvals_X550EM_x;
214 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
215 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
216 "Unsupported device id: %x",
221 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
222 hw->mac.type, ret_val);
227 * ixgbe_init_hw - Initialize the hardware
228 * @hw: pointer to hardware structure
230 * Initialize the hardware by resetting and then starting the hardware
232 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
234 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
235 IXGBE_NOT_IMPLEMENTED);
239 * ixgbe_reset_hw - Performs a hardware reset
240 * @hw: pointer to hardware structure
242 * Resets the hardware by resetting the transmit and receive units, masks and
243 * clears all interrupts, performs a PHY reset, and performs a MAC reset
245 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
247 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
248 IXGBE_NOT_IMPLEMENTED);
252 * ixgbe_start_hw - Prepares hardware for Rx/Tx
253 * @hw: pointer to hardware structure
255 * Starts the hardware by filling the bus info structure and media type,
256 * clears all on chip counters, initializes receive address registers,
257 * multicast table, VLAN filter table, calls routine to setup link and
258 * flow control settings, and leaves transmit and receive units disabled
261 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
263 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
264 IXGBE_NOT_IMPLEMENTED);
268 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
269 * which is disabled by default in ixgbe_start_hw();
271 * @hw: pointer to hardware structure
273 * Enable relaxed ordering;
275 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
277 if (hw->mac.ops.enable_relaxed_ordering)
278 hw->mac.ops.enable_relaxed_ordering(hw);
282 * ixgbe_clear_hw_cntrs - Clear hardware counters
283 * @hw: pointer to hardware structure
285 * Clears all hardware statistics counters by reading them from the hardware
286 * Statistics counters are clear on read.
288 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
290 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
291 IXGBE_NOT_IMPLEMENTED);
295 * ixgbe_get_media_type - Get media type
296 * @hw: pointer to hardware structure
298 * Returns the media type (fiber, copper, backplane)
300 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
302 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
303 ixgbe_media_type_unknown);
307 * ixgbe_get_mac_addr - Get MAC address
308 * @hw: pointer to hardware structure
309 * @mac_addr: Adapter MAC address
311 * Reads the adapter's MAC address from the first Receive Address Register
312 * (RAR0) A reset of the adapter must have been performed prior to calling
313 * this function in order for the MAC address to have been loaded from the
316 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
318 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
319 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
323 * ixgbe_get_san_mac_addr - Get SAN MAC address
324 * @hw: pointer to hardware structure
325 * @san_mac_addr: SAN MAC address
327 * Reads the SAN MAC address from the EEPROM, if it's available. This is
328 * per-port, so set_lan_id() must be called before reading the addresses.
330 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
332 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
333 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
337 * ixgbe_set_san_mac_addr - Write a SAN MAC address
338 * @hw: pointer to hardware structure
339 * @san_mac_addr: SAN MAC address
341 * Writes A SAN MAC address to the EEPROM.
343 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
345 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
346 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
350 * ixgbe_get_device_caps - Get additional device capabilities
351 * @hw: pointer to hardware structure
352 * @device_caps: the EEPROM word for device capabilities
354 * Reads the extra device capabilities from the EEPROM
356 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
358 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
359 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
363 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
364 * @hw: pointer to hardware structure
365 * @wwnn_prefix: the alternative WWNN prefix
366 * @wwpn_prefix: the alternative WWPN prefix
368 * This function will read the EEPROM from the alternative SAN MAC address
369 * block to check the support for the alternative WWNN/WWPN prefix support.
371 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
374 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
375 (hw, wwnn_prefix, wwpn_prefix),
376 IXGBE_NOT_IMPLEMENTED);
380 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
381 * @hw: pointer to hardware structure
382 * @bs: the fcoe boot status
384 * This function will read the FCOE boot status from the iSCSI FCOE block
386 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
388 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
390 IXGBE_NOT_IMPLEMENTED);
394 * ixgbe_get_bus_info - Set PCI bus info
395 * @hw: pointer to hardware structure
397 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
399 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
401 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
402 IXGBE_NOT_IMPLEMENTED);
406 * ixgbe_get_num_of_tx_queues - Get Tx queues
407 * @hw: pointer to hardware structure
409 * Returns the number of transmit queues for the given adapter.
411 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
413 return hw->mac.max_tx_queues;
417 * ixgbe_get_num_of_rx_queues - Get Rx queues
418 * @hw: pointer to hardware structure
420 * Returns the number of receive queues for the given adapter.
422 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
424 return hw->mac.max_rx_queues;
428 * ixgbe_stop_adapter - Disable Rx/Tx units
429 * @hw: pointer to hardware structure
431 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
432 * disables transmit and receive units. The adapter_stopped flag is used by
433 * the shared code and drivers to determine if the adapter is in a stopped
434 * state and should not touch the hardware.
436 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
438 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
439 IXGBE_NOT_IMPLEMENTED);
443 * ixgbe_read_pba_string - Reads part number string from EEPROM
444 * @hw: pointer to hardware structure
445 * @pba_num: stores the part number string from the EEPROM
446 * @pba_num_size: part number string buffer length
448 * Reads the part number string from the EEPROM.
450 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
452 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
456 * ixgbe_read_pba_num - Reads part number from EEPROM
457 * @hw: pointer to hardware structure
458 * @pba_num: stores the part number from the EEPROM
460 * Reads the part number from the EEPROM.
462 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
464 return ixgbe_read_pba_num_generic(hw, pba_num);
468 * ixgbe_identify_phy - Get PHY type
469 * @hw: pointer to hardware structure
471 * Determines the physical layer module found on the current adapter.
473 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
475 s32 status = IXGBE_SUCCESS;
477 if (hw->phy.type == ixgbe_phy_unknown) {
478 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
479 IXGBE_NOT_IMPLEMENTED);
486 * ixgbe_reset_phy - Perform a PHY reset
487 * @hw: pointer to hardware structure
489 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
491 s32 status = IXGBE_SUCCESS;
493 if (hw->phy.type == ixgbe_phy_unknown) {
494 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
495 status = IXGBE_ERR_PHY;
498 if (status == IXGBE_SUCCESS) {
499 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
500 IXGBE_NOT_IMPLEMENTED);
506 * ixgbe_get_phy_firmware_version -
507 * @hw: pointer to hardware structure
508 * @firmware_version: pointer to firmware version
510 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
512 s32 status = IXGBE_SUCCESS;
514 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
515 (hw, firmware_version),
516 IXGBE_NOT_IMPLEMENTED);
521 * ixgbe_read_phy_reg - Read PHY register
522 * @hw: pointer to hardware structure
523 * @reg_addr: 32 bit address of PHY register to read
524 * @phy_data: Pointer to read data from PHY register
526 * Reads a value from a specified PHY register
528 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
532 ixgbe_identify_phy(hw);
534 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
535 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
539 * ixgbe_write_phy_reg - Write PHY register
540 * @hw: pointer to hardware structure
541 * @reg_addr: 32 bit PHY register to write
542 * @phy_data: Data to write to the PHY register
544 * Writes a value to specified PHY register
546 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
550 ixgbe_identify_phy(hw);
552 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
553 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
557 * ixgbe_setup_phy_link - Restart PHY autoneg
558 * @hw: pointer to hardware structure
560 * Restart autonegotiation and PHY and waits for completion.
562 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
564 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
565 IXGBE_NOT_IMPLEMENTED);
569 * ixgbe_setup_internal_phy - Configure integrated PHY
570 * @hw: pointer to hardware structure
572 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
573 * Returns success if not implemented, since nothing needs to be done in this
576 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
578 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
583 * ixgbe_check_phy_link - Determine link and speed status
584 * @hw: pointer to hardware structure
586 * Reads a PHY register to determine if link is up and the current speed for
589 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
592 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
593 link_up), IXGBE_NOT_IMPLEMENTED);
597 * ixgbe_setup_phy_link_speed - Set auto advertise
598 * @hw: pointer to hardware structure
599 * @speed: new link speed
601 * Sets the auto advertised capabilities
603 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
604 bool autoneg_wait_to_complete)
606 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
607 autoneg_wait_to_complete),
608 IXGBE_NOT_IMPLEMENTED);
612 * ixgbe_set_phy_power - Control the phy power state
613 * @hw: pointer to hardware structure
614 * @on: true for on, false for off
616 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
618 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
619 IXGBE_NOT_IMPLEMENTED);
623 * ixgbe_check_link - Get link and speed status
624 * @hw: pointer to hardware structure
626 * Reads the links register to determine if link is up and the current speed
628 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
629 bool *link_up, bool link_up_wait_to_complete)
631 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
632 link_up, link_up_wait_to_complete),
633 IXGBE_NOT_IMPLEMENTED);
637 * ixgbe_disable_tx_laser - Disable Tx laser
638 * @hw: pointer to hardware structure
640 * If the driver needs to disable the laser on SFI optics.
642 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
644 if (hw->mac.ops.disable_tx_laser)
645 hw->mac.ops.disable_tx_laser(hw);
649 * ixgbe_enable_tx_laser - Enable Tx laser
650 * @hw: pointer to hardware structure
652 * If the driver needs to enable the laser on SFI optics.
654 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
656 if (hw->mac.ops.enable_tx_laser)
657 hw->mac.ops.enable_tx_laser(hw);
661 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
662 * @hw: pointer to hardware structure
664 * When the driver changes the link speeds that it can support then
665 * flap the tx laser to alert the link partner to start autotry
666 * process on its end.
668 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
670 if (hw->mac.ops.flap_tx_laser)
671 hw->mac.ops.flap_tx_laser(hw);
675 * ixgbe_setup_link - Set link speed
676 * @hw: pointer to hardware structure
677 * @speed: new link speed
679 * Configures link settings. Restarts the link.
680 * Performs autonegotiation if needed.
682 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
683 bool autoneg_wait_to_complete)
685 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
686 autoneg_wait_to_complete),
687 IXGBE_NOT_IMPLEMENTED);
691 * ixgbe_setup_mac_link - Set link speed
692 * @hw: pointer to hardware structure
693 * @speed: new link speed
695 * Configures link settings. Restarts the link.
696 * Performs autonegotiation if needed.
698 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
699 bool autoneg_wait_to_complete)
701 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
702 autoneg_wait_to_complete),
703 IXGBE_NOT_IMPLEMENTED);
707 * ixgbe_get_link_capabilities - Returns link capabilities
708 * @hw: pointer to hardware structure
710 * Determines the link capabilities of the current configuration.
712 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
715 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
716 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
720 * ixgbe_led_on - Turn on LEDs
721 * @hw: pointer to hardware structure
722 * @index: led number to turn on
724 * Turns on the software controllable LEDs.
726 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
728 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
729 IXGBE_NOT_IMPLEMENTED);
733 * ixgbe_led_off - Turn off LEDs
734 * @hw: pointer to hardware structure
735 * @index: led number to turn off
737 * Turns off the software controllable LEDs.
739 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
741 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
742 IXGBE_NOT_IMPLEMENTED);
746 * ixgbe_blink_led_start - Blink LEDs
747 * @hw: pointer to hardware structure
748 * @index: led number to blink
750 * Blink LED based on index.
752 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
754 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
755 IXGBE_NOT_IMPLEMENTED);
759 * ixgbe_blink_led_stop - Stop blinking LEDs
760 * @hw: pointer to hardware structure
762 * Stop blinking LED based on index.
764 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
766 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
767 IXGBE_NOT_IMPLEMENTED);
771 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
772 * @hw: pointer to hardware structure
774 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
775 * ixgbe_hw struct in order to set up EEPROM access.
777 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
779 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
780 IXGBE_NOT_IMPLEMENTED);
785 * ixgbe_write_eeprom - Write word to EEPROM
786 * @hw: pointer to hardware structure
787 * @offset: offset within the EEPROM to be written to
788 * @data: 16 bit word to be written to the EEPROM
790 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
791 * called after this function, the EEPROM will most likely contain an
794 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
796 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
797 IXGBE_NOT_IMPLEMENTED);
801 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
802 * @hw: pointer to hardware structure
803 * @offset: offset within the EEPROM to be written to
804 * @data: 16 bit word(s) to be written to the EEPROM
805 * @words: number of words
807 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
808 * called after this function, the EEPROM will most likely contain an
811 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
814 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
815 (hw, offset, words, data),
816 IXGBE_NOT_IMPLEMENTED);
820 * ixgbe_read_eeprom - Read word from EEPROM
821 * @hw: pointer to hardware structure
822 * @offset: offset within the EEPROM to be read
823 * @data: read 16 bit value from EEPROM
825 * Reads 16 bit value from EEPROM
827 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
829 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
830 IXGBE_NOT_IMPLEMENTED);
834 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
835 * @hw: pointer to hardware structure
836 * @offset: offset within the EEPROM to be read
837 * @data: read 16 bit word(s) from EEPROM
838 * @words: number of words
840 * Reads 16 bit word(s) from EEPROM
842 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
843 u16 words, u16 *data)
845 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
846 (hw, offset, words, data),
847 IXGBE_NOT_IMPLEMENTED);
851 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
852 * @hw: pointer to hardware structure
853 * @checksum_val: calculated checksum
855 * Performs checksum calculation and validates the EEPROM checksum
857 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
859 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
860 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
864 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
865 * @hw: pointer to hardware structure
867 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
869 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
870 IXGBE_NOT_IMPLEMENTED);
874 * ixgbe_insert_mac_addr - Find a RAR for this mac address
875 * @hw: pointer to hardware structure
876 * @addr: Address to put into receive address register
877 * @vmdq: VMDq pool to assign
879 * Puts an ethernet address into a receive address register, or
880 * finds the rar that it is aleady in; adds to the pool list
882 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
884 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
886 IXGBE_NOT_IMPLEMENTED);
890 * ixgbe_set_rar - Set Rx address register
891 * @hw: pointer to hardware structure
892 * @index: Receive address register to write
893 * @addr: Address to put into receive address register
895 * @enable_addr: set flag that address is active
897 * Puts an ethernet address into a receive address register.
899 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
902 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
903 enable_addr), IXGBE_NOT_IMPLEMENTED);
907 * ixgbe_clear_rar - Clear Rx address register
908 * @hw: pointer to hardware structure
909 * @index: Receive address register to write
911 * Puts an ethernet address into a receive address register.
913 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
915 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
916 IXGBE_NOT_IMPLEMENTED);
920 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
921 * @hw: pointer to hardware structure
922 * @rar: receive address register index to associate with VMDq index
923 * @vmdq: VMDq set or pool index
925 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
927 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
928 IXGBE_NOT_IMPLEMENTED);
933 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
934 * @hw: pointer to hardware structure
935 * @vmdq: VMDq default pool index
937 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
939 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
940 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
944 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
945 * @hw: pointer to hardware structure
946 * @rar: receive address register index to disassociate with VMDq index
947 * @vmdq: VMDq set or pool index
949 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
951 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
952 IXGBE_NOT_IMPLEMENTED);
956 * ixgbe_init_rx_addrs - Initializes receive address filters.
957 * @hw: pointer to hardware structure
959 * Places the MAC address in receive address register 0 and clears the rest
960 * of the receive address registers. Clears the multicast table. Assumes
961 * the receiver is in reset when the routine is called.
963 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
965 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
966 IXGBE_NOT_IMPLEMENTED);
970 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
971 * @hw: pointer to hardware structure
973 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
975 return hw->mac.num_rar_entries;
979 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
980 * @hw: pointer to hardware structure
981 * @addr_list: the list of new multicast addresses
982 * @addr_count: number of addresses
983 * @func: iterator function to walk the multicast address list
985 * The given list replaces any existing list. Clears the secondary addrs from
986 * receive address registers. Uses unused receive address registers for the
987 * first secondary addresses, and falls back to promiscuous mode as needed.
989 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
990 u32 addr_count, ixgbe_mc_addr_itr func)
992 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
993 addr_list, addr_count, func),
994 IXGBE_NOT_IMPLEMENTED);
998 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
999 * @hw: pointer to hardware structure
1000 * @mc_addr_list: the list of new multicast addresses
1001 * @mc_addr_count: number of addresses
1002 * @func: iterator function to walk the multicast address list
1004 * The given list replaces any existing list. Clears the MC addrs from receive
1005 * address registers and the multicast table. Uses unused receive address
1006 * registers for the first multicast addresses, and hashes the rest into the
1009 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1010 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1013 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1014 mc_addr_list, mc_addr_count, func, clear),
1015 IXGBE_NOT_IMPLEMENTED);
1019 * ixgbe_enable_mc - Enable multicast address in RAR
1020 * @hw: pointer to hardware structure
1022 * Enables multicast address in RAR and the use of the multicast hash table.
1024 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1026 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1027 IXGBE_NOT_IMPLEMENTED);
1031 * ixgbe_disable_mc - Disable multicast address in RAR
1032 * @hw: pointer to hardware structure
1034 * Disables multicast address in RAR and the use of the multicast hash table.
1036 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1038 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1039 IXGBE_NOT_IMPLEMENTED);
1043 * ixgbe_clear_vfta - Clear VLAN filter table
1044 * @hw: pointer to hardware structure
1046 * Clears the VLAN filer table, and the VMDq index associated with the filter
1048 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1050 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1051 IXGBE_NOT_IMPLEMENTED);
1055 * ixgbe_set_vfta - Set VLAN filter table
1056 * @hw: pointer to hardware structure
1057 * @vlan: VLAN id to write to VLAN filter
1058 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1059 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1061 * Turn on/off specified VLAN in the VLAN filter table.
1063 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1065 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1066 vlan_on), IXGBE_NOT_IMPLEMENTED);
1070 * ixgbe_set_vlvf - Set VLAN Pool Filter
1071 * @hw: pointer to hardware structure
1072 * @vlan: VLAN id to write to VLAN filter
1073 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1074 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1075 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1078 * Turn on/off specified bit in VLVF table.
1080 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1083 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1084 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1088 * ixgbe_fc_enable - Enable flow control
1089 * @hw: pointer to hardware structure
1091 * Configures the flow control settings based on SW configuration.
1093 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1095 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1096 IXGBE_NOT_IMPLEMENTED);
1100 * ixgbe_setup_fc - Set up flow control
1101 * @hw: pointer to hardware structure
1103 * Called at init time to set up flow control.
1105 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1107 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1108 IXGBE_NOT_IMPLEMENTED);
1112 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1113 * @hw: pointer to hardware structure
1114 * @maj: driver major number to be sent to firmware
1115 * @min: driver minor number to be sent to firmware
1116 * @build: driver build number to be sent to firmware
1117 * @ver: driver version number to be sent to firmware
1119 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1122 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1123 build, ver), IXGBE_NOT_IMPLEMENTED);
1128 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1129 * @hw: pointer to hardware structure
1131 * Updates the temperatures in mac.thermal_sensor_data
1133 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1135 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1136 IXGBE_NOT_IMPLEMENTED);
1140 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1141 * @hw: pointer to hardware structure
1143 * Inits the thermal sensor thresholds according to the NVM map
1145 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1147 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1148 IXGBE_NOT_IMPLEMENTED);
1152 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1153 * @hw: pointer to hardware structure
1155 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1156 * When disabling dmac, dmac enable dmac bit is cleared.
1158 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1160 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1161 IXGBE_NOT_IMPLEMENTED);
1165 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1166 * @hw: pointer to hardware structure
1168 * Disables dmac, updates per TC settings, and then enable dmac.
1170 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1172 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1173 IXGBE_NOT_IMPLEMENTED);
1177 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1178 * @hw: pointer to hardware structure
1180 * Configure DMA coalescing threshold per TC and set high priority bit for
1181 * FCOE TC. The dmac enable bit must be cleared before configuring.
1183 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1185 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1186 IXGBE_NOT_IMPLEMENTED);
1190 * ixgbe_setup_eee - Enable/disable EEE support
1191 * @hw: pointer to the HW structure
1192 * @enable_eee: boolean flag to enable EEE
1194 * Enable/disable EEE based on enable_ee flag.
1195 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1199 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1201 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1202 IXGBE_NOT_IMPLEMENTED);
1206 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1207 * @hw: pointer to hardware structure
1208 * @enbale: enable or disable source address pruning
1209 * @pool: Rx pool - Rx pool to toggle source address pruning
1211 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1214 if (hw->mac.ops.set_source_address_pruning)
1215 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1219 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1220 * @hw: pointer to hardware structure
1221 * @enable: enable or disable switch for Ethertype anti-spoofing
1222 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1225 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1227 if (hw->mac.ops.set_ethertype_anti_spoofing)
1228 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1232 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1233 * @hw: pointer to hardware structure
1234 * @reg_addr: 32 bit address of PHY register to read
1235 * @device_type: type of device you want to communicate with
1236 * @phy_data: Pointer to read data from PHY register
1238 * Reads a value from a specified PHY register
1240 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1241 u32 device_type, u32 *phy_data)
1243 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1244 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1248 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1249 * @hw: pointer to hardware structure
1250 * @reg_addr: 32 bit PHY register to write
1251 * @device_type: type of device you want to communicate with
1252 * @phy_data: Data to write to the PHY register
1254 * Writes a value to specified PHY register
1256 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1257 u32 device_type, u32 phy_data)
1259 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1260 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1264 * ixgbe_disable_mdd - Disable malicious driver detection
1265 * @hw: pointer to hardware structure
1268 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1270 if (hw->mac.ops.disable_mdd)
1271 hw->mac.ops.disable_mdd(hw);
1275 * ixgbe_enable_mdd - Enable malicious driver detection
1276 * @hw: pointer to hardware structure
1279 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1281 if (hw->mac.ops.enable_mdd)
1282 hw->mac.ops.enable_mdd(hw);
1286 * ixgbe_mdd_event - Handle malicious driver detection event
1287 * @hw: pointer to hardware structure
1288 * @vf_bitmap: vf bitmap of malicious vfs
1291 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1293 if (hw->mac.ops.mdd_event)
1294 hw->mac.ops.mdd_event(hw, vf_bitmap);
1298 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1300 * @hw: pointer to hardware structure
1304 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1306 if (hw->mac.ops.restore_mdd_vf)
1307 hw->mac.ops.restore_mdd_vf(hw, vf);
1311 * ixgbe_enter_lplu - Transition to low power states
1312 * @hw: pointer to hardware structure
1314 * Configures Low Power Link Up on transition to low power states
1315 * (from D0 to non-D0).
1317 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1319 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1320 IXGBE_NOT_IMPLEMENTED);
1324 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1325 * @hw: pointer to hardware structure
1327 * Handle external Base T PHY interrupt. If high temperature
1328 * failure alarm then return error, else if link status change
1329 * then setup internal/external PHY link
1331 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1332 * failure alarm, else return PHY access status.
1334 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1336 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1337 IXGBE_NOT_IMPLEMENTED);
1341 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1342 * @hw: pointer to hardware structure
1343 * @reg: analog register to read
1346 * Performs write operation to analog register specified.
1348 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1350 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1351 val), IXGBE_NOT_IMPLEMENTED);
1355 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1356 * @hw: pointer to hardware structure
1357 * @reg: analog register to write
1358 * @val: value to write
1360 * Performs write operation to Atlas analog register specified.
1362 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1364 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1365 val), IXGBE_NOT_IMPLEMENTED);
1369 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1370 * @hw: pointer to hardware structure
1372 * Initializes the Unicast Table Arrays to zero on device load. This
1373 * is part of the Rx init addr execution path.
1375 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1377 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1378 IXGBE_NOT_IMPLEMENTED);
1382 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1383 * @hw: pointer to hardware structure
1384 * @byte_offset: byte offset to read
1385 * @dev_addr: I2C bus address to read from
1388 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1390 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1393 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1394 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1398 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1399 * @hw: pointer to hardware structure
1400 * @byte_offset: byte offset to read
1401 * @dev_addr: I2C bus address to read from
1404 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1406 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1407 u8 dev_addr, u8 *data)
1409 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1410 (hw, byte_offset, dev_addr, data),
1411 IXGBE_NOT_IMPLEMENTED);
1415 * ixgbe_read_i2c_combined - Perform I2C read combined operation
1416 * @hw: pointer to the hardware structure
1417 * @addr: I2C bus address to read from
1418 * @reg: I2C device register to read from
1419 * @val: pointer to location to receive read value
1421 * Returns an error code on error.
1423 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1425 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
1426 reg, val), IXGBE_NOT_IMPLEMENTED);
1430 * ixgbe_read_i2c_combined_unlocked - Perform I2C read combined operation
1431 * @hw: pointer to the hardware structure
1432 * @addr: I2C bus address to read from
1433 * @reg: I2C device register to read from
1434 * @val: pointer to location to receive read value
1436 * Returns an error code on error.
1438 s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
1441 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined_unlocked,
1442 (hw, addr, reg, val),
1443 IXGBE_NOT_IMPLEMENTED);
1447 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1448 * @hw: pointer to hardware structure
1449 * @byte_offset: byte offset to write
1450 * @dev_addr: I2C bus address to write to
1451 * @data: value to write
1453 * Performs byte write operation to SFP module's EEPROM over I2C interface
1454 * at a specified device address.
1456 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1459 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1460 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1464 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1465 * @hw: pointer to hardware structure
1466 * @byte_offset: byte offset to write
1467 * @dev_addr: I2C bus address to write to
1468 * @data: value to write
1470 * Performs byte write operation to SFP module's EEPROM over I2C interface
1471 * at a specified device address.
1473 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1474 u8 dev_addr, u8 data)
1476 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1477 (hw, byte_offset, dev_addr, data),
1478 IXGBE_NOT_IMPLEMENTED);
1482 * ixgbe_write_i2c_combined - Perform I2C write combined operation
1483 * @hw: pointer to the hardware structure
1484 * @addr: I2C bus address to write to
1485 * @reg: I2C device register to write to
1486 * @val: value to write
1488 * Returns an error code on error.
1490 s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1492 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
1493 reg, val), IXGBE_NOT_IMPLEMENTED);
1497 * ixgbe_write_i2c_combined_unlocked - Perform I2C write combined operation
1498 * @hw: pointer to the hardware structure
1499 * @addr: I2C bus address to write to
1500 * @reg: I2C device register to write to
1501 * @val: value to write
1503 * Returns an error code on error.
1505 s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
1508 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined_unlocked,
1509 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1513 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1514 * @hw: pointer to hardware structure
1515 * @byte_offset: EEPROM byte offset to write
1516 * @eeprom_data: value to write
1518 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1520 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1521 u8 byte_offset, u8 eeprom_data)
1523 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1524 (hw, byte_offset, eeprom_data),
1525 IXGBE_NOT_IMPLEMENTED);
1529 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1530 * @hw: pointer to hardware structure
1531 * @byte_offset: EEPROM byte offset to read
1532 * @eeprom_data: value read
1534 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1536 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1538 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1539 (hw, byte_offset, eeprom_data),
1540 IXGBE_NOT_IMPLEMENTED);
1544 * ixgbe_get_supported_physical_layer - Returns physical layer type
1545 * @hw: pointer to hardware structure
1547 * Determines physical layer capabilities of the current configuration.
1549 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1551 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1552 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1556 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1557 * @hw: pointer to hardware structure
1558 * @regval: bitfield to write to the Rx DMA register
1560 * Enables the Rx DMA unit of the device.
1562 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1564 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1565 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1569 * ixgbe_disable_sec_rx_path - Stops the receive data path
1570 * @hw: pointer to hardware structure
1572 * Stops the receive data path.
1574 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1576 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1577 (hw), IXGBE_NOT_IMPLEMENTED);
1581 * ixgbe_enable_sec_rx_path - Enables the receive data path
1582 * @hw: pointer to hardware structure
1584 * Enables the receive data path.
1586 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1588 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1589 (hw), IXGBE_NOT_IMPLEMENTED);
1593 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1594 * @hw: pointer to hardware structure
1595 * @mask: Mask to specify which semaphore to acquire
1597 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1598 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1600 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1602 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1603 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1607 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1608 * @hw: pointer to hardware structure
1609 * @mask: Mask to specify which semaphore to release
1611 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1612 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1614 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1616 if (hw->mac.ops.release_swfw_sync)
1617 hw->mac.ops.release_swfw_sync(hw, mask);
1621 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1623 if (hw->mac.ops.disable_rx)
1624 hw->mac.ops.disable_rx(hw);
1627 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1629 if (hw->mac.ops.enable_rx)
1630 hw->mac.ops.enable_rx(hw);
1634 * ixgbe_set_rate_select_speed - Set module link speed
1635 * @hw: pointer to hardware structure
1636 * @speed: link speed to set
1638 * Set module link speed via the rate select.
1640 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1642 if (hw->mac.ops.set_rate_select_speed)
1643 hw->mac.ops.set_rate_select_speed(hw, speed);