1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
37 #define IXGBE_EMPTY_PARAM
39 static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
40 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
43 static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
44 IXGBE_MVALS_INIT(_X540)
47 static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
48 IXGBE_MVALS_INIT(_X550)
51 static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
52 IXGBE_MVALS_INIT(_X550EM_x)
55 static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
56 IXGBE_MVALS_INIT(_X550EM_a)
60 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
61 * @hw: pointer to hardware structure
62 * @map: pointer to u8 arr for returning map
64 * Read the rtrup2tc HW register and resolve its content into map
66 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
68 if (hw->mac.ops.get_rtrup2tc)
69 hw->mac.ops.get_rtrup2tc(hw, map);
73 * ixgbe_init_shared_code - Initialize the shared code
74 * @hw: pointer to hardware structure
76 * This will assign function pointers and assign the MAC type and PHY code.
77 * Does not touch the hardware. This function must be called prior to any
78 * other function in the shared code. The ixgbe_hw structure should be
79 * memset to 0 prior to calling this function. The following fields in
80 * hw structure should be filled in prior to calling this function:
81 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
82 * subsystem_vendor_id, and revision_id
84 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
88 DEBUGFUNC("ixgbe_init_shared_code");
93 ixgbe_set_mac_type(hw);
95 switch (hw->mac.type) {
96 case ixgbe_mac_82598EB:
97 status = ixgbe_init_ops_82598(hw);
99 case ixgbe_mac_82599EB:
100 status = ixgbe_init_ops_82599(hw);
103 status = ixgbe_init_ops_X540(hw);
106 status = ixgbe_init_ops_X550(hw);
108 case ixgbe_mac_X550EM_x:
109 status = ixgbe_init_ops_X550EM_x(hw);
111 case ixgbe_mac_X550EM_a:
112 status = ixgbe_init_ops_X550EM_a(hw);
114 case ixgbe_mac_82599_vf:
115 case ixgbe_mac_X540_vf:
116 case ixgbe_mac_X550_vf:
117 case ixgbe_mac_X550EM_x_vf:
118 case ixgbe_mac_X550EM_a_vf:
119 status = ixgbe_init_ops_vf(hw);
122 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
125 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
131 * ixgbe_set_mac_type - Sets MAC type
132 * @hw: pointer to the HW structure
134 * This function sets the mac type of the adapter based on the
135 * vendor ID and device ID stored in the hw structure.
137 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
139 s32 ret_val = IXGBE_SUCCESS;
141 DEBUGFUNC("ixgbe_set_mac_type\n");
143 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
144 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
145 "Unsupported vendor id: %x", hw->vendor_id);
146 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
149 hw->mvals = ixgbe_mvals_base;
151 switch (hw->device_id) {
152 case IXGBE_DEV_ID_82598:
153 case IXGBE_DEV_ID_82598_BX:
154 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
155 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
156 case IXGBE_DEV_ID_82598AT:
157 case IXGBE_DEV_ID_82598AT2:
158 case IXGBE_DEV_ID_82598EB_CX4:
159 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
160 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
161 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
162 case IXGBE_DEV_ID_82598EB_XF_LR:
163 case IXGBE_DEV_ID_82598EB_SFP_LOM:
164 hw->mac.type = ixgbe_mac_82598EB;
166 case IXGBE_DEV_ID_82599_KX4:
167 case IXGBE_DEV_ID_82599_KX4_MEZZ:
168 case IXGBE_DEV_ID_82599_XAUI_LOM:
169 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
170 case IXGBE_DEV_ID_82599_KR:
171 case IXGBE_DEV_ID_82599_SFP:
172 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
173 case IXGBE_DEV_ID_82599_SFP_FCOE:
174 case IXGBE_DEV_ID_82599_SFP_EM:
175 case IXGBE_DEV_ID_82599_SFP_SF2:
176 case IXGBE_DEV_ID_82599_SFP_SF_QP:
177 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
178 case IXGBE_DEV_ID_82599EN_SFP:
179 case IXGBE_DEV_ID_82599_CX4:
180 case IXGBE_DEV_ID_82599_LS:
181 case IXGBE_DEV_ID_82599_T3_LOM:
182 hw->mac.type = ixgbe_mac_82599EB;
184 case IXGBE_DEV_ID_82599_VF:
185 case IXGBE_DEV_ID_82599_VF_HV:
186 hw->mac.type = ixgbe_mac_82599_vf;
188 case IXGBE_DEV_ID_X540_VF:
189 case IXGBE_DEV_ID_X540_VF_HV:
190 hw->mac.type = ixgbe_mac_X540_vf;
191 hw->mvals = ixgbe_mvals_X540;
193 case IXGBE_DEV_ID_X540T:
194 case IXGBE_DEV_ID_X540T1:
195 hw->mac.type = ixgbe_mac_X540;
196 hw->mvals = ixgbe_mvals_X540;
198 case IXGBE_DEV_ID_X550T:
199 case IXGBE_DEV_ID_X550T1:
200 hw->mac.type = ixgbe_mac_X550;
201 hw->mvals = ixgbe_mvals_X550;
203 case IXGBE_DEV_ID_X550EM_X_KX4:
204 case IXGBE_DEV_ID_X550EM_X_KR:
205 case IXGBE_DEV_ID_X550EM_X_10G_T:
206 case IXGBE_DEV_ID_X550EM_X_1G_T:
207 case IXGBE_DEV_ID_X550EM_X_SFP:
208 hw->mac.type = ixgbe_mac_X550EM_x;
209 hw->mvals = ixgbe_mvals_X550EM_x;
211 case IXGBE_DEV_ID_X550EM_A_KR:
212 case IXGBE_DEV_ID_X550EM_A_KR_L:
213 case IXGBE_DEV_ID_X550EM_A_SFP_N:
214 case IXGBE_DEV_ID_X550EM_A_SGMII:
215 case IXGBE_DEV_ID_X550EM_A_SGMII_L:
216 case IXGBE_DEV_ID_X550EM_A_1G_T:
217 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
218 case IXGBE_DEV_ID_X550EM_A_10G_T:
219 case IXGBE_DEV_ID_X550EM_A_QSFP:
220 case IXGBE_DEV_ID_X550EM_A_QSFP_N:
221 case IXGBE_DEV_ID_X550EM_A_SFP:
222 hw->mac.type = ixgbe_mac_X550EM_a;
223 hw->mvals = ixgbe_mvals_X550EM_a;
225 case IXGBE_DEV_ID_X550_VF:
226 case IXGBE_DEV_ID_X550_VF_HV:
227 hw->mac.type = ixgbe_mac_X550_vf;
228 hw->mvals = ixgbe_mvals_X550;
230 case IXGBE_DEV_ID_X550EM_X_VF:
231 case IXGBE_DEV_ID_X550EM_X_VF_HV:
232 hw->mac.type = ixgbe_mac_X550EM_x_vf;
233 hw->mvals = ixgbe_mvals_X550EM_x;
235 case IXGBE_DEV_ID_X550EM_A_VF:
236 case IXGBE_DEV_ID_X550EM_A_VF_HV:
237 hw->mac.type = ixgbe_mac_X550EM_a_vf;
238 hw->mvals = ixgbe_mvals_X550EM_a;
241 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
242 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
243 "Unsupported device id: %x",
248 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
249 hw->mac.type, ret_val);
254 * ixgbe_init_hw - Initialize the hardware
255 * @hw: pointer to hardware structure
257 * Initialize the hardware by resetting and then starting the hardware
259 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
261 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
262 IXGBE_NOT_IMPLEMENTED);
266 * ixgbe_reset_hw - Performs a hardware reset
267 * @hw: pointer to hardware structure
269 * Resets the hardware by resetting the transmit and receive units, masks and
270 * clears all interrupts, performs a PHY reset, and performs a MAC reset
272 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
274 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
275 IXGBE_NOT_IMPLEMENTED);
279 * ixgbe_start_hw - Prepares hardware for Rx/Tx
280 * @hw: pointer to hardware structure
282 * Starts the hardware by filling the bus info structure and media type,
283 * clears all on chip counters, initializes receive address registers,
284 * multicast table, VLAN filter table, calls routine to setup link and
285 * flow control settings, and leaves transmit and receive units disabled
288 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
290 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
291 IXGBE_NOT_IMPLEMENTED);
295 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
296 * which is disabled by default in ixgbe_start_hw();
298 * @hw: pointer to hardware structure
300 * Enable relaxed ordering;
302 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
304 if (hw->mac.ops.enable_relaxed_ordering)
305 hw->mac.ops.enable_relaxed_ordering(hw);
309 * ixgbe_clear_hw_cntrs - Clear hardware counters
310 * @hw: pointer to hardware structure
312 * Clears all hardware statistics counters by reading them from the hardware
313 * Statistics counters are clear on read.
315 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
317 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
318 IXGBE_NOT_IMPLEMENTED);
322 * ixgbe_get_media_type - Get media type
323 * @hw: pointer to hardware structure
325 * Returns the media type (fiber, copper, backplane)
327 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
329 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
330 ixgbe_media_type_unknown);
334 * ixgbe_get_mac_addr - Get MAC address
335 * @hw: pointer to hardware structure
336 * @mac_addr: Adapter MAC address
338 * Reads the adapter's MAC address from the first Receive Address Register
339 * (RAR0) A reset of the adapter must have been performed prior to calling
340 * this function in order for the MAC address to have been loaded from the
343 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
345 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
346 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
350 * ixgbe_get_san_mac_addr - Get SAN MAC address
351 * @hw: pointer to hardware structure
352 * @san_mac_addr: SAN MAC address
354 * Reads the SAN MAC address from the EEPROM, if it's available. This is
355 * per-port, so set_lan_id() must be called before reading the addresses.
357 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
359 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
360 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
364 * ixgbe_set_san_mac_addr - Write a SAN MAC address
365 * @hw: pointer to hardware structure
366 * @san_mac_addr: SAN MAC address
368 * Writes A SAN MAC address to the EEPROM.
370 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
372 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
373 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
377 * ixgbe_get_device_caps - Get additional device capabilities
378 * @hw: pointer to hardware structure
379 * @device_caps: the EEPROM word for device capabilities
381 * Reads the extra device capabilities from the EEPROM
383 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
385 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
386 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
390 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
391 * @hw: pointer to hardware structure
392 * @wwnn_prefix: the alternative WWNN prefix
393 * @wwpn_prefix: the alternative WWPN prefix
395 * This function will read the EEPROM from the alternative SAN MAC address
396 * block to check the support for the alternative WWNN/WWPN prefix support.
398 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
401 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
402 (hw, wwnn_prefix, wwpn_prefix),
403 IXGBE_NOT_IMPLEMENTED);
407 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
408 * @hw: pointer to hardware structure
409 * @bs: the fcoe boot status
411 * This function will read the FCOE boot status from the iSCSI FCOE block
413 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
415 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
417 IXGBE_NOT_IMPLEMENTED);
421 * ixgbe_get_bus_info - Set PCI bus info
422 * @hw: pointer to hardware structure
424 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
426 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
428 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
429 IXGBE_NOT_IMPLEMENTED);
433 * ixgbe_get_num_of_tx_queues - Get Tx queues
434 * @hw: pointer to hardware structure
436 * Returns the number of transmit queues for the given adapter.
438 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
440 return hw->mac.max_tx_queues;
444 * ixgbe_get_num_of_rx_queues - Get Rx queues
445 * @hw: pointer to hardware structure
447 * Returns the number of receive queues for the given adapter.
449 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
451 return hw->mac.max_rx_queues;
455 * ixgbe_stop_adapter - Disable Rx/Tx units
456 * @hw: pointer to hardware structure
458 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
459 * disables transmit and receive units. The adapter_stopped flag is used by
460 * the shared code and drivers to determine if the adapter is in a stopped
461 * state and should not touch the hardware.
463 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
465 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
466 IXGBE_NOT_IMPLEMENTED);
470 * ixgbe_read_pba_string - Reads part number string from EEPROM
471 * @hw: pointer to hardware structure
472 * @pba_num: stores the part number string from the EEPROM
473 * @pba_num_size: part number string buffer length
475 * Reads the part number string from the EEPROM.
477 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
479 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
483 * ixgbe_read_pba_num - Reads part number from EEPROM
484 * @hw: pointer to hardware structure
485 * @pba_num: stores the part number from the EEPROM
487 * Reads the part number from the EEPROM.
489 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
491 return ixgbe_read_pba_num_generic(hw, pba_num);
495 * ixgbe_identify_phy - Get PHY type
496 * @hw: pointer to hardware structure
498 * Determines the physical layer module found on the current adapter.
500 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
502 s32 status = IXGBE_SUCCESS;
504 if (hw->phy.type == ixgbe_phy_unknown) {
505 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
506 IXGBE_NOT_IMPLEMENTED);
513 * ixgbe_reset_phy - Perform a PHY reset
514 * @hw: pointer to hardware structure
516 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
518 s32 status = IXGBE_SUCCESS;
520 if (hw->phy.type == ixgbe_phy_unknown) {
521 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
522 status = IXGBE_ERR_PHY;
525 if (status == IXGBE_SUCCESS) {
526 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
527 IXGBE_NOT_IMPLEMENTED);
533 * ixgbe_get_phy_firmware_version -
534 * @hw: pointer to hardware structure
535 * @firmware_version: pointer to firmware version
537 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
539 s32 status = IXGBE_SUCCESS;
541 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
542 (hw, firmware_version),
543 IXGBE_NOT_IMPLEMENTED);
548 * ixgbe_read_phy_reg - Read PHY register
549 * @hw: pointer to hardware structure
550 * @reg_addr: 32 bit address of PHY register to read
551 * @phy_data: Pointer to read data from PHY register
553 * Reads a value from a specified PHY register
555 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
559 ixgbe_identify_phy(hw);
561 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
562 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
566 * ixgbe_write_phy_reg - Write PHY register
567 * @hw: pointer to hardware structure
568 * @reg_addr: 32 bit PHY register to write
569 * @phy_data: Data to write to the PHY register
571 * Writes a value to specified PHY register
573 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
577 ixgbe_identify_phy(hw);
579 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
580 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
584 * ixgbe_setup_phy_link - Restart PHY autoneg
585 * @hw: pointer to hardware structure
587 * Restart autonegotiation and PHY and waits for completion.
589 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
591 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
592 IXGBE_NOT_IMPLEMENTED);
596 * ixgbe_setup_internal_phy - Configure integrated PHY
597 * @hw: pointer to hardware structure
599 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
600 * Returns success if not implemented, since nothing needs to be done in this
603 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
605 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
610 * ixgbe_check_phy_link - Determine link and speed status
611 * @hw: pointer to hardware structure
613 * Reads a PHY register to determine if link is up and the current speed for
616 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
619 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
620 link_up), IXGBE_NOT_IMPLEMENTED);
624 * ixgbe_setup_phy_link_speed - Set auto advertise
625 * @hw: pointer to hardware structure
626 * @speed: new link speed
628 * Sets the auto advertised capabilities
630 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
631 bool autoneg_wait_to_complete)
633 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
634 autoneg_wait_to_complete),
635 IXGBE_NOT_IMPLEMENTED);
639 * ixgbe_set_phy_power - Control the phy power state
640 * @hw: pointer to hardware structure
641 * @on: true for on, false for off
643 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
645 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
646 IXGBE_NOT_IMPLEMENTED);
650 * ixgbe_check_link - Get link and speed status
651 * @hw: pointer to hardware structure
653 * Reads the links register to determine if link is up and the current speed
655 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
656 bool *link_up, bool link_up_wait_to_complete)
658 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
659 link_up, link_up_wait_to_complete),
660 IXGBE_NOT_IMPLEMENTED);
664 * ixgbe_disable_tx_laser - Disable Tx laser
665 * @hw: pointer to hardware structure
667 * If the driver needs to disable the laser on SFI optics.
669 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
671 if (hw->mac.ops.disable_tx_laser)
672 hw->mac.ops.disable_tx_laser(hw);
676 * ixgbe_enable_tx_laser - Enable Tx laser
677 * @hw: pointer to hardware structure
679 * If the driver needs to enable the laser on SFI optics.
681 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
683 if (hw->mac.ops.enable_tx_laser)
684 hw->mac.ops.enable_tx_laser(hw);
688 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
689 * @hw: pointer to hardware structure
691 * When the driver changes the link speeds that it can support then
692 * flap the tx laser to alert the link partner to start autotry
693 * process on its end.
695 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
697 if (hw->mac.ops.flap_tx_laser)
698 hw->mac.ops.flap_tx_laser(hw);
702 * ixgbe_setup_link - Set link speed
703 * @hw: pointer to hardware structure
704 * @speed: new link speed
706 * Configures link settings. Restarts the link.
707 * Performs autonegotiation if needed.
709 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
710 bool autoneg_wait_to_complete)
712 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
713 autoneg_wait_to_complete),
714 IXGBE_NOT_IMPLEMENTED);
718 * ixgbe_setup_mac_link - Set link speed
719 * @hw: pointer to hardware structure
720 * @speed: new link speed
722 * Configures link settings. Restarts the link.
723 * Performs autonegotiation if needed.
725 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
726 bool autoneg_wait_to_complete)
728 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
729 autoneg_wait_to_complete),
730 IXGBE_NOT_IMPLEMENTED);
734 * ixgbe_get_link_capabilities - Returns link capabilities
735 * @hw: pointer to hardware structure
737 * Determines the link capabilities of the current configuration.
739 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
742 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
743 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
747 * ixgbe_led_on - Turn on LEDs
748 * @hw: pointer to hardware structure
749 * @index: led number to turn on
751 * Turns on the software controllable LEDs.
753 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
755 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
756 IXGBE_NOT_IMPLEMENTED);
760 * ixgbe_led_off - Turn off LEDs
761 * @hw: pointer to hardware structure
762 * @index: led number to turn off
764 * Turns off the software controllable LEDs.
766 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
768 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
769 IXGBE_NOT_IMPLEMENTED);
773 * ixgbe_blink_led_start - Blink LEDs
774 * @hw: pointer to hardware structure
775 * @index: led number to blink
777 * Blink LED based on index.
779 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
781 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
782 IXGBE_NOT_IMPLEMENTED);
786 * ixgbe_blink_led_stop - Stop blinking LEDs
787 * @hw: pointer to hardware structure
789 * Stop blinking LED based on index.
791 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
793 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
794 IXGBE_NOT_IMPLEMENTED);
798 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
799 * @hw: pointer to hardware structure
801 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
802 * ixgbe_hw struct in order to set up EEPROM access.
804 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
806 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
807 IXGBE_NOT_IMPLEMENTED);
812 * ixgbe_write_eeprom - Write word to EEPROM
813 * @hw: pointer to hardware structure
814 * @offset: offset within the EEPROM to be written to
815 * @data: 16 bit word to be written to the EEPROM
817 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
818 * called after this function, the EEPROM will most likely contain an
821 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
823 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
824 IXGBE_NOT_IMPLEMENTED);
828 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
829 * @hw: pointer to hardware structure
830 * @offset: offset within the EEPROM to be written to
831 * @data: 16 bit word(s) to be written to the EEPROM
832 * @words: number of words
834 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
835 * called after this function, the EEPROM will most likely contain an
838 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
841 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
842 (hw, offset, words, data),
843 IXGBE_NOT_IMPLEMENTED);
847 * ixgbe_read_eeprom - Read word from EEPROM
848 * @hw: pointer to hardware structure
849 * @offset: offset within the EEPROM to be read
850 * @data: read 16 bit value from EEPROM
852 * Reads 16 bit value from EEPROM
854 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
856 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
857 IXGBE_NOT_IMPLEMENTED);
861 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
862 * @hw: pointer to hardware structure
863 * @offset: offset within the EEPROM to be read
864 * @data: read 16 bit word(s) from EEPROM
865 * @words: number of words
867 * Reads 16 bit word(s) from EEPROM
869 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
870 u16 words, u16 *data)
872 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
873 (hw, offset, words, data),
874 IXGBE_NOT_IMPLEMENTED);
878 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
879 * @hw: pointer to hardware structure
880 * @checksum_val: calculated checksum
882 * Performs checksum calculation and validates the EEPROM checksum
884 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
886 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
887 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
891 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
892 * @hw: pointer to hardware structure
894 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
896 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
897 IXGBE_NOT_IMPLEMENTED);
901 * ixgbe_insert_mac_addr - Find a RAR for this mac address
902 * @hw: pointer to hardware structure
903 * @addr: Address to put into receive address register
904 * @vmdq: VMDq pool to assign
906 * Puts an ethernet address into a receive address register, or
907 * finds the rar that it is aleady in; adds to the pool list
909 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
911 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
913 IXGBE_NOT_IMPLEMENTED);
917 * ixgbe_set_rar - Set Rx address register
918 * @hw: pointer to hardware structure
919 * @index: Receive address register to write
920 * @addr: Address to put into receive address register
922 * @enable_addr: set flag that address is active
924 * Puts an ethernet address into a receive address register.
926 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
929 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
930 enable_addr), IXGBE_NOT_IMPLEMENTED);
934 * ixgbe_clear_rar - Clear Rx address register
935 * @hw: pointer to hardware structure
936 * @index: Receive address register to write
938 * Puts an ethernet address into a receive address register.
940 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
942 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
943 IXGBE_NOT_IMPLEMENTED);
947 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
948 * @hw: pointer to hardware structure
949 * @rar: receive address register index to associate with VMDq index
950 * @vmdq: VMDq set or pool index
952 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
954 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
955 IXGBE_NOT_IMPLEMENTED);
960 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
961 * @hw: pointer to hardware structure
962 * @vmdq: VMDq default pool index
964 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
966 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
967 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
971 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
972 * @hw: pointer to hardware structure
973 * @rar: receive address register index to disassociate with VMDq index
974 * @vmdq: VMDq set or pool index
976 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
978 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
979 IXGBE_NOT_IMPLEMENTED);
983 * ixgbe_init_rx_addrs - Initializes receive address filters.
984 * @hw: pointer to hardware structure
986 * Places the MAC address in receive address register 0 and clears the rest
987 * of the receive address registers. Clears the multicast table. Assumes
988 * the receiver is in reset when the routine is called.
990 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
992 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
993 IXGBE_NOT_IMPLEMENTED);
997 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
998 * @hw: pointer to hardware structure
1000 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
1002 return hw->mac.num_rar_entries;
1006 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
1007 * @hw: pointer to hardware structure
1008 * @addr_list: the list of new multicast addresses
1009 * @addr_count: number of addresses
1010 * @func: iterator function to walk the multicast address list
1012 * The given list replaces any existing list. Clears the secondary addrs from
1013 * receive address registers. Uses unused receive address registers for the
1014 * first secondary addresses, and falls back to promiscuous mode as needed.
1016 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
1017 u32 addr_count, ixgbe_mc_addr_itr func)
1019 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
1020 addr_list, addr_count, func),
1021 IXGBE_NOT_IMPLEMENTED);
1025 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
1026 * @hw: pointer to hardware structure
1027 * @mc_addr_list: the list of new multicast addresses
1028 * @mc_addr_count: number of addresses
1029 * @func: iterator function to walk the multicast address list
1031 * The given list replaces any existing list. Clears the MC addrs from receive
1032 * address registers and the multicast table. Uses unused receive address
1033 * registers for the first multicast addresses, and hashes the rest into the
1036 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1037 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1040 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1041 mc_addr_list, mc_addr_count, func, clear),
1042 IXGBE_NOT_IMPLEMENTED);
1046 * ixgbe_enable_mc - Enable multicast address in RAR
1047 * @hw: pointer to hardware structure
1049 * Enables multicast address in RAR and the use of the multicast hash table.
1051 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1053 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1054 IXGBE_NOT_IMPLEMENTED);
1058 * ixgbe_disable_mc - Disable multicast address in RAR
1059 * @hw: pointer to hardware structure
1061 * Disables multicast address in RAR and the use of the multicast hash table.
1063 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1065 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1066 IXGBE_NOT_IMPLEMENTED);
1070 * ixgbe_clear_vfta - Clear VLAN filter table
1071 * @hw: pointer to hardware structure
1073 * Clears the VLAN filer table, and the VMDq index associated with the filter
1075 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1077 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1078 IXGBE_NOT_IMPLEMENTED);
1082 * ixgbe_set_vfta - Set VLAN filter table
1083 * @hw: pointer to hardware structure
1084 * @vlan: VLAN id to write to VLAN filter
1085 * @vind: VMDq output index that maps queue to VLAN id in VLVFB
1086 * @vlan_on: boolean flag to turn on/off VLAN
1087 * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1089 * Turn on/off specified VLAN in the VLAN filter table.
1091 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1094 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1095 vlan_on, vlvf_bypass), IXGBE_NOT_IMPLEMENTED);
1099 * ixgbe_set_vlvf - Set VLAN Pool Filter
1100 * @hw: pointer to hardware structure
1101 * @vlan: VLAN id to write to VLAN filter
1102 * @vind: VMDq output index that maps queue to VLAN id in VLVFB
1103 * @vlan_on: boolean flag to turn on/off VLAN in VLVF
1104 * @vfta_delta: pointer to the difference between the current value of VFTA
1105 * and the desired value
1106 * @vfta: the desired value of the VFTA
1107 * @vlvf_bypass: boolean flag indicating updating the default pool is okay
1109 * Turn on/off specified bit in VLVF table.
1111 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1112 u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
1114 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1115 vlan_on, vfta_delta, vfta, vlvf_bypass),
1116 IXGBE_NOT_IMPLEMENTED);
1120 * ixgbe_fc_enable - Enable flow control
1121 * @hw: pointer to hardware structure
1123 * Configures the flow control settings based on SW configuration.
1125 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1127 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1128 IXGBE_NOT_IMPLEMENTED);
1132 * ixgbe_setup_fc - Set up flow control
1133 * @hw: pointer to hardware structure
1135 * Called at init time to set up flow control.
1137 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1139 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1140 IXGBE_NOT_IMPLEMENTED);
1144 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1145 * @hw: pointer to hardware structure
1146 * @maj: driver major number to be sent to firmware
1147 * @min: driver minor number to be sent to firmware
1148 * @build: driver build number to be sent to firmware
1149 * @ver: driver version number to be sent to firmware
1150 * @len: length of driver_ver string
1151 * @driver_ver: driver string
1153 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1154 u8 ver, u16 len, char *driver_ver)
1156 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1157 build, ver, len, driver_ver),
1158 IXGBE_NOT_IMPLEMENTED);
1163 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1164 * @hw: pointer to hardware structure
1166 * Updates the temperatures in mac.thermal_sensor_data
1168 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1170 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1171 IXGBE_NOT_IMPLEMENTED);
1175 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1176 * @hw: pointer to hardware structure
1178 * Inits the thermal sensor thresholds according to the NVM map
1180 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1182 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1183 IXGBE_NOT_IMPLEMENTED);
1187 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1188 * @hw: pointer to hardware structure
1190 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1191 * When disabling dmac, dmac enable dmac bit is cleared.
1193 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1195 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1196 IXGBE_NOT_IMPLEMENTED);
1200 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1201 * @hw: pointer to hardware structure
1203 * Disables dmac, updates per TC settings, and then enable dmac.
1205 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1207 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1208 IXGBE_NOT_IMPLEMENTED);
1212 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1213 * @hw: pointer to hardware structure
1215 * Configure DMA coalescing threshold per TC and set high priority bit for
1216 * FCOE TC. The dmac enable bit must be cleared before configuring.
1218 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1220 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1221 IXGBE_NOT_IMPLEMENTED);
1225 * ixgbe_setup_eee - Enable/disable EEE support
1226 * @hw: pointer to the HW structure
1227 * @enable_eee: boolean flag to enable EEE
1229 * Enable/disable EEE based on enable_ee flag.
1230 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1234 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1236 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1237 IXGBE_NOT_IMPLEMENTED);
1241 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1242 * @hw: pointer to hardware structure
1243 * @enbale: enable or disable source address pruning
1244 * @pool: Rx pool - Rx pool to toggle source address pruning
1246 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1249 if (hw->mac.ops.set_source_address_pruning)
1250 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1254 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1255 * @hw: pointer to hardware structure
1256 * @enable: enable or disable switch for Ethertype anti-spoofing
1257 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1260 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1262 if (hw->mac.ops.set_ethertype_anti_spoofing)
1263 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1267 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1268 * @hw: pointer to hardware structure
1269 * @reg_addr: 32 bit address of PHY register to read
1270 * @device_type: type of device you want to communicate with
1271 * @phy_data: Pointer to read data from PHY register
1273 * Reads a value from a specified PHY register
1275 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1276 u32 device_type, u32 *phy_data)
1278 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1279 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1283 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1284 * @hw: pointer to hardware structure
1285 * @reg_addr: 32 bit PHY register to write
1286 * @device_type: type of device you want to communicate with
1287 * @phy_data: Data to write to the PHY register
1289 * Writes a value to specified PHY register
1291 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1292 u32 device_type, u32 phy_data)
1294 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1295 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1299 * ixgbe_disable_mdd - Disable malicious driver detection
1300 * @hw: pointer to hardware structure
1303 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1305 if (hw->mac.ops.disable_mdd)
1306 hw->mac.ops.disable_mdd(hw);
1310 * ixgbe_enable_mdd - Enable malicious driver detection
1311 * @hw: pointer to hardware structure
1314 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1316 if (hw->mac.ops.enable_mdd)
1317 hw->mac.ops.enable_mdd(hw);
1321 * ixgbe_mdd_event - Handle malicious driver detection event
1322 * @hw: pointer to hardware structure
1323 * @vf_bitmap: vf bitmap of malicious vfs
1326 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1328 if (hw->mac.ops.mdd_event)
1329 hw->mac.ops.mdd_event(hw, vf_bitmap);
1333 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1335 * @hw: pointer to hardware structure
1339 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1341 if (hw->mac.ops.restore_mdd_vf)
1342 hw->mac.ops.restore_mdd_vf(hw, vf);
1346 * ixgbe_enter_lplu - Transition to low power states
1347 * @hw: pointer to hardware structure
1349 * Configures Low Power Link Up on transition to low power states
1350 * (from D0 to non-D0).
1352 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1354 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1355 IXGBE_NOT_IMPLEMENTED);
1359 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1360 * @hw: pointer to hardware structure
1362 * Handle external Base T PHY interrupt. If high temperature
1363 * failure alarm then return error, else if link status change
1364 * then setup internal/external PHY link
1366 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1367 * failure alarm, else return PHY access status.
1369 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1371 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1372 IXGBE_NOT_IMPLEMENTED);
1376 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1377 * @hw: pointer to hardware structure
1378 * @reg: analog register to read
1381 * Performs write operation to analog register specified.
1383 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1385 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1386 val), IXGBE_NOT_IMPLEMENTED);
1390 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1391 * @hw: pointer to hardware structure
1392 * @reg: analog register to write
1393 * @val: value to write
1395 * Performs write operation to Atlas analog register specified.
1397 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1399 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1400 val), IXGBE_NOT_IMPLEMENTED);
1404 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1405 * @hw: pointer to hardware structure
1407 * Initializes the Unicast Table Arrays to zero on device load. This
1408 * is part of the Rx init addr execution path.
1410 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1412 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1413 IXGBE_NOT_IMPLEMENTED);
1417 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1418 * @hw: pointer to hardware structure
1419 * @byte_offset: byte offset to read
1420 * @dev_addr: I2C bus address to read from
1423 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1425 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1428 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1429 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1433 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1434 * @hw: pointer to hardware structure
1435 * @byte_offset: byte offset to read
1436 * @dev_addr: I2C bus address to read from
1439 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1441 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1442 u8 dev_addr, u8 *data)
1444 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1445 (hw, byte_offset, dev_addr, data),
1446 IXGBE_NOT_IMPLEMENTED);
1450 * ixgbe_read_link - Perform read operation on link device
1451 * @hw: pointer to the hardware structure
1452 * @addr: bus address to read from
1453 * @reg: device register to read from
1454 * @val: pointer to location to receive read value
1456 * Returns an error code on error.
1458 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1460 return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
1461 reg, val), IXGBE_NOT_IMPLEMENTED);
1465 * ixgbe_read_link_unlocked - Perform read operation on link device
1466 * @hw: pointer to the hardware structure
1467 * @addr: bus address to read from
1468 * @reg: device register to read from
1469 * @val: pointer to location to receive read value
1471 * Returns an error code on error.
1473 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1475 return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
1476 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1480 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1481 * @hw: pointer to hardware structure
1482 * @byte_offset: byte offset to write
1483 * @dev_addr: I2C bus address to write to
1484 * @data: value to write
1486 * Performs byte write operation to SFP module's EEPROM over I2C interface
1487 * at a specified device address.
1489 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1492 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1493 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1497 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1498 * @hw: pointer to hardware structure
1499 * @byte_offset: byte offset to write
1500 * @dev_addr: I2C bus address to write to
1501 * @data: value to write
1503 * Performs byte write operation to SFP module's EEPROM over I2C interface
1504 * at a specified device address.
1506 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1507 u8 dev_addr, u8 data)
1509 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1510 (hw, byte_offset, dev_addr, data),
1511 IXGBE_NOT_IMPLEMENTED);
1515 * ixgbe_write_link - Perform write operation on link device
1516 * @hw: pointer to the hardware structure
1517 * @addr: bus address to write to
1518 * @reg: device register to write to
1519 * @val: value to write
1521 * Returns an error code on error.
1523 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1525 return ixgbe_call_func(hw, hw->link.ops.write_link,
1526 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1530 * ixgbe_write_link_unlocked - Perform write operation on link device
1531 * @hw: pointer to the hardware structure
1532 * @addr: bus address to write to
1533 * @reg: device register to write to
1534 * @val: value to write
1536 * Returns an error code on error.
1538 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1540 return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
1541 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1545 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1546 * @hw: pointer to hardware structure
1547 * @byte_offset: EEPROM byte offset to write
1548 * @eeprom_data: value to write
1550 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1552 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1553 u8 byte_offset, u8 eeprom_data)
1555 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1556 (hw, byte_offset, eeprom_data),
1557 IXGBE_NOT_IMPLEMENTED);
1561 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1562 * @hw: pointer to hardware structure
1563 * @byte_offset: EEPROM byte offset to read
1564 * @eeprom_data: value read
1566 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1568 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1570 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1571 (hw, byte_offset, eeprom_data),
1572 IXGBE_NOT_IMPLEMENTED);
1576 * ixgbe_get_supported_physical_layer - Returns physical layer type
1577 * @hw: pointer to hardware structure
1579 * Determines physical layer capabilities of the current configuration.
1581 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1583 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1584 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1588 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1589 * @hw: pointer to hardware structure
1590 * @regval: bitfield to write to the Rx DMA register
1592 * Enables the Rx DMA unit of the device.
1594 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1596 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1597 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1601 * ixgbe_disable_sec_rx_path - Stops the receive data path
1602 * @hw: pointer to hardware structure
1604 * Stops the receive data path.
1606 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1608 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1609 (hw), IXGBE_NOT_IMPLEMENTED);
1613 * ixgbe_enable_sec_rx_path - Enables the receive data path
1614 * @hw: pointer to hardware structure
1616 * Enables the receive data path.
1618 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1620 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1621 (hw), IXGBE_NOT_IMPLEMENTED);
1625 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1626 * @hw: pointer to hardware structure
1627 * @mask: Mask to specify which semaphore to acquire
1629 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1630 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1632 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1634 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1635 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1639 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1640 * @hw: pointer to hardware structure
1641 * @mask: Mask to specify which semaphore to release
1643 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1644 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1646 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1648 if (hw->mac.ops.release_swfw_sync)
1649 hw->mac.ops.release_swfw_sync(hw, mask);
1653 * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore
1654 * @hw: pointer to hardware structure
1656 * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register.
1657 * Regardless of whether is succeeds or not it then release the semaphore.
1658 * This is function is called to recover from catastrophic failures that
1659 * may have left the semaphore locked.
1661 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)
1663 if (hw->mac.ops.init_swfw_sync)
1664 hw->mac.ops.init_swfw_sync(hw);
1668 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1670 if (hw->mac.ops.disable_rx)
1671 hw->mac.ops.disable_rx(hw);
1674 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1676 if (hw->mac.ops.enable_rx)
1677 hw->mac.ops.enable_rx(hw);
1681 * ixgbe_set_rate_select_speed - Set module link speed
1682 * @hw: pointer to hardware structure
1683 * @speed: link speed to set
1685 * Set module link speed via the rate select.
1687 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1689 if (hw->mac.ops.set_rate_select_speed)
1690 hw->mac.ops.set_rate_select_speed(hw, speed);