drivers/net/ixgbe/base/ixgbe_common.h

   1 /*******************************************************************************
   2
   3 Copyright (c) 2001-2015, Intel Corporation
   4 All rights reserved.
   5
   6 Redistribution and use in source and binary forms, with or without
   7 modification, are permitted provided that the following conditions are met:
   8
   9  1. Redistributions of source code must retain the above copyright notice,
  10     this list of conditions and the following disclaimer.
  11
  12  2. Redistributions in binary form must reproduce the above copyright
  13     notice, this list of conditions and the following disclaimer in the
  14     documentation and/or other materials provided with the distribution.
  15
  16  3. Neither the name of the Intel Corporation nor the names of its
  17     contributors may be used to endorse or promote products derived from
  18     this software without specific prior written permission.
  19
  20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30 POSSIBILITY OF SUCH DAMAGE.
  31
  32 ***************************************************************************/
  33
  34 #ifndef _IXGBE_COMMON_H_
  35 #define _IXGBE_COMMON_H_
  36
  37 #include "ixgbe_type.h"
  38 #define IXGBE_WRITE_REG64(hw, reg, value) \
  39         do { \
  40                 IXGBE_WRITE_REG(hw, reg, (u32) value); \
  41                 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
  42         } while (0)
  43 #define IXGBE_REMOVED(a) (0)
  44 struct ixgbe_pba {
  45         u16 word[2];
  46         u16 *pba_block;
  47 };
  48
  49 void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map);
  50
  51 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
  52 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
  53 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
  54 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
  55 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
  56 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
  57 s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
  58 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
  59                                   u32 pba_num_size);
  60 s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
  61                        u32 eeprom_buf_size, u16 max_pba_block_size,
  62                        struct ixgbe_pba *pba);
  63 s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
  64                         u32 eeprom_buf_size, struct ixgbe_pba *pba);
  65 s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,
  66                              u32 eeprom_buf_size, u16 *pba_block_size);
  67 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
  68 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
  69 void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);
  70 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
  71 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
  72
  73 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
  74 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
  75 s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);
  76
  77 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
  78 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
  79 s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  80                                                u16 words, u16 *data);
  81 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
  82 s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
  83                                    u16 words, u16 *data);
  84 s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
  85 s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
  86                                     u16 words, u16 *data);
  87 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  88                                        u16 *data);
  89 s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  90                                               u16 words, u16 *data);
  91 s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
  92 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
  93                                            u16 *checksum_val);
  94 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
  95 s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
  96
  97 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  98                           u32 enable_addr);
  99 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
 100 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
 101 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
 102                                       u32 mc_addr_count,
 103                                       ixgbe_mc_addr_itr func, bool clear);
 104 s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
 105                                       u32 addr_count, ixgbe_mc_addr_itr func);
 106 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
 107 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
 108 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
 109 s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
 110 s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);
 111
 112 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
 113 bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
 114 void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
 115 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);
 116
 117 s32 ixgbe_validate_mac_addr(u8 *mac_addr);
 118 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
 119 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
 120 s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
 121
 122 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
 123 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
 124
 125 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
 126 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
 127
 128 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
 129 s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
 130
 131 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
 132 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
 133 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
 134 s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
 135 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
 136 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
 137                          u32 vind, bool vlan_on, bool vlvf_bypass);
 138 s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
 139                            bool vlan_on, u32 *vfta_delta, u32 vfta,
 140                            bool vlvf_bypass);
 141 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
 142 s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);
 143
 144 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
 145                                ixgbe_link_speed *speed,
 146                                bool *link_up, bool link_up_wait_to_complete);
 147
 148 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
 149                                  u16 *wwpn_prefix);
 150
 151 s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs);
 152 void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
 153 void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
 154 s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
 155 void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
 156                              int strategy);
 157 void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);
 158 s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
 159                                  u8 build, u8 ver, u16 len, const char *str);
 160 u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
 161 s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
 162                                  u32 length, u32 timeout, bool return_data);
 163 s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout);
 164 s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *);
 165 s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity,
 166                           u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
 167 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
 168
 169 extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
 170 extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
 171 bool ixgbe_mng_present(struct ixgbe_hw *hw);
 172 bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
 173
 174 #define IXGBE_I2C_THERMAL_SENSOR_ADDR   0xF8
 175 #define IXGBE_EMC_INTERNAL_DATA         0x00
 176 #define IXGBE_EMC_INTERNAL_THERM_LIMIT  0x20
 177 #define IXGBE_EMC_DIODE1_DATA           0x01
 178 #define IXGBE_EMC_DIODE1_THERM_LIMIT    0x19
 179 #define IXGBE_EMC_DIODE2_DATA           0x23
 180 #define IXGBE_EMC_DIODE2_THERM_LIMIT    0x1A
 181 #define IXGBE_EMC_DIODE3_DATA           0x2A
 182 #define IXGBE_EMC_DIODE3_THERM_LIMIT    0x30
 183
 184 s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
 185 s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
 186 void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
 187 void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
 188 s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
 189                                           ixgbe_link_speed speed,
 190                                           bool autoneg_wait_to_complete);
 191 void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
 192                                       ixgbe_link_speed speed);
 193 #endif /* IXGBE_COMMON */