1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32 ***************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_type.h"
39 #ifndef IXGBE_VFWRITE_REG
40 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
42 #ifndef IXGBE_VFREAD_REG
43 #define IXGBE_VFREAD_REG IXGBE_READ_REG
47 * ixgbe_init_ops_vf - Initialize the pointers for vf
48 * @hw: pointer to hardware structure
50 * This will assign function pointers, adapter-specific functions can
51 * override the assignment of generic function pointers by assigning
52 * their own adapter-specific function pointers.
53 * Does not touch the hardware.
55 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
58 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
59 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
60 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
61 /* Cannot clear stats on VF */
62 hw->mac.ops.clear_hw_cntrs = NULL;
63 hw->mac.ops.get_media_type = NULL;
64 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
65 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
66 hw->mac.ops.get_bus_info = NULL;
69 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
70 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
71 hw->mac.ops.get_link_capabilities = NULL;
73 /* RAR, Multicast, VLAN */
74 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
75 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
76 hw->mac.ops.init_rx_addrs = NULL;
77 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
78 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
79 hw->mac.ops.enable_mc = NULL;
80 hw->mac.ops.disable_mc = NULL;
81 hw->mac.ops.clear_vfta = NULL;
82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
84 hw->mac.max_tx_queues = 1;
85 hw->mac.max_rx_queues = 1;
87 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
92 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
93 * @hw: pointer to hardware structure
95 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
102 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
103 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
104 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
106 /* DCA_RXCTRL default value */
107 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
108 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
109 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
111 /* DCA_TXCTRL default value */
112 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
113 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
114 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
116 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
118 for (i = 0; i < 7; i++) {
119 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
120 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
121 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
122 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
123 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
124 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
128 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
132 IXGBE_WRITE_FLUSH(hw);
136 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
137 * @hw: pointer to hardware structure
139 * Starts the hardware by filling the bus info structure and media type, clears
140 * all on chip counters, initializes receive address registers, multicast
141 * table, VLAN filter table, calls routine to set up link and flow control
142 * settings, and leaves transmit and receive units disabled and uninitialized
144 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
146 /* Clear adapter stopped flag */
147 hw->adapter_stopped = false;
149 return IXGBE_SUCCESS;
153 * ixgbe_init_hw_vf - virtual function hardware initialization
154 * @hw: pointer to hardware structure
156 * Initialize the hardware by resetting the hardware and then starting
159 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
161 s32 status = hw->mac.ops.start_hw(hw);
163 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
169 * ixgbe_reset_hw_vf - Performs hardware reset
170 * @hw: pointer to hardware structure
172 * Resets the hardware by reseting the transmit and receive units, masks and
173 * clears all interrupts.
175 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
177 struct ixgbe_mbx_info *mbx = &hw->mbx;
178 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
179 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
180 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
181 u8 *addr = (u8 *)(&msgbuf[1]);
183 DEBUGFUNC("ixgbevf_reset_hw_vf");
185 /* Call adapter stop to disable tx/rx and clear interrupts */
186 hw->mac.ops.stop_adapter(hw);
188 /* reset the api version */
189 hw->api_version = ixgbe_mbox_api_10;
191 DEBUGOUT("Issuing a function level reset to MAC\n");
193 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
194 IXGBE_WRITE_FLUSH(hw);
198 /* we cannot reset while the RSTI / RSTD bits are asserted */
199 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
205 return IXGBE_ERR_RESET_FAILED;
207 /* Reset VF registers to initial values */
208 ixgbe_virt_clr_reg(hw);
210 /* mailbox timeout can now become active */
211 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
213 msgbuf[0] = IXGBE_VF_RESET;
214 mbx->ops.write_posted(hw, msgbuf, 1, 0);
219 * set our "perm_addr" based on info provided by PF
220 * also set up the mc_filter_type which is piggy backed
221 * on the mac address in word 3
223 ret_val = mbx->ops.read_posted(hw, msgbuf,
224 IXGBE_VF_PERMADDR_MSG_LEN, 0);
228 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
229 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
230 return IXGBE_ERR_INVALID_MAC_ADDR;
232 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
233 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
235 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
241 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
242 * @hw: pointer to hardware structure
244 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
245 * disables transmit and receive units. The adapter_stopped flag is used by
246 * the shared code and drivers to determine if the adapter is in a stopped
247 * state and should not touch the hardware.
249 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
255 * Set the adapter_stopped flag so other driver functions stop touching
258 hw->adapter_stopped = true;
260 /* Clear interrupt mask to stop from interrupts being generated */
261 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
263 /* Clear any pending interrupts, flush previous writes */
264 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
266 /* Disable the transmit unit. Each queue must be disabled. */
267 for (i = 0; i < hw->mac.max_tx_queues; i++)
268 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
270 /* Disable the receive unit by stopping each queue */
271 for (i = 0; i < hw->mac.max_rx_queues; i++) {
272 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
273 reg_val &= ~IXGBE_RXDCTL_ENABLE;
274 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
276 /* Clear packet split and pool config */
277 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
279 /* flush all queues disables */
280 IXGBE_WRITE_FLUSH(hw);
283 return IXGBE_SUCCESS;
287 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
288 * @hw: pointer to hardware structure
289 * @mc_addr: the multicast address
291 * Extracts the 12 bits, from a multicast address, to determine which
292 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
293 * incoming rx multicast addresses, to determine the bit-vector to check in
294 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
295 * by the MO field of the MCSTCTRL. The MO field is set during initialization
298 STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
302 switch (hw->mac.mc_filter_type) {
303 case 0: /* use bits [47:36] of the address */
304 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
306 case 1: /* use bits [46:35] of the address */
307 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
309 case 2: /* use bits [45:34] of the address */
310 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
312 case 3: /* use bits [43:32] of the address */
313 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
315 default: /* Invalid mc_filter_type */
316 DEBUGOUT("MC filter type param set incorrectly\n");
321 /* vector can only be 12-bits or boundary will be exceeded */
326 STATIC void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
329 struct ixgbe_mbx_info *mbx = &hw->mbx;
330 u32 retmsg[IXGBE_VFMAILBOX_SIZE];
331 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
334 mbx->ops.read_posted(hw, retmsg, size, 0);
338 * ixgbe_set_rar_vf - set device MAC address
339 * @hw: pointer to hardware structure
340 * @index: Receive address register to write
341 * @addr: Address to put into receive address register
342 * @vmdq: VMDq "set" or "pool" index
343 * @enable_addr: set flag that address is active
345 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
348 struct ixgbe_mbx_info *mbx = &hw->mbx;
350 u8 *msg_addr = (u8 *)(&msgbuf[1]);
352 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
354 memset(msgbuf, 0, 12);
355 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
356 memcpy(msg_addr, addr, 6);
357 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
360 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
362 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
364 /* if nacked the address was rejected, use "perm_addr" */
366 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) {
367 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
368 return IXGBE_ERR_MBX;
375 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
376 * @hw: pointer to the HW structure
377 * @mc_addr_list: array of multicast addresses to program
378 * @mc_addr_count: number of multicast addresses to program
379 * @next: caller supplied function to return next address in list
381 * Updates the Multicast Table Array.
383 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
384 u32 mc_addr_count, ixgbe_mc_addr_itr next,
387 struct ixgbe_mbx_info *mbx = &hw->mbx;
388 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
389 u16 *vector_list = (u16 *)&msgbuf[1];
394 UNREFERENCED_1PARAMETER(clear);
396 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
398 /* Each entry in the list uses 1 16 bit word. We have 30
399 * 16 bit words available in our HW msg buffer (minus 1 for the
400 * msg type). That's 30 hash values if we pack 'em right. If
401 * there are more than 30 MC addresses to add then punt the
402 * extras for now and then add code to handle more than 30 later.
403 * It would be unusual for a server to request that many multi-cast
404 * addresses except for in large enterprise network environments.
407 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
409 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
410 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
411 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
413 for (i = 0; i < cnt; i++) {
414 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
415 DEBUGOUT1("Hash value = 0x%03X\n", vector);
416 vector_list[i] = (u16)vector;
419 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
423 * ixgbevf_update_xcast_mode - Update Multicast mode
424 * @hw: pointer to the HW structure
425 * @xcast_mode: new multicast mode
427 * Updates the Multicast Mode of VF.
429 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
431 struct ixgbe_mbx_info *mbx = &hw->mbx;
435 switch (hw->api_version) {
436 case ixgbe_mbox_api_12:
439 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
442 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
443 msgbuf[1] = xcast_mode;
445 err = mbx->ops.write_posted(hw, msgbuf, 2, 0);
449 err = mbx->ops.read_posted(hw, msgbuf, 2, 0);
453 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
454 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK))
455 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
456 return IXGBE_SUCCESS;
460 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
461 * @hw: pointer to the HW structure
462 * @vlan: 12 bit VLAN ID
463 * @vind: unused by VF drivers
464 * @vlan_on: if true then set bit, else clear bit
465 * @vlvf_bypass: boolean flag indicating updating default pool is okay
467 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
468 bool vlan_on, bool vlvf_bypass)
470 struct ixgbe_mbx_info *mbx = &hw->mbx;
473 UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
475 msgbuf[0] = IXGBE_VF_SET_VLAN;
477 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
478 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
480 ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0);
482 ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0);
484 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
485 return IXGBE_SUCCESS;
487 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
491 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
492 * @hw: pointer to hardware structure
494 * Returns the number of transmit queues for the given adapter.
496 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
498 UNREFERENCED_1PARAMETER(hw);
499 return IXGBE_VF_MAX_TX_QUEUES;
503 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
504 * @hw: pointer to hardware structure
506 * Returns the number of receive queues for the given adapter.
508 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
510 UNREFERENCED_1PARAMETER(hw);
511 return IXGBE_VF_MAX_RX_QUEUES;
515 * ixgbe_get_mac_addr_vf - Read device MAC address
516 * @hw: pointer to the HW structure
518 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
522 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
523 mac_addr[i] = hw->mac.perm_addr[i];
525 return IXGBE_SUCCESS;
528 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
530 struct ixgbe_mbx_info *mbx = &hw->mbx;
532 u8 *msg_addr = (u8 *)(&msgbuf[1]);
535 memset(msgbuf, 0, sizeof(msgbuf));
537 * If index is one then this is the start of a new list and needs
538 * indication to the PF so it can do it's own list management.
539 * If it is zero then that tells the PF to just clear all of
540 * this VF's macvlans and there is no new list.
542 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
543 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
545 memcpy(msg_addr, addr, 6);
546 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
549 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
551 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
554 if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
555 ret_val = IXGBE_ERR_OUT_OF_MEM;
561 * ixgbe_setup_mac_link_vf - Setup MAC link settings
562 * @hw: pointer to hardware structure
563 * @speed: new link speed
564 * @autoneg: true if autonegotiation enabled
565 * @autoneg_wait_to_complete: true when waiting for completion is needed
567 * Set the link speed in the AUTOC register and restarts link.
569 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
570 bool autoneg_wait_to_complete)
572 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
573 return IXGBE_SUCCESS;
577 * ixgbe_check_mac_link_vf - Get link/speed status
578 * @hw: pointer to hardware structure
579 * @speed: pointer to link speed
580 * @link_up: true is link is up, false otherwise
581 * @autoneg_wait_to_complete: true when waiting for completion is needed
583 * Reads the links register to determine if link is up and the current speed
585 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
586 bool *link_up, bool autoneg_wait_to_complete)
588 struct ixgbe_mbx_info *mbx = &hw->mbx;
589 struct ixgbe_mac_info *mac = &hw->mac;
590 s32 ret_val = IXGBE_SUCCESS;
593 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
595 /* If we were hit with a reset drop the link */
596 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
597 mac->get_link_status = true;
599 if (!mac->get_link_status)
602 /* if link status is down no point in checking to see if pf is up */
603 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
604 if (!(links_reg & IXGBE_LINKS_UP))
607 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
608 * before the link status is correct
610 if (mac->type == ixgbe_mac_82599_vf) {
613 for (i = 0; i < 5; i++) {
615 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
617 if (!(links_reg & IXGBE_LINKS_UP))
622 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
623 case IXGBE_LINKS_SPEED_10G_82599:
624 *speed = IXGBE_LINK_SPEED_10GB_FULL;
626 case IXGBE_LINKS_SPEED_1G_82599:
627 *speed = IXGBE_LINK_SPEED_1GB_FULL;
629 case IXGBE_LINKS_SPEED_100_82599:
630 *speed = IXGBE_LINK_SPEED_100_FULL;
634 /* if the read failed it could just be a mailbox collision, best wait
635 * until we are called again and don't report an error
637 if (mbx->ops.read(hw, &in_msg, 1, 0))
640 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
641 /* msg is not CTS and is NACK we must have lost CTS status */
642 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
647 /* the pf is talking, if we timed out in the past we reinit */
653 /* if we passed all the tests above then the link is up and we no
654 * longer need to check for link
656 mac->get_link_status = false;
659 *link_up = !mac->get_link_status;
664 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
665 * @hw: pointer to the HW structure
666 * @max_size: value to assign to max frame size
668 void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
672 msgbuf[0] = IXGBE_VF_SET_LPE;
673 msgbuf[1] = max_size;
674 ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
678 * ixgbevf_negotiate_api_version - Negotiate supported API version
679 * @hw: pointer to the HW structure
680 * @api: integer containing requested API version
682 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
687 /* Negotiate the mailbox API version */
688 msg[0] = IXGBE_VF_API_NEGOTIATE;
691 err = hw->mbx.ops.write_posted(hw, msg, 3, 0);
694 err = hw->mbx.ops.read_posted(hw, msg, 3, 0);
697 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
699 /* Store value and return 0 on success */
700 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
701 hw->api_version = api;
705 err = IXGBE_ERR_INVALID_ARGUMENT;
711 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
712 unsigned int *default_tc)
717 /* do nothing if API doesn't support ixgbevf_get_queues */
718 switch (hw->api_version) {
719 case ixgbe_mbox_api_11:
720 case ixgbe_mbox_api_12:
726 /* Fetch queue configuration from the PF */
727 msg[0] = IXGBE_VF_GET_QUEUES;
728 msg[1] = msg[2] = msg[3] = msg[4] = 0;
729 err = hw->mbx.ops.write_posted(hw, msg, 5, 0);
732 err = hw->mbx.ops.read_posted(hw, msg, 5, 0);
735 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
738 * if we we didn't get an ACK there must have been
739 * some sort of mailbox error so we should treat it
742 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK))
743 return IXGBE_ERR_MBX;
745 /* record and validate values from message */
746 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
747 if (hw->mac.max_tx_queues == 0 ||
748 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
749 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
751 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
752 if (hw->mac.max_rx_queues == 0 ||
753 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
754 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
756 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
757 /* in case of unknown state assume we cannot tag frames */
758 if (*num_tcs > hw->mac.max_rx_queues)
761 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
762 /* default to queue 0 on out-of-bounds queue number */
763 if (*default_tc >= hw->mac.max_tx_queues)