1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
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13 notice, this list of conditions and the following disclaimer in the
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18 this software without specific prior written permission.
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21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32 ***************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_type.h"
39 #ifndef IXGBE_VFWRITE_REG
40 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
42 #ifndef IXGBE_VFREAD_REG
43 #define IXGBE_VFREAD_REG IXGBE_READ_REG
47 * ixgbe_init_ops_vf - Initialize the pointers for vf
48 * @hw: pointer to hardware structure
50 * This will assign function pointers, adapter-specific functions can
51 * override the assignment of generic function pointers by assigning
52 * their own adapter-specific function pointers.
53 * Does not touch the hardware.
55 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
58 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
59 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
60 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
61 /* Cannot clear stats on VF */
62 hw->mac.ops.clear_hw_cntrs = NULL;
63 hw->mac.ops.get_media_type = NULL;
64 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
65 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
66 hw->mac.ops.get_bus_info = NULL;
69 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
70 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
71 hw->mac.ops.get_link_capabilities = NULL;
73 /* RAR, Multicast, VLAN */
74 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
75 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
76 hw->mac.ops.init_rx_addrs = NULL;
77 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
78 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
79 hw->mac.ops.enable_mc = NULL;
80 hw->mac.ops.disable_mc = NULL;
81 hw->mac.ops.clear_vfta = NULL;
82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
84 hw->mac.max_tx_queues = 1;
85 hw->mac.max_rx_queues = 1;
87 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
92 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
93 * @hw: pointer to hardware structure
95 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
102 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
103 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
104 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
106 /* DCA_RXCTRL default value */
107 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
108 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
109 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
111 /* DCA_TXCTRL default value */
112 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
113 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
114 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
116 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
118 for (i = 0; i < 7; i++) {
119 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
120 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
121 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
122 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
123 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
124 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
128 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
132 IXGBE_WRITE_FLUSH(hw);
136 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
137 * @hw: pointer to hardware structure
139 * Starts the hardware by filling the bus info structure and media type, clears
140 * all on chip counters, initializes receive address registers, multicast
141 * table, VLAN filter table, calls routine to set up link and flow control
142 * settings, and leaves transmit and receive units disabled and uninitialized
144 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
146 /* Clear adapter stopped flag */
147 hw->adapter_stopped = false;
149 return IXGBE_SUCCESS;
153 * ixgbe_init_hw_vf - virtual function hardware initialization
154 * @hw: pointer to hardware structure
156 * Initialize the hardware by resetting the hardware and then starting
159 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
161 s32 status = hw->mac.ops.start_hw(hw);
163 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
169 * ixgbe_reset_hw_vf - Performs hardware reset
170 * @hw: pointer to hardware structure
172 * Resets the hardware by reseting the transmit and receive units, masks and
173 * clears all interrupts.
175 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
177 struct ixgbe_mbx_info *mbx = &hw->mbx;
178 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
179 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
180 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
181 u8 *addr = (u8 *)(&msgbuf[1]);
183 DEBUGFUNC("ixgbevf_reset_hw_vf");
185 /* Call adapter stop to disable tx/rx and clear interrupts */
186 hw->mac.ops.stop_adapter(hw);
188 /* reset the api version */
189 hw->api_version = ixgbe_mbox_api_10;
191 DEBUGOUT("Issuing a function level reset to MAC\n");
193 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
194 IXGBE_WRITE_FLUSH(hw);
198 /* we cannot reset while the RSTI / RSTD bits are asserted */
199 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
205 return IXGBE_ERR_RESET_FAILED;
207 /* Reset VF registers to initial values */
208 ixgbe_virt_clr_reg(hw);
210 /* mailbox timeout can now become active */
211 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
213 msgbuf[0] = IXGBE_VF_RESET;
214 mbx->ops.write_posted(hw, msgbuf, 1, 0);
219 * set our "perm_addr" based on info provided by PF
220 * also set up the mc_filter_type which is piggy backed
221 * on the mac address in word 3
223 ret_val = mbx->ops.read_posted(hw, msgbuf,
224 IXGBE_VF_PERMADDR_MSG_LEN, 0);
228 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
229 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
230 return IXGBE_ERR_INVALID_MAC_ADDR;
232 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
233 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
235 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
241 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
242 * @hw: pointer to hardware structure
244 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
245 * disables transmit and receive units. The adapter_stopped flag is used by
246 * the shared code and drivers to determine if the adapter is in a stopped
247 * state and should not touch the hardware.
249 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
255 * Set the adapter_stopped flag so other driver functions stop touching
258 hw->adapter_stopped = true;
260 /* Clear interrupt mask to stop from interrupts being generated */
261 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
263 /* Clear any pending interrupts, flush previous writes */
264 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
266 /* Disable the transmit unit. Each queue must be disabled. */
267 for (i = 0; i < hw->mac.max_tx_queues; i++)
268 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
270 /* Disable the receive unit by stopping each queue */
271 for (i = 0; i < hw->mac.max_rx_queues; i++) {
272 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
273 reg_val &= ~IXGBE_RXDCTL_ENABLE;
274 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
276 /* Clear packet split and pool config */
277 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
279 /* flush all queues disables */
280 IXGBE_WRITE_FLUSH(hw);
283 return IXGBE_SUCCESS;
287 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
288 * @hw: pointer to hardware structure
289 * @mc_addr: the multicast address
291 * Extracts the 12 bits, from a multicast address, to determine which
292 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
293 * incoming rx multicast addresses, to determine the bit-vector to check in
294 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
295 * by the MO field of the MCSTCTRL. The MO field is set during initialization
298 STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
302 switch (hw->mac.mc_filter_type) {
303 case 0: /* use bits [47:36] of the address */
304 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
306 case 1: /* use bits [46:35] of the address */
307 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
309 case 2: /* use bits [45:34] of the address */
310 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
312 case 3: /* use bits [43:32] of the address */
313 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
315 default: /* Invalid mc_filter_type */
316 DEBUGOUT("MC filter type param set incorrectly\n");
321 /* vector can only be 12-bits or boundary will be exceeded */
326 STATIC s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
327 u32 *retmsg, u16 size)
329 struct ixgbe_mbx_info *mbx = &hw->mbx;
330 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
335 return mbx->ops.read_posted(hw, retmsg, size, 0);
339 * ixgbe_set_rar_vf - set device MAC address
340 * @hw: pointer to hardware structure
341 * @index: Receive address register to write
342 * @addr: Address to put into receive address register
343 * @vmdq: VMDq "set" or "pool" index
344 * @enable_addr: set flag that address is active
346 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
350 u8 *msg_addr = (u8 *)(&msgbuf[1]);
352 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
354 memset(msgbuf, 0, 12);
355 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
356 memcpy(msg_addr, addr, 6);
357 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
359 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
361 /* if nacked the address was rejected, use "perm_addr" */
363 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) {
364 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
365 return IXGBE_ERR_MBX;
372 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
373 * @hw: pointer to the HW structure
374 * @mc_addr_list: array of multicast addresses to program
375 * @mc_addr_count: number of multicast addresses to program
376 * @next: caller supplied function to return next address in list
378 * Updates the Multicast Table Array.
380 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
381 u32 mc_addr_count, ixgbe_mc_addr_itr next,
384 struct ixgbe_mbx_info *mbx = &hw->mbx;
385 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
386 u16 *vector_list = (u16 *)&msgbuf[1];
391 UNREFERENCED_1PARAMETER(clear);
393 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
395 /* Each entry in the list uses 1 16 bit word. We have 30
396 * 16 bit words available in our HW msg buffer (minus 1 for the
397 * msg type). That's 30 hash values if we pack 'em right. If
398 * there are more than 30 MC addresses to add then punt the
399 * extras for now and then add code to handle more than 30 later.
400 * It would be unusual for a server to request that many multi-cast
401 * addresses except for in large enterprise network environments.
404 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
406 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
407 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
408 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
410 for (i = 0; i < cnt; i++) {
411 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
412 DEBUGOUT1("Hash value = 0x%03X\n", vector);
413 vector_list[i] = (u16)vector;
416 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
420 * ixgbevf_update_xcast_mode - Update Multicast mode
421 * @hw: pointer to the HW structure
422 * @xcast_mode: new multicast mode
424 * Updates the Multicast Mode of VF.
426 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
431 switch (hw->api_version) {
432 case ixgbe_mbox_api_12:
433 case ixgbe_mbox_api_13:
436 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
439 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
440 msgbuf[1] = xcast_mode;
442 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
446 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
447 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK))
448 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
449 return IXGBE_SUCCESS;
453 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
454 * @hw: pointer to the HW structure
455 * @vlan: 12 bit VLAN ID
456 * @vind: unused by VF drivers
457 * @vlan_on: if true then set bit, else clear bit
458 * @vlvf_bypass: boolean flag indicating updating default pool is okay
460 * Turn on/off specified VLAN in the VLAN filter table.
462 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
463 bool vlan_on, bool vlvf_bypass)
467 UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
469 msgbuf[0] = IXGBE_VF_SET_VLAN;
471 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
472 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
474 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
475 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
476 return IXGBE_SUCCESS;
478 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
482 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
483 * @hw: pointer to hardware structure
485 * Returns the number of transmit queues for the given adapter.
487 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
489 UNREFERENCED_1PARAMETER(hw);
490 return IXGBE_VF_MAX_TX_QUEUES;
494 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
495 * @hw: pointer to hardware structure
497 * Returns the number of receive queues for the given adapter.
499 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
501 UNREFERENCED_1PARAMETER(hw);
502 return IXGBE_VF_MAX_RX_QUEUES;
506 * ixgbe_get_mac_addr_vf - Read device MAC address
507 * @hw: pointer to the HW structure
509 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
513 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
514 mac_addr[i] = hw->mac.perm_addr[i];
516 return IXGBE_SUCCESS;
519 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
521 u32 msgbuf[3], msgbuf_chk;
522 u8 *msg_addr = (u8 *)(&msgbuf[1]);
525 memset(msgbuf, 0, sizeof(msgbuf));
527 * If index is one then this is the start of a new list and needs
528 * indication to the PF so it can do it's own list management.
529 * If it is zero then that tells the PF to just clear all of
530 * this VF's macvlans and there is no new list.
532 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
533 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
534 msgbuf_chk = msgbuf[0];
536 memcpy(msg_addr, addr, 6);
538 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
540 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
542 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK))
543 return IXGBE_ERR_OUT_OF_MEM;
550 * ixgbe_setup_mac_link_vf - Setup MAC link settings
551 * @hw: pointer to hardware structure
552 * @speed: new link speed
553 * @autoneg: true if autonegotiation enabled
554 * @autoneg_wait_to_complete: true when waiting for completion is needed
556 * Set the link speed in the AUTOC register and restarts link.
558 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
559 bool autoneg_wait_to_complete)
561 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
562 return IXGBE_SUCCESS;
566 * ixgbe_check_mac_link_vf - Get link/speed status
567 * @hw: pointer to hardware structure
568 * @speed: pointer to link speed
569 * @link_up: true is link is up, false otherwise
570 * @autoneg_wait_to_complete: true when waiting for completion is needed
572 * Reads the links register to determine if link is up and the current speed
574 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
575 bool *link_up, bool autoneg_wait_to_complete)
577 struct ixgbe_mbx_info *mbx = &hw->mbx;
578 struct ixgbe_mac_info *mac = &hw->mac;
579 s32 ret_val = IXGBE_SUCCESS;
582 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
584 /* If we were hit with a reset drop the link */
585 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
586 mac->get_link_status = true;
588 if (!mac->get_link_status)
591 /* if link status is down no point in checking to see if pf is up */
592 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
593 if (!(links_reg & IXGBE_LINKS_UP))
596 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
597 * before the link status is correct
599 if (mac->type == ixgbe_mac_82599_vf) {
602 for (i = 0; i < 5; i++) {
604 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
606 if (!(links_reg & IXGBE_LINKS_UP))
611 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
612 case IXGBE_LINKS_SPEED_10G_82599:
613 *speed = IXGBE_LINK_SPEED_10GB_FULL;
615 case IXGBE_LINKS_SPEED_1G_82599:
616 *speed = IXGBE_LINK_SPEED_1GB_FULL;
618 case IXGBE_LINKS_SPEED_100_82599:
619 *speed = IXGBE_LINK_SPEED_100_FULL;
623 /* if the read failed it could just be a mailbox collision, best wait
624 * until we are called again and don't report an error
626 if (mbx->ops.read(hw, &in_msg, 1, 0))
629 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
630 /* msg is not CTS and is NACK we must have lost CTS status */
631 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
636 /* the pf is talking, if we timed out in the past we reinit */
642 /* if we passed all the tests above then the link is up and we no
643 * longer need to check for link
645 mac->get_link_status = false;
648 *link_up = !mac->get_link_status;
653 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
654 * @hw: pointer to the HW structure
655 * @max_size: value to assign to max frame size
657 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
662 msgbuf[0] = IXGBE_VF_SET_LPE;
663 msgbuf[1] = max_size;
665 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
668 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
669 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK))
670 return IXGBE_ERR_MBX;
676 * ixgbevf_negotiate_api_version - Negotiate supported API version
677 * @hw: pointer to the HW structure
678 * @api: integer containing requested API version
680 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
685 /* Negotiate the mailbox API version */
686 msg[0] = IXGBE_VF_API_NEGOTIATE;
690 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
692 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
694 /* Store value and return 0 on success */
695 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
696 hw->api_version = api;
700 err = IXGBE_ERR_INVALID_ARGUMENT;
706 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
707 unsigned int *default_tc)
712 /* do nothing if API doesn't support ixgbevf_get_queues */
713 switch (hw->api_version) {
714 case ixgbe_mbox_api_11:
715 case ixgbe_mbox_api_12:
716 case ixgbe_mbox_api_13:
722 /* Fetch queue configuration from the PF */
723 msg[0] = IXGBE_VF_GET_QUEUES;
724 msg[1] = msg[2] = msg[3] = msg[4] = 0;
726 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
728 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
731 * if we we didn't get an ACK there must have been
732 * some sort of mailbox error so we should treat it
735 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK))
736 return IXGBE_ERR_MBX;
738 /* record and validate values from message */
739 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
740 if (hw->mac.max_tx_queues == 0 ||
741 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
742 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
744 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
745 if (hw->mac.max_rx_queues == 0 ||
746 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
747 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
749 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
750 /* in case of unknown state assume we cannot tag frames */
751 if (*num_tcs > hw->mac.max_rx_queues)
754 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
755 /* default to queue 0 on out-of-bounds queue number */
756 if (*default_tc >= hw->mac.max_tx_queues)