1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32 ***************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_type.h"
39 #ifndef IXGBE_VFWRITE_REG
40 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
42 #ifndef IXGBE_VFREAD_REG
43 #define IXGBE_VFREAD_REG IXGBE_READ_REG
47 * ixgbe_init_ops_vf - Initialize the pointers for vf
48 * @hw: pointer to hardware structure
50 * This will assign function pointers, adapter-specific functions can
51 * override the assignment of generic function pointers by assigning
52 * their own adapter-specific function pointers.
53 * Does not touch the hardware.
55 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
58 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
59 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
60 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
61 /* Cannot clear stats on VF */
62 hw->mac.ops.clear_hw_cntrs = NULL;
63 hw->mac.ops.get_media_type = NULL;
64 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
65 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
66 hw->mac.ops.get_bus_info = NULL;
69 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
70 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
71 hw->mac.ops.get_link_capabilities = NULL;
73 /* RAR, Multicast, VLAN */
74 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
75 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
76 hw->mac.ops.init_rx_addrs = NULL;
77 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
78 hw->mac.ops.enable_mc = NULL;
79 hw->mac.ops.disable_mc = NULL;
80 hw->mac.ops.clear_vfta = NULL;
81 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
83 hw->mac.max_tx_queues = 1;
84 hw->mac.max_rx_queues = 1;
86 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
91 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
92 * @hw: pointer to hardware structure
94 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
101 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
102 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
103 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
105 /* DCA_RXCTRL default value */
106 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
107 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
108 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
110 /* DCA_TXCTRL default value */
111 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
112 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
113 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
115 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
117 for (i = 0; i < 7; i++) {
118 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
119 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
120 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
121 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
122 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
123 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
124 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
128 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
131 IXGBE_WRITE_FLUSH(hw);
135 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
136 * @hw: pointer to hardware structure
138 * Starts the hardware by filling the bus info structure and media type, clears
139 * all on chip counters, initializes receive address registers, multicast
140 * table, VLAN filter table, calls routine to set up link and flow control
141 * settings, and leaves transmit and receive units disabled and uninitialized
143 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
145 /* Clear adapter stopped flag */
146 hw->adapter_stopped = false;
148 return IXGBE_SUCCESS;
152 * ixgbe_init_hw_vf - virtual function hardware initialization
153 * @hw: pointer to hardware structure
155 * Initialize the hardware by resetting the hardware and then starting
158 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
160 s32 status = hw->mac.ops.start_hw(hw);
162 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
168 * ixgbe_reset_hw_vf - Performs hardware reset
169 * @hw: pointer to hardware structure
171 * Resets the hardware by reseting the transmit and receive units, masks and
172 * clears all interrupts.
174 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
176 struct ixgbe_mbx_info *mbx = &hw->mbx;
177 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
178 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
179 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
180 u8 *addr = (u8 *)(&msgbuf[1]);
182 DEBUGFUNC("ixgbevf_reset_hw_vf");
184 /* Call adapter stop to disable tx/rx and clear interrupts */
185 hw->mac.ops.stop_adapter(hw);
187 /* reset the api version */
188 hw->api_version = ixgbe_mbox_api_10;
190 DEBUGOUT("Issuing a function level reset to MAC\n");
192 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
193 IXGBE_WRITE_FLUSH(hw);
197 /* we cannot reset while the RSTI / RSTD bits are asserted */
198 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
204 return IXGBE_ERR_RESET_FAILED;
206 /* Reset VF registers to initial values */
207 ixgbe_virt_clr_reg(hw);
209 /* mailbox timeout can now become active */
210 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
212 msgbuf[0] = IXGBE_VF_RESET;
213 mbx->ops.write_posted(hw, msgbuf, 1, 0);
218 * set our "perm_addr" based on info provided by PF
219 * also set up the mc_filter_type which is piggy backed
220 * on the mac address in word 3
222 ret_val = mbx->ops.read_posted(hw, msgbuf,
223 IXGBE_VF_PERMADDR_MSG_LEN, 0);
227 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
228 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
229 return IXGBE_ERR_INVALID_MAC_ADDR;
231 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
232 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
234 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
240 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
241 * @hw: pointer to hardware structure
243 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
244 * disables transmit and receive units. The adapter_stopped flag is used by
245 * the shared code and drivers to determine if the adapter is in a stopped
246 * state and should not touch the hardware.
248 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
254 * Set the adapter_stopped flag so other driver functions stop touching
257 hw->adapter_stopped = true;
259 /* Clear interrupt mask to stop from interrupts being generated */
260 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
262 /* Clear any pending interrupts, flush previous writes */
263 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
265 /* Disable the transmit unit. Each queue must be disabled. */
266 for (i = 0; i < hw->mac.max_tx_queues; i++)
267 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
269 /* Disable the receive unit by stopping each queue */
270 for (i = 0; i < hw->mac.max_rx_queues; i++) {
271 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
272 reg_val &= ~IXGBE_RXDCTL_ENABLE;
273 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
275 /* Clear packet split and pool config */
276 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
278 /* flush all queues disables */
279 IXGBE_WRITE_FLUSH(hw);
282 return IXGBE_SUCCESS;
286 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
287 * @hw: pointer to hardware structure
288 * @mc_addr: the multicast address
290 * Extracts the 12 bits, from a multicast address, to determine which
291 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
292 * incoming rx multicast addresses, to determine the bit-vector to check in
293 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
294 * by the MO field of the MCSTCTRL. The MO field is set during initialization
297 STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
301 switch (hw->mac.mc_filter_type) {
302 case 0: /* use bits [47:36] of the address */
303 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
305 case 1: /* use bits [46:35] of the address */
306 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
308 case 2: /* use bits [45:34] of the address */
309 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
311 case 3: /* use bits [43:32] of the address */
312 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
314 default: /* Invalid mc_filter_type */
315 DEBUGOUT("MC filter type param set incorrectly\n");
320 /* vector can only be 12-bits or boundary will be exceeded */
325 STATIC void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
328 struct ixgbe_mbx_info *mbx = &hw->mbx;
329 u32 retmsg[IXGBE_VFMAILBOX_SIZE];
330 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
333 mbx->ops.read_posted(hw, retmsg, size, 0);
337 * ixgbe_set_rar_vf - set device MAC address
338 * @hw: pointer to hardware structure
339 * @index: Receive address register to write
340 * @addr: Address to put into receive address register
341 * @vmdq: VMDq "set" or "pool" index
342 * @enable_addr: set flag that address is active
344 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
347 struct ixgbe_mbx_info *mbx = &hw->mbx;
349 u8 *msg_addr = (u8 *)(&msgbuf[1]);
351 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
353 memset(msgbuf, 0, 12);
354 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
355 memcpy(msg_addr, addr, 6);
356 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
359 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
361 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
363 /* if nacked the address was rejected, use "perm_addr" */
365 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) {
366 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
367 return IXGBE_ERR_MBX;
374 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
375 * @hw: pointer to the HW structure
376 * @mc_addr_list: array of multicast addresses to program
377 * @mc_addr_count: number of multicast addresses to program
378 * @next: caller supplied function to return next address in list
380 * Updates the Multicast Table Array.
382 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
383 u32 mc_addr_count, ixgbe_mc_addr_itr next,
386 struct ixgbe_mbx_info *mbx = &hw->mbx;
387 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
388 u16 *vector_list = (u16 *)&msgbuf[1];
393 UNREFERENCED_1PARAMETER(clear);
395 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
397 /* Each entry in the list uses 1 16 bit word. We have 30
398 * 16 bit words available in our HW msg buffer (minus 1 for the
399 * msg type). That's 30 hash values if we pack 'em right. If
400 * there are more than 30 MC addresses to add then punt the
401 * extras for now and then add code to handle more than 30 later.
402 * It would be unusual for a server to request that many multi-cast
403 * addresses except for in large enterprise network environments.
406 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
408 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
409 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
410 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
412 for (i = 0; i < cnt; i++) {
413 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
414 DEBUGOUT1("Hash value = 0x%03X\n", vector);
415 vector_list[i] = (u16)vector;
418 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
422 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
423 * @hw: pointer to the HW structure
424 * @vlan: 12 bit VLAN ID
425 * @vind: unused by VF drivers
426 * @vlan_on: if true then set bit, else clear bit
428 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
430 struct ixgbe_mbx_info *mbx = &hw->mbx;
433 UNREFERENCED_1PARAMETER(vind);
435 msgbuf[0] = IXGBE_VF_SET_VLAN;
437 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
438 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
440 ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0);
442 ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0);
444 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
445 return IXGBE_SUCCESS;
447 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
451 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
452 * @hw: pointer to hardware structure
454 * Returns the number of transmit queues for the given adapter.
456 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
458 UNREFERENCED_1PARAMETER(hw);
459 return IXGBE_VF_MAX_TX_QUEUES;
463 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
464 * @hw: pointer to hardware structure
466 * Returns the number of receive queues for the given adapter.
468 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
470 UNREFERENCED_1PARAMETER(hw);
471 return IXGBE_VF_MAX_RX_QUEUES;
475 * ixgbe_get_mac_addr_vf - Read device MAC address
476 * @hw: pointer to the HW structure
478 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
482 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
483 mac_addr[i] = hw->mac.perm_addr[i];
485 return IXGBE_SUCCESS;
488 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
490 struct ixgbe_mbx_info *mbx = &hw->mbx;
492 u8 *msg_addr = (u8 *)(&msgbuf[1]);
495 memset(msgbuf, 0, sizeof(msgbuf));
497 * If index is one then this is the start of a new list and needs
498 * indication to the PF so it can do it's own list management.
499 * If it is zero then that tells the PF to just clear all of
500 * this VF's macvlans and there is no new list.
502 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
503 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
505 memcpy(msg_addr, addr, 6);
506 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
509 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
511 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
514 if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
515 ret_val = IXGBE_ERR_OUT_OF_MEM;
521 * ixgbe_setup_mac_link_vf - Setup MAC link settings
522 * @hw: pointer to hardware structure
523 * @speed: new link speed
524 * @autoneg: true if autonegotiation enabled
525 * @autoneg_wait_to_complete: true when waiting for completion is needed
527 * Set the link speed in the AUTOC register and restarts link.
529 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
530 bool autoneg_wait_to_complete)
532 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
533 return IXGBE_SUCCESS;
537 * ixgbe_check_mac_link_vf - Get link/speed status
538 * @hw: pointer to hardware structure
539 * @speed: pointer to link speed
540 * @link_up: true is link is up, false otherwise
541 * @autoneg_wait_to_complete: true when waiting for completion is needed
543 * Reads the links register to determine if link is up and the current speed
545 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
546 bool *link_up, bool autoneg_wait_to_complete)
548 struct ixgbe_mbx_info *mbx = &hw->mbx;
549 struct ixgbe_mac_info *mac = &hw->mac;
550 s32 ret_val = IXGBE_SUCCESS;
553 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
555 /* If we were hit with a reset drop the link */
556 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
557 mac->get_link_status = true;
559 if (!mac->get_link_status)
562 /* if link status is down no point in checking to see if pf is up */
563 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
564 if (!(links_reg & IXGBE_LINKS_UP))
567 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
568 * before the link status is correct
570 if (mac->type == ixgbe_mac_82599_vf) {
573 for (i = 0; i < 5; i++) {
575 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
577 if (!(links_reg & IXGBE_LINKS_UP))
582 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
583 case IXGBE_LINKS_SPEED_10G_82599:
584 *speed = IXGBE_LINK_SPEED_10GB_FULL;
586 case IXGBE_LINKS_SPEED_1G_82599:
587 *speed = IXGBE_LINK_SPEED_1GB_FULL;
589 case IXGBE_LINKS_SPEED_100_82599:
590 *speed = IXGBE_LINK_SPEED_100_FULL;
594 /* if the read failed it could just be a mailbox collision, best wait
595 * until we are called again and don't report an error
597 if (mbx->ops.read(hw, &in_msg, 1, 0))
600 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
601 /* msg is not CTS and is NACK we must have lost CTS status */
602 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
607 /* the pf is talking, if we timed out in the past we reinit */
613 /* if we passed all the tests above then the link is up and we no
614 * longer need to check for link
616 mac->get_link_status = false;
619 *link_up = !mac->get_link_status;
624 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
625 * @hw: pointer to the HW structure
626 * @max_size: value to assign to max frame size
628 void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
632 msgbuf[0] = IXGBE_VF_SET_LPE;
633 msgbuf[1] = max_size;
634 ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
638 * ixgbevf_negotiate_api_version - Negotiate supported API version
639 * @hw: pointer to the HW structure
640 * @api: integer containing requested API version
642 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
647 /* Negotiate the mailbox API version */
648 msg[0] = IXGBE_VF_API_NEGOTIATE;
651 err = hw->mbx.ops.write_posted(hw, msg, 3, 0);
654 err = hw->mbx.ops.read_posted(hw, msg, 3, 0);
657 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
659 /* Store value and return 0 on success */
660 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
661 hw->api_version = api;
665 err = IXGBE_ERR_INVALID_ARGUMENT;
671 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
672 unsigned int *default_tc)
677 /* do nothing if API doesn't support ixgbevf_get_queues */
678 switch (hw->api_version) {
679 case ixgbe_mbox_api_11:
680 case ixgbe_mbox_api_12:
686 /* Fetch queue configuration from the PF */
687 msg[0] = IXGBE_VF_GET_QUEUES;
688 msg[1] = msg[2] = msg[3] = msg[4] = 0;
689 err = hw->mbx.ops.write_posted(hw, msg, 5, 0);
692 err = hw->mbx.ops.read_posted(hw, msg, 5, 0);
695 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
698 * if we we didn't get an ACK there must have been
699 * some sort of mailbox error so we should treat it
702 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK))
703 return IXGBE_ERR_MBX;
705 /* record and validate values from message */
706 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
707 if (hw->mac.max_tx_queues == 0 ||
708 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
709 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
711 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
712 if (hw->mac.max_rx_queues == 0 ||
713 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
714 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
716 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
717 /* in case of unknown state assume we cannot tag frames */
718 if (*num_tcs > hw->mac.max_rx_queues)
721 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
722 /* default to queue 0 on out-of-bounds queue number */
723 if (*default_tc >= hw->mac.max_tx_queues)