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34 #ifndef _IXGBE_BYPASS_API_H_
35 #define _IXGBE_BYPASS_API_H_
39 #include "ixgbe_bypass_defines.h"
41 * ixgbe_bypass_rw_generic - Bit bang data into by_pass FW
43 * @hw: pointer to hardware structure
44 * @cmd: Command we send to the FW
45 * @status: The reply from the FW
47 * Bit-bangs the cmd to the by_pass FW status points to what is returned.
49 #define IXGBE_BYPASS_BB_WAIT 1
50 static s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status)
53 u32 sck, sdi, sdo, dir_sck, dir_sdi, dir_sdo;
57 return IXGBE_ERR_PARAM;
61 /* SDP vary by MAC type */
62 switch (hw->mac.type) {
63 case ixgbe_mac_82599EB:
64 sck = IXGBE_ESDP_SDP7;
65 sdi = IXGBE_ESDP_SDP0;
66 sdo = IXGBE_ESDP_SDP6;
67 dir_sck = IXGBE_ESDP_SDP7_DIR;
68 dir_sdi = IXGBE_ESDP_SDP0_DIR;
69 dir_sdo = IXGBE_ESDP_SDP6_DIR;
72 sck = IXGBE_ESDP_SDP2;
73 sdi = IXGBE_ESDP_SDP0;
74 sdo = IXGBE_ESDP_SDP1;
75 dir_sck = IXGBE_ESDP_SDP2_DIR;
76 dir_sdi = IXGBE_ESDP_SDP0_DIR;
77 dir_sdo = IXGBE_ESDP_SDP1_DIR;
80 case ixgbe_mac_X550EM_x:
81 sck = IXGBE_ESDP_SDP2;
82 sdi = IXGBE_ESDP_SDP0;
83 sdo = IXGBE_ESDP_SDP1;
84 dir_sck = IXGBE_ESDP_SDP2_DIR;
85 dir_sdi = IXGBE_ESDP_SDP0_DIR;
86 dir_sdo = IXGBE_ESDP_SDP1_DIR;
89 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
92 /* Set SDP pins direction */
93 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
94 esdp |= dir_sck; /* SCK as output */
95 esdp |= dir_sdi; /* SDI as output */
96 esdp &= ~dir_sdo; /* SDO as input */
99 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
100 IXGBE_WRITE_FLUSH(hw);
102 msleep(IXGBE_BYPASS_BB_WAIT);
104 /* Generate start condition */
106 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
107 IXGBE_WRITE_FLUSH(hw);
108 msleep(IXGBE_BYPASS_BB_WAIT);
111 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
112 IXGBE_WRITE_FLUSH(hw);
113 msleep(IXGBE_BYPASS_BB_WAIT);
115 /* Clock out the new control word and clock in the status */
116 for (i = 0; i < 32; i++) {
117 if ((cmd >> (31 - i)) & 0x01) {
119 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
122 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
124 IXGBE_WRITE_FLUSH(hw);
125 msleep(IXGBE_BYPASS_BB_WAIT);
128 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
129 IXGBE_WRITE_FLUSH(hw);
130 msleep(IXGBE_BYPASS_BB_WAIT);
133 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
134 IXGBE_WRITE_FLUSH(hw);
135 msleep(IXGBE_BYPASS_BB_WAIT);
137 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
139 *status = (*status << 1) | 0x01;
141 *status = (*status << 1) | 0x00;
142 msleep(IXGBE_BYPASS_BB_WAIT);
148 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
149 IXGBE_WRITE_FLUSH(hw);
150 msleep(IXGBE_BYPASS_BB_WAIT);
153 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
154 IXGBE_WRITE_FLUSH(hw);
156 /* set the page bits to match the cmd that the status it belongs to */
157 *status = (*status & 0x3fffffff) | (cmd & 0xc0000000);
163 * ixgbe_bypass_valid_rd_generic - Verify valid return from bit-bang.
165 * If we send a write we can't be sure it took until we can read back
166 * that same register. It can be a problem as some of the feilds may
167 * for valid reasons change between the time wrote the register and
168 * we read it again to verify. So this function check everything we
169 * can check and then assumes it worked.
171 * @u32 in_reg - The register cmd for the bit-bang read.
172 * @u32 out_reg - The register returned from a bit-bang read.
174 static bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
178 /* Page must match for all control pages */
179 if ((in_reg & BYPASS_PAGE_M) != (out_reg & BYPASS_PAGE_M))
182 switch (in_reg & BYPASS_PAGE_M) {
183 case BYPASS_PAGE_CTL0:
184 /* All the following can't change since the last write
185 * - All the event actions
186 * - The timeout value
188 mask = BYPASS_AUX_ON_M | BYPASS_MAIN_ON_M |
189 BYPASS_MAIN_OFF_M | BYPASS_AUX_OFF_M |
192 if ((out_reg & mask) != (in_reg & mask))
195 /* 0x0 is never a valid value for bypass status */
196 if (!(out_reg & BYPASS_STATUS_OFF_M))
199 case BYPASS_PAGE_CTL1:
200 /* All the following can't change since the last write
202 * - time we last sent
204 mask = BYPASS_CTL1_VALID_M | BYPASS_CTL1_TIME_M;
205 if ((out_reg & mask) != (in_reg & mask))
208 case BYPASS_PAGE_CTL2:
209 /* All we can check in this page is control number
210 * which is already done above.
215 /* We are as sure as we can be return true */
220 * ixgbe_bypass_set_generic - Set a bypass field in the FW CTRL Regiter.
222 * @hw: pointer to hardware structure
223 * @cmd: The control word we are setting.
224 * @event: The event we are setting in the FW. This also happens to
225 * be the mask for the event we are setting (handy)
226 * @action: The action we set the event to in the FW. This is in a
227 * bit field that happens to be what we want to put in
228 * the event spot (also handy)
230 static s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,
237 /* Get current values */
238 cmd = ctrl; /* just reading only need control number */
239 if (ixgbe_bypass_rw_generic(hw, cmd, &by_ctl))
240 return IXGBE_ERR_INVALID_ARGUMENT;
242 /* Set to new action */
243 cmd = (by_ctl & ~event) | BYPASS_WE | action;
244 if (ixgbe_bypass_rw_generic(hw, cmd, &by_ctl))
245 return IXGBE_ERR_INVALID_ARGUMENT;
247 /* Page 0 force a FW eeprom write which is slow so verify */
248 if ((cmd & BYPASS_PAGE_M) == BYPASS_PAGE_CTL0) {
249 verify = BYPASS_PAGE_CTL0;
252 return IXGBE_BYPASS_FW_WRITE_FAILURE;
254 if (ixgbe_bypass_rw_generic(hw, verify, &by_ctl))
255 return IXGBE_ERR_INVALID_ARGUMENT;
256 } while (!ixgbe_bypass_valid_rd_generic(cmd, by_ctl));
258 /* We have give the FW time for the write to stick */
266 * ixgbe_bypass_rd_eep_generic - Read the bypass FW eeprom address.
268 * @hw: pointer to hardware structure
269 * @addr: The bypass eeprom address to read.
270 * @value: The 8b of data at the address above.
272 static s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value)
278 /* send the request */
279 cmd = BYPASS_PAGE_CTL2 | BYPASS_WE;
280 cmd |= (addr << BYPASS_CTL2_OFFSET_SHIFT) & BYPASS_CTL2_OFFSET_M;
281 if (ixgbe_bypass_rw_generic(hw, cmd, &status))
282 return IXGBE_ERR_INVALID_ARGUMENT;
284 /* We have give the FW time for the write to stick */
287 /* now read the results */
289 if (ixgbe_bypass_rw_generic(hw, cmd, &status))
290 return IXGBE_ERR_INVALID_ARGUMENT;
292 *value = status & BYPASS_CTL2_DATA_M;
297 #endif /* RTE_NIC_BYPASS */
299 #endif /* _IXGBE_BYPASS_API_H_ */