4 * Copyright(c) 2017 Cavium, Inc.. All rights reserved.
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8 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Cavium, Inc. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <rte_ethdev.h>
35 #include <rte_cycles.h>
36 #include <rte_malloc.h>
37 #include <rte_alarm.h>
40 #include "lio_23xx_vf.h"
41 #include "lio_ethdev.h"
45 lio_hweight64(uint64_t w)
47 uint64_t res = w - ((w >> 1) & 0x5555555555555555ul);
50 (res & 0x3333333333333333ul) + ((res >> 2) & 0x3333333333333333ul);
51 res = (res + (res >> 4)) & 0x0F0F0F0F0F0F0F0Ful;
52 res = res + (res >> 8);
53 res = res + (res >> 16);
55 return (res + (res >> 32)) & 0x00000000000000FFul;
59 * Setup our receive queue/ringbuffer. This is the
60 * queue the Octeon uses to send us packets and
61 * responses. We are given a memory pool for our
62 * packet buffers that are used to populate the receive
66 * Pointer to the structure rte_eth_dev
70 * Number of entries in the queue
72 * Where to allocate memory
74 * Pointer to the struction rte_eth_rxconf
76 * Pointer to the packet pool
79 * - On success, return 0
80 * - On failure, return -1
83 lio_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t q_no,
84 uint16_t num_rx_descs, unsigned int socket_id,
85 const struct rte_eth_rxconf *rx_conf __rte_unused,
86 struct rte_mempool *mp)
88 struct lio_device *lio_dev = LIO_DEV(eth_dev);
89 struct rte_pktmbuf_pool_private *mbp_priv;
90 uint32_t fw_mapped_oq;
93 if (q_no >= lio_dev->nb_rx_queues) {
94 lio_dev_err(lio_dev, "Invalid rx queue number %u\n", q_no);
98 lio_dev_dbg(lio_dev, "setting up rx queue %u\n", q_no);
100 fw_mapped_oq = lio_dev->linfo.rxpciq[q_no].s.q_no;
102 if ((lio_dev->droq[fw_mapped_oq]) &&
103 (num_rx_descs != lio_dev->droq[fw_mapped_oq]->max_count)) {
105 "Reconfiguring Rx descs not supported. Configure descs to same value %u or restart application\n",
106 lio_dev->droq[fw_mapped_oq]->max_count);
110 mbp_priv = rte_mempool_get_priv(mp);
111 buf_size = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
113 if (lio_setup_droq(lio_dev, fw_mapped_oq, num_rx_descs, buf_size, mp,
115 lio_dev_err(lio_dev, "droq allocation failed\n");
119 eth_dev->data->rx_queues[q_no] = lio_dev->droq[fw_mapped_oq];
124 static int lio_dev_configure(struct rte_eth_dev *eth_dev)
126 struct lio_device *lio_dev = LIO_DEV(eth_dev);
127 uint16_t timeout = LIO_MAX_CMD_TIMEOUT;
128 int retval, num_iqueues, num_oqueues;
129 uint8_t mac[ETHER_ADDR_LEN], i;
130 struct lio_if_cfg_resp *resp;
131 struct lio_soft_command *sc;
132 union lio_if_cfg if_cfg;
135 PMD_INIT_FUNC_TRACE();
137 /* Re-configuring firmware not supported.
138 * Can't change tx/rx queues per port from initial value.
140 if (lio_dev->port_configured) {
141 if ((lio_dev->nb_rx_queues != eth_dev->data->nb_rx_queues) ||
142 (lio_dev->nb_tx_queues != eth_dev->data->nb_tx_queues)) {
144 "rxq/txq re-conf not supported. Restart application with new value.\n");
150 lio_dev->nb_rx_queues = eth_dev->data->nb_rx_queues;
151 lio_dev->nb_tx_queues = eth_dev->data->nb_tx_queues;
153 resp_size = sizeof(struct lio_if_cfg_resp);
154 sc = lio_alloc_soft_command(lio_dev, 0, resp_size, 0);
158 resp = (struct lio_if_cfg_resp *)sc->virtrptr;
160 /* Firmware doesn't have capability to reconfigure the queues,
161 * Claim all queues, and use as many required
164 if_cfg.s.num_iqueues = lio_dev->nb_tx_queues;
165 if_cfg.s.num_oqueues = lio_dev->nb_rx_queues;
166 if_cfg.s.base_queue = 0;
168 if_cfg.s.gmx_port_id = lio_dev->pf_num;
170 lio_prepare_soft_command(lio_dev, sc, LIO_OPCODE,
171 LIO_OPCODE_IF_CFG, 0,
174 /* Setting wait time in seconds */
175 sc->wait_time = LIO_MAX_CMD_TIMEOUT / 1000;
177 retval = lio_send_soft_command(lio_dev, sc);
178 if (retval == LIO_IQ_SEND_FAILED) {
179 lio_dev_err(lio_dev, "iq/oq config failed status: %x\n",
181 /* Soft instr is freed by driver in case of failure. */
182 goto nic_config_fail;
185 /* Sleep on a wait queue till the cond flag indicates that the
186 * response arrived or timed-out.
188 while ((*sc->status_word == LIO_COMPLETION_WORD_INIT) && --timeout) {
189 lio_process_ordered_list(lio_dev);
193 retval = resp->status;
195 lio_dev_err(lio_dev, "iq/oq config failed\n");
196 goto nic_config_fail;
199 lio_swap_8B_data((uint64_t *)(&resp->cfg_info),
200 sizeof(struct octeon_if_cfg_info) >> 3);
202 num_iqueues = lio_hweight64(resp->cfg_info.iqmask);
203 num_oqueues = lio_hweight64(resp->cfg_info.oqmask);
205 if (!(num_iqueues) || !(num_oqueues)) {
207 "Got bad iqueues (%016lx) or oqueues (%016lx) from firmware.\n",
208 (unsigned long)resp->cfg_info.iqmask,
209 (unsigned long)resp->cfg_info.oqmask);
210 goto nic_config_fail;
214 "interface %d, iqmask %016lx, oqmask %016lx, numiqueues %d, numoqueues %d\n",
215 eth_dev->data->port_id,
216 (unsigned long)resp->cfg_info.iqmask,
217 (unsigned long)resp->cfg_info.oqmask,
218 num_iqueues, num_oqueues);
220 lio_dev->linfo.num_rxpciq = num_oqueues;
221 lio_dev->linfo.num_txpciq = num_iqueues;
223 for (i = 0; i < num_oqueues; i++) {
224 lio_dev->linfo.rxpciq[i].rxpciq64 =
225 resp->cfg_info.linfo.rxpciq[i].rxpciq64;
226 lio_dev_dbg(lio_dev, "index %d OQ %d\n",
227 i, lio_dev->linfo.rxpciq[i].s.q_no);
230 for (i = 0; i < num_iqueues; i++) {
231 lio_dev->linfo.txpciq[i].txpciq64 =
232 resp->cfg_info.linfo.txpciq[i].txpciq64;
233 lio_dev_dbg(lio_dev, "index %d IQ %d\n",
234 i, lio_dev->linfo.txpciq[i].s.q_no);
237 lio_dev->linfo.hw_addr = resp->cfg_info.linfo.hw_addr;
238 lio_dev->linfo.gmxport = resp->cfg_info.linfo.gmxport;
239 lio_dev->linfo.link.link_status64 =
240 resp->cfg_info.linfo.link.link_status64;
242 /* 64-bit swap required on LE machines */
243 lio_swap_8B_data(&lio_dev->linfo.hw_addr, 1);
244 for (i = 0; i < ETHER_ADDR_LEN; i++)
245 mac[i] = *((uint8_t *)(((uint8_t *)&lio_dev->linfo.hw_addr) +
248 /* Copy the permanent MAC address */
249 ether_addr_copy((struct ether_addr *)mac, ð_dev->data->mac_addrs[0]);
251 lio_dev->port_configured = 1;
253 lio_free_soft_command(sc);
258 lio_dev_err(lio_dev, "Failed retval %d\n", retval);
259 lio_free_soft_command(sc);
260 lio_free_instr_queue0(lio_dev);
265 /* Define our ethernet definitions */
266 static const struct eth_dev_ops liovf_eth_dev_ops = {
267 .dev_configure = lio_dev_configure,
268 .rx_queue_setup = lio_dev_rx_queue_setup,
272 lio_check_pf_hs_response(void *lio_dev)
274 struct lio_device *dev = lio_dev;
276 /* check till response arrives */
277 if (dev->pfvf_hsword.coproc_tics_per_us)
280 cn23xx_vf_handle_mbox(dev);
282 rte_eal_alarm_set(1, lio_check_pf_hs_response, lio_dev);
286 * \brief Identify the LIO device and to map the BAR address space
287 * @param lio_dev lio device
290 lio_chip_specific_setup(struct lio_device *lio_dev)
292 struct rte_pci_device *pdev = lio_dev->pci_dev;
293 uint32_t dev_id = pdev->id.device_id;
298 case LIO_CN23XX_VF_VID:
299 lio_dev->chip_id = LIO_CN23XX_VF_VID;
300 ret = cn23xx_vf_setup_device(lio_dev);
305 lio_dev_err(lio_dev, "Unsupported Chip\n");
309 lio_dev_info(lio_dev, "DEVICE : %s\n", s);
315 lio_first_time_init(struct lio_device *lio_dev,
316 struct rte_pci_device *pdev)
320 PMD_INIT_FUNC_TRACE();
322 /* set dpdk specific pci device pointer */
323 lio_dev->pci_dev = pdev;
325 /* Identify the LIO type and set device ops */
326 if (lio_chip_specific_setup(lio_dev)) {
327 lio_dev_err(lio_dev, "Chip specific setup failed\n");
331 /* Initialize soft command buffer pool */
332 if (lio_setup_sc_buffer_pool(lio_dev)) {
333 lio_dev_err(lio_dev, "sc buffer pool allocation failed\n");
337 /* Initialize lists to manage the requests of different types that
338 * arrive from applications for this lio device.
340 lio_setup_response_list(lio_dev);
342 if (lio_dev->fn_list.setup_mbox(lio_dev)) {
343 lio_dev_err(lio_dev, "Mailbox setup failed\n");
347 /* Check PF response */
348 lio_check_pf_hs_response((void *)lio_dev);
350 /* Do handshake and exit if incompatible PF driver */
351 if (cn23xx_pfvf_handshake(lio_dev))
355 cn23xx_vf_ask_pf_to_do_flr(lio_dev);
356 /* Wait for FLR for 100ms per SRIOV specification */
359 if (cn23xx_vf_set_io_queues_off(lio_dev)) {
360 lio_dev_err(lio_dev, "Setting io queues off failed\n");
364 if (lio_dev->fn_list.setup_device_regs(lio_dev)) {
365 lio_dev_err(lio_dev, "Failed to configure device registers\n");
369 if (lio_setup_instr_queue0(lio_dev)) {
370 lio_dev_err(lio_dev, "Failed to setup instruction queue 0\n");
374 dpdk_queues = (int)lio_dev->sriov_info.rings_per_vf;
376 lio_dev->max_tx_queues = dpdk_queues;
377 lio_dev->max_rx_queues = dpdk_queues;
382 lio_free_sc_buffer_pool(lio_dev);
383 if (lio_dev->mbox[0])
384 lio_dev->fn_list.free_mbox(lio_dev);
385 if (lio_dev->instr_queue[0])
386 lio_free_instr_queue0(lio_dev);
392 lio_eth_dev_uninit(struct rte_eth_dev *eth_dev)
394 struct lio_device *lio_dev = LIO_DEV(eth_dev);
396 PMD_INIT_FUNC_TRACE();
398 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
401 /* lio_free_sc_buffer_pool */
402 lio_free_sc_buffer_pool(lio_dev);
404 rte_free(eth_dev->data->mac_addrs);
405 eth_dev->data->mac_addrs = NULL;
407 eth_dev->rx_pkt_burst = NULL;
413 lio_eth_dev_init(struct rte_eth_dev *eth_dev)
415 struct rte_pci_device *pdev = RTE_DEV_TO_PCI(eth_dev->device);
416 struct lio_device *lio_dev = LIO_DEV(eth_dev);
418 PMD_INIT_FUNC_TRACE();
420 eth_dev->rx_pkt_burst = &lio_dev_recv_pkts;
422 /* Primary does the initialization. */
423 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
426 rte_eth_copy_pci_info(eth_dev, pdev);
427 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
429 if (pdev->mem_resource[0].addr) {
430 lio_dev->hw_addr = pdev->mem_resource[0].addr;
432 PMD_INIT_LOG(ERR, "ERROR: Failed to map BAR0\n");
436 lio_dev->eth_dev = eth_dev;
437 /* set lio device print string */
438 snprintf(lio_dev->dev_string, sizeof(lio_dev->dev_string),
439 "%s[%02x:%02x.%x]", pdev->driver->driver.name,
440 pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
442 lio_dev->port_id = eth_dev->data->port_id;
444 if (lio_first_time_init(lio_dev, pdev)) {
445 lio_dev_err(lio_dev, "Device init failed\n");
449 eth_dev->dev_ops = &liovf_eth_dev_ops;
450 eth_dev->data->mac_addrs = rte_zmalloc("lio", ETHER_ADDR_LEN, 0);
451 if (eth_dev->data->mac_addrs == NULL) {
453 "MAC addresses memory allocation failed\n");
454 eth_dev->dev_ops = NULL;
455 eth_dev->rx_pkt_burst = NULL;
459 rte_atomic64_set(&lio_dev->status, LIO_DEV_RUNNING);
462 lio_dev->port_configured = 0;
463 /* Always allow unicast packets */
464 lio_dev->ifflags |= LIO_IFFLAG_UNICAST;
469 /* Set of PCI devices this driver supports */
470 static const struct rte_pci_id pci_id_liovf_map[] = {
471 { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, LIO_CN23XX_VF_VID) },
472 { .vendor_id = 0, /* sentinel */ }
475 static struct eth_driver rte_liovf_pmd = {
477 .id_table = pci_id_liovf_map,
478 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
479 .probe = rte_eth_dev_pci_probe,
480 .remove = rte_eth_dev_pci_remove,
482 .eth_dev_init = lio_eth_dev_init,
483 .eth_dev_uninit = lio_eth_dev_uninit,
484 .dev_private_size = sizeof(struct lio_device),
487 RTE_PMD_REGISTER_PCI(net_liovf, rte_liovf_pmd.pci_drv);
488 RTE_PMD_REGISTER_PCI_TABLE(net_liovf, pci_id_liovf_map);
489 RTE_PMD_REGISTER_KMOD_DEP(net_liovf, "* igb_uio | vfio");