4 * Copyright(c) 2017 Cavium, Inc.. All rights reserved.
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8 * modification, are permitted provided that the following conditions
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21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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40 #include <rte_spinlock.h>
41 #include <rte_memory.h>
43 #include "lio_struct.h"
46 #define ROUNDUP4(val) (((val) + 3) & 0xfffffffc)
49 #define LIO_STQUEUE_FIRST_ENTRY(ptr, type, elem) \
50 (type *)((char *)((ptr)->stqh_first) - offsetof(type, elem))
52 #define lio_check_timeout(cur_time, chk_time) ((cur_time) > (chk_time))
55 (size_t)(rte_get_timer_cycles() / rte_get_timer_hz())
57 /** Descriptor format.
58 * The descriptor ring is made of descriptors which have 2 64-bit values:
59 * -# Physical (bus) address of the data buffer.
60 * -# Physical (bus) address of a lio_droq_info structure.
61 * The device DMA's incoming packets and its information at the address
62 * given by these descriptor fields.
64 struct lio_droq_desc {
65 /** The buffer pointer */
68 /** The Info pointer */
72 #define LIO_DROQ_DESC_SIZE (sizeof(struct lio_droq_desc))
74 /** Information about packet DMA'ed by Octeon.
75 * The format of the information available at Info Pointer after Octeon
76 * has posted a packet. Not all descriptors have valid information. Only
77 * the Info field of the first descriptor for a packet has information
80 struct lio_droq_info {
81 /** The Output Receive Header. */
84 /** The Length of the packet. */
88 #define LIO_DROQ_INFO_SIZE (sizeof(struct lio_droq_info))
90 /** Pointer to data buffer.
91 * Driver keeps a pointer to the data buffer that it made available to
92 * the Octeon device. Since the descriptor ring keeps physical (bus)
93 * addresses, this field is required for the driver to keep track of
94 * the virtual address pointers.
96 struct lio_recv_buffer {
97 /** Packet buffer, including meta data. */
100 /** Data in the packet buffer. */
105 #define LIO_DROQ_RECVBUF_SIZE (sizeof(struct lio_recv_buffer))
107 #define LIO_DROQ_SIZE (sizeof(struct lio_droq))
109 #define LIO_IQ_SEND_OK 0
110 #define LIO_IQ_SEND_STOP 1
111 #define LIO_IQ_SEND_FAILED -1
114 #define LIO_REQTYPE_NONE 0
115 #define LIO_REQTYPE_NORESP_NET 1
116 #define LIO_REQTYPE_NORESP_NET_SG 2
117 #define LIO_REQTYPE_SOFT_COMMAND 3
119 struct lio_request_list {
124 /*---------------------- INSTRUCTION FORMAT ----------------------------*/
126 struct lio_instr3_64B {
127 /** Pointer where the input data is available. */
130 /** Instruction Header. */
133 /** Instruction Header. */
136 /** Input Request Header. */
139 /** opcode/subcode specific parameters */
142 /** Return Data Parameters */
145 /** Pointer where the response for a RAW mode packet will be written
152 union lio_instr_64B {
153 struct lio_instr3_64B cmd3;
156 /** The size of each buffer in soft command buffer pool */
157 #define LIO_SOFT_COMMAND_BUFFER_SIZE 1536
159 /** Maximum number of buffers to allocate into soft command buffer pool */
160 #define LIO_MAX_SOFT_COMMAND_BUFFERS 255
162 struct lio_soft_command {
163 /** Soft command buffer info. */
164 struct lio_stailq_node node;
168 /** Command and return status */
169 union lio_instr_64B cmd;
171 #define LIO_COMPLETION_WORD_INIT 0xffffffffffffffffULL
172 uint64_t *status_word;
174 /** Data buffer info */
179 /** Return buffer info */
184 /** Context buffer info */
188 /** Time out and callback */
192 void (*callback)(uint32_t, void *);
194 struct rte_mbuf *mbuf;
197 struct lio_iq_post_status {
223 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
226 uint64_t more : 6; /* How many udd words follow the command */
228 uint64_t reserved : 29;
230 uint64_t param1 : 16;
234 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
238 uint64_t param1 : 16;
240 uint64_t reserved : 29;
250 #define OCTEON_CMD_SIZE (sizeof(union octeon_cmd))
252 /** Structure of data information passed by driver to the BASE
253 * layer when forwarding data to Octeon device software.
255 struct lio_data_pkt {
256 /** Pointer to information maintained by NIC module for this packet. The
257 * BASE layer passes this as-is to the driver.
261 /** Type of buffer passed in "buf" above. */
264 /** Total data bytes to be transferred in this command. */
267 /** Command to be passed to the Octeon device software. */
268 union lio_instr_64B cmd;
270 /** Input queue to use to send this command. */
274 /** Structure passed by driver to BASE layer to prepare a command to send
275 * network data to Octeon.
277 union lio_cmd_setup {
281 uint32_t timestamp : 1;
282 uint32_t ip_csum : 1;
283 uint32_t transport_csum : 1;
284 uint32_t tnl_csum : 1;
293 uint64_t cmd_setup64;
296 /* Instruction Header */
297 struct octeon_instr_ih3 {
298 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
301 uint64_t reserved3 : 1;
303 /** Gather indicator 1=gather*/
306 /** Data length OR no. of entries in gather list */
307 uint64_t dlengsz : 14;
309 /** Front Data size */
313 uint64_t reserved2 : 4;
315 /** PKI port kind - PKIND */
319 uint64_t reserved1 : 32;
321 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
323 uint64_t reserved1 : 32;
325 /** PKI port kind - PKIND */
329 uint64_t reserved2 : 4;
331 /** Front Data size */
334 /** Data length OR no. of entries in gather list */
335 uint64_t dlengsz : 14;
337 /** Gather indicator 1=gather*/
341 uint64_t reserved3 : 1;
346 /* PKI Instruction Header(PKI IH) */
347 struct octeon_instr_pki_ih3 {
348 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
353 /** Raw mode indicator 1 = RAW */
363 uint64_t reserved2 : 1;
375 uint64_t tagtype : 2;
378 uint64_t reserved1 : 2;
386 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
395 uint64_t reserved1 : 2;
398 uint64_t tagtype : 2;
410 uint64_t reserved2 : 1;
418 /** Raw mode indicator 1 = RAW */
426 /** Input Request Header */
427 struct octeon_instr_irh {
428 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
431 uint64_t subcode : 7;
433 uint64_t priority : 3;
434 uint64_t reserved : 5;
435 uint64_t ossp : 32; /* opcode/subcode specific parameters */
436 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
437 uint64_t ossp : 32; /* opcode/subcode specific parameters */
438 uint64_t reserved : 5;
439 uint64_t priority : 3;
441 uint64_t subcode : 7;
447 /* pkiih3 + irh + ossp[0] + ossp[1] + rdp + rptr = 40 bytes */
448 #define OCTEON_SOFT_CMD_RESP_IH3 (40 + 8)
449 /* pki_h3 + irh + ossp[0] + ossp[1] = 32 bytes */
450 #define OCTEON_PCI_CMD_O3 (24 + 8)
452 /** Return Data Parameters */
453 struct octeon_instr_rdp {
454 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
455 uint64_t reserved : 49;
456 uint64_t pcie_port : 3;
458 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
460 uint64_t pcie_port : 3;
461 uint64_t reserved : 49;
465 union octeon_packet_params {
466 uint32_t pkt_params32;
468 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
469 uint32_t reserved : 24;
470 uint32_t ip_csum : 1; /* Perform IP header checksum(s) */
471 /* Perform Outer transport header checksum */
472 uint32_t transport_csum : 1;
473 /* Find tunnel, and perform transport csum. */
474 uint32_t tnl_csum : 1;
475 uint32_t tsflag : 1; /* Timestamp this packet */
476 uint32_t ipsec_ops : 4; /* IPsec operation */
478 uint32_t ipsec_ops : 4;
480 uint32_t tnl_csum : 1;
481 uint32_t transport_csum : 1;
482 uint32_t ip_csum : 1;
483 uint32_t reserved : 7;
488 /** Utility function to prepare a 64B NIC instruction based on a setup command
489 * @param cmd - pointer to instruction to be filled in.
490 * @param setup - pointer to the setup structure
491 * @param q_no - which queue for back pressure
493 * Assumes the cmd instruction is pre-allocated, but no fields are filled in.
496 lio_prepare_pci_cmd(struct lio_device *lio_dev,
497 union lio_instr_64B *cmd,
498 union lio_cmd_setup *setup,
501 union octeon_packet_params packet_params;
502 struct octeon_instr_pki_ih3 *pki_ih3;
503 struct octeon_instr_irh *irh;
504 struct octeon_instr_ih3 *ih3;
507 memset(cmd, 0, sizeof(union lio_instr_64B));
509 ih3 = (struct octeon_instr_ih3 *)&cmd->cmd3.ih3;
510 pki_ih3 = (struct octeon_instr_pki_ih3 *)&cmd->cmd3.pki_ih3;
512 /* assume that rflag is cleared so therefore front data will only have
513 * irh and ossp[1] and ossp[2] for a total of 24 bytes
515 ih3->pkind = lio_dev->instr_queue[setup->s.iq_no]->txpciq.s.pkind;
517 ih3->fsz = OCTEON_PCI_CMD_O3;
519 if (!setup->s.gather) {
520 ih3->dlengsz = setup->s.u.datasize;
523 ih3->dlengsz = setup->s.u.gatherptrs;
530 pki_ih3->uqpg = lio_dev->instr_queue[setup->s.iq_no]->txpciq.s.use_qpg;
532 port = (int)lio_dev->instr_queue[setup->s.iq_no]->txpciq.s.port;
537 pki_ih3->tag = LIO_DATA(port);
539 pki_ih3->tagtype = OCTEON_ORDERED_TAG;
540 pki_ih3->qpg = lio_dev->instr_queue[setup->s.iq_no]->txpciq.s.qpg;
541 pki_ih3->pm = 0x0; /* parse from L2 */
542 pki_ih3->sl = 32; /* sl will be sizeof(pki_ih3) + irh + ossp0 + ossp1*/
544 irh = (struct octeon_instr_irh *)&cmd->cmd3.irh;
546 irh->opcode = LIO_OPCODE;
547 irh->subcode = LIO_OPCODE_NW_DATA;
549 packet_params.pkt_params32 = 0;
550 packet_params.s.ip_csum = setup->s.ip_csum;
551 packet_params.s.transport_csum = setup->s.transport_csum;
552 packet_params.s.tsflag = setup->s.timestamp;
554 irh->ossp = packet_params.pkt_params32;
557 int lio_setup_sc_buffer_pool(struct lio_device *lio_dev);
558 void lio_free_sc_buffer_pool(struct lio_device *lio_dev);
560 struct lio_soft_command *
561 lio_alloc_soft_command(struct lio_device *lio_dev,
562 uint32_t datasize, uint32_t rdatasize,
564 void lio_prepare_soft_command(struct lio_device *lio_dev,
565 struct lio_soft_command *sc,
566 uint8_t opcode, uint8_t subcode,
567 uint32_t irh_ossp, uint64_t ossp0,
569 int lio_send_soft_command(struct lio_device *lio_dev,
570 struct lio_soft_command *sc);
571 void lio_free_soft_command(struct lio_soft_command *sc);
573 /** Maximum ordered requests to process in every invocation of
574 * lio_process_ordered_list(). The function will continue to process requests
575 * as long as it can find one that has finished processing. If it keeps
576 * finding requests that have completed, the function can run for ever. The
577 * value defined here sets an upper limit on the number of requests it can
578 * process before it returns control to the poll thread.
580 #define LIO_MAX_ORD_REQS_TO_PROCESS 4096
582 /** Error codes used in Octeon Host-Core communication.
585 * ----------------------------
587 * ----------------------------
588 * Error codes are 32-bit wide. The upper 16-bits, called Major Error Number,
589 * are reserved to identify the group to which the error code belongs. The
590 * lower 16-bits, called Minor Error Number, carry the actual code.
592 * So error codes are (MAJOR NUMBER << 16)| MINOR_NUMBER.
594 /** Status for a request.
595 * If the request is successfully queued, the driver will return
596 * a LIO_REQUEST_PENDING status. LIO_REQUEST_TIMEOUT is only returned by
597 * the driver if the response for request failed to arrive before a
598 * time-out period or if the request processing * got interrupted due to
599 * a signal respectively.
602 /** A value of 0x00000000 indicates no error i.e. success */
603 LIO_REQUEST_DONE = 0x00000000,
604 /** (Major number: 0x0000; Minor Number: 0x0001) */
605 LIO_REQUEST_PENDING = 0x00000001,
606 LIO_REQUEST_TIMEOUT = 0x00000003,
610 /*------ Error codes used by firmware (bits 15..0 set by firmware */
611 #define LIO_FIRMWARE_MAJOR_ERROR_CODE 0x0001
612 #define LIO_FIRMWARE_STATUS_CODE(status) \
613 ((LIO_FIRMWARE_MAJOR_ERROR_CODE << 16) | (status))
615 /** Initialize the response lists. The number of response lists to create is
617 * @param lio_dev - the lio device structure.
619 void lio_setup_response_list(struct lio_device *lio_dev);
621 /** Check the status of first entry in the ordered list. If the instruction at
622 * that entry finished processing or has timed-out, the entry is cleaned.
623 * @param lio_dev - the lio device structure.
624 * @return 1 if the ordered list is empty, 0 otherwise.
626 int lio_process_ordered_list(struct lio_device *lio_dev);
629 lio_swap_8B_data(uint64_t *data, uint32_t blocks)
632 *data = rte_cpu_to_be_64(*data);
638 static inline uint64_t
639 lio_map_ring(void *buf)
641 phys_addr_t dma_addr;
643 dma_addr = rte_mbuf_data_dma_addr_default(((struct rte_mbuf *)buf));
645 return (uint64_t)dma_addr;
648 static inline uint64_t
649 lio_map_ring_info(struct lio_droq *droq, uint32_t i)
651 phys_addr_t dma_addr;
653 dma_addr = droq->info_list_dma + (i * LIO_DROQ_INFO_SIZE);
655 return (uint64_t)dma_addr;
659 lio_opcode_slow_path(union octeon_rh *rh)
661 uint16_t subcode1, subcode2;
663 subcode1 = LIO_OPCODE_SUBCODE(rh->r.opcode, rh->r.subcode);
664 subcode2 = LIO_OPCODE_SUBCODE(LIO_OPCODE, LIO_OPCODE_NW_DATA);
666 return subcode2 != subcode1;
670 lio_add_sg_size(struct lio_sg_entry *sg_entry,
671 uint16_t size, uint32_t pos)
673 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
674 sg_entry->u.size[pos] = size;
675 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
676 sg_entry->u.size[3 - pos] = size;
680 /* Macro to increment index.
681 * Index is incremented by count; if the sum exceeds
682 * max, index is wrapped-around to the start.
684 static inline uint32_t
685 lio_incr_index(uint32_t index, uint32_t count, uint32_t max)
687 if ((index + count) >= max)
688 index = index + count - max;
695 int lio_setup_droq(struct lio_device *lio_dev, int q_no, int num_descs,
696 int desc_size, struct rte_mempool *mpool,
697 unsigned int socket_id);
698 uint16_t lio_dev_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
700 void lio_delete_droq_queue(struct lio_device *lio_dev, int oq_no);
702 int lio_setup_sglists(struct lio_device *lio_dev, int iq_no,
703 int fw_mapped_iq, int num_descs, unsigned int socket_id);
704 uint16_t lio_dev_xmit_pkts(void *tx_queue, struct rte_mbuf **pkts,
706 int lio_setup_iq(struct lio_device *lio_dev, int q_index,
707 union octeon_txpciq iq_no, uint32_t num_descs, void *app_ctx,
708 unsigned int socket_id);
709 void lio_delete_instruction_queue(struct lio_device *lio_dev, int iq_no);
710 /** Setup instruction queue zero for the device
711 * @param lio_dev which lio device to setup
713 * @return 0 if success. -1 if fails
715 int lio_setup_instr_queue0(struct lio_device *lio_dev);
716 void lio_free_instr_queue0(struct lio_device *lio_dev);
717 #endif /* _LIO_RXTX_H_ */