4 * Copyright(c) 2017 Cavium, Inc.. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Cavium, Inc. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #ifndef _LIO_STRUCT_H_
35 #define _LIO_STRUCT_H_
39 #include <sys/queue.h>
41 #include <rte_spinlock.h>
42 #include <rte_atomic.h>
44 #include "lio_hw_defs.h"
53 /** The txpciq info passed to host from the firmware */
58 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
64 uint64_t aura_num : 10;
65 uint64_t reserved : 20;
67 uint64_t reserved : 20;
68 uint64_t aura_num : 10;
78 /** The instruction (input) queue.
79 * The input queue is used to post raw (instruction) mode data or packet
80 * data to Octeon device from the host. Each input queue for
81 * a LIO device has one such structure to represent it.
83 struct lio_instr_queue {
84 /** A spinlock to protect access to the input ring. */
87 rte_spinlock_t post_lock;
89 struct lio_device *lio_dev;
93 rte_atomic64_t iq_flush_running;
95 /** Flag that indicates if the queue uses 64 byte commands. */
99 union octeon_txpciq txpciq;
105 /** Maximum no. of instructions in this queue. */
108 /** Index in input ring where the driver should write the next packet */
109 uint32_t host_write_index;
111 /** Index in input ring where Octeon is expected to read the next
114 uint32_t lio_read_index;
116 /** This index aids in finding the window in the queue where Octeon
117 * has read the commands.
119 uint32_t flush_index;
121 /** This field keeps track of the instructions pending in this queue. */
122 rte_atomic64_t instr_pending;
124 /** Pointer to the Virtual Base addr of the input ring. */
127 struct lio_request_list *request_list;
129 /** Octeon doorbell register for the ring. */
132 /** Octeon instruction count register for this ring. */
135 /** Number of instructions pending to be posted to Octeon. */
138 /** DMA mapped base address of the input descriptor ring. */
139 uint64_t base_addr_dma;
141 /** Application context */
144 /* network stack queue index */
148 const struct rte_memzone *iq_mz;
151 struct lio_io_enable {
158 void (*setup_iq_regs)(struct lio_device *, uint32_t);
160 int (*setup_mbox)(struct lio_device *);
161 void (*free_mbox)(struct lio_device *);
163 int (*setup_device_regs)(struct lio_device *);
166 struct lio_pf_vf_hs_word {
167 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
168 /** PKIND value assigned for the DPI interface */
171 /** OCTEON core clock multiplier */
172 uint64_t core_tics_per_us : 16;
174 /** OCTEON coprocessor clock multiplier */
175 uint64_t coproc_tics_per_us : 16;
177 /** app that currently running on OCTEON */
178 uint64_t app_mode : 8;
181 uint64_t reserved : 16;
183 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
186 uint64_t reserved : 16;
188 /** app that currently running on OCTEON */
189 uint64_t app_mode : 8;
191 /** OCTEON coprocessor clock multiplier */
192 uint64_t coproc_tics_per_us : 16;
194 /** OCTEON core clock multiplier */
195 uint64_t core_tics_per_us : 16;
197 /** PKIND value assigned for the DPI interface */
202 struct lio_sriov_info {
203 /** Number of rings assigned to VF */
204 uint32_t rings_per_vf;
206 /** Number of VF devices enabled */
210 /* Structure to define the configuration attributes for each Input queue. */
211 struct lio_iq_config {
212 /* Max number of IQs available */
215 /** Pending list size (usually set to the sum of the size of all Input
218 uint32_t pending_list_size;
220 /** Command size - 32 or 64 bytes */
224 /* Structure to define the configuration attributes for each Output queue. */
225 struct lio_oq_config {
226 /* Max number of OQs available */
229 /** If set, the Output queue uses info-pointer mode. (Default: 1 ) */
232 /** The number of buffers that were consumed during packet processing by
233 * the driver on this Output queue before the driver attempts to
234 * replenish the descriptor ring with new buffers.
236 uint32_t refill_threshold;
239 /* Structure to define the configuration. */
242 const char *card_name;
244 /** Input Queue attributes. */
245 struct lio_iq_config iq;
247 /** Output Queue attributes. */
248 struct lio_oq_config oq;
252 int num_def_tx_descs;
254 /* Num of desc for rx rings */
255 int num_def_rx_descs;
260 /* ----------------------- THE LIO DEVICE --------------------------- */
262 * Each lio device has this structure to represent all its
266 /** PCI device pointer */
267 struct rte_pci_device *pci_dev;
269 /** Octeon Chip type */
276 struct lio_fn_list fn_list;
280 /** The input instruction queues */
281 struct lio_instr_queue *instr_queue[LIO_MAX_POSSIBLE_INSTR_QUEUES];
283 struct lio_io_enable io_qmask;
285 struct lio_sriov_info sriov_info;
287 struct lio_pf_vf_hs_word pfvf_hsword;
289 /** Mail Box details of each lio queue. */
290 struct lio_mbox **mbox;
292 char dev_string[LIO_DEVICE_NAME_LEN]; /* Device print string */
294 const struct lio_config *default_config;
296 struct rte_eth_dev *eth_dev;
298 uint8_t max_rx_queues;
299 uint8_t max_tx_queues;
300 uint8_t nb_rx_queues;
301 uint8_t nb_tx_queues;
302 uint8_t port_configured;
305 #endif /* _LIO_STRUCT_H_ */