4 * Copyright 2012-2017 6WIND S.A.
5 * Copyright 2012-2017 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
57 #include <linux/ethtool.h>
58 #include <linux/sockios.h>
61 #include <rte_ether.h>
62 #include <rte_ethdev.h>
63 #include <rte_ethdev_pci.h>
66 #include <rte_errno.h>
67 #include <rte_mempool.h>
68 #include <rte_prefetch.h>
69 #include <rte_malloc.h>
70 #include <rte_spinlock.h>
71 #include <rte_atomic.h>
72 #include <rte_version.h>
74 #include <rte_alarm.h>
75 #include <rte_memory.h>
77 #include <rte_kvargs.h>
78 #include <rte_interrupts.h>
80 /* Generated configuration header. */
81 #include "mlx4_autoconf.h"
85 #include "mlx4_flow.h"
87 /* Convenience macros for accessing mbuf fields. */
88 #define NEXT(m) ((m)->next)
89 #define DATA_LEN(m) ((m)->data_len)
90 #define PKT_LEN(m) ((m)->pkt_len)
91 #define DATA_OFF(m) ((m)->data_off)
92 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
93 #define NB_SEGS(m) ((m)->nb_segs)
94 #define PORT(m) ((m)->port)
96 /* Work Request ID data type (64 bit). */
105 #define WR_ID(o) (((wr_id_t *)&(o))->data)
107 /* Transpose flags. Useful to convert IBV to DPDK flags. */
108 #define TRANSPOSE(val, from, to) \
109 (((from) >= (to)) ? \
110 (((val) & (from)) / ((from) / (to))) : \
111 (((val) & (from)) * ((to) / (from))))
113 /* Local storage for secondary process data. */
114 struct mlx4_secondary_data {
115 struct rte_eth_dev_data data; /* Local device data. */
116 struct priv *primary_priv; /* Private structure from primary. */
117 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
118 rte_spinlock_t lock; /* Port configuration lock. */
119 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
122 uint8_t active_ports;
125 /* Available parameters list. */
126 const char *pmd_mlx4_init_params[] = {
132 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
135 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
138 priv_rx_intr_vec_enable(struct priv *priv);
141 priv_rx_intr_vec_disable(struct priv *priv);
144 * Check if running as a secondary process.
147 * Nonzero if running as a secondary process.
150 mlx4_is_secondary(void)
152 return rte_eal_process_type() != RTE_PROC_PRIMARY;
156 * Return private structure associated with an Ethernet device.
159 * Pointer to Ethernet device structure.
162 * Pointer to private structure.
165 mlx4_get_priv(struct rte_eth_dev *dev)
167 struct mlx4_secondary_data *sd;
169 if (!mlx4_is_secondary())
170 return dev->data->dev_private;
171 sd = &mlx4_secondary_data[dev->data->port_id];
172 return sd->data.dev_private;
176 * Lock private structure to protect it from concurrent access in the
180 * Pointer to private structure.
182 void priv_lock(struct priv *priv)
184 rte_spinlock_lock(&priv->lock);
188 * Unlock private structure.
191 * Pointer to private structure.
193 void priv_unlock(struct priv *priv)
195 rte_spinlock_unlock(&priv->lock);
198 /* Allocate a buffer on the stack and fill it with a printf format string. */
199 #define MKSTR(name, ...) \
200 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
202 snprintf(name, sizeof(name), __VA_ARGS__)
205 * Get interface name from private structure.
208 * Pointer to private structure.
210 * Interface name output buffer.
213 * 0 on success, -1 on failure and errno is set.
216 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
220 unsigned int dev_type = 0;
221 unsigned int dev_port_prev = ~0u;
222 char match[IF_NAMESIZE] = "";
225 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
231 while ((dent = readdir(dir)) != NULL) {
232 char *name = dent->d_name;
234 unsigned int dev_port;
237 if ((name[0] == '.') &&
238 ((name[1] == '\0') ||
239 ((name[1] == '.') && (name[2] == '\0'))))
242 MKSTR(path, "%s/device/net/%s/%s",
243 priv->ctx->device->ibdev_path, name,
244 (dev_type ? "dev_id" : "dev_port"));
246 file = fopen(path, "rb");
251 * Switch to dev_id when dev_port does not exist as
252 * is the case with Linux kernel versions < 3.15.
263 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
268 * Switch to dev_id when dev_port returns the same value for
269 * all ports. May happen when using a MOFED release older than
270 * 3.0 with a Linux kernel >= 3.15.
272 if (dev_port == dev_port_prev)
274 dev_port_prev = dev_port;
275 if (dev_port == (priv->port - 1u))
276 snprintf(match, sizeof(match), "%s", name);
279 if (match[0] == '\0')
281 strncpy(*ifname, match, sizeof(*ifname));
286 * Read from sysfs entry.
289 * Pointer to private structure.
291 * Entry name relative to sysfs path.
293 * Data output buffer.
298 * 0 on success, -1 on failure and errno is set.
301 priv_sysfs_read(const struct priv *priv, const char *entry,
302 char *buf, size_t size)
304 char ifname[IF_NAMESIZE];
309 if (priv_get_ifname(priv, &ifname))
312 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
315 file = fopen(path, "rb");
318 ret = fread(buf, 1, size, file);
320 if (((size_t)ret < size) && (ferror(file)))
330 * Write to sysfs entry.
333 * Pointer to private structure.
335 * Entry name relative to sysfs path.
342 * 0 on success, -1 on failure and errno is set.
345 priv_sysfs_write(const struct priv *priv, const char *entry,
346 char *buf, size_t size)
348 char ifname[IF_NAMESIZE];
353 if (priv_get_ifname(priv, &ifname))
356 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
359 file = fopen(path, "wb");
362 ret = fwrite(buf, 1, size, file);
364 if (((size_t)ret < size) || (ferror(file)))
374 * Get unsigned long sysfs property.
377 * Pointer to private structure.
379 * Entry name relative to sysfs path.
381 * Value output buffer.
384 * 0 on success, -1 on failure and errno is set.
387 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
390 unsigned long value_ret;
393 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
395 DEBUG("cannot read %s value from sysfs: %s",
396 name, strerror(errno));
399 value_str[ret] = '\0';
401 value_ret = strtoul(value_str, NULL, 0);
403 DEBUG("invalid %s value `%s': %s", name, value_str,
412 * Set unsigned long sysfs property.
415 * Pointer to private structure.
417 * Entry name relative to sysfs path.
422 * 0 on success, -1 on failure and errno is set.
425 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
428 MKSTR(value_str, "%lu", value);
430 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
432 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
433 name, value_str, value, strerror(errno));
440 * Perform ifreq ioctl() on associated Ethernet device.
443 * Pointer to private structure.
445 * Request number to pass to ioctl().
447 * Interface request structure output buffer.
450 * 0 on success, -1 on failure and errno is set.
453 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
455 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
460 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
461 ret = ioctl(sock, req, ifr);
470 * Pointer to private structure.
472 * MTU value output buffer.
475 * 0 on success, -1 on failure and errno is set.
478 priv_get_mtu(struct priv *priv, uint16_t *mtu)
480 unsigned long ulong_mtu;
482 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
492 * Pointer to private structure.
497 * 0 on success, -1 on failure and errno is set.
500 priv_set_mtu(struct priv *priv, uint16_t mtu)
504 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
505 priv_get_mtu(priv, &new_mtu))
517 * Pointer to private structure.
519 * Bitmask for flags that must remain untouched.
521 * Bitmask for flags to modify.
524 * 0 on success, -1 on failure and errno is set.
527 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
531 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
534 tmp |= (flags & (~keep));
535 return priv_set_sysfs_ulong(priv, "flags", tmp);
538 /* Device configuration. */
541 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
542 unsigned int socket, const struct rte_eth_txconf *conf);
545 txq_cleanup(struct txq *txq);
548 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
549 unsigned int socket, int inactive,
550 const struct rte_eth_rxconf *conf,
551 struct rte_mempool *mp, int children_n,
552 struct rxq *rxq_parent);
555 rxq_cleanup(struct rxq *rxq);
558 * Create RSS parent queue.
560 * The new parent is inserted in front of the list in the private structure.
563 * Pointer to private structure.
565 * Queues indices array, if NULL use all Rx queues.
567 * The number of entries in queues[].
570 * Pointer to a parent rxq structure, NULL on failure.
573 priv_parent_create(struct priv *priv,
581 parent = rte_zmalloc("parent queue",
583 RTE_CACHE_LINE_SIZE);
585 ERROR("cannot allocate memory for RSS parent queue");
588 ret = rxq_setup(priv->dev, parent, 0, 0, 0,
589 NULL, NULL, children_n, NULL);
594 parent->rss.queues_n = children_n;
596 for (i = 0; i < children_n; ++i)
597 parent->rss.queues[i] = queues[i];
599 /* the default RSS ring case */
600 assert(priv->rxqs_n == children_n);
601 for (i = 0; i < priv->rxqs_n; ++i)
602 parent->rss.queues[i] = i;
604 LIST_INSERT_HEAD(&priv->parents, parent, next);
609 * Clean up RX queue parent structure.
612 * RX queue parent structure.
615 rxq_parent_cleanup(struct rxq *parent)
617 LIST_REMOVE(parent, next);
623 * Clean up parent structures from the parent list.
626 * Pointer to private structure.
629 priv_parent_list_cleanup(struct priv *priv)
631 while (!LIST_EMPTY(&priv->parents))
632 rxq_parent_cleanup(LIST_FIRST(&priv->parents));
636 * Ethernet device configuration.
638 * Prepare the driver for a given number of TX and RX queues.
639 * Allocate parent RSS queue when several RX queues are requested.
642 * Pointer to Ethernet device structure.
645 * 0 on success, errno value on failure.
648 dev_configure(struct rte_eth_dev *dev)
650 struct priv *priv = dev->data->dev_private;
651 unsigned int rxqs_n = dev->data->nb_rx_queues;
652 unsigned int txqs_n = dev->data->nb_tx_queues;
655 priv->rxqs = (void *)dev->data->rx_queues;
656 priv->txqs = (void *)dev->data->tx_queues;
657 if (txqs_n != priv->txqs_n) {
658 INFO("%p: TX queues number update: %u -> %u",
659 (void *)dev, priv->txqs_n, txqs_n);
660 priv->txqs_n = txqs_n;
662 if (rxqs_n == priv->rxqs_n)
664 if (!rte_is_power_of_2(rxqs_n) && !priv->isolated) {
667 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
668 WARN("%p: number of RX queues must be a power"
669 " of 2: %u queues among %u will be active",
670 (void *)dev, n_active, rxqs_n);
673 INFO("%p: RX queues number update: %u -> %u",
674 (void *)dev, priv->rxqs_n, rxqs_n);
675 /* If RSS is enabled, disable it first. */
679 /* Only if there are no remaining child RX queues. */
680 for (i = 0; (i != priv->rxqs_n); ++i)
681 if ((*priv->rxqs)[i] != NULL)
683 priv_parent_list_cleanup(priv);
688 /* Nothing else to do. */
689 priv->rxqs_n = rxqs_n;
692 /* Allocate a new RSS parent queue if supported by hardware. */
694 ERROR("%p: only a single RX queue can be configured when"
695 " hardware doesn't support RSS",
699 /* Fail if hardware doesn't support that many RSS queues. */
700 if (rxqs_n >= priv->max_rss_tbl_sz) {
701 ERROR("%p: only %u RX queues can be configured for RSS",
702 (void *)dev, priv->max_rss_tbl_sz);
707 priv->rxqs_n = rxqs_n;
710 if (priv_parent_create(priv, NULL, priv->rxqs_n))
712 /* Failure, rollback. */
719 * DPDK callback for Ethernet device configuration.
722 * Pointer to Ethernet device structure.
725 * 0 on success, negative errno value on failure.
728 mlx4_dev_configure(struct rte_eth_dev *dev)
730 struct priv *priv = dev->data->dev_private;
733 if (mlx4_is_secondary())
734 return -E_RTE_SECONDARY;
736 ret = dev_configure(dev);
742 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
743 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
746 * Configure secondary process queues from a private data pointer (primary
747 * or secondary) and update burst callbacks. Can take place only once.
749 * All queues must have been previously created by the primary process to
750 * avoid undefined behavior.
753 * Private data pointer from either primary or secondary process.
756 * Private data pointer from secondary process, NULL in case of error.
759 mlx4_secondary_data_setup(struct priv *priv)
761 unsigned int port_id = 0;
762 struct mlx4_secondary_data *sd;
765 unsigned int nb_tx_queues;
766 unsigned int nb_rx_queues;
769 /* priv must be valid at this point. */
770 assert(priv != NULL);
771 /* priv->dev must also be valid but may point to local memory from
772 * another process, possibly with the same address and must not
773 * be dereferenced yet. */
774 assert(priv->dev != NULL);
775 /* Determine port ID by finding out where priv comes from. */
777 sd = &mlx4_secondary_data[port_id];
778 rte_spinlock_lock(&sd->lock);
779 /* Primary process? */
780 if (sd->primary_priv == priv)
782 /* Secondary process? */
783 if (sd->data.dev_private == priv)
785 rte_spinlock_unlock(&sd->lock);
786 if (++port_id == RTE_DIM(mlx4_secondary_data))
789 /* Switch to secondary private structure. If private data has already
790 * been updated by another thread, there is nothing else to do. */
791 priv = sd->data.dev_private;
792 if (priv->dev->data == &sd->data)
794 /* Sanity checks. Secondary private structure is supposed to point
795 * to local eth_dev, itself still pointing to the shared device data
796 * structure allocated by the primary process. */
797 assert(sd->shared_dev_data != &sd->data);
798 assert(sd->data.nb_tx_queues == 0);
799 assert(sd->data.tx_queues == NULL);
800 assert(sd->data.nb_rx_queues == 0);
801 assert(sd->data.rx_queues == NULL);
802 assert(priv != sd->primary_priv);
803 assert(priv->dev->data == sd->shared_dev_data);
804 assert(priv->txqs_n == 0);
805 assert(priv->txqs == NULL);
806 assert(priv->rxqs_n == 0);
807 assert(priv->rxqs == NULL);
808 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
809 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
810 /* Allocate local storage for queues. */
811 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
812 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
813 RTE_CACHE_LINE_SIZE);
814 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
815 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
816 RTE_CACHE_LINE_SIZE);
817 if (tx_queues == NULL || rx_queues == NULL)
819 /* Lock to prevent control operations during setup. */
822 for (i = 0; i != nb_tx_queues; ++i) {
823 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
826 if (primary_txq == NULL)
828 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
829 primary_txq->socket);
831 if (txq_setup(priv->dev,
833 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
836 txq->stats.idx = primary_txq->stats.idx;
843 txq = tx_queues[--i];
850 for (i = 0; i != nb_rx_queues; ++i) {
851 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
853 if (primary_rxq == NULL)
855 /* Not supported yet. */
858 /* Update everything. */
859 priv->txqs = (void *)tx_queues;
860 priv->txqs_n = nb_tx_queues;
861 priv->rxqs = (void *)rx_queues;
862 priv->rxqs_n = nb_rx_queues;
863 sd->data.rx_queues = rx_queues;
864 sd->data.tx_queues = tx_queues;
865 sd->data.nb_rx_queues = nb_rx_queues;
866 sd->data.nb_tx_queues = nb_tx_queues;
867 sd->data.dev_link = sd->shared_dev_data->dev_link;
868 sd->data.mtu = sd->shared_dev_data->mtu;
869 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
870 sizeof(sd->data.rx_queue_state));
871 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
872 sizeof(sd->data.tx_queue_state));
873 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
874 /* Use local data from now on. */
876 priv->dev->data = &sd->data;
878 priv->dev->tx_pkt_burst = mlx4_tx_burst;
879 priv->dev->rx_pkt_burst = removed_rx_burst;
882 /* More sanity checks. */
883 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
884 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
885 assert(priv->dev->data == &sd->data);
886 rte_spinlock_unlock(&sd->lock);
892 rte_spinlock_unlock(&sd->lock);
896 /* TX queues handling. */
899 * Allocate TX queue elements.
902 * Pointer to TX queue structure.
904 * Number of elements to allocate.
907 * 0 on success, errno value on failure.
910 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
913 struct txq_elt (*elts)[elts_n] =
914 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
915 linear_t (*elts_linear)[elts_n] =
916 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
918 struct ibv_mr *mr_linear = NULL;
921 if ((elts == NULL) || (elts_linear == NULL)) {
922 ERROR("%p: can't allocate packets array", (void *)txq);
927 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
928 IBV_ACCESS_LOCAL_WRITE);
929 if (mr_linear == NULL) {
930 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
935 for (i = 0; (i != elts_n); ++i) {
936 struct txq_elt *elt = &(*elts)[i];
940 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
941 txq->elts_n = elts_n;
946 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
947 * at least 4 times per ring. */
948 txq->elts_comp_cd_init =
949 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
950 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
951 txq->elts_comp_cd = txq->elts_comp_cd_init;
952 txq->elts_linear = elts_linear;
953 txq->mr_linear = mr_linear;
957 if (mr_linear != NULL)
958 claim_zero(ibv_dereg_mr(mr_linear));
960 rte_free(elts_linear);
963 DEBUG("%p: failed, freed everything", (void *)txq);
969 * Free TX queue elements.
972 * Pointer to TX queue structure.
975 txq_free_elts(struct txq *txq)
977 unsigned int elts_n = txq->elts_n;
978 unsigned int elts_head = txq->elts_head;
979 unsigned int elts_tail = txq->elts_tail;
980 struct txq_elt (*elts)[elts_n] = txq->elts;
981 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
982 struct ibv_mr *mr_linear = txq->mr_linear;
984 DEBUG("%p: freeing WRs", (void *)txq);
989 txq->elts_comp_cd = 0;
990 txq->elts_comp_cd_init = 0;
992 txq->elts_linear = NULL;
993 txq->mr_linear = NULL;
994 if (mr_linear != NULL)
995 claim_zero(ibv_dereg_mr(mr_linear));
997 rte_free(elts_linear);
1000 while (elts_tail != elts_head) {
1001 struct txq_elt *elt = &(*elts)[elts_tail];
1003 assert(elt->buf != NULL);
1004 rte_pktmbuf_free(elt->buf);
1007 memset(elt, 0x77, sizeof(*elt));
1009 if (++elts_tail == elts_n)
1017 * Clean up a TX queue.
1019 * Destroy objects, free allocated memory and reset the structure for reuse.
1022 * Pointer to TX queue structure.
1025 txq_cleanup(struct txq *txq)
1027 struct ibv_exp_release_intf_params params;
1030 DEBUG("cleaning up %p", (void *)txq);
1032 if (txq->if_qp != NULL) {
1033 assert(txq->priv != NULL);
1034 assert(txq->priv->ctx != NULL);
1035 assert(txq->qp != NULL);
1036 params = (struct ibv_exp_release_intf_params){
1039 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1043 if (txq->if_cq != NULL) {
1044 assert(txq->priv != NULL);
1045 assert(txq->priv->ctx != NULL);
1046 assert(txq->cq != NULL);
1047 params = (struct ibv_exp_release_intf_params){
1050 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1054 if (txq->qp != NULL)
1055 claim_zero(ibv_destroy_qp(txq->qp));
1056 if (txq->cq != NULL)
1057 claim_zero(ibv_destroy_cq(txq->cq));
1058 if (txq->rd != NULL) {
1059 struct ibv_exp_destroy_res_domain_attr attr = {
1063 assert(txq->priv != NULL);
1064 assert(txq->priv->ctx != NULL);
1065 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1069 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1070 if (txq->mp2mr[i].mp == NULL)
1072 assert(txq->mp2mr[i].mr != NULL);
1073 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1075 memset(txq, 0, sizeof(*txq));
1079 * Manage TX completions.
1081 * When sending a burst, mlx4_tx_burst() posts several WRs.
1082 * To improve performance, a completion event is only required once every
1083 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1084 * for other WRs, but this information would not be used anyway.
1087 * Pointer to TX queue structure.
1090 * 0 on success, -1 on failure.
1093 txq_complete(struct txq *txq)
1095 unsigned int elts_comp = txq->elts_comp;
1096 unsigned int elts_tail = txq->elts_tail;
1097 const unsigned int elts_n = txq->elts_n;
1100 if (unlikely(elts_comp == 0))
1103 DEBUG("%p: processing %u work requests completions",
1104 (void *)txq, elts_comp);
1106 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1107 if (unlikely(wcs_n == 0))
1109 if (unlikely(wcs_n < 0)) {
1110 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1111 (void *)txq, wcs_n);
1115 assert(elts_comp <= txq->elts_comp);
1117 * Assume WC status is successful as nothing can be done about it
1120 elts_tail += wcs_n * txq->elts_comp_cd_init;
1121 if (elts_tail >= elts_n)
1122 elts_tail -= elts_n;
1123 txq->elts_tail = elts_tail;
1124 txq->elts_comp = elts_comp;
1128 struct mlx4_check_mempool_data {
1134 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
1135 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
1136 void *opaque, struct rte_mempool_memhdr *memhdr,
1139 struct mlx4_check_mempool_data *data = opaque;
1144 /* It already failed, skip the next chunks. */
1147 /* It is the first chunk. */
1148 if (data->start == NULL && data->end == NULL) {
1149 data->start = memhdr->addr;
1150 data->end = data->start + memhdr->len;
1153 if (data->end == memhdr->addr) {
1154 data->end += memhdr->len;
1157 if (data->start == (char *)memhdr->addr + memhdr->len) {
1158 data->start -= memhdr->len;
1161 /* Error, mempool is not virtually contigous. */
1166 * Check if a mempool can be used: it must be virtually contiguous.
1169 * Pointer to memory pool.
1171 * Pointer to the start address of the mempool virtual memory area
1173 * Pointer to the end address of the mempool virtual memory area
1176 * 0 on success (mempool is virtually contiguous), -1 on error.
1178 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
1181 struct mlx4_check_mempool_data data;
1183 memset(&data, 0, sizeof(data));
1184 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
1185 *start = (uintptr_t)data.start;
1186 *end = (uintptr_t)data.end;
1191 /* For best performance, this function should not be inlined. */
1192 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1196 * Register mempool as a memory region.
1199 * Pointer to protection domain.
1201 * Pointer to memory pool.
1204 * Memory region pointer, NULL in case of error.
1206 static struct ibv_mr *
1207 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1209 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1214 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1215 ERROR("mempool %p: not virtually contiguous",
1220 DEBUG("mempool %p area start=%p end=%p size=%zu",
1221 (void *)mp, (void *)start, (void *)end,
1222 (size_t)(end - start));
1223 /* Round start and end to page boundary if found in memory segments. */
1224 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1225 uintptr_t addr = (uintptr_t)ms[i].addr;
1226 size_t len = ms[i].len;
1227 unsigned int align = ms[i].hugepage_sz;
1229 if ((start > addr) && (start < addr + len))
1230 start = RTE_ALIGN_FLOOR(start, align);
1231 if ((end > addr) && (end < addr + len))
1232 end = RTE_ALIGN_CEIL(end, align);
1234 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1235 (void *)mp, (void *)start, (void *)end,
1236 (size_t)(end - start));
1237 return ibv_reg_mr(pd,
1240 IBV_ACCESS_LOCAL_WRITE);
1244 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1245 * the cloned mbuf is allocated is returned instead.
1251 * Memory pool where data is located for given mbuf.
1253 static struct rte_mempool *
1254 txq_mb2mp(struct rte_mbuf *buf)
1256 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1257 return rte_mbuf_from_indirect(buf)->pool;
1262 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1263 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1264 * remove an entry first.
1267 * Pointer to TX queue structure.
1269 * Memory Pool for which a Memory Region lkey must be returned.
1272 * mr->lkey on success, (uint32_t)-1 on failure.
1275 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1280 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1281 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1282 /* Unknown MP, add a new MR for it. */
1285 if (txq->mp2mr[i].mp == mp) {
1286 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1287 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1288 return txq->mp2mr[i].lkey;
1291 /* Add a new entry, register MR first. */
1292 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1293 (void *)txq, mp->name, (void *)mp);
1294 mr = mlx4_mp2mr(txq->priv->pd, mp);
1295 if (unlikely(mr == NULL)) {
1296 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1298 return (uint32_t)-1;
1300 if (unlikely(i == elemof(txq->mp2mr))) {
1301 /* Table is full, remove oldest entry. */
1302 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1305 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1306 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1307 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1309 /* Store the new entry. */
1310 txq->mp2mr[i].mp = mp;
1311 txq->mp2mr[i].mr = mr;
1312 txq->mp2mr[i].lkey = mr->lkey;
1313 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1314 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1315 return txq->mp2mr[i].lkey;
1318 struct txq_mp2mr_mbuf_check_data {
1323 * Callback function for rte_mempool_obj_iter() to check whether a given
1324 * mempool object looks like a mbuf.
1327 * The mempool pointer
1329 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1334 * Object index, unused.
1337 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1338 uint32_t index __rte_unused)
1340 struct txq_mp2mr_mbuf_check_data *data = arg;
1341 struct rte_mbuf *buf = obj;
1343 /* Check whether mbuf structure fits element size and whether mempool
1344 * pointer is valid. */
1345 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1350 * Iterator function for rte_mempool_walk() to register existing mempools and
1351 * fill the MP to MR cache of a TX queue.
1354 * Memory Pool to register.
1356 * Pointer to TX queue structure.
1359 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1361 struct txq *txq = arg;
1362 struct txq_mp2mr_mbuf_check_data data = {
1366 /* Register mempool only if the first element looks like a mbuf. */
1367 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1373 #if MLX4_PMD_SGE_WR_N > 1
1376 * Copy scattered mbuf contents to a single linear buffer.
1378 * @param[out] linear
1379 * Linear output buffer.
1381 * Scattered input buffer.
1384 * Number of bytes copied to the output buffer or 0 if not large enough.
1387 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1389 unsigned int size = 0;
1390 unsigned int offset;
1393 unsigned int len = DATA_LEN(buf);
1397 if (unlikely(size > sizeof(*linear)))
1399 memcpy(&(*linear)[offset],
1400 rte_pktmbuf_mtod(buf, uint8_t *),
1403 } while (buf != NULL);
1408 * Handle scattered buffers for mlx4_tx_burst().
1411 * TX queue structure.
1413 * Number of segments in buf.
1415 * TX queue element to fill.
1417 * Buffer to process.
1419 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1421 * Array filled with SGEs on success.
1424 * A structure containing the processed packet size in bytes and the
1425 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1428 static struct tx_burst_sg_ret {
1429 unsigned int length;
1432 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1433 struct rte_mbuf *buf, unsigned int elts_head,
1434 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1436 unsigned int sent_size = 0;
1440 /* When there are too many segments, extra segments are
1441 * linearized in the last SGE. */
1442 if (unlikely(segs > elemof(*sges))) {
1443 segs = (elemof(*sges) - 1);
1446 /* Update element. */
1448 /* Register segments as SGEs. */
1449 for (j = 0; (j != segs); ++j) {
1450 struct ibv_sge *sge = &(*sges)[j];
1453 /* Retrieve Memory Region key for this memory pool. */
1454 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1455 if (unlikely(lkey == (uint32_t)-1)) {
1456 /* MR does not exist. */
1457 DEBUG("%p: unable to get MP <-> MR association",
1459 /* Clean up TX element. */
1464 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1466 rte_prefetch0((volatile void *)
1467 (uintptr_t)sge->addr);
1468 sge->length = DATA_LEN(buf);
1470 sent_size += sge->length;
1473 /* If buf is not NULL here and is not going to be linearized,
1474 * nb_segs is not valid. */
1476 assert((buf == NULL) || (linearize));
1477 /* Linearize extra segments. */
1479 struct ibv_sge *sge = &(*sges)[segs];
1480 linear_t *linear = &(*txq->elts_linear)[elts_head];
1481 unsigned int size = linearize_mbuf(linear, buf);
1483 assert(segs == (elemof(*sges) - 1));
1485 /* Invalid packet. */
1486 DEBUG("%p: packet too large to be linearized.",
1488 /* Clean up TX element. */
1492 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1493 if (elemof(*sges) == 1) {
1495 struct rte_mbuf *next = NEXT(buf);
1497 rte_pktmbuf_free_seg(buf);
1499 } while (buf != NULL);
1503 sge->addr = (uintptr_t)&(*linear)[0];
1505 sge->lkey = txq->mr_linear->lkey;
1507 /* Include last segment. */
1510 return (struct tx_burst_sg_ret){
1511 .length = sent_size,
1515 return (struct tx_burst_sg_ret){
1521 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1524 * DPDK callback for TX.
1527 * Generic pointer to TX queue structure.
1529 * Packets to transmit.
1531 * Number of packets in array.
1534 * Number of packets successfully transmitted (<= pkts_n).
1537 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1539 struct txq *txq = (struct txq *)dpdk_txq;
1540 unsigned int elts_head = txq->elts_head;
1541 const unsigned int elts_n = txq->elts_n;
1542 unsigned int elts_comp_cd = txq->elts_comp_cd;
1543 unsigned int elts_comp = 0;
1548 assert(elts_comp_cd != 0);
1550 max = (elts_n - (elts_head - txq->elts_tail));
1554 assert(max <= elts_n);
1555 /* Always leave one free entry in the ring. */
1561 for (i = 0; (i != max); ++i) {
1562 struct rte_mbuf *buf = pkts[i];
1563 unsigned int elts_head_next =
1564 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1565 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1566 struct txq_elt *elt = &(*txq->elts)[elts_head];
1567 unsigned int segs = NB_SEGS(buf);
1568 #ifdef MLX4_PMD_SOFT_COUNTERS
1569 unsigned int sent_size = 0;
1571 uint32_t send_flags = 0;
1573 /* Clean up old buffer. */
1574 if (likely(elt->buf != NULL)) {
1575 struct rte_mbuf *tmp = elt->buf;
1579 memset(elt, 0x66, sizeof(*elt));
1581 /* Faster than rte_pktmbuf_free(). */
1583 struct rte_mbuf *next = NEXT(tmp);
1585 rte_pktmbuf_free_seg(tmp);
1587 } while (tmp != NULL);
1589 /* Request TX completion. */
1590 if (unlikely(--elts_comp_cd == 0)) {
1591 elts_comp_cd = txq->elts_comp_cd_init;
1593 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1595 /* Should we enable HW CKSUM offload */
1597 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1598 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1599 /* HW does not support checksum offloads at arbitrary
1600 * offsets but automatically recognizes the packet
1601 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1602 * tunnels are currently supported. */
1603 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1604 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1606 if (likely(segs == 1)) {
1611 /* Retrieve buffer information. */
1612 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1613 length = DATA_LEN(buf);
1614 /* Retrieve Memory Region key for this memory pool. */
1615 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1616 if (unlikely(lkey == (uint32_t)-1)) {
1617 /* MR does not exist. */
1618 DEBUG("%p: unable to get MP <-> MR"
1619 " association", (void *)txq);
1620 /* Clean up TX element. */
1624 /* Update element. */
1627 rte_prefetch0((volatile void *)
1629 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1630 /* Put packet into send queue. */
1631 #if MLX4_PMD_MAX_INLINE > 0
1632 if (length <= txq->max_inline)
1633 err = txq->if_qp->send_pending_inline
1640 err = txq->if_qp->send_pending
1648 #ifdef MLX4_PMD_SOFT_COUNTERS
1649 sent_size += length;
1652 #if MLX4_PMD_SGE_WR_N > 1
1653 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1654 struct tx_burst_sg_ret ret;
1656 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1658 if (ret.length == (unsigned int)-1)
1660 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1661 /* Put SG list into send queue. */
1662 err = txq->if_qp->send_pending_sg_list
1669 #ifdef MLX4_PMD_SOFT_COUNTERS
1670 sent_size += ret.length;
1672 #else /* MLX4_PMD_SGE_WR_N > 1 */
1673 DEBUG("%p: TX scattered buffers support not"
1674 " compiled in", (void *)txq);
1676 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1678 elts_head = elts_head_next;
1679 #ifdef MLX4_PMD_SOFT_COUNTERS
1680 /* Increment sent bytes counter. */
1681 txq->stats.obytes += sent_size;
1685 /* Take a shortcut if nothing must be sent. */
1686 if (unlikely(i == 0))
1688 #ifdef MLX4_PMD_SOFT_COUNTERS
1689 /* Increment sent packets counter. */
1690 txq->stats.opackets += i;
1692 /* Ring QP doorbell. */
1693 err = txq->if_qp->send_flush(txq->qp);
1694 if (unlikely(err)) {
1695 /* A nonzero value is not supposed to be returned.
1696 * Nothing can be done about it. */
1697 DEBUG("%p: send_flush() failed with error %d",
1700 txq->elts_head = elts_head;
1701 txq->elts_comp += elts_comp;
1702 txq->elts_comp_cd = elts_comp_cd;
1707 * DPDK callback for TX in secondary processes.
1709 * This function configures all queues from primary process information
1710 * if necessary before reverting to the normal TX burst callback.
1713 * Generic pointer to TX queue structure.
1715 * Packets to transmit.
1717 * Number of packets in array.
1720 * Number of packets successfully transmitted (<= pkts_n).
1723 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1726 struct txq *txq = dpdk_txq;
1727 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1728 struct priv *primary_priv;
1734 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1735 /* Look for queue index in both private structures. */
1736 for (index = 0; index != priv->txqs_n; ++index)
1737 if (((*primary_priv->txqs)[index] == txq) ||
1738 ((*priv->txqs)[index] == txq))
1740 if (index == priv->txqs_n)
1742 txq = (*priv->txqs)[index];
1743 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1747 * Configure a TX queue.
1750 * Pointer to Ethernet device structure.
1752 * Pointer to TX queue structure.
1754 * Number of descriptors to configure in queue.
1756 * NUMA socket on which memory must be allocated.
1758 * Thresholds parameters.
1761 * 0 on success, errno value on failure.
1764 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1765 unsigned int socket, const struct rte_eth_txconf *conf)
1767 struct priv *priv = mlx4_get_priv(dev);
1773 struct ibv_exp_query_intf_params params;
1774 struct ibv_exp_qp_init_attr init;
1775 struct ibv_exp_res_domain_init_attr rd;
1776 struct ibv_exp_cq_init_attr cq;
1777 struct ibv_exp_qp_attr mod;
1779 enum ibv_exp_query_intf_status status;
1782 (void)conf; /* Thresholds configuration (ignored). */
1785 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1786 ERROR("%p: invalid number of TX descriptors (must be a"
1787 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1790 desc /= MLX4_PMD_SGE_WR_N;
1791 /* MRs will be registered in mp2mr[] later. */
1792 attr.rd = (struct ibv_exp_res_domain_init_attr){
1793 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1794 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1795 .thread_model = IBV_EXP_THREAD_SINGLE,
1796 .msg_model = IBV_EXP_MSG_HIGH_BW,
1798 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1799 if (tmpl.rd == NULL) {
1801 ERROR("%p: RD creation failure: %s",
1802 (void *)dev, strerror(ret));
1805 attr.cq = (struct ibv_exp_cq_init_attr){
1806 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1807 .res_domain = tmpl.rd,
1809 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1810 if (tmpl.cq == NULL) {
1812 ERROR("%p: CQ creation failure: %s",
1813 (void *)dev, strerror(ret));
1816 DEBUG("priv->device_attr.max_qp_wr is %d",
1817 priv->device_attr.max_qp_wr);
1818 DEBUG("priv->device_attr.max_sge is %d",
1819 priv->device_attr.max_sge);
1820 attr.init = (struct ibv_exp_qp_init_attr){
1821 /* CQ to be associated with the send queue. */
1823 /* CQ to be associated with the receive queue. */
1826 /* Max number of outstanding WRs. */
1827 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1828 priv->device_attr.max_qp_wr :
1830 /* Max number of scatter/gather elements in a WR. */
1831 .max_send_sge = ((priv->device_attr.max_sge <
1832 MLX4_PMD_SGE_WR_N) ?
1833 priv->device_attr.max_sge :
1835 #if MLX4_PMD_MAX_INLINE > 0
1836 .max_inline_data = MLX4_PMD_MAX_INLINE,
1839 .qp_type = IBV_QPT_RAW_PACKET,
1840 /* Do *NOT* enable this, completions events are managed per
1844 .res_domain = tmpl.rd,
1845 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1846 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1848 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1849 if (tmpl.qp == NULL) {
1850 ret = (errno ? errno : EINVAL);
1851 ERROR("%p: QP creation failure: %s",
1852 (void *)dev, strerror(ret));
1855 #if MLX4_PMD_MAX_INLINE > 0
1856 /* ibv_create_qp() updates this value. */
1857 tmpl.max_inline = attr.init.cap.max_inline_data;
1859 attr.mod = (struct ibv_exp_qp_attr){
1860 /* Move the QP to this state. */
1861 .qp_state = IBV_QPS_INIT,
1862 /* Primary port number. */
1863 .port_num = priv->port
1865 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1866 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1868 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1869 (void *)dev, strerror(ret));
1872 ret = txq_alloc_elts(&tmpl, desc);
1874 ERROR("%p: TXQ allocation failed: %s",
1875 (void *)dev, strerror(ret));
1878 attr.mod = (struct ibv_exp_qp_attr){
1879 .qp_state = IBV_QPS_RTR
1881 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1883 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1884 (void *)dev, strerror(ret));
1887 attr.mod.qp_state = IBV_QPS_RTS;
1888 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1890 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1891 (void *)dev, strerror(ret));
1894 attr.params = (struct ibv_exp_query_intf_params){
1895 .intf_scope = IBV_EXP_INTF_GLOBAL,
1896 .intf = IBV_EXP_INTF_CQ,
1899 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1900 if (tmpl.if_cq == NULL) {
1901 ERROR("%p: CQ interface family query failed with status %d",
1902 (void *)dev, status);
1905 attr.params = (struct ibv_exp_query_intf_params){
1906 .intf_scope = IBV_EXP_INTF_GLOBAL,
1907 .intf = IBV_EXP_INTF_QP_BURST,
1909 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1910 /* MC loopback must be disabled when not using a VF. */
1913 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1917 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1918 if (tmpl.if_qp == NULL) {
1919 ERROR("%p: QP interface family query failed with status %d",
1920 (void *)dev, status);
1923 /* Clean up txq in case we're reinitializing it. */
1924 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1927 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1928 /* Pre-register known mempools. */
1929 rte_mempool_walk(txq_mp2mr_iter, txq);
1939 * DPDK callback to configure a TX queue.
1942 * Pointer to Ethernet device structure.
1946 * Number of descriptors to configure in queue.
1948 * NUMA socket on which memory must be allocated.
1950 * Thresholds parameters.
1953 * 0 on success, negative errno value on failure.
1956 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1957 unsigned int socket, const struct rte_eth_txconf *conf)
1959 struct priv *priv = dev->data->dev_private;
1960 struct txq *txq = (*priv->txqs)[idx];
1963 if (mlx4_is_secondary())
1964 return -E_RTE_SECONDARY;
1966 DEBUG("%p: configuring queue %u for %u descriptors",
1967 (void *)dev, idx, desc);
1968 if (idx >= priv->txqs_n) {
1969 ERROR("%p: queue index out of range (%u >= %u)",
1970 (void *)dev, idx, priv->txqs_n);
1975 DEBUG("%p: reusing already allocated queue index %u (%p)",
1976 (void *)dev, idx, (void *)txq);
1977 if (priv->started) {
1981 (*priv->txqs)[idx] = NULL;
1984 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1986 ERROR("%p: unable to allocate queue index %u",
1992 ret = txq_setup(dev, txq, desc, socket, conf);
1996 txq->stats.idx = idx;
1997 DEBUG("%p: adding TX queue %p to list",
1998 (void *)dev, (void *)txq);
1999 (*priv->txqs)[idx] = txq;
2000 /* Update send callback. */
2001 dev->tx_pkt_burst = mlx4_tx_burst;
2008 * DPDK callback to release a TX queue.
2011 * Generic TX queue pointer.
2014 mlx4_tx_queue_release(void *dpdk_txq)
2016 struct txq *txq = (struct txq *)dpdk_txq;
2020 if (mlx4_is_secondary())
2026 for (i = 0; (i != priv->txqs_n); ++i)
2027 if ((*priv->txqs)[i] == txq) {
2028 DEBUG("%p: removing TX queue %p from list",
2029 (void *)priv->dev, (void *)txq);
2030 (*priv->txqs)[i] = NULL;
2038 /* RX queues handling. */
2041 * Allocate RX queue elements with scattered packets support.
2044 * Pointer to RX queue structure.
2046 * Number of elements to allocate.
2048 * If not NULL, fetch buffers from this array instead of allocating them
2049 * with rte_pktmbuf_alloc().
2052 * 0 on success, errno value on failure.
2055 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2056 struct rte_mbuf **pool)
2059 struct rxq_elt_sp (*elts)[elts_n] =
2060 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2065 ERROR("%p: can't allocate packets array", (void *)rxq);
2069 /* For each WR (packet). */
2070 for (i = 0; (i != elts_n); ++i) {
2072 struct rxq_elt_sp *elt = &(*elts)[i];
2073 struct ibv_recv_wr *wr = &elt->wr;
2074 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2076 /* These two arrays must have the same size. */
2077 assert(elemof(elt->sges) == elemof(elt->bufs));
2080 wr->next = &(*elts)[(i + 1)].wr;
2081 wr->sg_list = &(*sges)[0];
2082 wr->num_sge = elemof(*sges);
2083 /* For each SGE (segment). */
2084 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2085 struct ibv_sge *sge = &(*sges)[j];
2086 struct rte_mbuf *buf;
2090 assert(buf != NULL);
2091 rte_pktmbuf_reset(buf);
2093 buf = rte_pktmbuf_alloc(rxq->mp);
2095 assert(pool == NULL);
2096 ERROR("%p: empty mbuf pool", (void *)rxq);
2101 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2102 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2103 /* Buffer is supposed to be empty. */
2104 assert(rte_pktmbuf_data_len(buf) == 0);
2105 assert(rte_pktmbuf_pkt_len(buf) == 0);
2106 /* sge->addr must be able to store a pointer. */
2107 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2109 /* The first SGE keeps its headroom. */
2110 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2111 sge->length = (buf->buf_len -
2112 RTE_PKTMBUF_HEADROOM);
2114 /* Subsequent SGEs lose theirs. */
2115 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2116 SET_DATA_OFF(buf, 0);
2117 sge->addr = (uintptr_t)buf->buf_addr;
2118 sge->length = buf->buf_len;
2120 sge->lkey = rxq->mr->lkey;
2121 /* Redundant check for tailroom. */
2122 assert(sge->length == rte_pktmbuf_tailroom(buf));
2125 /* The last WR pointer must be NULL. */
2126 (*elts)[(i - 1)].wr.next = NULL;
2127 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2128 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2129 rxq->elts_n = elts_n;
2131 rxq->elts.sp = elts;
2136 assert(pool == NULL);
2137 for (i = 0; (i != elemof(*elts)); ++i) {
2139 struct rxq_elt_sp *elt = &(*elts)[i];
2141 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2142 struct rte_mbuf *buf = elt->bufs[j];
2145 rte_pktmbuf_free_seg(buf);
2150 DEBUG("%p: failed, freed everything", (void *)rxq);
2156 * Free RX queue elements with scattered packets support.
2159 * Pointer to RX queue structure.
2162 rxq_free_elts_sp(struct rxq *rxq)
2165 unsigned int elts_n = rxq->elts_n;
2166 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2168 DEBUG("%p: freeing WRs", (void *)rxq);
2170 rxq->elts.sp = NULL;
2173 for (i = 0; (i != elemof(*elts)); ++i) {
2175 struct rxq_elt_sp *elt = &(*elts)[i];
2177 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2178 struct rte_mbuf *buf = elt->bufs[j];
2181 rte_pktmbuf_free_seg(buf);
2188 * Allocate RX queue elements.
2191 * Pointer to RX queue structure.
2193 * Number of elements to allocate.
2195 * If not NULL, fetch buffers from this array instead of allocating them
2196 * with rte_pktmbuf_alloc().
2199 * 0 on success, errno value on failure.
2202 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2205 struct rxq_elt (*elts)[elts_n] =
2206 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2211 ERROR("%p: can't allocate packets array", (void *)rxq);
2215 /* For each WR (packet). */
2216 for (i = 0; (i != elts_n); ++i) {
2217 struct rxq_elt *elt = &(*elts)[i];
2218 struct ibv_recv_wr *wr = &elt->wr;
2219 struct ibv_sge *sge = &(*elts)[i].sge;
2220 struct rte_mbuf *buf;
2224 assert(buf != NULL);
2225 rte_pktmbuf_reset(buf);
2227 buf = rte_pktmbuf_alloc(rxq->mp);
2229 assert(pool == NULL);
2230 ERROR("%p: empty mbuf pool", (void *)rxq);
2234 /* Configure WR. Work request ID contains its own index in
2235 * the elts array and the offset between SGE buffer header and
2237 WR_ID(wr->wr_id).id = i;
2238 WR_ID(wr->wr_id).offset =
2239 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2241 wr->next = &(*elts)[(i + 1)].wr;
2244 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2245 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2246 /* Buffer is supposed to be empty. */
2247 assert(rte_pktmbuf_data_len(buf) == 0);
2248 assert(rte_pktmbuf_pkt_len(buf) == 0);
2249 /* sge->addr must be able to store a pointer. */
2250 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2251 /* SGE keeps its headroom. */
2252 sge->addr = (uintptr_t)
2253 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2254 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2255 sge->lkey = rxq->mr->lkey;
2256 /* Redundant check for tailroom. */
2257 assert(sge->length == rte_pktmbuf_tailroom(buf));
2258 /* Make sure elts index and SGE mbuf pointer can be deduced
2260 if ((WR_ID(wr->wr_id).id != i) ||
2261 ((void *)((uintptr_t)sge->addr -
2262 WR_ID(wr->wr_id).offset) != buf)) {
2263 ERROR("%p: cannot store index and offset in WR ID",
2266 rte_pktmbuf_free(buf);
2271 /* The last WR pointer must be NULL. */
2272 (*elts)[(i - 1)].wr.next = NULL;
2273 DEBUG("%p: allocated and configured %u single-segment WRs",
2274 (void *)rxq, elts_n);
2275 rxq->elts_n = elts_n;
2277 rxq->elts.no_sp = elts;
2282 assert(pool == NULL);
2283 for (i = 0; (i != elemof(*elts)); ++i) {
2284 struct rxq_elt *elt = &(*elts)[i];
2285 struct rte_mbuf *buf;
2287 if (elt->sge.addr == 0)
2289 assert(WR_ID(elt->wr.wr_id).id == i);
2290 buf = (void *)((uintptr_t)elt->sge.addr -
2291 WR_ID(elt->wr.wr_id).offset);
2292 rte_pktmbuf_free_seg(buf);
2296 DEBUG("%p: failed, freed everything", (void *)rxq);
2302 * Free RX queue elements.
2305 * Pointer to RX queue structure.
2308 rxq_free_elts(struct rxq *rxq)
2311 unsigned int elts_n = rxq->elts_n;
2312 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2314 DEBUG("%p: freeing WRs", (void *)rxq);
2316 rxq->elts.no_sp = NULL;
2319 for (i = 0; (i != elemof(*elts)); ++i) {
2320 struct rxq_elt *elt = &(*elts)[i];
2321 struct rte_mbuf *buf;
2323 if (elt->sge.addr == 0)
2325 assert(WR_ID(elt->wr.wr_id).id == i);
2326 buf = (void *)((uintptr_t)elt->sge.addr -
2327 WR_ID(elt->wr.wr_id).offset);
2328 rte_pktmbuf_free_seg(buf);
2334 * Delete flow steering rule.
2337 * Pointer to RX queue structure.
2339 * MAC address index.
2344 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2347 struct priv *priv = rxq->priv;
2348 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2349 (const uint8_t (*)[ETHER_ADDR_LEN])
2350 priv->mac[mac_index].addr_bytes;
2352 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2353 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2354 " (VLAN ID %" PRIu16 ")",
2356 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2357 mac_index, priv->vlan_filter[vlan_index].id);
2358 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2359 rxq->mac_flow[mac_index][vlan_index] = NULL;
2363 * Unregister a MAC address from a RX queue.
2366 * Pointer to RX queue structure.
2368 * MAC address index.
2371 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2373 struct priv *priv = rxq->priv;
2375 unsigned int vlans = 0;
2377 assert(mac_index < elemof(priv->mac));
2378 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2380 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2381 if (!priv->vlan_filter[i].enabled)
2383 rxq_del_flow(rxq, mac_index, i);
2387 rxq_del_flow(rxq, mac_index, 0);
2389 BITFIELD_RESET(rxq->mac_configured, mac_index);
2393 * Unregister all MAC addresses from a RX queue.
2396 * Pointer to RX queue structure.
2399 rxq_mac_addrs_del(struct rxq *rxq)
2401 struct priv *priv = rxq->priv;
2404 for (i = 0; (i != elemof(priv->mac)); ++i)
2405 rxq_mac_addr_del(rxq, i);
2408 static int rxq_promiscuous_enable(struct rxq *);
2409 static void rxq_promiscuous_disable(struct rxq *);
2412 * Add single flow steering rule.
2415 * Pointer to RX queue structure.
2417 * MAC address index to register.
2419 * VLAN index. Use -1 for a flow without VLAN.
2422 * 0 on success, errno value on failure.
2425 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2427 struct ibv_flow *flow;
2428 struct priv *priv = rxq->priv;
2429 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2430 (const uint8_t (*)[ETHER_ADDR_LEN])
2431 priv->mac[mac_index].addr_bytes;
2433 /* Allocate flow specification on the stack. */
2434 struct __attribute__((packed)) {
2435 struct ibv_flow_attr attr;
2436 struct ibv_flow_spec_eth spec;
2438 struct ibv_flow_attr *attr = &data.attr;
2439 struct ibv_flow_spec_eth *spec = &data.spec;
2441 assert(mac_index < elemof(priv->mac));
2442 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2444 * No padding must be inserted by the compiler between attr and spec.
2445 * This layout is expected by libibverbs.
2447 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2448 *attr = (struct ibv_flow_attr){
2449 .type = IBV_FLOW_ATTR_NORMAL,
2455 *spec = (struct ibv_flow_spec_eth){
2456 .type = IBV_FLOW_SPEC_ETH,
2457 .size = sizeof(*spec),
2460 (*mac)[0], (*mac)[1], (*mac)[2],
2461 (*mac)[3], (*mac)[4], (*mac)[5]
2463 .vlan_tag = ((vlan_index != -1u) ?
2464 htons(priv->vlan_filter[vlan_index].id) :
2468 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2469 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2472 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2473 " (VLAN %s %" PRIu16 ")",
2475 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2477 ((vlan_index != -1u) ? "ID" : "index"),
2478 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2479 /* Create related flow. */
2481 flow = ibv_create_flow(rxq->qp, attr);
2483 /* It's not clear whether errno is always set in this case. */
2484 ERROR("%p: flow configuration failed, errno=%d: %s",
2486 (errno ? strerror(errno) : "Unknown error"));
2491 if (vlan_index == -1u)
2493 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2494 rxq->mac_flow[mac_index][vlan_index] = flow;
2499 * Register a MAC address in a RX queue.
2502 * Pointer to RX queue structure.
2504 * MAC address index to register.
2507 * 0 on success, errno value on failure.
2510 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2512 struct priv *priv = rxq->priv;
2514 unsigned int vlans = 0;
2517 assert(mac_index < elemof(priv->mac));
2518 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2519 rxq_mac_addr_del(rxq, mac_index);
2520 /* Fill VLAN specifications. */
2521 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2522 if (!priv->vlan_filter[i].enabled)
2524 /* Create related flow. */
2525 ret = rxq_add_flow(rxq, mac_index, i);
2530 /* Failure, rollback. */
2532 if (priv->vlan_filter[--i].enabled)
2533 rxq_del_flow(rxq, mac_index, i);
2537 /* In case there is no VLAN filter. */
2539 ret = rxq_add_flow(rxq, mac_index, -1);
2543 BITFIELD_SET(rxq->mac_configured, mac_index);
2548 * Register all MAC addresses in a RX queue.
2551 * Pointer to RX queue structure.
2554 * 0 on success, errno value on failure.
2557 rxq_mac_addrs_add(struct rxq *rxq)
2559 struct priv *priv = rxq->priv;
2563 for (i = 0; (i != elemof(priv->mac)); ++i) {
2564 if (!BITFIELD_ISSET(priv->mac_configured, i))
2566 ret = rxq_mac_addr_add(rxq, i);
2569 /* Failure, rollback. */
2571 rxq_mac_addr_del(rxq, --i);
2579 * Unregister a MAC address.
2581 * In RSS mode, the MAC address is unregistered from the parent queue,
2582 * otherwise it is unregistered from each queue directly.
2585 * Pointer to private structure.
2587 * MAC address index.
2590 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2594 assert(!priv->isolated);
2595 assert(mac_index < elemof(priv->mac));
2596 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2599 rxq_mac_addr_del(LIST_FIRST(&priv->parents), mac_index);
2602 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2603 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2605 BITFIELD_RESET(priv->mac_configured, mac_index);
2609 * Register a MAC address.
2611 * In RSS mode, the MAC address is registered in the parent queue,
2612 * otherwise it is registered in each queue directly.
2615 * Pointer to private structure.
2617 * MAC address index to use.
2619 * MAC address to register.
2622 * 0 on success, errno value on failure.
2625 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2626 const uint8_t (*mac)[ETHER_ADDR_LEN])
2631 assert(mac_index < elemof(priv->mac));
2632 /* First, make sure this address isn't already configured. */
2633 for (i = 0; (i != elemof(priv->mac)); ++i) {
2634 /* Skip this index, it's going to be reconfigured. */
2637 if (!BITFIELD_ISSET(priv->mac_configured, i))
2639 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2641 /* Address already configured elsewhere, return with error. */
2644 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2645 priv_mac_addr_del(priv, mac_index);
2646 priv->mac[mac_index] = (struct ether_addr){
2648 (*mac)[0], (*mac)[1], (*mac)[2],
2649 (*mac)[3], (*mac)[4], (*mac)[5]
2652 /* If device isn't started, this is all we need to do. */
2653 if (!priv->started) {
2655 /* Verify that all queues have this index disabled. */
2656 for (i = 0; (i != priv->rxqs_n); ++i) {
2657 if ((*priv->rxqs)[i] == NULL)
2659 assert(!BITFIELD_ISSET
2660 ((*priv->rxqs)[i]->mac_configured, mac_index));
2666 ret = rxq_mac_addr_add(LIST_FIRST(&priv->parents), mac_index);
2671 for (i = 0; (i != priv->rxqs_n); ++i) {
2672 if ((*priv->rxqs)[i] == NULL)
2674 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2677 /* Failure, rollback. */
2679 if ((*priv->rxqs)[(--i)] != NULL)
2680 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2684 BITFIELD_SET(priv->mac_configured, mac_index);
2689 * Enable allmulti mode in a RX queue.
2692 * Pointer to RX queue structure.
2695 * 0 on success, errno value on failure.
2698 rxq_allmulticast_enable(struct rxq *rxq)
2700 struct ibv_flow *flow;
2701 struct ibv_flow_attr attr = {
2702 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2704 .port = rxq->priv->port,
2708 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2709 if (rxq->allmulti_flow != NULL)
2712 flow = ibv_create_flow(rxq->qp, &attr);
2714 /* It's not clear whether errno is always set in this case. */
2715 ERROR("%p: flow configuration failed, errno=%d: %s",
2717 (errno ? strerror(errno) : "Unknown error"));
2722 rxq->allmulti_flow = flow;
2723 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2728 * Disable allmulti mode in a RX queue.
2731 * Pointer to RX queue structure.
2734 rxq_allmulticast_disable(struct rxq *rxq)
2736 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2737 if (rxq->allmulti_flow == NULL)
2739 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2740 rxq->allmulti_flow = NULL;
2741 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2745 * Enable promiscuous mode in a RX queue.
2748 * Pointer to RX queue structure.
2751 * 0 on success, errno value on failure.
2754 rxq_promiscuous_enable(struct rxq *rxq)
2756 struct ibv_flow *flow;
2757 struct ibv_flow_attr attr = {
2758 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2760 .port = rxq->priv->port,
2766 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2767 if (rxq->promisc_flow != NULL)
2770 flow = ibv_create_flow(rxq->qp, &attr);
2772 /* It's not clear whether errno is always set in this case. */
2773 ERROR("%p: flow configuration failed, errno=%d: %s",
2775 (errno ? strerror(errno) : "Unknown error"));
2780 rxq->promisc_flow = flow;
2781 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2786 * Disable promiscuous mode in a RX queue.
2789 * Pointer to RX queue structure.
2792 rxq_promiscuous_disable(struct rxq *rxq)
2796 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2797 if (rxq->promisc_flow == NULL)
2799 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2800 rxq->promisc_flow = NULL;
2801 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2805 * Clean up a RX queue.
2807 * Destroy objects, free allocated memory and reset the structure for reuse.
2810 * Pointer to RX queue structure.
2813 rxq_cleanup(struct rxq *rxq)
2815 struct ibv_exp_release_intf_params params;
2817 DEBUG("cleaning up %p", (void *)rxq);
2819 rxq_free_elts_sp(rxq);
2822 if (rxq->if_qp != NULL) {
2823 assert(rxq->priv != NULL);
2824 assert(rxq->priv->ctx != NULL);
2825 assert(rxq->qp != NULL);
2826 params = (struct ibv_exp_release_intf_params){
2829 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2833 if (rxq->if_cq != NULL) {
2834 assert(rxq->priv != NULL);
2835 assert(rxq->priv->ctx != NULL);
2836 assert(rxq->cq != NULL);
2837 params = (struct ibv_exp_release_intf_params){
2840 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2844 if (rxq->qp != NULL && !rxq->priv->isolated) {
2845 rxq_promiscuous_disable(rxq);
2846 rxq_allmulticast_disable(rxq);
2847 rxq_mac_addrs_del(rxq);
2849 if (rxq->qp != NULL)
2850 claim_zero(ibv_destroy_qp(rxq->qp));
2851 if (rxq->cq != NULL)
2852 claim_zero(ibv_destroy_cq(rxq->cq));
2853 if (rxq->channel != NULL)
2854 claim_zero(ibv_destroy_comp_channel(rxq->channel));
2855 if (rxq->rd != NULL) {
2856 struct ibv_exp_destroy_res_domain_attr attr = {
2860 assert(rxq->priv != NULL);
2861 assert(rxq->priv->ctx != NULL);
2862 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2866 if (rxq->mr != NULL)
2867 claim_zero(ibv_dereg_mr(rxq->mr));
2868 memset(rxq, 0, sizeof(*rxq));
2872 * Translate RX completion flags to packet type.
2875 * RX completion flags returned by poll_length_flags().
2877 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2880 * Packet type for struct rte_mbuf.
2882 static inline uint32_t
2883 rxq_cq_to_pkt_type(uint32_t flags)
2887 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2890 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,
2891 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2893 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,
2894 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN) |
2896 IBV_EXP_CQ_RX_IPV4_PACKET,
2897 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN) |
2899 IBV_EXP_CQ_RX_IPV6_PACKET,
2900 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN);
2904 IBV_EXP_CQ_RX_IPV4_PACKET,
2905 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2907 IBV_EXP_CQ_RX_IPV6_PACKET,
2908 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN);
2913 * Translate RX completion flags to offload flags.
2916 * Pointer to RX queue structure.
2918 * RX completion flags returned by poll_length_flags().
2921 * Offload flags (ol_flags) for struct rte_mbuf.
2923 static inline uint32_t
2924 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2926 uint32_t ol_flags = 0;
2931 IBV_EXP_CQ_RX_IP_CSUM_OK,
2932 PKT_RX_IP_CKSUM_GOOD) |
2934 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2935 PKT_RX_L4_CKSUM_GOOD);
2936 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2939 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2940 PKT_RX_IP_CKSUM_GOOD) |
2942 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2943 PKT_RX_L4_CKSUM_GOOD);
2948 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2951 * DPDK callback for RX with scattered packets support.
2954 * Generic pointer to RX queue structure.
2956 * Array to store received packets.
2958 * Maximum number of packets in array.
2961 * Number of packets successfully received (<= pkts_n).
2964 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2966 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2967 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2968 const unsigned int elts_n = rxq->elts_n;
2969 unsigned int elts_head = rxq->elts_head;
2970 struct ibv_recv_wr head;
2971 struct ibv_recv_wr **next = &head.next;
2972 struct ibv_recv_wr *bad_wr;
2974 unsigned int pkts_ret = 0;
2977 if (unlikely(!rxq->sp))
2978 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2979 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2981 for (i = 0; (i != pkts_n); ++i) {
2982 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2983 struct ibv_recv_wr *wr = &elt->wr;
2984 uint64_t wr_id = wr->wr_id;
2986 unsigned int pkt_buf_len;
2987 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2988 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2989 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2993 /* Sanity checks. */
2997 assert(wr_id < rxq->elts_n);
2998 assert(wr->sg_list == elt->sges);
2999 assert(wr->num_sge == elemof(elt->sges));
3000 assert(elts_head < rxq->elts_n);
3001 assert(rxq->elts_head < rxq->elts_n);
3002 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3004 if (unlikely(ret < 0)) {
3008 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3010 /* ibv_poll_cq() must be used in case of failure. */
3011 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3012 if (unlikely(wcs_n == 0))
3014 if (unlikely(wcs_n < 0)) {
3015 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3016 (void *)rxq, wcs_n);
3020 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3021 /* Whatever, just repost the offending WR. */
3022 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3023 " completion status (%d): %s",
3024 (void *)rxq, wc.wr_id, wc.status,
3025 ibv_wc_status_str(wc.status));
3026 #ifdef MLX4_PMD_SOFT_COUNTERS
3027 /* Increment dropped packets counter. */
3028 ++rxq->stats.idropped;
3030 /* Link completed WRs together for repost. */
3041 /* Link completed WRs together for repost. */
3045 * Replace spent segments with new ones, concatenate and
3046 * return them as pkt_buf.
3049 struct ibv_sge *sge = &elt->sges[j];
3050 struct rte_mbuf *seg = elt->bufs[j];
3051 struct rte_mbuf *rep;
3052 unsigned int seg_tailroom;
3055 * Fetch initial bytes of packet descriptor into a
3056 * cacheline while allocating rep.
3059 rep = rte_mbuf_raw_alloc(rxq->mp);
3060 if (unlikely(rep == NULL)) {
3062 * Unable to allocate a replacement mbuf,
3065 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3066 " can't allocate a new mbuf",
3067 (void *)rxq, wr_id);
3068 if (pkt_buf != NULL) {
3069 *pkt_buf_next = NULL;
3070 rte_pktmbuf_free(pkt_buf);
3072 /* Increase out of memory counters. */
3073 ++rxq->stats.rx_nombuf;
3074 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3078 /* Poison user-modifiable fields in rep. */
3079 NEXT(rep) = (void *)((uintptr_t)-1);
3080 SET_DATA_OFF(rep, 0xdead);
3081 DATA_LEN(rep) = 0xd00d;
3082 PKT_LEN(rep) = 0xdeadd00d;
3083 NB_SEGS(rep) = 0x2a;
3087 * Clear special flags in mbuf to avoid
3088 * crashing while freeing.
3091 ~(uint64_t)(IND_ATTACHED_MBUF |
3094 assert(rep->buf_len == seg->buf_len);
3095 /* Reconfigure sge to use rep instead of seg. */
3096 assert(sge->lkey == rxq->mr->lkey);
3097 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3100 /* Update pkt_buf if it's the first segment, or link
3101 * seg to the previous one and update pkt_buf_next. */
3102 *pkt_buf_next = seg;
3103 pkt_buf_next = &NEXT(seg);
3104 /* Update seg information. */
3105 seg_tailroom = (seg->buf_len - seg_headroom);
3106 assert(sge->length == seg_tailroom);
3107 SET_DATA_OFF(seg, seg_headroom);
3108 if (likely(len <= seg_tailroom)) {
3110 DATA_LEN(seg) = len;
3113 assert(rte_pktmbuf_headroom(seg) ==
3115 assert(rte_pktmbuf_tailroom(seg) ==
3116 (seg_tailroom - len));
3119 DATA_LEN(seg) = seg_tailroom;
3120 PKT_LEN(seg) = seg_tailroom;
3122 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3123 assert(rte_pktmbuf_tailroom(seg) == 0);
3124 /* Fix len and clear headroom for next segments. */
3125 len -= seg_tailroom;
3128 /* Update head and tail segments. */
3129 *pkt_buf_next = NULL;
3130 assert(pkt_buf != NULL);
3132 NB_SEGS(pkt_buf) = j;
3133 PORT(pkt_buf) = rxq->port_id;
3134 PKT_LEN(pkt_buf) = pkt_buf_len;
3135 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3136 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3138 /* Return packet. */
3139 *(pkts++) = pkt_buf;
3141 #ifdef MLX4_PMD_SOFT_COUNTERS
3142 /* Increase bytes counter. */
3143 rxq->stats.ibytes += pkt_buf_len;
3146 if (++elts_head >= elts_n)
3150 if (unlikely(i == 0))
3155 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3157 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3158 if (unlikely(ret)) {
3159 /* Inability to repost WRs is fatal. */
3160 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3166 rxq->elts_head = elts_head;
3167 #ifdef MLX4_PMD_SOFT_COUNTERS
3168 /* Increase packets counter. */
3169 rxq->stats.ipackets += pkts_ret;
3175 * DPDK callback for RX.
3177 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3178 * manage scattered packets. Improves performance when MRU is lower than the
3179 * size of the first segment.
3182 * Generic pointer to RX queue structure.
3184 * Array to store received packets.
3186 * Maximum number of packets in array.
3189 * Number of packets successfully received (<= pkts_n).
3192 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3194 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3195 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3196 const unsigned int elts_n = rxq->elts_n;
3197 unsigned int elts_head = rxq->elts_head;
3198 struct ibv_sge sges[pkts_n];
3200 unsigned int pkts_ret = 0;
3203 if (unlikely(rxq->sp))
3204 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3205 for (i = 0; (i != pkts_n); ++i) {
3206 struct rxq_elt *elt = &(*elts)[elts_head];
3207 struct ibv_recv_wr *wr = &elt->wr;
3208 uint64_t wr_id = wr->wr_id;
3210 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3211 WR_ID(wr_id).offset);
3212 struct rte_mbuf *rep;
3215 /* Sanity checks. */
3216 assert(WR_ID(wr_id).id < rxq->elts_n);
3217 assert(wr->sg_list == &elt->sge);
3218 assert(wr->num_sge == 1);
3219 assert(elts_head < rxq->elts_n);
3220 assert(rxq->elts_head < rxq->elts_n);
3222 * Fetch initial bytes of packet descriptor into a
3223 * cacheline while allocating rep.
3225 rte_mbuf_prefetch_part1(seg);
3226 rte_mbuf_prefetch_part2(seg);
3227 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3229 if (unlikely(ret < 0)) {
3233 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3235 /* ibv_poll_cq() must be used in case of failure. */
3236 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3237 if (unlikely(wcs_n == 0))
3239 if (unlikely(wcs_n < 0)) {
3240 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3241 (void *)rxq, wcs_n);
3245 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3246 /* Whatever, just repost the offending WR. */
3247 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3248 " completion status (%d): %s",
3249 (void *)rxq, wc.wr_id, wc.status,
3250 ibv_wc_status_str(wc.status));
3251 #ifdef MLX4_PMD_SOFT_COUNTERS
3252 /* Increment dropped packets counter. */
3253 ++rxq->stats.idropped;
3255 /* Add SGE to array for repost. */
3264 rep = rte_mbuf_raw_alloc(rxq->mp);
3265 if (unlikely(rep == NULL)) {
3267 * Unable to allocate a replacement mbuf,
3270 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3271 " can't allocate a new mbuf",
3272 (void *)rxq, WR_ID(wr_id).id);
3273 /* Increase out of memory counters. */
3274 ++rxq->stats.rx_nombuf;
3275 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3276 /* Add SGE to array for repost. */
3281 /* Reconfigure sge to use rep instead of seg. */
3282 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3283 assert(elt->sge.lkey == rxq->mr->lkey);
3284 WR_ID(wr->wr_id).offset =
3285 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3287 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3289 /* Add SGE to array for repost. */
3292 /* Update seg information. */
3293 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3295 PORT(seg) = rxq->port_id;
3298 DATA_LEN(seg) = len;
3299 seg->packet_type = rxq_cq_to_pkt_type(flags);
3300 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3302 /* Return packet. */
3305 #ifdef MLX4_PMD_SOFT_COUNTERS
3306 /* Increase bytes counter. */
3307 rxq->stats.ibytes += len;
3310 if (++elts_head >= elts_n)
3314 if (unlikely(i == 0))
3318 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3320 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3321 if (unlikely(ret)) {
3322 /* Inability to repost WRs is fatal. */
3323 DEBUG("%p: recv_burst(): failed (ret=%d)",
3328 rxq->elts_head = elts_head;
3329 #ifdef MLX4_PMD_SOFT_COUNTERS
3330 /* Increase packets counter. */
3331 rxq->stats.ipackets += pkts_ret;
3337 * DPDK callback for RX in secondary processes.
3339 * This function configures all queues from primary process information
3340 * if necessary before reverting to the normal RX burst callback.
3343 * Generic pointer to RX queue structure.
3345 * Array to store received packets.
3347 * Maximum number of packets in array.
3350 * Number of packets successfully received (<= pkts_n).
3353 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3356 struct rxq *rxq = dpdk_rxq;
3357 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3358 struct priv *primary_priv;
3364 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3365 /* Look for queue index in both private structures. */
3366 for (index = 0; index != priv->rxqs_n; ++index)
3367 if (((*primary_priv->rxqs)[index] == rxq) ||
3368 ((*priv->rxqs)[index] == rxq))
3370 if (index == priv->rxqs_n)
3372 rxq = (*priv->rxqs)[index];
3373 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3377 * Allocate a Queue Pair.
3378 * Optionally setup inline receive if supported.
3381 * Pointer to private structure.
3383 * Completion queue to associate with QP.
3385 * Number of descriptors in QP (hint only).
3388 * QP pointer or NULL in case of error.
3390 static struct ibv_qp *
3391 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3392 struct ibv_exp_res_domain *rd)
3394 struct ibv_exp_qp_init_attr attr = {
3395 /* CQ to be associated with the send queue. */
3397 /* CQ to be associated with the receive queue. */
3400 /* Max number of outstanding WRs. */
3401 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3402 priv->device_attr.max_qp_wr :
3404 /* Max number of scatter/gather elements in a WR. */
3405 .max_recv_sge = ((priv->device_attr.max_sge <
3406 MLX4_PMD_SGE_WR_N) ?
3407 priv->device_attr.max_sge :
3410 .qp_type = IBV_QPT_RAW_PACKET,
3411 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3412 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3418 attr.max_inl_recv = priv->inl_recv_size;
3419 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3421 return ibv_exp_create_qp(priv->ctx, &attr);
3427 * Allocate a RSS Queue Pair.
3428 * Optionally setup inline receive if supported.
3431 * Pointer to private structure.
3433 * Completion queue to associate with QP.
3435 * Number of descriptors in QP (hint only).
3437 * If nonzero, a number of children for parent QP and zero for a child.
3439 * Pointer for a parent in a child case, NULL otherwise.
3442 * QP pointer or NULL in case of error.
3444 static struct ibv_qp *
3445 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3446 int children_n, struct ibv_exp_res_domain *rd,
3447 struct rxq *rxq_parent)
3449 struct ibv_exp_qp_init_attr attr = {
3450 /* CQ to be associated with the send queue. */
3452 /* CQ to be associated with the receive queue. */
3455 /* Max number of outstanding WRs. */
3456 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3457 priv->device_attr.max_qp_wr :
3459 /* Max number of scatter/gather elements in a WR. */
3460 .max_recv_sge = ((priv->device_attr.max_sge <
3461 MLX4_PMD_SGE_WR_N) ?
3462 priv->device_attr.max_sge :
3465 .qp_type = IBV_QPT_RAW_PACKET,
3466 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3467 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3468 IBV_EXP_QP_INIT_ATTR_QPG),
3474 attr.max_inl_recv = priv->inl_recv_size,
3475 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3477 if (children_n > 0) {
3478 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3479 /* TSS isn't necessary. */
3480 attr.qpg.parent_attrib.tss_child_count = 0;
3481 attr.qpg.parent_attrib.rss_child_count =
3482 rte_align32pow2(children_n + 1) >> 1;
3483 DEBUG("initializing parent RSS queue");
3485 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3486 attr.qpg.qpg_parent = rxq_parent->qp;
3487 DEBUG("initializing child RSS queue");
3489 return ibv_exp_create_qp(priv->ctx, &attr);
3492 #endif /* RSS_SUPPORT */
3495 * Reconfigure a RX queue with new parameters.
3497 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3498 * thread (such as a control thread), may corrupt the pool.
3499 * In case of failure, the queue is left untouched.
3502 * Pointer to Ethernet device structure.
3507 * 0 on success, errno value on failure.
3510 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3512 struct priv *priv = rxq->priv;
3513 struct rxq tmpl = *rxq;
3514 unsigned int mbuf_n;
3515 unsigned int desc_n;
3516 struct rte_mbuf **pool;
3518 struct ibv_exp_qp_attr mod;
3519 struct ibv_recv_wr *bad_wr;
3520 unsigned int mb_len;
3523 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
3524 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3525 /* Number of descriptors and mbufs currently allocated. */
3526 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3528 /* Toggle RX checksum offload if hardware supports it. */
3529 if (priv->hw_csum) {
3530 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3531 rxq->csum = tmpl.csum;
3533 if (priv->hw_csum_l2tun) {
3534 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3535 rxq->csum_l2tun = tmpl.csum_l2tun;
3537 /* Enable scattered packets support for this queue if necessary. */
3538 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3539 if (dev->data->dev_conf.rxmode.enable_scatter &&
3540 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3541 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3543 desc_n /= MLX4_PMD_SGE_WR_N;
3546 DEBUG("%p: %s scattered packets support (%u WRs)",
3547 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3548 /* If scatter mode is the same as before, nothing to do. */
3549 if (tmpl.sp == rxq->sp) {
3550 DEBUG("%p: nothing to do", (void *)dev);
3553 /* Remove attached flows if RSS is disabled (no parent queue). */
3554 if (!priv->rss && !priv->isolated) {
3555 rxq_allmulticast_disable(&tmpl);
3556 rxq_promiscuous_disable(&tmpl);
3557 rxq_mac_addrs_del(&tmpl);
3558 /* Update original queue in case of failure. */
3559 rxq->allmulti_flow = tmpl.allmulti_flow;
3560 rxq->promisc_flow = tmpl.promisc_flow;
3561 memcpy(rxq->mac_configured, tmpl.mac_configured,
3562 sizeof(rxq->mac_configured));
3563 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3565 /* From now on, any failure will render the queue unusable.
3566 * Reinitialize QP. */
3569 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3570 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3572 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3576 mod = (struct ibv_exp_qp_attr){
3577 /* Move the QP to this state. */
3578 .qp_state = IBV_QPS_INIT,
3579 /* Primary port number. */
3580 .port_num = priv->port
3582 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3586 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3587 (void *)dev, strerror(err));
3592 err = ibv_resize_cq(tmpl.cq, desc_n);
3594 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3598 /* Reconfigure flows. Do not care for errors. */
3599 if (!priv->rss && !priv->isolated) {
3600 rxq_mac_addrs_add(&tmpl);
3602 rxq_promiscuous_enable(&tmpl);
3604 rxq_allmulticast_enable(&tmpl);
3605 /* Update original queue in case of failure. */
3606 rxq->allmulti_flow = tmpl.allmulti_flow;
3607 rxq->promisc_flow = tmpl.promisc_flow;
3608 memcpy(rxq->mac_configured, tmpl.mac_configured,
3609 sizeof(rxq->mac_configured));
3610 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3612 /* Allocate pool. */
3613 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3615 ERROR("%p: cannot allocate memory", (void *)dev);
3618 /* Snatch mbufs from original queue. */
3621 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3623 for (i = 0; (i != elemof(*elts)); ++i) {
3624 struct rxq_elt_sp *elt = &(*elts)[i];
3627 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3628 assert(elt->bufs[j] != NULL);
3629 pool[k++] = elt->bufs[j];
3633 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3635 for (i = 0; (i != elemof(*elts)); ++i) {
3636 struct rxq_elt *elt = &(*elts)[i];
3637 struct rte_mbuf *buf = (void *)
3638 ((uintptr_t)elt->sge.addr -
3639 WR_ID(elt->wr.wr_id).offset);
3641 assert(WR_ID(elt->wr.wr_id).id == i);
3645 assert(k == mbuf_n);
3647 tmpl.elts.sp = NULL;
3648 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3650 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3651 rxq_alloc_elts(&tmpl, desc_n, pool));
3653 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3658 assert(tmpl.elts_n == desc_n);
3659 assert(tmpl.elts.sp != NULL);
3661 /* Clean up original data. */
3663 rte_free(rxq->elts.sp);
3664 rxq->elts.sp = NULL;
3668 err = ibv_post_recv(tmpl.qp,
3670 &(*tmpl.elts.sp)[0].wr :
3671 &(*tmpl.elts.no_sp)[0].wr),
3674 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3680 mod = (struct ibv_exp_qp_attr){
3681 .qp_state = IBV_QPS_RTR
3683 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3685 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3686 (void *)dev, strerror(err));
3694 * Create verbs QP resources associated with a rxq.
3697 * Pointer to RX queue structure.
3699 * Number of descriptors to configure in queue.
3701 * If true, the queue is disabled because its index is higher or
3702 * equal to the real number of queues, which must be a power of 2.
3704 * The number of children in a parent case, zero for a child.
3706 * The pointer to a parent RX structure for a child in RSS case,
3710 * 0 on success, errno value on failure.
3713 rxq_create_qp(struct rxq *rxq,
3717 struct rxq *rxq_parent)
3720 struct ibv_exp_qp_attr mod;
3721 struct ibv_exp_query_intf_params params;
3722 enum ibv_exp_query_intf_status status;
3723 struct ibv_recv_wr *bad_wr;
3724 int parent = (children_n > 0);
3725 struct priv *priv = rxq->priv;
3728 if (priv->rss && !inactive && (rxq_parent || parent))
3729 rxq->qp = rxq_setup_qp_rss(priv, rxq->cq, desc,
3730 children_n, rxq->rd,
3733 #endif /* RSS_SUPPORT */
3734 rxq->qp = rxq_setup_qp(priv, rxq->cq, desc, rxq->rd);
3735 if (rxq->qp == NULL) {
3736 ret = (errno ? errno : EINVAL);
3737 ERROR("QP creation failure: %s",
3741 mod = (struct ibv_exp_qp_attr){
3742 /* Move the QP to this state. */
3743 .qp_state = IBV_QPS_INIT,
3744 /* Primary port number. */
3745 .port_num = priv->port
3747 ret = ibv_exp_modify_qp(rxq->qp, &mod,
3750 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3751 #endif /* RSS_SUPPORT */
3754 ERROR("QP state to IBV_QPS_INIT failed: %s",
3758 if (!priv->isolated && (parent || !priv->rss)) {
3759 /* Configure MAC and broadcast addresses. */
3760 ret = rxq_mac_addrs_add(rxq);
3762 ERROR("QP flow attachment failed: %s",
3768 ret = ibv_post_recv(rxq->qp,
3770 &(*rxq->elts.sp)[0].wr :
3771 &(*rxq->elts.no_sp)[0].wr),
3774 ERROR("ibv_post_recv() failed for WR %p: %s",
3780 mod = (struct ibv_exp_qp_attr){
3781 .qp_state = IBV_QPS_RTR
3783 ret = ibv_exp_modify_qp(rxq->qp, &mod, IBV_EXP_QP_STATE);
3785 ERROR("QP state to IBV_QPS_RTR failed: %s",
3789 params = (struct ibv_exp_query_intf_params){
3790 .intf_scope = IBV_EXP_INTF_GLOBAL,
3791 .intf = IBV_EXP_INTF_QP_BURST,
3794 rxq->if_qp = ibv_exp_query_intf(priv->ctx, ¶ms, &status);
3795 if (rxq->if_qp == NULL) {
3796 ERROR("QP interface family query failed with status %d",
3804 * Configure a RX queue.
3807 * Pointer to Ethernet device structure.
3809 * Pointer to RX queue structure.
3811 * Number of descriptors to configure in queue.
3813 * NUMA socket on which memory must be allocated.
3815 * If true, the queue is disabled because its index is higher or
3816 * equal to the real number of queues, which must be a power of 2.
3818 * Thresholds parameters.
3820 * Memory pool for buffer allocations.
3822 * The number of children in a parent case, zero for a child.
3824 * The pointer to a parent RX structure (or NULL) in a child case,
3828 * 0 on success, errno value on failure.
3831 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3832 unsigned int socket, int inactive,
3833 const struct rte_eth_rxconf *conf,
3834 struct rte_mempool *mp, int children_n,
3835 struct rxq *rxq_parent)
3837 struct priv *priv = dev->data->dev_private;
3844 struct ibv_exp_query_intf_params params;
3845 struct ibv_exp_cq_init_attr cq;
3846 struct ibv_exp_res_domain_init_attr rd;
3848 enum ibv_exp_query_intf_status status;
3849 unsigned int mb_len;
3851 int parent = (children_n > 0);
3853 (void)conf; /* Thresholds configuration (ignored). */
3855 * If this is a parent queue, hardware must support RSS and
3856 * RSS must be enabled.
3858 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3860 /* Even if unused, ibv_create_cq() requires at least one
3865 mb_len = rte_pktmbuf_data_room_size(mp);
3866 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3867 ERROR("%p: invalid number of RX descriptors (must be a"
3868 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3871 /* Toggle RX checksum offload if hardware supports it. */
3873 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3874 if (priv->hw_csum_l2tun)
3875 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3876 /* Enable scattered packets support for this queue if necessary. */
3877 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3878 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
3879 (mb_len - RTE_PKTMBUF_HEADROOM)) {
3881 } else if (dev->data->dev_conf.rxmode.enable_scatter) {
3883 desc /= MLX4_PMD_SGE_WR_N;
3885 WARN("%p: the requested maximum Rx packet size (%u) is"
3886 " larger than a single mbuf (%u) and scattered"
3887 " mode has not been requested",
3889 dev->data->dev_conf.rxmode.max_rx_pkt_len,
3890 mb_len - RTE_PKTMBUF_HEADROOM);
3892 DEBUG("%p: %s scattered packets support (%u WRs)",
3893 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3894 /* Use the entire RX mempool as the memory region. */
3895 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3896 if (tmpl.mr == NULL) {
3898 ERROR("%p: MR creation failure: %s",
3899 (void *)dev, strerror(ret));
3903 attr.rd = (struct ibv_exp_res_domain_init_attr){
3904 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3905 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3906 .thread_model = IBV_EXP_THREAD_SINGLE,
3907 .msg_model = IBV_EXP_MSG_HIGH_BW,
3909 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3910 if (tmpl.rd == NULL) {
3912 ERROR("%p: RD creation failure: %s",
3913 (void *)dev, strerror(ret));
3916 if (dev->data->dev_conf.intr_conf.rxq) {
3917 tmpl.channel = ibv_create_comp_channel(priv->ctx);
3918 if (tmpl.channel == NULL) {
3920 ERROR("%p: Rx interrupt completion channel creation"
3922 (void *)dev, strerror(ret));
3926 attr.cq = (struct ibv_exp_cq_init_attr){
3927 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3928 .res_domain = tmpl.rd,
3930 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, tmpl.channel, 0,
3932 if (tmpl.cq == NULL) {
3934 ERROR("%p: CQ creation failure: %s",
3935 (void *)dev, strerror(ret));
3938 DEBUG("priv->device_attr.max_qp_wr is %d",
3939 priv->device_attr.max_qp_wr);
3940 DEBUG("priv->device_attr.max_sge is %d",
3941 priv->device_attr.max_sge);
3942 /* Allocate descriptors for RX queues, except for the RSS parent. */
3946 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3948 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3950 ERROR("%p: RXQ allocation failed: %s",
3951 (void *)dev, strerror(ret));
3955 if (parent || rxq_parent || !priv->rss) {
3956 ret = rxq_create_qp(&tmpl, desc, inactive,
3957 children_n, rxq_parent);
3962 tmpl.port_id = dev->data->port_id;
3963 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3964 attr.params = (struct ibv_exp_query_intf_params){
3965 .intf_scope = IBV_EXP_INTF_GLOBAL,
3966 .intf = IBV_EXP_INTF_CQ,
3969 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3970 if (tmpl.if_cq == NULL) {
3972 ERROR("%p: CQ interface family query failed with status %d",
3973 (void *)dev, status);
3976 /* Clean up rxq in case we're reinitializing it. */
3977 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3980 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3990 * DPDK callback to configure a RX queue.
3993 * Pointer to Ethernet device structure.
3997 * Number of descriptors to configure in queue.
3999 * NUMA socket on which memory must be allocated.
4001 * Thresholds parameters.
4003 * Memory pool for buffer allocations.
4006 * 0 on success, negative errno value on failure.
4009 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
4010 unsigned int socket, const struct rte_eth_rxconf *conf,
4011 struct rte_mempool *mp)
4014 struct priv *priv = dev->data->dev_private;
4015 struct rxq *rxq = (*priv->rxqs)[idx];
4019 if (mlx4_is_secondary())
4020 return -E_RTE_SECONDARY;
4022 DEBUG("%p: configuring queue %u for %u descriptors",
4023 (void *)dev, idx, desc);
4024 if (idx >= priv->rxqs_n) {
4025 ERROR("%p: queue index out of range (%u >= %u)",
4026 (void *)dev, idx, priv->rxqs_n);
4031 DEBUG("%p: reusing already allocated queue index %u (%p)",
4032 (void *)dev, idx, (void *)rxq);
4033 if (priv->started) {
4037 (*priv->rxqs)[idx] = NULL;
4040 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
4042 ERROR("%p: unable to allocate queue index %u",
4048 if (priv->rss && !priv->isolated) {
4049 /* The list consists of the single default one. */
4050 parent = LIST_FIRST(&priv->parents);
4051 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
4056 ret = rxq_setup(dev, rxq, desc, socket,
4057 inactive, conf, mp, 0, parent);
4061 rxq->stats.idx = idx;
4062 DEBUG("%p: adding RX queue %p to list",
4063 (void *)dev, (void *)rxq);
4064 (*priv->rxqs)[idx] = rxq;
4065 /* Update receive callback. */
4067 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4069 dev->rx_pkt_burst = mlx4_rx_burst;
4076 * DPDK callback to release a RX queue.
4079 * Generic RX queue pointer.
4082 mlx4_rx_queue_release(void *dpdk_rxq)
4084 struct rxq *rxq = (struct rxq *)dpdk_rxq;
4088 if (mlx4_is_secondary())
4094 for (i = 0; (i != priv->rxqs_n); ++i)
4095 if ((*priv->rxqs)[i] == rxq) {
4096 DEBUG("%p: removing RX queue %p from list",
4097 (void *)priv->dev, (void *)rxq);
4098 (*priv->rxqs)[i] = NULL;
4107 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4110 priv_dev_removal_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4113 priv_dev_link_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4116 * DPDK callback to start the device.
4118 * Simulate device start by attaching all configured flows.
4121 * Pointer to Ethernet device structure.
4124 * 0 on success, negative errno value on failure.
4127 mlx4_dev_start(struct rte_eth_dev *dev)
4129 struct priv *priv = dev->data->dev_private;
4135 if (mlx4_is_secondary())
4136 return -E_RTE_SECONDARY;
4138 if (priv->started) {
4142 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4144 if (priv->isolated) {
4147 } else if (priv->rss) {
4148 rxq = LIST_FIRST(&priv->parents);
4151 rxq = (*priv->rxqs)[0];
4154 /* Iterate only once when RSS is enabled. */
4156 /* Ignore nonexistent RX queues. */
4159 ret = rxq_mac_addrs_add(rxq);
4160 if (!ret && priv->promisc)
4161 ret = rxq_promiscuous_enable(rxq);
4162 if (!ret && priv->allmulti)
4163 ret = rxq_allmulticast_enable(rxq);
4166 WARN("%p: QP flow attachment failed: %s",
4167 (void *)dev, strerror(ret));
4169 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4170 ret = priv_dev_link_interrupt_handler_install(priv, dev);
4172 ERROR("%p: LSC handler install failed",
4176 ret = priv_dev_removal_interrupt_handler_install(priv, dev);
4178 ERROR("%p: RMV handler install failed",
4182 ret = priv_rx_intr_vec_enable(priv);
4184 ERROR("%p: Rx interrupt vector creation failed",
4188 ret = mlx4_priv_flow_start(priv);
4190 ERROR("%p: flow start failed: %s",
4191 (void *)dev, strerror(ret));
4199 rxq = (*priv->rxqs)[i--];
4201 rxq_allmulticast_disable(rxq);
4202 rxq_promiscuous_disable(rxq);
4203 rxq_mac_addrs_del(rxq);
4212 * DPDK callback to stop the device.
4214 * Simulate device stop by detaching all configured flows.
4217 * Pointer to Ethernet device structure.
4220 mlx4_dev_stop(struct rte_eth_dev *dev)
4222 struct priv *priv = dev->data->dev_private;
4227 if (mlx4_is_secondary())
4230 if (!priv->started) {
4234 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4236 if (priv->isolated) {
4239 } else if (priv->rss) {
4240 rxq = LIST_FIRST(&priv->parents);
4243 rxq = (*priv->rxqs)[0];
4246 mlx4_priv_flow_stop(priv);
4247 /* Iterate only once when RSS is enabled. */
4249 /* Ignore nonexistent RX queues. */
4252 rxq_allmulticast_disable(rxq);
4253 rxq_promiscuous_disable(rxq);
4254 rxq_mac_addrs_del(rxq);
4255 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4260 * Dummy DPDK callback for TX.
4262 * This function is used to temporarily replace the real callback during
4263 * unsafe control operations on the queue, or in case of error.
4266 * Generic pointer to TX queue structure.
4268 * Packets to transmit.
4270 * Number of packets in array.
4273 * Number of packets successfully transmitted (<= pkts_n).
4276 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4285 * Dummy DPDK callback for RX.
4287 * This function is used to temporarily replace the real callback during
4288 * unsafe control operations on the queue, or in case of error.
4291 * Generic pointer to RX queue structure.
4293 * Array to store received packets.
4295 * Maximum number of packets in array.
4298 * Number of packets successfully received (<= pkts_n).
4301 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4310 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4313 priv_dev_removal_interrupt_handler_uninstall(struct priv *,
4314 struct rte_eth_dev *);
4317 priv_dev_link_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4320 * DPDK callback to close the device.
4322 * Destroy all queues and objects, free memory.
4325 * Pointer to Ethernet device structure.
4328 mlx4_dev_close(struct rte_eth_dev *dev)
4330 struct priv *priv = mlx4_get_priv(dev);
4337 DEBUG("%p: closing device \"%s\"",
4339 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4340 /* Prevent crashes when queues are still in use. This is unfortunately
4341 * still required for DPDK 1.3 because some programs (such as testpmd)
4342 * never release them before closing the device. */
4343 dev->rx_pkt_burst = removed_rx_burst;
4344 dev->tx_pkt_burst = removed_tx_burst;
4345 if (priv->rxqs != NULL) {
4346 /* XXX race condition if mlx4_rx_burst() is still running. */
4348 for (i = 0; (i != priv->rxqs_n); ++i) {
4349 tmp = (*priv->rxqs)[i];
4352 (*priv->rxqs)[i] = NULL;
4359 if (priv->txqs != NULL) {
4360 /* XXX race condition if mlx4_tx_burst() is still running. */
4362 for (i = 0; (i != priv->txqs_n); ++i) {
4363 tmp = (*priv->txqs)[i];
4366 (*priv->txqs)[i] = NULL;
4374 priv_parent_list_cleanup(priv);
4375 if (priv->pd != NULL) {
4376 assert(priv->ctx != NULL);
4377 claim_zero(ibv_dealloc_pd(priv->pd));
4378 claim_zero(ibv_close_device(priv->ctx));
4380 assert(priv->ctx == NULL);
4381 priv_dev_removal_interrupt_handler_uninstall(priv, dev);
4382 priv_dev_link_interrupt_handler_uninstall(priv, dev);
4383 priv_rx_intr_vec_disable(priv);
4385 memset(priv, 0, sizeof(*priv));
4389 * Change the link state (UP / DOWN).
4392 * Pointer to Ethernet device private data.
4394 * Nonzero for link up, otherwise link down.
4397 * 0 on success, errno value on failure.
4400 priv_set_link(struct priv *priv, int up)
4402 struct rte_eth_dev *dev = priv->dev;
4407 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
4410 for (i = 0; i < priv->rxqs_n; i++)
4411 if ((*priv->rxqs)[i]->sp)
4413 /* Check if an sp queue exists.
4414 * Note: Some old frames might be received.
4416 if (i == priv->rxqs_n)
4417 dev->rx_pkt_burst = mlx4_rx_burst;
4419 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4420 dev->tx_pkt_burst = mlx4_tx_burst;
4422 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
4425 dev->rx_pkt_burst = removed_rx_burst;
4426 dev->tx_pkt_burst = removed_tx_burst;
4432 * DPDK callback to bring the link DOWN.
4435 * Pointer to Ethernet device structure.
4438 * 0 on success, errno value on failure.
4441 mlx4_set_link_down(struct rte_eth_dev *dev)
4443 struct priv *priv = dev->data->dev_private;
4447 err = priv_set_link(priv, 0);
4453 * DPDK callback to bring the link UP.
4456 * Pointer to Ethernet device structure.
4459 * 0 on success, errno value on failure.
4462 mlx4_set_link_up(struct rte_eth_dev *dev)
4464 struct priv *priv = dev->data->dev_private;
4468 err = priv_set_link(priv, 1);
4473 * DPDK callback to get information about the device.
4476 * Pointer to Ethernet device structure.
4478 * Info structure output buffer.
4481 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4483 struct priv *priv = mlx4_get_priv(dev);
4485 char ifname[IF_NAMESIZE];
4487 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
4492 /* FIXME: we should ask the device for these values. */
4493 info->min_rx_bufsize = 32;
4494 info->max_rx_pktlen = 65536;
4496 * Since we need one CQ per QP, the limit is the minimum number
4497 * between the two values.
4499 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4500 priv->device_attr.max_qp : priv->device_attr.max_cq);
4501 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4504 info->max_rx_queues = max;
4505 info->max_tx_queues = max;
4506 /* Last array entry is reserved for broadcast. */
4507 info->max_mac_addrs = (elemof(priv->mac) - 1);
4508 info->rx_offload_capa =
4510 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4511 DEV_RX_OFFLOAD_UDP_CKSUM |
4512 DEV_RX_OFFLOAD_TCP_CKSUM) :
4514 info->tx_offload_capa =
4516 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4517 DEV_TX_OFFLOAD_UDP_CKSUM |
4518 DEV_TX_OFFLOAD_TCP_CKSUM) :
4520 if (priv_get_ifname(priv, &ifname) == 0)
4521 info->if_index = if_nametoindex(ifname);
4524 ETH_LINK_SPEED_10G |
4525 ETH_LINK_SPEED_20G |
4526 ETH_LINK_SPEED_40G |
4531 static const uint32_t *
4532 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4534 static const uint32_t ptypes[] = {
4535 /* refers to rxq_cq_to_pkt_type() */
4538 RTE_PTYPE_INNER_L3_IPV4,
4539 RTE_PTYPE_INNER_L3_IPV6,
4543 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4544 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4550 * DPDK callback to get device statistics.
4553 * Pointer to Ethernet device structure.
4555 * Stats structure output buffer.
4558 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4560 struct priv *priv = mlx4_get_priv(dev);
4561 struct rte_eth_stats tmp = {0};
4568 /* Add software counters. */
4569 for (i = 0; (i != priv->rxqs_n); ++i) {
4570 struct rxq *rxq = (*priv->rxqs)[i];
4574 idx = rxq->stats.idx;
4575 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4576 #ifdef MLX4_PMD_SOFT_COUNTERS
4577 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4578 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4580 tmp.q_errors[idx] += (rxq->stats.idropped +
4581 rxq->stats.rx_nombuf);
4583 #ifdef MLX4_PMD_SOFT_COUNTERS
4584 tmp.ipackets += rxq->stats.ipackets;
4585 tmp.ibytes += rxq->stats.ibytes;
4587 tmp.ierrors += rxq->stats.idropped;
4588 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4590 for (i = 0; (i != priv->txqs_n); ++i) {
4591 struct txq *txq = (*priv->txqs)[i];
4595 idx = txq->stats.idx;
4596 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4597 #ifdef MLX4_PMD_SOFT_COUNTERS
4598 tmp.q_opackets[idx] += txq->stats.opackets;
4599 tmp.q_obytes[idx] += txq->stats.obytes;
4601 tmp.q_errors[idx] += txq->stats.odropped;
4603 #ifdef MLX4_PMD_SOFT_COUNTERS
4604 tmp.opackets += txq->stats.opackets;
4605 tmp.obytes += txq->stats.obytes;
4607 tmp.oerrors += txq->stats.odropped;
4609 #ifndef MLX4_PMD_SOFT_COUNTERS
4610 /* FIXME: retrieve and add hardware counters. */
4617 * DPDK callback to clear device statistics.
4620 * Pointer to Ethernet device structure.
4623 mlx4_stats_reset(struct rte_eth_dev *dev)
4625 struct priv *priv = mlx4_get_priv(dev);
4632 for (i = 0; (i != priv->rxqs_n); ++i) {
4633 if ((*priv->rxqs)[i] == NULL)
4635 idx = (*priv->rxqs)[i]->stats.idx;
4636 (*priv->rxqs)[i]->stats =
4637 (struct mlx4_rxq_stats){ .idx = idx };
4639 for (i = 0; (i != priv->txqs_n); ++i) {
4640 if ((*priv->txqs)[i] == NULL)
4642 idx = (*priv->txqs)[i]->stats.idx;
4643 (*priv->txqs)[i]->stats =
4644 (struct mlx4_txq_stats){ .idx = idx };
4646 #ifndef MLX4_PMD_SOFT_COUNTERS
4647 /* FIXME: reset hardware counters. */
4653 * DPDK callback to remove a MAC address.
4656 * Pointer to Ethernet device structure.
4658 * MAC address index.
4661 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4663 struct priv *priv = dev->data->dev_private;
4665 if (mlx4_is_secondary())
4670 DEBUG("%p: removing MAC address from index %" PRIu32,
4671 (void *)dev, index);
4672 /* Last array entry is reserved for broadcast. */
4673 if (index >= (elemof(priv->mac) - 1))
4675 priv_mac_addr_del(priv, index);
4681 * DPDK callback to add a MAC address.
4684 * Pointer to Ethernet device structure.
4686 * MAC address to register.
4688 * MAC address index.
4690 * VMDq pool index to associate address with (ignored).
4693 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4694 uint32_t index, uint32_t vmdq)
4696 struct priv *priv = dev->data->dev_private;
4699 if (mlx4_is_secondary())
4703 if (priv->isolated) {
4704 DEBUG("%p: cannot add MAC address, "
4705 "device is in isolated mode", (void *)dev);
4709 DEBUG("%p: adding MAC address at index %" PRIu32,
4710 (void *)dev, index);
4711 /* Last array entry is reserved for broadcast. */
4712 if (index >= (elemof(priv->mac) - 1)) {
4716 re = priv_mac_addr_add(priv, index,
4717 (const uint8_t (*)[ETHER_ADDR_LEN])
4718 mac_addr->addr_bytes);
4725 * DPDK callback to set the primary MAC address.
4728 * Pointer to Ethernet device structure.
4730 * MAC address to register.
4733 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4735 DEBUG("%p: setting primary MAC address", (void *)dev);
4736 mlx4_mac_addr_remove(dev, 0);
4737 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4741 * DPDK callback to enable promiscuous mode.
4744 * Pointer to Ethernet device structure.
4747 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4749 struct priv *priv = dev->data->dev_private;
4753 if (mlx4_is_secondary())
4756 if (priv->isolated) {
4757 DEBUG("%p: cannot enable promiscuous, "
4758 "device is in isolated mode", (void *)dev);
4762 if (priv->promisc) {
4766 /* If device isn't started, this is all we need to do. */
4770 ret = rxq_promiscuous_enable(LIST_FIRST(&priv->parents));
4777 for (i = 0; (i != priv->rxqs_n); ++i) {
4778 if ((*priv->rxqs)[i] == NULL)
4780 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4783 /* Failure, rollback. */
4785 if ((*priv->rxqs)[--i] != NULL)
4786 rxq_promiscuous_disable((*priv->rxqs)[i]);
4796 * DPDK callback to disable promiscuous mode.
4799 * Pointer to Ethernet device structure.
4802 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4804 struct priv *priv = dev->data->dev_private;
4807 if (mlx4_is_secondary())
4810 if (!priv->promisc || priv->isolated) {
4815 rxq_promiscuous_disable(LIST_FIRST(&priv->parents));
4818 for (i = 0; (i != priv->rxqs_n); ++i)
4819 if ((*priv->rxqs)[i] != NULL)
4820 rxq_promiscuous_disable((*priv->rxqs)[i]);
4827 * DPDK callback to enable allmulti mode.
4830 * Pointer to Ethernet device structure.
4833 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4835 struct priv *priv = dev->data->dev_private;
4839 if (mlx4_is_secondary())
4842 if (priv->isolated) {
4843 DEBUG("%p: cannot enable allmulticast, "
4844 "device is in isolated mode", (void *)dev);
4848 if (priv->allmulti) {
4852 /* If device isn't started, this is all we need to do. */
4856 ret = rxq_allmulticast_enable(LIST_FIRST(&priv->parents));
4863 for (i = 0; (i != priv->rxqs_n); ++i) {
4864 if ((*priv->rxqs)[i] == NULL)
4866 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4869 /* Failure, rollback. */
4871 if ((*priv->rxqs)[--i] != NULL)
4872 rxq_allmulticast_disable((*priv->rxqs)[i]);
4882 * DPDK callback to disable allmulti mode.
4885 * Pointer to Ethernet device structure.
4888 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4890 struct priv *priv = dev->data->dev_private;
4893 if (mlx4_is_secondary())
4896 if (!priv->allmulti || priv->isolated) {
4901 rxq_allmulticast_disable(LIST_FIRST(&priv->parents));
4904 for (i = 0; (i != priv->rxqs_n); ++i)
4905 if ((*priv->rxqs)[i] != NULL)
4906 rxq_allmulticast_disable((*priv->rxqs)[i]);
4913 * DPDK callback to retrieve physical link information.
4916 * Pointer to Ethernet device structure.
4917 * @param wait_to_complete
4918 * Wait for request completion (ignored).
4921 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4923 const struct priv *priv = mlx4_get_priv(dev);
4924 struct ethtool_cmd edata = {
4928 struct rte_eth_link dev_link;
4931 /* priv_lock() is not taken to allow concurrent calls. */
4935 (void)wait_to_complete;
4936 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4937 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4940 memset(&dev_link, 0, sizeof(dev_link));
4941 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4942 (ifr.ifr_flags & IFF_RUNNING));
4943 ifr.ifr_data = (void *)&edata;
4944 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4945 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4949 link_speed = ethtool_cmd_speed(&edata);
4950 if (link_speed == -1)
4951 dev_link.link_speed = 0;
4953 dev_link.link_speed = link_speed;
4954 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4955 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4956 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4957 ETH_LINK_SPEED_FIXED);
4958 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4959 /* Link status changed. */
4960 dev->data->dev_link = dev_link;
4963 /* Link status is still the same. */
4968 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
4969 struct rte_pci_addr *pci_addr);
4972 * DPDK callback to change the MTU.
4974 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4975 * received). Use this as a hint to enable/disable scattered packets support
4976 * and improve performance when not needed.
4977 * Since failure is not an option, reconfiguring queues on the fly is not
4981 * Pointer to Ethernet device structure.
4986 * 0 on success, negative errno value on failure.
4989 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4991 struct priv *priv = dev->data->dev_private;
4994 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4997 if (mlx4_is_secondary())
4998 return -E_RTE_SECONDARY;
5000 /* Set kernel interface MTU first. */
5001 if (priv_set_mtu(priv, mtu)) {
5003 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
5007 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
5009 /* Temporarily replace RX handler with a fake one, assuming it has not
5010 * been copied elsewhere. */
5011 dev->rx_pkt_burst = removed_rx_burst;
5012 /* Make sure everyone has left mlx4_rx_burst() and uses
5013 * removed_rx_burst() instead. */
5016 /* Reconfigure each RX queue. */
5017 for (i = 0; (i != priv->rxqs_n); ++i) {
5018 struct rxq *rxq = (*priv->rxqs)[i];
5019 unsigned int max_frame_len;
5023 /* Calculate new maximum frame length according to MTU. */
5024 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
5025 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
5026 /* Provide new values to rxq_setup(). */
5027 dev->data->dev_conf.rxmode.jumbo_frame =
5028 (max_frame_len > ETHER_MAX_LEN);
5029 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
5030 ret = rxq_rehash(dev, rxq);
5032 /* Force SP RX if that queue requires it and abort. */
5034 rx_func = mlx4_rx_burst_sp;
5037 /* Reenable non-RSS queue attributes. No need to check
5038 * for errors at this stage. */
5039 if (!priv->rss && !priv->isolated) {
5040 rxq_mac_addrs_add(rxq);
5042 rxq_promiscuous_enable(rxq);
5044 rxq_allmulticast_enable(rxq);
5046 /* Scattered burst function takes priority. */
5048 rx_func = mlx4_rx_burst_sp;
5050 /* Burst functions can now be called again. */
5052 dev->rx_pkt_burst = rx_func;
5060 * DPDK callback to get flow control status.
5063 * Pointer to Ethernet device structure.
5064 * @param[out] fc_conf
5065 * Flow control output buffer.
5068 * 0 on success, negative errno value on failure.
5071 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
5073 struct priv *priv = dev->data->dev_private;
5075 struct ethtool_pauseparam ethpause = {
5076 .cmd = ETHTOOL_GPAUSEPARAM
5080 if (mlx4_is_secondary())
5081 return -E_RTE_SECONDARY;
5082 ifr.ifr_data = (void *)ðpause;
5084 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
5086 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
5092 fc_conf->autoneg = ethpause.autoneg;
5093 if (ethpause.rx_pause && ethpause.tx_pause)
5094 fc_conf->mode = RTE_FC_FULL;
5095 else if (ethpause.rx_pause)
5096 fc_conf->mode = RTE_FC_RX_PAUSE;
5097 else if (ethpause.tx_pause)
5098 fc_conf->mode = RTE_FC_TX_PAUSE;
5100 fc_conf->mode = RTE_FC_NONE;
5110 * DPDK callback to modify flow control parameters.
5113 * Pointer to Ethernet device structure.
5114 * @param[in] fc_conf
5115 * Flow control parameters.
5118 * 0 on success, negative errno value on failure.
5121 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
5123 struct priv *priv = dev->data->dev_private;
5125 struct ethtool_pauseparam ethpause = {
5126 .cmd = ETHTOOL_SPAUSEPARAM
5130 if (mlx4_is_secondary())
5131 return -E_RTE_SECONDARY;
5132 ifr.ifr_data = (void *)ðpause;
5133 ethpause.autoneg = fc_conf->autoneg;
5134 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
5135 (fc_conf->mode & RTE_FC_RX_PAUSE))
5136 ethpause.rx_pause = 1;
5138 ethpause.rx_pause = 0;
5140 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
5141 (fc_conf->mode & RTE_FC_TX_PAUSE))
5142 ethpause.tx_pause = 1;
5144 ethpause.tx_pause = 0;
5147 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
5149 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
5163 * Configure a VLAN filter.
5166 * Pointer to Ethernet device structure.
5168 * VLAN ID to filter.
5173 * 0 on success, errno value on failure.
5176 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5178 struct priv *priv = dev->data->dev_private;
5180 unsigned int j = -1;
5182 DEBUG("%p: %s VLAN filter ID %" PRIu16,
5183 (void *)dev, (on ? "enable" : "disable"), vlan_id);
5184 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
5185 if (!priv->vlan_filter[i].enabled) {
5186 /* Unused index, remember it. */
5190 if (priv->vlan_filter[i].id != vlan_id)
5192 /* This VLAN ID is already known, use its index. */
5196 /* Check if there's room for another VLAN filter. */
5197 if (j == (unsigned int)-1)
5200 * VLAN filters apply to all configured MAC addresses, flow
5201 * specifications must be reconfigured accordingly.
5203 priv->vlan_filter[j].id = vlan_id;
5204 if ((on) && (!priv->vlan_filter[j].enabled)) {
5206 * Filter is disabled, enable it.
5207 * Rehashing flows in all RX queues is necessary.
5210 rxq_mac_addrs_del(LIST_FIRST(&priv->parents));
5212 for (i = 0; (i != priv->rxqs_n); ++i)
5213 if ((*priv->rxqs)[i] != NULL)
5214 rxq_mac_addrs_del((*priv->rxqs)[i]);
5215 priv->vlan_filter[j].enabled = 1;
5216 if (priv->started) {
5218 rxq_mac_addrs_add(LIST_FIRST(&priv->parents));
5220 for (i = 0; (i != priv->rxqs_n); ++i) {
5221 if ((*priv->rxqs)[i] == NULL)
5223 rxq_mac_addrs_add((*priv->rxqs)[i]);
5226 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
5228 * Filter is enabled, disable it.
5229 * Rehashing flows in all RX queues is necessary.
5232 rxq_mac_addrs_del(LIST_FIRST(&priv->parents));
5234 for (i = 0; (i != priv->rxqs_n); ++i)
5235 if ((*priv->rxqs)[i] != NULL)
5236 rxq_mac_addrs_del((*priv->rxqs)[i]);
5237 priv->vlan_filter[j].enabled = 0;
5238 if (priv->started) {
5240 rxq_mac_addrs_add(LIST_FIRST(&priv->parents));
5242 for (i = 0; (i != priv->rxqs_n); ++i) {
5243 if ((*priv->rxqs)[i] == NULL)
5245 rxq_mac_addrs_add((*priv->rxqs)[i]);
5253 * DPDK callback to configure a VLAN filter.
5256 * Pointer to Ethernet device structure.
5258 * VLAN ID to filter.
5263 * 0 on success, negative errno value on failure.
5266 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5268 struct priv *priv = dev->data->dev_private;
5271 if (mlx4_is_secondary())
5272 return -E_RTE_SECONDARY;
5274 if (priv->isolated) {
5275 DEBUG("%p: cannot set vlan filter, "
5276 "device is in isolated mode", (void *)dev);
5280 ret = vlan_filter_set(dev, vlan_id, on);
5286 const struct rte_flow_ops mlx4_flow_ops = {
5287 .validate = mlx4_flow_validate,
5288 .create = mlx4_flow_create,
5289 .destroy = mlx4_flow_destroy,
5290 .flush = mlx4_flow_flush,
5292 .isolate = mlx4_flow_isolate,
5296 * Manage filter operations.
5299 * Pointer to Ethernet device structure.
5300 * @param filter_type
5303 * Operation to perform.
5305 * Pointer to operation-specific structure.
5308 * 0 on success, negative errno value on failure.
5311 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
5312 enum rte_filter_type filter_type,
5313 enum rte_filter_op filter_op,
5318 switch (filter_type) {
5319 case RTE_ETH_FILTER_GENERIC:
5320 if (filter_op != RTE_ETH_FILTER_GET)
5322 *(const void **)arg = &mlx4_flow_ops;
5324 case RTE_ETH_FILTER_FDIR:
5325 DEBUG("%p: filter type FDIR is not supported by this PMD",
5329 ERROR("%p: filter type (%d) not supported",
5330 (void *)dev, filter_type);
5336 static const struct eth_dev_ops mlx4_dev_ops = {
5337 .dev_configure = mlx4_dev_configure,
5338 .dev_start = mlx4_dev_start,
5339 .dev_stop = mlx4_dev_stop,
5340 .dev_set_link_down = mlx4_set_link_down,
5341 .dev_set_link_up = mlx4_set_link_up,
5342 .dev_close = mlx4_dev_close,
5343 .promiscuous_enable = mlx4_promiscuous_enable,
5344 .promiscuous_disable = mlx4_promiscuous_disable,
5345 .allmulticast_enable = mlx4_allmulticast_enable,
5346 .allmulticast_disable = mlx4_allmulticast_disable,
5347 .link_update = mlx4_link_update,
5348 .stats_get = mlx4_stats_get,
5349 .stats_reset = mlx4_stats_reset,
5350 .queue_stats_mapping_set = NULL,
5351 .dev_infos_get = mlx4_dev_infos_get,
5352 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5353 .vlan_filter_set = mlx4_vlan_filter_set,
5354 .vlan_tpid_set = NULL,
5355 .vlan_strip_queue_set = NULL,
5356 .vlan_offload_set = NULL,
5357 .rx_queue_setup = mlx4_rx_queue_setup,
5358 .tx_queue_setup = mlx4_tx_queue_setup,
5359 .rx_queue_release = mlx4_rx_queue_release,
5360 .tx_queue_release = mlx4_tx_queue_release,
5362 .dev_led_off = NULL,
5363 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5364 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5365 .priority_flow_ctrl_set = NULL,
5366 .mac_addr_remove = mlx4_mac_addr_remove,
5367 .mac_addr_add = mlx4_mac_addr_add,
5368 .mac_addr_set = mlx4_mac_addr_set,
5369 .mtu_set = mlx4_dev_set_mtu,
5370 .filter_ctrl = mlx4_dev_filter_ctrl,
5371 .rx_queue_intr_enable = mlx4_rx_intr_enable,
5372 .rx_queue_intr_disable = mlx4_rx_intr_disable,
5376 * Get PCI information from struct ibv_device.
5379 * Pointer to Ethernet device structure.
5380 * @param[out] pci_addr
5381 * PCI bus address output buffer.
5384 * 0 on success, -1 on failure and errno is set.
5387 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5388 struct rte_pci_addr *pci_addr)
5392 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5394 file = fopen(path, "rb");
5397 while (fgets(line, sizeof(line), file) == line) {
5398 size_t len = strlen(line);
5401 /* Truncate long lines. */
5402 if (len == (sizeof(line) - 1))
5403 while (line[(len - 1)] != '\n') {
5407 line[(len - 1)] = ret;
5409 /* Extract information. */
5412 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5416 &pci_addr->function) == 4) {
5426 * Get MAC address by querying netdevice.
5429 * struct priv for the requested device.
5431 * MAC address output buffer.
5434 * 0 on success, -1 on failure and errno is set.
5437 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5439 struct ifreq request;
5441 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5443 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5447 /* Support up to 32 adapters. */
5449 struct rte_pci_addr pci_addr; /* associated PCI address */
5450 uint32_t ports; /* physical ports bitfield. */
5454 * Get device index in mlx4_dev[] from PCI bus address.
5456 * @param[in] pci_addr
5457 * PCI bus address to look for.
5460 * mlx4_dev[] index on success, -1 on failure.
5463 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5468 assert(pci_addr != NULL);
5469 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5470 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5471 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5472 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5473 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5475 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5482 * Retrieve integer value from environment variable.
5485 * Environment variable name.
5488 * Integer value, 0 if the variable is not set.
5491 mlx4_getenv_int(const char *name)
5493 const char *val = getenv(name);
5501 mlx4_dev_link_status_handler(void *);
5503 mlx4_dev_interrupt_handler(void *);
5506 * Link/device status handler.
5509 * Pointer to private structure.
5511 * Pointer to the rte_eth_dev structure.
5513 * Pointer to event flags holder.
5519 priv_dev_status_handler(struct priv *priv, struct rte_eth_dev *dev,
5522 struct ibv_async_event event;
5523 int port_change = 0;
5524 struct rte_eth_link *link = &dev->data->dev_link;
5528 /* Read all message and acknowledge them. */
5530 if (ibv_get_async_event(priv->ctx, &event))
5532 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
5533 event.event_type == IBV_EVENT_PORT_ERR) &&
5534 (priv->intr_conf.lsc == 1)) {
5537 } else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
5538 priv->intr_conf.rmv == 1) {
5539 *events |= (1 << RTE_ETH_EVENT_INTR_RMV);
5542 DEBUG("event type %d on port %d not handled",
5543 event.event_type, event.element.port_num);
5544 ibv_ack_async_event(&event);
5548 mlx4_link_update(dev, 0);
5549 if (((link->link_speed == 0) && link->link_status) ||
5550 ((link->link_speed != 0) && !link->link_status)) {
5551 if (!priv->pending_alarm) {
5552 /* Inconsistent status, check again later. */
5553 priv->pending_alarm = 1;
5554 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5555 mlx4_dev_link_status_handler,
5559 *events |= (1 << RTE_ETH_EVENT_INTR_LSC);
5565 * Handle delayed link status event.
5568 * Registered argument.
5571 mlx4_dev_link_status_handler(void *arg)
5573 struct rte_eth_dev *dev = arg;
5574 struct priv *priv = dev->data->dev_private;
5579 assert(priv->pending_alarm == 1);
5580 priv->pending_alarm = 0;
5581 ret = priv_dev_status_handler(priv, dev, &events);
5583 if (ret > 0 && events & (1 << RTE_ETH_EVENT_INTR_LSC))
5584 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
5589 * Handle interrupts from the NIC.
5591 * @param[in] intr_handle
5592 * Interrupt handler.
5594 * Callback argument.
5597 mlx4_dev_interrupt_handler(void *cb_arg)
5599 struct rte_eth_dev *dev = cb_arg;
5600 struct priv *priv = dev->data->dev_private;
5606 ret = priv_dev_status_handler(priv, dev, &ev);
5609 for (i = RTE_ETH_EVENT_UNKNOWN;
5610 i < RTE_ETH_EVENT_MAX;
5612 if (ev & (1 << i)) {
5614 _rte_eth_dev_callback_process(dev, i, NULL,
5620 WARN("%d event%s not processed", ret,
5621 (ret > 1 ? "s were" : " was"));
5626 * Uninstall interrupt handler.
5629 * Pointer to private structure.
5631 * Pointer to the rte_eth_dev structure.
5633 * 0 on success, negative errno value on failure.
5636 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5640 if (priv->intr_conf.lsc ||
5641 priv->intr_conf.rmv)
5643 ret = rte_intr_callback_unregister(&priv->intr_handle,
5644 mlx4_dev_interrupt_handler,
5647 ERROR("rte_intr_callback_unregister failed with %d"
5649 (errno ? " (errno: " : ""),
5650 (errno ? strerror(errno) : ""),
5651 (errno ? ")" : ""));
5653 priv->intr_handle.fd = 0;
5654 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
5659 * Install interrupt handler.
5662 * Pointer to private structure.
5664 * Pointer to the rte_eth_dev structure.
5666 * 0 on success, negative errno value on failure.
5669 priv_dev_interrupt_handler_install(struct priv *priv,
5670 struct rte_eth_dev *dev)
5675 /* Check whether the interrupt handler has already been installed
5676 * for either type of interrupt
5678 if (priv->intr_conf.lsc &&
5679 priv->intr_conf.rmv &&
5680 priv->intr_handle.fd)
5682 assert(priv->ctx->async_fd > 0);
5683 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5684 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5686 INFO("failed to change file descriptor async event queue");
5687 dev->data->dev_conf.intr_conf.lsc = 0;
5688 dev->data->dev_conf.intr_conf.rmv = 0;
5691 priv->intr_handle.fd = priv->ctx->async_fd;
5692 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5693 rc = rte_intr_callback_register(&priv->intr_handle,
5694 mlx4_dev_interrupt_handler,
5697 ERROR("rte_intr_callback_register failed "
5698 " (errno: %s)", strerror(errno));
5706 * Uninstall interrupt handler.
5709 * Pointer to private structure.
5711 * Pointer to the rte_eth_dev structure.
5713 * 0 on success, negative value on error.
5716 priv_dev_removal_interrupt_handler_uninstall(struct priv *priv,
5717 struct rte_eth_dev *dev)
5719 if (dev->data->dev_conf.intr_conf.rmv) {
5720 priv->intr_conf.rmv = 0;
5721 return priv_dev_interrupt_handler_uninstall(priv, dev);
5727 * Uninstall interrupt handler.
5730 * Pointer to private structure.
5732 * Pointer to the rte_eth_dev structure.
5734 * 0 on success, negative value on error,
5737 priv_dev_link_interrupt_handler_uninstall(struct priv *priv,
5738 struct rte_eth_dev *dev)
5742 if (dev->data->dev_conf.intr_conf.lsc) {
5743 priv->intr_conf.lsc = 0;
5744 ret = priv_dev_interrupt_handler_uninstall(priv, dev);
5748 if (priv->pending_alarm)
5749 if (rte_eal_alarm_cancel(mlx4_dev_link_status_handler,
5751 ERROR("rte_eal_alarm_cancel failed "
5752 " (errno: %s)", strerror(rte_errno));
5755 priv->pending_alarm = 0;
5760 * Install link interrupt handler.
5763 * Pointer to private structure.
5765 * Pointer to the rte_eth_dev structure.
5767 * 0 on success, negative value on error.
5770 priv_dev_link_interrupt_handler_install(struct priv *priv,
5771 struct rte_eth_dev *dev)
5775 if (dev->data->dev_conf.intr_conf.lsc) {
5776 ret = priv_dev_interrupt_handler_install(priv, dev);
5779 priv->intr_conf.lsc = 1;
5785 * Install removal interrupt handler.
5788 * Pointer to private structure.
5790 * Pointer to the rte_eth_dev structure.
5792 * 0 on success, negative value on error.
5795 priv_dev_removal_interrupt_handler_install(struct priv *priv,
5796 struct rte_eth_dev *dev)
5800 if (dev->data->dev_conf.intr_conf.rmv) {
5801 ret = priv_dev_interrupt_handler_install(priv, dev);
5804 priv->intr_conf.rmv = 1;
5810 * Allocate queue vector and fill epoll fd list for Rx interrupts.
5813 * Pointer to private structure.
5816 * 0 on success, negative on failure.
5819 priv_rx_intr_vec_enable(struct priv *priv)
5822 unsigned int rxqs_n = priv->rxqs_n;
5823 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
5824 unsigned int count = 0;
5825 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
5827 if (!priv->dev->data->dev_conf.intr_conf.rxq)
5829 priv_rx_intr_vec_disable(priv);
5830 intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
5831 if (intr_handle->intr_vec == NULL) {
5832 ERROR("failed to allocate memory for interrupt vector,"
5833 " Rx interrupts will not be supported");
5836 intr_handle->type = RTE_INTR_HANDLE_EXT;
5837 for (i = 0; i != n; ++i) {
5838 struct rxq *rxq = (*priv->rxqs)[i];
5843 /* Skip queues that cannot request interrupts. */
5844 if (!rxq || !rxq->channel) {
5845 /* Use invalid intr_vec[] index to disable entry. */
5846 intr_handle->intr_vec[i] =
5847 RTE_INTR_VEC_RXTX_OFFSET +
5848 RTE_MAX_RXTX_INTR_VEC_ID;
5851 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
5852 ERROR("too many Rx queues for interrupt vector size"
5853 " (%d), Rx interrupts cannot be enabled",
5854 RTE_MAX_RXTX_INTR_VEC_ID);
5855 priv_rx_intr_vec_disable(priv);
5858 fd = rxq->channel->fd;
5859 flags = fcntl(fd, F_GETFL);
5860 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
5862 ERROR("failed to make Rx interrupt file descriptor"
5863 " %d non-blocking for queue index %d", fd, i);
5864 priv_rx_intr_vec_disable(priv);
5867 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
5868 intr_handle->efds[count] = fd;
5872 priv_rx_intr_vec_disable(priv);
5874 intr_handle->nb_efd = count;
5879 * Clean up Rx interrupts handler.
5882 * Pointer to private structure.
5885 priv_rx_intr_vec_disable(struct priv *priv)
5887 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
5889 rte_intr_free_epoll_fd(intr_handle);
5890 free(intr_handle->intr_vec);
5891 intr_handle->nb_efd = 0;
5892 intr_handle->intr_vec = NULL;
5896 * DPDK callback for Rx queue interrupt enable.
5899 * Pointer to Ethernet device structure.
5904 * 0 on success, negative on failure.
5907 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)
5909 struct priv *priv = dev->data->dev_private;
5910 struct rxq *rxq = (*priv->rxqs)[idx];
5913 if (!rxq || !rxq->channel)
5916 ret = ibv_req_notify_cq(rxq->cq, 0);
5918 WARN("unable to arm interrupt on rx queue %d", idx);
5923 * DPDK callback for Rx queue interrupt disable.
5926 * Pointer to Ethernet device structure.
5931 * 0 on success, negative on failure.
5934 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)
5936 struct priv *priv = dev->data->dev_private;
5937 struct rxq *rxq = (*priv->rxqs)[idx];
5938 struct ibv_cq *ev_cq;
5942 if (!rxq || !rxq->channel) {
5945 ret = ibv_get_cq_event(rxq->cq->channel, &ev_cq, &ev_ctx);
5946 if (ret || ev_cq != rxq->cq)
5950 WARN("unable to disable interrupt on rx queue %d",
5953 ibv_ack_cq_events(rxq->cq, 1);
5958 * Verify and store value for device argument.
5961 * Key argument to verify.
5963 * Value associated with key.
5968 * 0 on success, negative errno value on failure.
5971 mlx4_arg_parse(const char *key, const char *val, void *out)
5973 struct mlx4_conf *conf = out;
5977 tmp = strtoul(val, NULL, 0);
5979 WARN("%s: \"%s\" is not a valid integer", key, val);
5982 if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) {
5983 if (tmp >= MLX4_PMD_MAX_PHYS_PORTS) {
5984 ERROR("invalid port index %lu (max: %u)",
5985 tmp, MLX4_PMD_MAX_PHYS_PORTS - 1);
5988 conf->active_ports |= 1 << tmp;
5990 WARN("%s: unknown parameter", key);
5997 * Parse device parameters.
6000 * Device arguments structure.
6003 * 0 on success, negative errno value on failure.
6006 mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)
6008 struct rte_kvargs *kvlist;
6009 unsigned int arg_count;
6013 if (devargs == NULL)
6015 kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params);
6016 if (kvlist == NULL) {
6017 ERROR("failed to parse kvargs");
6020 /* Process parameters. */
6021 for (i = 0; pmd_mlx4_init_params[i]; ++i) {
6022 arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);
6023 while (arg_count-- > 0) {
6024 ret = rte_kvargs_process(kvlist, MLX4_PMD_PORT_KVARG,
6025 mlx4_arg_parse, conf);
6031 rte_kvargs_free(kvlist);
6035 static struct rte_pci_driver mlx4_driver;
6038 * DPDK callback to register a PCI device.
6040 * This function creates an Ethernet device for each port of a given
6043 * @param[in] pci_drv
6044 * PCI driver structure (mlx4_driver).
6045 * @param[in] pci_dev
6046 * PCI device information.
6049 * 0 on success, negative errno value on failure.
6052 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
6054 struct ibv_device **list;
6055 struct ibv_device *ibv_dev;
6057 struct ibv_context *attr_ctx = NULL;
6058 struct ibv_device_attr device_attr;
6059 struct mlx4_conf conf = {
6067 assert(pci_drv == &mlx4_driver);
6068 /* Get mlx4_dev[] index. */
6069 idx = mlx4_dev_idx(&pci_dev->addr);
6071 ERROR("this driver cannot support any more adapters");
6074 DEBUG("using driver device index %d", idx);
6076 /* Save PCI address. */
6077 mlx4_dev[idx].pci_addr = pci_dev->addr;
6078 list = ibv_get_device_list(&i);
6081 if (errno == ENOSYS)
6082 ERROR("cannot list devices, is ib_uverbs loaded?");
6087 * For each listed device, check related sysfs entry against
6088 * the provided PCI ID.
6091 struct rte_pci_addr pci_addr;
6094 DEBUG("checking device \"%s\"", list[i]->name);
6095 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
6097 if ((pci_dev->addr.domain != pci_addr.domain) ||
6098 (pci_dev->addr.bus != pci_addr.bus) ||
6099 (pci_dev->addr.devid != pci_addr.devid) ||
6100 (pci_dev->addr.function != pci_addr.function))
6102 vf = (pci_dev->id.device_id ==
6103 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
6104 INFO("PCI information matches, using device \"%s\" (VF: %s)",
6105 list[i]->name, (vf ? "true" : "false"));
6106 attr_ctx = ibv_open_device(list[i]);
6110 if (attr_ctx == NULL) {
6111 ibv_free_device_list(list);
6114 ERROR("cannot access device, is mlx4_ib loaded?");
6117 ERROR("cannot use device, are drivers up to date?");
6125 DEBUG("device opened");
6126 if (ibv_query_device(attr_ctx, &device_attr)) {
6130 INFO("%u port(s) detected", device_attr.phys_port_cnt);
6132 if (mlx4_args(pci_dev->device.devargs, &conf)) {
6133 ERROR("failed to process device arguments");
6137 /* Use all ports when none are defined */
6138 if (conf.active_ports == 0) {
6139 for (i = 0; i < MLX4_PMD_MAX_PHYS_PORTS; i++)
6140 conf.active_ports |= 1 << i;
6142 for (i = 0; i < device_attr.phys_port_cnt; i++) {
6143 uint32_t port = i + 1; /* ports are indexed from one */
6144 uint32_t test = (1 << i);
6145 struct ibv_context *ctx = NULL;
6146 struct ibv_port_attr port_attr;
6147 struct ibv_pd *pd = NULL;
6148 struct priv *priv = NULL;
6149 struct rte_eth_dev *eth_dev = NULL;
6150 #ifdef HAVE_EXP_QUERY_DEVICE
6151 struct ibv_exp_device_attr exp_device_attr;
6152 #endif /* HAVE_EXP_QUERY_DEVICE */
6153 struct ether_addr mac;
6155 /* If port is not active, skip. */
6156 if (!(conf.active_ports & (1 << i)))
6158 #ifdef HAVE_EXP_QUERY_DEVICE
6159 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
6161 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
6162 #endif /* RSS_SUPPORT */
6163 #endif /* HAVE_EXP_QUERY_DEVICE */
6165 DEBUG("using port %u (%08" PRIx32 ")", port, test);
6167 ctx = ibv_open_device(ibv_dev);
6173 /* Check port status. */
6174 err = ibv_query_port(ctx, port, &port_attr);
6176 ERROR("port query failed: %s", strerror(err));
6181 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
6182 ERROR("port %d is not configured in Ethernet mode",
6188 if (port_attr.state != IBV_PORT_ACTIVE)
6189 DEBUG("port %d is not active: \"%s\" (%d)",
6190 port, ibv_port_state_str(port_attr.state),
6193 /* Allocate protection domain. */
6194 pd = ibv_alloc_pd(ctx);
6196 ERROR("PD allocation failure");
6201 mlx4_dev[idx].ports |= test;
6203 /* from rte_ethdev.c */
6204 priv = rte_zmalloc("ethdev private structure",
6206 RTE_CACHE_LINE_SIZE);
6208 ERROR("priv allocation failure");
6214 priv->device_attr = device_attr;
6217 priv->mtu = ETHER_MTU;
6218 #ifdef HAVE_EXP_QUERY_DEVICE
6219 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
6220 ERROR("ibv_exp_query_device() failed");
6225 if ((exp_device_attr.exp_device_cap_flags &
6226 IBV_EXP_DEVICE_QPG) &&
6227 (exp_device_attr.exp_device_cap_flags &
6228 IBV_EXP_DEVICE_UD_RSS) &&
6229 (exp_device_attr.comp_mask &
6230 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
6231 (exp_device_attr.max_rss_tbl_sz > 0)) {
6234 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
6238 priv->max_rss_tbl_sz = 0;
6240 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
6241 IBV_EXP_DEVICE_UD_TSS);
6242 DEBUG("device flags: %s%s%s",
6243 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
6244 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
6245 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
6247 DEBUG("maximum RSS indirection table size: %u",
6248 exp_device_attr.max_rss_tbl_sz);
6249 #endif /* RSS_SUPPORT */
6252 ((exp_device_attr.exp_device_cap_flags &
6253 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
6254 (exp_device_attr.exp_device_cap_flags &
6255 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
6256 DEBUG("checksum offloading is %ssupported",
6257 (priv->hw_csum ? "" : "not "));
6259 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
6260 IBV_EXP_DEVICE_VXLAN_SUPPORT);
6261 DEBUG("L2 tunnel checksum offloads are %ssupported",
6262 (priv->hw_csum_l2tun ? "" : "not "));
6265 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
6267 if (priv->inl_recv_size) {
6268 exp_device_attr.comp_mask =
6269 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
6270 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
6271 INFO("Couldn't query device for inline-receive"
6273 priv->inl_recv_size = 0;
6275 if ((unsigned)exp_device_attr.inline_recv_sz <
6276 priv->inl_recv_size) {
6277 INFO("Max inline-receive (%d) <"
6278 " requested inline-receive (%u)",
6279 exp_device_attr.inline_recv_sz,
6280 priv->inl_recv_size);
6281 priv->inl_recv_size =
6282 exp_device_attr.inline_recv_sz;
6285 INFO("Set inline receive size to %u",
6286 priv->inl_recv_size);
6288 #endif /* INLINE_RECV */
6289 #endif /* HAVE_EXP_QUERY_DEVICE */
6291 (void)mlx4_getenv_int;
6293 /* Configure the first MAC address by default. */
6294 if (priv_get_mac(priv, &mac.addr_bytes)) {
6295 ERROR("cannot get MAC address, is mlx4_en loaded?"
6296 " (errno: %s)", strerror(errno));
6300 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
6302 mac.addr_bytes[0], mac.addr_bytes[1],
6303 mac.addr_bytes[2], mac.addr_bytes[3],
6304 mac.addr_bytes[4], mac.addr_bytes[5]);
6305 /* Register MAC and broadcast addresses. */
6306 claim_zero(priv_mac_addr_add(priv, 0,
6307 (const uint8_t (*)[ETHER_ADDR_LEN])
6309 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
6310 &(const uint8_t [ETHER_ADDR_LEN])
6311 { "\xff\xff\xff\xff\xff\xff" }));
6314 char ifname[IF_NAMESIZE];
6316 if (priv_get_ifname(priv, &ifname) == 0)
6317 DEBUG("port %u ifname is \"%s\"",
6318 priv->port, ifname);
6320 DEBUG("port %u ifname is unknown", priv->port);
6323 /* Get actual MTU if possible. */
6324 priv_get_mtu(priv, &priv->mtu);
6325 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
6327 /* from rte_ethdev.c */
6329 char name[RTE_ETH_NAME_MAX_LEN];
6331 snprintf(name, sizeof(name), "%s port %u",
6332 ibv_get_device_name(ibv_dev), port);
6333 eth_dev = rte_eth_dev_allocate(name);
6335 if (eth_dev == NULL) {
6336 ERROR("can not allocate rte ethdev");
6341 /* Secondary processes have to use local storage for their
6342 * private data as well as a copy of eth_dev->data, but this
6343 * pointer must not be modified before burst functions are
6344 * actually called. */
6345 if (mlx4_is_secondary()) {
6346 struct mlx4_secondary_data *sd =
6347 &mlx4_secondary_data[eth_dev->data->port_id];
6349 sd->primary_priv = eth_dev->data->dev_private;
6350 if (sd->primary_priv == NULL) {
6351 ERROR("no private data for port %u",
6352 eth_dev->data->port_id);
6356 sd->shared_dev_data = eth_dev->data;
6357 rte_spinlock_init(&sd->lock);
6358 memcpy(sd->data.name, sd->shared_dev_data->name,
6359 sizeof(sd->data.name));
6360 sd->data.dev_private = priv;
6361 sd->data.rx_mbuf_alloc_failed = 0;
6362 sd->data.mtu = ETHER_MTU;
6363 sd->data.port_id = sd->shared_dev_data->port_id;
6364 sd->data.mac_addrs = priv->mac;
6365 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
6366 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
6368 eth_dev->data->dev_private = priv;
6369 eth_dev->data->mac_addrs = priv->mac;
6371 eth_dev->device = &pci_dev->device;
6373 rte_eth_copy_pci_info(eth_dev, pci_dev);
6375 eth_dev->device->driver = &mlx4_driver.driver;
6378 * Copy and override interrupt handle to prevent it from
6379 * being shared between all ethdev instances of a given PCI
6380 * device. This is required to properly handle Rx interrupts
6383 priv->intr_handle_dev = *eth_dev->intr_handle;
6384 eth_dev->intr_handle = &priv->intr_handle_dev;
6386 priv->dev = eth_dev;
6387 eth_dev->dev_ops = &mlx4_dev_ops;
6388 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
6390 /* Bring Ethernet device up. */
6391 DEBUG("forcing Ethernet interface up");
6392 priv_set_flags(priv, ~IFF_UP, IFF_UP);
6393 /* Update link status once if waiting for LSC. */
6394 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
6395 mlx4_link_update(eth_dev, 0);
6401 claim_zero(ibv_dealloc_pd(pd));
6403 claim_zero(ibv_close_device(ctx));
6405 rte_eth_dev_release_port(eth_dev);
6410 * XXX if something went wrong in the loop above, there is a resource
6411 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
6412 * long as the dpdk does not provide a way to deallocate a ethdev and a
6413 * way to enumerate the registered ethdevs to free the previous ones.
6416 /* no port found, complain */
6417 if (!mlx4_dev[idx].ports) {
6424 claim_zero(ibv_close_device(attr_ctx));
6426 ibv_free_device_list(list);
6431 static const struct rte_pci_id mlx4_pci_id_map[] = {
6433 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6434 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
6437 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6438 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
6441 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6442 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
6449 static struct rte_pci_driver mlx4_driver = {
6451 .name = MLX4_DRIVER_NAME
6453 .id_table = mlx4_pci_id_map,
6454 .probe = mlx4_pci_probe,
6455 .drv_flags = RTE_PCI_DRV_INTR_LSC |
6456 RTE_PCI_DRV_INTR_RMV,
6460 * Driver initialization routine.
6462 RTE_INIT(rte_mlx4_pmd_init);
6464 rte_mlx4_pmd_init(void)
6466 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
6468 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
6469 * huge pages. Calling ibv_fork_init() during init allows
6470 * applications to use fork() safely for purposes other than
6471 * using this PMD, which is not supported in forked processes.
6473 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
6475 rte_pci_register(&mlx4_driver);
6478 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
6479 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
6480 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
6481 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");