4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
51 #include <sys/ioctl.h>
52 #include <sys/socket.h>
53 #include <netinet/in.h>
54 #include <linux/ethtool.h>
55 #include <linux/sockios.h>
58 #include <rte_ether.h>
59 #include <rte_ethdev.h>
60 #include <rte_ethdev_pci.h>
63 #include <rte_errno.h>
64 #include <rte_mempool.h>
65 #include <rte_prefetch.h>
66 #include <rte_malloc.h>
67 #include <rte_spinlock.h>
68 #include <rte_atomic.h>
70 #include <rte_alarm.h>
71 #include <rte_memory.h>
73 #include <rte_kvargs.h>
74 #include <rte_interrupts.h>
75 #include <rte_branch_prediction.h>
77 /* Generated configuration header. */
78 #include "mlx4_autoconf.h"
82 #include "mlx4_flow.h"
84 /* Convenience macros for accessing mbuf fields. */
85 #define NEXT(m) ((m)->next)
86 #define DATA_LEN(m) ((m)->data_len)
87 #define PKT_LEN(m) ((m)->pkt_len)
88 #define DATA_OFF(m) ((m)->data_off)
89 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
90 #define NB_SEGS(m) ((m)->nb_segs)
91 #define PORT(m) ((m)->port)
93 /* Work Request ID data type (64 bit). */
102 #define WR_ID(o) (((wr_id_t *)&(o))->data)
104 /* Transpose flags. Useful to convert IBV to DPDK flags. */
105 #define TRANSPOSE(val, from, to) \
106 (((from) >= (to)) ? \
107 (((val) & (from)) / ((from) / (to))) : \
108 (((val) & (from)) * ((to) / (from))))
110 /** Configuration structure for device arguments. */
113 uint32_t present; /**< Bit-field for existing ports. */
114 uint32_t enabled; /**< Bit-field for user-enabled ports. */
118 /* Available parameters list. */
119 const char *pmd_mlx4_init_params[] = {
125 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
128 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
131 priv_rx_intr_vec_enable(struct priv *priv);
134 priv_rx_intr_vec_disable(struct priv *priv);
137 * Lock private structure to protect it from concurrent access in the
141 * Pointer to private structure.
143 void priv_lock(struct priv *priv)
145 rte_spinlock_lock(&priv->lock);
149 * Unlock private structure.
152 * Pointer to private structure.
154 void priv_unlock(struct priv *priv)
156 rte_spinlock_unlock(&priv->lock);
159 /* Allocate a buffer on the stack and fill it with a printf format string. */
160 #define MKSTR(name, ...) \
161 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
163 snprintf(name, sizeof(name), __VA_ARGS__)
166 * Get interface name from private structure.
169 * Pointer to private structure.
171 * Interface name output buffer.
174 * 0 on success, -1 on failure and errno is set.
177 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
181 unsigned int dev_type = 0;
182 unsigned int dev_port_prev = ~0u;
183 char match[IF_NAMESIZE] = "";
186 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
192 while ((dent = readdir(dir)) != NULL) {
193 char *name = dent->d_name;
195 unsigned int dev_port;
198 if ((name[0] == '.') &&
199 ((name[1] == '\0') ||
200 ((name[1] == '.') && (name[2] == '\0'))))
203 MKSTR(path, "%s/device/net/%s/%s",
204 priv->ctx->device->ibdev_path, name,
205 (dev_type ? "dev_id" : "dev_port"));
207 file = fopen(path, "rb");
212 * Switch to dev_id when dev_port does not exist as
213 * is the case with Linux kernel versions < 3.15.
224 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
229 * Switch to dev_id when dev_port returns the same value for
230 * all ports. May happen when using a MOFED release older than
231 * 3.0 with a Linux kernel >= 3.15.
233 if (dev_port == dev_port_prev)
235 dev_port_prev = dev_port;
236 if (dev_port == (priv->port - 1u))
237 snprintf(match, sizeof(match), "%s", name);
240 if (match[0] == '\0')
242 strncpy(*ifname, match, sizeof(*ifname));
247 * Read from sysfs entry.
250 * Pointer to private structure.
252 * Entry name relative to sysfs path.
254 * Data output buffer.
259 * 0 on success, -1 on failure and errno is set.
262 priv_sysfs_read(const struct priv *priv, const char *entry,
263 char *buf, size_t size)
265 char ifname[IF_NAMESIZE];
270 if (priv_get_ifname(priv, &ifname))
273 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
276 file = fopen(path, "rb");
279 ret = fread(buf, 1, size, file);
281 if (((size_t)ret < size) && (ferror(file)))
291 * Write to sysfs entry.
294 * Pointer to private structure.
296 * Entry name relative to sysfs path.
303 * 0 on success, -1 on failure and errno is set.
306 priv_sysfs_write(const struct priv *priv, const char *entry,
307 char *buf, size_t size)
309 char ifname[IF_NAMESIZE];
314 if (priv_get_ifname(priv, &ifname))
317 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
320 file = fopen(path, "wb");
323 ret = fwrite(buf, 1, size, file);
325 if (((size_t)ret < size) || (ferror(file)))
335 * Get unsigned long sysfs property.
338 * Pointer to private structure.
340 * Entry name relative to sysfs path.
342 * Value output buffer.
345 * 0 on success, -1 on failure and errno is set.
348 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
351 unsigned long value_ret;
354 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
356 DEBUG("cannot read %s value from sysfs: %s",
357 name, strerror(errno));
360 value_str[ret] = '\0';
362 value_ret = strtoul(value_str, NULL, 0);
364 DEBUG("invalid %s value `%s': %s", name, value_str,
373 * Set unsigned long sysfs property.
376 * Pointer to private structure.
378 * Entry name relative to sysfs path.
383 * 0 on success, -1 on failure and errno is set.
386 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
389 MKSTR(value_str, "%lu", value);
391 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
393 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
394 name, value_str, value, strerror(errno));
401 * Perform ifreq ioctl() on associated Ethernet device.
404 * Pointer to private structure.
406 * Request number to pass to ioctl().
408 * Interface request structure output buffer.
411 * 0 on success, -1 on failure and errno is set.
414 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
416 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
421 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
422 ret = ioctl(sock, req, ifr);
431 * Pointer to private structure.
433 * MTU value output buffer.
436 * 0 on success, -1 on failure and errno is set.
439 priv_get_mtu(struct priv *priv, uint16_t *mtu)
441 unsigned long ulong_mtu;
443 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
453 * Pointer to private structure.
458 * 0 on success, -1 on failure and errno is set.
461 priv_set_mtu(struct priv *priv, uint16_t mtu)
465 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
466 priv_get_mtu(priv, &new_mtu))
478 * Pointer to private structure.
480 * Bitmask for flags that must remain untouched.
482 * Bitmask for flags to modify.
485 * 0 on success, -1 on failure and errno is set.
488 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
492 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
495 tmp |= (flags & (~keep));
496 return priv_set_sysfs_ulong(priv, "flags", tmp);
499 /* Device configuration. */
502 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
503 unsigned int socket, const struct rte_eth_txconf *conf);
506 txq_cleanup(struct txq *txq);
509 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
510 unsigned int socket, int inactive,
511 const struct rte_eth_rxconf *conf,
512 struct rte_mempool *mp, int children_n,
513 struct rxq *rxq_parent);
516 rxq_cleanup(struct rxq *rxq);
519 priv_mac_addr_del(struct priv *priv);
522 * Create RSS parent queue.
524 * The new parent is inserted in front of the list in the private structure.
527 * Pointer to private structure.
529 * Queues indices array, if NULL use all Rx queues.
531 * The number of entries in queues[].
534 * Pointer to a parent rxq structure, NULL on failure.
537 priv_parent_create(struct priv *priv,
545 parent = rte_zmalloc("parent queue",
547 RTE_CACHE_LINE_SIZE);
549 ERROR("cannot allocate memory for RSS parent queue");
552 ret = rxq_setup(priv->dev, parent, 0, 0, 0,
553 NULL, NULL, children_n, NULL);
558 parent->rss.queues_n = children_n;
560 for (i = 0; i < children_n; ++i)
561 parent->rss.queues[i] = queues[i];
563 /* the default RSS ring case */
564 assert(priv->rxqs_n == children_n);
565 for (i = 0; i < priv->rxqs_n; ++i)
566 parent->rss.queues[i] = i;
568 LIST_INSERT_HEAD(&priv->parents, parent, next);
573 * Clean up RX queue parent structure.
576 * RX queue parent structure.
579 rxq_parent_cleanup(struct rxq *parent)
581 LIST_REMOVE(parent, next);
587 * Clean up parent structures from the parent list.
590 * Pointer to private structure.
593 priv_parent_list_cleanup(struct priv *priv)
595 while (!LIST_EMPTY(&priv->parents))
596 rxq_parent_cleanup(LIST_FIRST(&priv->parents));
600 * Ethernet device configuration.
602 * Prepare the driver for a given number of TX and RX queues.
603 * Allocate parent RSS queue when several RX queues are requested.
606 * Pointer to Ethernet device structure.
609 * 0 on success, errno value on failure.
612 dev_configure(struct rte_eth_dev *dev)
614 struct priv *priv = dev->data->dev_private;
615 unsigned int rxqs_n = dev->data->nb_rx_queues;
616 unsigned int txqs_n = dev->data->nb_tx_queues;
619 priv->rxqs = (void *)dev->data->rx_queues;
620 priv->txqs = (void *)dev->data->tx_queues;
621 if (txqs_n != priv->txqs_n) {
622 INFO("%p: TX queues number update: %u -> %u",
623 (void *)dev, priv->txqs_n, txqs_n);
624 priv->txqs_n = txqs_n;
626 if (rxqs_n == priv->rxqs_n)
628 if (!rte_is_power_of_2(rxqs_n) && !priv->isolated) {
631 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
632 WARN("%p: number of RX queues must be a power"
633 " of 2: %u queues among %u will be active",
634 (void *)dev, n_active, rxqs_n);
637 INFO("%p: RX queues number update: %u -> %u",
638 (void *)dev, priv->rxqs_n, rxqs_n);
639 /* If RSS is enabled, disable it first. */
643 /* Only if there are no remaining child RX queues. */
644 for (i = 0; (i != priv->rxqs_n); ++i)
645 if ((*priv->rxqs)[i] != NULL)
647 priv_mac_addr_del(priv);
648 priv_parent_list_cleanup(priv);
653 /* Nothing else to do. */
654 priv->rxqs_n = rxqs_n;
657 /* Allocate a new RSS parent queue if supported by hardware. */
659 ERROR("%p: only a single RX queue can be configured when"
660 " hardware doesn't support RSS",
664 /* Fail if hardware doesn't support that many RSS queues. */
665 if (rxqs_n >= priv->max_rss_tbl_sz) {
666 ERROR("%p: only %u RX queues can be configured for RSS",
667 (void *)dev, priv->max_rss_tbl_sz);
672 priv->rxqs_n = rxqs_n;
675 if (priv_parent_create(priv, NULL, priv->rxqs_n))
677 /* Failure, rollback. */
684 * DPDK callback for Ethernet device configuration.
687 * Pointer to Ethernet device structure.
690 * 0 on success, negative errno value on failure.
693 mlx4_dev_configure(struct rte_eth_dev *dev)
695 struct priv *priv = dev->data->dev_private;
699 ret = dev_configure(dev);
705 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
706 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
708 /* TX queues handling. */
711 * Allocate TX queue elements.
714 * Pointer to TX queue structure.
716 * Number of elements to allocate.
719 * 0 on success, errno value on failure.
722 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
725 struct txq_elt (*elts)[elts_n] =
726 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
727 linear_t (*elts_linear)[elts_n] =
728 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
730 struct ibv_mr *mr_linear = NULL;
733 if ((elts == NULL) || (elts_linear == NULL)) {
734 ERROR("%p: can't allocate packets array", (void *)txq);
739 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
740 IBV_ACCESS_LOCAL_WRITE);
741 if (mr_linear == NULL) {
742 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
747 for (i = 0; (i != elts_n); ++i) {
748 struct txq_elt *elt = &(*elts)[i];
752 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
753 txq->elts_n = elts_n;
758 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
759 * at least 4 times per ring. */
760 txq->elts_comp_cd_init =
761 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
762 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
763 txq->elts_comp_cd = txq->elts_comp_cd_init;
764 txq->elts_linear = elts_linear;
765 txq->mr_linear = mr_linear;
769 if (mr_linear != NULL)
770 claim_zero(ibv_dereg_mr(mr_linear));
772 rte_free(elts_linear);
775 DEBUG("%p: failed, freed everything", (void *)txq);
781 * Free TX queue elements.
784 * Pointer to TX queue structure.
787 txq_free_elts(struct txq *txq)
789 unsigned int elts_n = txq->elts_n;
790 unsigned int elts_head = txq->elts_head;
791 unsigned int elts_tail = txq->elts_tail;
792 struct txq_elt (*elts)[elts_n] = txq->elts;
793 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
794 struct ibv_mr *mr_linear = txq->mr_linear;
796 DEBUG("%p: freeing WRs", (void *)txq);
801 txq->elts_comp_cd = 0;
802 txq->elts_comp_cd_init = 0;
804 txq->elts_linear = NULL;
805 txq->mr_linear = NULL;
806 if (mr_linear != NULL)
807 claim_zero(ibv_dereg_mr(mr_linear));
809 rte_free(elts_linear);
812 while (elts_tail != elts_head) {
813 struct txq_elt *elt = &(*elts)[elts_tail];
815 assert(elt->buf != NULL);
816 rte_pktmbuf_free(elt->buf);
819 memset(elt, 0x77, sizeof(*elt));
821 if (++elts_tail == elts_n)
829 * Clean up a TX queue.
831 * Destroy objects, free allocated memory and reset the structure for reuse.
834 * Pointer to TX queue structure.
837 txq_cleanup(struct txq *txq)
839 struct ibv_exp_release_intf_params params;
842 DEBUG("cleaning up %p", (void *)txq);
844 if (txq->if_qp != NULL) {
845 assert(txq->priv != NULL);
846 assert(txq->priv->ctx != NULL);
847 assert(txq->qp != NULL);
848 params = (struct ibv_exp_release_intf_params){
851 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
855 if (txq->if_cq != NULL) {
856 assert(txq->priv != NULL);
857 assert(txq->priv->ctx != NULL);
858 assert(txq->cq != NULL);
859 params = (struct ibv_exp_release_intf_params){
862 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
867 claim_zero(ibv_destroy_qp(txq->qp));
869 claim_zero(ibv_destroy_cq(txq->cq));
870 if (txq->rd != NULL) {
871 struct ibv_exp_destroy_res_domain_attr attr = {
875 assert(txq->priv != NULL);
876 assert(txq->priv->ctx != NULL);
877 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
881 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
882 if (txq->mp2mr[i].mp == NULL)
884 assert(txq->mp2mr[i].mr != NULL);
885 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
887 memset(txq, 0, sizeof(*txq));
891 * Manage TX completions.
893 * When sending a burst, mlx4_tx_burst() posts several WRs.
894 * To improve performance, a completion event is only required once every
895 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
896 * for other WRs, but this information would not be used anyway.
899 * Pointer to TX queue structure.
902 * 0 on success, -1 on failure.
905 txq_complete(struct txq *txq)
907 unsigned int elts_comp = txq->elts_comp;
908 unsigned int elts_tail = txq->elts_tail;
909 const unsigned int elts_n = txq->elts_n;
912 if (unlikely(elts_comp == 0))
914 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
915 if (unlikely(wcs_n == 0))
917 if (unlikely(wcs_n < 0)) {
918 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
923 assert(elts_comp <= txq->elts_comp);
925 * Assume WC status is successful as nothing can be done about it
928 elts_tail += wcs_n * txq->elts_comp_cd_init;
929 if (elts_tail >= elts_n)
931 txq->elts_tail = elts_tail;
932 txq->elts_comp = elts_comp;
936 struct mlx4_check_mempool_data {
942 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
943 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
944 void *opaque, struct rte_mempool_memhdr *memhdr,
947 struct mlx4_check_mempool_data *data = opaque;
952 /* It already failed, skip the next chunks. */
955 /* It is the first chunk. */
956 if (data->start == NULL && data->end == NULL) {
957 data->start = memhdr->addr;
958 data->end = data->start + memhdr->len;
961 if (data->end == memhdr->addr) {
962 data->end += memhdr->len;
965 if (data->start == (char *)memhdr->addr + memhdr->len) {
966 data->start -= memhdr->len;
969 /* Error, mempool is not virtually contigous. */
974 * Check if a mempool can be used: it must be virtually contiguous.
977 * Pointer to memory pool.
979 * Pointer to the start address of the mempool virtual memory area
981 * Pointer to the end address of the mempool virtual memory area
984 * 0 on success (mempool is virtually contiguous), -1 on error.
986 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
989 struct mlx4_check_mempool_data data;
991 memset(&data, 0, sizeof(data));
992 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
993 *start = (uintptr_t)data.start;
994 *end = (uintptr_t)data.end;
999 /* For best performance, this function should not be inlined. */
1000 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1004 * Register mempool as a memory region.
1007 * Pointer to protection domain.
1009 * Pointer to memory pool.
1012 * Memory region pointer, NULL in case of error.
1014 static struct ibv_mr *
1015 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1017 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1022 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1023 ERROR("mempool %p: not virtually contiguous",
1028 DEBUG("mempool %p area start=%p end=%p size=%zu",
1029 (void *)mp, (void *)start, (void *)end,
1030 (size_t)(end - start));
1031 /* Round start and end to page boundary if found in memory segments. */
1032 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1033 uintptr_t addr = (uintptr_t)ms[i].addr;
1034 size_t len = ms[i].len;
1035 unsigned int align = ms[i].hugepage_sz;
1037 if ((start > addr) && (start < addr + len))
1038 start = RTE_ALIGN_FLOOR(start, align);
1039 if ((end > addr) && (end < addr + len))
1040 end = RTE_ALIGN_CEIL(end, align);
1042 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1043 (void *)mp, (void *)start, (void *)end,
1044 (size_t)(end - start));
1045 return ibv_reg_mr(pd,
1048 IBV_ACCESS_LOCAL_WRITE);
1052 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1053 * the cloned mbuf is allocated is returned instead.
1059 * Memory pool where data is located for given mbuf.
1061 static struct rte_mempool *
1062 txq_mb2mp(struct rte_mbuf *buf)
1064 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1065 return rte_mbuf_from_indirect(buf)->pool;
1070 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1071 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1072 * remove an entry first.
1075 * Pointer to TX queue structure.
1077 * Memory Pool for which a Memory Region lkey must be returned.
1080 * mr->lkey on success, (uint32_t)-1 on failure.
1083 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1088 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1089 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1090 /* Unknown MP, add a new MR for it. */
1093 if (txq->mp2mr[i].mp == mp) {
1094 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1095 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1096 return txq->mp2mr[i].lkey;
1099 /* Add a new entry, register MR first. */
1100 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1101 (void *)txq, mp->name, (void *)mp);
1102 mr = mlx4_mp2mr(txq->priv->pd, mp);
1103 if (unlikely(mr == NULL)) {
1104 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1106 return (uint32_t)-1;
1108 if (unlikely(i == elemof(txq->mp2mr))) {
1109 /* Table is full, remove oldest entry. */
1110 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1113 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1114 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1115 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1117 /* Store the new entry. */
1118 txq->mp2mr[i].mp = mp;
1119 txq->mp2mr[i].mr = mr;
1120 txq->mp2mr[i].lkey = mr->lkey;
1121 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1122 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1123 return txq->mp2mr[i].lkey;
1126 struct txq_mp2mr_mbuf_check_data {
1131 * Callback function for rte_mempool_obj_iter() to check whether a given
1132 * mempool object looks like a mbuf.
1135 * The mempool pointer
1137 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1142 * Object index, unused.
1145 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1146 uint32_t index __rte_unused)
1148 struct txq_mp2mr_mbuf_check_data *data = arg;
1149 struct rte_mbuf *buf = obj;
1151 /* Check whether mbuf structure fits element size and whether mempool
1152 * pointer is valid. */
1153 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1158 * Iterator function for rte_mempool_walk() to register existing mempools and
1159 * fill the MP to MR cache of a TX queue.
1162 * Memory Pool to register.
1164 * Pointer to TX queue structure.
1167 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1169 struct txq *txq = arg;
1170 struct txq_mp2mr_mbuf_check_data data = {
1174 /* Register mempool only if the first element looks like a mbuf. */
1175 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1182 * Copy scattered mbuf contents to a single linear buffer.
1184 * @param[out] linear
1185 * Linear output buffer.
1187 * Scattered input buffer.
1190 * Number of bytes copied to the output buffer or 0 if not large enough.
1193 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1195 unsigned int size = 0;
1196 unsigned int offset;
1199 unsigned int len = DATA_LEN(buf);
1203 if (unlikely(size > sizeof(*linear)))
1205 memcpy(&(*linear)[offset],
1206 rte_pktmbuf_mtod(buf, uint8_t *),
1209 } while (buf != NULL);
1214 * Handle scattered buffers for mlx4_tx_burst().
1217 * TX queue structure.
1219 * Number of segments in buf.
1221 * TX queue element to fill.
1223 * Buffer to process.
1225 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1227 * Array filled with SGEs on success.
1230 * A structure containing the processed packet size in bytes and the
1231 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1234 static struct tx_burst_sg_ret {
1235 unsigned int length;
1238 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1239 struct rte_mbuf *buf, unsigned int elts_head,
1240 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1242 unsigned int sent_size = 0;
1246 /* When there are too many segments, extra segments are
1247 * linearized in the last SGE. */
1248 if (unlikely(segs > elemof(*sges))) {
1249 segs = (elemof(*sges) - 1);
1252 /* Update element. */
1254 /* Register segments as SGEs. */
1255 for (j = 0; (j != segs); ++j) {
1256 struct ibv_sge *sge = &(*sges)[j];
1259 /* Retrieve Memory Region key for this memory pool. */
1260 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1261 if (unlikely(lkey == (uint32_t)-1)) {
1262 /* MR does not exist. */
1263 DEBUG("%p: unable to get MP <-> MR association",
1265 /* Clean up TX element. */
1270 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1272 rte_prefetch0((volatile void *)
1273 (uintptr_t)sge->addr);
1274 sge->length = DATA_LEN(buf);
1276 sent_size += sge->length;
1279 /* If buf is not NULL here and is not going to be linearized,
1280 * nb_segs is not valid. */
1282 assert((buf == NULL) || (linearize));
1283 /* Linearize extra segments. */
1285 struct ibv_sge *sge = &(*sges)[segs];
1286 linear_t *linear = &(*txq->elts_linear)[elts_head];
1287 unsigned int size = linearize_mbuf(linear, buf);
1289 assert(segs == (elemof(*sges) - 1));
1291 /* Invalid packet. */
1292 DEBUG("%p: packet too large to be linearized.",
1294 /* Clean up TX element. */
1298 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1299 if (elemof(*sges) == 1) {
1301 struct rte_mbuf *next = NEXT(buf);
1303 rte_pktmbuf_free_seg(buf);
1305 } while (buf != NULL);
1309 sge->addr = (uintptr_t)&(*linear)[0];
1311 sge->lkey = txq->mr_linear->lkey;
1313 /* Include last segment. */
1316 return (struct tx_burst_sg_ret){
1317 .length = sent_size,
1321 return (struct tx_burst_sg_ret){
1328 * DPDK callback for TX.
1331 * Generic pointer to TX queue structure.
1333 * Packets to transmit.
1335 * Number of packets in array.
1338 * Number of packets successfully transmitted (<= pkts_n).
1341 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1343 struct txq *txq = (struct txq *)dpdk_txq;
1344 unsigned int elts_head = txq->elts_head;
1345 const unsigned int elts_n = txq->elts_n;
1346 unsigned int elts_comp_cd = txq->elts_comp_cd;
1347 unsigned int elts_comp = 0;
1352 assert(elts_comp_cd != 0);
1354 max = (elts_n - (elts_head - txq->elts_tail));
1358 assert(max <= elts_n);
1359 /* Always leave one free entry in the ring. */
1365 for (i = 0; (i != max); ++i) {
1366 struct rte_mbuf *buf = pkts[i];
1367 unsigned int elts_head_next =
1368 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1369 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1370 struct txq_elt *elt = &(*txq->elts)[elts_head];
1371 unsigned int segs = NB_SEGS(buf);
1372 unsigned int sent_size = 0;
1373 uint32_t send_flags = 0;
1375 /* Clean up old buffer. */
1376 if (likely(elt->buf != NULL)) {
1377 struct rte_mbuf *tmp = elt->buf;
1381 memset(elt, 0x66, sizeof(*elt));
1383 /* Faster than rte_pktmbuf_free(). */
1385 struct rte_mbuf *next = NEXT(tmp);
1387 rte_pktmbuf_free_seg(tmp);
1389 } while (tmp != NULL);
1391 /* Request TX completion. */
1392 if (unlikely(--elts_comp_cd == 0)) {
1393 elts_comp_cd = txq->elts_comp_cd_init;
1395 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1397 /* Should we enable HW CKSUM offload */
1399 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1400 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1401 /* HW does not support checksum offloads at arbitrary
1402 * offsets but automatically recognizes the packet
1403 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1404 * tunnels are currently supported. */
1405 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1406 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1408 if (likely(segs == 1)) {
1413 /* Retrieve buffer information. */
1414 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1415 length = DATA_LEN(buf);
1416 /* Retrieve Memory Region key for this memory pool. */
1417 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1418 if (unlikely(lkey == (uint32_t)-1)) {
1419 /* MR does not exist. */
1420 DEBUG("%p: unable to get MP <-> MR"
1421 " association", (void *)txq);
1422 /* Clean up TX element. */
1426 /* Update element. */
1429 rte_prefetch0((volatile void *)
1431 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1432 /* Put packet into send queue. */
1433 if (length <= txq->max_inline)
1434 err = txq->if_qp->send_pending_inline
1440 err = txq->if_qp->send_pending
1448 sent_size += length;
1450 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1451 struct tx_burst_sg_ret ret;
1453 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1455 if (ret.length == (unsigned int)-1)
1457 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1458 /* Put SG list into send queue. */
1459 err = txq->if_qp->send_pending_sg_list
1466 sent_size += ret.length;
1468 elts_head = elts_head_next;
1469 /* Increment sent bytes counter. */
1470 txq->stats.obytes += sent_size;
1473 /* Take a shortcut if nothing must be sent. */
1474 if (unlikely(i == 0))
1476 /* Increment sent packets counter. */
1477 txq->stats.opackets += i;
1478 /* Ring QP doorbell. */
1479 err = txq->if_qp->send_flush(txq->qp);
1480 if (unlikely(err)) {
1481 /* A nonzero value is not supposed to be returned.
1482 * Nothing can be done about it. */
1483 DEBUG("%p: send_flush() failed with error %d",
1486 txq->elts_head = elts_head;
1487 txq->elts_comp += elts_comp;
1488 txq->elts_comp_cd = elts_comp_cd;
1493 * Configure a TX queue.
1496 * Pointer to Ethernet device structure.
1498 * Pointer to TX queue structure.
1500 * Number of descriptors to configure in queue.
1502 * NUMA socket on which memory must be allocated.
1504 * Thresholds parameters.
1507 * 0 on success, errno value on failure.
1510 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1511 unsigned int socket, const struct rte_eth_txconf *conf)
1513 struct priv *priv = dev->data->dev_private;
1519 struct ibv_exp_query_intf_params params;
1520 struct ibv_exp_qp_init_attr init;
1521 struct ibv_exp_res_domain_init_attr rd;
1522 struct ibv_exp_cq_init_attr cq;
1523 struct ibv_exp_qp_attr mod;
1525 enum ibv_exp_query_intf_status status;
1528 (void)conf; /* Thresholds configuration (ignored). */
1531 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1532 ERROR("%p: invalid number of TX descriptors (must be a"
1533 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1536 desc /= MLX4_PMD_SGE_WR_N;
1537 /* MRs will be registered in mp2mr[] later. */
1538 attr.rd = (struct ibv_exp_res_domain_init_attr){
1539 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1540 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1541 .thread_model = IBV_EXP_THREAD_SINGLE,
1542 .msg_model = IBV_EXP_MSG_HIGH_BW,
1544 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1545 if (tmpl.rd == NULL) {
1547 ERROR("%p: RD creation failure: %s",
1548 (void *)dev, strerror(ret));
1551 attr.cq = (struct ibv_exp_cq_init_attr){
1552 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1553 .res_domain = tmpl.rd,
1555 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1556 if (tmpl.cq == NULL) {
1558 ERROR("%p: CQ creation failure: %s",
1559 (void *)dev, strerror(ret));
1562 DEBUG("priv->device_attr.max_qp_wr is %d",
1563 priv->device_attr.max_qp_wr);
1564 DEBUG("priv->device_attr.max_sge is %d",
1565 priv->device_attr.max_sge);
1566 attr.init = (struct ibv_exp_qp_init_attr){
1567 /* CQ to be associated with the send queue. */
1569 /* CQ to be associated with the receive queue. */
1572 /* Max number of outstanding WRs. */
1573 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1574 priv->device_attr.max_qp_wr :
1576 /* Max number of scatter/gather elements in a WR. */
1577 .max_send_sge = ((priv->device_attr.max_sge <
1578 MLX4_PMD_SGE_WR_N) ?
1579 priv->device_attr.max_sge :
1581 .max_inline_data = MLX4_PMD_MAX_INLINE,
1583 .qp_type = IBV_QPT_RAW_PACKET,
1584 /* Do *NOT* enable this, completions events are managed per
1588 .res_domain = tmpl.rd,
1589 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1590 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1592 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1593 if (tmpl.qp == NULL) {
1594 ret = (errno ? errno : EINVAL);
1595 ERROR("%p: QP creation failure: %s",
1596 (void *)dev, strerror(ret));
1599 /* ibv_create_qp() updates this value. */
1600 tmpl.max_inline = attr.init.cap.max_inline_data;
1601 attr.mod = (struct ibv_exp_qp_attr){
1602 /* Move the QP to this state. */
1603 .qp_state = IBV_QPS_INIT,
1604 /* Primary port number. */
1605 .port_num = priv->port
1607 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1608 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1610 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1611 (void *)dev, strerror(ret));
1614 ret = txq_alloc_elts(&tmpl, desc);
1616 ERROR("%p: TXQ allocation failed: %s",
1617 (void *)dev, strerror(ret));
1620 attr.mod = (struct ibv_exp_qp_attr){
1621 .qp_state = IBV_QPS_RTR
1623 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1625 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1626 (void *)dev, strerror(ret));
1629 attr.mod.qp_state = IBV_QPS_RTS;
1630 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1632 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1633 (void *)dev, strerror(ret));
1636 attr.params = (struct ibv_exp_query_intf_params){
1637 .intf_scope = IBV_EXP_INTF_GLOBAL,
1638 .intf = IBV_EXP_INTF_CQ,
1641 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1642 if (tmpl.if_cq == NULL) {
1643 ERROR("%p: CQ interface family query failed with status %d",
1644 (void *)dev, status);
1647 attr.params = (struct ibv_exp_query_intf_params){
1648 .intf_scope = IBV_EXP_INTF_GLOBAL,
1649 .intf = IBV_EXP_INTF_QP_BURST,
1651 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1652 /* MC loopback must be disabled when not using a VF. */
1655 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1659 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1660 if (tmpl.if_qp == NULL) {
1661 ERROR("%p: QP interface family query failed with status %d",
1662 (void *)dev, status);
1665 /* Clean up txq in case we're reinitializing it. */
1666 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1669 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1670 /* Pre-register known mempools. */
1671 rte_mempool_walk(txq_mp2mr_iter, txq);
1681 * DPDK callback to configure a TX queue.
1684 * Pointer to Ethernet device structure.
1688 * Number of descriptors to configure in queue.
1690 * NUMA socket on which memory must be allocated.
1692 * Thresholds parameters.
1695 * 0 on success, negative errno value on failure.
1698 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1699 unsigned int socket, const struct rte_eth_txconf *conf)
1701 struct priv *priv = dev->data->dev_private;
1702 struct txq *txq = (*priv->txqs)[idx];
1706 DEBUG("%p: configuring queue %u for %u descriptors",
1707 (void *)dev, idx, desc);
1708 if (idx >= priv->txqs_n) {
1709 ERROR("%p: queue index out of range (%u >= %u)",
1710 (void *)dev, idx, priv->txqs_n);
1715 DEBUG("%p: reusing already allocated queue index %u (%p)",
1716 (void *)dev, idx, (void *)txq);
1717 if (priv->started) {
1721 (*priv->txqs)[idx] = NULL;
1724 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1726 ERROR("%p: unable to allocate queue index %u",
1732 ret = txq_setup(dev, txq, desc, socket, conf);
1736 txq->stats.idx = idx;
1737 DEBUG("%p: adding TX queue %p to list",
1738 (void *)dev, (void *)txq);
1739 (*priv->txqs)[idx] = txq;
1740 /* Update send callback. */
1741 dev->tx_pkt_burst = mlx4_tx_burst;
1748 * DPDK callback to release a TX queue.
1751 * Generic TX queue pointer.
1754 mlx4_tx_queue_release(void *dpdk_txq)
1756 struct txq *txq = (struct txq *)dpdk_txq;
1764 for (i = 0; (i != priv->txqs_n); ++i)
1765 if ((*priv->txqs)[i] == txq) {
1766 DEBUG("%p: removing TX queue %p from list",
1767 (void *)priv->dev, (void *)txq);
1768 (*priv->txqs)[i] = NULL;
1776 /* RX queues handling. */
1779 * Allocate RX queue elements with scattered packets support.
1782 * Pointer to RX queue structure.
1784 * Number of elements to allocate.
1786 * If not NULL, fetch buffers from this array instead of allocating them
1787 * with rte_pktmbuf_alloc().
1790 * 0 on success, errno value on failure.
1793 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
1794 struct rte_mbuf **pool)
1797 struct rxq_elt_sp (*elts)[elts_n] =
1798 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1803 ERROR("%p: can't allocate packets array", (void *)rxq);
1807 /* For each WR (packet). */
1808 for (i = 0; (i != elts_n); ++i) {
1810 struct rxq_elt_sp *elt = &(*elts)[i];
1811 struct ibv_recv_wr *wr = &elt->wr;
1812 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
1814 /* These two arrays must have the same size. */
1815 assert(elemof(elt->sges) == elemof(elt->bufs));
1818 wr->next = &(*elts)[(i + 1)].wr;
1819 wr->sg_list = &(*sges)[0];
1820 wr->num_sge = elemof(*sges);
1821 /* For each SGE (segment). */
1822 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1823 struct ibv_sge *sge = &(*sges)[j];
1824 struct rte_mbuf *buf;
1828 assert(buf != NULL);
1829 rte_pktmbuf_reset(buf);
1831 buf = rte_pktmbuf_alloc(rxq->mp);
1833 assert(pool == NULL);
1834 ERROR("%p: empty mbuf pool", (void *)rxq);
1839 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1840 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1841 /* Buffer is supposed to be empty. */
1842 assert(rte_pktmbuf_data_len(buf) == 0);
1843 assert(rte_pktmbuf_pkt_len(buf) == 0);
1844 /* sge->addr must be able to store a pointer. */
1845 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
1847 /* The first SGE keeps its headroom. */
1848 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1849 sge->length = (buf->buf_len -
1850 RTE_PKTMBUF_HEADROOM);
1852 /* Subsequent SGEs lose theirs. */
1853 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1854 SET_DATA_OFF(buf, 0);
1855 sge->addr = (uintptr_t)buf->buf_addr;
1856 sge->length = buf->buf_len;
1858 sge->lkey = rxq->mr->lkey;
1859 /* Redundant check for tailroom. */
1860 assert(sge->length == rte_pktmbuf_tailroom(buf));
1863 /* The last WR pointer must be NULL. */
1864 (*elts)[(i - 1)].wr.next = NULL;
1865 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
1866 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
1867 rxq->elts_n = elts_n;
1869 rxq->elts.sp = elts;
1874 assert(pool == NULL);
1875 for (i = 0; (i != elemof(*elts)); ++i) {
1877 struct rxq_elt_sp *elt = &(*elts)[i];
1879 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1880 struct rte_mbuf *buf = elt->bufs[j];
1883 rte_pktmbuf_free_seg(buf);
1888 DEBUG("%p: failed, freed everything", (void *)rxq);
1894 * Free RX queue elements with scattered packets support.
1897 * Pointer to RX queue structure.
1900 rxq_free_elts_sp(struct rxq *rxq)
1903 unsigned int elts_n = rxq->elts_n;
1904 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
1906 DEBUG("%p: freeing WRs", (void *)rxq);
1908 rxq->elts.sp = NULL;
1911 for (i = 0; (i != elemof(*elts)); ++i) {
1913 struct rxq_elt_sp *elt = &(*elts)[i];
1915 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1916 struct rte_mbuf *buf = elt->bufs[j];
1919 rte_pktmbuf_free_seg(buf);
1926 * Allocate RX queue elements.
1929 * Pointer to RX queue structure.
1931 * Number of elements to allocate.
1933 * If not NULL, fetch buffers from this array instead of allocating them
1934 * with rte_pktmbuf_alloc().
1937 * 0 on success, errno value on failure.
1940 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
1943 struct rxq_elt (*elts)[elts_n] =
1944 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1949 ERROR("%p: can't allocate packets array", (void *)rxq);
1953 /* For each WR (packet). */
1954 for (i = 0; (i != elts_n); ++i) {
1955 struct rxq_elt *elt = &(*elts)[i];
1956 struct ibv_recv_wr *wr = &elt->wr;
1957 struct ibv_sge *sge = &(*elts)[i].sge;
1958 struct rte_mbuf *buf;
1962 assert(buf != NULL);
1963 rte_pktmbuf_reset(buf);
1965 buf = rte_pktmbuf_alloc(rxq->mp);
1967 assert(pool == NULL);
1968 ERROR("%p: empty mbuf pool", (void *)rxq);
1972 /* Configure WR. Work request ID contains its own index in
1973 * the elts array and the offset between SGE buffer header and
1975 WR_ID(wr->wr_id).id = i;
1976 WR_ID(wr->wr_id).offset =
1977 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
1979 wr->next = &(*elts)[(i + 1)].wr;
1982 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1983 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1984 /* Buffer is supposed to be empty. */
1985 assert(rte_pktmbuf_data_len(buf) == 0);
1986 assert(rte_pktmbuf_pkt_len(buf) == 0);
1987 /* sge->addr must be able to store a pointer. */
1988 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
1989 /* SGE keeps its headroom. */
1990 sge->addr = (uintptr_t)
1991 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
1992 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
1993 sge->lkey = rxq->mr->lkey;
1994 /* Redundant check for tailroom. */
1995 assert(sge->length == rte_pktmbuf_tailroom(buf));
1996 /* Make sure elts index and SGE mbuf pointer can be deduced
1998 if ((WR_ID(wr->wr_id).id != i) ||
1999 ((void *)((uintptr_t)sge->addr -
2000 WR_ID(wr->wr_id).offset) != buf)) {
2001 ERROR("%p: cannot store index and offset in WR ID",
2004 rte_pktmbuf_free(buf);
2009 /* The last WR pointer must be NULL. */
2010 (*elts)[(i - 1)].wr.next = NULL;
2011 DEBUG("%p: allocated and configured %u single-segment WRs",
2012 (void *)rxq, elts_n);
2013 rxq->elts_n = elts_n;
2015 rxq->elts.no_sp = elts;
2020 assert(pool == NULL);
2021 for (i = 0; (i != elemof(*elts)); ++i) {
2022 struct rxq_elt *elt = &(*elts)[i];
2023 struct rte_mbuf *buf;
2025 if (elt->sge.addr == 0)
2027 assert(WR_ID(elt->wr.wr_id).id == i);
2028 buf = (void *)((uintptr_t)elt->sge.addr -
2029 WR_ID(elt->wr.wr_id).offset);
2030 rte_pktmbuf_free_seg(buf);
2034 DEBUG("%p: failed, freed everything", (void *)rxq);
2040 * Free RX queue elements.
2043 * Pointer to RX queue structure.
2046 rxq_free_elts(struct rxq *rxq)
2049 unsigned int elts_n = rxq->elts_n;
2050 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2052 DEBUG("%p: freeing WRs", (void *)rxq);
2054 rxq->elts.no_sp = NULL;
2057 for (i = 0; (i != elemof(*elts)); ++i) {
2058 struct rxq_elt *elt = &(*elts)[i];
2059 struct rte_mbuf *buf;
2061 if (elt->sge.addr == 0)
2063 assert(WR_ID(elt->wr.wr_id).id == i);
2064 buf = (void *)((uintptr_t)elt->sge.addr -
2065 WR_ID(elt->wr.wr_id).offset);
2066 rte_pktmbuf_free_seg(buf);
2072 * Unregister a MAC address.
2075 * Pointer to private structure.
2078 priv_mac_addr_del(struct priv *priv)
2081 uint8_t (*mac)[ETHER_ADDR_LEN] = &priv->mac.addr_bytes;
2084 if (!priv->mac_flow)
2086 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x",
2088 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5]);
2089 claim_zero(ibv_destroy_flow(priv->mac_flow));
2090 priv->mac_flow = NULL;
2094 * Register a MAC address.
2096 * In RSS mode, the MAC address is registered in the parent queue,
2097 * otherwise it is registered in queue 0.
2100 * Pointer to private structure.
2103 * 0 on success, errno value on failure.
2106 priv_mac_addr_add(struct priv *priv)
2108 uint8_t (*mac)[ETHER_ADDR_LEN] = &priv->mac.addr_bytes;
2110 struct ibv_flow *flow;
2112 /* If device isn't started, this is all we need to do. */
2118 rxq = LIST_FIRST(&priv->parents);
2119 else if (*priv->rxqs && (*priv->rxqs)[0])
2120 rxq = (*priv->rxqs)[0];
2124 /* Allocate flow specification on the stack. */
2125 struct __attribute__((packed)) {
2126 struct ibv_flow_attr attr;
2127 struct ibv_flow_spec_eth spec;
2129 struct ibv_flow_attr *attr = &data.attr;
2130 struct ibv_flow_spec_eth *spec = &data.spec;
2133 priv_mac_addr_del(priv);
2135 * No padding must be inserted by the compiler between attr and spec.
2136 * This layout is expected by libibverbs.
2138 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2139 *attr = (struct ibv_flow_attr){
2140 .type = IBV_FLOW_ATTR_NORMAL,
2146 *spec = (struct ibv_flow_spec_eth){
2147 .type = IBV_FLOW_SPEC_ETH,
2148 .size = sizeof(*spec),
2151 (*mac)[0], (*mac)[1], (*mac)[2],
2152 (*mac)[3], (*mac)[4], (*mac)[5]
2156 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2159 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x",
2161 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5]);
2162 /* Create related flow. */
2164 flow = ibv_create_flow(rxq->qp, attr);
2166 /* It's not clear whether errno is always set in this case. */
2167 ERROR("%p: flow configuration failed, errno=%d: %s",
2169 (errno ? strerror(errno) : "Unknown error"));
2174 assert(priv->mac_flow == NULL);
2175 priv->mac_flow = flow;
2180 * Clean up a RX queue.
2182 * Destroy objects, free allocated memory and reset the structure for reuse.
2185 * Pointer to RX queue structure.
2188 rxq_cleanup(struct rxq *rxq)
2190 struct ibv_exp_release_intf_params params;
2192 DEBUG("cleaning up %p", (void *)rxq);
2194 rxq_free_elts_sp(rxq);
2197 if (rxq->if_qp != NULL) {
2198 assert(rxq->priv != NULL);
2199 assert(rxq->priv->ctx != NULL);
2200 assert(rxq->qp != NULL);
2201 params = (struct ibv_exp_release_intf_params){
2204 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2208 if (rxq->if_cq != NULL) {
2209 assert(rxq->priv != NULL);
2210 assert(rxq->priv->ctx != NULL);
2211 assert(rxq->cq != NULL);
2212 params = (struct ibv_exp_release_intf_params){
2215 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2219 if (rxq->qp != NULL)
2220 claim_zero(ibv_destroy_qp(rxq->qp));
2221 if (rxq->cq != NULL)
2222 claim_zero(ibv_destroy_cq(rxq->cq));
2223 if (rxq->channel != NULL)
2224 claim_zero(ibv_destroy_comp_channel(rxq->channel));
2225 if (rxq->rd != NULL) {
2226 struct ibv_exp_destroy_res_domain_attr attr = {
2230 assert(rxq->priv != NULL);
2231 assert(rxq->priv->ctx != NULL);
2232 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2236 if (rxq->mr != NULL)
2237 claim_zero(ibv_dereg_mr(rxq->mr));
2238 memset(rxq, 0, sizeof(*rxq));
2242 * Translate RX completion flags to packet type.
2245 * RX completion flags returned by poll_length_flags().
2247 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2250 * Packet type for struct rte_mbuf.
2252 static inline uint32_t
2253 rxq_cq_to_pkt_type(uint32_t flags)
2257 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2260 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,
2261 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2263 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,
2264 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN) |
2266 IBV_EXP_CQ_RX_IPV4_PACKET,
2267 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN) |
2269 IBV_EXP_CQ_RX_IPV6_PACKET,
2270 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN);
2274 IBV_EXP_CQ_RX_IPV4_PACKET,
2275 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2277 IBV_EXP_CQ_RX_IPV6_PACKET,
2278 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN);
2283 * Translate RX completion flags to offload flags.
2286 * Pointer to RX queue structure.
2288 * RX completion flags returned by poll_length_flags().
2291 * Offload flags (ol_flags) for struct rte_mbuf.
2293 static inline uint32_t
2294 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2296 uint32_t ol_flags = 0;
2301 IBV_EXP_CQ_RX_IP_CSUM_OK,
2302 PKT_RX_IP_CKSUM_GOOD) |
2304 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2305 PKT_RX_L4_CKSUM_GOOD);
2306 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2309 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2310 PKT_RX_IP_CKSUM_GOOD) |
2312 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2313 PKT_RX_L4_CKSUM_GOOD);
2318 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2321 * DPDK callback for RX with scattered packets support.
2324 * Generic pointer to RX queue structure.
2326 * Array to store received packets.
2328 * Maximum number of packets in array.
2331 * Number of packets successfully received (<= pkts_n).
2334 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2336 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2337 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2338 const unsigned int elts_n = rxq->elts_n;
2339 unsigned int elts_head = rxq->elts_head;
2340 struct ibv_recv_wr head;
2341 struct ibv_recv_wr **next = &head.next;
2342 struct ibv_recv_wr *bad_wr;
2344 unsigned int pkts_ret = 0;
2347 if (unlikely(!rxq->sp))
2348 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2349 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2351 for (i = 0; (i != pkts_n); ++i) {
2352 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2353 struct ibv_recv_wr *wr = &elt->wr;
2354 uint64_t wr_id = wr->wr_id;
2356 unsigned int pkt_buf_len;
2357 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2358 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2359 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2363 /* Sanity checks. */
2367 assert(wr_id < rxq->elts_n);
2368 assert(wr->sg_list == elt->sges);
2369 assert(wr->num_sge == elemof(elt->sges));
2370 assert(elts_head < rxq->elts_n);
2371 assert(rxq->elts_head < rxq->elts_n);
2372 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2374 if (unlikely(ret < 0)) {
2378 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2380 /* ibv_poll_cq() must be used in case of failure. */
2381 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2382 if (unlikely(wcs_n == 0))
2384 if (unlikely(wcs_n < 0)) {
2385 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2386 (void *)rxq, wcs_n);
2390 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2391 /* Whatever, just repost the offending WR. */
2392 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2393 " completion status (%d): %s",
2394 (void *)rxq, wc.wr_id, wc.status,
2395 ibv_wc_status_str(wc.status));
2396 /* Increment dropped packets counter. */
2397 ++rxq->stats.idropped;
2398 /* Link completed WRs together for repost. */
2409 /* Link completed WRs together for repost. */
2413 * Replace spent segments with new ones, concatenate and
2414 * return them as pkt_buf.
2417 struct ibv_sge *sge = &elt->sges[j];
2418 struct rte_mbuf *seg = elt->bufs[j];
2419 struct rte_mbuf *rep;
2420 unsigned int seg_tailroom;
2423 * Fetch initial bytes of packet descriptor into a
2424 * cacheline while allocating rep.
2427 rep = rte_mbuf_raw_alloc(rxq->mp);
2428 if (unlikely(rep == NULL)) {
2430 * Unable to allocate a replacement mbuf,
2433 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
2434 " can't allocate a new mbuf",
2435 (void *)rxq, wr_id);
2436 if (pkt_buf != NULL) {
2437 *pkt_buf_next = NULL;
2438 rte_pktmbuf_free(pkt_buf);
2440 /* Increase out of memory counters. */
2441 ++rxq->stats.rx_nombuf;
2442 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2446 /* Poison user-modifiable fields in rep. */
2447 NEXT(rep) = (void *)((uintptr_t)-1);
2448 SET_DATA_OFF(rep, 0xdead);
2449 DATA_LEN(rep) = 0xd00d;
2450 PKT_LEN(rep) = 0xdeadd00d;
2451 NB_SEGS(rep) = 0x2a;
2455 * Clear special flags in mbuf to avoid
2456 * crashing while freeing.
2459 ~(uint64_t)(IND_ATTACHED_MBUF |
2462 assert(rep->buf_len == seg->buf_len);
2463 /* Reconfigure sge to use rep instead of seg. */
2464 assert(sge->lkey == rxq->mr->lkey);
2465 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
2468 /* Update pkt_buf if it's the first segment, or link
2469 * seg to the previous one and update pkt_buf_next. */
2470 *pkt_buf_next = seg;
2471 pkt_buf_next = &NEXT(seg);
2472 /* Update seg information. */
2473 seg_tailroom = (seg->buf_len - seg_headroom);
2474 assert(sge->length == seg_tailroom);
2475 SET_DATA_OFF(seg, seg_headroom);
2476 if (likely(len <= seg_tailroom)) {
2478 DATA_LEN(seg) = len;
2481 assert(rte_pktmbuf_headroom(seg) ==
2483 assert(rte_pktmbuf_tailroom(seg) ==
2484 (seg_tailroom - len));
2487 DATA_LEN(seg) = seg_tailroom;
2488 PKT_LEN(seg) = seg_tailroom;
2490 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
2491 assert(rte_pktmbuf_tailroom(seg) == 0);
2492 /* Fix len and clear headroom for next segments. */
2493 len -= seg_tailroom;
2496 /* Update head and tail segments. */
2497 *pkt_buf_next = NULL;
2498 assert(pkt_buf != NULL);
2500 NB_SEGS(pkt_buf) = j;
2501 PORT(pkt_buf) = rxq->port_id;
2502 PKT_LEN(pkt_buf) = pkt_buf_len;
2503 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
2504 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
2506 /* Return packet. */
2507 *(pkts++) = pkt_buf;
2509 /* Increase bytes counter. */
2510 rxq->stats.ibytes += pkt_buf_len;
2512 if (++elts_head >= elts_n)
2516 if (unlikely(i == 0))
2520 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
2521 if (unlikely(ret)) {
2522 /* Inability to repost WRs is fatal. */
2523 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
2529 rxq->elts_head = elts_head;
2530 /* Increase packets counter. */
2531 rxq->stats.ipackets += pkts_ret;
2536 * DPDK callback for RX.
2538 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
2539 * manage scattered packets. Improves performance when MRU is lower than the
2540 * size of the first segment.
2543 * Generic pointer to RX queue structure.
2545 * Array to store received packets.
2547 * Maximum number of packets in array.
2550 * Number of packets successfully received (<= pkts_n).
2553 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2555 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2556 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
2557 const unsigned int elts_n = rxq->elts_n;
2558 unsigned int elts_head = rxq->elts_head;
2559 struct ibv_sge sges[pkts_n];
2561 unsigned int pkts_ret = 0;
2564 if (unlikely(rxq->sp))
2565 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
2566 for (i = 0; (i != pkts_n); ++i) {
2567 struct rxq_elt *elt = &(*elts)[elts_head];
2568 struct ibv_recv_wr *wr = &elt->wr;
2569 uint64_t wr_id = wr->wr_id;
2571 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
2572 WR_ID(wr_id).offset);
2573 struct rte_mbuf *rep;
2576 /* Sanity checks. */
2577 assert(WR_ID(wr_id).id < rxq->elts_n);
2578 assert(wr->sg_list == &elt->sge);
2579 assert(wr->num_sge == 1);
2580 assert(elts_head < rxq->elts_n);
2581 assert(rxq->elts_head < rxq->elts_n);
2583 * Fetch initial bytes of packet descriptor into a
2584 * cacheline while allocating rep.
2586 rte_mbuf_prefetch_part1(seg);
2587 rte_mbuf_prefetch_part2(seg);
2588 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2590 if (unlikely(ret < 0)) {
2594 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2596 /* ibv_poll_cq() must be used in case of failure. */
2597 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2598 if (unlikely(wcs_n == 0))
2600 if (unlikely(wcs_n < 0)) {
2601 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2602 (void *)rxq, wcs_n);
2606 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2607 /* Whatever, just repost the offending WR. */
2608 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2609 " completion status (%d): %s",
2610 (void *)rxq, wc.wr_id, wc.status,
2611 ibv_wc_status_str(wc.status));
2612 /* Increment dropped packets counter. */
2613 ++rxq->stats.idropped;
2614 /* Add SGE to array for repost. */
2623 rep = rte_mbuf_raw_alloc(rxq->mp);
2624 if (unlikely(rep == NULL)) {
2626 * Unable to allocate a replacement mbuf,
2629 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
2630 " can't allocate a new mbuf",
2631 (void *)rxq, WR_ID(wr_id).id);
2632 /* Increase out of memory counters. */
2633 ++rxq->stats.rx_nombuf;
2634 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2635 /* Add SGE to array for repost. */
2640 /* Reconfigure sge to use rep instead of seg. */
2641 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
2642 assert(elt->sge.lkey == rxq->mr->lkey);
2643 WR_ID(wr->wr_id).offset =
2644 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
2646 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
2648 /* Add SGE to array for repost. */
2651 /* Update seg information. */
2652 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
2654 PORT(seg) = rxq->port_id;
2657 DATA_LEN(seg) = len;
2658 seg->packet_type = rxq_cq_to_pkt_type(flags);
2659 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
2661 /* Return packet. */
2664 /* Increase bytes counter. */
2665 rxq->stats.ibytes += len;
2667 if (++elts_head >= elts_n)
2671 if (unlikely(i == 0))
2674 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
2675 if (unlikely(ret)) {
2676 /* Inability to repost WRs is fatal. */
2677 DEBUG("%p: recv_burst(): failed (ret=%d)",
2682 rxq->elts_head = elts_head;
2683 /* Increase packets counter. */
2684 rxq->stats.ipackets += pkts_ret;
2689 * Allocate a Queue Pair.
2690 * Optionally setup inline receive if supported.
2693 * Pointer to private structure.
2695 * Completion queue to associate with QP.
2697 * Number of descriptors in QP (hint only).
2700 * QP pointer or NULL in case of error.
2702 static struct ibv_qp *
2703 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
2704 struct ibv_exp_res_domain *rd)
2706 struct ibv_exp_qp_init_attr attr = {
2707 /* CQ to be associated with the send queue. */
2709 /* CQ to be associated with the receive queue. */
2712 /* Max number of outstanding WRs. */
2713 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
2714 priv->device_attr.max_qp_wr :
2716 /* Max number of scatter/gather elements in a WR. */
2717 .max_recv_sge = ((priv->device_attr.max_sge <
2718 MLX4_PMD_SGE_WR_N) ?
2719 priv->device_attr.max_sge :
2722 .qp_type = IBV_QPT_RAW_PACKET,
2723 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
2724 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
2729 attr.max_inl_recv = priv->inl_recv_size;
2730 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
2731 return ibv_exp_create_qp(priv->ctx, &attr);
2735 * Allocate a RSS Queue Pair.
2736 * Optionally setup inline receive if supported.
2739 * Pointer to private structure.
2741 * Completion queue to associate with QP.
2743 * Number of descriptors in QP (hint only).
2745 * If nonzero, a number of children for parent QP and zero for a child.
2747 * Pointer for a parent in a child case, NULL otherwise.
2750 * QP pointer or NULL in case of error.
2752 static struct ibv_qp *
2753 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
2754 int children_n, struct ibv_exp_res_domain *rd,
2755 struct rxq *rxq_parent)
2757 struct ibv_exp_qp_init_attr attr = {
2758 /* CQ to be associated with the send queue. */
2760 /* CQ to be associated with the receive queue. */
2763 /* Max number of outstanding WRs. */
2764 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
2765 priv->device_attr.max_qp_wr :
2767 /* Max number of scatter/gather elements in a WR. */
2768 .max_recv_sge = ((priv->device_attr.max_sge <
2769 MLX4_PMD_SGE_WR_N) ?
2770 priv->device_attr.max_sge :
2773 .qp_type = IBV_QPT_RAW_PACKET,
2774 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
2775 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
2776 IBV_EXP_QP_INIT_ATTR_QPG),
2781 attr.max_inl_recv = priv->inl_recv_size,
2782 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
2783 if (children_n > 0) {
2784 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
2785 /* TSS isn't necessary. */
2786 attr.qpg.parent_attrib.tss_child_count = 0;
2787 attr.qpg.parent_attrib.rss_child_count =
2788 rte_align32pow2(children_n + 1) >> 1;
2789 DEBUG("initializing parent RSS queue");
2791 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
2792 attr.qpg.qpg_parent = rxq_parent->qp;
2793 DEBUG("initializing child RSS queue");
2795 return ibv_exp_create_qp(priv->ctx, &attr);
2799 * Reconfigure a RX queue with new parameters.
2801 * rxq_rehash() does not allocate mbufs, which, if not done from the right
2802 * thread (such as a control thread), may corrupt the pool.
2803 * In case of failure, the queue is left untouched.
2806 * Pointer to Ethernet device structure.
2811 * 0 on success, errno value on failure.
2814 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
2816 struct priv *priv = rxq->priv;
2817 struct rxq tmpl = *rxq;
2818 unsigned int mbuf_n;
2819 unsigned int desc_n;
2820 struct rte_mbuf **pool;
2822 struct ibv_exp_qp_attr mod;
2823 struct ibv_recv_wr *bad_wr;
2824 unsigned int mb_len;
2827 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
2828 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
2829 /* Number of descriptors and mbufs currently allocated. */
2830 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
2832 /* Toggle RX checksum offload if hardware supports it. */
2833 if (priv->hw_csum) {
2834 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
2835 rxq->csum = tmpl.csum;
2837 if (priv->hw_csum_l2tun) {
2838 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
2839 rxq->csum_l2tun = tmpl.csum_l2tun;
2841 /* Enable scattered packets support for this queue if necessary. */
2842 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
2843 if (dev->data->dev_conf.rxmode.enable_scatter &&
2844 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
2845 (mb_len - RTE_PKTMBUF_HEADROOM))) {
2847 desc_n /= MLX4_PMD_SGE_WR_N;
2850 DEBUG("%p: %s scattered packets support (%u WRs)",
2851 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
2852 /* If scatter mode is the same as before, nothing to do. */
2853 if (tmpl.sp == rxq->sp) {
2854 DEBUG("%p: nothing to do", (void *)dev);
2857 /* From now on, any failure will render the queue unusable.
2858 * Reinitialize QP. */
2861 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
2862 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
2864 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
2868 mod = (struct ibv_exp_qp_attr){
2869 /* Move the QP to this state. */
2870 .qp_state = IBV_QPS_INIT,
2871 /* Primary port number. */
2872 .port_num = priv->port
2874 err = ibv_exp_modify_qp(tmpl.qp, &mod,
2878 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
2879 (void *)dev, strerror(err));
2884 err = ibv_resize_cq(tmpl.cq, desc_n);
2886 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
2890 /* Allocate pool. */
2891 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
2893 ERROR("%p: cannot allocate memory", (void *)dev);
2896 /* Snatch mbufs from original queue. */
2899 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2901 for (i = 0; (i != elemof(*elts)); ++i) {
2902 struct rxq_elt_sp *elt = &(*elts)[i];
2905 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2906 assert(elt->bufs[j] != NULL);
2907 pool[k++] = elt->bufs[j];
2911 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
2913 for (i = 0; (i != elemof(*elts)); ++i) {
2914 struct rxq_elt *elt = &(*elts)[i];
2915 struct rte_mbuf *buf = (void *)
2916 ((uintptr_t)elt->sge.addr -
2917 WR_ID(elt->wr.wr_id).offset);
2919 assert(WR_ID(elt->wr.wr_id).id == i);
2923 assert(k == mbuf_n);
2925 tmpl.elts.sp = NULL;
2926 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
2928 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
2929 rxq_alloc_elts(&tmpl, desc_n, pool));
2931 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
2936 assert(tmpl.elts_n == desc_n);
2937 assert(tmpl.elts.sp != NULL);
2939 /* Clean up original data. */
2941 rte_free(rxq->elts.sp);
2942 rxq->elts.sp = NULL;
2946 err = ibv_post_recv(tmpl.qp,
2948 &(*tmpl.elts.sp)[0].wr :
2949 &(*tmpl.elts.no_sp)[0].wr),
2952 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
2958 mod = (struct ibv_exp_qp_attr){
2959 .qp_state = IBV_QPS_RTR
2961 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
2963 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
2964 (void *)dev, strerror(err));
2972 * Create verbs QP resources associated with a rxq.
2975 * Pointer to RX queue structure.
2977 * Number of descriptors to configure in queue.
2979 * If true, the queue is disabled because its index is higher or
2980 * equal to the real number of queues, which must be a power of 2.
2982 * The number of children in a parent case, zero for a child.
2984 * The pointer to a parent RX structure for a child in RSS case,
2988 * 0 on success, errno value on failure.
2991 rxq_create_qp(struct rxq *rxq,
2995 struct rxq *rxq_parent)
2998 struct ibv_exp_qp_attr mod;
2999 struct ibv_exp_query_intf_params params;
3000 enum ibv_exp_query_intf_status status;
3001 struct ibv_recv_wr *bad_wr;
3002 int parent = (children_n > 0);
3003 struct priv *priv = rxq->priv;
3005 if (priv->rss && !inactive && (rxq_parent || parent))
3006 rxq->qp = rxq_setup_qp_rss(priv, rxq->cq, desc,
3007 children_n, rxq->rd,
3010 rxq->qp = rxq_setup_qp(priv, rxq->cq, desc, rxq->rd);
3011 if (rxq->qp == NULL) {
3012 ret = (errno ? errno : EINVAL);
3013 ERROR("QP creation failure: %s",
3017 mod = (struct ibv_exp_qp_attr){
3018 /* Move the QP to this state. */
3019 .qp_state = IBV_QPS_INIT,
3020 /* Primary port number. */
3021 .port_num = priv->port
3023 ret = ibv_exp_modify_qp(rxq->qp, &mod,
3025 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3028 ERROR("QP state to IBV_QPS_INIT failed: %s",
3033 ret = ibv_post_recv(rxq->qp,
3035 &(*rxq->elts.sp)[0].wr :
3036 &(*rxq->elts.no_sp)[0].wr),
3039 ERROR("ibv_post_recv() failed for WR %p: %s",
3045 mod = (struct ibv_exp_qp_attr){
3046 .qp_state = IBV_QPS_RTR
3048 ret = ibv_exp_modify_qp(rxq->qp, &mod, IBV_EXP_QP_STATE);
3050 ERROR("QP state to IBV_QPS_RTR failed: %s",
3054 params = (struct ibv_exp_query_intf_params){
3055 .intf_scope = IBV_EXP_INTF_GLOBAL,
3056 .intf = IBV_EXP_INTF_QP_BURST,
3059 rxq->if_qp = ibv_exp_query_intf(priv->ctx, ¶ms, &status);
3060 if (rxq->if_qp == NULL) {
3061 ERROR("QP interface family query failed with status %d",
3069 * Configure a RX queue.
3072 * Pointer to Ethernet device structure.
3074 * Pointer to RX queue structure.
3076 * Number of descriptors to configure in queue.
3078 * NUMA socket on which memory must be allocated.
3080 * If true, the queue is disabled because its index is higher or
3081 * equal to the real number of queues, which must be a power of 2.
3083 * Thresholds parameters.
3085 * Memory pool for buffer allocations.
3087 * The number of children in a parent case, zero for a child.
3089 * The pointer to a parent RX structure (or NULL) in a child case,
3093 * 0 on success, errno value on failure.
3096 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3097 unsigned int socket, int inactive,
3098 const struct rte_eth_rxconf *conf,
3099 struct rte_mempool *mp, int children_n,
3100 struct rxq *rxq_parent)
3102 struct priv *priv = dev->data->dev_private;
3109 struct ibv_exp_query_intf_params params;
3110 struct ibv_exp_cq_init_attr cq;
3111 struct ibv_exp_res_domain_init_attr rd;
3113 enum ibv_exp_query_intf_status status;
3114 unsigned int mb_len;
3116 int parent = (children_n > 0);
3118 (void)conf; /* Thresholds configuration (ignored). */
3120 * If this is a parent queue, hardware must support RSS and
3121 * RSS must be enabled.
3123 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3125 /* Even if unused, ibv_create_cq() requires at least one
3130 mb_len = rte_pktmbuf_data_room_size(mp);
3131 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3132 ERROR("%p: invalid number of RX descriptors (must be a"
3133 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3136 /* Toggle RX checksum offload if hardware supports it. */
3138 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3139 if (priv->hw_csum_l2tun)
3140 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3141 /* Enable scattered packets support for this queue if necessary. */
3142 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3143 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
3144 (mb_len - RTE_PKTMBUF_HEADROOM)) {
3146 } else if (dev->data->dev_conf.rxmode.enable_scatter) {
3148 desc /= MLX4_PMD_SGE_WR_N;
3150 WARN("%p: the requested maximum Rx packet size (%u) is"
3151 " larger than a single mbuf (%u) and scattered"
3152 " mode has not been requested",
3154 dev->data->dev_conf.rxmode.max_rx_pkt_len,
3155 mb_len - RTE_PKTMBUF_HEADROOM);
3157 DEBUG("%p: %s scattered packets support (%u WRs)",
3158 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3159 /* Use the entire RX mempool as the memory region. */
3160 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3161 if (tmpl.mr == NULL) {
3163 ERROR("%p: MR creation failure: %s",
3164 (void *)dev, strerror(ret));
3168 attr.rd = (struct ibv_exp_res_domain_init_attr){
3169 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3170 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3171 .thread_model = IBV_EXP_THREAD_SINGLE,
3172 .msg_model = IBV_EXP_MSG_HIGH_BW,
3174 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3175 if (tmpl.rd == NULL) {
3177 ERROR("%p: RD creation failure: %s",
3178 (void *)dev, strerror(ret));
3181 if (dev->data->dev_conf.intr_conf.rxq) {
3182 tmpl.channel = ibv_create_comp_channel(priv->ctx);
3183 if (tmpl.channel == NULL) {
3185 ERROR("%p: Rx interrupt completion channel creation"
3187 (void *)dev, strerror(ret));
3191 attr.cq = (struct ibv_exp_cq_init_attr){
3192 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3193 .res_domain = tmpl.rd,
3195 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, tmpl.channel, 0,
3197 if (tmpl.cq == NULL) {
3199 ERROR("%p: CQ creation failure: %s",
3200 (void *)dev, strerror(ret));
3203 DEBUG("priv->device_attr.max_qp_wr is %d",
3204 priv->device_attr.max_qp_wr);
3205 DEBUG("priv->device_attr.max_sge is %d",
3206 priv->device_attr.max_sge);
3207 /* Allocate descriptors for RX queues, except for the RSS parent. */
3211 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3213 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3215 ERROR("%p: RXQ allocation failed: %s",
3216 (void *)dev, strerror(ret));
3220 if (parent || rxq_parent || !priv->rss) {
3221 ret = rxq_create_qp(&tmpl, desc, inactive,
3222 children_n, rxq_parent);
3227 tmpl.port_id = dev->data->port_id;
3228 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3229 attr.params = (struct ibv_exp_query_intf_params){
3230 .intf_scope = IBV_EXP_INTF_GLOBAL,
3231 .intf = IBV_EXP_INTF_CQ,
3234 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3235 if (tmpl.if_cq == NULL) {
3237 ERROR("%p: CQ interface family query failed with status %d",
3238 (void *)dev, status);
3241 /* Clean up rxq in case we're reinitializing it. */
3242 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3245 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3255 * DPDK callback to configure a RX queue.
3258 * Pointer to Ethernet device structure.
3262 * Number of descriptors to configure in queue.
3264 * NUMA socket on which memory must be allocated.
3266 * Thresholds parameters.
3268 * Memory pool for buffer allocations.
3271 * 0 on success, negative errno value on failure.
3274 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3275 unsigned int socket, const struct rte_eth_rxconf *conf,
3276 struct rte_mempool *mp)
3279 struct priv *priv = dev->data->dev_private;
3280 struct rxq *rxq = (*priv->rxqs)[idx];
3285 DEBUG("%p: configuring queue %u for %u descriptors",
3286 (void *)dev, idx, desc);
3287 if (idx >= priv->rxqs_n) {
3288 ERROR("%p: queue index out of range (%u >= %u)",
3289 (void *)dev, idx, priv->rxqs_n);
3294 DEBUG("%p: reusing already allocated queue index %u (%p)",
3295 (void *)dev, idx, (void *)rxq);
3296 if (priv->started) {
3300 (*priv->rxqs)[idx] = NULL;
3302 priv_mac_addr_del(priv);
3305 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3307 ERROR("%p: unable to allocate queue index %u",
3313 if (priv->rss && !priv->isolated) {
3314 /* The list consists of the single default one. */
3315 parent = LIST_FIRST(&priv->parents);
3316 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
3321 ret = rxq_setup(dev, rxq, desc, socket,
3322 inactive, conf, mp, 0, parent);
3326 rxq->stats.idx = idx;
3327 DEBUG("%p: adding RX queue %p to list",
3328 (void *)dev, (void *)rxq);
3329 (*priv->rxqs)[idx] = rxq;
3330 /* Update receive callback. */
3332 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3334 dev->rx_pkt_burst = mlx4_rx_burst;
3341 * DPDK callback to release a RX queue.
3344 * Generic RX queue pointer.
3347 mlx4_rx_queue_release(void *dpdk_rxq)
3349 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3357 for (i = 0; (i != priv->rxqs_n); ++i)
3358 if ((*priv->rxqs)[i] == rxq) {
3359 DEBUG("%p: removing RX queue %p from list",
3360 (void *)priv->dev, (void *)rxq);
3361 (*priv->rxqs)[i] = NULL;
3363 priv_mac_addr_del(priv);
3372 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3375 priv_dev_removal_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3378 priv_dev_link_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3381 * DPDK callback to start the device.
3383 * Simulate device start by attaching all configured flows.
3386 * Pointer to Ethernet device structure.
3389 * 0 on success, negative errno value on failure.
3392 mlx4_dev_start(struct rte_eth_dev *dev)
3394 struct priv *priv = dev->data->dev_private;
3398 if (priv->started) {
3402 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
3404 ret = priv_mac_addr_add(priv);
3407 ret = priv_dev_link_interrupt_handler_install(priv, dev);
3409 ERROR("%p: LSC handler install failed",
3413 ret = priv_dev_removal_interrupt_handler_install(priv, dev);
3415 ERROR("%p: RMV handler install failed",
3419 ret = priv_rx_intr_vec_enable(priv);
3421 ERROR("%p: Rx interrupt vector creation failed",
3425 ret = mlx4_priv_flow_start(priv);
3427 ERROR("%p: flow start failed: %s",
3428 (void *)dev, strerror(ret));
3435 priv_mac_addr_del(priv);
3442 * DPDK callback to stop the device.
3444 * Simulate device stop by detaching all configured flows.
3447 * Pointer to Ethernet device structure.
3450 mlx4_dev_stop(struct rte_eth_dev *dev)
3452 struct priv *priv = dev->data->dev_private;
3455 if (!priv->started) {
3459 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
3461 mlx4_priv_flow_stop(priv);
3462 priv_mac_addr_del(priv);
3467 * Dummy DPDK callback for TX.
3469 * This function is used to temporarily replace the real callback during
3470 * unsafe control operations on the queue, or in case of error.
3473 * Generic pointer to TX queue structure.
3475 * Packets to transmit.
3477 * Number of packets in array.
3480 * Number of packets successfully transmitted (<= pkts_n).
3483 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
3492 * Dummy DPDK callback for RX.
3494 * This function is used to temporarily replace the real callback during
3495 * unsafe control operations on the queue, or in case of error.
3498 * Generic pointer to RX queue structure.
3500 * Array to store received packets.
3502 * Maximum number of packets in array.
3505 * Number of packets successfully received (<= pkts_n).
3508 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3517 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
3520 priv_dev_removal_interrupt_handler_uninstall(struct priv *,
3521 struct rte_eth_dev *);
3524 priv_dev_link_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
3527 * DPDK callback to close the device.
3529 * Destroy all queues and objects, free memory.
3532 * Pointer to Ethernet device structure.
3535 mlx4_dev_close(struct rte_eth_dev *dev)
3537 struct priv *priv = dev->data->dev_private;
3544 DEBUG("%p: closing device \"%s\"",
3546 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
3547 priv_mac_addr_del(priv);
3548 /* Prevent crashes when queues are still in use. This is unfortunately
3549 * still required for DPDK 1.3 because some programs (such as testpmd)
3550 * never release them before closing the device. */
3551 dev->rx_pkt_burst = removed_rx_burst;
3552 dev->tx_pkt_burst = removed_tx_burst;
3553 if (priv->rxqs != NULL) {
3554 /* XXX race condition if mlx4_rx_burst() is still running. */
3556 for (i = 0; (i != priv->rxqs_n); ++i) {
3557 tmp = (*priv->rxqs)[i];
3560 (*priv->rxqs)[i] = NULL;
3567 if (priv->txqs != NULL) {
3568 /* XXX race condition if mlx4_tx_burst() is still running. */
3570 for (i = 0; (i != priv->txqs_n); ++i) {
3571 tmp = (*priv->txqs)[i];
3574 (*priv->txqs)[i] = NULL;
3582 priv_parent_list_cleanup(priv);
3583 if (priv->pd != NULL) {
3584 assert(priv->ctx != NULL);
3585 claim_zero(ibv_dealloc_pd(priv->pd));
3586 claim_zero(ibv_close_device(priv->ctx));
3588 assert(priv->ctx == NULL);
3589 priv_dev_removal_interrupt_handler_uninstall(priv, dev);
3590 priv_dev_link_interrupt_handler_uninstall(priv, dev);
3591 priv_rx_intr_vec_disable(priv);
3593 memset(priv, 0, sizeof(*priv));
3597 * Change the link state (UP / DOWN).
3600 * Pointer to Ethernet device private data.
3602 * Nonzero for link up, otherwise link down.
3605 * 0 on success, errno value on failure.
3608 priv_set_link(struct priv *priv, int up)
3610 struct rte_eth_dev *dev = priv->dev;
3615 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
3618 for (i = 0; i < priv->rxqs_n; i++)
3619 if ((*priv->rxqs)[i]->sp)
3621 /* Check if an sp queue exists.
3622 * Note: Some old frames might be received.
3624 if (i == priv->rxqs_n)
3625 dev->rx_pkt_burst = mlx4_rx_burst;
3627 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3628 dev->tx_pkt_burst = mlx4_tx_burst;
3630 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
3633 dev->rx_pkt_burst = removed_rx_burst;
3634 dev->tx_pkt_burst = removed_tx_burst;
3640 * DPDK callback to bring the link DOWN.
3643 * Pointer to Ethernet device structure.
3646 * 0 on success, errno value on failure.
3649 mlx4_set_link_down(struct rte_eth_dev *dev)
3651 struct priv *priv = dev->data->dev_private;
3655 err = priv_set_link(priv, 0);
3661 * DPDK callback to bring the link UP.
3664 * Pointer to Ethernet device structure.
3667 * 0 on success, errno value on failure.
3670 mlx4_set_link_up(struct rte_eth_dev *dev)
3672 struct priv *priv = dev->data->dev_private;
3676 err = priv_set_link(priv, 1);
3681 * DPDK callback to get information about the device.
3684 * Pointer to Ethernet device structure.
3686 * Info structure output buffer.
3689 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
3691 struct priv *priv = dev->data->dev_private;
3693 char ifname[IF_NAMESIZE];
3695 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
3700 /* FIXME: we should ask the device for these values. */
3701 info->min_rx_bufsize = 32;
3702 info->max_rx_pktlen = 65536;
3704 * Since we need one CQ per QP, the limit is the minimum number
3705 * between the two values.
3707 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
3708 priv->device_attr.max_qp : priv->device_attr.max_cq);
3709 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
3712 info->max_rx_queues = max;
3713 info->max_tx_queues = max;
3714 /* Last array entry is reserved for broadcast. */
3715 info->max_mac_addrs = 1;
3716 info->rx_offload_capa =
3718 (DEV_RX_OFFLOAD_IPV4_CKSUM |
3719 DEV_RX_OFFLOAD_UDP_CKSUM |
3720 DEV_RX_OFFLOAD_TCP_CKSUM) :
3722 info->tx_offload_capa =
3724 (DEV_TX_OFFLOAD_IPV4_CKSUM |
3725 DEV_TX_OFFLOAD_UDP_CKSUM |
3726 DEV_TX_OFFLOAD_TCP_CKSUM) :
3728 if (priv_get_ifname(priv, &ifname) == 0)
3729 info->if_index = if_nametoindex(ifname);
3732 ETH_LINK_SPEED_10G |
3733 ETH_LINK_SPEED_20G |
3734 ETH_LINK_SPEED_40G |
3739 static const uint32_t *
3740 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
3742 static const uint32_t ptypes[] = {
3743 /* refers to rxq_cq_to_pkt_type() */
3746 RTE_PTYPE_INNER_L3_IPV4,
3747 RTE_PTYPE_INNER_L3_IPV6,
3751 if (dev->rx_pkt_burst == mlx4_rx_burst ||
3752 dev->rx_pkt_burst == mlx4_rx_burst_sp)
3758 * DPDK callback to get device statistics.
3761 * Pointer to Ethernet device structure.
3763 * Stats structure output buffer.
3766 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
3768 struct priv *priv = dev->data->dev_private;
3769 struct rte_eth_stats tmp = {0};
3776 /* Add software counters. */
3777 for (i = 0; (i != priv->rxqs_n); ++i) {
3778 struct rxq *rxq = (*priv->rxqs)[i];
3782 idx = rxq->stats.idx;
3783 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
3784 tmp.q_ipackets[idx] += rxq->stats.ipackets;
3785 tmp.q_ibytes[idx] += rxq->stats.ibytes;
3786 tmp.q_errors[idx] += (rxq->stats.idropped +
3787 rxq->stats.rx_nombuf);
3789 tmp.ipackets += rxq->stats.ipackets;
3790 tmp.ibytes += rxq->stats.ibytes;
3791 tmp.ierrors += rxq->stats.idropped;
3792 tmp.rx_nombuf += rxq->stats.rx_nombuf;
3794 for (i = 0; (i != priv->txqs_n); ++i) {
3795 struct txq *txq = (*priv->txqs)[i];
3799 idx = txq->stats.idx;
3800 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
3801 tmp.q_opackets[idx] += txq->stats.opackets;
3802 tmp.q_obytes[idx] += txq->stats.obytes;
3803 tmp.q_errors[idx] += txq->stats.odropped;
3805 tmp.opackets += txq->stats.opackets;
3806 tmp.obytes += txq->stats.obytes;
3807 tmp.oerrors += txq->stats.odropped;
3814 * DPDK callback to clear device statistics.
3817 * Pointer to Ethernet device structure.
3820 mlx4_stats_reset(struct rte_eth_dev *dev)
3822 struct priv *priv = dev->data->dev_private;
3829 for (i = 0; (i != priv->rxqs_n); ++i) {
3830 if ((*priv->rxqs)[i] == NULL)
3832 idx = (*priv->rxqs)[i]->stats.idx;
3833 (*priv->rxqs)[i]->stats =
3834 (struct mlx4_rxq_stats){ .idx = idx };
3836 for (i = 0; (i != priv->txqs_n); ++i) {
3837 if ((*priv->txqs)[i] == NULL)
3839 idx = (*priv->txqs)[i]->stats.idx;
3840 (*priv->txqs)[i]->stats =
3841 (struct mlx4_txq_stats){ .idx = idx };
3847 * DPDK callback to retrieve physical link information.
3850 * Pointer to Ethernet device structure.
3851 * @param wait_to_complete
3852 * Wait for request completion (ignored).
3855 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
3857 const struct priv *priv = dev->data->dev_private;
3858 struct ethtool_cmd edata = {
3862 struct rte_eth_link dev_link;
3865 /* priv_lock() is not taken to allow concurrent calls. */
3869 (void)wait_to_complete;
3870 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
3871 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
3874 memset(&dev_link, 0, sizeof(dev_link));
3875 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
3876 (ifr.ifr_flags & IFF_RUNNING));
3877 ifr.ifr_data = (void *)&edata;
3878 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
3879 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
3883 link_speed = ethtool_cmd_speed(&edata);
3884 if (link_speed == -1)
3885 dev_link.link_speed = 0;
3887 dev_link.link_speed = link_speed;
3888 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
3889 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
3890 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
3891 ETH_LINK_SPEED_FIXED);
3892 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
3893 /* Link status changed. */
3894 dev->data->dev_link = dev_link;
3897 /* Link status is still the same. */
3902 * DPDK callback to change the MTU.
3904 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
3905 * received). Use this as a hint to enable/disable scattered packets support
3906 * and improve performance when not needed.
3907 * Since failure is not an option, reconfiguring queues on the fly is not
3911 * Pointer to Ethernet device structure.
3916 * 0 on success, negative errno value on failure.
3919 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
3921 struct priv *priv = dev->data->dev_private;
3924 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
3928 /* Set kernel interface MTU first. */
3929 if (priv_set_mtu(priv, mtu)) {
3931 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
3935 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
3937 /* Remove MAC flow. */
3938 priv_mac_addr_del(priv);
3939 /* Temporarily replace RX handler with a fake one, assuming it has not
3940 * been copied elsewhere. */
3941 dev->rx_pkt_burst = removed_rx_burst;
3942 /* Make sure everyone has left mlx4_rx_burst() and uses
3943 * removed_rx_burst() instead. */
3946 /* Reconfigure each RX queue. */
3947 for (i = 0; (i != priv->rxqs_n); ++i) {
3948 struct rxq *rxq = (*priv->rxqs)[i];
3949 unsigned int max_frame_len;
3953 /* Calculate new maximum frame length according to MTU. */
3954 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
3955 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
3956 /* Provide new values to rxq_setup(). */
3957 dev->data->dev_conf.rxmode.jumbo_frame =
3958 (max_frame_len > ETHER_MAX_LEN);
3959 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
3960 ret = rxq_rehash(dev, rxq);
3962 /* Force SP RX if that queue requires it and abort. */
3964 rx_func = mlx4_rx_burst_sp;
3967 /* Scattered burst function takes priority. */
3969 rx_func = mlx4_rx_burst_sp;
3971 /* Burst functions can now be called again. */
3973 dev->rx_pkt_burst = rx_func;
3974 /* Restore MAC flow. */
3975 ret = priv_mac_addr_add(priv);
3983 * DPDK callback to get flow control status.
3986 * Pointer to Ethernet device structure.
3987 * @param[out] fc_conf
3988 * Flow control output buffer.
3991 * 0 on success, negative errno value on failure.
3994 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
3996 struct priv *priv = dev->data->dev_private;
3998 struct ethtool_pauseparam ethpause = {
3999 .cmd = ETHTOOL_GPAUSEPARAM
4003 ifr.ifr_data = (void *)ðpause;
4005 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4007 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4013 fc_conf->autoneg = ethpause.autoneg;
4014 if (ethpause.rx_pause && ethpause.tx_pause)
4015 fc_conf->mode = RTE_FC_FULL;
4016 else if (ethpause.rx_pause)
4017 fc_conf->mode = RTE_FC_RX_PAUSE;
4018 else if (ethpause.tx_pause)
4019 fc_conf->mode = RTE_FC_TX_PAUSE;
4021 fc_conf->mode = RTE_FC_NONE;
4031 * DPDK callback to modify flow control parameters.
4034 * Pointer to Ethernet device structure.
4035 * @param[in] fc_conf
4036 * Flow control parameters.
4039 * 0 on success, negative errno value on failure.
4042 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4044 struct priv *priv = dev->data->dev_private;
4046 struct ethtool_pauseparam ethpause = {
4047 .cmd = ETHTOOL_SPAUSEPARAM
4051 ifr.ifr_data = (void *)ðpause;
4052 ethpause.autoneg = fc_conf->autoneg;
4053 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4054 (fc_conf->mode & RTE_FC_RX_PAUSE))
4055 ethpause.rx_pause = 1;
4057 ethpause.rx_pause = 0;
4059 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4060 (fc_conf->mode & RTE_FC_TX_PAUSE))
4061 ethpause.tx_pause = 1;
4063 ethpause.tx_pause = 0;
4066 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4068 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4081 const struct rte_flow_ops mlx4_flow_ops = {
4082 .validate = mlx4_flow_validate,
4083 .create = mlx4_flow_create,
4084 .destroy = mlx4_flow_destroy,
4085 .flush = mlx4_flow_flush,
4087 .isolate = mlx4_flow_isolate,
4091 * Manage filter operations.
4094 * Pointer to Ethernet device structure.
4095 * @param filter_type
4098 * Operation to perform.
4100 * Pointer to operation-specific structure.
4103 * 0 on success, negative errno value on failure.
4106 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
4107 enum rte_filter_type filter_type,
4108 enum rte_filter_op filter_op,
4113 switch (filter_type) {
4114 case RTE_ETH_FILTER_GENERIC:
4115 if (filter_op != RTE_ETH_FILTER_GET)
4117 *(const void **)arg = &mlx4_flow_ops;
4120 ERROR("%p: filter type (%d) not supported",
4121 (void *)dev, filter_type);
4127 static const struct eth_dev_ops mlx4_dev_ops = {
4128 .dev_configure = mlx4_dev_configure,
4129 .dev_start = mlx4_dev_start,
4130 .dev_stop = mlx4_dev_stop,
4131 .dev_set_link_down = mlx4_set_link_down,
4132 .dev_set_link_up = mlx4_set_link_up,
4133 .dev_close = mlx4_dev_close,
4134 .link_update = mlx4_link_update,
4135 .stats_get = mlx4_stats_get,
4136 .stats_reset = mlx4_stats_reset,
4137 .dev_infos_get = mlx4_dev_infos_get,
4138 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
4139 .rx_queue_setup = mlx4_rx_queue_setup,
4140 .tx_queue_setup = mlx4_tx_queue_setup,
4141 .rx_queue_release = mlx4_rx_queue_release,
4142 .tx_queue_release = mlx4_tx_queue_release,
4143 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
4144 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
4145 .mtu_set = mlx4_dev_set_mtu,
4146 .filter_ctrl = mlx4_dev_filter_ctrl,
4147 .rx_queue_intr_enable = mlx4_rx_intr_enable,
4148 .rx_queue_intr_disable = mlx4_rx_intr_disable,
4152 * Get PCI information from struct ibv_device.
4155 * Pointer to Ethernet device structure.
4156 * @param[out] pci_addr
4157 * PCI bus address output buffer.
4160 * 0 on success, -1 on failure and errno is set.
4163 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
4164 struct rte_pci_addr *pci_addr)
4168 MKSTR(path, "%s/device/uevent", device->ibdev_path);
4170 file = fopen(path, "rb");
4173 while (fgets(line, sizeof(line), file) == line) {
4174 size_t len = strlen(line);
4177 /* Truncate long lines. */
4178 if (len == (sizeof(line) - 1))
4179 while (line[(len - 1)] != '\n') {
4183 line[(len - 1)] = ret;
4185 /* Extract information. */
4188 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
4192 &pci_addr->function) == 4) {
4202 * Get MAC address by querying netdevice.
4205 * struct priv for the requested device.
4207 * MAC address output buffer.
4210 * 0 on success, -1 on failure and errno is set.
4213 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
4215 struct ifreq request;
4217 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
4219 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
4224 * Retrieve integer value from environment variable.
4227 * Environment variable name.
4230 * Integer value, 0 if the variable is not set.
4233 mlx4_getenv_int(const char *name)
4235 const char *val = getenv(name);
4243 mlx4_dev_link_status_handler(void *);
4245 mlx4_dev_interrupt_handler(void *);
4248 * Link/device status handler.
4251 * Pointer to private structure.
4253 * Pointer to the rte_eth_dev structure.
4255 * Pointer to event flags holder.
4261 priv_dev_status_handler(struct priv *priv, struct rte_eth_dev *dev,
4264 struct ibv_async_event event;
4265 int port_change = 0;
4266 struct rte_eth_link *link = &dev->data->dev_link;
4270 /* Read all message and acknowledge them. */
4272 if (ibv_get_async_event(priv->ctx, &event))
4274 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
4275 event.event_type == IBV_EVENT_PORT_ERR) &&
4276 (priv->intr_conf.lsc == 1)) {
4279 } else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
4280 priv->intr_conf.rmv == 1) {
4281 *events |= (1 << RTE_ETH_EVENT_INTR_RMV);
4284 DEBUG("event type %d on port %d not handled",
4285 event.event_type, event.element.port_num);
4286 ibv_ack_async_event(&event);
4290 mlx4_link_update(dev, 0);
4291 if (((link->link_speed == 0) && link->link_status) ||
4292 ((link->link_speed != 0) && !link->link_status)) {
4293 if (!priv->pending_alarm) {
4294 /* Inconsistent status, check again later. */
4295 priv->pending_alarm = 1;
4296 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
4297 mlx4_dev_link_status_handler,
4301 *events |= (1 << RTE_ETH_EVENT_INTR_LSC);
4307 * Handle delayed link status event.
4310 * Registered argument.
4313 mlx4_dev_link_status_handler(void *arg)
4315 struct rte_eth_dev *dev = arg;
4316 struct priv *priv = dev->data->dev_private;
4321 assert(priv->pending_alarm == 1);
4322 priv->pending_alarm = 0;
4323 ret = priv_dev_status_handler(priv, dev, &events);
4325 if (ret > 0 && events & (1 << RTE_ETH_EVENT_INTR_LSC))
4326 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
4331 * Handle interrupts from the NIC.
4333 * @param[in] intr_handle
4334 * Interrupt handler.
4336 * Callback argument.
4339 mlx4_dev_interrupt_handler(void *cb_arg)
4341 struct rte_eth_dev *dev = cb_arg;
4342 struct priv *priv = dev->data->dev_private;
4348 ret = priv_dev_status_handler(priv, dev, &ev);
4351 for (i = RTE_ETH_EVENT_UNKNOWN;
4352 i < RTE_ETH_EVENT_MAX;
4354 if (ev & (1 << i)) {
4356 _rte_eth_dev_callback_process(dev, i, NULL,
4362 WARN("%d event%s not processed", ret,
4363 (ret > 1 ? "s were" : " was"));
4368 * Uninstall interrupt handler.
4371 * Pointer to private structure.
4373 * Pointer to the rte_eth_dev structure.
4375 * 0 on success, negative errno value on failure.
4378 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
4382 if (priv->intr_conf.lsc ||
4383 priv->intr_conf.rmv)
4385 ret = rte_intr_callback_unregister(&priv->intr_handle,
4386 mlx4_dev_interrupt_handler,
4389 ERROR("rte_intr_callback_unregister failed with %d"
4391 (errno ? " (errno: " : ""),
4392 (errno ? strerror(errno) : ""),
4393 (errno ? ")" : ""));
4395 priv->intr_handle.fd = 0;
4396 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
4401 * Install interrupt handler.
4404 * Pointer to private structure.
4406 * Pointer to the rte_eth_dev structure.
4408 * 0 on success, negative errno value on failure.
4411 priv_dev_interrupt_handler_install(struct priv *priv,
4412 struct rte_eth_dev *dev)
4417 /* Check whether the interrupt handler has already been installed
4418 * for either type of interrupt
4420 if (priv->intr_conf.lsc &&
4421 priv->intr_conf.rmv &&
4422 priv->intr_handle.fd)
4424 assert(priv->ctx->async_fd > 0);
4425 flags = fcntl(priv->ctx->async_fd, F_GETFL);
4426 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
4428 INFO("failed to change file descriptor async event queue");
4429 dev->data->dev_conf.intr_conf.lsc = 0;
4430 dev->data->dev_conf.intr_conf.rmv = 0;
4433 priv->intr_handle.fd = priv->ctx->async_fd;
4434 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
4435 rc = rte_intr_callback_register(&priv->intr_handle,
4436 mlx4_dev_interrupt_handler,
4439 ERROR("rte_intr_callback_register failed "
4440 " (errno: %s)", strerror(errno));
4448 * Uninstall interrupt handler.
4451 * Pointer to private structure.
4453 * Pointer to the rte_eth_dev structure.
4455 * 0 on success, negative value on error.
4458 priv_dev_removal_interrupt_handler_uninstall(struct priv *priv,
4459 struct rte_eth_dev *dev)
4461 if (dev->data->dev_conf.intr_conf.rmv) {
4462 priv->intr_conf.rmv = 0;
4463 return priv_dev_interrupt_handler_uninstall(priv, dev);
4469 * Uninstall interrupt handler.
4472 * Pointer to private structure.
4474 * Pointer to the rte_eth_dev structure.
4476 * 0 on success, negative value on error,
4479 priv_dev_link_interrupt_handler_uninstall(struct priv *priv,
4480 struct rte_eth_dev *dev)
4484 if (dev->data->dev_conf.intr_conf.lsc) {
4485 priv->intr_conf.lsc = 0;
4486 ret = priv_dev_interrupt_handler_uninstall(priv, dev);
4490 if (priv->pending_alarm)
4491 if (rte_eal_alarm_cancel(mlx4_dev_link_status_handler,
4493 ERROR("rte_eal_alarm_cancel failed "
4494 " (errno: %s)", strerror(rte_errno));
4497 priv->pending_alarm = 0;
4502 * Install link interrupt handler.
4505 * Pointer to private structure.
4507 * Pointer to the rte_eth_dev structure.
4509 * 0 on success, negative value on error.
4512 priv_dev_link_interrupt_handler_install(struct priv *priv,
4513 struct rte_eth_dev *dev)
4517 if (dev->data->dev_conf.intr_conf.lsc) {
4518 ret = priv_dev_interrupt_handler_install(priv, dev);
4521 priv->intr_conf.lsc = 1;
4527 * Install removal interrupt handler.
4530 * Pointer to private structure.
4532 * Pointer to the rte_eth_dev structure.
4534 * 0 on success, negative value on error.
4537 priv_dev_removal_interrupt_handler_install(struct priv *priv,
4538 struct rte_eth_dev *dev)
4542 if (dev->data->dev_conf.intr_conf.rmv) {
4543 ret = priv_dev_interrupt_handler_install(priv, dev);
4546 priv->intr_conf.rmv = 1;
4552 * Allocate queue vector and fill epoll fd list for Rx interrupts.
4555 * Pointer to private structure.
4558 * 0 on success, negative on failure.
4561 priv_rx_intr_vec_enable(struct priv *priv)
4564 unsigned int rxqs_n = priv->rxqs_n;
4565 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
4566 unsigned int count = 0;
4567 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
4569 if (!priv->dev->data->dev_conf.intr_conf.rxq)
4571 priv_rx_intr_vec_disable(priv);
4572 intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
4573 if (intr_handle->intr_vec == NULL) {
4574 ERROR("failed to allocate memory for interrupt vector,"
4575 " Rx interrupts will not be supported");
4578 intr_handle->type = RTE_INTR_HANDLE_EXT;
4579 for (i = 0; i != n; ++i) {
4580 struct rxq *rxq = (*priv->rxqs)[i];
4585 /* Skip queues that cannot request interrupts. */
4586 if (!rxq || !rxq->channel) {
4587 /* Use invalid intr_vec[] index to disable entry. */
4588 intr_handle->intr_vec[i] =
4589 RTE_INTR_VEC_RXTX_OFFSET +
4590 RTE_MAX_RXTX_INTR_VEC_ID;
4593 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
4594 ERROR("too many Rx queues for interrupt vector size"
4595 " (%d), Rx interrupts cannot be enabled",
4596 RTE_MAX_RXTX_INTR_VEC_ID);
4597 priv_rx_intr_vec_disable(priv);
4600 fd = rxq->channel->fd;
4601 flags = fcntl(fd, F_GETFL);
4602 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
4604 ERROR("failed to make Rx interrupt file descriptor"
4605 " %d non-blocking for queue index %d", fd, i);
4606 priv_rx_intr_vec_disable(priv);
4609 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
4610 intr_handle->efds[count] = fd;
4614 priv_rx_intr_vec_disable(priv);
4616 intr_handle->nb_efd = count;
4621 * Clean up Rx interrupts handler.
4624 * Pointer to private structure.
4627 priv_rx_intr_vec_disable(struct priv *priv)
4629 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
4631 rte_intr_free_epoll_fd(intr_handle);
4632 free(intr_handle->intr_vec);
4633 intr_handle->nb_efd = 0;
4634 intr_handle->intr_vec = NULL;
4638 * DPDK callback for Rx queue interrupt enable.
4641 * Pointer to Ethernet device structure.
4646 * 0 on success, negative on failure.
4649 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)
4651 struct priv *priv = dev->data->dev_private;
4652 struct rxq *rxq = (*priv->rxqs)[idx];
4655 if (!rxq || !rxq->channel)
4658 ret = ibv_req_notify_cq(rxq->cq, 0);
4660 WARN("unable to arm interrupt on rx queue %d", idx);
4665 * DPDK callback for Rx queue interrupt disable.
4668 * Pointer to Ethernet device structure.
4673 * 0 on success, negative on failure.
4676 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)
4678 struct priv *priv = dev->data->dev_private;
4679 struct rxq *rxq = (*priv->rxqs)[idx];
4680 struct ibv_cq *ev_cq;
4684 if (!rxq || !rxq->channel) {
4687 ret = ibv_get_cq_event(rxq->cq->channel, &ev_cq, &ev_ctx);
4688 if (ret || ev_cq != rxq->cq)
4692 WARN("unable to disable interrupt on rx queue %d",
4695 ibv_ack_cq_events(rxq->cq, 1);
4700 * Verify and store value for device argument.
4703 * Key argument to verify.
4705 * Value associated with key.
4706 * @param[in, out] conf
4707 * Shared configuration data.
4710 * 0 on success, negative errno value on failure.
4713 mlx4_arg_parse(const char *key, const char *val, struct mlx4_conf *conf)
4718 tmp = strtoul(val, NULL, 0);
4720 WARN("%s: \"%s\" is not a valid integer", key, val);
4723 if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) {
4724 uint32_t ports = rte_log2_u32(conf->ports.present);
4727 ERROR("port index %lu outside range [0,%" PRIu32 ")",
4731 if (!(conf->ports.present & (1 << tmp))) {
4732 ERROR("invalid port index %lu", tmp);
4735 conf->ports.enabled |= 1 << tmp;
4737 WARN("%s: unknown parameter", key);
4744 * Parse device parameters.
4747 * Device arguments structure.
4750 * 0 on success, negative errno value on failure.
4753 mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)
4755 struct rte_kvargs *kvlist;
4756 unsigned int arg_count;
4760 if (devargs == NULL)
4762 kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params);
4763 if (kvlist == NULL) {
4764 ERROR("failed to parse kvargs");
4767 /* Process parameters. */
4768 for (i = 0; pmd_mlx4_init_params[i]; ++i) {
4769 arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);
4770 while (arg_count-- > 0) {
4771 ret = rte_kvargs_process(kvlist,
4772 MLX4_PMD_PORT_KVARG,
4773 (int (*)(const char *,
4783 rte_kvargs_free(kvlist);
4787 static struct rte_pci_driver mlx4_driver;
4790 * DPDK callback to register a PCI device.
4792 * This function creates an Ethernet device for each port of a given
4795 * @param[in] pci_drv
4796 * PCI driver structure (mlx4_driver).
4797 * @param[in] pci_dev
4798 * PCI device information.
4801 * 0 on success, negative errno value on failure.
4804 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
4806 struct ibv_device **list;
4807 struct ibv_device *ibv_dev;
4809 struct ibv_context *attr_ctx = NULL;
4810 struct ibv_device_attr device_attr;
4811 struct mlx4_conf conf = {
4818 assert(pci_drv == &mlx4_driver);
4820 list = ibv_get_device_list(&i);
4823 if (errno == ENOSYS)
4824 ERROR("cannot list devices, is ib_uverbs loaded?");
4829 * For each listed device, check related sysfs entry against
4830 * the provided PCI ID.
4833 struct rte_pci_addr pci_addr;
4836 DEBUG("checking device \"%s\"", list[i]->name);
4837 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
4839 if ((pci_dev->addr.domain != pci_addr.domain) ||
4840 (pci_dev->addr.bus != pci_addr.bus) ||
4841 (pci_dev->addr.devid != pci_addr.devid) ||
4842 (pci_dev->addr.function != pci_addr.function))
4844 vf = (pci_dev->id.device_id ==
4845 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
4846 INFO("PCI information matches, using device \"%s\" (VF: %s)",
4847 list[i]->name, (vf ? "true" : "false"));
4848 attr_ctx = ibv_open_device(list[i]);
4852 if (attr_ctx == NULL) {
4853 ibv_free_device_list(list);
4856 ERROR("cannot access device, is mlx4_ib loaded?");
4859 ERROR("cannot use device, are drivers up to date?");
4867 DEBUG("device opened");
4868 if (ibv_query_device(attr_ctx, &device_attr)) {
4872 INFO("%u port(s) detected", device_attr.phys_port_cnt);
4874 conf.ports.present |= (UINT64_C(1) << device_attr.phys_port_cnt) - 1;
4875 if (mlx4_args(pci_dev->device.devargs, &conf)) {
4876 ERROR("failed to process device arguments");
4880 /* Use all ports when none are defined */
4881 if (!conf.ports.enabled)
4882 conf.ports.enabled = conf.ports.present;
4883 for (i = 0; i < device_attr.phys_port_cnt; i++) {
4884 uint32_t port = i + 1; /* ports are indexed from one */
4885 struct ibv_context *ctx = NULL;
4886 struct ibv_port_attr port_attr;
4887 struct ibv_pd *pd = NULL;
4888 struct priv *priv = NULL;
4889 struct rte_eth_dev *eth_dev = NULL;
4890 struct ibv_exp_device_attr exp_device_attr;
4891 struct ether_addr mac;
4893 /* If port is not enabled, skip. */
4894 if (!(conf.ports.enabled & (1 << i)))
4896 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
4897 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
4899 DEBUG("using port %u", port);
4901 ctx = ibv_open_device(ibv_dev);
4907 /* Check port status. */
4908 err = ibv_query_port(ctx, port, &port_attr);
4910 ERROR("port query failed: %s", strerror(err));
4915 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
4916 ERROR("port %d is not configured in Ethernet mode",
4922 if (port_attr.state != IBV_PORT_ACTIVE)
4923 DEBUG("port %d is not active: \"%s\" (%d)",
4924 port, ibv_port_state_str(port_attr.state),
4927 /* Allocate protection domain. */
4928 pd = ibv_alloc_pd(ctx);
4930 ERROR("PD allocation failure");
4935 /* from rte_ethdev.c */
4936 priv = rte_zmalloc("ethdev private structure",
4938 RTE_CACHE_LINE_SIZE);
4940 ERROR("priv allocation failure");
4946 priv->device_attr = device_attr;
4949 priv->mtu = ETHER_MTU;
4950 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
4951 ERROR("ibv_exp_query_device() failed");
4955 if ((exp_device_attr.exp_device_cap_flags &
4956 IBV_EXP_DEVICE_QPG) &&
4957 (exp_device_attr.exp_device_cap_flags &
4958 IBV_EXP_DEVICE_UD_RSS) &&
4959 (exp_device_attr.comp_mask &
4960 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
4961 (exp_device_attr.max_rss_tbl_sz > 0)) {
4964 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
4968 priv->max_rss_tbl_sz = 0;
4970 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
4971 IBV_EXP_DEVICE_UD_TSS);
4972 DEBUG("device flags: %s%s%s",
4973 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
4974 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
4975 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
4977 DEBUG("maximum RSS indirection table size: %u",
4978 exp_device_attr.max_rss_tbl_sz);
4981 ((exp_device_attr.exp_device_cap_flags &
4982 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
4983 (exp_device_attr.exp_device_cap_flags &
4984 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
4985 DEBUG("checksum offloading is %ssupported",
4986 (priv->hw_csum ? "" : "not "));
4988 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
4989 IBV_EXP_DEVICE_VXLAN_SUPPORT);
4990 DEBUG("L2 tunnel checksum offloads are %ssupported",
4991 (priv->hw_csum_l2tun ? "" : "not "));
4993 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
4995 if (priv->inl_recv_size) {
4996 exp_device_attr.comp_mask =
4997 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
4998 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
4999 INFO("Couldn't query device for inline-receive"
5001 priv->inl_recv_size = 0;
5003 if ((unsigned)exp_device_attr.inline_recv_sz <
5004 priv->inl_recv_size) {
5005 INFO("Max inline-receive (%d) <"
5006 " requested inline-receive (%u)",
5007 exp_device_attr.inline_recv_sz,
5008 priv->inl_recv_size);
5009 priv->inl_recv_size =
5010 exp_device_attr.inline_recv_sz;
5013 INFO("Set inline receive size to %u",
5014 priv->inl_recv_size);
5018 /* Configure the first MAC address by default. */
5019 if (priv_get_mac(priv, &mac.addr_bytes)) {
5020 ERROR("cannot get MAC address, is mlx4_en loaded?"
5021 " (errno: %s)", strerror(errno));
5025 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5027 mac.addr_bytes[0], mac.addr_bytes[1],
5028 mac.addr_bytes[2], mac.addr_bytes[3],
5029 mac.addr_bytes[4], mac.addr_bytes[5]);
5030 /* Register MAC address. */
5032 if (priv_mac_addr_add(priv))
5036 char ifname[IF_NAMESIZE];
5038 if (priv_get_ifname(priv, &ifname) == 0)
5039 DEBUG("port %u ifname is \"%s\"",
5040 priv->port, ifname);
5042 DEBUG("port %u ifname is unknown", priv->port);
5045 /* Get actual MTU if possible. */
5046 priv_get_mtu(priv, &priv->mtu);
5047 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5049 /* from rte_ethdev.c */
5051 char name[RTE_ETH_NAME_MAX_LEN];
5053 snprintf(name, sizeof(name), "%s port %u",
5054 ibv_get_device_name(ibv_dev), port);
5055 eth_dev = rte_eth_dev_allocate(name);
5057 if (eth_dev == NULL) {
5058 ERROR("can not allocate rte ethdev");
5063 eth_dev->data->dev_private = priv;
5064 eth_dev->data->mac_addrs = &priv->mac;
5065 eth_dev->device = &pci_dev->device;
5067 rte_eth_copy_pci_info(eth_dev, pci_dev);
5069 eth_dev->device->driver = &mlx4_driver.driver;
5072 * Copy and override interrupt handle to prevent it from
5073 * being shared between all ethdev instances of a given PCI
5074 * device. This is required to properly handle Rx interrupts
5077 priv->intr_handle_dev = *eth_dev->intr_handle;
5078 eth_dev->intr_handle = &priv->intr_handle_dev;
5080 priv->dev = eth_dev;
5081 eth_dev->dev_ops = &mlx4_dev_ops;
5082 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
5084 /* Bring Ethernet device up. */
5085 DEBUG("forcing Ethernet interface up");
5086 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5087 /* Update link status once if waiting for LSC. */
5088 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
5089 mlx4_link_update(eth_dev, 0);
5095 claim_zero(ibv_dealloc_pd(pd));
5097 claim_zero(ibv_close_device(ctx));
5099 rte_eth_dev_release_port(eth_dev);
5102 if (i == device_attr.phys_port_cnt)
5106 * XXX if something went wrong in the loop above, there is a resource
5107 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5108 * long as the dpdk does not provide a way to deallocate a ethdev and a
5109 * way to enumerate the registered ethdevs to free the previous ones.
5114 claim_zero(ibv_close_device(attr_ctx));
5116 ibv_free_device_list(list);
5121 static const struct rte_pci_id mlx4_pci_id_map[] = {
5123 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5124 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
5127 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5128 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
5131 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5132 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
5139 static struct rte_pci_driver mlx4_driver = {
5141 .name = MLX4_DRIVER_NAME
5143 .id_table = mlx4_pci_id_map,
5144 .probe = mlx4_pci_probe,
5145 .drv_flags = RTE_PCI_DRV_INTR_LSC |
5146 RTE_PCI_DRV_INTR_RMV,
5150 * Driver initialization routine.
5152 RTE_INIT(rte_mlx4_pmd_init);
5154 rte_mlx4_pmd_init(void)
5156 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5158 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5159 * huge pages. Calling ibv_fork_init() during init allows
5160 * applications to use fork() safely for purposes other than
5161 * using this PMD, which is not supported in forked processes.
5163 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5165 rte_pci_register(&mlx4_driver);
5168 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
5169 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
5170 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
5171 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");