4 * Copyright 2012-2015 6WIND S.A.
5 * Copyright 2012 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
58 #include <linux/ethtool.h>
59 #include <linux/sockios.h>
63 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
65 #pragma GCC diagnostic ignored "-pedantic"
67 #include <infiniband/verbs.h>
69 #pragma GCC diagnostic error "-pedantic"
72 /* DPDK headers don't like -pedantic. */
74 #pragma GCC diagnostic ignored "-pedantic"
76 #include <rte_ether.h>
77 #include <rte_ethdev.h>
80 #include <rte_errno.h>
81 #include <rte_mempool.h>
82 #include <rte_prefetch.h>
83 #include <rte_malloc.h>
84 #include <rte_spinlock.h>
85 #include <rte_atomic.h>
86 #include <rte_version.h>
88 #include <rte_alarm.h>
90 #pragma GCC diagnostic error "-pedantic"
93 /* Generated configuration header. */
94 #include "mlx4_autoconf.h"
99 /* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
100 * Intermediate LOG_*() macros add the required end-of-line characters. */
102 #define INFO(...) DEBUG(__VA_ARGS__)
103 #define WARN(...) DEBUG(__VA_ARGS__)
104 #define ERROR(...) DEBUG(__VA_ARGS__)
106 #define LOG__(level, m, ...) \
107 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
108 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
109 #define INFO(...) LOG_(INFO, __VA_ARGS__)
110 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
111 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
114 /* Convenience macros for accessing mbuf fields. */
115 #define NEXT(m) ((m)->next)
116 #define DATA_LEN(m) ((m)->data_len)
117 #define PKT_LEN(m) ((m)->pkt_len)
118 #define DATA_OFF(m) ((m)->data_off)
119 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
120 #define NB_SEGS(m) ((m)->nb_segs)
121 #define PORT(m) ((m)->port)
123 /* Work Request ID data type (64 bit). */
132 #define WR_ID(o) (((wr_id_t *)&(o))->data)
134 /* Transpose flags. Useful to convert IBV to DPDK flags. */
135 #define TRANSPOSE(val, from, to) \
136 (((from) >= (to)) ? \
137 (((val) & (from)) / ((from) / (to))) : \
138 (((val) & (from)) * ((to) / (from))))
140 struct mlx4_rxq_stats {
141 unsigned int idx; /**< Mapping index. */
142 #ifdef MLX4_PMD_SOFT_COUNTERS
143 uint64_t ipackets; /**< Total of successfully received packets. */
144 uint64_t ibytes; /**< Total of successfully received bytes. */
146 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
147 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
150 struct mlx4_txq_stats {
151 unsigned int idx; /**< Mapping index. */
152 #ifdef MLX4_PMD_SOFT_COUNTERS
153 uint64_t opackets; /**< Total of successfully sent packets. */
154 uint64_t obytes; /**< Total of successfully sent bytes. */
156 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
159 /* RX element (scattered packets). */
161 struct ibv_recv_wr wr; /* Work Request. */
162 struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
163 struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
168 struct ibv_recv_wr wr; /* Work Request. */
169 struct ibv_sge sge; /* Scatter/Gather Element. */
170 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
173 /* RX queue descriptor. */
175 struct priv *priv; /* Back pointer to private data. */
176 struct rte_mempool *mp; /* Memory Pool for allocations. */
177 struct ibv_mr *mr; /* Memory Region (for mp). */
178 struct ibv_cq *cq; /* Completion Queue. */
179 struct ibv_qp *qp; /* Queue Pair. */
180 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
181 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
183 * Each VLAN ID requires a separate flow steering rule.
185 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
186 struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
187 struct ibv_flow *promisc_flow; /* Promiscuous flow. */
188 struct ibv_flow *allmulti_flow; /* Multicast flow. */
189 unsigned int port_id; /* Port ID for incoming packets. */
190 unsigned int elts_n; /* (*elts)[] length. */
191 unsigned int elts_head; /* Current index in (*elts)[]. */
193 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
194 struct rxq_elt (*no_sp)[]; /* RX elements. */
196 unsigned int sp:1; /* Use scattered RX elements. */
197 unsigned int csum:1; /* Enable checksum offloading. */
198 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
199 uint32_t mb_len; /* Length of a mp-issued mbuf. */
200 struct mlx4_rxq_stats stats; /* RX queue counters. */
201 unsigned int socket; /* CPU socket ID for allocations. */
202 struct ibv_exp_res_domain *rd; /* Resource Domain. */
207 struct rte_mbuf *buf;
210 /* Linear buffer type. It is used when transmitting buffers with too many
211 * segments that do not fit the hardware queue (see max_send_sge).
212 * Extra segments are copied (linearized) in such buffers, replacing the
213 * last SGE during TX.
214 * The size is arbitrary but large enough to hold a jumbo frame with
215 * 8 segments considering mbuf.buf_len is about 2048 bytes. */
216 typedef uint8_t linear_t[16384];
218 /* TX queue descriptor. */
220 struct priv *priv; /* Back pointer to private data. */
222 const struct rte_mempool *mp; /* Cached Memory Pool. */
223 struct ibv_mr *mr; /* Memory Region (for mp). */
224 uint32_t lkey; /* mr->lkey */
225 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
226 struct ibv_cq *cq; /* Completion Queue. */
227 struct ibv_qp *qp; /* Queue Pair. */
228 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
229 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
230 #if MLX4_PMD_MAX_INLINE > 0
231 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
233 unsigned int elts_n; /* (*elts)[] length. */
234 struct txq_elt (*elts)[]; /* TX elements. */
235 unsigned int elts_head; /* Current index in (*elts)[]. */
236 unsigned int elts_tail; /* First element awaiting completion. */
237 unsigned int elts_comp; /* Number of completion requests. */
238 unsigned int elts_comp_cd; /* Countdown for next completion request. */
239 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
240 struct mlx4_txq_stats stats; /* TX queue counters. */
241 linear_t (*elts_linear)[]; /* Linearized buffers. */
242 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
243 unsigned int socket; /* CPU socket ID for allocations. */
244 struct ibv_exp_res_domain *rd; /* Resource Domain. */
248 struct rte_eth_dev *dev; /* Ethernet device. */
249 struct ibv_context *ctx; /* Verbs context. */
250 struct ibv_device_attr device_attr; /* Device properties. */
251 struct ibv_pd *pd; /* Protection Domain. */
253 * MAC addresses array and configuration bit-field.
254 * An extra entry that cannot be modified by the DPDK is reserved
255 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
257 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
258 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
261 unsigned int enabled:1; /* If enabled. */
262 unsigned int id:12; /* VLAN ID (0-4095). */
263 } vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
264 /* Device properties. */
265 uint16_t mtu; /* Configured MTU. */
266 uint8_t port; /* Physical port number. */
267 unsigned int started:1; /* Device started, flows enabled. */
268 unsigned int promisc:1; /* Device in promiscuous mode. */
269 unsigned int allmulti:1; /* Device receives all multicast packets. */
270 unsigned int hw_qpg:1; /* QP groups are supported. */
271 unsigned int hw_tss:1; /* TSS is supported. */
272 unsigned int hw_rss:1; /* RSS is supported. */
273 unsigned int hw_csum:1; /* Checksum offload is supported. */
274 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
275 unsigned int rss:1; /* RSS is enabled. */
276 unsigned int vf:1; /* This is a VF device. */
277 unsigned int pending_alarm:1; /* An alarm is pending. */
279 unsigned int inl_recv_size; /* Inline recv size */
281 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
283 struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
284 unsigned int rxqs_n; /* RX queues array size. */
285 unsigned int txqs_n; /* TX queues array size. */
286 struct rxq *(*rxqs)[]; /* RX queues. */
287 struct txq *(*txqs)[]; /* TX queues. */
288 struct rte_intr_handle intr_handle; /* Interrupt handler. */
289 rte_spinlock_t lock; /* Lock for control functions. */
292 /* Local storage for secondary process data. */
293 struct mlx4_secondary_data {
294 struct rte_eth_dev_data data; /* Local device data. */
295 struct priv *primary_priv; /* Private structure from primary. */
296 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
297 rte_spinlock_t lock; /* Port configuration lock. */
298 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
301 * Check if running as a secondary process.
304 * Nonzero if running as a secondary process.
307 mlx4_is_secondary(void)
309 return rte_eal_process_type() != RTE_PROC_PRIMARY;
313 * Return private structure associated with an Ethernet device.
316 * Pointer to Ethernet device structure.
319 * Pointer to private structure.
322 mlx4_get_priv(struct rte_eth_dev *dev)
324 struct mlx4_secondary_data *sd;
326 if (!mlx4_is_secondary())
327 return dev->data->dev_private;
328 sd = &mlx4_secondary_data[dev->data->port_id];
329 return sd->data.dev_private;
333 * Lock private structure to protect it from concurrent access in the
337 * Pointer to private structure.
340 priv_lock(struct priv *priv)
342 rte_spinlock_lock(&priv->lock);
346 * Unlock private structure.
349 * Pointer to private structure.
352 priv_unlock(struct priv *priv)
354 rte_spinlock_unlock(&priv->lock);
357 /* Allocate a buffer on the stack and fill it with a printf format string. */
358 #define MKSTR(name, ...) \
359 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
361 snprintf(name, sizeof(name), __VA_ARGS__)
364 * Get interface name from private structure.
367 * Pointer to private structure.
369 * Interface name output buffer.
372 * 0 on success, -1 on failure and errno is set.
375 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
379 unsigned int dev_type = 0;
380 unsigned int dev_port_prev = ~0u;
381 char match[IF_NAMESIZE] = "";
384 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
390 while ((dent = readdir(dir)) != NULL) {
391 char *name = dent->d_name;
393 unsigned int dev_port;
396 if ((name[0] == '.') &&
397 ((name[1] == '\0') ||
398 ((name[1] == '.') && (name[2] == '\0'))))
401 MKSTR(path, "%s/device/net/%s/%s",
402 priv->ctx->device->ibdev_path, name,
403 (dev_type ? "dev_id" : "dev_port"));
405 file = fopen(path, "rb");
410 * Switch to dev_id when dev_port does not exist as
411 * is the case with Linux kernel versions < 3.15.
422 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
427 * Switch to dev_id when dev_port returns the same value for
428 * all ports. May happen when using a MOFED release older than
429 * 3.0 with a Linux kernel >= 3.15.
431 if (dev_port == dev_port_prev)
433 dev_port_prev = dev_port;
434 if (dev_port == (priv->port - 1u))
435 snprintf(match, sizeof(match), "%s", name);
438 if (match[0] == '\0')
440 strncpy(*ifname, match, sizeof(*ifname));
445 * Read from sysfs entry.
448 * Pointer to private structure.
450 * Entry name relative to sysfs path.
452 * Data output buffer.
457 * 0 on success, -1 on failure and errno is set.
460 priv_sysfs_read(const struct priv *priv, const char *entry,
461 char *buf, size_t size)
463 char ifname[IF_NAMESIZE];
468 if (priv_get_ifname(priv, &ifname))
471 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
474 file = fopen(path, "rb");
477 ret = fread(buf, 1, size, file);
479 if (((size_t)ret < size) && (ferror(file)))
489 * Write to sysfs entry.
492 * Pointer to private structure.
494 * Entry name relative to sysfs path.
501 * 0 on success, -1 on failure and errno is set.
504 priv_sysfs_write(const struct priv *priv, const char *entry,
505 char *buf, size_t size)
507 char ifname[IF_NAMESIZE];
512 if (priv_get_ifname(priv, &ifname))
515 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
518 file = fopen(path, "wb");
521 ret = fwrite(buf, 1, size, file);
523 if (((size_t)ret < size) || (ferror(file)))
533 * Get unsigned long sysfs property.
536 * Pointer to private structure.
538 * Entry name relative to sysfs path.
540 * Value output buffer.
543 * 0 on success, -1 on failure and errno is set.
546 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
549 unsigned long value_ret;
552 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
554 DEBUG("cannot read %s value from sysfs: %s",
555 name, strerror(errno));
558 value_str[ret] = '\0';
560 value_ret = strtoul(value_str, NULL, 0);
562 DEBUG("invalid %s value `%s': %s", name, value_str,
571 * Set unsigned long sysfs property.
574 * Pointer to private structure.
576 * Entry name relative to sysfs path.
581 * 0 on success, -1 on failure and errno is set.
584 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
587 MKSTR(value_str, "%lu", value);
589 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
591 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
592 name, value_str, value, strerror(errno));
599 * Perform ifreq ioctl() on associated Ethernet device.
602 * Pointer to private structure.
604 * Request number to pass to ioctl().
606 * Interface request structure output buffer.
609 * 0 on success, -1 on failure and errno is set.
612 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
614 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
619 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
620 ret = ioctl(sock, req, ifr);
629 * Pointer to private structure.
631 * MTU value output buffer.
634 * 0 on success, -1 on failure and errno is set.
637 priv_get_mtu(struct priv *priv, uint16_t *mtu)
639 unsigned long ulong_mtu;
641 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
651 * Pointer to private structure.
656 * 0 on success, -1 on failure and errno is set.
659 priv_set_mtu(struct priv *priv, uint16_t mtu)
661 return priv_set_sysfs_ulong(priv, "mtu", mtu);
668 * Pointer to private structure.
670 * Bitmask for flags that must remain untouched.
672 * Bitmask for flags to modify.
675 * 0 on success, -1 on failure and errno is set.
678 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
682 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
686 return priv_set_sysfs_ulong(priv, "flags", tmp);
689 /* Device configuration. */
692 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
693 unsigned int socket, const struct rte_eth_txconf *conf);
696 txq_cleanup(struct txq *txq);
699 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
700 unsigned int socket, const struct rte_eth_rxconf *conf,
701 struct rte_mempool *mp);
704 rxq_cleanup(struct rxq *rxq);
707 * Ethernet device configuration.
709 * Prepare the driver for a given number of TX and RX queues.
710 * Allocate parent RSS queue when several RX queues are requested.
713 * Pointer to Ethernet device structure.
716 * 0 on success, errno value on failure.
719 dev_configure(struct rte_eth_dev *dev)
721 struct priv *priv = dev->data->dev_private;
722 unsigned int rxqs_n = dev->data->nb_rx_queues;
723 unsigned int txqs_n = dev->data->nb_tx_queues;
727 priv->rxqs = (void *)dev->data->rx_queues;
728 priv->txqs = (void *)dev->data->tx_queues;
729 if (txqs_n != priv->txqs_n) {
730 INFO("%p: TX queues number update: %u -> %u",
731 (void *)dev, priv->txqs_n, txqs_n);
732 priv->txqs_n = txqs_n;
734 if (rxqs_n == priv->rxqs_n)
736 if ((rxqs_n & (rxqs_n - 1)) != 0) {
737 ERROR("%p: invalid number of RX queues (%u),"
738 " must be a power of 2",
739 (void *)dev, rxqs_n);
742 INFO("%p: RX queues number update: %u -> %u",
743 (void *)dev, priv->rxqs_n, rxqs_n);
744 /* If RSS is enabled, disable it first. */
748 /* Only if there are no remaining child RX queues. */
749 for (i = 0; (i != priv->rxqs_n); ++i)
750 if ((*priv->rxqs)[i] != NULL)
752 rxq_cleanup(&priv->rxq_parent);
757 /* Nothing else to do. */
758 priv->rxqs_n = rxqs_n;
761 /* Allocate a new RSS parent queue if supported by hardware. */
763 ERROR("%p: only a single RX queue can be configured when"
764 " hardware doesn't support RSS",
768 /* Fail if hardware doesn't support that many RSS queues. */
769 if (rxqs_n >= priv->max_rss_tbl_sz) {
770 ERROR("%p: only %u RX queues can be configured for RSS",
771 (void *)dev, priv->max_rss_tbl_sz);
776 priv->rxqs_n = rxqs_n;
777 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, NULL, NULL);
780 /* Failure, rollback. */
788 * DPDK callback for Ethernet device configuration.
791 * Pointer to Ethernet device structure.
794 * 0 on success, negative errno value on failure.
797 mlx4_dev_configure(struct rte_eth_dev *dev)
799 struct priv *priv = dev->data->dev_private;
802 if (mlx4_is_secondary())
803 return -E_RTE_SECONDARY;
805 ret = dev_configure(dev);
811 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
812 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
815 * Configure secondary process queues from a private data pointer (primary
816 * or secondary) and update burst callbacks. Can take place only once.
818 * All queues must have been previously created by the primary process to
819 * avoid undefined behavior.
822 * Private data pointer from either primary or secondary process.
825 * Private data pointer from secondary process, NULL in case of error.
828 mlx4_secondary_data_setup(struct priv *priv)
830 unsigned int port_id = 0;
831 struct mlx4_secondary_data *sd;
834 unsigned int nb_tx_queues;
835 unsigned int nb_rx_queues;
838 /* priv must be valid at this point. */
839 assert(priv != NULL);
840 /* priv->dev must also be valid but may point to local memory from
841 * another process, possibly with the same address and must not
842 * be dereferenced yet. */
843 assert(priv->dev != NULL);
844 /* Determine port ID by finding out where priv comes from. */
846 sd = &mlx4_secondary_data[port_id];
847 rte_spinlock_lock(&sd->lock);
848 /* Primary process? */
849 if (sd->primary_priv == priv)
851 /* Secondary process? */
852 if (sd->data.dev_private == priv)
854 rte_spinlock_unlock(&sd->lock);
855 if (++port_id == RTE_DIM(mlx4_secondary_data))
858 /* Switch to secondary private structure. If private data has already
859 * been updated by another thread, there is nothing else to do. */
860 priv = sd->data.dev_private;
861 if (priv->dev->data == &sd->data)
863 /* Sanity checks. Secondary private structure is supposed to point
864 * to local eth_dev, itself still pointing to the shared device data
865 * structure allocated by the primary process. */
866 assert(sd->shared_dev_data != &sd->data);
867 assert(sd->data.nb_tx_queues == 0);
868 assert(sd->data.tx_queues == NULL);
869 assert(sd->data.nb_rx_queues == 0);
870 assert(sd->data.rx_queues == NULL);
871 assert(priv != sd->primary_priv);
872 assert(priv->dev->data == sd->shared_dev_data);
873 assert(priv->txqs_n == 0);
874 assert(priv->txqs == NULL);
875 assert(priv->rxqs_n == 0);
876 assert(priv->rxqs == NULL);
877 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
878 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
879 /* Allocate local storage for queues. */
880 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
881 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
882 RTE_CACHE_LINE_SIZE);
883 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
884 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
885 RTE_CACHE_LINE_SIZE);
886 if (tx_queues == NULL || rx_queues == NULL)
888 /* Lock to prevent control operations during setup. */
891 for (i = 0; i != nb_tx_queues; ++i) {
892 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
895 if (primary_txq == NULL)
897 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
898 primary_txq->socket);
900 if (txq_setup(priv->dev,
902 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
905 txq->stats.idx = primary_txq->stats.idx;
912 txq = tx_queues[--i];
919 for (i = 0; i != nb_rx_queues; ++i) {
920 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
922 if (primary_rxq == NULL)
924 /* Not supported yet. */
927 /* Update everything. */
928 priv->txqs = (void *)tx_queues;
929 priv->txqs_n = nb_tx_queues;
930 priv->rxqs = (void *)rx_queues;
931 priv->rxqs_n = nb_rx_queues;
932 sd->data.rx_queues = rx_queues;
933 sd->data.tx_queues = tx_queues;
934 sd->data.nb_rx_queues = nb_rx_queues;
935 sd->data.nb_tx_queues = nb_tx_queues;
936 sd->data.dev_link = sd->shared_dev_data->dev_link;
937 sd->data.mtu = sd->shared_dev_data->mtu;
938 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
939 sizeof(sd->data.rx_queue_state));
940 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
941 sizeof(sd->data.tx_queue_state));
942 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
943 /* Use local data from now on. */
945 priv->dev->data = &sd->data;
947 priv->dev->tx_pkt_burst = mlx4_tx_burst;
948 priv->dev->rx_pkt_burst = removed_rx_burst;
951 /* More sanity checks. */
952 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
953 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
954 assert(priv->dev->data == &sd->data);
955 rte_spinlock_unlock(&sd->lock);
961 rte_spinlock_unlock(&sd->lock);
965 /* TX queues handling. */
968 * Allocate TX queue elements.
971 * Pointer to TX queue structure.
973 * Number of elements to allocate.
976 * 0 on success, errno value on failure.
979 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
982 struct txq_elt (*elts)[elts_n] =
983 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
984 linear_t (*elts_linear)[elts_n] =
985 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
987 struct ibv_mr *mr_linear = NULL;
990 if ((elts == NULL) || (elts_linear == NULL)) {
991 ERROR("%p: can't allocate packets array", (void *)txq);
996 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
997 (IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE));
998 if (mr_linear == NULL) {
999 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
1004 for (i = 0; (i != elts_n); ++i) {
1005 struct txq_elt *elt = &(*elts)[i];
1009 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
1010 txq->elts_n = elts_n;
1015 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
1016 * at least 4 times per ring. */
1017 txq->elts_comp_cd_init =
1018 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
1019 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
1020 txq->elts_comp_cd = txq->elts_comp_cd_init;
1021 txq->elts_linear = elts_linear;
1022 txq->mr_linear = mr_linear;
1026 if (mr_linear != NULL)
1027 claim_zero(ibv_dereg_mr(mr_linear));
1029 rte_free(elts_linear);
1032 DEBUG("%p: failed, freed everything", (void *)txq);
1038 * Free TX queue elements.
1041 * Pointer to TX queue structure.
1044 txq_free_elts(struct txq *txq)
1047 unsigned int elts_n = txq->elts_n;
1048 struct txq_elt (*elts)[elts_n] = txq->elts;
1049 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
1050 struct ibv_mr *mr_linear = txq->mr_linear;
1052 DEBUG("%p: freeing WRs", (void *)txq);
1055 txq->elts_linear = NULL;
1056 txq->mr_linear = NULL;
1057 if (mr_linear != NULL)
1058 claim_zero(ibv_dereg_mr(mr_linear));
1060 rte_free(elts_linear);
1063 for (i = 0; (i != elemof(*elts)); ++i) {
1064 struct txq_elt *elt = &(*elts)[i];
1066 if (elt->buf == NULL)
1068 rte_pktmbuf_free(elt->buf);
1075 * Clean up a TX queue.
1077 * Destroy objects, free allocated memory and reset the structure for reuse.
1080 * Pointer to TX queue structure.
1083 txq_cleanup(struct txq *txq)
1085 struct ibv_exp_release_intf_params params;
1088 DEBUG("cleaning up %p", (void *)txq);
1090 if (txq->if_qp != NULL) {
1091 assert(txq->priv != NULL);
1092 assert(txq->priv->ctx != NULL);
1093 assert(txq->qp != NULL);
1094 params = (struct ibv_exp_release_intf_params){
1097 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1101 if (txq->if_cq != NULL) {
1102 assert(txq->priv != NULL);
1103 assert(txq->priv->ctx != NULL);
1104 assert(txq->cq != NULL);
1105 params = (struct ibv_exp_release_intf_params){
1108 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1112 if (txq->qp != NULL)
1113 claim_zero(ibv_destroy_qp(txq->qp));
1114 if (txq->cq != NULL)
1115 claim_zero(ibv_destroy_cq(txq->cq));
1116 if (txq->rd != NULL) {
1117 struct ibv_exp_destroy_res_domain_attr attr = {
1121 assert(txq->priv != NULL);
1122 assert(txq->priv->ctx != NULL);
1123 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1127 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1128 if (txq->mp2mr[i].mp == NULL)
1130 assert(txq->mp2mr[i].mr != NULL);
1131 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1133 memset(txq, 0, sizeof(*txq));
1137 * Manage TX completions.
1139 * When sending a burst, mlx4_tx_burst() posts several WRs.
1140 * To improve performance, a completion event is only required once every
1141 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1142 * for other WRs, but this information would not be used anyway.
1145 * Pointer to TX queue structure.
1148 * 0 on success, -1 on failure.
1151 txq_complete(struct txq *txq)
1153 unsigned int elts_comp = txq->elts_comp;
1154 unsigned int elts_tail = txq->elts_tail;
1155 const unsigned int elts_n = txq->elts_n;
1158 if (unlikely(elts_comp == 0))
1161 DEBUG("%p: processing %u work requests completions",
1162 (void *)txq, elts_comp);
1164 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1165 if (unlikely(wcs_n == 0))
1167 if (unlikely(wcs_n < 0)) {
1168 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1169 (void *)txq, wcs_n);
1173 assert(elts_comp <= txq->elts_comp);
1175 * Assume WC status is successful as nothing can be done about it
1178 elts_tail += wcs_n * txq->elts_comp_cd_init;
1179 if (elts_tail >= elts_n)
1180 elts_tail -= elts_n;
1181 txq->elts_tail = elts_tail;
1182 txq->elts_comp = elts_comp;
1187 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1188 * the cloned mbuf is allocated is returned instead.
1194 * Memory pool where data is located for given mbuf.
1196 static struct rte_mempool *
1197 txq_mb2mp(struct rte_mbuf *buf)
1199 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1200 return rte_mbuf_from_indirect(buf)->pool;
1205 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1206 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1207 * remove an entry first.
1210 * Pointer to TX queue structure.
1212 * Memory Pool for which a Memory Region lkey must be returned.
1215 * mr->lkey on success, (uint32_t)-1 on failure.
1218 txq_mp2mr(struct txq *txq, const struct rte_mempool *mp)
1223 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1224 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1225 /* Unknown MP, add a new MR for it. */
1228 if (txq->mp2mr[i].mp == mp) {
1229 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1230 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1231 return txq->mp2mr[i].lkey;
1234 /* Add a new entry, register MR first. */
1235 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1236 (void *)txq, mp->name, (const void *)mp);
1237 mr = ibv_reg_mr(txq->priv->pd,
1238 (void *)mp->elt_va_start,
1239 (mp->elt_va_end - mp->elt_va_start),
1240 (IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE));
1241 if (unlikely(mr == NULL)) {
1242 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1244 return (uint32_t)-1;
1246 if (unlikely(i == elemof(txq->mp2mr))) {
1247 /* Table is full, remove oldest entry. */
1248 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1251 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1252 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1253 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1255 /* Store the new entry. */
1256 txq->mp2mr[i].mp = mp;
1257 txq->mp2mr[i].mr = mr;
1258 txq->mp2mr[i].lkey = mr->lkey;
1259 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1260 (void *)txq, mp->name, (const void *)mp, txq->mp2mr[i].lkey);
1261 return txq->mp2mr[i].lkey;
1264 struct txq_mp2mr_mbuf_check_data {
1265 const struct rte_mempool *mp;
1270 * Callback function for rte_mempool_obj_iter() to check whether a given
1271 * mempool object looks like a mbuf.
1273 * @param[in, out] arg
1274 * Context data (struct txq_mp2mr_mbuf_check_data). Contains mempool pointer
1277 * Object start address.
1279 * Object end address.
1284 * Nonzero value when object is not a mbuf.
1287 txq_mp2mr_mbuf_check(void *arg, void *start, void *end,
1288 uint32_t index __rte_unused)
1290 struct txq_mp2mr_mbuf_check_data *data = arg;
1291 struct rte_mbuf *buf =
1292 (void *)((uintptr_t)start + data->mp->header_size);
1295 /* Check whether mbuf structure fits element size and whether mempool
1296 * pointer is valid. */
1297 if (((uintptr_t)end >= (uintptr_t)(buf + 1)) &&
1298 (buf->pool == data->mp))
1305 * Iterator function for rte_mempool_walk() to register existing mempools and
1306 * fill the MP to MR cache of a TX queue.
1309 * Memory Pool to register.
1311 * Pointer to TX queue structure.
1314 txq_mp2mr_iter(const struct rte_mempool *mp, void *arg)
1316 struct txq *txq = arg;
1317 struct txq_mp2mr_mbuf_check_data data = {
1322 /* Discard empty mempools. */
1325 /* Register mempool only if the first element looks like a mbuf. */
1326 rte_mempool_obj_iter((void *)mp->elt_va_start,
1328 mp->header_size + mp->elt_size + mp->trailer_size,
1333 txq_mp2mr_mbuf_check,
1340 #if MLX4_PMD_SGE_WR_N > 1
1343 * Copy scattered mbuf contents to a single linear buffer.
1345 * @param[out] linear
1346 * Linear output buffer.
1348 * Scattered input buffer.
1351 * Number of bytes copied to the output buffer or 0 if not large enough.
1354 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1356 unsigned int size = 0;
1357 unsigned int offset;
1360 unsigned int len = DATA_LEN(buf);
1364 if (unlikely(size > sizeof(*linear)))
1366 memcpy(&(*linear)[offset],
1367 rte_pktmbuf_mtod(buf, uint8_t *),
1370 } while (buf != NULL);
1375 * Handle scattered buffers for mlx4_tx_burst().
1378 * TX queue structure.
1380 * Number of segments in buf.
1382 * TX queue element to fill.
1384 * Buffer to process.
1386 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1388 * Array filled with SGEs on success.
1391 * A structure containing the processed packet size in bytes and the
1392 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1395 static struct tx_burst_sg_ret {
1396 unsigned int length;
1399 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1400 struct rte_mbuf *buf, unsigned int elts_head,
1401 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1403 unsigned int sent_size = 0;
1407 /* When there are too many segments, extra segments are
1408 * linearized in the last SGE. */
1409 if (unlikely(segs > elemof(*sges))) {
1410 segs = (elemof(*sges) - 1);
1413 /* Update element. */
1415 /* Register segments as SGEs. */
1416 for (j = 0; (j != segs); ++j) {
1417 struct ibv_sge *sge = &(*sges)[j];
1420 /* Retrieve Memory Region key for this memory pool. */
1421 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1422 if (unlikely(lkey == (uint32_t)-1)) {
1423 /* MR does not exist. */
1424 DEBUG("%p: unable to get MP <-> MR association",
1426 /* Clean up TX element. */
1431 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1433 rte_prefetch0((volatile void *)
1434 (uintptr_t)sge->addr);
1435 sge->length = DATA_LEN(buf);
1437 sent_size += sge->length;
1440 /* If buf is not NULL here and is not going to be linearized,
1441 * nb_segs is not valid. */
1443 assert((buf == NULL) || (linearize));
1444 /* Linearize extra segments. */
1446 struct ibv_sge *sge = &(*sges)[segs];
1447 linear_t *linear = &(*txq->elts_linear)[elts_head];
1448 unsigned int size = linearize_mbuf(linear, buf);
1450 assert(segs == (elemof(*sges) - 1));
1452 /* Invalid packet. */
1453 DEBUG("%p: packet too large to be linearized.",
1455 /* Clean up TX element. */
1459 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1460 if (elemof(*sges) == 1) {
1462 struct rte_mbuf *next = NEXT(buf);
1464 rte_pktmbuf_free_seg(buf);
1466 } while (buf != NULL);
1470 sge->addr = (uintptr_t)&(*linear)[0];
1472 sge->lkey = txq->mr_linear->lkey;
1474 /* Include last segment. */
1477 return (struct tx_burst_sg_ret){
1478 .length = sent_size,
1482 return (struct tx_burst_sg_ret){
1488 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1491 * DPDK callback for TX.
1494 * Generic pointer to TX queue structure.
1496 * Packets to transmit.
1498 * Number of packets in array.
1501 * Number of packets successfully transmitted (<= pkts_n).
1504 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1506 struct txq *txq = (struct txq *)dpdk_txq;
1507 unsigned int elts_head = txq->elts_head;
1508 const unsigned int elts_n = txq->elts_n;
1509 unsigned int elts_comp_cd = txq->elts_comp_cd;
1510 unsigned int elts_comp = 0;
1515 assert(elts_comp_cd != 0);
1517 max = (elts_n - (elts_head - txq->elts_tail));
1521 assert(max <= elts_n);
1522 /* Always leave one free entry in the ring. */
1528 for (i = 0; (i != max); ++i) {
1529 struct rte_mbuf *buf = pkts[i];
1530 unsigned int elts_head_next =
1531 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1532 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1533 struct txq_elt *elt = &(*txq->elts)[elts_head];
1534 unsigned int segs = NB_SEGS(buf);
1535 #ifdef MLX4_PMD_SOFT_COUNTERS
1536 unsigned int sent_size = 0;
1538 uint32_t send_flags = 0;
1540 /* Clean up old buffer. */
1541 if (likely(elt->buf != NULL)) {
1542 struct rte_mbuf *tmp = elt->buf;
1544 /* Faster than rte_pktmbuf_free(). */
1546 struct rte_mbuf *next = NEXT(tmp);
1548 rte_pktmbuf_free_seg(tmp);
1550 } while (tmp != NULL);
1552 /* Request TX completion. */
1553 if (unlikely(--elts_comp_cd == 0)) {
1554 elts_comp_cd = txq->elts_comp_cd_init;
1556 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1558 /* Should we enable HW CKSUM offload */
1560 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1561 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1562 /* HW does not support checksum offloads at arbitrary
1563 * offsets but automatically recognizes the packet
1564 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1565 * tunnels are currently supported. */
1566 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1567 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1569 if (likely(segs == 1)) {
1574 /* Retrieve buffer information. */
1575 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1576 length = DATA_LEN(buf);
1577 /* Retrieve Memory Region key for this memory pool. */
1578 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1579 if (unlikely(lkey == (uint32_t)-1)) {
1580 /* MR does not exist. */
1581 DEBUG("%p: unable to get MP <-> MR"
1582 " association", (void *)txq);
1583 /* Clean up TX element. */
1587 /* Update element. */
1590 rte_prefetch0((volatile void *)
1592 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1593 /* Put packet into send queue. */
1594 #if MLX4_PMD_MAX_INLINE > 0
1595 if (length <= txq->max_inline)
1596 err = txq->if_qp->send_pending_inline
1603 err = txq->if_qp->send_pending
1611 #ifdef MLX4_PMD_SOFT_COUNTERS
1612 sent_size += length;
1615 #if MLX4_PMD_SGE_WR_N > 1
1616 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1617 struct tx_burst_sg_ret ret;
1619 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1621 if (ret.length == (unsigned int)-1)
1623 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1624 /* Put SG list into send queue. */
1625 err = txq->if_qp->send_pending_sg_list
1632 #ifdef MLX4_PMD_SOFT_COUNTERS
1633 sent_size += ret.length;
1635 #else /* MLX4_PMD_SGE_WR_N > 1 */
1636 DEBUG("%p: TX scattered buffers support not"
1637 " compiled in", (void *)txq);
1639 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1641 elts_head = elts_head_next;
1642 #ifdef MLX4_PMD_SOFT_COUNTERS
1643 /* Increment sent bytes counter. */
1644 txq->stats.obytes += sent_size;
1648 /* Take a shortcut if nothing must be sent. */
1649 if (unlikely(i == 0))
1651 #ifdef MLX4_PMD_SOFT_COUNTERS
1652 /* Increment sent packets counter. */
1653 txq->stats.opackets += i;
1655 /* Ring QP doorbell. */
1656 err = txq->if_qp->send_flush(txq->qp);
1657 if (unlikely(err)) {
1658 /* A nonzero value is not supposed to be returned.
1659 * Nothing can be done about it. */
1660 DEBUG("%p: send_flush() failed with error %d",
1663 txq->elts_head = elts_head;
1664 txq->elts_comp += elts_comp;
1665 txq->elts_comp_cd = elts_comp_cd;
1670 * DPDK callback for TX in secondary processes.
1672 * This function configures all queues from primary process information
1673 * if necessary before reverting to the normal TX burst callback.
1676 * Generic pointer to TX queue structure.
1678 * Packets to transmit.
1680 * Number of packets in array.
1683 * Number of packets successfully transmitted (<= pkts_n).
1686 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1689 struct txq *txq = dpdk_txq;
1690 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1691 struct priv *primary_priv;
1697 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1698 /* Look for queue index in both private structures. */
1699 for (index = 0; index != priv->txqs_n; ++index)
1700 if (((*primary_priv->txqs)[index] == txq) ||
1701 ((*priv->txqs)[index] == txq))
1703 if (index == priv->txqs_n)
1705 txq = (*priv->txqs)[index];
1706 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1710 * Configure a TX queue.
1713 * Pointer to Ethernet device structure.
1715 * Pointer to TX queue structure.
1717 * Number of descriptors to configure in queue.
1719 * NUMA socket on which memory must be allocated.
1721 * Thresholds parameters.
1724 * 0 on success, errno value on failure.
1727 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1728 unsigned int socket, const struct rte_eth_txconf *conf)
1730 struct priv *priv = mlx4_get_priv(dev);
1736 struct ibv_exp_query_intf_params params;
1737 struct ibv_exp_qp_init_attr init;
1738 struct ibv_exp_res_domain_init_attr rd;
1739 struct ibv_exp_cq_init_attr cq;
1740 struct ibv_exp_qp_attr mod;
1742 enum ibv_exp_query_intf_status status;
1745 (void)conf; /* Thresholds configuration (ignored). */
1748 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1749 ERROR("%p: invalid number of TX descriptors (must be a"
1750 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1753 desc /= MLX4_PMD_SGE_WR_N;
1754 /* MRs will be registered in mp2mr[] later. */
1755 attr.rd = (struct ibv_exp_res_domain_init_attr){
1756 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1757 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1758 .thread_model = IBV_EXP_THREAD_SINGLE,
1759 .msg_model = IBV_EXP_MSG_HIGH_BW,
1761 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1762 if (tmpl.rd == NULL) {
1764 ERROR("%p: RD creation failure: %s",
1765 (void *)dev, strerror(ret));
1768 attr.cq = (struct ibv_exp_cq_init_attr){
1769 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1770 .res_domain = tmpl.rd,
1772 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1773 if (tmpl.cq == NULL) {
1775 ERROR("%p: CQ creation failure: %s",
1776 (void *)dev, strerror(ret));
1779 DEBUG("priv->device_attr.max_qp_wr is %d",
1780 priv->device_attr.max_qp_wr);
1781 DEBUG("priv->device_attr.max_sge is %d",
1782 priv->device_attr.max_sge);
1783 attr.init = (struct ibv_exp_qp_init_attr){
1784 /* CQ to be associated with the send queue. */
1786 /* CQ to be associated with the receive queue. */
1789 /* Max number of outstanding WRs. */
1790 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1791 priv->device_attr.max_qp_wr :
1793 /* Max number of scatter/gather elements in a WR. */
1794 .max_send_sge = ((priv->device_attr.max_sge <
1795 MLX4_PMD_SGE_WR_N) ?
1796 priv->device_attr.max_sge :
1798 #if MLX4_PMD_MAX_INLINE > 0
1799 .max_inline_data = MLX4_PMD_MAX_INLINE,
1802 .qp_type = IBV_QPT_RAW_PACKET,
1803 /* Do *NOT* enable this, completions events are managed per
1807 .res_domain = tmpl.rd,
1808 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1809 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1811 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1812 if (tmpl.qp == NULL) {
1813 ret = (errno ? errno : EINVAL);
1814 ERROR("%p: QP creation failure: %s",
1815 (void *)dev, strerror(ret));
1818 #if MLX4_PMD_MAX_INLINE > 0
1819 /* ibv_create_qp() updates this value. */
1820 tmpl.max_inline = attr.init.cap.max_inline_data;
1822 attr.mod = (struct ibv_exp_qp_attr){
1823 /* Move the QP to this state. */
1824 .qp_state = IBV_QPS_INIT,
1825 /* Primary port number. */
1826 .port_num = priv->port
1828 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1829 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1831 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1832 (void *)dev, strerror(ret));
1835 ret = txq_alloc_elts(&tmpl, desc);
1837 ERROR("%p: TXQ allocation failed: %s",
1838 (void *)dev, strerror(ret));
1841 attr.mod = (struct ibv_exp_qp_attr){
1842 .qp_state = IBV_QPS_RTR
1844 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1846 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1847 (void *)dev, strerror(ret));
1850 attr.mod.qp_state = IBV_QPS_RTS;
1851 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1853 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1854 (void *)dev, strerror(ret));
1857 attr.params = (struct ibv_exp_query_intf_params){
1858 .intf_scope = IBV_EXP_INTF_GLOBAL,
1859 .intf = IBV_EXP_INTF_CQ,
1862 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1863 if (tmpl.if_cq == NULL) {
1864 ERROR("%p: CQ interface family query failed with status %d",
1865 (void *)dev, status);
1868 attr.params = (struct ibv_exp_query_intf_params){
1869 .intf_scope = IBV_EXP_INTF_GLOBAL,
1870 .intf = IBV_EXP_INTF_QP_BURST,
1872 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1873 /* MC loopback must be disabled when not using a VF. */
1876 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1880 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1881 if (tmpl.if_qp == NULL) {
1882 ERROR("%p: QP interface family query failed with status %d",
1883 (void *)dev, status);
1886 /* Clean up txq in case we're reinitializing it. */
1887 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1890 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1891 /* Pre-register known mempools. */
1892 rte_mempool_walk(txq_mp2mr_iter, txq);
1902 * DPDK callback to configure a TX queue.
1905 * Pointer to Ethernet device structure.
1909 * Number of descriptors to configure in queue.
1911 * NUMA socket on which memory must be allocated.
1913 * Thresholds parameters.
1916 * 0 on success, negative errno value on failure.
1919 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1920 unsigned int socket, const struct rte_eth_txconf *conf)
1922 struct priv *priv = dev->data->dev_private;
1923 struct txq *txq = (*priv->txqs)[idx];
1926 if (mlx4_is_secondary())
1927 return -E_RTE_SECONDARY;
1929 DEBUG("%p: configuring queue %u for %u descriptors",
1930 (void *)dev, idx, desc);
1931 if (idx >= priv->txqs_n) {
1932 ERROR("%p: queue index out of range (%u >= %u)",
1933 (void *)dev, idx, priv->txqs_n);
1938 DEBUG("%p: reusing already allocated queue index %u (%p)",
1939 (void *)dev, idx, (void *)txq);
1940 if (priv->started) {
1944 (*priv->txqs)[idx] = NULL;
1947 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1949 ERROR("%p: unable to allocate queue index %u",
1955 ret = txq_setup(dev, txq, desc, socket, conf);
1959 txq->stats.idx = idx;
1960 DEBUG("%p: adding TX queue %p to list",
1961 (void *)dev, (void *)txq);
1962 (*priv->txqs)[idx] = txq;
1963 /* Update send callback. */
1964 dev->tx_pkt_burst = mlx4_tx_burst;
1971 * DPDK callback to release a TX queue.
1974 * Generic TX queue pointer.
1977 mlx4_tx_queue_release(void *dpdk_txq)
1979 struct txq *txq = (struct txq *)dpdk_txq;
1983 if (mlx4_is_secondary())
1989 for (i = 0; (i != priv->txqs_n); ++i)
1990 if ((*priv->txqs)[i] == txq) {
1991 DEBUG("%p: removing TX queue %p from list",
1992 (void *)priv->dev, (void *)txq);
1993 (*priv->txqs)[i] = NULL;
2001 /* RX queues handling. */
2004 * Allocate RX queue elements with scattered packets support.
2007 * Pointer to RX queue structure.
2009 * Number of elements to allocate.
2011 * If not NULL, fetch buffers from this array instead of allocating them
2012 * with rte_pktmbuf_alloc().
2015 * 0 on success, errno value on failure.
2018 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2019 struct rte_mbuf **pool)
2022 struct rxq_elt_sp (*elts)[elts_n] =
2023 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2028 ERROR("%p: can't allocate packets array", (void *)rxq);
2032 /* For each WR (packet). */
2033 for (i = 0; (i != elts_n); ++i) {
2035 struct rxq_elt_sp *elt = &(*elts)[i];
2036 struct ibv_recv_wr *wr = &elt->wr;
2037 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2039 /* These two arrays must have the same size. */
2040 assert(elemof(elt->sges) == elemof(elt->bufs));
2043 wr->next = &(*elts)[(i + 1)].wr;
2044 wr->sg_list = &(*sges)[0];
2045 wr->num_sge = elemof(*sges);
2046 /* For each SGE (segment). */
2047 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2048 struct ibv_sge *sge = &(*sges)[j];
2049 struct rte_mbuf *buf;
2053 assert(buf != NULL);
2054 rte_pktmbuf_reset(buf);
2056 buf = rte_pktmbuf_alloc(rxq->mp);
2058 assert(pool == NULL);
2059 ERROR("%p: empty mbuf pool", (void *)rxq);
2064 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2065 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2066 /* Buffer is supposed to be empty. */
2067 assert(rte_pktmbuf_data_len(buf) == 0);
2068 assert(rte_pktmbuf_pkt_len(buf) == 0);
2069 /* sge->addr must be able to store a pointer. */
2070 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2072 /* The first SGE keeps its headroom. */
2073 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2074 sge->length = (buf->buf_len -
2075 RTE_PKTMBUF_HEADROOM);
2077 /* Subsequent SGEs lose theirs. */
2078 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2079 SET_DATA_OFF(buf, 0);
2080 sge->addr = (uintptr_t)buf->buf_addr;
2081 sge->length = buf->buf_len;
2083 sge->lkey = rxq->mr->lkey;
2084 /* Redundant check for tailroom. */
2085 assert(sge->length == rte_pktmbuf_tailroom(buf));
2088 /* The last WR pointer must be NULL. */
2089 (*elts)[(i - 1)].wr.next = NULL;
2090 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2091 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2092 rxq->elts_n = elts_n;
2094 rxq->elts.sp = elts;
2099 assert(pool == NULL);
2100 for (i = 0; (i != elemof(*elts)); ++i) {
2102 struct rxq_elt_sp *elt = &(*elts)[i];
2104 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2105 struct rte_mbuf *buf = elt->bufs[j];
2108 rte_pktmbuf_free_seg(buf);
2113 DEBUG("%p: failed, freed everything", (void *)rxq);
2119 * Free RX queue elements with scattered packets support.
2122 * Pointer to RX queue structure.
2125 rxq_free_elts_sp(struct rxq *rxq)
2128 unsigned int elts_n = rxq->elts_n;
2129 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2131 DEBUG("%p: freeing WRs", (void *)rxq);
2133 rxq->elts.sp = NULL;
2136 for (i = 0; (i != elemof(*elts)); ++i) {
2138 struct rxq_elt_sp *elt = &(*elts)[i];
2140 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2141 struct rte_mbuf *buf = elt->bufs[j];
2144 rte_pktmbuf_free_seg(buf);
2151 * Allocate RX queue elements.
2154 * Pointer to RX queue structure.
2156 * Number of elements to allocate.
2158 * If not NULL, fetch buffers from this array instead of allocating them
2159 * with rte_pktmbuf_alloc().
2162 * 0 on success, errno value on failure.
2165 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2168 struct rxq_elt (*elts)[elts_n] =
2169 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2174 ERROR("%p: can't allocate packets array", (void *)rxq);
2178 /* For each WR (packet). */
2179 for (i = 0; (i != elts_n); ++i) {
2180 struct rxq_elt *elt = &(*elts)[i];
2181 struct ibv_recv_wr *wr = &elt->wr;
2182 struct ibv_sge *sge = &(*elts)[i].sge;
2183 struct rte_mbuf *buf;
2187 assert(buf != NULL);
2188 rte_pktmbuf_reset(buf);
2190 buf = rte_pktmbuf_alloc(rxq->mp);
2192 assert(pool == NULL);
2193 ERROR("%p: empty mbuf pool", (void *)rxq);
2197 /* Configure WR. Work request ID contains its own index in
2198 * the elts array and the offset between SGE buffer header and
2200 WR_ID(wr->wr_id).id = i;
2201 WR_ID(wr->wr_id).offset =
2202 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2204 wr->next = &(*elts)[(i + 1)].wr;
2207 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2208 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2209 /* Buffer is supposed to be empty. */
2210 assert(rte_pktmbuf_data_len(buf) == 0);
2211 assert(rte_pktmbuf_pkt_len(buf) == 0);
2212 /* sge->addr must be able to store a pointer. */
2213 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2214 /* SGE keeps its headroom. */
2215 sge->addr = (uintptr_t)
2216 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2217 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2218 sge->lkey = rxq->mr->lkey;
2219 /* Redundant check for tailroom. */
2220 assert(sge->length == rte_pktmbuf_tailroom(buf));
2221 /* Make sure elts index and SGE mbuf pointer can be deduced
2223 if ((WR_ID(wr->wr_id).id != i) ||
2224 ((void *)((uintptr_t)sge->addr -
2225 WR_ID(wr->wr_id).offset) != buf)) {
2226 ERROR("%p: cannot store index and offset in WR ID",
2229 rte_pktmbuf_free(buf);
2234 /* The last WR pointer must be NULL. */
2235 (*elts)[(i - 1)].wr.next = NULL;
2236 DEBUG("%p: allocated and configured %u single-segment WRs",
2237 (void *)rxq, elts_n);
2238 rxq->elts_n = elts_n;
2240 rxq->elts.no_sp = elts;
2245 assert(pool == NULL);
2246 for (i = 0; (i != elemof(*elts)); ++i) {
2247 struct rxq_elt *elt = &(*elts)[i];
2248 struct rte_mbuf *buf;
2250 if (elt->sge.addr == 0)
2252 assert(WR_ID(elt->wr.wr_id).id == i);
2253 buf = (void *)((uintptr_t)elt->sge.addr -
2254 WR_ID(elt->wr.wr_id).offset);
2255 rte_pktmbuf_free_seg(buf);
2259 DEBUG("%p: failed, freed everything", (void *)rxq);
2265 * Free RX queue elements.
2268 * Pointer to RX queue structure.
2271 rxq_free_elts(struct rxq *rxq)
2274 unsigned int elts_n = rxq->elts_n;
2275 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2277 DEBUG("%p: freeing WRs", (void *)rxq);
2279 rxq->elts.no_sp = NULL;
2282 for (i = 0; (i != elemof(*elts)); ++i) {
2283 struct rxq_elt *elt = &(*elts)[i];
2284 struct rte_mbuf *buf;
2286 if (elt->sge.addr == 0)
2288 assert(WR_ID(elt->wr.wr_id).id == i);
2289 buf = (void *)((uintptr_t)elt->sge.addr -
2290 WR_ID(elt->wr.wr_id).offset);
2291 rte_pktmbuf_free_seg(buf);
2297 * Delete flow steering rule.
2300 * Pointer to RX queue structure.
2302 * MAC address index.
2307 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2310 struct priv *priv = rxq->priv;
2311 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2312 (const uint8_t (*)[ETHER_ADDR_LEN])
2313 priv->mac[mac_index].addr_bytes;
2315 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2316 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2317 " (VLAN ID %" PRIu16 ")",
2319 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2320 mac_index, priv->vlan_filter[vlan_index].id);
2321 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2322 rxq->mac_flow[mac_index][vlan_index] = NULL;
2326 * Unregister a MAC address from a RX queue.
2329 * Pointer to RX queue structure.
2331 * MAC address index.
2334 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2336 struct priv *priv = rxq->priv;
2338 unsigned int vlans = 0;
2340 assert(mac_index < elemof(priv->mac));
2341 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2343 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2344 if (!priv->vlan_filter[i].enabled)
2346 rxq_del_flow(rxq, mac_index, i);
2350 rxq_del_flow(rxq, mac_index, 0);
2352 BITFIELD_RESET(rxq->mac_configured, mac_index);
2356 * Unregister all MAC addresses from a RX queue.
2359 * Pointer to RX queue structure.
2362 rxq_mac_addrs_del(struct rxq *rxq)
2364 struct priv *priv = rxq->priv;
2367 for (i = 0; (i != elemof(priv->mac)); ++i)
2368 rxq_mac_addr_del(rxq, i);
2371 static int rxq_promiscuous_enable(struct rxq *);
2372 static void rxq_promiscuous_disable(struct rxq *);
2375 * Add single flow steering rule.
2378 * Pointer to RX queue structure.
2380 * MAC address index to register.
2382 * VLAN index. Use -1 for a flow without VLAN.
2385 * 0 on success, errno value on failure.
2388 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2390 struct ibv_flow *flow;
2391 struct priv *priv = rxq->priv;
2392 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2393 (const uint8_t (*)[ETHER_ADDR_LEN])
2394 priv->mac[mac_index].addr_bytes;
2396 /* Allocate flow specification on the stack. */
2397 struct __attribute__((packed)) {
2398 struct ibv_flow_attr attr;
2399 struct ibv_flow_spec_eth spec;
2401 struct ibv_flow_attr *attr = &data.attr;
2402 struct ibv_flow_spec_eth *spec = &data.spec;
2404 assert(mac_index < elemof(priv->mac));
2405 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2407 * No padding must be inserted by the compiler between attr and spec.
2408 * This layout is expected by libibverbs.
2410 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2411 *attr = (struct ibv_flow_attr){
2412 .type = IBV_FLOW_ATTR_NORMAL,
2417 *spec = (struct ibv_flow_spec_eth){
2418 .type = IBV_FLOW_SPEC_ETH,
2419 .size = sizeof(*spec),
2422 (*mac)[0], (*mac)[1], (*mac)[2],
2423 (*mac)[3], (*mac)[4], (*mac)[5]
2425 .vlan_tag = ((vlan_index != -1u) ?
2426 htons(priv->vlan_filter[vlan_index].id) :
2430 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2431 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2434 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2435 " (VLAN %s %" PRIu16 ")",
2437 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2439 ((vlan_index != -1u) ? "ID" : "index"),
2440 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2441 /* Create related flow. */
2443 flow = ibv_create_flow(rxq->qp, attr);
2445 /* It's not clear whether errno is always set in this case. */
2446 ERROR("%p: flow configuration failed, errno=%d: %s",
2448 (errno ? strerror(errno) : "Unknown error"));
2453 if (vlan_index == -1u)
2455 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2456 rxq->mac_flow[mac_index][vlan_index] = flow;
2461 * Register a MAC address in a RX queue.
2464 * Pointer to RX queue structure.
2466 * MAC address index to register.
2469 * 0 on success, errno value on failure.
2472 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2474 struct priv *priv = rxq->priv;
2476 unsigned int vlans = 0;
2479 assert(mac_index < elemof(priv->mac));
2480 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2481 rxq_mac_addr_del(rxq, mac_index);
2482 /* Fill VLAN specifications. */
2483 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2484 if (!priv->vlan_filter[i].enabled)
2486 /* Create related flow. */
2487 ret = rxq_add_flow(rxq, mac_index, i);
2492 /* Failure, rollback. */
2494 if (priv->vlan_filter[--i].enabled)
2495 rxq_del_flow(rxq, mac_index, i);
2499 /* In case there is no VLAN filter. */
2501 ret = rxq_add_flow(rxq, mac_index, -1);
2505 BITFIELD_SET(rxq->mac_configured, mac_index);
2510 * Register all MAC addresses in a RX queue.
2513 * Pointer to RX queue structure.
2516 * 0 on success, errno value on failure.
2519 rxq_mac_addrs_add(struct rxq *rxq)
2521 struct priv *priv = rxq->priv;
2525 for (i = 0; (i != elemof(priv->mac)); ++i) {
2526 if (!BITFIELD_ISSET(priv->mac_configured, i))
2528 ret = rxq_mac_addr_add(rxq, i);
2531 /* Failure, rollback. */
2533 rxq_mac_addr_del(rxq, --i);
2541 * Unregister a MAC address.
2543 * In RSS mode, the MAC address is unregistered from the parent queue,
2544 * otherwise it is unregistered from each queue directly.
2547 * Pointer to private structure.
2549 * MAC address index.
2552 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2556 assert(mac_index < elemof(priv->mac));
2557 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2560 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2563 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2564 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2566 BITFIELD_RESET(priv->mac_configured, mac_index);
2570 * Register a MAC address.
2572 * In RSS mode, the MAC address is registered in the parent queue,
2573 * otherwise it is registered in each queue directly.
2576 * Pointer to private structure.
2578 * MAC address index to use.
2580 * MAC address to register.
2583 * 0 on success, errno value on failure.
2586 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2587 const uint8_t (*mac)[ETHER_ADDR_LEN])
2592 assert(mac_index < elemof(priv->mac));
2593 /* First, make sure this address isn't already configured. */
2594 for (i = 0; (i != elemof(priv->mac)); ++i) {
2595 /* Skip this index, it's going to be reconfigured. */
2598 if (!BITFIELD_ISSET(priv->mac_configured, i))
2600 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2602 /* Address already configured elsewhere, return with error. */
2605 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2606 priv_mac_addr_del(priv, mac_index);
2607 priv->mac[mac_index] = (struct ether_addr){
2609 (*mac)[0], (*mac)[1], (*mac)[2],
2610 (*mac)[3], (*mac)[4], (*mac)[5]
2613 /* If device isn't started, this is all we need to do. */
2614 if (!priv->started) {
2616 /* Verify that all queues have this index disabled. */
2617 for (i = 0; (i != priv->rxqs_n); ++i) {
2618 if ((*priv->rxqs)[i] == NULL)
2620 assert(!BITFIELD_ISSET
2621 ((*priv->rxqs)[i]->mac_configured, mac_index));
2627 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2632 for (i = 0; (i != priv->rxqs_n); ++i) {
2633 if ((*priv->rxqs)[i] == NULL)
2635 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2638 /* Failure, rollback. */
2640 if ((*priv->rxqs)[(--i)] != NULL)
2641 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2645 BITFIELD_SET(priv->mac_configured, mac_index);
2650 * Enable allmulti mode in a RX queue.
2653 * Pointer to RX queue structure.
2656 * 0 on success, errno value on failure.
2659 rxq_allmulticast_enable(struct rxq *rxq)
2661 struct ibv_flow *flow;
2662 struct ibv_flow_attr attr = {
2663 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2665 .port = rxq->priv->port,
2669 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2670 if (rxq->allmulti_flow != NULL)
2673 flow = ibv_create_flow(rxq->qp, &attr);
2675 /* It's not clear whether errno is always set in this case. */
2676 ERROR("%p: flow configuration failed, errno=%d: %s",
2678 (errno ? strerror(errno) : "Unknown error"));
2683 rxq->allmulti_flow = flow;
2684 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2689 * Disable allmulti mode in a RX queue.
2692 * Pointer to RX queue structure.
2695 rxq_allmulticast_disable(struct rxq *rxq)
2697 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2698 if (rxq->allmulti_flow == NULL)
2700 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2701 rxq->allmulti_flow = NULL;
2702 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2706 * Enable promiscuous mode in a RX queue.
2709 * Pointer to RX queue structure.
2712 * 0 on success, errno value on failure.
2715 rxq_promiscuous_enable(struct rxq *rxq)
2717 struct ibv_flow *flow;
2718 struct ibv_flow_attr attr = {
2719 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2721 .port = rxq->priv->port,
2727 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2728 if (rxq->promisc_flow != NULL)
2731 flow = ibv_create_flow(rxq->qp, &attr);
2733 /* It's not clear whether errno is always set in this case. */
2734 ERROR("%p: flow configuration failed, errno=%d: %s",
2736 (errno ? strerror(errno) : "Unknown error"));
2741 rxq->promisc_flow = flow;
2742 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2747 * Disable promiscuous mode in a RX queue.
2750 * Pointer to RX queue structure.
2753 rxq_promiscuous_disable(struct rxq *rxq)
2757 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2758 if (rxq->promisc_flow == NULL)
2760 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2761 rxq->promisc_flow = NULL;
2762 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2766 * Clean up a RX queue.
2768 * Destroy objects, free allocated memory and reset the structure for reuse.
2771 * Pointer to RX queue structure.
2774 rxq_cleanup(struct rxq *rxq)
2776 struct ibv_exp_release_intf_params params;
2778 DEBUG("cleaning up %p", (void *)rxq);
2780 rxq_free_elts_sp(rxq);
2783 if (rxq->if_qp != NULL) {
2784 assert(rxq->priv != NULL);
2785 assert(rxq->priv->ctx != NULL);
2786 assert(rxq->qp != NULL);
2787 params = (struct ibv_exp_release_intf_params){
2790 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2794 if (rxq->if_cq != NULL) {
2795 assert(rxq->priv != NULL);
2796 assert(rxq->priv->ctx != NULL);
2797 assert(rxq->cq != NULL);
2798 params = (struct ibv_exp_release_intf_params){
2801 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2805 if (rxq->qp != NULL) {
2806 rxq_promiscuous_disable(rxq);
2807 rxq_allmulticast_disable(rxq);
2808 rxq_mac_addrs_del(rxq);
2809 claim_zero(ibv_destroy_qp(rxq->qp));
2811 if (rxq->cq != NULL)
2812 claim_zero(ibv_destroy_cq(rxq->cq));
2813 if (rxq->rd != NULL) {
2814 struct ibv_exp_destroy_res_domain_attr attr = {
2818 assert(rxq->priv != NULL);
2819 assert(rxq->priv->ctx != NULL);
2820 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2824 if (rxq->mr != NULL)
2825 claim_zero(ibv_dereg_mr(rxq->mr));
2826 memset(rxq, 0, sizeof(*rxq));
2830 * Translate RX completion flags to packet type.
2833 * RX completion flags returned by poll_length_flags().
2836 * Packet type for struct rte_mbuf.
2838 static inline uint32_t
2839 rxq_cq_to_pkt_type(uint32_t flags)
2843 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2846 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2848 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET, RTE_PTYPE_L3_IPV6) |
2850 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_INNER_L3_IPV4) |
2852 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_INNER_L3_IPV6);
2856 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2858 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_L3_IPV6);
2863 * Translate RX completion flags to offload flags.
2866 * Pointer to RX queue structure.
2868 * RX completion flags returned by poll_length_flags().
2871 * Offload flags (ol_flags) for struct rte_mbuf.
2873 static inline uint32_t
2874 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2876 uint32_t ol_flags = 0;
2881 IBV_EXP_CQ_RX_IP_CSUM_OK,
2882 PKT_RX_IP_CKSUM_BAD) |
2884 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2885 PKT_RX_L4_CKSUM_BAD);
2887 * PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD are used in place
2888 * of PKT_RX_EIP_CKSUM_BAD because the latter is not functional
2891 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2894 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2895 PKT_RX_IP_CKSUM_BAD) |
2897 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2898 PKT_RX_L4_CKSUM_BAD);
2903 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2906 * DPDK callback for RX with scattered packets support.
2909 * Generic pointer to RX queue structure.
2911 * Array to store received packets.
2913 * Maximum number of packets in array.
2916 * Number of packets successfully received (<= pkts_n).
2919 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2921 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2922 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2923 const unsigned int elts_n = rxq->elts_n;
2924 unsigned int elts_head = rxq->elts_head;
2925 struct ibv_recv_wr head;
2926 struct ibv_recv_wr **next = &head.next;
2927 struct ibv_recv_wr *bad_wr;
2929 unsigned int pkts_ret = 0;
2932 if (unlikely(!rxq->sp))
2933 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2934 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2936 for (i = 0; (i != pkts_n); ++i) {
2937 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2938 struct ibv_recv_wr *wr = &elt->wr;
2939 uint64_t wr_id = wr->wr_id;
2941 unsigned int pkt_buf_len;
2942 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2943 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2944 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2948 /* Sanity checks. */
2952 assert(wr_id < rxq->elts_n);
2953 assert(wr->sg_list == elt->sges);
2954 assert(wr->num_sge == elemof(elt->sges));
2955 assert(elts_head < rxq->elts_n);
2956 assert(rxq->elts_head < rxq->elts_n);
2957 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2959 if (unlikely(ret < 0)) {
2963 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2965 /* ibv_poll_cq() must be used in case of failure. */
2966 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2967 if (unlikely(wcs_n == 0))
2969 if (unlikely(wcs_n < 0)) {
2970 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2971 (void *)rxq, wcs_n);
2975 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2976 /* Whatever, just repost the offending WR. */
2977 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2978 " completion status (%d): %s",
2979 (void *)rxq, wc.wr_id, wc.status,
2980 ibv_wc_status_str(wc.status));
2981 #ifdef MLX4_PMD_SOFT_COUNTERS
2982 /* Increment dropped packets counter. */
2983 ++rxq->stats.idropped;
2985 /* Link completed WRs together for repost. */
2996 /* Link completed WRs together for repost. */
3000 * Replace spent segments with new ones, concatenate and
3001 * return them as pkt_buf.
3004 struct ibv_sge *sge = &elt->sges[j];
3005 struct rte_mbuf *seg = elt->bufs[j];
3006 struct rte_mbuf *rep;
3007 unsigned int seg_tailroom;
3010 * Fetch initial bytes of packet descriptor into a
3011 * cacheline while allocating rep.
3014 rep = __rte_mbuf_raw_alloc(rxq->mp);
3015 if (unlikely(rep == NULL)) {
3017 * Unable to allocate a replacement mbuf,
3020 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3021 " can't allocate a new mbuf",
3022 (void *)rxq, wr_id);
3023 if (pkt_buf != NULL) {
3024 *pkt_buf_next = NULL;
3025 rte_pktmbuf_free(pkt_buf);
3027 /* Increase out of memory counters. */
3028 ++rxq->stats.rx_nombuf;
3029 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3033 /* Poison user-modifiable fields in rep. */
3034 NEXT(rep) = (void *)((uintptr_t)-1);
3035 SET_DATA_OFF(rep, 0xdead);
3036 DATA_LEN(rep) = 0xd00d;
3037 PKT_LEN(rep) = 0xdeadd00d;
3038 NB_SEGS(rep) = 0x2a;
3042 assert(rep->buf_len == seg->buf_len);
3043 assert(rep->buf_len == rxq->mb_len);
3044 /* Reconfigure sge to use rep instead of seg. */
3045 assert(sge->lkey == rxq->mr->lkey);
3046 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3049 /* Update pkt_buf if it's the first segment, or link
3050 * seg to the previous one and update pkt_buf_next. */
3051 *pkt_buf_next = seg;
3052 pkt_buf_next = &NEXT(seg);
3053 /* Update seg information. */
3054 seg_tailroom = (seg->buf_len - seg_headroom);
3055 assert(sge->length == seg_tailroom);
3056 SET_DATA_OFF(seg, seg_headroom);
3057 if (likely(len <= seg_tailroom)) {
3059 DATA_LEN(seg) = len;
3062 assert(rte_pktmbuf_headroom(seg) ==
3064 assert(rte_pktmbuf_tailroom(seg) ==
3065 (seg_tailroom - len));
3068 DATA_LEN(seg) = seg_tailroom;
3069 PKT_LEN(seg) = seg_tailroom;
3071 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3072 assert(rte_pktmbuf_tailroom(seg) == 0);
3073 /* Fix len and clear headroom for next segments. */
3074 len -= seg_tailroom;
3077 /* Update head and tail segments. */
3078 *pkt_buf_next = NULL;
3079 assert(pkt_buf != NULL);
3081 NB_SEGS(pkt_buf) = j;
3082 PORT(pkt_buf) = rxq->port_id;
3083 PKT_LEN(pkt_buf) = pkt_buf_len;
3084 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3085 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3087 /* Return packet. */
3088 *(pkts++) = pkt_buf;
3090 #ifdef MLX4_PMD_SOFT_COUNTERS
3091 /* Increase bytes counter. */
3092 rxq->stats.ibytes += pkt_buf_len;
3095 if (++elts_head >= elts_n)
3099 if (unlikely(i == 0))
3104 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3106 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3107 if (unlikely(ret)) {
3108 /* Inability to repost WRs is fatal. */
3109 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3115 rxq->elts_head = elts_head;
3116 #ifdef MLX4_PMD_SOFT_COUNTERS
3117 /* Increase packets counter. */
3118 rxq->stats.ipackets += pkts_ret;
3124 * DPDK callback for RX.
3126 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3127 * manage scattered packets. Improves performance when MRU is lower than the
3128 * size of the first segment.
3131 * Generic pointer to RX queue structure.
3133 * Array to store received packets.
3135 * Maximum number of packets in array.
3138 * Number of packets successfully received (<= pkts_n).
3141 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3143 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3144 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3145 const unsigned int elts_n = rxq->elts_n;
3146 unsigned int elts_head = rxq->elts_head;
3147 struct ibv_sge sges[pkts_n];
3149 unsigned int pkts_ret = 0;
3152 if (unlikely(rxq->sp))
3153 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3154 for (i = 0; (i != pkts_n); ++i) {
3155 struct rxq_elt *elt = &(*elts)[elts_head];
3156 struct ibv_recv_wr *wr = &elt->wr;
3157 uint64_t wr_id = wr->wr_id;
3159 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3160 WR_ID(wr_id).offset);
3161 struct rte_mbuf *rep;
3164 /* Sanity checks. */
3165 assert(WR_ID(wr_id).id < rxq->elts_n);
3166 assert(wr->sg_list == &elt->sge);
3167 assert(wr->num_sge == 1);
3168 assert(elts_head < rxq->elts_n);
3169 assert(rxq->elts_head < rxq->elts_n);
3171 * Fetch initial bytes of packet descriptor into a
3172 * cacheline while allocating rep.
3175 rte_prefetch0(&seg->cacheline1);
3176 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3178 if (unlikely(ret < 0)) {
3182 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3184 /* ibv_poll_cq() must be used in case of failure. */
3185 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3186 if (unlikely(wcs_n == 0))
3188 if (unlikely(wcs_n < 0)) {
3189 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3190 (void *)rxq, wcs_n);
3194 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3195 /* Whatever, just repost the offending WR. */
3196 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3197 " completion status (%d): %s",
3198 (void *)rxq, wc.wr_id, wc.status,
3199 ibv_wc_status_str(wc.status));
3200 #ifdef MLX4_PMD_SOFT_COUNTERS
3201 /* Increment dropped packets counter. */
3202 ++rxq->stats.idropped;
3204 /* Add SGE to array for repost. */
3213 rep = __rte_mbuf_raw_alloc(rxq->mp);
3214 if (unlikely(rep == NULL)) {
3216 * Unable to allocate a replacement mbuf,
3219 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3220 " can't allocate a new mbuf",
3221 (void *)rxq, WR_ID(wr_id).id);
3222 /* Increase out of memory counters. */
3223 ++rxq->stats.rx_nombuf;
3224 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3228 /* Reconfigure sge to use rep instead of seg. */
3229 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3230 assert(elt->sge.lkey == rxq->mr->lkey);
3231 WR_ID(wr->wr_id).offset =
3232 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3234 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3236 /* Add SGE to array for repost. */
3239 /* Update seg information. */
3240 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3242 PORT(seg) = rxq->port_id;
3245 DATA_LEN(seg) = len;
3246 seg->packet_type = rxq_cq_to_pkt_type(flags);
3247 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3249 /* Return packet. */
3252 #ifdef MLX4_PMD_SOFT_COUNTERS
3253 /* Increase bytes counter. */
3254 rxq->stats.ibytes += len;
3257 if (++elts_head >= elts_n)
3261 if (unlikely(i == 0))
3265 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3267 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3268 if (unlikely(ret)) {
3269 /* Inability to repost WRs is fatal. */
3270 DEBUG("%p: recv_burst(): failed (ret=%d)",
3275 rxq->elts_head = elts_head;
3276 #ifdef MLX4_PMD_SOFT_COUNTERS
3277 /* Increase packets counter. */
3278 rxq->stats.ipackets += pkts_ret;
3284 * DPDK callback for RX in secondary processes.
3286 * This function configures all queues from primary process information
3287 * if necessary before reverting to the normal RX burst callback.
3290 * Generic pointer to RX queue structure.
3292 * Array to store received packets.
3294 * Maximum number of packets in array.
3297 * Number of packets successfully received (<= pkts_n).
3300 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3303 struct rxq *rxq = dpdk_rxq;
3304 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3305 struct priv *primary_priv;
3311 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3312 /* Look for queue index in both private structures. */
3313 for (index = 0; index != priv->rxqs_n; ++index)
3314 if (((*primary_priv->rxqs)[index] == rxq) ||
3315 ((*priv->rxqs)[index] == rxq))
3317 if (index == priv->rxqs_n)
3319 rxq = (*priv->rxqs)[index];
3320 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3324 * Allocate a Queue Pair.
3325 * Optionally setup inline receive if supported.
3328 * Pointer to private structure.
3330 * Completion queue to associate with QP.
3332 * Number of descriptors in QP (hint only).
3335 * QP pointer or NULL in case of error.
3337 static struct ibv_qp *
3338 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3339 struct ibv_exp_res_domain *rd)
3341 struct ibv_exp_qp_init_attr attr = {
3342 /* CQ to be associated with the send queue. */
3344 /* CQ to be associated with the receive queue. */
3347 /* Max number of outstanding WRs. */
3348 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3349 priv->device_attr.max_qp_wr :
3351 /* Max number of scatter/gather elements in a WR. */
3352 .max_recv_sge = ((priv->device_attr.max_sge <
3353 MLX4_PMD_SGE_WR_N) ?
3354 priv->device_attr.max_sge :
3357 .qp_type = IBV_QPT_RAW_PACKET,
3358 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3359 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3365 attr.max_inl_recv = priv->inl_recv_size;
3366 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3368 return ibv_exp_create_qp(priv->ctx, &attr);
3374 * Allocate a RSS Queue Pair.
3375 * Optionally setup inline receive if supported.
3378 * Pointer to private structure.
3380 * Completion queue to associate with QP.
3382 * Number of descriptors in QP (hint only).
3384 * If nonzero, create a parent QP, otherwise a child.
3387 * QP pointer or NULL in case of error.
3389 static struct ibv_qp *
3390 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3391 int parent, struct ibv_exp_res_domain *rd)
3393 struct ibv_exp_qp_init_attr attr = {
3394 /* CQ to be associated with the send queue. */
3396 /* CQ to be associated with the receive queue. */
3399 /* Max number of outstanding WRs. */
3400 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3401 priv->device_attr.max_qp_wr :
3403 /* Max number of scatter/gather elements in a WR. */
3404 .max_recv_sge = ((priv->device_attr.max_sge <
3405 MLX4_PMD_SGE_WR_N) ?
3406 priv->device_attr.max_sge :
3409 .qp_type = IBV_QPT_RAW_PACKET,
3410 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3411 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3412 IBV_EXP_QP_INIT_ATTR_QPG),
3418 attr.max_inl_recv = priv->inl_recv_size,
3419 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3422 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3423 /* TSS isn't necessary. */
3424 attr.qpg.parent_attrib.tss_child_count = 0;
3425 attr.qpg.parent_attrib.rss_child_count = priv->rxqs_n;
3426 DEBUG("initializing parent RSS queue");
3428 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3429 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3430 DEBUG("initializing child RSS queue");
3432 return ibv_exp_create_qp(priv->ctx, &attr);
3435 #endif /* RSS_SUPPORT */
3438 * Reconfigure a RX queue with new parameters.
3440 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3441 * thread (such as a control thread), may corrupt the pool.
3442 * In case of failure, the queue is left untouched.
3445 * Pointer to Ethernet device structure.
3450 * 0 on success, errno value on failure.
3453 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3455 struct priv *priv = rxq->priv;
3456 struct rxq tmpl = *rxq;
3457 unsigned int mbuf_n;
3458 unsigned int desc_n;
3459 struct rte_mbuf **pool;
3461 struct ibv_exp_qp_attr mod;
3462 struct ibv_recv_wr *bad_wr;
3464 int parent = (rxq == &priv->rxq_parent);
3467 ERROR("%p: cannot rehash parent queue %p",
3468 (void *)dev, (void *)rxq);
3471 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3472 /* Number of descriptors and mbufs currently allocated. */
3473 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3475 /* Toggle RX checksum offload if hardware supports it. */
3476 if (priv->hw_csum) {
3477 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3478 rxq->csum = tmpl.csum;
3480 if (priv->hw_csum_l2tun) {
3481 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3482 rxq->csum_l2tun = tmpl.csum_l2tun;
3484 /* Enable scattered packets support for this queue if necessary. */
3485 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3486 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3487 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3489 desc_n /= MLX4_PMD_SGE_WR_N;
3492 DEBUG("%p: %s scattered packets support (%u WRs)",
3493 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3494 /* If scatter mode is the same as before, nothing to do. */
3495 if (tmpl.sp == rxq->sp) {
3496 DEBUG("%p: nothing to do", (void *)dev);
3499 /* Remove attached flows if RSS is disabled (no parent queue). */
3501 rxq_allmulticast_disable(&tmpl);
3502 rxq_promiscuous_disable(&tmpl);
3503 rxq_mac_addrs_del(&tmpl);
3504 /* Update original queue in case of failure. */
3505 rxq->allmulti_flow = tmpl.allmulti_flow;
3506 rxq->promisc_flow = tmpl.promisc_flow;
3507 memcpy(rxq->mac_configured, tmpl.mac_configured,
3508 sizeof(rxq->mac_configured));
3509 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3511 /* From now on, any failure will render the queue unusable.
3512 * Reinitialize QP. */
3513 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3514 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3516 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3520 err = ibv_resize_cq(tmpl.cq, desc_n);
3522 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3526 mod = (struct ibv_exp_qp_attr){
3527 /* Move the QP to this state. */
3528 .qp_state = IBV_QPS_INIT,
3529 /* Primary port number. */
3530 .port_num = priv->port
3532 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3535 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3536 #endif /* RSS_SUPPORT */
3539 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3540 (void *)dev, strerror(err));
3544 /* Reconfigure flows. Do not care for errors. */
3546 rxq_mac_addrs_add(&tmpl);
3548 rxq_promiscuous_enable(&tmpl);
3550 rxq_allmulticast_enable(&tmpl);
3551 /* Update original queue in case of failure. */
3552 rxq->allmulti_flow = tmpl.allmulti_flow;
3553 rxq->promisc_flow = tmpl.promisc_flow;
3554 memcpy(rxq->mac_configured, tmpl.mac_configured,
3555 sizeof(rxq->mac_configured));
3556 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3558 /* Allocate pool. */
3559 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3561 ERROR("%p: cannot allocate memory", (void *)dev);
3564 /* Snatch mbufs from original queue. */
3567 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3569 for (i = 0; (i != elemof(*elts)); ++i) {
3570 struct rxq_elt_sp *elt = &(*elts)[i];
3573 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3574 assert(elt->bufs[j] != NULL);
3575 pool[k++] = elt->bufs[j];
3579 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3581 for (i = 0; (i != elemof(*elts)); ++i) {
3582 struct rxq_elt *elt = &(*elts)[i];
3583 struct rte_mbuf *buf = (void *)
3584 ((uintptr_t)elt->sge.addr -
3585 WR_ID(elt->wr.wr_id).offset);
3587 assert(WR_ID(elt->wr.wr_id).id == i);
3591 assert(k == mbuf_n);
3593 tmpl.elts.sp = NULL;
3594 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3596 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3597 rxq_alloc_elts(&tmpl, desc_n, pool));
3599 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3604 assert(tmpl.elts_n == desc_n);
3605 assert(tmpl.elts.sp != NULL);
3607 /* Clean up original data. */
3609 rte_free(rxq->elts.sp);
3610 rxq->elts.sp = NULL;
3612 err = ibv_post_recv(tmpl.qp,
3614 &(*tmpl.elts.sp)[0].wr :
3615 &(*tmpl.elts.no_sp)[0].wr),
3618 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3624 mod = (struct ibv_exp_qp_attr){
3625 .qp_state = IBV_QPS_RTR
3627 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3629 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3630 (void *)dev, strerror(err));
3638 * Configure a RX queue.
3641 * Pointer to Ethernet device structure.
3643 * Pointer to RX queue structure.
3645 * Number of descriptors to configure in queue.
3647 * NUMA socket on which memory must be allocated.
3649 * Thresholds parameters.
3651 * Memory pool for buffer allocations.
3654 * 0 on success, errno value on failure.
3657 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3658 unsigned int socket, const struct rte_eth_rxconf *conf,
3659 struct rte_mempool *mp)
3661 struct priv *priv = dev->data->dev_private;
3667 struct ibv_exp_qp_attr mod;
3669 struct ibv_exp_query_intf_params params;
3670 struct ibv_exp_cq_init_attr cq;
3671 struct ibv_exp_res_domain_init_attr rd;
3673 enum ibv_exp_query_intf_status status;
3674 struct ibv_recv_wr *bad_wr;
3675 struct rte_mbuf *buf;
3677 int parent = (rxq == &priv->rxq_parent);
3679 (void)conf; /* Thresholds configuration (ignored). */
3681 * If this is a parent queue, hardware must support RSS and
3682 * RSS must be enabled.
3684 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3686 /* Even if unused, ibv_create_cq() requires at least one
3691 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3692 ERROR("%p: invalid number of RX descriptors (must be a"
3693 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3696 /* Get mbuf length. */
3697 buf = rte_pktmbuf_alloc(mp);
3699 ERROR("%p: unable to allocate mbuf", (void *)dev);
3702 tmpl.mb_len = buf->buf_len;
3703 assert((rte_pktmbuf_headroom(buf) +
3704 rte_pktmbuf_tailroom(buf)) == tmpl.mb_len);
3705 assert(rte_pktmbuf_headroom(buf) == RTE_PKTMBUF_HEADROOM);
3706 rte_pktmbuf_free(buf);
3707 /* Toggle RX checksum offload if hardware supports it. */
3709 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3710 if (priv->hw_csum_l2tun)
3711 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3712 /* Enable scattered packets support for this queue if necessary. */
3713 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3714 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3715 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3717 desc /= MLX4_PMD_SGE_WR_N;
3719 DEBUG("%p: %s scattered packets support (%u WRs)",
3720 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3721 /* Use the entire RX mempool as the memory region. */
3722 tmpl.mr = ibv_reg_mr(priv->pd,
3723 (void *)mp->elt_va_start,
3724 (mp->elt_va_end - mp->elt_va_start),
3725 (IBV_ACCESS_LOCAL_WRITE |
3726 IBV_ACCESS_REMOTE_WRITE));
3727 if (tmpl.mr == NULL) {
3729 ERROR("%p: MR creation failure: %s",
3730 (void *)dev, strerror(ret));
3734 attr.rd = (struct ibv_exp_res_domain_init_attr){
3735 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3736 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3737 .thread_model = IBV_EXP_THREAD_SINGLE,
3738 .msg_model = IBV_EXP_MSG_HIGH_BW,
3740 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3741 if (tmpl.rd == NULL) {
3743 ERROR("%p: RD creation failure: %s",
3744 (void *)dev, strerror(ret));
3747 attr.cq = (struct ibv_exp_cq_init_attr){
3748 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3749 .res_domain = tmpl.rd,
3751 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3752 if (tmpl.cq == NULL) {
3754 ERROR("%p: CQ creation failure: %s",
3755 (void *)dev, strerror(ret));
3758 DEBUG("priv->device_attr.max_qp_wr is %d",
3759 priv->device_attr.max_qp_wr);
3760 DEBUG("priv->device_attr.max_sge is %d",
3761 priv->device_attr.max_sge);
3764 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3767 #endif /* RSS_SUPPORT */
3768 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3769 if (tmpl.qp == NULL) {
3770 ret = (errno ? errno : EINVAL);
3771 ERROR("%p: QP creation failure: %s",
3772 (void *)dev, strerror(ret));
3775 mod = (struct ibv_exp_qp_attr){
3776 /* Move the QP to this state. */
3777 .qp_state = IBV_QPS_INIT,
3778 /* Primary port number. */
3779 .port_num = priv->port
3781 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3784 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3785 #endif /* RSS_SUPPORT */
3788 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3789 (void *)dev, strerror(ret));
3792 if ((parent) || (!priv->rss)) {
3793 /* Configure MAC and broadcast addresses. */
3794 ret = rxq_mac_addrs_add(&tmpl);
3796 ERROR("%p: QP flow attachment failed: %s",
3797 (void *)dev, strerror(ret));
3801 /* Allocate descriptors for RX queues, except for the RSS parent. */
3805 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3807 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3809 ERROR("%p: RXQ allocation failed: %s",
3810 (void *)dev, strerror(ret));
3813 ret = ibv_post_recv(tmpl.qp,
3815 &(*tmpl.elts.sp)[0].wr :
3816 &(*tmpl.elts.no_sp)[0].wr),
3819 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3826 mod = (struct ibv_exp_qp_attr){
3827 .qp_state = IBV_QPS_RTR
3829 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3831 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3832 (void *)dev, strerror(ret));
3836 tmpl.port_id = dev->data->port_id;
3837 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3838 attr.params = (struct ibv_exp_query_intf_params){
3839 .intf_scope = IBV_EXP_INTF_GLOBAL,
3840 .intf = IBV_EXP_INTF_CQ,
3843 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3844 if (tmpl.if_cq == NULL) {
3845 ERROR("%p: CQ interface family query failed with status %d",
3846 (void *)dev, status);
3849 attr.params = (struct ibv_exp_query_intf_params){
3850 .intf_scope = IBV_EXP_INTF_GLOBAL,
3851 .intf = IBV_EXP_INTF_QP_BURST,
3854 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3855 if (tmpl.if_qp == NULL) {
3856 ERROR("%p: QP interface family query failed with status %d",
3857 (void *)dev, status);
3860 /* Clean up rxq in case we're reinitializing it. */
3861 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3864 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3874 * DPDK callback to configure a RX queue.
3877 * Pointer to Ethernet device structure.
3881 * Number of descriptors to configure in queue.
3883 * NUMA socket on which memory must be allocated.
3885 * Thresholds parameters.
3887 * Memory pool for buffer allocations.
3890 * 0 on success, negative errno value on failure.
3893 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3894 unsigned int socket, const struct rte_eth_rxconf *conf,
3895 struct rte_mempool *mp)
3897 struct priv *priv = dev->data->dev_private;
3898 struct rxq *rxq = (*priv->rxqs)[idx];
3901 if (mlx4_is_secondary())
3902 return -E_RTE_SECONDARY;
3904 DEBUG("%p: configuring queue %u for %u descriptors",
3905 (void *)dev, idx, desc);
3906 if (idx >= priv->rxqs_n) {
3907 ERROR("%p: queue index out of range (%u >= %u)",
3908 (void *)dev, idx, priv->rxqs_n);
3913 DEBUG("%p: reusing already allocated queue index %u (%p)",
3914 (void *)dev, idx, (void *)rxq);
3915 if (priv->started) {
3919 (*priv->rxqs)[idx] = NULL;
3922 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3924 ERROR("%p: unable to allocate queue index %u",
3930 ret = rxq_setup(dev, rxq, desc, socket, conf, mp);
3934 rxq->stats.idx = idx;
3935 DEBUG("%p: adding RX queue %p to list",
3936 (void *)dev, (void *)rxq);
3937 (*priv->rxqs)[idx] = rxq;
3938 /* Update receive callback. */
3940 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3942 dev->rx_pkt_burst = mlx4_rx_burst;
3949 * DPDK callback to release a RX queue.
3952 * Generic RX queue pointer.
3955 mlx4_rx_queue_release(void *dpdk_rxq)
3957 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3961 if (mlx4_is_secondary())
3967 assert(rxq != &priv->rxq_parent);
3968 for (i = 0; (i != priv->rxqs_n); ++i)
3969 if ((*priv->rxqs)[i] == rxq) {
3970 DEBUG("%p: removing RX queue %p from list",
3971 (void *)priv->dev, (void *)rxq);
3972 (*priv->rxqs)[i] = NULL;
3981 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3984 * DPDK callback to start the device.
3986 * Simulate device start by attaching all configured flows.
3989 * Pointer to Ethernet device structure.
3992 * 0 on success, negative errno value on failure.
3995 mlx4_dev_start(struct rte_eth_dev *dev)
3997 struct priv *priv = dev->data->dev_private;
4002 if (mlx4_is_secondary())
4003 return -E_RTE_SECONDARY;
4005 if (priv->started) {
4009 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4012 rxq = &priv->rxq_parent;
4015 rxq = (*priv->rxqs)[0];
4018 /* Iterate only once when RSS is enabled. */
4022 /* Ignore nonexistent RX queues. */
4025 ret = rxq_mac_addrs_add(rxq);
4026 if (!ret && priv->promisc)
4027 ret = rxq_promiscuous_enable(rxq);
4028 if (!ret && priv->allmulti)
4029 ret = rxq_allmulticast_enable(rxq);
4032 WARN("%p: QP flow attachment failed: %s",
4033 (void *)dev, strerror(ret));
4036 rxq = (*priv->rxqs)[--i];
4038 rxq_allmulticast_disable(rxq);
4039 rxq_promiscuous_disable(rxq);
4040 rxq_mac_addrs_del(rxq);
4046 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4047 priv_dev_interrupt_handler_install(priv, dev);
4053 * DPDK callback to stop the device.
4055 * Simulate device stop by detaching all configured flows.
4058 * Pointer to Ethernet device structure.
4061 mlx4_dev_stop(struct rte_eth_dev *dev)
4063 struct priv *priv = dev->data->dev_private;
4068 if (mlx4_is_secondary())
4071 if (!priv->started) {
4075 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4078 rxq = &priv->rxq_parent;
4081 rxq = (*priv->rxqs)[0];
4084 /* Iterate only once when RSS is enabled. */
4086 /* Ignore nonexistent RX queues. */
4089 rxq_allmulticast_disable(rxq);
4090 rxq_promiscuous_disable(rxq);
4091 rxq_mac_addrs_del(rxq);
4092 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4097 * Dummy DPDK callback for TX.
4099 * This function is used to temporarily replace the real callback during
4100 * unsafe control operations on the queue, or in case of error.
4103 * Generic pointer to TX queue structure.
4105 * Packets to transmit.
4107 * Number of packets in array.
4110 * Number of packets successfully transmitted (<= pkts_n).
4113 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4122 * Dummy DPDK callback for RX.
4124 * This function is used to temporarily replace the real callback during
4125 * unsafe control operations on the queue, or in case of error.
4128 * Generic pointer to RX queue structure.
4130 * Array to store received packets.
4132 * Maximum number of packets in array.
4135 * Number of packets successfully received (<= pkts_n).
4138 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4147 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4150 * DPDK callback to close the device.
4152 * Destroy all queues and objects, free memory.
4155 * Pointer to Ethernet device structure.
4158 mlx4_dev_close(struct rte_eth_dev *dev)
4160 struct priv *priv = mlx4_get_priv(dev);
4167 DEBUG("%p: closing device \"%s\"",
4169 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4170 /* Prevent crashes when queues are still in use. This is unfortunately
4171 * still required for DPDK 1.3 because some programs (such as testpmd)
4172 * never release them before closing the device. */
4173 dev->rx_pkt_burst = removed_rx_burst;
4174 dev->tx_pkt_burst = removed_tx_burst;
4175 if (priv->rxqs != NULL) {
4176 /* XXX race condition if mlx4_rx_burst() is still running. */
4178 for (i = 0; (i != priv->rxqs_n); ++i) {
4179 tmp = (*priv->rxqs)[i];
4182 (*priv->rxqs)[i] = NULL;
4189 if (priv->txqs != NULL) {
4190 /* XXX race condition if mlx4_tx_burst() is still running. */
4192 for (i = 0; (i != priv->txqs_n); ++i) {
4193 tmp = (*priv->txqs)[i];
4196 (*priv->txqs)[i] = NULL;
4204 rxq_cleanup(&priv->rxq_parent);
4205 if (priv->pd != NULL) {
4206 assert(priv->ctx != NULL);
4207 claim_zero(ibv_dealloc_pd(priv->pd));
4208 claim_zero(ibv_close_device(priv->ctx));
4210 assert(priv->ctx == NULL);
4211 priv_dev_interrupt_handler_uninstall(priv, dev);
4213 memset(priv, 0, sizeof(*priv));
4217 * DPDK callback to get information about the device.
4220 * Pointer to Ethernet device structure.
4222 * Info structure output buffer.
4225 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4227 struct priv *priv = mlx4_get_priv(dev);
4229 char ifname[IF_NAMESIZE];
4234 /* FIXME: we should ask the device for these values. */
4235 info->min_rx_bufsize = 32;
4236 info->max_rx_pktlen = 65536;
4238 * Since we need one CQ per QP, the limit is the minimum number
4239 * between the two values.
4241 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4242 priv->device_attr.max_qp : priv->device_attr.max_cq);
4243 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4246 info->max_rx_queues = max;
4247 info->max_tx_queues = max;
4248 /* Last array entry is reserved for broadcast. */
4249 info->max_mac_addrs = (elemof(priv->mac) - 1);
4250 info->rx_offload_capa =
4252 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4253 DEV_RX_OFFLOAD_UDP_CKSUM |
4254 DEV_RX_OFFLOAD_TCP_CKSUM) :
4256 info->tx_offload_capa =
4258 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4259 DEV_TX_OFFLOAD_UDP_CKSUM |
4260 DEV_TX_OFFLOAD_TCP_CKSUM) :
4262 if (priv_get_ifname(priv, &ifname) == 0)
4263 info->if_index = if_nametoindex(ifname);
4268 * DPDK callback to get device statistics.
4271 * Pointer to Ethernet device structure.
4273 * Stats structure output buffer.
4276 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4278 struct priv *priv = mlx4_get_priv(dev);
4279 struct rte_eth_stats tmp = {0};
4286 /* Add software counters. */
4287 for (i = 0; (i != priv->rxqs_n); ++i) {
4288 struct rxq *rxq = (*priv->rxqs)[i];
4292 idx = rxq->stats.idx;
4293 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4294 #ifdef MLX4_PMD_SOFT_COUNTERS
4295 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4296 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4298 tmp.q_errors[idx] += (rxq->stats.idropped +
4299 rxq->stats.rx_nombuf);
4301 #ifdef MLX4_PMD_SOFT_COUNTERS
4302 tmp.ipackets += rxq->stats.ipackets;
4303 tmp.ibytes += rxq->stats.ibytes;
4305 tmp.ierrors += rxq->stats.idropped;
4306 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4308 for (i = 0; (i != priv->txqs_n); ++i) {
4309 struct txq *txq = (*priv->txqs)[i];
4313 idx = txq->stats.idx;
4314 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4315 #ifdef MLX4_PMD_SOFT_COUNTERS
4316 tmp.q_opackets[idx] += txq->stats.opackets;
4317 tmp.q_obytes[idx] += txq->stats.obytes;
4319 tmp.q_errors[idx] += txq->stats.odropped;
4321 #ifdef MLX4_PMD_SOFT_COUNTERS
4322 tmp.opackets += txq->stats.opackets;
4323 tmp.obytes += txq->stats.obytes;
4325 tmp.oerrors += txq->stats.odropped;
4327 #ifndef MLX4_PMD_SOFT_COUNTERS
4328 /* FIXME: retrieve and add hardware counters. */
4335 * DPDK callback to clear device statistics.
4338 * Pointer to Ethernet device structure.
4341 mlx4_stats_reset(struct rte_eth_dev *dev)
4343 struct priv *priv = mlx4_get_priv(dev);
4350 for (i = 0; (i != priv->rxqs_n); ++i) {
4351 if ((*priv->rxqs)[i] == NULL)
4353 idx = (*priv->rxqs)[i]->stats.idx;
4354 (*priv->rxqs)[i]->stats =
4355 (struct mlx4_rxq_stats){ .idx = idx };
4357 for (i = 0; (i != priv->txqs_n); ++i) {
4358 if ((*priv->txqs)[i] == NULL)
4360 idx = (*priv->txqs)[i]->stats.idx;
4361 (*priv->txqs)[i]->stats =
4362 (struct mlx4_txq_stats){ .idx = idx };
4364 #ifndef MLX4_PMD_SOFT_COUNTERS
4365 /* FIXME: reset hardware counters. */
4371 * DPDK callback to remove a MAC address.
4374 * Pointer to Ethernet device structure.
4376 * MAC address index.
4379 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4381 struct priv *priv = dev->data->dev_private;
4383 if (mlx4_is_secondary())
4386 DEBUG("%p: removing MAC address from index %" PRIu32,
4387 (void *)dev, index);
4388 /* Last array entry is reserved for broadcast. */
4389 if (index >= (elemof(priv->mac) - 1))
4391 priv_mac_addr_del(priv, index);
4397 * DPDK callback to add a MAC address.
4400 * Pointer to Ethernet device structure.
4402 * MAC address to register.
4404 * MAC address index.
4406 * VMDq pool index to associate address with (ignored).
4409 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4410 uint32_t index, uint32_t vmdq)
4412 struct priv *priv = dev->data->dev_private;
4414 if (mlx4_is_secondary())
4418 DEBUG("%p: adding MAC address at index %" PRIu32,
4419 (void *)dev, index);
4420 /* Last array entry is reserved for broadcast. */
4421 if (index >= (elemof(priv->mac) - 1))
4423 priv_mac_addr_add(priv, index,
4424 (const uint8_t (*)[ETHER_ADDR_LEN])
4425 mac_addr->addr_bytes);
4431 * DPDK callback to enable promiscuous mode.
4434 * Pointer to Ethernet device structure.
4437 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4439 struct priv *priv = dev->data->dev_private;
4443 if (mlx4_is_secondary())
4446 if (priv->promisc) {
4450 /* If device isn't started, this is all we need to do. */
4454 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4461 for (i = 0; (i != priv->rxqs_n); ++i) {
4462 if ((*priv->rxqs)[i] == NULL)
4464 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4467 /* Failure, rollback. */
4469 if ((*priv->rxqs)[--i] != NULL)
4470 rxq_promiscuous_disable((*priv->rxqs)[i]);
4480 * DPDK callback to disable promiscuous mode.
4483 * Pointer to Ethernet device structure.
4486 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4488 struct priv *priv = dev->data->dev_private;
4491 if (mlx4_is_secondary())
4494 if (!priv->promisc) {
4499 rxq_promiscuous_disable(&priv->rxq_parent);
4502 for (i = 0; (i != priv->rxqs_n); ++i)
4503 if ((*priv->rxqs)[i] != NULL)
4504 rxq_promiscuous_disable((*priv->rxqs)[i]);
4511 * DPDK callback to enable allmulti mode.
4514 * Pointer to Ethernet device structure.
4517 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4519 struct priv *priv = dev->data->dev_private;
4523 if (mlx4_is_secondary())
4526 if (priv->allmulti) {
4530 /* If device isn't started, this is all we need to do. */
4534 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4541 for (i = 0; (i != priv->rxqs_n); ++i) {
4542 if ((*priv->rxqs)[i] == NULL)
4544 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4547 /* Failure, rollback. */
4549 if ((*priv->rxqs)[--i] != NULL)
4550 rxq_allmulticast_disable((*priv->rxqs)[i]);
4560 * DPDK callback to disable allmulti mode.
4563 * Pointer to Ethernet device structure.
4566 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4568 struct priv *priv = dev->data->dev_private;
4571 if (mlx4_is_secondary())
4574 if (!priv->allmulti) {
4579 rxq_allmulticast_disable(&priv->rxq_parent);
4582 for (i = 0; (i != priv->rxqs_n); ++i)
4583 if ((*priv->rxqs)[i] != NULL)
4584 rxq_allmulticast_disable((*priv->rxqs)[i]);
4591 * DPDK callback to retrieve physical link information (unlocked version).
4594 * Pointer to Ethernet device structure.
4595 * @param wait_to_complete
4596 * Wait for request completion (ignored).
4599 mlx4_link_update_unlocked(struct rte_eth_dev *dev, int wait_to_complete)
4601 struct priv *priv = mlx4_get_priv(dev);
4602 struct ethtool_cmd edata = {
4606 struct rte_eth_link dev_link;
4611 (void)wait_to_complete;
4612 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4613 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4616 memset(&dev_link, 0, sizeof(dev_link));
4617 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4618 (ifr.ifr_flags & IFF_RUNNING));
4619 ifr.ifr_data = &edata;
4620 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4621 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4625 link_speed = ethtool_cmd_speed(&edata);
4626 if (link_speed == -1)
4627 dev_link.link_speed = 0;
4629 dev_link.link_speed = link_speed;
4630 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4631 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4632 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4633 /* Link status changed. */
4634 dev->data->dev_link = dev_link;
4637 /* Link status is still the same. */
4642 * DPDK callback to retrieve physical link information.
4645 * Pointer to Ethernet device structure.
4646 * @param wait_to_complete
4647 * Wait for request completion (ignored).
4650 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4652 struct priv *priv = mlx4_get_priv(dev);
4658 ret = mlx4_link_update_unlocked(dev, wait_to_complete);
4664 * DPDK callback to change the MTU.
4666 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4667 * received). Use this as a hint to enable/disable scattered packets support
4668 * and improve performance when not needed.
4669 * Since failure is not an option, reconfiguring queues on the fly is not
4673 * Pointer to Ethernet device structure.
4678 * 0 on success, negative errno value on failure.
4681 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4683 struct priv *priv = dev->data->dev_private;
4686 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4689 if (mlx4_is_secondary())
4690 return -E_RTE_SECONDARY;
4692 /* Set kernel interface MTU first. */
4693 if (priv_set_mtu(priv, mtu)) {
4695 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4699 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4701 /* Temporarily replace RX handler with a fake one, assuming it has not
4702 * been copied elsewhere. */
4703 dev->rx_pkt_burst = removed_rx_burst;
4704 /* Make sure everyone has left mlx4_rx_burst() and uses
4705 * removed_rx_burst() instead. */
4708 /* Reconfigure each RX queue. */
4709 for (i = 0; (i != priv->rxqs_n); ++i) {
4710 struct rxq *rxq = (*priv->rxqs)[i];
4711 unsigned int max_frame_len;
4716 /* Calculate new maximum frame length according to MTU and
4717 * toggle scattered support (sp) if necessary. */
4718 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4719 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4720 sp = (max_frame_len > (rxq->mb_len - RTE_PKTMBUF_HEADROOM));
4721 /* Provide new values to rxq_setup(). */
4722 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4723 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4724 ret = rxq_rehash(dev, rxq);
4726 /* Force SP RX if that queue requires it and abort. */
4728 rx_func = mlx4_rx_burst_sp;
4731 /* Reenable non-RSS queue attributes. No need to check
4732 * for errors at this stage. */
4734 rxq_mac_addrs_add(rxq);
4736 rxq_promiscuous_enable(rxq);
4738 rxq_allmulticast_enable(rxq);
4740 /* Scattered burst function takes priority. */
4742 rx_func = mlx4_rx_burst_sp;
4744 /* Burst functions can now be called again. */
4746 dev->rx_pkt_burst = rx_func;
4754 * DPDK callback to get flow control status.
4757 * Pointer to Ethernet device structure.
4758 * @param[out] fc_conf
4759 * Flow control output buffer.
4762 * 0 on success, negative errno value on failure.
4765 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4767 struct priv *priv = dev->data->dev_private;
4769 struct ethtool_pauseparam ethpause = {
4770 .cmd = ETHTOOL_GPAUSEPARAM
4774 if (mlx4_is_secondary())
4775 return -E_RTE_SECONDARY;
4776 ifr.ifr_data = ðpause;
4778 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4780 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4786 fc_conf->autoneg = ethpause.autoneg;
4787 if (ethpause.rx_pause && ethpause.tx_pause)
4788 fc_conf->mode = RTE_FC_FULL;
4789 else if (ethpause.rx_pause)
4790 fc_conf->mode = RTE_FC_RX_PAUSE;
4791 else if (ethpause.tx_pause)
4792 fc_conf->mode = RTE_FC_TX_PAUSE;
4794 fc_conf->mode = RTE_FC_NONE;
4804 * DPDK callback to modify flow control parameters.
4807 * Pointer to Ethernet device structure.
4808 * @param[in] fc_conf
4809 * Flow control parameters.
4812 * 0 on success, negative errno value on failure.
4815 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4817 struct priv *priv = dev->data->dev_private;
4819 struct ethtool_pauseparam ethpause = {
4820 .cmd = ETHTOOL_SPAUSEPARAM
4824 if (mlx4_is_secondary())
4825 return -E_RTE_SECONDARY;
4826 ifr.ifr_data = ðpause;
4827 ethpause.autoneg = fc_conf->autoneg;
4828 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4829 (fc_conf->mode & RTE_FC_RX_PAUSE))
4830 ethpause.rx_pause = 1;
4832 ethpause.rx_pause = 0;
4834 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4835 (fc_conf->mode & RTE_FC_TX_PAUSE))
4836 ethpause.tx_pause = 1;
4838 ethpause.tx_pause = 0;
4841 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4843 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4857 * Configure a VLAN filter.
4860 * Pointer to Ethernet device structure.
4862 * VLAN ID to filter.
4867 * 0 on success, errno value on failure.
4870 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4872 struct priv *priv = dev->data->dev_private;
4874 unsigned int j = -1;
4876 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4877 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4878 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4879 if (!priv->vlan_filter[i].enabled) {
4880 /* Unused index, remember it. */
4884 if (priv->vlan_filter[i].id != vlan_id)
4886 /* This VLAN ID is already known, use its index. */
4890 /* Check if there's room for another VLAN filter. */
4891 if (j == (unsigned int)-1)
4894 * VLAN filters apply to all configured MAC addresses, flow
4895 * specifications must be reconfigured accordingly.
4897 priv->vlan_filter[j].id = vlan_id;
4898 if ((on) && (!priv->vlan_filter[j].enabled)) {
4900 * Filter is disabled, enable it.
4901 * Rehashing flows in all RX queues is necessary.
4904 rxq_mac_addrs_del(&priv->rxq_parent);
4906 for (i = 0; (i != priv->rxqs_n); ++i)
4907 if ((*priv->rxqs)[i] != NULL)
4908 rxq_mac_addrs_del((*priv->rxqs)[i]);
4909 priv->vlan_filter[j].enabled = 1;
4910 if (priv->started) {
4912 rxq_mac_addrs_add(&priv->rxq_parent);
4914 for (i = 0; (i != priv->rxqs_n); ++i) {
4915 if ((*priv->rxqs)[i] == NULL)
4917 rxq_mac_addrs_add((*priv->rxqs)[i]);
4920 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
4922 * Filter is enabled, disable it.
4923 * Rehashing flows in all RX queues is necessary.
4926 rxq_mac_addrs_del(&priv->rxq_parent);
4928 for (i = 0; (i != priv->rxqs_n); ++i)
4929 if ((*priv->rxqs)[i] != NULL)
4930 rxq_mac_addrs_del((*priv->rxqs)[i]);
4931 priv->vlan_filter[j].enabled = 0;
4932 if (priv->started) {
4934 rxq_mac_addrs_add(&priv->rxq_parent);
4936 for (i = 0; (i != priv->rxqs_n); ++i) {
4937 if ((*priv->rxqs)[i] == NULL)
4939 rxq_mac_addrs_add((*priv->rxqs)[i]);
4947 * DPDK callback to configure a VLAN filter.
4950 * Pointer to Ethernet device structure.
4952 * VLAN ID to filter.
4957 * 0 on success, negative errno value on failure.
4960 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4962 struct priv *priv = dev->data->dev_private;
4965 if (mlx4_is_secondary())
4966 return -E_RTE_SECONDARY;
4968 ret = vlan_filter_set(dev, vlan_id, on);
4974 static const struct eth_dev_ops mlx4_dev_ops = {
4975 .dev_configure = mlx4_dev_configure,
4976 .dev_start = mlx4_dev_start,
4977 .dev_stop = mlx4_dev_stop,
4978 .dev_close = mlx4_dev_close,
4979 .promiscuous_enable = mlx4_promiscuous_enable,
4980 .promiscuous_disable = mlx4_promiscuous_disable,
4981 .allmulticast_enable = mlx4_allmulticast_enable,
4982 .allmulticast_disable = mlx4_allmulticast_disable,
4983 .link_update = mlx4_link_update,
4984 .stats_get = mlx4_stats_get,
4985 .stats_reset = mlx4_stats_reset,
4986 .queue_stats_mapping_set = NULL,
4987 .dev_infos_get = mlx4_dev_infos_get,
4988 .vlan_filter_set = mlx4_vlan_filter_set,
4989 .vlan_tpid_set = NULL,
4990 .vlan_strip_queue_set = NULL,
4991 .vlan_offload_set = NULL,
4992 .rx_queue_setup = mlx4_rx_queue_setup,
4993 .tx_queue_setup = mlx4_tx_queue_setup,
4994 .rx_queue_release = mlx4_rx_queue_release,
4995 .tx_queue_release = mlx4_tx_queue_release,
4997 .dev_led_off = NULL,
4998 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
4999 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5000 .priority_flow_ctrl_set = NULL,
5001 .mac_addr_remove = mlx4_mac_addr_remove,
5002 .mac_addr_add = mlx4_mac_addr_add,
5003 .mtu_set = mlx4_dev_set_mtu,
5007 * Get PCI information from struct ibv_device.
5010 * Pointer to Ethernet device structure.
5011 * @param[out] pci_addr
5012 * PCI bus address output buffer.
5015 * 0 on success, -1 on failure and errno is set.
5018 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5019 struct rte_pci_addr *pci_addr)
5023 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5025 file = fopen(path, "rb");
5028 while (fgets(line, sizeof(line), file) == line) {
5029 size_t len = strlen(line);
5032 /* Truncate long lines. */
5033 if (len == (sizeof(line) - 1))
5034 while (line[(len - 1)] != '\n') {
5038 line[(len - 1)] = ret;
5040 /* Extract information. */
5043 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5047 &pci_addr->function) == 4) {
5057 * Get MAC address by querying netdevice.
5060 * struct priv for the requested device.
5062 * MAC address output buffer.
5065 * 0 on success, -1 on failure and errno is set.
5068 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5070 struct ifreq request;
5072 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5074 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5078 /* Support up to 32 adapters. */
5080 struct rte_pci_addr pci_addr; /* associated PCI address */
5081 uint32_t ports; /* physical ports bitfield. */
5085 * Get device index in mlx4_dev[] from PCI bus address.
5087 * @param[in] pci_addr
5088 * PCI bus address to look for.
5091 * mlx4_dev[] index on success, -1 on failure.
5094 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5099 assert(pci_addr != NULL);
5100 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5101 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5102 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5103 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5104 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5106 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5113 * Retrieve integer value from environment variable.
5116 * Environment variable name.
5119 * Integer value, 0 if the variable is not set.
5122 mlx4_getenv_int(const char *name)
5124 const char *val = getenv(name);
5132 mlx4_dev_link_status_handler(void *);
5134 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5137 * Link status handler.
5140 * Pointer to private structure.
5142 * Pointer to the rte_eth_dev structure.
5145 * Nonzero if the callback process can be called immediately.
5148 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5150 struct ibv_async_event event;
5151 int port_change = 0;
5154 /* Read all message and acknowledge them. */
5156 if (ibv_get_async_event(priv->ctx, &event))
5159 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5160 event.event_type == IBV_EVENT_PORT_ERR)
5163 DEBUG("event type %d on port %d not handled",
5164 event.event_type, event.element.port_num);
5165 ibv_ack_async_event(&event);
5168 if (port_change ^ priv->pending_alarm) {
5169 struct rte_eth_link *link = &dev->data->dev_link;
5171 priv->pending_alarm = 0;
5172 mlx4_link_update_unlocked(dev, 0);
5173 if (((link->link_speed == 0) && link->link_status) ||
5174 ((link->link_speed != 0) && !link->link_status)) {
5175 /* Inconsistent status, check again later. */
5176 priv->pending_alarm = 1;
5177 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5178 mlx4_dev_link_status_handler,
5187 * Handle delayed link status event.
5190 * Registered argument.
5193 mlx4_dev_link_status_handler(void *arg)
5195 struct rte_eth_dev *dev = arg;
5196 struct priv *priv = dev->data->dev_private;
5200 assert(priv->pending_alarm == 1);
5201 ret = priv_dev_link_status_handler(priv, dev);
5204 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5208 * Handle interrupts from the NIC.
5210 * @param[in] intr_handle
5211 * Interrupt handler.
5213 * Callback argument.
5216 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5218 struct rte_eth_dev *dev = cb_arg;
5219 struct priv *priv = dev->data->dev_private;
5224 ret = priv_dev_link_status_handler(priv, dev);
5227 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5231 * Uninstall interrupt handler.
5234 * Pointer to private structure.
5236 * Pointer to the rte_eth_dev structure.
5239 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5241 if (!dev->data->dev_conf.intr_conf.lsc)
5243 rte_intr_callback_unregister(&priv->intr_handle,
5244 mlx4_dev_interrupt_handler,
5246 if (priv->pending_alarm)
5247 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5248 priv->pending_alarm = 0;
5249 priv->intr_handle.fd = 0;
5250 priv->intr_handle.type = 0;
5254 * Install interrupt handler.
5257 * Pointer to private structure.
5259 * Pointer to the rte_eth_dev structure.
5262 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5266 if (!dev->data->dev_conf.intr_conf.lsc)
5268 assert(priv->ctx->async_fd > 0);
5269 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5270 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5272 INFO("failed to change file descriptor async event queue");
5273 dev->data->dev_conf.intr_conf.lsc = 0;
5275 priv->intr_handle.fd = priv->ctx->async_fd;
5276 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5277 rte_intr_callback_register(&priv->intr_handle,
5278 mlx4_dev_interrupt_handler,
5283 static struct eth_driver mlx4_driver;
5286 * DPDK callback to register a PCI device.
5288 * This function creates an Ethernet device for each port of a given
5291 * @param[in] pci_drv
5292 * PCI driver structure (mlx4_driver).
5293 * @param[in] pci_dev
5294 * PCI device information.
5297 * 0 on success, negative errno value on failure.
5300 mlx4_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5302 struct ibv_device **list;
5303 struct ibv_device *ibv_dev;
5305 struct ibv_context *attr_ctx = NULL;
5306 struct ibv_device_attr device_attr;
5312 assert(pci_drv == &mlx4_driver.pci_drv);
5313 /* Get mlx4_dev[] index. */
5314 idx = mlx4_dev_idx(&pci_dev->addr);
5316 ERROR("this driver cannot support any more adapters");
5319 DEBUG("using driver device index %d", idx);
5321 /* Save PCI address. */
5322 mlx4_dev[idx].pci_addr = pci_dev->addr;
5323 list = ibv_get_device_list(&i);
5326 if (errno == ENOSYS) {
5327 WARN("cannot list devices, is ib_uverbs loaded?");
5334 * For each listed device, check related sysfs entry against
5335 * the provided PCI ID.
5338 struct rte_pci_addr pci_addr;
5341 DEBUG("checking device \"%s\"", list[i]->name);
5342 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5344 if ((pci_dev->addr.domain != pci_addr.domain) ||
5345 (pci_dev->addr.bus != pci_addr.bus) ||
5346 (pci_dev->addr.devid != pci_addr.devid) ||
5347 (pci_dev->addr.function != pci_addr.function))
5349 vf = (pci_dev->id.device_id ==
5350 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5351 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5352 list[i]->name, (vf ? "true" : "false"));
5353 attr_ctx = ibv_open_device(list[i]);
5357 if (attr_ctx == NULL) {
5358 ibv_free_device_list(list);
5361 WARN("cannot access device, is mlx4_ib loaded?");
5364 WARN("cannot use device, are drivers up to date?");
5372 DEBUG("device opened");
5373 if (ibv_query_device(attr_ctx, &device_attr))
5375 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5377 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5378 uint32_t port = i + 1; /* ports are indexed from one */
5379 uint32_t test = (1 << i);
5380 struct ibv_context *ctx = NULL;
5381 struct ibv_port_attr port_attr;
5382 struct ibv_pd *pd = NULL;
5383 struct priv *priv = NULL;
5384 struct rte_eth_dev *eth_dev = NULL;
5385 #ifdef HAVE_EXP_QUERY_DEVICE
5386 struct ibv_exp_device_attr exp_device_attr;
5387 #endif /* HAVE_EXP_QUERY_DEVICE */
5388 struct ether_addr mac;
5390 #ifdef HAVE_EXP_QUERY_DEVICE
5391 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5393 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5394 #endif /* RSS_SUPPORT */
5395 #endif /* HAVE_EXP_QUERY_DEVICE */
5397 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5399 ctx = ibv_open_device(ibv_dev);
5403 /* Check port status. */
5404 err = ibv_query_port(ctx, port, &port_attr);
5406 ERROR("port query failed: %s", strerror(err));
5409 if (port_attr.state != IBV_PORT_ACTIVE)
5410 DEBUG("port %d is not active: \"%s\" (%d)",
5411 port, ibv_port_state_str(port_attr.state),
5414 /* Allocate protection domain. */
5415 pd = ibv_alloc_pd(ctx);
5417 ERROR("PD allocation failure");
5422 mlx4_dev[idx].ports |= test;
5424 /* from rte_ethdev.c */
5425 priv = rte_zmalloc("ethdev private structure",
5427 RTE_CACHE_LINE_SIZE);
5429 ERROR("priv allocation failure");
5435 priv->device_attr = device_attr;
5438 priv->mtu = ETHER_MTU;
5439 #ifdef HAVE_EXP_QUERY_DEVICE
5440 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5441 ERROR("ibv_exp_query_device() failed");
5445 if ((exp_device_attr.exp_device_cap_flags &
5446 IBV_EXP_DEVICE_QPG) &&
5447 (exp_device_attr.exp_device_cap_flags &
5448 IBV_EXP_DEVICE_UD_RSS) &&
5449 (exp_device_attr.comp_mask &
5450 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5451 (exp_device_attr.max_rss_tbl_sz > 0)) {
5454 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5458 priv->max_rss_tbl_sz = 0;
5460 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5461 IBV_EXP_DEVICE_UD_TSS);
5462 DEBUG("device flags: %s%s%s",
5463 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5464 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5465 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5467 DEBUG("maximum RSS indirection table size: %u",
5468 exp_device_attr.max_rss_tbl_sz);
5469 #endif /* RSS_SUPPORT */
5472 ((exp_device_attr.exp_device_cap_flags &
5473 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5474 (exp_device_attr.exp_device_cap_flags &
5475 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5476 DEBUG("checksum offloading is %ssupported",
5477 (priv->hw_csum ? "" : "not "));
5479 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5480 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5481 DEBUG("L2 tunnel checksum offloads are %ssupported",
5482 (priv->hw_csum_l2tun ? "" : "not "));
5485 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5487 if (priv->inl_recv_size) {
5488 exp_device_attr.comp_mask =
5489 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5490 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5491 INFO("Couldn't query device for inline-receive"
5493 priv->inl_recv_size = 0;
5495 if ((unsigned)exp_device_attr.inline_recv_sz <
5496 priv->inl_recv_size) {
5497 INFO("Max inline-receive (%d) <"
5498 " requested inline-receive (%u)",
5499 exp_device_attr.inline_recv_sz,
5500 priv->inl_recv_size);
5501 priv->inl_recv_size =
5502 exp_device_attr.inline_recv_sz;
5505 INFO("Set inline receive size to %u",
5506 priv->inl_recv_size);
5508 #endif /* INLINE_RECV */
5509 #endif /* HAVE_EXP_QUERY_DEVICE */
5511 (void)mlx4_getenv_int;
5513 /* Configure the first MAC address by default. */
5514 if (priv_get_mac(priv, &mac.addr_bytes)) {
5515 ERROR("cannot get MAC address, is mlx4_en loaded?"
5516 " (errno: %s)", strerror(errno));
5519 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5521 mac.addr_bytes[0], mac.addr_bytes[1],
5522 mac.addr_bytes[2], mac.addr_bytes[3],
5523 mac.addr_bytes[4], mac.addr_bytes[5]);
5524 /* Register MAC and broadcast addresses. */
5525 claim_zero(priv_mac_addr_add(priv, 0,
5526 (const uint8_t (*)[ETHER_ADDR_LEN])
5528 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5529 &(const uint8_t [ETHER_ADDR_LEN])
5530 { "\xff\xff\xff\xff\xff\xff" }));
5533 char ifname[IF_NAMESIZE];
5535 if (priv_get_ifname(priv, &ifname) == 0)
5536 DEBUG("port %u ifname is \"%s\"",
5537 priv->port, ifname);
5539 DEBUG("port %u ifname is unknown", priv->port);
5542 /* Get actual MTU if possible. */
5543 priv_get_mtu(priv, &priv->mtu);
5544 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5546 /* from rte_ethdev.c */
5548 char name[RTE_ETH_NAME_MAX_LEN];
5550 snprintf(name, sizeof(name), "%s port %u",
5551 ibv_get_device_name(ibv_dev), port);
5552 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
5554 if (eth_dev == NULL) {
5555 ERROR("can not allocate rte ethdev");
5560 /* Secondary processes have to use local storage for their
5561 * private data as well as a copy of eth_dev->data, but this
5562 * pointer must not be modified before burst functions are
5563 * actually called. */
5564 if (mlx4_is_secondary()) {
5565 struct mlx4_secondary_data *sd =
5566 &mlx4_secondary_data[eth_dev->data->port_id];
5568 sd->primary_priv = eth_dev->data->dev_private;
5569 if (sd->primary_priv == NULL) {
5570 ERROR("no private data for port %u",
5571 eth_dev->data->port_id);
5575 sd->shared_dev_data = eth_dev->data;
5576 rte_spinlock_init(&sd->lock);
5577 memcpy(sd->data.name, sd->shared_dev_data->name,
5578 sizeof(sd->data.name));
5579 sd->data.dev_private = priv;
5580 sd->data.rx_mbuf_alloc_failed = 0;
5581 sd->data.mtu = ETHER_MTU;
5582 sd->data.port_id = sd->shared_dev_data->port_id;
5583 sd->data.mac_addrs = priv->mac;
5584 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5585 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5587 eth_dev->data->dev_private = priv;
5588 eth_dev->data->rx_mbuf_alloc_failed = 0;
5589 eth_dev->data->mtu = ETHER_MTU;
5590 eth_dev->data->mac_addrs = priv->mac;
5592 eth_dev->pci_dev = pci_dev;
5594 rte_eth_copy_pci_info(eth_dev, pci_dev);
5596 eth_dev->driver = &mlx4_driver;
5598 priv->dev = eth_dev;
5599 eth_dev->dev_ops = &mlx4_dev_ops;
5600 TAILQ_INIT(ð_dev->link_intr_cbs);
5602 /* Bring Ethernet device up. */
5603 DEBUG("forcing Ethernet interface up");
5604 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5610 claim_zero(ibv_dealloc_pd(pd));
5612 claim_zero(ibv_close_device(ctx));
5614 rte_eth_dev_release_port(eth_dev);
5619 * XXX if something went wrong in the loop above, there is a resource
5620 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5621 * long as the dpdk does not provide a way to deallocate a ethdev and a
5622 * way to enumerate the registered ethdevs to free the previous ones.
5625 /* no port found, complain */
5626 if (!mlx4_dev[idx].ports) {
5633 claim_zero(ibv_close_device(attr_ctx));
5635 ibv_free_device_list(list);
5640 static const struct rte_pci_id mlx4_pci_id_map[] = {
5642 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5643 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3,
5644 .subsystem_vendor_id = PCI_ANY_ID,
5645 .subsystem_device_id = PCI_ANY_ID
5648 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5649 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO,
5650 .subsystem_vendor_id = PCI_ANY_ID,
5651 .subsystem_device_id = PCI_ANY_ID
5654 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5655 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3VF,
5656 .subsystem_vendor_id = PCI_ANY_ID,
5657 .subsystem_device_id = PCI_ANY_ID
5664 static struct eth_driver mlx4_driver = {
5666 .name = MLX4_DRIVER_NAME,
5667 .id_table = mlx4_pci_id_map,
5668 .devinit = mlx4_pci_devinit,
5669 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5671 .dev_private_size = sizeof(struct priv)
5675 * Driver initialization routine.
5678 rte_mlx4_pmd_init(const char *name, const char *args)
5683 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5685 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5686 * huge pages. Calling ibv_fork_init() during init allows
5687 * applications to use fork() safely for purposes other than
5688 * using this PMD, which is not supported in forked processes.
5690 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5692 rte_eal_pci_register(&mlx4_driver.pci_drv);
5696 static struct rte_driver rte_mlx4_driver = {
5698 .name = MLX4_DRIVER_NAME,
5699 .init = rte_mlx4_pmd_init,
5702 PMD_REGISTER_DRIVER(rte_mlx4_driver)