4 * Copyright 2012-2015 6WIND S.A.
5 * Copyright 2012 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
57 #include <linux/ethtool.h>
58 #include <linux/sockios.h>
62 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
64 #pragma GCC diagnostic ignored "-pedantic"
66 #include <infiniband/verbs.h>
68 #pragma GCC diagnostic error "-pedantic"
71 /* DPDK headers don't like -pedantic. */
73 #pragma GCC diagnostic ignored "-pedantic"
75 #include <rte_ether.h>
76 #include <rte_ethdev.h>
79 #include <rte_errno.h>
80 #include <rte_mempool.h>
81 #include <rte_prefetch.h>
82 #include <rte_malloc.h>
83 #include <rte_spinlock.h>
84 #include <rte_atomic.h>
85 #include <rte_version.h>
87 #include <rte_alarm.h>
88 #include <rte_memory.h>
90 #pragma GCC diagnostic error "-pedantic"
93 /* Generated configuration header. */
94 #include "mlx4_autoconf.h"
99 /* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
100 * Intermediate LOG_*() macros add the required end-of-line characters. */
102 #define INFO(...) DEBUG(__VA_ARGS__)
103 #define WARN(...) DEBUG(__VA_ARGS__)
104 #define ERROR(...) DEBUG(__VA_ARGS__)
106 #define LOG__(level, m, ...) \
107 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
108 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
109 #define INFO(...) LOG_(INFO, __VA_ARGS__)
110 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
111 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
114 /* Convenience macros for accessing mbuf fields. */
115 #define NEXT(m) ((m)->next)
116 #define DATA_LEN(m) ((m)->data_len)
117 #define PKT_LEN(m) ((m)->pkt_len)
118 #define DATA_OFF(m) ((m)->data_off)
119 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
120 #define NB_SEGS(m) ((m)->nb_segs)
121 #define PORT(m) ((m)->port)
123 /* Work Request ID data type (64 bit). */
132 #define WR_ID(o) (((wr_id_t *)&(o))->data)
134 /* Transpose flags. Useful to convert IBV to DPDK flags. */
135 #define TRANSPOSE(val, from, to) \
136 (((from) >= (to)) ? \
137 (((val) & (from)) / ((from) / (to))) : \
138 (((val) & (from)) * ((to) / (from))))
140 struct mlx4_rxq_stats {
141 unsigned int idx; /**< Mapping index. */
142 #ifdef MLX4_PMD_SOFT_COUNTERS
143 uint64_t ipackets; /**< Total of successfully received packets. */
144 uint64_t ibytes; /**< Total of successfully received bytes. */
146 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
147 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
150 struct mlx4_txq_stats {
151 unsigned int idx; /**< Mapping index. */
152 #ifdef MLX4_PMD_SOFT_COUNTERS
153 uint64_t opackets; /**< Total of successfully sent packets. */
154 uint64_t obytes; /**< Total of successfully sent bytes. */
156 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
159 /* RX element (scattered packets). */
161 struct ibv_recv_wr wr; /* Work Request. */
162 struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
163 struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
168 struct ibv_recv_wr wr; /* Work Request. */
169 struct ibv_sge sge; /* Scatter/Gather Element. */
170 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
173 /* RX queue descriptor. */
175 struct priv *priv; /* Back pointer to private data. */
176 struct rte_mempool *mp; /* Memory Pool for allocations. */
177 struct ibv_mr *mr; /* Memory Region (for mp). */
178 struct ibv_cq *cq; /* Completion Queue. */
179 struct ibv_qp *qp; /* Queue Pair. */
180 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
181 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
183 * Each VLAN ID requires a separate flow steering rule.
185 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
186 struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
187 struct ibv_flow *promisc_flow; /* Promiscuous flow. */
188 struct ibv_flow *allmulti_flow; /* Multicast flow. */
189 unsigned int port_id; /* Port ID for incoming packets. */
190 unsigned int elts_n; /* (*elts)[] length. */
191 unsigned int elts_head; /* Current index in (*elts)[]. */
193 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
194 struct rxq_elt (*no_sp)[]; /* RX elements. */
196 unsigned int sp:1; /* Use scattered RX elements. */
197 unsigned int csum:1; /* Enable checksum offloading. */
198 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
199 struct mlx4_rxq_stats stats; /* RX queue counters. */
200 unsigned int socket; /* CPU socket ID for allocations. */
201 struct ibv_exp_res_domain *rd; /* Resource Domain. */
206 struct rte_mbuf *buf;
209 /* Linear buffer type. It is used when transmitting buffers with too many
210 * segments that do not fit the hardware queue (see max_send_sge).
211 * Extra segments are copied (linearized) in such buffers, replacing the
212 * last SGE during TX.
213 * The size is arbitrary but large enough to hold a jumbo frame with
214 * 8 segments considering mbuf.buf_len is about 2048 bytes. */
215 typedef uint8_t linear_t[16384];
217 /* TX queue descriptor. */
219 struct priv *priv; /* Back pointer to private data. */
221 const struct rte_mempool *mp; /* Cached Memory Pool. */
222 struct ibv_mr *mr; /* Memory Region (for mp). */
223 uint32_t lkey; /* mr->lkey */
224 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
225 struct ibv_cq *cq; /* Completion Queue. */
226 struct ibv_qp *qp; /* Queue Pair. */
227 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
228 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
229 #if MLX4_PMD_MAX_INLINE > 0
230 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
232 unsigned int elts_n; /* (*elts)[] length. */
233 struct txq_elt (*elts)[]; /* TX elements. */
234 unsigned int elts_head; /* Current index in (*elts)[]. */
235 unsigned int elts_tail; /* First element awaiting completion. */
236 unsigned int elts_comp; /* Number of completion requests. */
237 unsigned int elts_comp_cd; /* Countdown for next completion request. */
238 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
239 struct mlx4_txq_stats stats; /* TX queue counters. */
240 linear_t (*elts_linear)[]; /* Linearized buffers. */
241 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
242 unsigned int socket; /* CPU socket ID for allocations. */
243 struct ibv_exp_res_domain *rd; /* Resource Domain. */
247 struct rte_eth_dev *dev; /* Ethernet device. */
248 struct ibv_context *ctx; /* Verbs context. */
249 struct ibv_device_attr device_attr; /* Device properties. */
250 struct ibv_pd *pd; /* Protection Domain. */
252 * MAC addresses array and configuration bit-field.
253 * An extra entry that cannot be modified by the DPDK is reserved
254 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
256 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
257 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
260 unsigned int enabled:1; /* If enabled. */
261 unsigned int id:12; /* VLAN ID (0-4095). */
262 } vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
263 /* Device properties. */
264 uint16_t mtu; /* Configured MTU. */
265 uint8_t port; /* Physical port number. */
266 unsigned int started:1; /* Device started, flows enabled. */
267 unsigned int promisc:1; /* Device in promiscuous mode. */
268 unsigned int allmulti:1; /* Device receives all multicast packets. */
269 unsigned int hw_qpg:1; /* QP groups are supported. */
270 unsigned int hw_tss:1; /* TSS is supported. */
271 unsigned int hw_rss:1; /* RSS is supported. */
272 unsigned int hw_csum:1; /* Checksum offload is supported. */
273 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
274 unsigned int rss:1; /* RSS is enabled. */
275 unsigned int vf:1; /* This is a VF device. */
276 unsigned int pending_alarm:1; /* An alarm is pending. */
278 unsigned int inl_recv_size; /* Inline recv size */
280 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
282 struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
283 unsigned int rxqs_n; /* RX queues array size. */
284 unsigned int txqs_n; /* TX queues array size. */
285 struct rxq *(*rxqs)[]; /* RX queues. */
286 struct txq *(*txqs)[]; /* TX queues. */
287 struct rte_intr_handle intr_handle; /* Interrupt handler. */
288 rte_spinlock_t lock; /* Lock for control functions. */
291 /* Local storage for secondary process data. */
292 struct mlx4_secondary_data {
293 struct rte_eth_dev_data data; /* Local device data. */
294 struct priv *primary_priv; /* Private structure from primary. */
295 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
296 rte_spinlock_t lock; /* Port configuration lock. */
297 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
300 * Check if running as a secondary process.
303 * Nonzero if running as a secondary process.
306 mlx4_is_secondary(void)
308 return rte_eal_process_type() != RTE_PROC_PRIMARY;
312 * Return private structure associated with an Ethernet device.
315 * Pointer to Ethernet device structure.
318 * Pointer to private structure.
321 mlx4_get_priv(struct rte_eth_dev *dev)
323 struct mlx4_secondary_data *sd;
325 if (!mlx4_is_secondary())
326 return dev->data->dev_private;
327 sd = &mlx4_secondary_data[dev->data->port_id];
328 return sd->data.dev_private;
332 * Lock private structure to protect it from concurrent access in the
336 * Pointer to private structure.
339 priv_lock(struct priv *priv)
341 rte_spinlock_lock(&priv->lock);
345 * Unlock private structure.
348 * Pointer to private structure.
351 priv_unlock(struct priv *priv)
353 rte_spinlock_unlock(&priv->lock);
356 /* Allocate a buffer on the stack and fill it with a printf format string. */
357 #define MKSTR(name, ...) \
358 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
360 snprintf(name, sizeof(name), __VA_ARGS__)
363 * Get interface name from private structure.
366 * Pointer to private structure.
368 * Interface name output buffer.
371 * 0 on success, -1 on failure and errno is set.
374 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
378 unsigned int dev_type = 0;
379 unsigned int dev_port_prev = ~0u;
380 char match[IF_NAMESIZE] = "";
383 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
389 while ((dent = readdir(dir)) != NULL) {
390 char *name = dent->d_name;
392 unsigned int dev_port;
395 if ((name[0] == '.') &&
396 ((name[1] == '\0') ||
397 ((name[1] == '.') && (name[2] == '\0'))))
400 MKSTR(path, "%s/device/net/%s/%s",
401 priv->ctx->device->ibdev_path, name,
402 (dev_type ? "dev_id" : "dev_port"));
404 file = fopen(path, "rb");
409 * Switch to dev_id when dev_port does not exist as
410 * is the case with Linux kernel versions < 3.15.
421 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
426 * Switch to dev_id when dev_port returns the same value for
427 * all ports. May happen when using a MOFED release older than
428 * 3.0 with a Linux kernel >= 3.15.
430 if (dev_port == dev_port_prev)
432 dev_port_prev = dev_port;
433 if (dev_port == (priv->port - 1u))
434 snprintf(match, sizeof(match), "%s", name);
437 if (match[0] == '\0')
439 strncpy(*ifname, match, sizeof(*ifname));
444 * Read from sysfs entry.
447 * Pointer to private structure.
449 * Entry name relative to sysfs path.
451 * Data output buffer.
456 * 0 on success, -1 on failure and errno is set.
459 priv_sysfs_read(const struct priv *priv, const char *entry,
460 char *buf, size_t size)
462 char ifname[IF_NAMESIZE];
467 if (priv_get_ifname(priv, &ifname))
470 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
473 file = fopen(path, "rb");
476 ret = fread(buf, 1, size, file);
478 if (((size_t)ret < size) && (ferror(file)))
488 * Write to sysfs entry.
491 * Pointer to private structure.
493 * Entry name relative to sysfs path.
500 * 0 on success, -1 on failure and errno is set.
503 priv_sysfs_write(const struct priv *priv, const char *entry,
504 char *buf, size_t size)
506 char ifname[IF_NAMESIZE];
511 if (priv_get_ifname(priv, &ifname))
514 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
517 file = fopen(path, "wb");
520 ret = fwrite(buf, 1, size, file);
522 if (((size_t)ret < size) || (ferror(file)))
532 * Get unsigned long sysfs property.
535 * Pointer to private structure.
537 * Entry name relative to sysfs path.
539 * Value output buffer.
542 * 0 on success, -1 on failure and errno is set.
545 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
548 unsigned long value_ret;
551 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
553 DEBUG("cannot read %s value from sysfs: %s",
554 name, strerror(errno));
557 value_str[ret] = '\0';
559 value_ret = strtoul(value_str, NULL, 0);
561 DEBUG("invalid %s value `%s': %s", name, value_str,
570 * Set unsigned long sysfs property.
573 * Pointer to private structure.
575 * Entry name relative to sysfs path.
580 * 0 on success, -1 on failure and errno is set.
583 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
586 MKSTR(value_str, "%lu", value);
588 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
590 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
591 name, value_str, value, strerror(errno));
598 * Perform ifreq ioctl() on associated Ethernet device.
601 * Pointer to private structure.
603 * Request number to pass to ioctl().
605 * Interface request structure output buffer.
608 * 0 on success, -1 on failure and errno is set.
611 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
613 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
618 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
619 ret = ioctl(sock, req, ifr);
628 * Pointer to private structure.
630 * MTU value output buffer.
633 * 0 on success, -1 on failure and errno is set.
636 priv_get_mtu(struct priv *priv, uint16_t *mtu)
638 unsigned long ulong_mtu;
640 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
650 * Pointer to private structure.
655 * 0 on success, -1 on failure and errno is set.
658 priv_set_mtu(struct priv *priv, uint16_t mtu)
662 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
663 priv_get_mtu(priv, &new_mtu))
675 * Pointer to private structure.
677 * Bitmask for flags that must remain untouched.
679 * Bitmask for flags to modify.
682 * 0 on success, -1 on failure and errno is set.
685 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
689 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
692 tmp |= (flags & (~keep));
693 return priv_set_sysfs_ulong(priv, "flags", tmp);
696 /* Device configuration. */
699 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
700 unsigned int socket, const struct rte_eth_txconf *conf);
703 txq_cleanup(struct txq *txq);
706 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
707 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
708 struct rte_mempool *mp);
711 rxq_cleanup(struct rxq *rxq);
714 * Ethernet device configuration.
716 * Prepare the driver for a given number of TX and RX queues.
717 * Allocate parent RSS queue when several RX queues are requested.
720 * Pointer to Ethernet device structure.
723 * 0 on success, errno value on failure.
726 dev_configure(struct rte_eth_dev *dev)
728 struct priv *priv = dev->data->dev_private;
729 unsigned int rxqs_n = dev->data->nb_rx_queues;
730 unsigned int txqs_n = dev->data->nb_tx_queues;
734 priv->rxqs = (void *)dev->data->rx_queues;
735 priv->txqs = (void *)dev->data->tx_queues;
736 if (txqs_n != priv->txqs_n) {
737 INFO("%p: TX queues number update: %u -> %u",
738 (void *)dev, priv->txqs_n, txqs_n);
739 priv->txqs_n = txqs_n;
741 if (rxqs_n == priv->rxqs_n)
743 if (!rte_is_power_of_2(rxqs_n)) {
746 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
747 WARN("%p: number of RX queues must be a power"
748 " of 2: %u queues among %u will be active",
749 (void *)dev, n_active, rxqs_n);
752 INFO("%p: RX queues number update: %u -> %u",
753 (void *)dev, priv->rxqs_n, rxqs_n);
754 /* If RSS is enabled, disable it first. */
758 /* Only if there are no remaining child RX queues. */
759 for (i = 0; (i != priv->rxqs_n); ++i)
760 if ((*priv->rxqs)[i] != NULL)
762 rxq_cleanup(&priv->rxq_parent);
767 /* Nothing else to do. */
768 priv->rxqs_n = rxqs_n;
771 /* Allocate a new RSS parent queue if supported by hardware. */
773 ERROR("%p: only a single RX queue can be configured when"
774 " hardware doesn't support RSS",
778 /* Fail if hardware doesn't support that many RSS queues. */
779 if (rxqs_n >= priv->max_rss_tbl_sz) {
780 ERROR("%p: only %u RX queues can be configured for RSS",
781 (void *)dev, priv->max_rss_tbl_sz);
786 priv->rxqs_n = rxqs_n;
787 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, 0, NULL, NULL);
790 /* Failure, rollback. */
798 * DPDK callback for Ethernet device configuration.
801 * Pointer to Ethernet device structure.
804 * 0 on success, negative errno value on failure.
807 mlx4_dev_configure(struct rte_eth_dev *dev)
809 struct priv *priv = dev->data->dev_private;
812 if (mlx4_is_secondary())
813 return -E_RTE_SECONDARY;
815 ret = dev_configure(dev);
821 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
822 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
825 * Configure secondary process queues from a private data pointer (primary
826 * or secondary) and update burst callbacks. Can take place only once.
828 * All queues must have been previously created by the primary process to
829 * avoid undefined behavior.
832 * Private data pointer from either primary or secondary process.
835 * Private data pointer from secondary process, NULL in case of error.
838 mlx4_secondary_data_setup(struct priv *priv)
840 unsigned int port_id = 0;
841 struct mlx4_secondary_data *sd;
844 unsigned int nb_tx_queues;
845 unsigned int nb_rx_queues;
848 /* priv must be valid at this point. */
849 assert(priv != NULL);
850 /* priv->dev must also be valid but may point to local memory from
851 * another process, possibly with the same address and must not
852 * be dereferenced yet. */
853 assert(priv->dev != NULL);
854 /* Determine port ID by finding out where priv comes from. */
856 sd = &mlx4_secondary_data[port_id];
857 rte_spinlock_lock(&sd->lock);
858 /* Primary process? */
859 if (sd->primary_priv == priv)
861 /* Secondary process? */
862 if (sd->data.dev_private == priv)
864 rte_spinlock_unlock(&sd->lock);
865 if (++port_id == RTE_DIM(mlx4_secondary_data))
868 /* Switch to secondary private structure. If private data has already
869 * been updated by another thread, there is nothing else to do. */
870 priv = sd->data.dev_private;
871 if (priv->dev->data == &sd->data)
873 /* Sanity checks. Secondary private structure is supposed to point
874 * to local eth_dev, itself still pointing to the shared device data
875 * structure allocated by the primary process. */
876 assert(sd->shared_dev_data != &sd->data);
877 assert(sd->data.nb_tx_queues == 0);
878 assert(sd->data.tx_queues == NULL);
879 assert(sd->data.nb_rx_queues == 0);
880 assert(sd->data.rx_queues == NULL);
881 assert(priv != sd->primary_priv);
882 assert(priv->dev->data == sd->shared_dev_data);
883 assert(priv->txqs_n == 0);
884 assert(priv->txqs == NULL);
885 assert(priv->rxqs_n == 0);
886 assert(priv->rxqs == NULL);
887 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
888 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
889 /* Allocate local storage for queues. */
890 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
891 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
892 RTE_CACHE_LINE_SIZE);
893 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
894 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
895 RTE_CACHE_LINE_SIZE);
896 if (tx_queues == NULL || rx_queues == NULL)
898 /* Lock to prevent control operations during setup. */
901 for (i = 0; i != nb_tx_queues; ++i) {
902 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
905 if (primary_txq == NULL)
907 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
908 primary_txq->socket);
910 if (txq_setup(priv->dev,
912 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
915 txq->stats.idx = primary_txq->stats.idx;
922 txq = tx_queues[--i];
929 for (i = 0; i != nb_rx_queues; ++i) {
930 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
932 if (primary_rxq == NULL)
934 /* Not supported yet. */
937 /* Update everything. */
938 priv->txqs = (void *)tx_queues;
939 priv->txqs_n = nb_tx_queues;
940 priv->rxqs = (void *)rx_queues;
941 priv->rxqs_n = nb_rx_queues;
942 sd->data.rx_queues = rx_queues;
943 sd->data.tx_queues = tx_queues;
944 sd->data.nb_rx_queues = nb_rx_queues;
945 sd->data.nb_tx_queues = nb_tx_queues;
946 sd->data.dev_link = sd->shared_dev_data->dev_link;
947 sd->data.mtu = sd->shared_dev_data->mtu;
948 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
949 sizeof(sd->data.rx_queue_state));
950 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
951 sizeof(sd->data.tx_queue_state));
952 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
953 /* Use local data from now on. */
955 priv->dev->data = &sd->data;
957 priv->dev->tx_pkt_burst = mlx4_tx_burst;
958 priv->dev->rx_pkt_burst = removed_rx_burst;
961 /* More sanity checks. */
962 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
963 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
964 assert(priv->dev->data == &sd->data);
965 rte_spinlock_unlock(&sd->lock);
971 rte_spinlock_unlock(&sd->lock);
975 /* TX queues handling. */
978 * Allocate TX queue elements.
981 * Pointer to TX queue structure.
983 * Number of elements to allocate.
986 * 0 on success, errno value on failure.
989 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
992 struct txq_elt (*elts)[elts_n] =
993 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
994 linear_t (*elts_linear)[elts_n] =
995 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
997 struct ibv_mr *mr_linear = NULL;
1000 if ((elts == NULL) || (elts_linear == NULL)) {
1001 ERROR("%p: can't allocate packets array", (void *)txq);
1006 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
1007 IBV_ACCESS_LOCAL_WRITE);
1008 if (mr_linear == NULL) {
1009 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
1014 for (i = 0; (i != elts_n); ++i) {
1015 struct txq_elt *elt = &(*elts)[i];
1019 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
1020 txq->elts_n = elts_n;
1025 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
1026 * at least 4 times per ring. */
1027 txq->elts_comp_cd_init =
1028 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
1029 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
1030 txq->elts_comp_cd = txq->elts_comp_cd_init;
1031 txq->elts_linear = elts_linear;
1032 txq->mr_linear = mr_linear;
1036 if (mr_linear != NULL)
1037 claim_zero(ibv_dereg_mr(mr_linear));
1039 rte_free(elts_linear);
1042 DEBUG("%p: failed, freed everything", (void *)txq);
1048 * Free TX queue elements.
1051 * Pointer to TX queue structure.
1054 txq_free_elts(struct txq *txq)
1056 unsigned int elts_n = txq->elts_n;
1057 unsigned int elts_head = txq->elts_head;
1058 unsigned int elts_tail = txq->elts_tail;
1059 struct txq_elt (*elts)[elts_n] = txq->elts;
1060 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
1061 struct ibv_mr *mr_linear = txq->mr_linear;
1063 DEBUG("%p: freeing WRs", (void *)txq);
1068 txq->elts_comp_cd = 0;
1069 txq->elts_comp_cd_init = 0;
1071 txq->elts_linear = NULL;
1072 txq->mr_linear = NULL;
1073 if (mr_linear != NULL)
1074 claim_zero(ibv_dereg_mr(mr_linear));
1076 rte_free(elts_linear);
1079 while (elts_tail != elts_head) {
1080 struct txq_elt *elt = &(*elts)[elts_tail];
1082 assert(elt->buf != NULL);
1083 rte_pktmbuf_free(elt->buf);
1086 memset(elt, 0x77, sizeof(*elt));
1088 if (++elts_tail == elts_n)
1096 * Clean up a TX queue.
1098 * Destroy objects, free allocated memory and reset the structure for reuse.
1101 * Pointer to TX queue structure.
1104 txq_cleanup(struct txq *txq)
1106 struct ibv_exp_release_intf_params params;
1109 DEBUG("cleaning up %p", (void *)txq);
1111 if (txq->if_qp != NULL) {
1112 assert(txq->priv != NULL);
1113 assert(txq->priv->ctx != NULL);
1114 assert(txq->qp != NULL);
1115 params = (struct ibv_exp_release_intf_params){
1118 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1122 if (txq->if_cq != NULL) {
1123 assert(txq->priv != NULL);
1124 assert(txq->priv->ctx != NULL);
1125 assert(txq->cq != NULL);
1126 params = (struct ibv_exp_release_intf_params){
1129 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1133 if (txq->qp != NULL)
1134 claim_zero(ibv_destroy_qp(txq->qp));
1135 if (txq->cq != NULL)
1136 claim_zero(ibv_destroy_cq(txq->cq));
1137 if (txq->rd != NULL) {
1138 struct ibv_exp_destroy_res_domain_attr attr = {
1142 assert(txq->priv != NULL);
1143 assert(txq->priv->ctx != NULL);
1144 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1148 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1149 if (txq->mp2mr[i].mp == NULL)
1151 assert(txq->mp2mr[i].mr != NULL);
1152 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1154 memset(txq, 0, sizeof(*txq));
1158 * Manage TX completions.
1160 * When sending a burst, mlx4_tx_burst() posts several WRs.
1161 * To improve performance, a completion event is only required once every
1162 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1163 * for other WRs, but this information would not be used anyway.
1166 * Pointer to TX queue structure.
1169 * 0 on success, -1 on failure.
1172 txq_complete(struct txq *txq)
1174 unsigned int elts_comp = txq->elts_comp;
1175 unsigned int elts_tail = txq->elts_tail;
1176 const unsigned int elts_n = txq->elts_n;
1179 if (unlikely(elts_comp == 0))
1182 DEBUG("%p: processing %u work requests completions",
1183 (void *)txq, elts_comp);
1185 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1186 if (unlikely(wcs_n == 0))
1188 if (unlikely(wcs_n < 0)) {
1189 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1190 (void *)txq, wcs_n);
1194 assert(elts_comp <= txq->elts_comp);
1196 * Assume WC status is successful as nothing can be done about it
1199 elts_tail += wcs_n * txq->elts_comp_cd_init;
1200 if (elts_tail >= elts_n)
1201 elts_tail -= elts_n;
1202 txq->elts_tail = elts_tail;
1203 txq->elts_comp = elts_comp;
1207 struct mlx4_check_mempool_data {
1213 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
1214 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
1215 void *opaque, struct rte_mempool_memhdr *memhdr,
1218 struct mlx4_check_mempool_data *data = opaque;
1223 /* It already failed, skip the next chunks. */
1226 /* It is the first chunk. */
1227 if (data->start == NULL && data->end == NULL) {
1228 data->start = memhdr->addr;
1229 data->end = data->start + memhdr->len;
1232 if (data->end == memhdr->addr) {
1233 data->end += memhdr->len;
1236 if (data->start == (char *)memhdr->addr + memhdr->len) {
1237 data->start -= memhdr->len;
1240 /* Error, mempool is not virtually contigous. */
1245 * Check if a mempool can be used: it must be virtually contiguous.
1248 * Pointer to memory pool.
1250 * Pointer to the start address of the mempool virtual memory area
1252 * Pointer to the end address of the mempool virtual memory area
1255 * 0 on success (mempool is virtually contiguous), -1 on error.
1257 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
1260 struct mlx4_check_mempool_data data;
1262 memset(&data, 0, sizeof(data));
1263 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
1264 *start = (uintptr_t)data.start;
1265 *end = (uintptr_t)data.end;
1270 /* For best performance, this function should not be inlined. */
1271 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1272 __attribute__((noinline));
1275 * Register mempool as a memory region.
1278 * Pointer to protection domain.
1280 * Pointer to memory pool.
1283 * Memory region pointer, NULL in case of error.
1285 static struct ibv_mr *
1286 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1288 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1293 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1294 ERROR("mempool %p: not virtually contiguous",
1299 DEBUG("mempool %p area start=%p end=%p size=%zu",
1300 (void *)mp, (void *)start, (void *)end,
1301 (size_t)(end - start));
1302 /* Round start and end to page boundary if found in memory segments. */
1303 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1304 uintptr_t addr = (uintptr_t)ms[i].addr;
1305 size_t len = ms[i].len;
1306 unsigned int align = ms[i].hugepage_sz;
1308 if ((start > addr) && (start < addr + len))
1309 start = RTE_ALIGN_FLOOR(start, align);
1310 if ((end > addr) && (end < addr + len))
1311 end = RTE_ALIGN_CEIL(end, align);
1313 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1314 (void *)mp, (void *)start, (void *)end,
1315 (size_t)(end - start));
1316 return ibv_reg_mr(pd,
1319 IBV_ACCESS_LOCAL_WRITE);
1323 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1324 * the cloned mbuf is allocated is returned instead.
1330 * Memory pool where data is located for given mbuf.
1332 static struct rte_mempool *
1333 txq_mb2mp(struct rte_mbuf *buf)
1335 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1336 return rte_mbuf_from_indirect(buf)->pool;
1341 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1342 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1343 * remove an entry first.
1346 * Pointer to TX queue structure.
1348 * Memory Pool for which a Memory Region lkey must be returned.
1351 * mr->lkey on success, (uint32_t)-1 on failure.
1354 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1359 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1360 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1361 /* Unknown MP, add a new MR for it. */
1364 if (txq->mp2mr[i].mp == mp) {
1365 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1366 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1367 return txq->mp2mr[i].lkey;
1370 /* Add a new entry, register MR first. */
1371 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1372 (void *)txq, mp->name, (void *)mp);
1373 mr = mlx4_mp2mr(txq->priv->pd, mp);
1374 if (unlikely(mr == NULL)) {
1375 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1377 return (uint32_t)-1;
1379 if (unlikely(i == elemof(txq->mp2mr))) {
1380 /* Table is full, remove oldest entry. */
1381 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1384 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1385 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1386 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1388 /* Store the new entry. */
1389 txq->mp2mr[i].mp = mp;
1390 txq->mp2mr[i].mr = mr;
1391 txq->mp2mr[i].lkey = mr->lkey;
1392 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1393 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1394 return txq->mp2mr[i].lkey;
1397 struct txq_mp2mr_mbuf_check_data {
1402 * Callback function for rte_mempool_obj_iter() to check whether a given
1403 * mempool object looks like a mbuf.
1406 * The mempool pointer
1408 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1413 * Object index, unused.
1416 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1417 uint32_t index __rte_unused)
1419 struct txq_mp2mr_mbuf_check_data *data = arg;
1420 struct rte_mbuf *buf = obj;
1422 /* Check whether mbuf structure fits element size and whether mempool
1423 * pointer is valid. */
1424 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1429 * Iterator function for rte_mempool_walk() to register existing mempools and
1430 * fill the MP to MR cache of a TX queue.
1433 * Memory Pool to register.
1435 * Pointer to TX queue structure.
1438 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1440 struct txq *txq = arg;
1441 struct txq_mp2mr_mbuf_check_data data = {
1445 /* Register mempool only if the first element looks like a mbuf. */
1446 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1452 #if MLX4_PMD_SGE_WR_N > 1
1455 * Copy scattered mbuf contents to a single linear buffer.
1457 * @param[out] linear
1458 * Linear output buffer.
1460 * Scattered input buffer.
1463 * Number of bytes copied to the output buffer or 0 if not large enough.
1466 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1468 unsigned int size = 0;
1469 unsigned int offset;
1472 unsigned int len = DATA_LEN(buf);
1476 if (unlikely(size > sizeof(*linear)))
1478 memcpy(&(*linear)[offset],
1479 rte_pktmbuf_mtod(buf, uint8_t *),
1482 } while (buf != NULL);
1487 * Handle scattered buffers for mlx4_tx_burst().
1490 * TX queue structure.
1492 * Number of segments in buf.
1494 * TX queue element to fill.
1496 * Buffer to process.
1498 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1500 * Array filled with SGEs on success.
1503 * A structure containing the processed packet size in bytes and the
1504 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1507 static struct tx_burst_sg_ret {
1508 unsigned int length;
1511 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1512 struct rte_mbuf *buf, unsigned int elts_head,
1513 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1515 unsigned int sent_size = 0;
1519 /* When there are too many segments, extra segments are
1520 * linearized in the last SGE. */
1521 if (unlikely(segs > elemof(*sges))) {
1522 segs = (elemof(*sges) - 1);
1525 /* Update element. */
1527 /* Register segments as SGEs. */
1528 for (j = 0; (j != segs); ++j) {
1529 struct ibv_sge *sge = &(*sges)[j];
1532 /* Retrieve Memory Region key for this memory pool. */
1533 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1534 if (unlikely(lkey == (uint32_t)-1)) {
1535 /* MR does not exist. */
1536 DEBUG("%p: unable to get MP <-> MR association",
1538 /* Clean up TX element. */
1543 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1545 rte_prefetch0((volatile void *)
1546 (uintptr_t)sge->addr);
1547 sge->length = DATA_LEN(buf);
1549 sent_size += sge->length;
1552 /* If buf is not NULL here and is not going to be linearized,
1553 * nb_segs is not valid. */
1555 assert((buf == NULL) || (linearize));
1556 /* Linearize extra segments. */
1558 struct ibv_sge *sge = &(*sges)[segs];
1559 linear_t *linear = &(*txq->elts_linear)[elts_head];
1560 unsigned int size = linearize_mbuf(linear, buf);
1562 assert(segs == (elemof(*sges) - 1));
1564 /* Invalid packet. */
1565 DEBUG("%p: packet too large to be linearized.",
1567 /* Clean up TX element. */
1571 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1572 if (elemof(*sges) == 1) {
1574 struct rte_mbuf *next = NEXT(buf);
1576 rte_pktmbuf_free_seg(buf);
1578 } while (buf != NULL);
1582 sge->addr = (uintptr_t)&(*linear)[0];
1584 sge->lkey = txq->mr_linear->lkey;
1586 /* Include last segment. */
1589 return (struct tx_burst_sg_ret){
1590 .length = sent_size,
1594 return (struct tx_burst_sg_ret){
1600 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1603 * DPDK callback for TX.
1606 * Generic pointer to TX queue structure.
1608 * Packets to transmit.
1610 * Number of packets in array.
1613 * Number of packets successfully transmitted (<= pkts_n).
1616 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1618 struct txq *txq = (struct txq *)dpdk_txq;
1619 unsigned int elts_head = txq->elts_head;
1620 const unsigned int elts_n = txq->elts_n;
1621 unsigned int elts_comp_cd = txq->elts_comp_cd;
1622 unsigned int elts_comp = 0;
1627 assert(elts_comp_cd != 0);
1629 max = (elts_n - (elts_head - txq->elts_tail));
1633 assert(max <= elts_n);
1634 /* Always leave one free entry in the ring. */
1640 for (i = 0; (i != max); ++i) {
1641 struct rte_mbuf *buf = pkts[i];
1642 unsigned int elts_head_next =
1643 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1644 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1645 struct txq_elt *elt = &(*txq->elts)[elts_head];
1646 unsigned int segs = NB_SEGS(buf);
1647 #ifdef MLX4_PMD_SOFT_COUNTERS
1648 unsigned int sent_size = 0;
1650 uint32_t send_flags = 0;
1652 /* Clean up old buffer. */
1653 if (likely(elt->buf != NULL)) {
1654 struct rte_mbuf *tmp = elt->buf;
1658 memset(elt, 0x66, sizeof(*elt));
1660 /* Faster than rte_pktmbuf_free(). */
1662 struct rte_mbuf *next = NEXT(tmp);
1664 rte_pktmbuf_free_seg(tmp);
1666 } while (tmp != NULL);
1668 /* Request TX completion. */
1669 if (unlikely(--elts_comp_cd == 0)) {
1670 elts_comp_cd = txq->elts_comp_cd_init;
1672 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1674 /* Should we enable HW CKSUM offload */
1676 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1677 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1678 /* HW does not support checksum offloads at arbitrary
1679 * offsets but automatically recognizes the packet
1680 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1681 * tunnels are currently supported. */
1682 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1683 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1685 if (likely(segs == 1)) {
1690 /* Retrieve buffer information. */
1691 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1692 length = DATA_LEN(buf);
1693 /* Retrieve Memory Region key for this memory pool. */
1694 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1695 if (unlikely(lkey == (uint32_t)-1)) {
1696 /* MR does not exist. */
1697 DEBUG("%p: unable to get MP <-> MR"
1698 " association", (void *)txq);
1699 /* Clean up TX element. */
1703 /* Update element. */
1706 rte_prefetch0((volatile void *)
1708 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1709 /* Put packet into send queue. */
1710 #if MLX4_PMD_MAX_INLINE > 0
1711 if (length <= txq->max_inline)
1712 err = txq->if_qp->send_pending_inline
1719 err = txq->if_qp->send_pending
1727 #ifdef MLX4_PMD_SOFT_COUNTERS
1728 sent_size += length;
1731 #if MLX4_PMD_SGE_WR_N > 1
1732 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1733 struct tx_burst_sg_ret ret;
1735 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1737 if (ret.length == (unsigned int)-1)
1739 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1740 /* Put SG list into send queue. */
1741 err = txq->if_qp->send_pending_sg_list
1748 #ifdef MLX4_PMD_SOFT_COUNTERS
1749 sent_size += ret.length;
1751 #else /* MLX4_PMD_SGE_WR_N > 1 */
1752 DEBUG("%p: TX scattered buffers support not"
1753 " compiled in", (void *)txq);
1755 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1757 elts_head = elts_head_next;
1758 #ifdef MLX4_PMD_SOFT_COUNTERS
1759 /* Increment sent bytes counter. */
1760 txq->stats.obytes += sent_size;
1764 /* Take a shortcut if nothing must be sent. */
1765 if (unlikely(i == 0))
1767 #ifdef MLX4_PMD_SOFT_COUNTERS
1768 /* Increment sent packets counter. */
1769 txq->stats.opackets += i;
1771 /* Ring QP doorbell. */
1772 err = txq->if_qp->send_flush(txq->qp);
1773 if (unlikely(err)) {
1774 /* A nonzero value is not supposed to be returned.
1775 * Nothing can be done about it. */
1776 DEBUG("%p: send_flush() failed with error %d",
1779 txq->elts_head = elts_head;
1780 txq->elts_comp += elts_comp;
1781 txq->elts_comp_cd = elts_comp_cd;
1786 * DPDK callback for TX in secondary processes.
1788 * This function configures all queues from primary process information
1789 * if necessary before reverting to the normal TX burst callback.
1792 * Generic pointer to TX queue structure.
1794 * Packets to transmit.
1796 * Number of packets in array.
1799 * Number of packets successfully transmitted (<= pkts_n).
1802 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1805 struct txq *txq = dpdk_txq;
1806 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1807 struct priv *primary_priv;
1813 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1814 /* Look for queue index in both private structures. */
1815 for (index = 0; index != priv->txqs_n; ++index)
1816 if (((*primary_priv->txqs)[index] == txq) ||
1817 ((*priv->txqs)[index] == txq))
1819 if (index == priv->txqs_n)
1821 txq = (*priv->txqs)[index];
1822 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1826 * Configure a TX queue.
1829 * Pointer to Ethernet device structure.
1831 * Pointer to TX queue structure.
1833 * Number of descriptors to configure in queue.
1835 * NUMA socket on which memory must be allocated.
1837 * Thresholds parameters.
1840 * 0 on success, errno value on failure.
1843 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1844 unsigned int socket, const struct rte_eth_txconf *conf)
1846 struct priv *priv = mlx4_get_priv(dev);
1852 struct ibv_exp_query_intf_params params;
1853 struct ibv_exp_qp_init_attr init;
1854 struct ibv_exp_res_domain_init_attr rd;
1855 struct ibv_exp_cq_init_attr cq;
1856 struct ibv_exp_qp_attr mod;
1858 enum ibv_exp_query_intf_status status;
1861 (void)conf; /* Thresholds configuration (ignored). */
1864 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1865 ERROR("%p: invalid number of TX descriptors (must be a"
1866 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1869 desc /= MLX4_PMD_SGE_WR_N;
1870 /* MRs will be registered in mp2mr[] later. */
1871 attr.rd = (struct ibv_exp_res_domain_init_attr){
1872 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1873 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1874 .thread_model = IBV_EXP_THREAD_SINGLE,
1875 .msg_model = IBV_EXP_MSG_HIGH_BW,
1877 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1878 if (tmpl.rd == NULL) {
1880 ERROR("%p: RD creation failure: %s",
1881 (void *)dev, strerror(ret));
1884 attr.cq = (struct ibv_exp_cq_init_attr){
1885 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1886 .res_domain = tmpl.rd,
1888 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1889 if (tmpl.cq == NULL) {
1891 ERROR("%p: CQ creation failure: %s",
1892 (void *)dev, strerror(ret));
1895 DEBUG("priv->device_attr.max_qp_wr is %d",
1896 priv->device_attr.max_qp_wr);
1897 DEBUG("priv->device_attr.max_sge is %d",
1898 priv->device_attr.max_sge);
1899 attr.init = (struct ibv_exp_qp_init_attr){
1900 /* CQ to be associated with the send queue. */
1902 /* CQ to be associated with the receive queue. */
1905 /* Max number of outstanding WRs. */
1906 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1907 priv->device_attr.max_qp_wr :
1909 /* Max number of scatter/gather elements in a WR. */
1910 .max_send_sge = ((priv->device_attr.max_sge <
1911 MLX4_PMD_SGE_WR_N) ?
1912 priv->device_attr.max_sge :
1914 #if MLX4_PMD_MAX_INLINE > 0
1915 .max_inline_data = MLX4_PMD_MAX_INLINE,
1918 .qp_type = IBV_QPT_RAW_PACKET,
1919 /* Do *NOT* enable this, completions events are managed per
1923 .res_domain = tmpl.rd,
1924 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1925 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1927 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1928 if (tmpl.qp == NULL) {
1929 ret = (errno ? errno : EINVAL);
1930 ERROR("%p: QP creation failure: %s",
1931 (void *)dev, strerror(ret));
1934 #if MLX4_PMD_MAX_INLINE > 0
1935 /* ibv_create_qp() updates this value. */
1936 tmpl.max_inline = attr.init.cap.max_inline_data;
1938 attr.mod = (struct ibv_exp_qp_attr){
1939 /* Move the QP to this state. */
1940 .qp_state = IBV_QPS_INIT,
1941 /* Primary port number. */
1942 .port_num = priv->port
1944 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1945 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1947 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1948 (void *)dev, strerror(ret));
1951 ret = txq_alloc_elts(&tmpl, desc);
1953 ERROR("%p: TXQ allocation failed: %s",
1954 (void *)dev, strerror(ret));
1957 attr.mod = (struct ibv_exp_qp_attr){
1958 .qp_state = IBV_QPS_RTR
1960 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1962 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1963 (void *)dev, strerror(ret));
1966 attr.mod.qp_state = IBV_QPS_RTS;
1967 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1969 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1970 (void *)dev, strerror(ret));
1973 attr.params = (struct ibv_exp_query_intf_params){
1974 .intf_scope = IBV_EXP_INTF_GLOBAL,
1975 .intf = IBV_EXP_INTF_CQ,
1978 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1979 if (tmpl.if_cq == NULL) {
1980 ERROR("%p: CQ interface family query failed with status %d",
1981 (void *)dev, status);
1984 attr.params = (struct ibv_exp_query_intf_params){
1985 .intf_scope = IBV_EXP_INTF_GLOBAL,
1986 .intf = IBV_EXP_INTF_QP_BURST,
1988 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1989 /* MC loopback must be disabled when not using a VF. */
1992 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1996 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1997 if (tmpl.if_qp == NULL) {
1998 ERROR("%p: QP interface family query failed with status %d",
1999 (void *)dev, status);
2002 /* Clean up txq in case we're reinitializing it. */
2003 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
2006 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
2007 /* Pre-register known mempools. */
2008 rte_mempool_walk(txq_mp2mr_iter, txq);
2018 * DPDK callback to configure a TX queue.
2021 * Pointer to Ethernet device structure.
2025 * Number of descriptors to configure in queue.
2027 * NUMA socket on which memory must be allocated.
2029 * Thresholds parameters.
2032 * 0 on success, negative errno value on failure.
2035 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
2036 unsigned int socket, const struct rte_eth_txconf *conf)
2038 struct priv *priv = dev->data->dev_private;
2039 struct txq *txq = (*priv->txqs)[idx];
2042 if (mlx4_is_secondary())
2043 return -E_RTE_SECONDARY;
2045 DEBUG("%p: configuring queue %u for %u descriptors",
2046 (void *)dev, idx, desc);
2047 if (idx >= priv->txqs_n) {
2048 ERROR("%p: queue index out of range (%u >= %u)",
2049 (void *)dev, idx, priv->txqs_n);
2054 DEBUG("%p: reusing already allocated queue index %u (%p)",
2055 (void *)dev, idx, (void *)txq);
2056 if (priv->started) {
2060 (*priv->txqs)[idx] = NULL;
2063 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
2065 ERROR("%p: unable to allocate queue index %u",
2071 ret = txq_setup(dev, txq, desc, socket, conf);
2075 txq->stats.idx = idx;
2076 DEBUG("%p: adding TX queue %p to list",
2077 (void *)dev, (void *)txq);
2078 (*priv->txqs)[idx] = txq;
2079 /* Update send callback. */
2080 dev->tx_pkt_burst = mlx4_tx_burst;
2087 * DPDK callback to release a TX queue.
2090 * Generic TX queue pointer.
2093 mlx4_tx_queue_release(void *dpdk_txq)
2095 struct txq *txq = (struct txq *)dpdk_txq;
2099 if (mlx4_is_secondary())
2105 for (i = 0; (i != priv->txqs_n); ++i)
2106 if ((*priv->txqs)[i] == txq) {
2107 DEBUG("%p: removing TX queue %p from list",
2108 (void *)priv->dev, (void *)txq);
2109 (*priv->txqs)[i] = NULL;
2117 /* RX queues handling. */
2120 * Allocate RX queue elements with scattered packets support.
2123 * Pointer to RX queue structure.
2125 * Number of elements to allocate.
2127 * If not NULL, fetch buffers from this array instead of allocating them
2128 * with rte_pktmbuf_alloc().
2131 * 0 on success, errno value on failure.
2134 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2135 struct rte_mbuf **pool)
2138 struct rxq_elt_sp (*elts)[elts_n] =
2139 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2144 ERROR("%p: can't allocate packets array", (void *)rxq);
2148 /* For each WR (packet). */
2149 for (i = 0; (i != elts_n); ++i) {
2151 struct rxq_elt_sp *elt = &(*elts)[i];
2152 struct ibv_recv_wr *wr = &elt->wr;
2153 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2155 /* These two arrays must have the same size. */
2156 assert(elemof(elt->sges) == elemof(elt->bufs));
2159 wr->next = &(*elts)[(i + 1)].wr;
2160 wr->sg_list = &(*sges)[0];
2161 wr->num_sge = elemof(*sges);
2162 /* For each SGE (segment). */
2163 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2164 struct ibv_sge *sge = &(*sges)[j];
2165 struct rte_mbuf *buf;
2169 assert(buf != NULL);
2170 rte_pktmbuf_reset(buf);
2172 buf = rte_pktmbuf_alloc(rxq->mp);
2174 assert(pool == NULL);
2175 ERROR("%p: empty mbuf pool", (void *)rxq);
2180 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2181 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2182 /* Buffer is supposed to be empty. */
2183 assert(rte_pktmbuf_data_len(buf) == 0);
2184 assert(rte_pktmbuf_pkt_len(buf) == 0);
2185 /* sge->addr must be able to store a pointer. */
2186 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2188 /* The first SGE keeps its headroom. */
2189 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2190 sge->length = (buf->buf_len -
2191 RTE_PKTMBUF_HEADROOM);
2193 /* Subsequent SGEs lose theirs. */
2194 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2195 SET_DATA_OFF(buf, 0);
2196 sge->addr = (uintptr_t)buf->buf_addr;
2197 sge->length = buf->buf_len;
2199 sge->lkey = rxq->mr->lkey;
2200 /* Redundant check for tailroom. */
2201 assert(sge->length == rte_pktmbuf_tailroom(buf));
2204 /* The last WR pointer must be NULL. */
2205 (*elts)[(i - 1)].wr.next = NULL;
2206 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2207 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2208 rxq->elts_n = elts_n;
2210 rxq->elts.sp = elts;
2215 assert(pool == NULL);
2216 for (i = 0; (i != elemof(*elts)); ++i) {
2218 struct rxq_elt_sp *elt = &(*elts)[i];
2220 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2221 struct rte_mbuf *buf = elt->bufs[j];
2224 rte_pktmbuf_free_seg(buf);
2229 DEBUG("%p: failed, freed everything", (void *)rxq);
2235 * Free RX queue elements with scattered packets support.
2238 * Pointer to RX queue structure.
2241 rxq_free_elts_sp(struct rxq *rxq)
2244 unsigned int elts_n = rxq->elts_n;
2245 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2247 DEBUG("%p: freeing WRs", (void *)rxq);
2249 rxq->elts.sp = NULL;
2252 for (i = 0; (i != elemof(*elts)); ++i) {
2254 struct rxq_elt_sp *elt = &(*elts)[i];
2256 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2257 struct rte_mbuf *buf = elt->bufs[j];
2260 rte_pktmbuf_free_seg(buf);
2267 * Allocate RX queue elements.
2270 * Pointer to RX queue structure.
2272 * Number of elements to allocate.
2274 * If not NULL, fetch buffers from this array instead of allocating them
2275 * with rte_pktmbuf_alloc().
2278 * 0 on success, errno value on failure.
2281 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2284 struct rxq_elt (*elts)[elts_n] =
2285 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2290 ERROR("%p: can't allocate packets array", (void *)rxq);
2294 /* For each WR (packet). */
2295 for (i = 0; (i != elts_n); ++i) {
2296 struct rxq_elt *elt = &(*elts)[i];
2297 struct ibv_recv_wr *wr = &elt->wr;
2298 struct ibv_sge *sge = &(*elts)[i].sge;
2299 struct rte_mbuf *buf;
2303 assert(buf != NULL);
2304 rte_pktmbuf_reset(buf);
2306 buf = rte_pktmbuf_alloc(rxq->mp);
2308 assert(pool == NULL);
2309 ERROR("%p: empty mbuf pool", (void *)rxq);
2313 /* Configure WR. Work request ID contains its own index in
2314 * the elts array and the offset between SGE buffer header and
2316 WR_ID(wr->wr_id).id = i;
2317 WR_ID(wr->wr_id).offset =
2318 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2320 wr->next = &(*elts)[(i + 1)].wr;
2323 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2324 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2325 /* Buffer is supposed to be empty. */
2326 assert(rte_pktmbuf_data_len(buf) == 0);
2327 assert(rte_pktmbuf_pkt_len(buf) == 0);
2328 /* sge->addr must be able to store a pointer. */
2329 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2330 /* SGE keeps its headroom. */
2331 sge->addr = (uintptr_t)
2332 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2333 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2334 sge->lkey = rxq->mr->lkey;
2335 /* Redundant check for tailroom. */
2336 assert(sge->length == rte_pktmbuf_tailroom(buf));
2337 /* Make sure elts index and SGE mbuf pointer can be deduced
2339 if ((WR_ID(wr->wr_id).id != i) ||
2340 ((void *)((uintptr_t)sge->addr -
2341 WR_ID(wr->wr_id).offset) != buf)) {
2342 ERROR("%p: cannot store index and offset in WR ID",
2345 rte_pktmbuf_free(buf);
2350 /* The last WR pointer must be NULL. */
2351 (*elts)[(i - 1)].wr.next = NULL;
2352 DEBUG("%p: allocated and configured %u single-segment WRs",
2353 (void *)rxq, elts_n);
2354 rxq->elts_n = elts_n;
2356 rxq->elts.no_sp = elts;
2361 assert(pool == NULL);
2362 for (i = 0; (i != elemof(*elts)); ++i) {
2363 struct rxq_elt *elt = &(*elts)[i];
2364 struct rte_mbuf *buf;
2366 if (elt->sge.addr == 0)
2368 assert(WR_ID(elt->wr.wr_id).id == i);
2369 buf = (void *)((uintptr_t)elt->sge.addr -
2370 WR_ID(elt->wr.wr_id).offset);
2371 rte_pktmbuf_free_seg(buf);
2375 DEBUG("%p: failed, freed everything", (void *)rxq);
2381 * Free RX queue elements.
2384 * Pointer to RX queue structure.
2387 rxq_free_elts(struct rxq *rxq)
2390 unsigned int elts_n = rxq->elts_n;
2391 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2393 DEBUG("%p: freeing WRs", (void *)rxq);
2395 rxq->elts.no_sp = NULL;
2398 for (i = 0; (i != elemof(*elts)); ++i) {
2399 struct rxq_elt *elt = &(*elts)[i];
2400 struct rte_mbuf *buf;
2402 if (elt->sge.addr == 0)
2404 assert(WR_ID(elt->wr.wr_id).id == i);
2405 buf = (void *)((uintptr_t)elt->sge.addr -
2406 WR_ID(elt->wr.wr_id).offset);
2407 rte_pktmbuf_free_seg(buf);
2413 * Delete flow steering rule.
2416 * Pointer to RX queue structure.
2418 * MAC address index.
2423 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2426 struct priv *priv = rxq->priv;
2427 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2428 (const uint8_t (*)[ETHER_ADDR_LEN])
2429 priv->mac[mac_index].addr_bytes;
2431 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2432 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2433 " (VLAN ID %" PRIu16 ")",
2435 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2436 mac_index, priv->vlan_filter[vlan_index].id);
2437 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2438 rxq->mac_flow[mac_index][vlan_index] = NULL;
2442 * Unregister a MAC address from a RX queue.
2445 * Pointer to RX queue structure.
2447 * MAC address index.
2450 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2452 struct priv *priv = rxq->priv;
2454 unsigned int vlans = 0;
2456 assert(mac_index < elemof(priv->mac));
2457 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2459 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2460 if (!priv->vlan_filter[i].enabled)
2462 rxq_del_flow(rxq, mac_index, i);
2466 rxq_del_flow(rxq, mac_index, 0);
2468 BITFIELD_RESET(rxq->mac_configured, mac_index);
2472 * Unregister all MAC addresses from a RX queue.
2475 * Pointer to RX queue structure.
2478 rxq_mac_addrs_del(struct rxq *rxq)
2480 struct priv *priv = rxq->priv;
2483 for (i = 0; (i != elemof(priv->mac)); ++i)
2484 rxq_mac_addr_del(rxq, i);
2487 static int rxq_promiscuous_enable(struct rxq *);
2488 static void rxq_promiscuous_disable(struct rxq *);
2491 * Add single flow steering rule.
2494 * Pointer to RX queue structure.
2496 * MAC address index to register.
2498 * VLAN index. Use -1 for a flow without VLAN.
2501 * 0 on success, errno value on failure.
2504 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2506 struct ibv_flow *flow;
2507 struct priv *priv = rxq->priv;
2508 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2509 (const uint8_t (*)[ETHER_ADDR_LEN])
2510 priv->mac[mac_index].addr_bytes;
2512 /* Allocate flow specification on the stack. */
2513 struct __attribute__((packed)) {
2514 struct ibv_flow_attr attr;
2515 struct ibv_flow_spec_eth spec;
2517 struct ibv_flow_attr *attr = &data.attr;
2518 struct ibv_flow_spec_eth *spec = &data.spec;
2520 assert(mac_index < elemof(priv->mac));
2521 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2523 * No padding must be inserted by the compiler between attr and spec.
2524 * This layout is expected by libibverbs.
2526 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2527 *attr = (struct ibv_flow_attr){
2528 .type = IBV_FLOW_ATTR_NORMAL,
2533 *spec = (struct ibv_flow_spec_eth){
2534 .type = IBV_FLOW_SPEC_ETH,
2535 .size = sizeof(*spec),
2538 (*mac)[0], (*mac)[1], (*mac)[2],
2539 (*mac)[3], (*mac)[4], (*mac)[5]
2541 .vlan_tag = ((vlan_index != -1u) ?
2542 htons(priv->vlan_filter[vlan_index].id) :
2546 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2547 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2550 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2551 " (VLAN %s %" PRIu16 ")",
2553 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2555 ((vlan_index != -1u) ? "ID" : "index"),
2556 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2557 /* Create related flow. */
2559 flow = ibv_create_flow(rxq->qp, attr);
2561 /* It's not clear whether errno is always set in this case. */
2562 ERROR("%p: flow configuration failed, errno=%d: %s",
2564 (errno ? strerror(errno) : "Unknown error"));
2569 if (vlan_index == -1u)
2571 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2572 rxq->mac_flow[mac_index][vlan_index] = flow;
2577 * Register a MAC address in a RX queue.
2580 * Pointer to RX queue structure.
2582 * MAC address index to register.
2585 * 0 on success, errno value on failure.
2588 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2590 struct priv *priv = rxq->priv;
2592 unsigned int vlans = 0;
2595 assert(mac_index < elemof(priv->mac));
2596 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2597 rxq_mac_addr_del(rxq, mac_index);
2598 /* Fill VLAN specifications. */
2599 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2600 if (!priv->vlan_filter[i].enabled)
2602 /* Create related flow. */
2603 ret = rxq_add_flow(rxq, mac_index, i);
2608 /* Failure, rollback. */
2610 if (priv->vlan_filter[--i].enabled)
2611 rxq_del_flow(rxq, mac_index, i);
2615 /* In case there is no VLAN filter. */
2617 ret = rxq_add_flow(rxq, mac_index, -1);
2621 BITFIELD_SET(rxq->mac_configured, mac_index);
2626 * Register all MAC addresses in a RX queue.
2629 * Pointer to RX queue structure.
2632 * 0 on success, errno value on failure.
2635 rxq_mac_addrs_add(struct rxq *rxq)
2637 struct priv *priv = rxq->priv;
2641 for (i = 0; (i != elemof(priv->mac)); ++i) {
2642 if (!BITFIELD_ISSET(priv->mac_configured, i))
2644 ret = rxq_mac_addr_add(rxq, i);
2647 /* Failure, rollback. */
2649 rxq_mac_addr_del(rxq, --i);
2657 * Unregister a MAC address.
2659 * In RSS mode, the MAC address is unregistered from the parent queue,
2660 * otherwise it is unregistered from each queue directly.
2663 * Pointer to private structure.
2665 * MAC address index.
2668 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2672 assert(mac_index < elemof(priv->mac));
2673 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2676 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2679 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2680 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2682 BITFIELD_RESET(priv->mac_configured, mac_index);
2686 * Register a MAC address.
2688 * In RSS mode, the MAC address is registered in the parent queue,
2689 * otherwise it is registered in each queue directly.
2692 * Pointer to private structure.
2694 * MAC address index to use.
2696 * MAC address to register.
2699 * 0 on success, errno value on failure.
2702 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2703 const uint8_t (*mac)[ETHER_ADDR_LEN])
2708 assert(mac_index < elemof(priv->mac));
2709 /* First, make sure this address isn't already configured. */
2710 for (i = 0; (i != elemof(priv->mac)); ++i) {
2711 /* Skip this index, it's going to be reconfigured. */
2714 if (!BITFIELD_ISSET(priv->mac_configured, i))
2716 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2718 /* Address already configured elsewhere, return with error. */
2721 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2722 priv_mac_addr_del(priv, mac_index);
2723 priv->mac[mac_index] = (struct ether_addr){
2725 (*mac)[0], (*mac)[1], (*mac)[2],
2726 (*mac)[3], (*mac)[4], (*mac)[5]
2729 /* If device isn't started, this is all we need to do. */
2730 if (!priv->started) {
2732 /* Verify that all queues have this index disabled. */
2733 for (i = 0; (i != priv->rxqs_n); ++i) {
2734 if ((*priv->rxqs)[i] == NULL)
2736 assert(!BITFIELD_ISSET
2737 ((*priv->rxqs)[i]->mac_configured, mac_index));
2743 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2748 for (i = 0; (i != priv->rxqs_n); ++i) {
2749 if ((*priv->rxqs)[i] == NULL)
2751 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2754 /* Failure, rollback. */
2756 if ((*priv->rxqs)[(--i)] != NULL)
2757 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2761 BITFIELD_SET(priv->mac_configured, mac_index);
2766 * Enable allmulti mode in a RX queue.
2769 * Pointer to RX queue structure.
2772 * 0 on success, errno value on failure.
2775 rxq_allmulticast_enable(struct rxq *rxq)
2777 struct ibv_flow *flow;
2778 struct ibv_flow_attr attr = {
2779 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2781 .port = rxq->priv->port,
2785 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2786 if (rxq->allmulti_flow != NULL)
2789 flow = ibv_create_flow(rxq->qp, &attr);
2791 /* It's not clear whether errno is always set in this case. */
2792 ERROR("%p: flow configuration failed, errno=%d: %s",
2794 (errno ? strerror(errno) : "Unknown error"));
2799 rxq->allmulti_flow = flow;
2800 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2805 * Disable allmulti mode in a RX queue.
2808 * Pointer to RX queue structure.
2811 rxq_allmulticast_disable(struct rxq *rxq)
2813 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2814 if (rxq->allmulti_flow == NULL)
2816 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2817 rxq->allmulti_flow = NULL;
2818 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2822 * Enable promiscuous mode in a RX queue.
2825 * Pointer to RX queue structure.
2828 * 0 on success, errno value on failure.
2831 rxq_promiscuous_enable(struct rxq *rxq)
2833 struct ibv_flow *flow;
2834 struct ibv_flow_attr attr = {
2835 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2837 .port = rxq->priv->port,
2843 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2844 if (rxq->promisc_flow != NULL)
2847 flow = ibv_create_flow(rxq->qp, &attr);
2849 /* It's not clear whether errno is always set in this case. */
2850 ERROR("%p: flow configuration failed, errno=%d: %s",
2852 (errno ? strerror(errno) : "Unknown error"));
2857 rxq->promisc_flow = flow;
2858 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2863 * Disable promiscuous mode in a RX queue.
2866 * Pointer to RX queue structure.
2869 rxq_promiscuous_disable(struct rxq *rxq)
2873 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2874 if (rxq->promisc_flow == NULL)
2876 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2877 rxq->promisc_flow = NULL;
2878 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2882 * Clean up a RX queue.
2884 * Destroy objects, free allocated memory and reset the structure for reuse.
2887 * Pointer to RX queue structure.
2890 rxq_cleanup(struct rxq *rxq)
2892 struct ibv_exp_release_intf_params params;
2894 DEBUG("cleaning up %p", (void *)rxq);
2896 rxq_free_elts_sp(rxq);
2899 if (rxq->if_qp != NULL) {
2900 assert(rxq->priv != NULL);
2901 assert(rxq->priv->ctx != NULL);
2902 assert(rxq->qp != NULL);
2903 params = (struct ibv_exp_release_intf_params){
2906 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2910 if (rxq->if_cq != NULL) {
2911 assert(rxq->priv != NULL);
2912 assert(rxq->priv->ctx != NULL);
2913 assert(rxq->cq != NULL);
2914 params = (struct ibv_exp_release_intf_params){
2917 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2921 if (rxq->qp != NULL) {
2922 rxq_promiscuous_disable(rxq);
2923 rxq_allmulticast_disable(rxq);
2924 rxq_mac_addrs_del(rxq);
2925 claim_zero(ibv_destroy_qp(rxq->qp));
2927 if (rxq->cq != NULL)
2928 claim_zero(ibv_destroy_cq(rxq->cq));
2929 if (rxq->rd != NULL) {
2930 struct ibv_exp_destroy_res_domain_attr attr = {
2934 assert(rxq->priv != NULL);
2935 assert(rxq->priv->ctx != NULL);
2936 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2940 if (rxq->mr != NULL)
2941 claim_zero(ibv_dereg_mr(rxq->mr));
2942 memset(rxq, 0, sizeof(*rxq));
2946 * Translate RX completion flags to packet type.
2949 * RX completion flags returned by poll_length_flags().
2951 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2954 * Packet type for struct rte_mbuf.
2956 static inline uint32_t
2957 rxq_cq_to_pkt_type(uint32_t flags)
2961 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2964 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2966 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET, RTE_PTYPE_L3_IPV6) |
2968 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_INNER_L3_IPV4) |
2970 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_INNER_L3_IPV6);
2974 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2976 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_L3_IPV6);
2981 * Translate RX completion flags to offload flags.
2984 * Pointer to RX queue structure.
2986 * RX completion flags returned by poll_length_flags().
2989 * Offload flags (ol_flags) for struct rte_mbuf.
2991 static inline uint32_t
2992 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2994 uint32_t ol_flags = 0;
2999 IBV_EXP_CQ_RX_IP_CSUM_OK,
3000 PKT_RX_IP_CKSUM_BAD) |
3002 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
3003 PKT_RX_L4_CKSUM_BAD);
3005 * PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD are used in place
3006 * of PKT_RX_EIP_CKSUM_BAD because the latter is not functional
3009 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
3012 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
3013 PKT_RX_IP_CKSUM_BAD) |
3015 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
3016 PKT_RX_L4_CKSUM_BAD);
3021 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
3024 * DPDK callback for RX with scattered packets support.
3027 * Generic pointer to RX queue structure.
3029 * Array to store received packets.
3031 * Maximum number of packets in array.
3034 * Number of packets successfully received (<= pkts_n).
3037 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3039 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3040 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3041 const unsigned int elts_n = rxq->elts_n;
3042 unsigned int elts_head = rxq->elts_head;
3043 struct ibv_recv_wr head;
3044 struct ibv_recv_wr **next = &head.next;
3045 struct ibv_recv_wr *bad_wr;
3047 unsigned int pkts_ret = 0;
3050 if (unlikely(!rxq->sp))
3051 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
3052 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
3054 for (i = 0; (i != pkts_n); ++i) {
3055 struct rxq_elt_sp *elt = &(*elts)[elts_head];
3056 struct ibv_recv_wr *wr = &elt->wr;
3057 uint64_t wr_id = wr->wr_id;
3059 unsigned int pkt_buf_len;
3060 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
3061 struct rte_mbuf **pkt_buf_next = &pkt_buf;
3062 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
3066 /* Sanity checks. */
3070 assert(wr_id < rxq->elts_n);
3071 assert(wr->sg_list == elt->sges);
3072 assert(wr->num_sge == elemof(elt->sges));
3073 assert(elts_head < rxq->elts_n);
3074 assert(rxq->elts_head < rxq->elts_n);
3075 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3077 if (unlikely(ret < 0)) {
3081 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3083 /* ibv_poll_cq() must be used in case of failure. */
3084 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3085 if (unlikely(wcs_n == 0))
3087 if (unlikely(wcs_n < 0)) {
3088 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3089 (void *)rxq, wcs_n);
3093 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3094 /* Whatever, just repost the offending WR. */
3095 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3096 " completion status (%d): %s",
3097 (void *)rxq, wc.wr_id, wc.status,
3098 ibv_wc_status_str(wc.status));
3099 #ifdef MLX4_PMD_SOFT_COUNTERS
3100 /* Increment dropped packets counter. */
3101 ++rxq->stats.idropped;
3103 /* Link completed WRs together for repost. */
3114 /* Link completed WRs together for repost. */
3118 * Replace spent segments with new ones, concatenate and
3119 * return them as pkt_buf.
3122 struct ibv_sge *sge = &elt->sges[j];
3123 struct rte_mbuf *seg = elt->bufs[j];
3124 struct rte_mbuf *rep;
3125 unsigned int seg_tailroom;
3128 * Fetch initial bytes of packet descriptor into a
3129 * cacheline while allocating rep.
3132 rep = rte_mbuf_raw_alloc(rxq->mp);
3133 if (unlikely(rep == NULL)) {
3135 * Unable to allocate a replacement mbuf,
3138 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3139 " can't allocate a new mbuf",
3140 (void *)rxq, wr_id);
3141 if (pkt_buf != NULL) {
3142 *pkt_buf_next = NULL;
3143 rte_pktmbuf_free(pkt_buf);
3145 /* Increase out of memory counters. */
3146 ++rxq->stats.rx_nombuf;
3147 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3151 /* Poison user-modifiable fields in rep. */
3152 NEXT(rep) = (void *)((uintptr_t)-1);
3153 SET_DATA_OFF(rep, 0xdead);
3154 DATA_LEN(rep) = 0xd00d;
3155 PKT_LEN(rep) = 0xdeadd00d;
3156 NB_SEGS(rep) = 0x2a;
3160 assert(rep->buf_len == seg->buf_len);
3161 /* Reconfigure sge to use rep instead of seg. */
3162 assert(sge->lkey == rxq->mr->lkey);
3163 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3166 /* Update pkt_buf if it's the first segment, or link
3167 * seg to the previous one and update pkt_buf_next. */
3168 *pkt_buf_next = seg;
3169 pkt_buf_next = &NEXT(seg);
3170 /* Update seg information. */
3171 seg_tailroom = (seg->buf_len - seg_headroom);
3172 assert(sge->length == seg_tailroom);
3173 SET_DATA_OFF(seg, seg_headroom);
3174 if (likely(len <= seg_tailroom)) {
3176 DATA_LEN(seg) = len;
3179 assert(rte_pktmbuf_headroom(seg) ==
3181 assert(rte_pktmbuf_tailroom(seg) ==
3182 (seg_tailroom - len));
3185 DATA_LEN(seg) = seg_tailroom;
3186 PKT_LEN(seg) = seg_tailroom;
3188 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3189 assert(rte_pktmbuf_tailroom(seg) == 0);
3190 /* Fix len and clear headroom for next segments. */
3191 len -= seg_tailroom;
3194 /* Update head and tail segments. */
3195 *pkt_buf_next = NULL;
3196 assert(pkt_buf != NULL);
3198 NB_SEGS(pkt_buf) = j;
3199 PORT(pkt_buf) = rxq->port_id;
3200 PKT_LEN(pkt_buf) = pkt_buf_len;
3201 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3202 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3204 /* Return packet. */
3205 *(pkts++) = pkt_buf;
3207 #ifdef MLX4_PMD_SOFT_COUNTERS
3208 /* Increase bytes counter. */
3209 rxq->stats.ibytes += pkt_buf_len;
3212 if (++elts_head >= elts_n)
3216 if (unlikely(i == 0))
3221 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3223 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3224 if (unlikely(ret)) {
3225 /* Inability to repost WRs is fatal. */
3226 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3232 rxq->elts_head = elts_head;
3233 #ifdef MLX4_PMD_SOFT_COUNTERS
3234 /* Increase packets counter. */
3235 rxq->stats.ipackets += pkts_ret;
3241 * DPDK callback for RX.
3243 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3244 * manage scattered packets. Improves performance when MRU is lower than the
3245 * size of the first segment.
3248 * Generic pointer to RX queue structure.
3250 * Array to store received packets.
3252 * Maximum number of packets in array.
3255 * Number of packets successfully received (<= pkts_n).
3258 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3260 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3261 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3262 const unsigned int elts_n = rxq->elts_n;
3263 unsigned int elts_head = rxq->elts_head;
3264 struct ibv_sge sges[pkts_n];
3266 unsigned int pkts_ret = 0;
3269 if (unlikely(rxq->sp))
3270 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3271 for (i = 0; (i != pkts_n); ++i) {
3272 struct rxq_elt *elt = &(*elts)[elts_head];
3273 struct ibv_recv_wr *wr = &elt->wr;
3274 uint64_t wr_id = wr->wr_id;
3276 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3277 WR_ID(wr_id).offset);
3278 struct rte_mbuf *rep;
3281 /* Sanity checks. */
3282 assert(WR_ID(wr_id).id < rxq->elts_n);
3283 assert(wr->sg_list == &elt->sge);
3284 assert(wr->num_sge == 1);
3285 assert(elts_head < rxq->elts_n);
3286 assert(rxq->elts_head < rxq->elts_n);
3288 * Fetch initial bytes of packet descriptor into a
3289 * cacheline while allocating rep.
3291 rte_mbuf_prefetch_part1(seg);
3292 rte_mbuf_prefetch_part2(seg);
3293 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3295 if (unlikely(ret < 0)) {
3299 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3301 /* ibv_poll_cq() must be used in case of failure. */
3302 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3303 if (unlikely(wcs_n == 0))
3305 if (unlikely(wcs_n < 0)) {
3306 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3307 (void *)rxq, wcs_n);
3311 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3312 /* Whatever, just repost the offending WR. */
3313 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3314 " completion status (%d): %s",
3315 (void *)rxq, wc.wr_id, wc.status,
3316 ibv_wc_status_str(wc.status));
3317 #ifdef MLX4_PMD_SOFT_COUNTERS
3318 /* Increment dropped packets counter. */
3319 ++rxq->stats.idropped;
3321 /* Add SGE to array for repost. */
3330 rep = rte_mbuf_raw_alloc(rxq->mp);
3331 if (unlikely(rep == NULL)) {
3333 * Unable to allocate a replacement mbuf,
3336 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3337 " can't allocate a new mbuf",
3338 (void *)rxq, WR_ID(wr_id).id);
3339 /* Increase out of memory counters. */
3340 ++rxq->stats.rx_nombuf;
3341 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3345 /* Reconfigure sge to use rep instead of seg. */
3346 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3347 assert(elt->sge.lkey == rxq->mr->lkey);
3348 WR_ID(wr->wr_id).offset =
3349 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3351 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3353 /* Add SGE to array for repost. */
3356 /* Update seg information. */
3357 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3359 PORT(seg) = rxq->port_id;
3362 DATA_LEN(seg) = len;
3363 seg->packet_type = rxq_cq_to_pkt_type(flags);
3364 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3366 /* Return packet. */
3369 #ifdef MLX4_PMD_SOFT_COUNTERS
3370 /* Increase bytes counter. */
3371 rxq->stats.ibytes += len;
3374 if (++elts_head >= elts_n)
3378 if (unlikely(i == 0))
3382 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3384 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3385 if (unlikely(ret)) {
3386 /* Inability to repost WRs is fatal. */
3387 DEBUG("%p: recv_burst(): failed (ret=%d)",
3392 rxq->elts_head = elts_head;
3393 #ifdef MLX4_PMD_SOFT_COUNTERS
3394 /* Increase packets counter. */
3395 rxq->stats.ipackets += pkts_ret;
3401 * DPDK callback for RX in secondary processes.
3403 * This function configures all queues from primary process information
3404 * if necessary before reverting to the normal RX burst callback.
3407 * Generic pointer to RX queue structure.
3409 * Array to store received packets.
3411 * Maximum number of packets in array.
3414 * Number of packets successfully received (<= pkts_n).
3417 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3420 struct rxq *rxq = dpdk_rxq;
3421 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3422 struct priv *primary_priv;
3428 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3429 /* Look for queue index in both private structures. */
3430 for (index = 0; index != priv->rxqs_n; ++index)
3431 if (((*primary_priv->rxqs)[index] == rxq) ||
3432 ((*priv->rxqs)[index] == rxq))
3434 if (index == priv->rxqs_n)
3436 rxq = (*priv->rxqs)[index];
3437 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3441 * Allocate a Queue Pair.
3442 * Optionally setup inline receive if supported.
3445 * Pointer to private structure.
3447 * Completion queue to associate with QP.
3449 * Number of descriptors in QP (hint only).
3452 * QP pointer or NULL in case of error.
3454 static struct ibv_qp *
3455 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3456 struct ibv_exp_res_domain *rd)
3458 struct ibv_exp_qp_init_attr attr = {
3459 /* CQ to be associated with the send queue. */
3461 /* CQ to be associated with the receive queue. */
3464 /* Max number of outstanding WRs. */
3465 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3466 priv->device_attr.max_qp_wr :
3468 /* Max number of scatter/gather elements in a WR. */
3469 .max_recv_sge = ((priv->device_attr.max_sge <
3470 MLX4_PMD_SGE_WR_N) ?
3471 priv->device_attr.max_sge :
3474 .qp_type = IBV_QPT_RAW_PACKET,
3475 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3476 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3482 attr.max_inl_recv = priv->inl_recv_size;
3483 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3485 return ibv_exp_create_qp(priv->ctx, &attr);
3491 * Allocate a RSS Queue Pair.
3492 * Optionally setup inline receive if supported.
3495 * Pointer to private structure.
3497 * Completion queue to associate with QP.
3499 * Number of descriptors in QP (hint only).
3501 * If nonzero, create a parent QP, otherwise a child.
3504 * QP pointer or NULL in case of error.
3506 static struct ibv_qp *
3507 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3508 int parent, struct ibv_exp_res_domain *rd)
3510 struct ibv_exp_qp_init_attr attr = {
3511 /* CQ to be associated with the send queue. */
3513 /* CQ to be associated with the receive queue. */
3516 /* Max number of outstanding WRs. */
3517 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3518 priv->device_attr.max_qp_wr :
3520 /* Max number of scatter/gather elements in a WR. */
3521 .max_recv_sge = ((priv->device_attr.max_sge <
3522 MLX4_PMD_SGE_WR_N) ?
3523 priv->device_attr.max_sge :
3526 .qp_type = IBV_QPT_RAW_PACKET,
3527 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3528 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3529 IBV_EXP_QP_INIT_ATTR_QPG),
3535 attr.max_inl_recv = priv->inl_recv_size,
3536 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3539 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3540 /* TSS isn't necessary. */
3541 attr.qpg.parent_attrib.tss_child_count = 0;
3542 attr.qpg.parent_attrib.rss_child_count =
3543 rte_align32pow2(priv->rxqs_n + 1) >> 1;
3544 DEBUG("initializing parent RSS queue");
3546 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3547 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3548 DEBUG("initializing child RSS queue");
3550 return ibv_exp_create_qp(priv->ctx, &attr);
3553 #endif /* RSS_SUPPORT */
3556 * Reconfigure a RX queue with new parameters.
3558 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3559 * thread (such as a control thread), may corrupt the pool.
3560 * In case of failure, the queue is left untouched.
3563 * Pointer to Ethernet device structure.
3568 * 0 on success, errno value on failure.
3571 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3573 struct priv *priv = rxq->priv;
3574 struct rxq tmpl = *rxq;
3575 unsigned int mbuf_n;
3576 unsigned int desc_n;
3577 struct rte_mbuf **pool;
3579 struct ibv_exp_qp_attr mod;
3580 struct ibv_recv_wr *bad_wr;
3581 unsigned int mb_len;
3583 int parent = (rxq == &priv->rxq_parent);
3586 ERROR("%p: cannot rehash parent queue %p",
3587 (void *)dev, (void *)rxq);
3590 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
3591 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3592 /* Number of descriptors and mbufs currently allocated. */
3593 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3595 /* Toggle RX checksum offload if hardware supports it. */
3596 if (priv->hw_csum) {
3597 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3598 rxq->csum = tmpl.csum;
3600 if (priv->hw_csum_l2tun) {
3601 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3602 rxq->csum_l2tun = tmpl.csum_l2tun;
3604 /* Enable scattered packets support for this queue if necessary. */
3605 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3606 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3607 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3608 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3610 desc_n /= MLX4_PMD_SGE_WR_N;
3613 DEBUG("%p: %s scattered packets support (%u WRs)",
3614 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3615 /* If scatter mode is the same as before, nothing to do. */
3616 if (tmpl.sp == rxq->sp) {
3617 DEBUG("%p: nothing to do", (void *)dev);
3620 /* Remove attached flows if RSS is disabled (no parent queue). */
3622 rxq_allmulticast_disable(&tmpl);
3623 rxq_promiscuous_disable(&tmpl);
3624 rxq_mac_addrs_del(&tmpl);
3625 /* Update original queue in case of failure. */
3626 rxq->allmulti_flow = tmpl.allmulti_flow;
3627 rxq->promisc_flow = tmpl.promisc_flow;
3628 memcpy(rxq->mac_configured, tmpl.mac_configured,
3629 sizeof(rxq->mac_configured));
3630 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3632 /* From now on, any failure will render the queue unusable.
3633 * Reinitialize QP. */
3634 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3635 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3637 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3641 err = ibv_resize_cq(tmpl.cq, desc_n);
3643 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3647 mod = (struct ibv_exp_qp_attr){
3648 /* Move the QP to this state. */
3649 .qp_state = IBV_QPS_INIT,
3650 /* Primary port number. */
3651 .port_num = priv->port
3653 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3656 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3657 #endif /* RSS_SUPPORT */
3660 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3661 (void *)dev, strerror(err));
3665 /* Reconfigure flows. Do not care for errors. */
3667 rxq_mac_addrs_add(&tmpl);
3669 rxq_promiscuous_enable(&tmpl);
3671 rxq_allmulticast_enable(&tmpl);
3672 /* Update original queue in case of failure. */
3673 rxq->allmulti_flow = tmpl.allmulti_flow;
3674 rxq->promisc_flow = tmpl.promisc_flow;
3675 memcpy(rxq->mac_configured, tmpl.mac_configured,
3676 sizeof(rxq->mac_configured));
3677 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3679 /* Allocate pool. */
3680 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3682 ERROR("%p: cannot allocate memory", (void *)dev);
3685 /* Snatch mbufs from original queue. */
3688 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3690 for (i = 0; (i != elemof(*elts)); ++i) {
3691 struct rxq_elt_sp *elt = &(*elts)[i];
3694 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3695 assert(elt->bufs[j] != NULL);
3696 pool[k++] = elt->bufs[j];
3700 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3702 for (i = 0; (i != elemof(*elts)); ++i) {
3703 struct rxq_elt *elt = &(*elts)[i];
3704 struct rte_mbuf *buf = (void *)
3705 ((uintptr_t)elt->sge.addr -
3706 WR_ID(elt->wr.wr_id).offset);
3708 assert(WR_ID(elt->wr.wr_id).id == i);
3712 assert(k == mbuf_n);
3714 tmpl.elts.sp = NULL;
3715 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3717 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3718 rxq_alloc_elts(&tmpl, desc_n, pool));
3720 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3725 assert(tmpl.elts_n == desc_n);
3726 assert(tmpl.elts.sp != NULL);
3728 /* Clean up original data. */
3730 rte_free(rxq->elts.sp);
3731 rxq->elts.sp = NULL;
3733 err = ibv_post_recv(tmpl.qp,
3735 &(*tmpl.elts.sp)[0].wr :
3736 &(*tmpl.elts.no_sp)[0].wr),
3739 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3745 mod = (struct ibv_exp_qp_attr){
3746 .qp_state = IBV_QPS_RTR
3748 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3750 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3751 (void *)dev, strerror(err));
3759 * Configure a RX queue.
3762 * Pointer to Ethernet device structure.
3764 * Pointer to RX queue structure.
3766 * Number of descriptors to configure in queue.
3768 * NUMA socket on which memory must be allocated.
3770 * If true, the queue is disabled because its index is higher or
3771 * equal to the real number of queues, which must be a power of 2.
3773 * Thresholds parameters.
3775 * Memory pool for buffer allocations.
3778 * 0 on success, errno value on failure.
3781 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3782 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
3783 struct rte_mempool *mp)
3785 struct priv *priv = dev->data->dev_private;
3791 struct ibv_exp_qp_attr mod;
3793 struct ibv_exp_query_intf_params params;
3794 struct ibv_exp_cq_init_attr cq;
3795 struct ibv_exp_res_domain_init_attr rd;
3797 enum ibv_exp_query_intf_status status;
3798 struct ibv_recv_wr *bad_wr;
3799 unsigned int mb_len;
3801 int parent = (rxq == &priv->rxq_parent);
3803 (void)conf; /* Thresholds configuration (ignored). */
3805 * If this is a parent queue, hardware must support RSS and
3806 * RSS must be enabled.
3808 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3810 /* Even if unused, ibv_create_cq() requires at least one
3815 mb_len = rte_pktmbuf_data_room_size(mp);
3816 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3817 ERROR("%p: invalid number of RX descriptors (must be a"
3818 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3821 /* Toggle RX checksum offload if hardware supports it. */
3823 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3824 if (priv->hw_csum_l2tun)
3825 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3826 /* Enable scattered packets support for this queue if necessary. */
3827 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3828 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3829 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3830 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3832 desc /= MLX4_PMD_SGE_WR_N;
3834 DEBUG("%p: %s scattered packets support (%u WRs)",
3835 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3836 /* Use the entire RX mempool as the memory region. */
3837 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3838 if (tmpl.mr == NULL) {
3840 ERROR("%p: MR creation failure: %s",
3841 (void *)dev, strerror(ret));
3845 attr.rd = (struct ibv_exp_res_domain_init_attr){
3846 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3847 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3848 .thread_model = IBV_EXP_THREAD_SINGLE,
3849 .msg_model = IBV_EXP_MSG_HIGH_BW,
3851 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3852 if (tmpl.rd == NULL) {
3854 ERROR("%p: RD creation failure: %s",
3855 (void *)dev, strerror(ret));
3858 attr.cq = (struct ibv_exp_cq_init_attr){
3859 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3860 .res_domain = tmpl.rd,
3862 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3863 if (tmpl.cq == NULL) {
3865 ERROR("%p: CQ creation failure: %s",
3866 (void *)dev, strerror(ret));
3869 DEBUG("priv->device_attr.max_qp_wr is %d",
3870 priv->device_attr.max_qp_wr);
3871 DEBUG("priv->device_attr.max_sge is %d",
3872 priv->device_attr.max_sge);
3874 if (priv->rss && !inactive)
3875 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3878 #endif /* RSS_SUPPORT */
3879 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3880 if (tmpl.qp == NULL) {
3881 ret = (errno ? errno : EINVAL);
3882 ERROR("%p: QP creation failure: %s",
3883 (void *)dev, strerror(ret));
3886 mod = (struct ibv_exp_qp_attr){
3887 /* Move the QP to this state. */
3888 .qp_state = IBV_QPS_INIT,
3889 /* Primary port number. */
3890 .port_num = priv->port
3892 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3895 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3896 #endif /* RSS_SUPPORT */
3899 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3900 (void *)dev, strerror(ret));
3903 if ((parent) || (!priv->rss)) {
3904 /* Configure MAC and broadcast addresses. */
3905 ret = rxq_mac_addrs_add(&tmpl);
3907 ERROR("%p: QP flow attachment failed: %s",
3908 (void *)dev, strerror(ret));
3912 /* Allocate descriptors for RX queues, except for the RSS parent. */
3916 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3918 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3920 ERROR("%p: RXQ allocation failed: %s",
3921 (void *)dev, strerror(ret));
3924 ret = ibv_post_recv(tmpl.qp,
3926 &(*tmpl.elts.sp)[0].wr :
3927 &(*tmpl.elts.no_sp)[0].wr),
3930 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3937 mod = (struct ibv_exp_qp_attr){
3938 .qp_state = IBV_QPS_RTR
3940 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3942 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3943 (void *)dev, strerror(ret));
3947 tmpl.port_id = dev->data->port_id;
3948 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3949 attr.params = (struct ibv_exp_query_intf_params){
3950 .intf_scope = IBV_EXP_INTF_GLOBAL,
3951 .intf = IBV_EXP_INTF_CQ,
3954 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3955 if (tmpl.if_cq == NULL) {
3956 ERROR("%p: CQ interface family query failed with status %d",
3957 (void *)dev, status);
3960 attr.params = (struct ibv_exp_query_intf_params){
3961 .intf_scope = IBV_EXP_INTF_GLOBAL,
3962 .intf = IBV_EXP_INTF_QP_BURST,
3965 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3966 if (tmpl.if_qp == NULL) {
3967 ERROR("%p: QP interface family query failed with status %d",
3968 (void *)dev, status);
3971 /* Clean up rxq in case we're reinitializing it. */
3972 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3975 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3985 * DPDK callback to configure a RX queue.
3988 * Pointer to Ethernet device structure.
3992 * Number of descriptors to configure in queue.
3994 * NUMA socket on which memory must be allocated.
3996 * Thresholds parameters.
3998 * Memory pool for buffer allocations.
4001 * 0 on success, negative errno value on failure.
4004 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
4005 unsigned int socket, const struct rte_eth_rxconf *conf,
4006 struct rte_mempool *mp)
4008 struct priv *priv = dev->data->dev_private;
4009 struct rxq *rxq = (*priv->rxqs)[idx];
4013 if (mlx4_is_secondary())
4014 return -E_RTE_SECONDARY;
4016 DEBUG("%p: configuring queue %u for %u descriptors",
4017 (void *)dev, idx, desc);
4018 if (idx >= priv->rxqs_n) {
4019 ERROR("%p: queue index out of range (%u >= %u)",
4020 (void *)dev, idx, priv->rxqs_n);
4025 DEBUG("%p: reusing already allocated queue index %u (%p)",
4026 (void *)dev, idx, (void *)rxq);
4027 if (priv->started) {
4031 (*priv->rxqs)[idx] = NULL;
4034 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
4036 ERROR("%p: unable to allocate queue index %u",
4042 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
4044 ret = rxq_setup(dev, rxq, desc, socket, inactive, conf, mp);
4048 rxq->stats.idx = idx;
4049 DEBUG("%p: adding RX queue %p to list",
4050 (void *)dev, (void *)rxq);
4051 (*priv->rxqs)[idx] = rxq;
4052 /* Update receive callback. */
4054 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4056 dev->rx_pkt_burst = mlx4_rx_burst;
4063 * DPDK callback to release a RX queue.
4066 * Generic RX queue pointer.
4069 mlx4_rx_queue_release(void *dpdk_rxq)
4071 struct rxq *rxq = (struct rxq *)dpdk_rxq;
4075 if (mlx4_is_secondary())
4081 assert(rxq != &priv->rxq_parent);
4082 for (i = 0; (i != priv->rxqs_n); ++i)
4083 if ((*priv->rxqs)[i] == rxq) {
4084 DEBUG("%p: removing RX queue %p from list",
4085 (void *)priv->dev, (void *)rxq);
4086 (*priv->rxqs)[i] = NULL;
4095 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4098 * DPDK callback to start the device.
4100 * Simulate device start by attaching all configured flows.
4103 * Pointer to Ethernet device structure.
4106 * 0 on success, negative errno value on failure.
4109 mlx4_dev_start(struct rte_eth_dev *dev)
4111 struct priv *priv = dev->data->dev_private;
4116 if (mlx4_is_secondary())
4117 return -E_RTE_SECONDARY;
4119 if (priv->started) {
4123 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4126 rxq = &priv->rxq_parent;
4129 rxq = (*priv->rxqs)[0];
4132 /* Iterate only once when RSS is enabled. */
4136 /* Ignore nonexistent RX queues. */
4139 ret = rxq_mac_addrs_add(rxq);
4140 if (!ret && priv->promisc)
4141 ret = rxq_promiscuous_enable(rxq);
4142 if (!ret && priv->allmulti)
4143 ret = rxq_allmulticast_enable(rxq);
4146 WARN("%p: QP flow attachment failed: %s",
4147 (void *)dev, strerror(ret));
4150 rxq = (*priv->rxqs)[--i];
4152 rxq_allmulticast_disable(rxq);
4153 rxq_promiscuous_disable(rxq);
4154 rxq_mac_addrs_del(rxq);
4160 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4161 priv_dev_interrupt_handler_install(priv, dev);
4167 * DPDK callback to stop the device.
4169 * Simulate device stop by detaching all configured flows.
4172 * Pointer to Ethernet device structure.
4175 mlx4_dev_stop(struct rte_eth_dev *dev)
4177 struct priv *priv = dev->data->dev_private;
4182 if (mlx4_is_secondary())
4185 if (!priv->started) {
4189 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4192 rxq = &priv->rxq_parent;
4195 rxq = (*priv->rxqs)[0];
4198 /* Iterate only once when RSS is enabled. */
4200 /* Ignore nonexistent RX queues. */
4203 rxq_allmulticast_disable(rxq);
4204 rxq_promiscuous_disable(rxq);
4205 rxq_mac_addrs_del(rxq);
4206 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4211 * Dummy DPDK callback for TX.
4213 * This function is used to temporarily replace the real callback during
4214 * unsafe control operations on the queue, or in case of error.
4217 * Generic pointer to TX queue structure.
4219 * Packets to transmit.
4221 * Number of packets in array.
4224 * Number of packets successfully transmitted (<= pkts_n).
4227 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4236 * Dummy DPDK callback for RX.
4238 * This function is used to temporarily replace the real callback during
4239 * unsafe control operations on the queue, or in case of error.
4242 * Generic pointer to RX queue structure.
4244 * Array to store received packets.
4246 * Maximum number of packets in array.
4249 * Number of packets successfully received (<= pkts_n).
4252 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4261 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4264 * DPDK callback to close the device.
4266 * Destroy all queues and objects, free memory.
4269 * Pointer to Ethernet device structure.
4272 mlx4_dev_close(struct rte_eth_dev *dev)
4274 struct priv *priv = mlx4_get_priv(dev);
4281 DEBUG("%p: closing device \"%s\"",
4283 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4284 /* Prevent crashes when queues are still in use. This is unfortunately
4285 * still required for DPDK 1.3 because some programs (such as testpmd)
4286 * never release them before closing the device. */
4287 dev->rx_pkt_burst = removed_rx_burst;
4288 dev->tx_pkt_burst = removed_tx_burst;
4289 if (priv->rxqs != NULL) {
4290 /* XXX race condition if mlx4_rx_burst() is still running. */
4292 for (i = 0; (i != priv->rxqs_n); ++i) {
4293 tmp = (*priv->rxqs)[i];
4296 (*priv->rxqs)[i] = NULL;
4303 if (priv->txqs != NULL) {
4304 /* XXX race condition if mlx4_tx_burst() is still running. */
4306 for (i = 0; (i != priv->txqs_n); ++i) {
4307 tmp = (*priv->txqs)[i];
4310 (*priv->txqs)[i] = NULL;
4318 rxq_cleanup(&priv->rxq_parent);
4319 if (priv->pd != NULL) {
4320 assert(priv->ctx != NULL);
4321 claim_zero(ibv_dealloc_pd(priv->pd));
4322 claim_zero(ibv_close_device(priv->ctx));
4324 assert(priv->ctx == NULL);
4325 priv_dev_interrupt_handler_uninstall(priv, dev);
4327 memset(priv, 0, sizeof(*priv));
4331 * Change the link state (UP / DOWN).
4334 * Pointer to Ethernet device private data.
4336 * Nonzero for link up, otherwise link down.
4339 * 0 on success, errno value on failure.
4342 priv_set_link(struct priv *priv, int up)
4344 struct rte_eth_dev *dev = priv->dev;
4349 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
4352 for (i = 0; i < priv->rxqs_n; i++)
4353 if ((*priv->rxqs)[i]->sp)
4355 /* Check if an sp queue exists.
4356 * Note: Some old frames might be received.
4358 if (i == priv->rxqs_n)
4359 dev->rx_pkt_burst = mlx4_rx_burst;
4361 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4362 dev->tx_pkt_burst = mlx4_tx_burst;
4364 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
4367 dev->rx_pkt_burst = removed_rx_burst;
4368 dev->tx_pkt_burst = removed_tx_burst;
4374 * DPDK callback to bring the link DOWN.
4377 * Pointer to Ethernet device structure.
4380 * 0 on success, errno value on failure.
4383 mlx4_set_link_down(struct rte_eth_dev *dev)
4385 struct priv *priv = dev->data->dev_private;
4389 err = priv_set_link(priv, 0);
4395 * DPDK callback to bring the link UP.
4398 * Pointer to Ethernet device structure.
4401 * 0 on success, errno value on failure.
4404 mlx4_set_link_up(struct rte_eth_dev *dev)
4406 struct priv *priv = dev->data->dev_private;
4410 err = priv_set_link(priv, 1);
4415 * DPDK callback to get information about the device.
4418 * Pointer to Ethernet device structure.
4420 * Info structure output buffer.
4423 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4425 struct priv *priv = mlx4_get_priv(dev);
4427 char ifname[IF_NAMESIZE];
4432 /* FIXME: we should ask the device for these values. */
4433 info->min_rx_bufsize = 32;
4434 info->max_rx_pktlen = 65536;
4436 * Since we need one CQ per QP, the limit is the minimum number
4437 * between the two values.
4439 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4440 priv->device_attr.max_qp : priv->device_attr.max_cq);
4441 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4444 info->max_rx_queues = max;
4445 info->max_tx_queues = max;
4446 /* Last array entry is reserved for broadcast. */
4447 info->max_mac_addrs = (elemof(priv->mac) - 1);
4448 info->rx_offload_capa =
4450 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4451 DEV_RX_OFFLOAD_UDP_CKSUM |
4452 DEV_RX_OFFLOAD_TCP_CKSUM) :
4454 info->tx_offload_capa =
4456 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4457 DEV_TX_OFFLOAD_UDP_CKSUM |
4458 DEV_TX_OFFLOAD_TCP_CKSUM) :
4460 if (priv_get_ifname(priv, &ifname) == 0)
4461 info->if_index = if_nametoindex(ifname);
4464 ETH_LINK_SPEED_10G |
4465 ETH_LINK_SPEED_20G |
4466 ETH_LINK_SPEED_40G |
4471 static const uint32_t *
4472 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4474 static const uint32_t ptypes[] = {
4475 /* refers to rxq_cq_to_pkt_type() */
4478 RTE_PTYPE_INNER_L3_IPV4,
4479 RTE_PTYPE_INNER_L3_IPV6,
4483 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4484 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4490 * DPDK callback to get device statistics.
4493 * Pointer to Ethernet device structure.
4495 * Stats structure output buffer.
4498 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4500 struct priv *priv = mlx4_get_priv(dev);
4501 struct rte_eth_stats tmp = {0};
4508 /* Add software counters. */
4509 for (i = 0; (i != priv->rxqs_n); ++i) {
4510 struct rxq *rxq = (*priv->rxqs)[i];
4514 idx = rxq->stats.idx;
4515 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4516 #ifdef MLX4_PMD_SOFT_COUNTERS
4517 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4518 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4520 tmp.q_errors[idx] += (rxq->stats.idropped +
4521 rxq->stats.rx_nombuf);
4523 #ifdef MLX4_PMD_SOFT_COUNTERS
4524 tmp.ipackets += rxq->stats.ipackets;
4525 tmp.ibytes += rxq->stats.ibytes;
4527 tmp.ierrors += rxq->stats.idropped;
4528 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4530 for (i = 0; (i != priv->txqs_n); ++i) {
4531 struct txq *txq = (*priv->txqs)[i];
4535 idx = txq->stats.idx;
4536 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4537 #ifdef MLX4_PMD_SOFT_COUNTERS
4538 tmp.q_opackets[idx] += txq->stats.opackets;
4539 tmp.q_obytes[idx] += txq->stats.obytes;
4541 tmp.q_errors[idx] += txq->stats.odropped;
4543 #ifdef MLX4_PMD_SOFT_COUNTERS
4544 tmp.opackets += txq->stats.opackets;
4545 tmp.obytes += txq->stats.obytes;
4547 tmp.oerrors += txq->stats.odropped;
4549 #ifndef MLX4_PMD_SOFT_COUNTERS
4550 /* FIXME: retrieve and add hardware counters. */
4557 * DPDK callback to clear device statistics.
4560 * Pointer to Ethernet device structure.
4563 mlx4_stats_reset(struct rte_eth_dev *dev)
4565 struct priv *priv = mlx4_get_priv(dev);
4572 for (i = 0; (i != priv->rxqs_n); ++i) {
4573 if ((*priv->rxqs)[i] == NULL)
4575 idx = (*priv->rxqs)[i]->stats.idx;
4576 (*priv->rxqs)[i]->stats =
4577 (struct mlx4_rxq_stats){ .idx = idx };
4579 for (i = 0; (i != priv->txqs_n); ++i) {
4580 if ((*priv->txqs)[i] == NULL)
4582 idx = (*priv->txqs)[i]->stats.idx;
4583 (*priv->txqs)[i]->stats =
4584 (struct mlx4_txq_stats){ .idx = idx };
4586 #ifndef MLX4_PMD_SOFT_COUNTERS
4587 /* FIXME: reset hardware counters. */
4593 * DPDK callback to remove a MAC address.
4596 * Pointer to Ethernet device structure.
4598 * MAC address index.
4601 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4603 struct priv *priv = dev->data->dev_private;
4605 if (mlx4_is_secondary())
4608 DEBUG("%p: removing MAC address from index %" PRIu32,
4609 (void *)dev, index);
4610 /* Last array entry is reserved for broadcast. */
4611 if (index >= (elemof(priv->mac) - 1))
4613 priv_mac_addr_del(priv, index);
4619 * DPDK callback to add a MAC address.
4622 * Pointer to Ethernet device structure.
4624 * MAC address to register.
4626 * MAC address index.
4628 * VMDq pool index to associate address with (ignored).
4631 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4632 uint32_t index, uint32_t vmdq)
4634 struct priv *priv = dev->data->dev_private;
4636 if (mlx4_is_secondary())
4640 DEBUG("%p: adding MAC address at index %" PRIu32,
4641 (void *)dev, index);
4642 /* Last array entry is reserved for broadcast. */
4643 if (index >= (elemof(priv->mac) - 1))
4645 priv_mac_addr_add(priv, index,
4646 (const uint8_t (*)[ETHER_ADDR_LEN])
4647 mac_addr->addr_bytes);
4653 * DPDK callback to set the primary MAC address.
4656 * Pointer to Ethernet device structure.
4658 * MAC address to register.
4661 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4663 DEBUG("%p: setting primary MAC address", (void *)dev);
4664 mlx4_mac_addr_remove(dev, 0);
4665 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4669 * DPDK callback to enable promiscuous mode.
4672 * Pointer to Ethernet device structure.
4675 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4677 struct priv *priv = dev->data->dev_private;
4681 if (mlx4_is_secondary())
4684 if (priv->promisc) {
4688 /* If device isn't started, this is all we need to do. */
4692 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4699 for (i = 0; (i != priv->rxqs_n); ++i) {
4700 if ((*priv->rxqs)[i] == NULL)
4702 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4705 /* Failure, rollback. */
4707 if ((*priv->rxqs)[--i] != NULL)
4708 rxq_promiscuous_disable((*priv->rxqs)[i]);
4718 * DPDK callback to disable promiscuous mode.
4721 * Pointer to Ethernet device structure.
4724 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4726 struct priv *priv = dev->data->dev_private;
4729 if (mlx4_is_secondary())
4732 if (!priv->promisc) {
4737 rxq_promiscuous_disable(&priv->rxq_parent);
4740 for (i = 0; (i != priv->rxqs_n); ++i)
4741 if ((*priv->rxqs)[i] != NULL)
4742 rxq_promiscuous_disable((*priv->rxqs)[i]);
4749 * DPDK callback to enable allmulti mode.
4752 * Pointer to Ethernet device structure.
4755 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4757 struct priv *priv = dev->data->dev_private;
4761 if (mlx4_is_secondary())
4764 if (priv->allmulti) {
4768 /* If device isn't started, this is all we need to do. */
4772 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4779 for (i = 0; (i != priv->rxqs_n); ++i) {
4780 if ((*priv->rxqs)[i] == NULL)
4782 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4785 /* Failure, rollback. */
4787 if ((*priv->rxqs)[--i] != NULL)
4788 rxq_allmulticast_disable((*priv->rxqs)[i]);
4798 * DPDK callback to disable allmulti mode.
4801 * Pointer to Ethernet device structure.
4804 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4806 struct priv *priv = dev->data->dev_private;
4809 if (mlx4_is_secondary())
4812 if (!priv->allmulti) {
4817 rxq_allmulticast_disable(&priv->rxq_parent);
4820 for (i = 0; (i != priv->rxqs_n); ++i)
4821 if ((*priv->rxqs)[i] != NULL)
4822 rxq_allmulticast_disable((*priv->rxqs)[i]);
4829 * DPDK callback to retrieve physical link information (unlocked version).
4832 * Pointer to Ethernet device structure.
4833 * @param wait_to_complete
4834 * Wait for request completion (ignored).
4837 mlx4_link_update_unlocked(struct rte_eth_dev *dev, int wait_to_complete)
4839 struct priv *priv = mlx4_get_priv(dev);
4840 struct ethtool_cmd edata = {
4844 struct rte_eth_link dev_link;
4849 (void)wait_to_complete;
4850 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4851 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4854 memset(&dev_link, 0, sizeof(dev_link));
4855 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4856 (ifr.ifr_flags & IFF_RUNNING));
4857 ifr.ifr_data = (void *)&edata;
4858 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4859 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4863 link_speed = ethtool_cmd_speed(&edata);
4864 if (link_speed == -1)
4865 dev_link.link_speed = 0;
4867 dev_link.link_speed = link_speed;
4868 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4869 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4870 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4871 ETH_LINK_SPEED_FIXED);
4872 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4873 /* Link status changed. */
4874 dev->data->dev_link = dev_link;
4877 /* Link status is still the same. */
4882 * DPDK callback to retrieve physical link information.
4885 * Pointer to Ethernet device structure.
4886 * @param wait_to_complete
4887 * Wait for request completion (ignored).
4890 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4892 struct priv *priv = mlx4_get_priv(dev);
4898 ret = mlx4_link_update_unlocked(dev, wait_to_complete);
4904 * DPDK callback to change the MTU.
4906 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4907 * received). Use this as a hint to enable/disable scattered packets support
4908 * and improve performance when not needed.
4909 * Since failure is not an option, reconfiguring queues on the fly is not
4913 * Pointer to Ethernet device structure.
4918 * 0 on success, negative errno value on failure.
4921 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4923 struct priv *priv = dev->data->dev_private;
4926 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4929 if (mlx4_is_secondary())
4930 return -E_RTE_SECONDARY;
4932 /* Set kernel interface MTU first. */
4933 if (priv_set_mtu(priv, mtu)) {
4935 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4939 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4941 /* Temporarily replace RX handler with a fake one, assuming it has not
4942 * been copied elsewhere. */
4943 dev->rx_pkt_burst = removed_rx_burst;
4944 /* Make sure everyone has left mlx4_rx_burst() and uses
4945 * removed_rx_burst() instead. */
4948 /* Reconfigure each RX queue. */
4949 for (i = 0; (i != priv->rxqs_n); ++i) {
4950 struct rxq *rxq = (*priv->rxqs)[i];
4951 unsigned int mb_len;
4952 unsigned int max_frame_len;
4957 /* Calculate new maximum frame length according to MTU and
4958 * toggle scattered support (sp) if necessary. */
4959 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4960 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4961 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
4962 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
4963 sp = (max_frame_len > (mb_len - RTE_PKTMBUF_HEADROOM));
4964 /* Provide new values to rxq_setup(). */
4965 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4966 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4967 ret = rxq_rehash(dev, rxq);
4969 /* Force SP RX if that queue requires it and abort. */
4971 rx_func = mlx4_rx_burst_sp;
4974 /* Reenable non-RSS queue attributes. No need to check
4975 * for errors at this stage. */
4977 rxq_mac_addrs_add(rxq);
4979 rxq_promiscuous_enable(rxq);
4981 rxq_allmulticast_enable(rxq);
4983 /* Scattered burst function takes priority. */
4985 rx_func = mlx4_rx_burst_sp;
4987 /* Burst functions can now be called again. */
4989 dev->rx_pkt_burst = rx_func;
4997 * DPDK callback to get flow control status.
5000 * Pointer to Ethernet device structure.
5001 * @param[out] fc_conf
5002 * Flow control output buffer.
5005 * 0 on success, negative errno value on failure.
5008 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
5010 struct priv *priv = dev->data->dev_private;
5012 struct ethtool_pauseparam ethpause = {
5013 .cmd = ETHTOOL_GPAUSEPARAM
5017 if (mlx4_is_secondary())
5018 return -E_RTE_SECONDARY;
5019 ifr.ifr_data = (void *)ðpause;
5021 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
5023 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
5029 fc_conf->autoneg = ethpause.autoneg;
5030 if (ethpause.rx_pause && ethpause.tx_pause)
5031 fc_conf->mode = RTE_FC_FULL;
5032 else if (ethpause.rx_pause)
5033 fc_conf->mode = RTE_FC_RX_PAUSE;
5034 else if (ethpause.tx_pause)
5035 fc_conf->mode = RTE_FC_TX_PAUSE;
5037 fc_conf->mode = RTE_FC_NONE;
5047 * DPDK callback to modify flow control parameters.
5050 * Pointer to Ethernet device structure.
5051 * @param[in] fc_conf
5052 * Flow control parameters.
5055 * 0 on success, negative errno value on failure.
5058 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
5060 struct priv *priv = dev->data->dev_private;
5062 struct ethtool_pauseparam ethpause = {
5063 .cmd = ETHTOOL_SPAUSEPARAM
5067 if (mlx4_is_secondary())
5068 return -E_RTE_SECONDARY;
5069 ifr.ifr_data = (void *)ðpause;
5070 ethpause.autoneg = fc_conf->autoneg;
5071 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
5072 (fc_conf->mode & RTE_FC_RX_PAUSE))
5073 ethpause.rx_pause = 1;
5075 ethpause.rx_pause = 0;
5077 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
5078 (fc_conf->mode & RTE_FC_TX_PAUSE))
5079 ethpause.tx_pause = 1;
5081 ethpause.tx_pause = 0;
5084 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
5086 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
5100 * Configure a VLAN filter.
5103 * Pointer to Ethernet device structure.
5105 * VLAN ID to filter.
5110 * 0 on success, errno value on failure.
5113 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5115 struct priv *priv = dev->data->dev_private;
5117 unsigned int j = -1;
5119 DEBUG("%p: %s VLAN filter ID %" PRIu16,
5120 (void *)dev, (on ? "enable" : "disable"), vlan_id);
5121 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
5122 if (!priv->vlan_filter[i].enabled) {
5123 /* Unused index, remember it. */
5127 if (priv->vlan_filter[i].id != vlan_id)
5129 /* This VLAN ID is already known, use its index. */
5133 /* Check if there's room for another VLAN filter. */
5134 if (j == (unsigned int)-1)
5137 * VLAN filters apply to all configured MAC addresses, flow
5138 * specifications must be reconfigured accordingly.
5140 priv->vlan_filter[j].id = vlan_id;
5141 if ((on) && (!priv->vlan_filter[j].enabled)) {
5143 * Filter is disabled, enable it.
5144 * Rehashing flows in all RX queues is necessary.
5147 rxq_mac_addrs_del(&priv->rxq_parent);
5149 for (i = 0; (i != priv->rxqs_n); ++i)
5150 if ((*priv->rxqs)[i] != NULL)
5151 rxq_mac_addrs_del((*priv->rxqs)[i]);
5152 priv->vlan_filter[j].enabled = 1;
5153 if (priv->started) {
5155 rxq_mac_addrs_add(&priv->rxq_parent);
5157 for (i = 0; (i != priv->rxqs_n); ++i) {
5158 if ((*priv->rxqs)[i] == NULL)
5160 rxq_mac_addrs_add((*priv->rxqs)[i]);
5163 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
5165 * Filter is enabled, disable it.
5166 * Rehashing flows in all RX queues is necessary.
5169 rxq_mac_addrs_del(&priv->rxq_parent);
5171 for (i = 0; (i != priv->rxqs_n); ++i)
5172 if ((*priv->rxqs)[i] != NULL)
5173 rxq_mac_addrs_del((*priv->rxqs)[i]);
5174 priv->vlan_filter[j].enabled = 0;
5175 if (priv->started) {
5177 rxq_mac_addrs_add(&priv->rxq_parent);
5179 for (i = 0; (i != priv->rxqs_n); ++i) {
5180 if ((*priv->rxqs)[i] == NULL)
5182 rxq_mac_addrs_add((*priv->rxqs)[i]);
5190 * DPDK callback to configure a VLAN filter.
5193 * Pointer to Ethernet device structure.
5195 * VLAN ID to filter.
5200 * 0 on success, negative errno value on failure.
5203 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5205 struct priv *priv = dev->data->dev_private;
5208 if (mlx4_is_secondary())
5209 return -E_RTE_SECONDARY;
5211 ret = vlan_filter_set(dev, vlan_id, on);
5217 static const struct eth_dev_ops mlx4_dev_ops = {
5218 .dev_configure = mlx4_dev_configure,
5219 .dev_start = mlx4_dev_start,
5220 .dev_stop = mlx4_dev_stop,
5221 .dev_set_link_down = mlx4_set_link_down,
5222 .dev_set_link_up = mlx4_set_link_up,
5223 .dev_close = mlx4_dev_close,
5224 .promiscuous_enable = mlx4_promiscuous_enable,
5225 .promiscuous_disable = mlx4_promiscuous_disable,
5226 .allmulticast_enable = mlx4_allmulticast_enable,
5227 .allmulticast_disable = mlx4_allmulticast_disable,
5228 .link_update = mlx4_link_update,
5229 .stats_get = mlx4_stats_get,
5230 .stats_reset = mlx4_stats_reset,
5231 .queue_stats_mapping_set = NULL,
5232 .dev_infos_get = mlx4_dev_infos_get,
5233 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5234 .vlan_filter_set = mlx4_vlan_filter_set,
5235 .vlan_tpid_set = NULL,
5236 .vlan_strip_queue_set = NULL,
5237 .vlan_offload_set = NULL,
5238 .rx_queue_setup = mlx4_rx_queue_setup,
5239 .tx_queue_setup = mlx4_tx_queue_setup,
5240 .rx_queue_release = mlx4_rx_queue_release,
5241 .tx_queue_release = mlx4_tx_queue_release,
5243 .dev_led_off = NULL,
5244 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5245 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5246 .priority_flow_ctrl_set = NULL,
5247 .mac_addr_remove = mlx4_mac_addr_remove,
5248 .mac_addr_add = mlx4_mac_addr_add,
5249 .mac_addr_set = mlx4_mac_addr_set,
5250 .mtu_set = mlx4_dev_set_mtu,
5254 * Get PCI information from struct ibv_device.
5257 * Pointer to Ethernet device structure.
5258 * @param[out] pci_addr
5259 * PCI bus address output buffer.
5262 * 0 on success, -1 on failure and errno is set.
5265 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5266 struct rte_pci_addr *pci_addr)
5270 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5272 file = fopen(path, "rb");
5275 while (fgets(line, sizeof(line), file) == line) {
5276 size_t len = strlen(line);
5279 /* Truncate long lines. */
5280 if (len == (sizeof(line) - 1))
5281 while (line[(len - 1)] != '\n') {
5285 line[(len - 1)] = ret;
5287 /* Extract information. */
5290 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5294 &pci_addr->function) == 4) {
5304 * Get MAC address by querying netdevice.
5307 * struct priv for the requested device.
5309 * MAC address output buffer.
5312 * 0 on success, -1 on failure and errno is set.
5315 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5317 struct ifreq request;
5319 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5321 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5325 /* Support up to 32 adapters. */
5327 struct rte_pci_addr pci_addr; /* associated PCI address */
5328 uint32_t ports; /* physical ports bitfield. */
5332 * Get device index in mlx4_dev[] from PCI bus address.
5334 * @param[in] pci_addr
5335 * PCI bus address to look for.
5338 * mlx4_dev[] index on success, -1 on failure.
5341 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5346 assert(pci_addr != NULL);
5347 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5348 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5349 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5350 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5351 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5353 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5360 * Retrieve integer value from environment variable.
5363 * Environment variable name.
5366 * Integer value, 0 if the variable is not set.
5369 mlx4_getenv_int(const char *name)
5371 const char *val = getenv(name);
5379 mlx4_dev_link_status_handler(void *);
5381 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5384 * Link status handler.
5387 * Pointer to private structure.
5389 * Pointer to the rte_eth_dev structure.
5392 * Nonzero if the callback process can be called immediately.
5395 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5397 struct ibv_async_event event;
5398 int port_change = 0;
5401 /* Read all message and acknowledge them. */
5403 if (ibv_get_async_event(priv->ctx, &event))
5406 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5407 event.event_type == IBV_EVENT_PORT_ERR)
5410 DEBUG("event type %d on port %d not handled",
5411 event.event_type, event.element.port_num);
5412 ibv_ack_async_event(&event);
5415 if (port_change ^ priv->pending_alarm) {
5416 struct rte_eth_link *link = &dev->data->dev_link;
5418 priv->pending_alarm = 0;
5419 mlx4_link_update_unlocked(dev, 0);
5420 if (((link->link_speed == 0) && link->link_status) ||
5421 ((link->link_speed != 0) && !link->link_status)) {
5422 /* Inconsistent status, check again later. */
5423 priv->pending_alarm = 1;
5424 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5425 mlx4_dev_link_status_handler,
5434 * Handle delayed link status event.
5437 * Registered argument.
5440 mlx4_dev_link_status_handler(void *arg)
5442 struct rte_eth_dev *dev = arg;
5443 struct priv *priv = dev->data->dev_private;
5447 assert(priv->pending_alarm == 1);
5448 ret = priv_dev_link_status_handler(priv, dev);
5451 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5455 * Handle interrupts from the NIC.
5457 * @param[in] intr_handle
5458 * Interrupt handler.
5460 * Callback argument.
5463 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5465 struct rte_eth_dev *dev = cb_arg;
5466 struct priv *priv = dev->data->dev_private;
5471 ret = priv_dev_link_status_handler(priv, dev);
5474 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5478 * Uninstall interrupt handler.
5481 * Pointer to private structure.
5483 * Pointer to the rte_eth_dev structure.
5486 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5488 if (!dev->data->dev_conf.intr_conf.lsc)
5490 rte_intr_callback_unregister(&priv->intr_handle,
5491 mlx4_dev_interrupt_handler,
5493 if (priv->pending_alarm)
5494 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5495 priv->pending_alarm = 0;
5496 priv->intr_handle.fd = 0;
5497 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
5501 * Install interrupt handler.
5504 * Pointer to private structure.
5506 * Pointer to the rte_eth_dev structure.
5509 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5513 if (!dev->data->dev_conf.intr_conf.lsc)
5515 assert(priv->ctx->async_fd > 0);
5516 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5517 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5519 INFO("failed to change file descriptor async event queue");
5520 dev->data->dev_conf.intr_conf.lsc = 0;
5522 priv->intr_handle.fd = priv->ctx->async_fd;
5523 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5524 rte_intr_callback_register(&priv->intr_handle,
5525 mlx4_dev_interrupt_handler,
5530 static struct eth_driver mlx4_driver;
5533 * DPDK callback to register a PCI device.
5535 * This function creates an Ethernet device for each port of a given
5538 * @param[in] pci_drv
5539 * PCI driver structure (mlx4_driver).
5540 * @param[in] pci_dev
5541 * PCI device information.
5544 * 0 on success, negative errno value on failure.
5547 mlx4_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5549 struct ibv_device **list;
5550 struct ibv_device *ibv_dev;
5552 struct ibv_context *attr_ctx = NULL;
5553 struct ibv_device_attr device_attr;
5559 assert(pci_drv == &mlx4_driver.pci_drv);
5560 /* Get mlx4_dev[] index. */
5561 idx = mlx4_dev_idx(&pci_dev->addr);
5563 ERROR("this driver cannot support any more adapters");
5566 DEBUG("using driver device index %d", idx);
5568 /* Save PCI address. */
5569 mlx4_dev[idx].pci_addr = pci_dev->addr;
5570 list = ibv_get_device_list(&i);
5573 if (errno == ENOSYS) {
5574 WARN("cannot list devices, is ib_uverbs loaded?");
5581 * For each listed device, check related sysfs entry against
5582 * the provided PCI ID.
5585 struct rte_pci_addr pci_addr;
5588 DEBUG("checking device \"%s\"", list[i]->name);
5589 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5591 if ((pci_dev->addr.domain != pci_addr.domain) ||
5592 (pci_dev->addr.bus != pci_addr.bus) ||
5593 (pci_dev->addr.devid != pci_addr.devid) ||
5594 (pci_dev->addr.function != pci_addr.function))
5596 vf = (pci_dev->id.device_id ==
5597 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5598 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5599 list[i]->name, (vf ? "true" : "false"));
5600 attr_ctx = ibv_open_device(list[i]);
5604 if (attr_ctx == NULL) {
5605 ibv_free_device_list(list);
5608 WARN("cannot access device, is mlx4_ib loaded?");
5611 WARN("cannot use device, are drivers up to date?");
5619 DEBUG("device opened");
5620 if (ibv_query_device(attr_ctx, &device_attr))
5622 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5624 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5625 uint32_t port = i + 1; /* ports are indexed from one */
5626 uint32_t test = (1 << i);
5627 struct ibv_context *ctx = NULL;
5628 struct ibv_port_attr port_attr;
5629 struct ibv_pd *pd = NULL;
5630 struct priv *priv = NULL;
5631 struct rte_eth_dev *eth_dev = NULL;
5632 #ifdef HAVE_EXP_QUERY_DEVICE
5633 struct ibv_exp_device_attr exp_device_attr;
5634 #endif /* HAVE_EXP_QUERY_DEVICE */
5635 struct ether_addr mac;
5637 #ifdef HAVE_EXP_QUERY_DEVICE
5638 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5640 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5641 #endif /* RSS_SUPPORT */
5642 #endif /* HAVE_EXP_QUERY_DEVICE */
5644 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5646 ctx = ibv_open_device(ibv_dev);
5650 /* Check port status. */
5651 err = ibv_query_port(ctx, port, &port_attr);
5653 ERROR("port query failed: %s", strerror(err));
5657 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5658 ERROR("port %d is not configured in Ethernet mode",
5663 if (port_attr.state != IBV_PORT_ACTIVE)
5664 DEBUG("port %d is not active: \"%s\" (%d)",
5665 port, ibv_port_state_str(port_attr.state),
5668 /* Allocate protection domain. */
5669 pd = ibv_alloc_pd(ctx);
5671 ERROR("PD allocation failure");
5676 mlx4_dev[idx].ports |= test;
5678 /* from rte_ethdev.c */
5679 priv = rte_zmalloc("ethdev private structure",
5681 RTE_CACHE_LINE_SIZE);
5683 ERROR("priv allocation failure");
5689 priv->device_attr = device_attr;
5692 priv->mtu = ETHER_MTU;
5693 #ifdef HAVE_EXP_QUERY_DEVICE
5694 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5695 ERROR("ibv_exp_query_device() failed");
5699 if ((exp_device_attr.exp_device_cap_flags &
5700 IBV_EXP_DEVICE_QPG) &&
5701 (exp_device_attr.exp_device_cap_flags &
5702 IBV_EXP_DEVICE_UD_RSS) &&
5703 (exp_device_attr.comp_mask &
5704 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5705 (exp_device_attr.max_rss_tbl_sz > 0)) {
5708 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5712 priv->max_rss_tbl_sz = 0;
5714 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5715 IBV_EXP_DEVICE_UD_TSS);
5716 DEBUG("device flags: %s%s%s",
5717 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5718 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5719 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5721 DEBUG("maximum RSS indirection table size: %u",
5722 exp_device_attr.max_rss_tbl_sz);
5723 #endif /* RSS_SUPPORT */
5726 ((exp_device_attr.exp_device_cap_flags &
5727 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5728 (exp_device_attr.exp_device_cap_flags &
5729 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5730 DEBUG("checksum offloading is %ssupported",
5731 (priv->hw_csum ? "" : "not "));
5733 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5734 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5735 DEBUG("L2 tunnel checksum offloads are %ssupported",
5736 (priv->hw_csum_l2tun ? "" : "not "));
5739 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5741 if (priv->inl_recv_size) {
5742 exp_device_attr.comp_mask =
5743 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5744 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5745 INFO("Couldn't query device for inline-receive"
5747 priv->inl_recv_size = 0;
5749 if ((unsigned)exp_device_attr.inline_recv_sz <
5750 priv->inl_recv_size) {
5751 INFO("Max inline-receive (%d) <"
5752 " requested inline-receive (%u)",
5753 exp_device_attr.inline_recv_sz,
5754 priv->inl_recv_size);
5755 priv->inl_recv_size =
5756 exp_device_attr.inline_recv_sz;
5759 INFO("Set inline receive size to %u",
5760 priv->inl_recv_size);
5762 #endif /* INLINE_RECV */
5763 #endif /* HAVE_EXP_QUERY_DEVICE */
5765 (void)mlx4_getenv_int;
5767 /* Configure the first MAC address by default. */
5768 if (priv_get_mac(priv, &mac.addr_bytes)) {
5769 ERROR("cannot get MAC address, is mlx4_en loaded?"
5770 " (errno: %s)", strerror(errno));
5773 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5775 mac.addr_bytes[0], mac.addr_bytes[1],
5776 mac.addr_bytes[2], mac.addr_bytes[3],
5777 mac.addr_bytes[4], mac.addr_bytes[5]);
5778 /* Register MAC and broadcast addresses. */
5779 claim_zero(priv_mac_addr_add(priv, 0,
5780 (const uint8_t (*)[ETHER_ADDR_LEN])
5782 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5783 &(const uint8_t [ETHER_ADDR_LEN])
5784 { "\xff\xff\xff\xff\xff\xff" }));
5787 char ifname[IF_NAMESIZE];
5789 if (priv_get_ifname(priv, &ifname) == 0)
5790 DEBUG("port %u ifname is \"%s\"",
5791 priv->port, ifname);
5793 DEBUG("port %u ifname is unknown", priv->port);
5796 /* Get actual MTU if possible. */
5797 priv_get_mtu(priv, &priv->mtu);
5798 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5800 /* from rte_ethdev.c */
5802 char name[RTE_ETH_NAME_MAX_LEN];
5804 snprintf(name, sizeof(name), "%s port %u",
5805 ibv_get_device_name(ibv_dev), port);
5806 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
5808 if (eth_dev == NULL) {
5809 ERROR("can not allocate rte ethdev");
5814 /* Secondary processes have to use local storage for their
5815 * private data as well as a copy of eth_dev->data, but this
5816 * pointer must not be modified before burst functions are
5817 * actually called. */
5818 if (mlx4_is_secondary()) {
5819 struct mlx4_secondary_data *sd =
5820 &mlx4_secondary_data[eth_dev->data->port_id];
5822 sd->primary_priv = eth_dev->data->dev_private;
5823 if (sd->primary_priv == NULL) {
5824 ERROR("no private data for port %u",
5825 eth_dev->data->port_id);
5829 sd->shared_dev_data = eth_dev->data;
5830 rte_spinlock_init(&sd->lock);
5831 memcpy(sd->data.name, sd->shared_dev_data->name,
5832 sizeof(sd->data.name));
5833 sd->data.dev_private = priv;
5834 sd->data.rx_mbuf_alloc_failed = 0;
5835 sd->data.mtu = ETHER_MTU;
5836 sd->data.port_id = sd->shared_dev_data->port_id;
5837 sd->data.mac_addrs = priv->mac;
5838 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5839 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5841 eth_dev->data->dev_private = priv;
5842 eth_dev->data->rx_mbuf_alloc_failed = 0;
5843 eth_dev->data->mtu = ETHER_MTU;
5844 eth_dev->data->mac_addrs = priv->mac;
5846 eth_dev->pci_dev = pci_dev;
5848 rte_eth_copy_pci_info(eth_dev, pci_dev);
5850 eth_dev->driver = &mlx4_driver;
5852 priv->dev = eth_dev;
5853 eth_dev->dev_ops = &mlx4_dev_ops;
5854 TAILQ_INIT(ð_dev->link_intr_cbs);
5856 /* Bring Ethernet device up. */
5857 DEBUG("forcing Ethernet interface up");
5858 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5864 claim_zero(ibv_dealloc_pd(pd));
5866 claim_zero(ibv_close_device(ctx));
5868 rte_eth_dev_release_port(eth_dev);
5873 * XXX if something went wrong in the loop above, there is a resource
5874 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5875 * long as the dpdk does not provide a way to deallocate a ethdev and a
5876 * way to enumerate the registered ethdevs to free the previous ones.
5879 /* no port found, complain */
5880 if (!mlx4_dev[idx].ports) {
5887 claim_zero(ibv_close_device(attr_ctx));
5889 ibv_free_device_list(list);
5894 static const struct rte_pci_id mlx4_pci_id_map[] = {
5896 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5897 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
5900 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5901 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
5904 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5905 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
5912 static struct eth_driver mlx4_driver = {
5914 .name = MLX4_DRIVER_NAME,
5915 .id_table = mlx4_pci_id_map,
5916 .devinit = mlx4_pci_devinit,
5917 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5919 .dev_private_size = sizeof(struct priv)
5923 * Driver initialization routine.
5926 rte_mlx4_pmd_init(const char *name, const char *args)
5931 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5933 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5934 * huge pages. Calling ibv_fork_init() during init allows
5935 * applications to use fork() safely for purposes other than
5936 * using this PMD, which is not supported in forked processes.
5938 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5940 rte_eal_pci_register(&mlx4_driver.pci_drv);
5944 static struct rte_driver rte_mlx4_driver = {
5946 .init = rte_mlx4_pmd_init,
5949 PMD_REGISTER_DRIVER(rte_mlx4_driver, mlx4);
5950 DRIVER_REGISTER_PCI_TABLE(mlx4, mlx4_pci_id_map);