4 * Copyright 2012-2017 6WIND S.A.
5 * Copyright 2012-2017 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
57 #include <linux/ethtool.h>
58 #include <linux/sockios.h>
61 #include <rte_ether.h>
62 #include <rte_ethdev.h>
65 #include <rte_errno.h>
66 #include <rte_mempool.h>
67 #include <rte_prefetch.h>
68 #include <rte_malloc.h>
69 #include <rte_spinlock.h>
70 #include <rte_atomic.h>
71 #include <rte_version.h>
73 #include <rte_alarm.h>
74 #include <rte_memory.h>
76 #include <rte_kvargs.h>
78 /* Generated configuration header. */
79 #include "mlx4_autoconf.h"
83 #include "mlx4_flow.h"
85 /* Convenience macros for accessing mbuf fields. */
86 #define NEXT(m) ((m)->next)
87 #define DATA_LEN(m) ((m)->data_len)
88 #define PKT_LEN(m) ((m)->pkt_len)
89 #define DATA_OFF(m) ((m)->data_off)
90 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
91 #define NB_SEGS(m) ((m)->nb_segs)
92 #define PORT(m) ((m)->port)
94 /* Work Request ID data type (64 bit). */
103 #define WR_ID(o) (((wr_id_t *)&(o))->data)
105 /* Transpose flags. Useful to convert IBV to DPDK flags. */
106 #define TRANSPOSE(val, from, to) \
107 (((from) >= (to)) ? \
108 (((val) & (from)) / ((from) / (to))) : \
109 (((val) & (from)) * ((to) / (from))))
111 /* Local storage for secondary process data. */
112 struct mlx4_secondary_data {
113 struct rte_eth_dev_data data; /* Local device data. */
114 struct priv *primary_priv; /* Private structure from primary. */
115 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
116 rte_spinlock_t lock; /* Port configuration lock. */
117 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
120 uint8_t active_ports;
123 /* Available parameters list. */
124 const char *pmd_mlx4_init_params[] = {
130 * Check if running as a secondary process.
133 * Nonzero if running as a secondary process.
136 mlx4_is_secondary(void)
138 return rte_eal_process_type() != RTE_PROC_PRIMARY;
142 * Return private structure associated with an Ethernet device.
145 * Pointer to Ethernet device structure.
148 * Pointer to private structure.
151 mlx4_get_priv(struct rte_eth_dev *dev)
153 struct mlx4_secondary_data *sd;
155 if (!mlx4_is_secondary())
156 return dev->data->dev_private;
157 sd = &mlx4_secondary_data[dev->data->port_id];
158 return sd->data.dev_private;
162 * Lock private structure to protect it from concurrent access in the
166 * Pointer to private structure.
168 void priv_lock(struct priv *priv)
170 rte_spinlock_lock(&priv->lock);
174 * Unlock private structure.
177 * Pointer to private structure.
179 void priv_unlock(struct priv *priv)
181 rte_spinlock_unlock(&priv->lock);
184 /* Allocate a buffer on the stack and fill it with a printf format string. */
185 #define MKSTR(name, ...) \
186 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
188 snprintf(name, sizeof(name), __VA_ARGS__)
191 * Get interface name from private structure.
194 * Pointer to private structure.
196 * Interface name output buffer.
199 * 0 on success, -1 on failure and errno is set.
202 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
206 unsigned int dev_type = 0;
207 unsigned int dev_port_prev = ~0u;
208 char match[IF_NAMESIZE] = "";
211 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
217 while ((dent = readdir(dir)) != NULL) {
218 char *name = dent->d_name;
220 unsigned int dev_port;
223 if ((name[0] == '.') &&
224 ((name[1] == '\0') ||
225 ((name[1] == '.') && (name[2] == '\0'))))
228 MKSTR(path, "%s/device/net/%s/%s",
229 priv->ctx->device->ibdev_path, name,
230 (dev_type ? "dev_id" : "dev_port"));
232 file = fopen(path, "rb");
237 * Switch to dev_id when dev_port does not exist as
238 * is the case with Linux kernel versions < 3.15.
249 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
254 * Switch to dev_id when dev_port returns the same value for
255 * all ports. May happen when using a MOFED release older than
256 * 3.0 with a Linux kernel >= 3.15.
258 if (dev_port == dev_port_prev)
260 dev_port_prev = dev_port;
261 if (dev_port == (priv->port - 1u))
262 snprintf(match, sizeof(match), "%s", name);
265 if (match[0] == '\0')
267 strncpy(*ifname, match, sizeof(*ifname));
272 * Read from sysfs entry.
275 * Pointer to private structure.
277 * Entry name relative to sysfs path.
279 * Data output buffer.
284 * 0 on success, -1 on failure and errno is set.
287 priv_sysfs_read(const struct priv *priv, const char *entry,
288 char *buf, size_t size)
290 char ifname[IF_NAMESIZE];
295 if (priv_get_ifname(priv, &ifname))
298 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
301 file = fopen(path, "rb");
304 ret = fread(buf, 1, size, file);
306 if (((size_t)ret < size) && (ferror(file)))
316 * Write to sysfs entry.
319 * Pointer to private structure.
321 * Entry name relative to sysfs path.
328 * 0 on success, -1 on failure and errno is set.
331 priv_sysfs_write(const struct priv *priv, const char *entry,
332 char *buf, size_t size)
334 char ifname[IF_NAMESIZE];
339 if (priv_get_ifname(priv, &ifname))
342 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
345 file = fopen(path, "wb");
348 ret = fwrite(buf, 1, size, file);
350 if (((size_t)ret < size) || (ferror(file)))
360 * Get unsigned long sysfs property.
363 * Pointer to private structure.
365 * Entry name relative to sysfs path.
367 * Value output buffer.
370 * 0 on success, -1 on failure and errno is set.
373 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
376 unsigned long value_ret;
379 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
381 DEBUG("cannot read %s value from sysfs: %s",
382 name, strerror(errno));
385 value_str[ret] = '\0';
387 value_ret = strtoul(value_str, NULL, 0);
389 DEBUG("invalid %s value `%s': %s", name, value_str,
398 * Set unsigned long sysfs property.
401 * Pointer to private structure.
403 * Entry name relative to sysfs path.
408 * 0 on success, -1 on failure and errno is set.
411 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
414 MKSTR(value_str, "%lu", value);
416 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
418 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
419 name, value_str, value, strerror(errno));
426 * Perform ifreq ioctl() on associated Ethernet device.
429 * Pointer to private structure.
431 * Request number to pass to ioctl().
433 * Interface request structure output buffer.
436 * 0 on success, -1 on failure and errno is set.
439 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
441 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
446 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
447 ret = ioctl(sock, req, ifr);
456 * Pointer to private structure.
458 * MTU value output buffer.
461 * 0 on success, -1 on failure and errno is set.
464 priv_get_mtu(struct priv *priv, uint16_t *mtu)
466 unsigned long ulong_mtu;
468 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
478 * Pointer to private structure.
483 * 0 on success, -1 on failure and errno is set.
486 priv_set_mtu(struct priv *priv, uint16_t mtu)
490 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
491 priv_get_mtu(priv, &new_mtu))
503 * Pointer to private structure.
505 * Bitmask for flags that must remain untouched.
507 * Bitmask for flags to modify.
510 * 0 on success, -1 on failure and errno is set.
513 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
517 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
520 tmp |= (flags & (~keep));
521 return priv_set_sysfs_ulong(priv, "flags", tmp);
524 /* Device configuration. */
527 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
528 unsigned int socket, const struct rte_eth_txconf *conf);
531 txq_cleanup(struct txq *txq);
534 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
535 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
536 struct rte_mempool *mp);
539 rxq_cleanup(struct rxq *rxq);
542 * Ethernet device configuration.
544 * Prepare the driver for a given number of TX and RX queues.
545 * Allocate parent RSS queue when several RX queues are requested.
548 * Pointer to Ethernet device structure.
551 * 0 on success, errno value on failure.
554 dev_configure(struct rte_eth_dev *dev)
556 struct priv *priv = dev->data->dev_private;
557 unsigned int rxqs_n = dev->data->nb_rx_queues;
558 unsigned int txqs_n = dev->data->nb_tx_queues;
562 priv->rxqs = (void *)dev->data->rx_queues;
563 priv->txqs = (void *)dev->data->tx_queues;
564 if (txqs_n != priv->txqs_n) {
565 INFO("%p: TX queues number update: %u -> %u",
566 (void *)dev, priv->txqs_n, txqs_n);
567 priv->txqs_n = txqs_n;
569 if (rxqs_n == priv->rxqs_n)
571 if (!rte_is_power_of_2(rxqs_n)) {
574 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
575 WARN("%p: number of RX queues must be a power"
576 " of 2: %u queues among %u will be active",
577 (void *)dev, n_active, rxqs_n);
580 INFO("%p: RX queues number update: %u -> %u",
581 (void *)dev, priv->rxqs_n, rxqs_n);
582 /* If RSS is enabled, disable it first. */
586 /* Only if there are no remaining child RX queues. */
587 for (i = 0; (i != priv->rxqs_n); ++i)
588 if ((*priv->rxqs)[i] != NULL)
590 rxq_cleanup(&priv->rxq_parent);
595 /* Nothing else to do. */
596 priv->rxqs_n = rxqs_n;
599 /* Allocate a new RSS parent queue if supported by hardware. */
601 ERROR("%p: only a single RX queue can be configured when"
602 " hardware doesn't support RSS",
606 /* Fail if hardware doesn't support that many RSS queues. */
607 if (rxqs_n >= priv->max_rss_tbl_sz) {
608 ERROR("%p: only %u RX queues can be configured for RSS",
609 (void *)dev, priv->max_rss_tbl_sz);
614 priv->rxqs_n = rxqs_n;
615 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, 0, NULL, NULL);
618 /* Failure, rollback. */
626 * DPDK callback for Ethernet device configuration.
629 * Pointer to Ethernet device structure.
632 * 0 on success, negative errno value on failure.
635 mlx4_dev_configure(struct rte_eth_dev *dev)
637 struct priv *priv = dev->data->dev_private;
640 if (mlx4_is_secondary())
641 return -E_RTE_SECONDARY;
643 ret = dev_configure(dev);
649 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
650 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
653 * Configure secondary process queues from a private data pointer (primary
654 * or secondary) and update burst callbacks. Can take place only once.
656 * All queues must have been previously created by the primary process to
657 * avoid undefined behavior.
660 * Private data pointer from either primary or secondary process.
663 * Private data pointer from secondary process, NULL in case of error.
666 mlx4_secondary_data_setup(struct priv *priv)
668 unsigned int port_id = 0;
669 struct mlx4_secondary_data *sd;
672 unsigned int nb_tx_queues;
673 unsigned int nb_rx_queues;
676 /* priv must be valid at this point. */
677 assert(priv != NULL);
678 /* priv->dev must also be valid but may point to local memory from
679 * another process, possibly with the same address and must not
680 * be dereferenced yet. */
681 assert(priv->dev != NULL);
682 /* Determine port ID by finding out where priv comes from. */
684 sd = &mlx4_secondary_data[port_id];
685 rte_spinlock_lock(&sd->lock);
686 /* Primary process? */
687 if (sd->primary_priv == priv)
689 /* Secondary process? */
690 if (sd->data.dev_private == priv)
692 rte_spinlock_unlock(&sd->lock);
693 if (++port_id == RTE_DIM(mlx4_secondary_data))
696 /* Switch to secondary private structure. If private data has already
697 * been updated by another thread, there is nothing else to do. */
698 priv = sd->data.dev_private;
699 if (priv->dev->data == &sd->data)
701 /* Sanity checks. Secondary private structure is supposed to point
702 * to local eth_dev, itself still pointing to the shared device data
703 * structure allocated by the primary process. */
704 assert(sd->shared_dev_data != &sd->data);
705 assert(sd->data.nb_tx_queues == 0);
706 assert(sd->data.tx_queues == NULL);
707 assert(sd->data.nb_rx_queues == 0);
708 assert(sd->data.rx_queues == NULL);
709 assert(priv != sd->primary_priv);
710 assert(priv->dev->data == sd->shared_dev_data);
711 assert(priv->txqs_n == 0);
712 assert(priv->txqs == NULL);
713 assert(priv->rxqs_n == 0);
714 assert(priv->rxqs == NULL);
715 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
716 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
717 /* Allocate local storage for queues. */
718 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
719 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
720 RTE_CACHE_LINE_SIZE);
721 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
722 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
723 RTE_CACHE_LINE_SIZE);
724 if (tx_queues == NULL || rx_queues == NULL)
726 /* Lock to prevent control operations during setup. */
729 for (i = 0; i != nb_tx_queues; ++i) {
730 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
733 if (primary_txq == NULL)
735 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
736 primary_txq->socket);
738 if (txq_setup(priv->dev,
740 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
743 txq->stats.idx = primary_txq->stats.idx;
750 txq = tx_queues[--i];
757 for (i = 0; i != nb_rx_queues; ++i) {
758 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
760 if (primary_rxq == NULL)
762 /* Not supported yet. */
765 /* Update everything. */
766 priv->txqs = (void *)tx_queues;
767 priv->txqs_n = nb_tx_queues;
768 priv->rxqs = (void *)rx_queues;
769 priv->rxqs_n = nb_rx_queues;
770 sd->data.rx_queues = rx_queues;
771 sd->data.tx_queues = tx_queues;
772 sd->data.nb_rx_queues = nb_rx_queues;
773 sd->data.nb_tx_queues = nb_tx_queues;
774 sd->data.dev_link = sd->shared_dev_data->dev_link;
775 sd->data.mtu = sd->shared_dev_data->mtu;
776 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
777 sizeof(sd->data.rx_queue_state));
778 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
779 sizeof(sd->data.tx_queue_state));
780 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
781 /* Use local data from now on. */
783 priv->dev->data = &sd->data;
785 priv->dev->tx_pkt_burst = mlx4_tx_burst;
786 priv->dev->rx_pkt_burst = removed_rx_burst;
789 /* More sanity checks. */
790 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
791 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
792 assert(priv->dev->data == &sd->data);
793 rte_spinlock_unlock(&sd->lock);
799 rte_spinlock_unlock(&sd->lock);
803 /* TX queues handling. */
806 * Allocate TX queue elements.
809 * Pointer to TX queue structure.
811 * Number of elements to allocate.
814 * 0 on success, errno value on failure.
817 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
820 struct txq_elt (*elts)[elts_n] =
821 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
822 linear_t (*elts_linear)[elts_n] =
823 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
825 struct ibv_mr *mr_linear = NULL;
828 if ((elts == NULL) || (elts_linear == NULL)) {
829 ERROR("%p: can't allocate packets array", (void *)txq);
834 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
835 IBV_ACCESS_LOCAL_WRITE);
836 if (mr_linear == NULL) {
837 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
842 for (i = 0; (i != elts_n); ++i) {
843 struct txq_elt *elt = &(*elts)[i];
847 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
848 txq->elts_n = elts_n;
853 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
854 * at least 4 times per ring. */
855 txq->elts_comp_cd_init =
856 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
857 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
858 txq->elts_comp_cd = txq->elts_comp_cd_init;
859 txq->elts_linear = elts_linear;
860 txq->mr_linear = mr_linear;
864 if (mr_linear != NULL)
865 claim_zero(ibv_dereg_mr(mr_linear));
867 rte_free(elts_linear);
870 DEBUG("%p: failed, freed everything", (void *)txq);
876 * Free TX queue elements.
879 * Pointer to TX queue structure.
882 txq_free_elts(struct txq *txq)
884 unsigned int elts_n = txq->elts_n;
885 unsigned int elts_head = txq->elts_head;
886 unsigned int elts_tail = txq->elts_tail;
887 struct txq_elt (*elts)[elts_n] = txq->elts;
888 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
889 struct ibv_mr *mr_linear = txq->mr_linear;
891 DEBUG("%p: freeing WRs", (void *)txq);
896 txq->elts_comp_cd = 0;
897 txq->elts_comp_cd_init = 0;
899 txq->elts_linear = NULL;
900 txq->mr_linear = NULL;
901 if (mr_linear != NULL)
902 claim_zero(ibv_dereg_mr(mr_linear));
904 rte_free(elts_linear);
907 while (elts_tail != elts_head) {
908 struct txq_elt *elt = &(*elts)[elts_tail];
910 assert(elt->buf != NULL);
911 rte_pktmbuf_free(elt->buf);
914 memset(elt, 0x77, sizeof(*elt));
916 if (++elts_tail == elts_n)
924 * Clean up a TX queue.
926 * Destroy objects, free allocated memory and reset the structure for reuse.
929 * Pointer to TX queue structure.
932 txq_cleanup(struct txq *txq)
934 struct ibv_exp_release_intf_params params;
937 DEBUG("cleaning up %p", (void *)txq);
939 if (txq->if_qp != NULL) {
940 assert(txq->priv != NULL);
941 assert(txq->priv->ctx != NULL);
942 assert(txq->qp != NULL);
943 params = (struct ibv_exp_release_intf_params){
946 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
950 if (txq->if_cq != NULL) {
951 assert(txq->priv != NULL);
952 assert(txq->priv->ctx != NULL);
953 assert(txq->cq != NULL);
954 params = (struct ibv_exp_release_intf_params){
957 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
962 claim_zero(ibv_destroy_qp(txq->qp));
964 claim_zero(ibv_destroy_cq(txq->cq));
965 if (txq->rd != NULL) {
966 struct ibv_exp_destroy_res_domain_attr attr = {
970 assert(txq->priv != NULL);
971 assert(txq->priv->ctx != NULL);
972 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
976 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
977 if (txq->mp2mr[i].mp == NULL)
979 assert(txq->mp2mr[i].mr != NULL);
980 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
982 memset(txq, 0, sizeof(*txq));
986 * Manage TX completions.
988 * When sending a burst, mlx4_tx_burst() posts several WRs.
989 * To improve performance, a completion event is only required once every
990 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
991 * for other WRs, but this information would not be used anyway.
994 * Pointer to TX queue structure.
997 * 0 on success, -1 on failure.
1000 txq_complete(struct txq *txq)
1002 unsigned int elts_comp = txq->elts_comp;
1003 unsigned int elts_tail = txq->elts_tail;
1004 const unsigned int elts_n = txq->elts_n;
1007 if (unlikely(elts_comp == 0))
1010 DEBUG("%p: processing %u work requests completions",
1011 (void *)txq, elts_comp);
1013 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1014 if (unlikely(wcs_n == 0))
1016 if (unlikely(wcs_n < 0)) {
1017 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1018 (void *)txq, wcs_n);
1022 assert(elts_comp <= txq->elts_comp);
1024 * Assume WC status is successful as nothing can be done about it
1027 elts_tail += wcs_n * txq->elts_comp_cd_init;
1028 if (elts_tail >= elts_n)
1029 elts_tail -= elts_n;
1030 txq->elts_tail = elts_tail;
1031 txq->elts_comp = elts_comp;
1035 struct mlx4_check_mempool_data {
1041 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
1042 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
1043 void *opaque, struct rte_mempool_memhdr *memhdr,
1046 struct mlx4_check_mempool_data *data = opaque;
1051 /* It already failed, skip the next chunks. */
1054 /* It is the first chunk. */
1055 if (data->start == NULL && data->end == NULL) {
1056 data->start = memhdr->addr;
1057 data->end = data->start + memhdr->len;
1060 if (data->end == memhdr->addr) {
1061 data->end += memhdr->len;
1064 if (data->start == (char *)memhdr->addr + memhdr->len) {
1065 data->start -= memhdr->len;
1068 /* Error, mempool is not virtually contigous. */
1073 * Check if a mempool can be used: it must be virtually contiguous.
1076 * Pointer to memory pool.
1078 * Pointer to the start address of the mempool virtual memory area
1080 * Pointer to the end address of the mempool virtual memory area
1083 * 0 on success (mempool is virtually contiguous), -1 on error.
1085 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
1088 struct mlx4_check_mempool_data data;
1090 memset(&data, 0, sizeof(data));
1091 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
1092 *start = (uintptr_t)data.start;
1093 *end = (uintptr_t)data.end;
1098 /* For best performance, this function should not be inlined. */
1099 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1100 __attribute__((noinline));
1103 * Register mempool as a memory region.
1106 * Pointer to protection domain.
1108 * Pointer to memory pool.
1111 * Memory region pointer, NULL in case of error.
1113 static struct ibv_mr *
1114 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1116 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1121 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1122 ERROR("mempool %p: not virtually contiguous",
1127 DEBUG("mempool %p area start=%p end=%p size=%zu",
1128 (void *)mp, (void *)start, (void *)end,
1129 (size_t)(end - start));
1130 /* Round start and end to page boundary if found in memory segments. */
1131 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1132 uintptr_t addr = (uintptr_t)ms[i].addr;
1133 size_t len = ms[i].len;
1134 unsigned int align = ms[i].hugepage_sz;
1136 if ((start > addr) && (start < addr + len))
1137 start = RTE_ALIGN_FLOOR(start, align);
1138 if ((end > addr) && (end < addr + len))
1139 end = RTE_ALIGN_CEIL(end, align);
1141 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1142 (void *)mp, (void *)start, (void *)end,
1143 (size_t)(end - start));
1144 return ibv_reg_mr(pd,
1147 IBV_ACCESS_LOCAL_WRITE);
1151 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1152 * the cloned mbuf is allocated is returned instead.
1158 * Memory pool where data is located for given mbuf.
1160 static struct rte_mempool *
1161 txq_mb2mp(struct rte_mbuf *buf)
1163 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1164 return rte_mbuf_from_indirect(buf)->pool;
1169 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1170 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1171 * remove an entry first.
1174 * Pointer to TX queue structure.
1176 * Memory Pool for which a Memory Region lkey must be returned.
1179 * mr->lkey on success, (uint32_t)-1 on failure.
1182 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1187 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1188 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1189 /* Unknown MP, add a new MR for it. */
1192 if (txq->mp2mr[i].mp == mp) {
1193 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1194 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1195 return txq->mp2mr[i].lkey;
1198 /* Add a new entry, register MR first. */
1199 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1200 (void *)txq, mp->name, (void *)mp);
1201 mr = mlx4_mp2mr(txq->priv->pd, mp);
1202 if (unlikely(mr == NULL)) {
1203 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1205 return (uint32_t)-1;
1207 if (unlikely(i == elemof(txq->mp2mr))) {
1208 /* Table is full, remove oldest entry. */
1209 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1212 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1213 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1214 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1216 /* Store the new entry. */
1217 txq->mp2mr[i].mp = mp;
1218 txq->mp2mr[i].mr = mr;
1219 txq->mp2mr[i].lkey = mr->lkey;
1220 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1221 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1222 return txq->mp2mr[i].lkey;
1225 struct txq_mp2mr_mbuf_check_data {
1230 * Callback function for rte_mempool_obj_iter() to check whether a given
1231 * mempool object looks like a mbuf.
1234 * The mempool pointer
1236 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1241 * Object index, unused.
1244 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1245 uint32_t index __rte_unused)
1247 struct txq_mp2mr_mbuf_check_data *data = arg;
1248 struct rte_mbuf *buf = obj;
1250 /* Check whether mbuf structure fits element size and whether mempool
1251 * pointer is valid. */
1252 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1257 * Iterator function for rte_mempool_walk() to register existing mempools and
1258 * fill the MP to MR cache of a TX queue.
1261 * Memory Pool to register.
1263 * Pointer to TX queue structure.
1266 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1268 struct txq *txq = arg;
1269 struct txq_mp2mr_mbuf_check_data data = {
1273 /* Register mempool only if the first element looks like a mbuf. */
1274 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1280 #if MLX4_PMD_SGE_WR_N > 1
1283 * Copy scattered mbuf contents to a single linear buffer.
1285 * @param[out] linear
1286 * Linear output buffer.
1288 * Scattered input buffer.
1291 * Number of bytes copied to the output buffer or 0 if not large enough.
1294 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1296 unsigned int size = 0;
1297 unsigned int offset;
1300 unsigned int len = DATA_LEN(buf);
1304 if (unlikely(size > sizeof(*linear)))
1306 memcpy(&(*linear)[offset],
1307 rte_pktmbuf_mtod(buf, uint8_t *),
1310 } while (buf != NULL);
1315 * Handle scattered buffers for mlx4_tx_burst().
1318 * TX queue structure.
1320 * Number of segments in buf.
1322 * TX queue element to fill.
1324 * Buffer to process.
1326 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1328 * Array filled with SGEs on success.
1331 * A structure containing the processed packet size in bytes and the
1332 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1335 static struct tx_burst_sg_ret {
1336 unsigned int length;
1339 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1340 struct rte_mbuf *buf, unsigned int elts_head,
1341 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1343 unsigned int sent_size = 0;
1347 /* When there are too many segments, extra segments are
1348 * linearized in the last SGE. */
1349 if (unlikely(segs > elemof(*sges))) {
1350 segs = (elemof(*sges) - 1);
1353 /* Update element. */
1355 /* Register segments as SGEs. */
1356 for (j = 0; (j != segs); ++j) {
1357 struct ibv_sge *sge = &(*sges)[j];
1360 /* Retrieve Memory Region key for this memory pool. */
1361 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1362 if (unlikely(lkey == (uint32_t)-1)) {
1363 /* MR does not exist. */
1364 DEBUG("%p: unable to get MP <-> MR association",
1366 /* Clean up TX element. */
1371 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1373 rte_prefetch0((volatile void *)
1374 (uintptr_t)sge->addr);
1375 sge->length = DATA_LEN(buf);
1377 sent_size += sge->length;
1380 /* If buf is not NULL here and is not going to be linearized,
1381 * nb_segs is not valid. */
1383 assert((buf == NULL) || (linearize));
1384 /* Linearize extra segments. */
1386 struct ibv_sge *sge = &(*sges)[segs];
1387 linear_t *linear = &(*txq->elts_linear)[elts_head];
1388 unsigned int size = linearize_mbuf(linear, buf);
1390 assert(segs == (elemof(*sges) - 1));
1392 /* Invalid packet. */
1393 DEBUG("%p: packet too large to be linearized.",
1395 /* Clean up TX element. */
1399 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1400 if (elemof(*sges) == 1) {
1402 struct rte_mbuf *next = NEXT(buf);
1404 rte_pktmbuf_free_seg(buf);
1406 } while (buf != NULL);
1410 sge->addr = (uintptr_t)&(*linear)[0];
1412 sge->lkey = txq->mr_linear->lkey;
1414 /* Include last segment. */
1417 return (struct tx_burst_sg_ret){
1418 .length = sent_size,
1422 return (struct tx_burst_sg_ret){
1428 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1431 * DPDK callback for TX.
1434 * Generic pointer to TX queue structure.
1436 * Packets to transmit.
1438 * Number of packets in array.
1441 * Number of packets successfully transmitted (<= pkts_n).
1444 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1446 struct txq *txq = (struct txq *)dpdk_txq;
1447 unsigned int elts_head = txq->elts_head;
1448 const unsigned int elts_n = txq->elts_n;
1449 unsigned int elts_comp_cd = txq->elts_comp_cd;
1450 unsigned int elts_comp = 0;
1455 assert(elts_comp_cd != 0);
1457 max = (elts_n - (elts_head - txq->elts_tail));
1461 assert(max <= elts_n);
1462 /* Always leave one free entry in the ring. */
1468 for (i = 0; (i != max); ++i) {
1469 struct rte_mbuf *buf = pkts[i];
1470 unsigned int elts_head_next =
1471 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1472 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1473 struct txq_elt *elt = &(*txq->elts)[elts_head];
1474 unsigned int segs = NB_SEGS(buf);
1475 #ifdef MLX4_PMD_SOFT_COUNTERS
1476 unsigned int sent_size = 0;
1478 uint32_t send_flags = 0;
1480 /* Clean up old buffer. */
1481 if (likely(elt->buf != NULL)) {
1482 struct rte_mbuf *tmp = elt->buf;
1486 memset(elt, 0x66, sizeof(*elt));
1488 /* Faster than rte_pktmbuf_free(). */
1490 struct rte_mbuf *next = NEXT(tmp);
1492 rte_pktmbuf_free_seg(tmp);
1494 } while (tmp != NULL);
1496 /* Request TX completion. */
1497 if (unlikely(--elts_comp_cd == 0)) {
1498 elts_comp_cd = txq->elts_comp_cd_init;
1500 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1502 /* Should we enable HW CKSUM offload */
1504 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1505 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1506 /* HW does not support checksum offloads at arbitrary
1507 * offsets but automatically recognizes the packet
1508 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1509 * tunnels are currently supported. */
1510 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1511 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1513 if (likely(segs == 1)) {
1518 /* Retrieve buffer information. */
1519 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1520 length = DATA_LEN(buf);
1521 /* Retrieve Memory Region key for this memory pool. */
1522 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1523 if (unlikely(lkey == (uint32_t)-1)) {
1524 /* MR does not exist. */
1525 DEBUG("%p: unable to get MP <-> MR"
1526 " association", (void *)txq);
1527 /* Clean up TX element. */
1531 /* Update element. */
1534 rte_prefetch0((volatile void *)
1536 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1537 /* Put packet into send queue. */
1538 #if MLX4_PMD_MAX_INLINE > 0
1539 if (length <= txq->max_inline)
1540 err = txq->if_qp->send_pending_inline
1547 err = txq->if_qp->send_pending
1555 #ifdef MLX4_PMD_SOFT_COUNTERS
1556 sent_size += length;
1559 #if MLX4_PMD_SGE_WR_N > 1
1560 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1561 struct tx_burst_sg_ret ret;
1563 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1565 if (ret.length == (unsigned int)-1)
1567 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1568 /* Put SG list into send queue. */
1569 err = txq->if_qp->send_pending_sg_list
1576 #ifdef MLX4_PMD_SOFT_COUNTERS
1577 sent_size += ret.length;
1579 #else /* MLX4_PMD_SGE_WR_N > 1 */
1580 DEBUG("%p: TX scattered buffers support not"
1581 " compiled in", (void *)txq);
1583 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1585 elts_head = elts_head_next;
1586 #ifdef MLX4_PMD_SOFT_COUNTERS
1587 /* Increment sent bytes counter. */
1588 txq->stats.obytes += sent_size;
1592 /* Take a shortcut if nothing must be sent. */
1593 if (unlikely(i == 0))
1595 #ifdef MLX4_PMD_SOFT_COUNTERS
1596 /* Increment sent packets counter. */
1597 txq->stats.opackets += i;
1599 /* Ring QP doorbell. */
1600 err = txq->if_qp->send_flush(txq->qp);
1601 if (unlikely(err)) {
1602 /* A nonzero value is not supposed to be returned.
1603 * Nothing can be done about it. */
1604 DEBUG("%p: send_flush() failed with error %d",
1607 txq->elts_head = elts_head;
1608 txq->elts_comp += elts_comp;
1609 txq->elts_comp_cd = elts_comp_cd;
1614 * DPDK callback for TX in secondary processes.
1616 * This function configures all queues from primary process information
1617 * if necessary before reverting to the normal TX burst callback.
1620 * Generic pointer to TX queue structure.
1622 * Packets to transmit.
1624 * Number of packets in array.
1627 * Number of packets successfully transmitted (<= pkts_n).
1630 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1633 struct txq *txq = dpdk_txq;
1634 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1635 struct priv *primary_priv;
1641 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1642 /* Look for queue index in both private structures. */
1643 for (index = 0; index != priv->txqs_n; ++index)
1644 if (((*primary_priv->txqs)[index] == txq) ||
1645 ((*priv->txqs)[index] == txq))
1647 if (index == priv->txqs_n)
1649 txq = (*priv->txqs)[index];
1650 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1654 * Configure a TX queue.
1657 * Pointer to Ethernet device structure.
1659 * Pointer to TX queue structure.
1661 * Number of descriptors to configure in queue.
1663 * NUMA socket on which memory must be allocated.
1665 * Thresholds parameters.
1668 * 0 on success, errno value on failure.
1671 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1672 unsigned int socket, const struct rte_eth_txconf *conf)
1674 struct priv *priv = mlx4_get_priv(dev);
1680 struct ibv_exp_query_intf_params params;
1681 struct ibv_exp_qp_init_attr init;
1682 struct ibv_exp_res_domain_init_attr rd;
1683 struct ibv_exp_cq_init_attr cq;
1684 struct ibv_exp_qp_attr mod;
1686 enum ibv_exp_query_intf_status status;
1689 (void)conf; /* Thresholds configuration (ignored). */
1692 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1693 ERROR("%p: invalid number of TX descriptors (must be a"
1694 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1697 desc /= MLX4_PMD_SGE_WR_N;
1698 /* MRs will be registered in mp2mr[] later. */
1699 attr.rd = (struct ibv_exp_res_domain_init_attr){
1700 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1701 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1702 .thread_model = IBV_EXP_THREAD_SINGLE,
1703 .msg_model = IBV_EXP_MSG_HIGH_BW,
1705 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1706 if (tmpl.rd == NULL) {
1708 ERROR("%p: RD creation failure: %s",
1709 (void *)dev, strerror(ret));
1712 attr.cq = (struct ibv_exp_cq_init_attr){
1713 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1714 .res_domain = tmpl.rd,
1716 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1717 if (tmpl.cq == NULL) {
1719 ERROR("%p: CQ creation failure: %s",
1720 (void *)dev, strerror(ret));
1723 DEBUG("priv->device_attr.max_qp_wr is %d",
1724 priv->device_attr.max_qp_wr);
1725 DEBUG("priv->device_attr.max_sge is %d",
1726 priv->device_attr.max_sge);
1727 attr.init = (struct ibv_exp_qp_init_attr){
1728 /* CQ to be associated with the send queue. */
1730 /* CQ to be associated with the receive queue. */
1733 /* Max number of outstanding WRs. */
1734 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1735 priv->device_attr.max_qp_wr :
1737 /* Max number of scatter/gather elements in a WR. */
1738 .max_send_sge = ((priv->device_attr.max_sge <
1739 MLX4_PMD_SGE_WR_N) ?
1740 priv->device_attr.max_sge :
1742 #if MLX4_PMD_MAX_INLINE > 0
1743 .max_inline_data = MLX4_PMD_MAX_INLINE,
1746 .qp_type = IBV_QPT_RAW_PACKET,
1747 /* Do *NOT* enable this, completions events are managed per
1751 .res_domain = tmpl.rd,
1752 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1753 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1755 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1756 if (tmpl.qp == NULL) {
1757 ret = (errno ? errno : EINVAL);
1758 ERROR("%p: QP creation failure: %s",
1759 (void *)dev, strerror(ret));
1762 #if MLX4_PMD_MAX_INLINE > 0
1763 /* ibv_create_qp() updates this value. */
1764 tmpl.max_inline = attr.init.cap.max_inline_data;
1766 attr.mod = (struct ibv_exp_qp_attr){
1767 /* Move the QP to this state. */
1768 .qp_state = IBV_QPS_INIT,
1769 /* Primary port number. */
1770 .port_num = priv->port
1772 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1773 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1775 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1776 (void *)dev, strerror(ret));
1779 ret = txq_alloc_elts(&tmpl, desc);
1781 ERROR("%p: TXQ allocation failed: %s",
1782 (void *)dev, strerror(ret));
1785 attr.mod = (struct ibv_exp_qp_attr){
1786 .qp_state = IBV_QPS_RTR
1788 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1790 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1791 (void *)dev, strerror(ret));
1794 attr.mod.qp_state = IBV_QPS_RTS;
1795 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1797 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1798 (void *)dev, strerror(ret));
1801 attr.params = (struct ibv_exp_query_intf_params){
1802 .intf_scope = IBV_EXP_INTF_GLOBAL,
1803 .intf = IBV_EXP_INTF_CQ,
1806 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1807 if (tmpl.if_cq == NULL) {
1808 ERROR("%p: CQ interface family query failed with status %d",
1809 (void *)dev, status);
1812 attr.params = (struct ibv_exp_query_intf_params){
1813 .intf_scope = IBV_EXP_INTF_GLOBAL,
1814 .intf = IBV_EXP_INTF_QP_BURST,
1816 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1817 /* MC loopback must be disabled when not using a VF. */
1820 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1824 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1825 if (tmpl.if_qp == NULL) {
1826 ERROR("%p: QP interface family query failed with status %d",
1827 (void *)dev, status);
1830 /* Clean up txq in case we're reinitializing it. */
1831 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1834 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1835 /* Pre-register known mempools. */
1836 rte_mempool_walk(txq_mp2mr_iter, txq);
1846 * DPDK callback to configure a TX queue.
1849 * Pointer to Ethernet device structure.
1853 * Number of descriptors to configure in queue.
1855 * NUMA socket on which memory must be allocated.
1857 * Thresholds parameters.
1860 * 0 on success, negative errno value on failure.
1863 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1864 unsigned int socket, const struct rte_eth_txconf *conf)
1866 struct priv *priv = dev->data->dev_private;
1867 struct txq *txq = (*priv->txqs)[idx];
1870 if (mlx4_is_secondary())
1871 return -E_RTE_SECONDARY;
1873 DEBUG("%p: configuring queue %u for %u descriptors",
1874 (void *)dev, idx, desc);
1875 if (idx >= priv->txqs_n) {
1876 ERROR("%p: queue index out of range (%u >= %u)",
1877 (void *)dev, idx, priv->txqs_n);
1882 DEBUG("%p: reusing already allocated queue index %u (%p)",
1883 (void *)dev, idx, (void *)txq);
1884 if (priv->started) {
1888 (*priv->txqs)[idx] = NULL;
1891 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1893 ERROR("%p: unable to allocate queue index %u",
1899 ret = txq_setup(dev, txq, desc, socket, conf);
1903 txq->stats.idx = idx;
1904 DEBUG("%p: adding TX queue %p to list",
1905 (void *)dev, (void *)txq);
1906 (*priv->txqs)[idx] = txq;
1907 /* Update send callback. */
1908 dev->tx_pkt_burst = mlx4_tx_burst;
1915 * DPDK callback to release a TX queue.
1918 * Generic TX queue pointer.
1921 mlx4_tx_queue_release(void *dpdk_txq)
1923 struct txq *txq = (struct txq *)dpdk_txq;
1927 if (mlx4_is_secondary())
1933 for (i = 0; (i != priv->txqs_n); ++i)
1934 if ((*priv->txqs)[i] == txq) {
1935 DEBUG("%p: removing TX queue %p from list",
1936 (void *)priv->dev, (void *)txq);
1937 (*priv->txqs)[i] = NULL;
1945 /* RX queues handling. */
1948 * Allocate RX queue elements with scattered packets support.
1951 * Pointer to RX queue structure.
1953 * Number of elements to allocate.
1955 * If not NULL, fetch buffers from this array instead of allocating them
1956 * with rte_pktmbuf_alloc().
1959 * 0 on success, errno value on failure.
1962 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
1963 struct rte_mbuf **pool)
1966 struct rxq_elt_sp (*elts)[elts_n] =
1967 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1972 ERROR("%p: can't allocate packets array", (void *)rxq);
1976 /* For each WR (packet). */
1977 for (i = 0; (i != elts_n); ++i) {
1979 struct rxq_elt_sp *elt = &(*elts)[i];
1980 struct ibv_recv_wr *wr = &elt->wr;
1981 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
1983 /* These two arrays must have the same size. */
1984 assert(elemof(elt->sges) == elemof(elt->bufs));
1987 wr->next = &(*elts)[(i + 1)].wr;
1988 wr->sg_list = &(*sges)[0];
1989 wr->num_sge = elemof(*sges);
1990 /* For each SGE (segment). */
1991 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1992 struct ibv_sge *sge = &(*sges)[j];
1993 struct rte_mbuf *buf;
1997 assert(buf != NULL);
1998 rte_pktmbuf_reset(buf);
2000 buf = rte_pktmbuf_alloc(rxq->mp);
2002 assert(pool == NULL);
2003 ERROR("%p: empty mbuf pool", (void *)rxq);
2008 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2009 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2010 /* Buffer is supposed to be empty. */
2011 assert(rte_pktmbuf_data_len(buf) == 0);
2012 assert(rte_pktmbuf_pkt_len(buf) == 0);
2013 /* sge->addr must be able to store a pointer. */
2014 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2016 /* The first SGE keeps its headroom. */
2017 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2018 sge->length = (buf->buf_len -
2019 RTE_PKTMBUF_HEADROOM);
2021 /* Subsequent SGEs lose theirs. */
2022 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2023 SET_DATA_OFF(buf, 0);
2024 sge->addr = (uintptr_t)buf->buf_addr;
2025 sge->length = buf->buf_len;
2027 sge->lkey = rxq->mr->lkey;
2028 /* Redundant check for tailroom. */
2029 assert(sge->length == rte_pktmbuf_tailroom(buf));
2032 /* The last WR pointer must be NULL. */
2033 (*elts)[(i - 1)].wr.next = NULL;
2034 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2035 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2036 rxq->elts_n = elts_n;
2038 rxq->elts.sp = elts;
2043 assert(pool == NULL);
2044 for (i = 0; (i != elemof(*elts)); ++i) {
2046 struct rxq_elt_sp *elt = &(*elts)[i];
2048 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2049 struct rte_mbuf *buf = elt->bufs[j];
2052 rte_pktmbuf_free_seg(buf);
2057 DEBUG("%p: failed, freed everything", (void *)rxq);
2063 * Free RX queue elements with scattered packets support.
2066 * Pointer to RX queue structure.
2069 rxq_free_elts_sp(struct rxq *rxq)
2072 unsigned int elts_n = rxq->elts_n;
2073 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2075 DEBUG("%p: freeing WRs", (void *)rxq);
2077 rxq->elts.sp = NULL;
2080 for (i = 0; (i != elemof(*elts)); ++i) {
2082 struct rxq_elt_sp *elt = &(*elts)[i];
2084 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2085 struct rte_mbuf *buf = elt->bufs[j];
2088 rte_pktmbuf_free_seg(buf);
2095 * Allocate RX queue elements.
2098 * Pointer to RX queue structure.
2100 * Number of elements to allocate.
2102 * If not NULL, fetch buffers from this array instead of allocating them
2103 * with rte_pktmbuf_alloc().
2106 * 0 on success, errno value on failure.
2109 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2112 struct rxq_elt (*elts)[elts_n] =
2113 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2118 ERROR("%p: can't allocate packets array", (void *)rxq);
2122 /* For each WR (packet). */
2123 for (i = 0; (i != elts_n); ++i) {
2124 struct rxq_elt *elt = &(*elts)[i];
2125 struct ibv_recv_wr *wr = &elt->wr;
2126 struct ibv_sge *sge = &(*elts)[i].sge;
2127 struct rte_mbuf *buf;
2131 assert(buf != NULL);
2132 rte_pktmbuf_reset(buf);
2134 buf = rte_pktmbuf_alloc(rxq->mp);
2136 assert(pool == NULL);
2137 ERROR("%p: empty mbuf pool", (void *)rxq);
2141 /* Configure WR. Work request ID contains its own index in
2142 * the elts array and the offset between SGE buffer header and
2144 WR_ID(wr->wr_id).id = i;
2145 WR_ID(wr->wr_id).offset =
2146 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2148 wr->next = &(*elts)[(i + 1)].wr;
2151 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2152 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2153 /* Buffer is supposed to be empty. */
2154 assert(rte_pktmbuf_data_len(buf) == 0);
2155 assert(rte_pktmbuf_pkt_len(buf) == 0);
2156 /* sge->addr must be able to store a pointer. */
2157 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2158 /* SGE keeps its headroom. */
2159 sge->addr = (uintptr_t)
2160 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2161 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2162 sge->lkey = rxq->mr->lkey;
2163 /* Redundant check for tailroom. */
2164 assert(sge->length == rte_pktmbuf_tailroom(buf));
2165 /* Make sure elts index and SGE mbuf pointer can be deduced
2167 if ((WR_ID(wr->wr_id).id != i) ||
2168 ((void *)((uintptr_t)sge->addr -
2169 WR_ID(wr->wr_id).offset) != buf)) {
2170 ERROR("%p: cannot store index and offset in WR ID",
2173 rte_pktmbuf_free(buf);
2178 /* The last WR pointer must be NULL. */
2179 (*elts)[(i - 1)].wr.next = NULL;
2180 DEBUG("%p: allocated and configured %u single-segment WRs",
2181 (void *)rxq, elts_n);
2182 rxq->elts_n = elts_n;
2184 rxq->elts.no_sp = elts;
2189 assert(pool == NULL);
2190 for (i = 0; (i != elemof(*elts)); ++i) {
2191 struct rxq_elt *elt = &(*elts)[i];
2192 struct rte_mbuf *buf;
2194 if (elt->sge.addr == 0)
2196 assert(WR_ID(elt->wr.wr_id).id == i);
2197 buf = (void *)((uintptr_t)elt->sge.addr -
2198 WR_ID(elt->wr.wr_id).offset);
2199 rte_pktmbuf_free_seg(buf);
2203 DEBUG("%p: failed, freed everything", (void *)rxq);
2209 * Free RX queue elements.
2212 * Pointer to RX queue structure.
2215 rxq_free_elts(struct rxq *rxq)
2218 unsigned int elts_n = rxq->elts_n;
2219 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2221 DEBUG("%p: freeing WRs", (void *)rxq);
2223 rxq->elts.no_sp = NULL;
2226 for (i = 0; (i != elemof(*elts)); ++i) {
2227 struct rxq_elt *elt = &(*elts)[i];
2228 struct rte_mbuf *buf;
2230 if (elt->sge.addr == 0)
2232 assert(WR_ID(elt->wr.wr_id).id == i);
2233 buf = (void *)((uintptr_t)elt->sge.addr -
2234 WR_ID(elt->wr.wr_id).offset);
2235 rte_pktmbuf_free_seg(buf);
2241 * Delete flow steering rule.
2244 * Pointer to RX queue structure.
2246 * MAC address index.
2251 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2254 struct priv *priv = rxq->priv;
2255 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2256 (const uint8_t (*)[ETHER_ADDR_LEN])
2257 priv->mac[mac_index].addr_bytes;
2259 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2260 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2261 " (VLAN ID %" PRIu16 ")",
2263 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2264 mac_index, priv->vlan_filter[vlan_index].id);
2265 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2266 rxq->mac_flow[mac_index][vlan_index] = NULL;
2270 * Unregister a MAC address from a RX queue.
2273 * Pointer to RX queue structure.
2275 * MAC address index.
2278 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2280 struct priv *priv = rxq->priv;
2282 unsigned int vlans = 0;
2284 assert(mac_index < elemof(priv->mac));
2285 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2287 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2288 if (!priv->vlan_filter[i].enabled)
2290 rxq_del_flow(rxq, mac_index, i);
2294 rxq_del_flow(rxq, mac_index, 0);
2296 BITFIELD_RESET(rxq->mac_configured, mac_index);
2300 * Unregister all MAC addresses from a RX queue.
2303 * Pointer to RX queue structure.
2306 rxq_mac_addrs_del(struct rxq *rxq)
2308 struct priv *priv = rxq->priv;
2311 for (i = 0; (i != elemof(priv->mac)); ++i)
2312 rxq_mac_addr_del(rxq, i);
2315 static int rxq_promiscuous_enable(struct rxq *);
2316 static void rxq_promiscuous_disable(struct rxq *);
2319 * Add single flow steering rule.
2322 * Pointer to RX queue structure.
2324 * MAC address index to register.
2326 * VLAN index. Use -1 for a flow without VLAN.
2329 * 0 on success, errno value on failure.
2332 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2334 struct ibv_flow *flow;
2335 struct priv *priv = rxq->priv;
2336 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2337 (const uint8_t (*)[ETHER_ADDR_LEN])
2338 priv->mac[mac_index].addr_bytes;
2340 /* Allocate flow specification on the stack. */
2341 struct __attribute__((packed)) {
2342 struct ibv_flow_attr attr;
2343 struct ibv_flow_spec_eth spec;
2345 struct ibv_flow_attr *attr = &data.attr;
2346 struct ibv_flow_spec_eth *spec = &data.spec;
2348 assert(mac_index < elemof(priv->mac));
2349 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2351 * No padding must be inserted by the compiler between attr and spec.
2352 * This layout is expected by libibverbs.
2354 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2355 *attr = (struct ibv_flow_attr){
2356 .type = IBV_FLOW_ATTR_NORMAL,
2362 *spec = (struct ibv_flow_spec_eth){
2363 .type = IBV_FLOW_SPEC_ETH,
2364 .size = sizeof(*spec),
2367 (*mac)[0], (*mac)[1], (*mac)[2],
2368 (*mac)[3], (*mac)[4], (*mac)[5]
2370 .vlan_tag = ((vlan_index != -1u) ?
2371 htons(priv->vlan_filter[vlan_index].id) :
2375 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2376 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2379 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2380 " (VLAN %s %" PRIu16 ")",
2382 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2384 ((vlan_index != -1u) ? "ID" : "index"),
2385 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2386 /* Create related flow. */
2388 flow = ibv_create_flow(rxq->qp, attr);
2390 /* It's not clear whether errno is always set in this case. */
2391 ERROR("%p: flow configuration failed, errno=%d: %s",
2393 (errno ? strerror(errno) : "Unknown error"));
2398 if (vlan_index == -1u)
2400 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2401 rxq->mac_flow[mac_index][vlan_index] = flow;
2406 * Register a MAC address in a RX queue.
2409 * Pointer to RX queue structure.
2411 * MAC address index to register.
2414 * 0 on success, errno value on failure.
2417 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2419 struct priv *priv = rxq->priv;
2421 unsigned int vlans = 0;
2424 assert(mac_index < elemof(priv->mac));
2425 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2426 rxq_mac_addr_del(rxq, mac_index);
2427 /* Fill VLAN specifications. */
2428 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2429 if (!priv->vlan_filter[i].enabled)
2431 /* Create related flow. */
2432 ret = rxq_add_flow(rxq, mac_index, i);
2437 /* Failure, rollback. */
2439 if (priv->vlan_filter[--i].enabled)
2440 rxq_del_flow(rxq, mac_index, i);
2444 /* In case there is no VLAN filter. */
2446 ret = rxq_add_flow(rxq, mac_index, -1);
2450 BITFIELD_SET(rxq->mac_configured, mac_index);
2455 * Register all MAC addresses in a RX queue.
2458 * Pointer to RX queue structure.
2461 * 0 on success, errno value on failure.
2464 rxq_mac_addrs_add(struct rxq *rxq)
2466 struct priv *priv = rxq->priv;
2470 for (i = 0; (i != elemof(priv->mac)); ++i) {
2471 if (!BITFIELD_ISSET(priv->mac_configured, i))
2473 ret = rxq_mac_addr_add(rxq, i);
2476 /* Failure, rollback. */
2478 rxq_mac_addr_del(rxq, --i);
2486 * Unregister a MAC address.
2488 * In RSS mode, the MAC address is unregistered from the parent queue,
2489 * otherwise it is unregistered from each queue directly.
2492 * Pointer to private structure.
2494 * MAC address index.
2497 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2501 assert(mac_index < elemof(priv->mac));
2502 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2505 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2508 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2509 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2511 BITFIELD_RESET(priv->mac_configured, mac_index);
2515 * Register a MAC address.
2517 * In RSS mode, the MAC address is registered in the parent queue,
2518 * otherwise it is registered in each queue directly.
2521 * Pointer to private structure.
2523 * MAC address index to use.
2525 * MAC address to register.
2528 * 0 on success, errno value on failure.
2531 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2532 const uint8_t (*mac)[ETHER_ADDR_LEN])
2537 assert(mac_index < elemof(priv->mac));
2538 /* First, make sure this address isn't already configured. */
2539 for (i = 0; (i != elemof(priv->mac)); ++i) {
2540 /* Skip this index, it's going to be reconfigured. */
2543 if (!BITFIELD_ISSET(priv->mac_configured, i))
2545 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2547 /* Address already configured elsewhere, return with error. */
2550 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2551 priv_mac_addr_del(priv, mac_index);
2552 priv->mac[mac_index] = (struct ether_addr){
2554 (*mac)[0], (*mac)[1], (*mac)[2],
2555 (*mac)[3], (*mac)[4], (*mac)[5]
2558 /* If device isn't started, this is all we need to do. */
2559 if (!priv->started) {
2561 /* Verify that all queues have this index disabled. */
2562 for (i = 0; (i != priv->rxqs_n); ++i) {
2563 if ((*priv->rxqs)[i] == NULL)
2565 assert(!BITFIELD_ISSET
2566 ((*priv->rxqs)[i]->mac_configured, mac_index));
2572 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2577 for (i = 0; (i != priv->rxqs_n); ++i) {
2578 if ((*priv->rxqs)[i] == NULL)
2580 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2583 /* Failure, rollback. */
2585 if ((*priv->rxqs)[(--i)] != NULL)
2586 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2590 BITFIELD_SET(priv->mac_configured, mac_index);
2595 * Enable allmulti mode in a RX queue.
2598 * Pointer to RX queue structure.
2601 * 0 on success, errno value on failure.
2604 rxq_allmulticast_enable(struct rxq *rxq)
2606 struct ibv_flow *flow;
2607 struct ibv_flow_attr attr = {
2608 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2610 .port = rxq->priv->port,
2614 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2615 if (rxq->allmulti_flow != NULL)
2618 flow = ibv_create_flow(rxq->qp, &attr);
2620 /* It's not clear whether errno is always set in this case. */
2621 ERROR("%p: flow configuration failed, errno=%d: %s",
2623 (errno ? strerror(errno) : "Unknown error"));
2628 rxq->allmulti_flow = flow;
2629 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2634 * Disable allmulti mode in a RX queue.
2637 * Pointer to RX queue structure.
2640 rxq_allmulticast_disable(struct rxq *rxq)
2642 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2643 if (rxq->allmulti_flow == NULL)
2645 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2646 rxq->allmulti_flow = NULL;
2647 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2651 * Enable promiscuous mode in a RX queue.
2654 * Pointer to RX queue structure.
2657 * 0 on success, errno value on failure.
2660 rxq_promiscuous_enable(struct rxq *rxq)
2662 struct ibv_flow *flow;
2663 struct ibv_flow_attr attr = {
2664 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2666 .port = rxq->priv->port,
2672 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2673 if (rxq->promisc_flow != NULL)
2676 flow = ibv_create_flow(rxq->qp, &attr);
2678 /* It's not clear whether errno is always set in this case. */
2679 ERROR("%p: flow configuration failed, errno=%d: %s",
2681 (errno ? strerror(errno) : "Unknown error"));
2686 rxq->promisc_flow = flow;
2687 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2692 * Disable promiscuous mode in a RX queue.
2695 * Pointer to RX queue structure.
2698 rxq_promiscuous_disable(struct rxq *rxq)
2702 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2703 if (rxq->promisc_flow == NULL)
2705 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2706 rxq->promisc_flow = NULL;
2707 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2711 * Clean up a RX queue.
2713 * Destroy objects, free allocated memory and reset the structure for reuse.
2716 * Pointer to RX queue structure.
2719 rxq_cleanup(struct rxq *rxq)
2721 struct ibv_exp_release_intf_params params;
2723 DEBUG("cleaning up %p", (void *)rxq);
2725 rxq_free_elts_sp(rxq);
2728 if (rxq->if_qp != NULL) {
2729 assert(rxq->priv != NULL);
2730 assert(rxq->priv->ctx != NULL);
2731 assert(rxq->qp != NULL);
2732 params = (struct ibv_exp_release_intf_params){
2735 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2739 if (rxq->if_cq != NULL) {
2740 assert(rxq->priv != NULL);
2741 assert(rxq->priv->ctx != NULL);
2742 assert(rxq->cq != NULL);
2743 params = (struct ibv_exp_release_intf_params){
2746 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2750 if (rxq->qp != NULL) {
2751 rxq_promiscuous_disable(rxq);
2752 rxq_allmulticast_disable(rxq);
2753 rxq_mac_addrs_del(rxq);
2754 claim_zero(ibv_destroy_qp(rxq->qp));
2756 if (rxq->cq != NULL)
2757 claim_zero(ibv_destroy_cq(rxq->cq));
2758 if (rxq->rd != NULL) {
2759 struct ibv_exp_destroy_res_domain_attr attr = {
2763 assert(rxq->priv != NULL);
2764 assert(rxq->priv->ctx != NULL);
2765 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2769 if (rxq->mr != NULL)
2770 claim_zero(ibv_dereg_mr(rxq->mr));
2771 memset(rxq, 0, sizeof(*rxq));
2775 * Translate RX completion flags to packet type.
2778 * RX completion flags returned by poll_length_flags().
2780 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2783 * Packet type for struct rte_mbuf.
2785 static inline uint32_t
2786 rxq_cq_to_pkt_type(uint32_t flags)
2790 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2793 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,
2794 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2796 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,
2797 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN) |
2799 IBV_EXP_CQ_RX_IPV4_PACKET,
2800 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN) |
2802 IBV_EXP_CQ_RX_IPV6_PACKET,
2803 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN);
2807 IBV_EXP_CQ_RX_IPV4_PACKET,
2808 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2810 IBV_EXP_CQ_RX_IPV6_PACKET,
2811 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN);
2816 * Translate RX completion flags to offload flags.
2819 * Pointer to RX queue structure.
2821 * RX completion flags returned by poll_length_flags().
2824 * Offload flags (ol_flags) for struct rte_mbuf.
2826 static inline uint32_t
2827 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2829 uint32_t ol_flags = 0;
2834 IBV_EXP_CQ_RX_IP_CSUM_OK,
2835 PKT_RX_IP_CKSUM_GOOD) |
2837 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2838 PKT_RX_L4_CKSUM_GOOD);
2839 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2842 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2843 PKT_RX_IP_CKSUM_GOOD) |
2845 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2846 PKT_RX_L4_CKSUM_GOOD);
2851 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2854 * DPDK callback for RX with scattered packets support.
2857 * Generic pointer to RX queue structure.
2859 * Array to store received packets.
2861 * Maximum number of packets in array.
2864 * Number of packets successfully received (<= pkts_n).
2867 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2869 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2870 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2871 const unsigned int elts_n = rxq->elts_n;
2872 unsigned int elts_head = rxq->elts_head;
2873 struct ibv_recv_wr head;
2874 struct ibv_recv_wr **next = &head.next;
2875 struct ibv_recv_wr *bad_wr;
2877 unsigned int pkts_ret = 0;
2880 if (unlikely(!rxq->sp))
2881 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2882 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2884 for (i = 0; (i != pkts_n); ++i) {
2885 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2886 struct ibv_recv_wr *wr = &elt->wr;
2887 uint64_t wr_id = wr->wr_id;
2889 unsigned int pkt_buf_len;
2890 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2891 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2892 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2896 /* Sanity checks. */
2900 assert(wr_id < rxq->elts_n);
2901 assert(wr->sg_list == elt->sges);
2902 assert(wr->num_sge == elemof(elt->sges));
2903 assert(elts_head < rxq->elts_n);
2904 assert(rxq->elts_head < rxq->elts_n);
2905 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2907 if (unlikely(ret < 0)) {
2911 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2913 /* ibv_poll_cq() must be used in case of failure. */
2914 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2915 if (unlikely(wcs_n == 0))
2917 if (unlikely(wcs_n < 0)) {
2918 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2919 (void *)rxq, wcs_n);
2923 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2924 /* Whatever, just repost the offending WR. */
2925 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2926 " completion status (%d): %s",
2927 (void *)rxq, wc.wr_id, wc.status,
2928 ibv_wc_status_str(wc.status));
2929 #ifdef MLX4_PMD_SOFT_COUNTERS
2930 /* Increment dropped packets counter. */
2931 ++rxq->stats.idropped;
2933 /* Link completed WRs together for repost. */
2944 /* Link completed WRs together for repost. */
2948 * Replace spent segments with new ones, concatenate and
2949 * return them as pkt_buf.
2952 struct ibv_sge *sge = &elt->sges[j];
2953 struct rte_mbuf *seg = elt->bufs[j];
2954 struct rte_mbuf *rep;
2955 unsigned int seg_tailroom;
2958 * Fetch initial bytes of packet descriptor into a
2959 * cacheline while allocating rep.
2962 rep = rte_mbuf_raw_alloc(rxq->mp);
2963 if (unlikely(rep == NULL)) {
2965 * Unable to allocate a replacement mbuf,
2968 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
2969 " can't allocate a new mbuf",
2970 (void *)rxq, wr_id);
2971 if (pkt_buf != NULL) {
2972 *pkt_buf_next = NULL;
2973 rte_pktmbuf_free(pkt_buf);
2975 /* Increase out of memory counters. */
2976 ++rxq->stats.rx_nombuf;
2977 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2981 /* Poison user-modifiable fields in rep. */
2982 NEXT(rep) = (void *)((uintptr_t)-1);
2983 SET_DATA_OFF(rep, 0xdead);
2984 DATA_LEN(rep) = 0xd00d;
2985 PKT_LEN(rep) = 0xdeadd00d;
2986 NB_SEGS(rep) = 0x2a;
2990 assert(rep->buf_len == seg->buf_len);
2991 /* Reconfigure sge to use rep instead of seg. */
2992 assert(sge->lkey == rxq->mr->lkey);
2993 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
2996 /* Update pkt_buf if it's the first segment, or link
2997 * seg to the previous one and update pkt_buf_next. */
2998 *pkt_buf_next = seg;
2999 pkt_buf_next = &NEXT(seg);
3000 /* Update seg information. */
3001 seg_tailroom = (seg->buf_len - seg_headroom);
3002 assert(sge->length == seg_tailroom);
3003 SET_DATA_OFF(seg, seg_headroom);
3004 if (likely(len <= seg_tailroom)) {
3006 DATA_LEN(seg) = len;
3009 assert(rte_pktmbuf_headroom(seg) ==
3011 assert(rte_pktmbuf_tailroom(seg) ==
3012 (seg_tailroom - len));
3015 DATA_LEN(seg) = seg_tailroom;
3016 PKT_LEN(seg) = seg_tailroom;
3018 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3019 assert(rte_pktmbuf_tailroom(seg) == 0);
3020 /* Fix len and clear headroom for next segments. */
3021 len -= seg_tailroom;
3024 /* Update head and tail segments. */
3025 *pkt_buf_next = NULL;
3026 assert(pkt_buf != NULL);
3028 NB_SEGS(pkt_buf) = j;
3029 PORT(pkt_buf) = rxq->port_id;
3030 PKT_LEN(pkt_buf) = pkt_buf_len;
3031 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3032 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3034 /* Return packet. */
3035 *(pkts++) = pkt_buf;
3037 #ifdef MLX4_PMD_SOFT_COUNTERS
3038 /* Increase bytes counter. */
3039 rxq->stats.ibytes += pkt_buf_len;
3042 if (++elts_head >= elts_n)
3046 if (unlikely(i == 0))
3051 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3053 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3054 if (unlikely(ret)) {
3055 /* Inability to repost WRs is fatal. */
3056 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3062 rxq->elts_head = elts_head;
3063 #ifdef MLX4_PMD_SOFT_COUNTERS
3064 /* Increase packets counter. */
3065 rxq->stats.ipackets += pkts_ret;
3071 * DPDK callback for RX.
3073 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3074 * manage scattered packets. Improves performance when MRU is lower than the
3075 * size of the first segment.
3078 * Generic pointer to RX queue structure.
3080 * Array to store received packets.
3082 * Maximum number of packets in array.
3085 * Number of packets successfully received (<= pkts_n).
3088 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3090 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3091 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3092 const unsigned int elts_n = rxq->elts_n;
3093 unsigned int elts_head = rxq->elts_head;
3094 struct ibv_sge sges[pkts_n];
3096 unsigned int pkts_ret = 0;
3099 if (unlikely(rxq->sp))
3100 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3101 for (i = 0; (i != pkts_n); ++i) {
3102 struct rxq_elt *elt = &(*elts)[elts_head];
3103 struct ibv_recv_wr *wr = &elt->wr;
3104 uint64_t wr_id = wr->wr_id;
3106 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3107 WR_ID(wr_id).offset);
3108 struct rte_mbuf *rep;
3111 /* Sanity checks. */
3112 assert(WR_ID(wr_id).id < rxq->elts_n);
3113 assert(wr->sg_list == &elt->sge);
3114 assert(wr->num_sge == 1);
3115 assert(elts_head < rxq->elts_n);
3116 assert(rxq->elts_head < rxq->elts_n);
3118 * Fetch initial bytes of packet descriptor into a
3119 * cacheline while allocating rep.
3121 rte_mbuf_prefetch_part1(seg);
3122 rte_mbuf_prefetch_part2(seg);
3123 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3125 if (unlikely(ret < 0)) {
3129 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3131 /* ibv_poll_cq() must be used in case of failure. */
3132 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3133 if (unlikely(wcs_n == 0))
3135 if (unlikely(wcs_n < 0)) {
3136 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3137 (void *)rxq, wcs_n);
3141 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3142 /* Whatever, just repost the offending WR. */
3143 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3144 " completion status (%d): %s",
3145 (void *)rxq, wc.wr_id, wc.status,
3146 ibv_wc_status_str(wc.status));
3147 #ifdef MLX4_PMD_SOFT_COUNTERS
3148 /* Increment dropped packets counter. */
3149 ++rxq->stats.idropped;
3151 /* Add SGE to array for repost. */
3160 rep = rte_mbuf_raw_alloc(rxq->mp);
3161 if (unlikely(rep == NULL)) {
3163 * Unable to allocate a replacement mbuf,
3166 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3167 " can't allocate a new mbuf",
3168 (void *)rxq, WR_ID(wr_id).id);
3169 /* Increase out of memory counters. */
3170 ++rxq->stats.rx_nombuf;
3171 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3175 /* Reconfigure sge to use rep instead of seg. */
3176 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3177 assert(elt->sge.lkey == rxq->mr->lkey);
3178 WR_ID(wr->wr_id).offset =
3179 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3181 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3183 /* Add SGE to array for repost. */
3186 /* Update seg information. */
3187 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3189 PORT(seg) = rxq->port_id;
3192 DATA_LEN(seg) = len;
3193 seg->packet_type = rxq_cq_to_pkt_type(flags);
3194 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3196 /* Return packet. */
3199 #ifdef MLX4_PMD_SOFT_COUNTERS
3200 /* Increase bytes counter. */
3201 rxq->stats.ibytes += len;
3204 if (++elts_head >= elts_n)
3208 if (unlikely(i == 0))
3212 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3214 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3215 if (unlikely(ret)) {
3216 /* Inability to repost WRs is fatal. */
3217 DEBUG("%p: recv_burst(): failed (ret=%d)",
3222 rxq->elts_head = elts_head;
3223 #ifdef MLX4_PMD_SOFT_COUNTERS
3224 /* Increase packets counter. */
3225 rxq->stats.ipackets += pkts_ret;
3231 * DPDK callback for RX in secondary processes.
3233 * This function configures all queues from primary process information
3234 * if necessary before reverting to the normal RX burst callback.
3237 * Generic pointer to RX queue structure.
3239 * Array to store received packets.
3241 * Maximum number of packets in array.
3244 * Number of packets successfully received (<= pkts_n).
3247 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3250 struct rxq *rxq = dpdk_rxq;
3251 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3252 struct priv *primary_priv;
3258 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3259 /* Look for queue index in both private structures. */
3260 for (index = 0; index != priv->rxqs_n; ++index)
3261 if (((*primary_priv->rxqs)[index] == rxq) ||
3262 ((*priv->rxqs)[index] == rxq))
3264 if (index == priv->rxqs_n)
3266 rxq = (*priv->rxqs)[index];
3267 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3271 * Allocate a Queue Pair.
3272 * Optionally setup inline receive if supported.
3275 * Pointer to private structure.
3277 * Completion queue to associate with QP.
3279 * Number of descriptors in QP (hint only).
3282 * QP pointer or NULL in case of error.
3284 static struct ibv_qp *
3285 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3286 struct ibv_exp_res_domain *rd)
3288 struct ibv_exp_qp_init_attr attr = {
3289 /* CQ to be associated with the send queue. */
3291 /* CQ to be associated with the receive queue. */
3294 /* Max number of outstanding WRs. */
3295 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3296 priv->device_attr.max_qp_wr :
3298 /* Max number of scatter/gather elements in a WR. */
3299 .max_recv_sge = ((priv->device_attr.max_sge <
3300 MLX4_PMD_SGE_WR_N) ?
3301 priv->device_attr.max_sge :
3304 .qp_type = IBV_QPT_RAW_PACKET,
3305 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3306 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3312 attr.max_inl_recv = priv->inl_recv_size;
3313 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3315 return ibv_exp_create_qp(priv->ctx, &attr);
3321 * Allocate a RSS Queue Pair.
3322 * Optionally setup inline receive if supported.
3325 * Pointer to private structure.
3327 * Completion queue to associate with QP.
3329 * Number of descriptors in QP (hint only).
3331 * If nonzero, create a parent QP, otherwise a child.
3334 * QP pointer or NULL in case of error.
3336 static struct ibv_qp *
3337 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3338 int parent, struct ibv_exp_res_domain *rd)
3340 struct ibv_exp_qp_init_attr attr = {
3341 /* CQ to be associated with the send queue. */
3343 /* CQ to be associated with the receive queue. */
3346 /* Max number of outstanding WRs. */
3347 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3348 priv->device_attr.max_qp_wr :
3350 /* Max number of scatter/gather elements in a WR. */
3351 .max_recv_sge = ((priv->device_attr.max_sge <
3352 MLX4_PMD_SGE_WR_N) ?
3353 priv->device_attr.max_sge :
3356 .qp_type = IBV_QPT_RAW_PACKET,
3357 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3358 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3359 IBV_EXP_QP_INIT_ATTR_QPG),
3365 attr.max_inl_recv = priv->inl_recv_size,
3366 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3369 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3370 /* TSS isn't necessary. */
3371 attr.qpg.parent_attrib.tss_child_count = 0;
3372 attr.qpg.parent_attrib.rss_child_count =
3373 rte_align32pow2(priv->rxqs_n + 1) >> 1;
3374 DEBUG("initializing parent RSS queue");
3376 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3377 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3378 DEBUG("initializing child RSS queue");
3380 return ibv_exp_create_qp(priv->ctx, &attr);
3383 #endif /* RSS_SUPPORT */
3386 * Reconfigure a RX queue with new parameters.
3388 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3389 * thread (such as a control thread), may corrupt the pool.
3390 * In case of failure, the queue is left untouched.
3393 * Pointer to Ethernet device structure.
3398 * 0 on success, errno value on failure.
3401 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3403 struct priv *priv = rxq->priv;
3404 struct rxq tmpl = *rxq;
3405 unsigned int mbuf_n;
3406 unsigned int desc_n;
3407 struct rte_mbuf **pool;
3409 struct ibv_exp_qp_attr mod;
3410 struct ibv_recv_wr *bad_wr;
3411 unsigned int mb_len;
3413 int parent = (rxq == &priv->rxq_parent);
3416 ERROR("%p: cannot rehash parent queue %p",
3417 (void *)dev, (void *)rxq);
3420 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
3421 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3422 /* Number of descriptors and mbufs currently allocated. */
3423 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3425 /* Toggle RX checksum offload if hardware supports it. */
3426 if (priv->hw_csum) {
3427 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3428 rxq->csum = tmpl.csum;
3430 if (priv->hw_csum_l2tun) {
3431 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3432 rxq->csum_l2tun = tmpl.csum_l2tun;
3434 /* Enable scattered packets support for this queue if necessary. */
3435 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3436 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3437 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3438 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3440 desc_n /= MLX4_PMD_SGE_WR_N;
3443 DEBUG("%p: %s scattered packets support (%u WRs)",
3444 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3445 /* If scatter mode is the same as before, nothing to do. */
3446 if (tmpl.sp == rxq->sp) {
3447 DEBUG("%p: nothing to do", (void *)dev);
3450 /* Remove attached flows if RSS is disabled (no parent queue). */
3452 rxq_allmulticast_disable(&tmpl);
3453 rxq_promiscuous_disable(&tmpl);
3454 rxq_mac_addrs_del(&tmpl);
3455 /* Update original queue in case of failure. */
3456 rxq->allmulti_flow = tmpl.allmulti_flow;
3457 rxq->promisc_flow = tmpl.promisc_flow;
3458 memcpy(rxq->mac_configured, tmpl.mac_configured,
3459 sizeof(rxq->mac_configured));
3460 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3462 /* From now on, any failure will render the queue unusable.
3463 * Reinitialize QP. */
3464 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3465 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3467 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3471 err = ibv_resize_cq(tmpl.cq, desc_n);
3473 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3477 mod = (struct ibv_exp_qp_attr){
3478 /* Move the QP to this state. */
3479 .qp_state = IBV_QPS_INIT,
3480 /* Primary port number. */
3481 .port_num = priv->port
3483 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3486 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3487 #endif /* RSS_SUPPORT */
3490 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3491 (void *)dev, strerror(err));
3495 /* Reconfigure flows. Do not care for errors. */
3497 rxq_mac_addrs_add(&tmpl);
3499 rxq_promiscuous_enable(&tmpl);
3501 rxq_allmulticast_enable(&tmpl);
3502 /* Update original queue in case of failure. */
3503 rxq->allmulti_flow = tmpl.allmulti_flow;
3504 rxq->promisc_flow = tmpl.promisc_flow;
3505 memcpy(rxq->mac_configured, tmpl.mac_configured,
3506 sizeof(rxq->mac_configured));
3507 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3509 /* Allocate pool. */
3510 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3512 ERROR("%p: cannot allocate memory", (void *)dev);
3515 /* Snatch mbufs from original queue. */
3518 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3520 for (i = 0; (i != elemof(*elts)); ++i) {
3521 struct rxq_elt_sp *elt = &(*elts)[i];
3524 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3525 assert(elt->bufs[j] != NULL);
3526 pool[k++] = elt->bufs[j];
3530 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3532 for (i = 0; (i != elemof(*elts)); ++i) {
3533 struct rxq_elt *elt = &(*elts)[i];
3534 struct rte_mbuf *buf = (void *)
3535 ((uintptr_t)elt->sge.addr -
3536 WR_ID(elt->wr.wr_id).offset);
3538 assert(WR_ID(elt->wr.wr_id).id == i);
3542 assert(k == mbuf_n);
3544 tmpl.elts.sp = NULL;
3545 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3547 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3548 rxq_alloc_elts(&tmpl, desc_n, pool));
3550 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3555 assert(tmpl.elts_n == desc_n);
3556 assert(tmpl.elts.sp != NULL);
3558 /* Clean up original data. */
3560 rte_free(rxq->elts.sp);
3561 rxq->elts.sp = NULL;
3563 err = ibv_post_recv(tmpl.qp,
3565 &(*tmpl.elts.sp)[0].wr :
3566 &(*tmpl.elts.no_sp)[0].wr),
3569 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3575 mod = (struct ibv_exp_qp_attr){
3576 .qp_state = IBV_QPS_RTR
3578 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3580 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3581 (void *)dev, strerror(err));
3589 * Configure a RX queue.
3592 * Pointer to Ethernet device structure.
3594 * Pointer to RX queue structure.
3596 * Number of descriptors to configure in queue.
3598 * NUMA socket on which memory must be allocated.
3600 * If true, the queue is disabled because its index is higher or
3601 * equal to the real number of queues, which must be a power of 2.
3603 * Thresholds parameters.
3605 * Memory pool for buffer allocations.
3608 * 0 on success, errno value on failure.
3611 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3612 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
3613 struct rte_mempool *mp)
3615 struct priv *priv = dev->data->dev_private;
3621 struct ibv_exp_qp_attr mod;
3623 struct ibv_exp_query_intf_params params;
3624 struct ibv_exp_cq_init_attr cq;
3625 struct ibv_exp_res_domain_init_attr rd;
3627 enum ibv_exp_query_intf_status status;
3628 struct ibv_recv_wr *bad_wr;
3629 unsigned int mb_len;
3631 int parent = (rxq == &priv->rxq_parent);
3633 (void)conf; /* Thresholds configuration (ignored). */
3635 * If this is a parent queue, hardware must support RSS and
3636 * RSS must be enabled.
3638 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3640 /* Even if unused, ibv_create_cq() requires at least one
3645 mb_len = rte_pktmbuf_data_room_size(mp);
3646 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3647 ERROR("%p: invalid number of RX descriptors (must be a"
3648 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3651 /* Toggle RX checksum offload if hardware supports it. */
3653 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3654 if (priv->hw_csum_l2tun)
3655 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3656 /* Enable scattered packets support for this queue if necessary. */
3657 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3658 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3659 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3660 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3662 desc /= MLX4_PMD_SGE_WR_N;
3664 DEBUG("%p: %s scattered packets support (%u WRs)",
3665 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3666 /* Use the entire RX mempool as the memory region. */
3667 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3668 if (tmpl.mr == NULL) {
3670 ERROR("%p: MR creation failure: %s",
3671 (void *)dev, strerror(ret));
3675 attr.rd = (struct ibv_exp_res_domain_init_attr){
3676 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3677 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3678 .thread_model = IBV_EXP_THREAD_SINGLE,
3679 .msg_model = IBV_EXP_MSG_HIGH_BW,
3681 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3682 if (tmpl.rd == NULL) {
3684 ERROR("%p: RD creation failure: %s",
3685 (void *)dev, strerror(ret));
3688 attr.cq = (struct ibv_exp_cq_init_attr){
3689 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3690 .res_domain = tmpl.rd,
3692 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3693 if (tmpl.cq == NULL) {
3695 ERROR("%p: CQ creation failure: %s",
3696 (void *)dev, strerror(ret));
3699 DEBUG("priv->device_attr.max_qp_wr is %d",
3700 priv->device_attr.max_qp_wr);
3701 DEBUG("priv->device_attr.max_sge is %d",
3702 priv->device_attr.max_sge);
3704 if (priv->rss && !inactive)
3705 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3708 #endif /* RSS_SUPPORT */
3709 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3710 if (tmpl.qp == NULL) {
3711 ret = (errno ? errno : EINVAL);
3712 ERROR("%p: QP creation failure: %s",
3713 (void *)dev, strerror(ret));
3716 mod = (struct ibv_exp_qp_attr){
3717 /* Move the QP to this state. */
3718 .qp_state = IBV_QPS_INIT,
3719 /* Primary port number. */
3720 .port_num = priv->port
3722 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3725 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3726 #endif /* RSS_SUPPORT */
3729 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3730 (void *)dev, strerror(ret));
3733 if ((parent) || (!priv->rss)) {
3734 /* Configure MAC and broadcast addresses. */
3735 ret = rxq_mac_addrs_add(&tmpl);
3737 ERROR("%p: QP flow attachment failed: %s",
3738 (void *)dev, strerror(ret));
3742 /* Allocate descriptors for RX queues, except for the RSS parent. */
3746 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3748 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3750 ERROR("%p: RXQ allocation failed: %s",
3751 (void *)dev, strerror(ret));
3754 ret = ibv_post_recv(tmpl.qp,
3756 &(*tmpl.elts.sp)[0].wr :
3757 &(*tmpl.elts.no_sp)[0].wr),
3760 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3767 mod = (struct ibv_exp_qp_attr){
3768 .qp_state = IBV_QPS_RTR
3770 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3772 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3773 (void *)dev, strerror(ret));
3777 tmpl.port_id = dev->data->port_id;
3778 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3779 attr.params = (struct ibv_exp_query_intf_params){
3780 .intf_scope = IBV_EXP_INTF_GLOBAL,
3781 .intf = IBV_EXP_INTF_CQ,
3784 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3785 if (tmpl.if_cq == NULL) {
3786 ERROR("%p: CQ interface family query failed with status %d",
3787 (void *)dev, status);
3790 attr.params = (struct ibv_exp_query_intf_params){
3791 .intf_scope = IBV_EXP_INTF_GLOBAL,
3792 .intf = IBV_EXP_INTF_QP_BURST,
3795 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3796 if (tmpl.if_qp == NULL) {
3797 ERROR("%p: QP interface family query failed with status %d",
3798 (void *)dev, status);
3801 /* Clean up rxq in case we're reinitializing it. */
3802 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3805 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3815 * DPDK callback to configure a RX queue.
3818 * Pointer to Ethernet device structure.
3822 * Number of descriptors to configure in queue.
3824 * NUMA socket on which memory must be allocated.
3826 * Thresholds parameters.
3828 * Memory pool for buffer allocations.
3831 * 0 on success, negative errno value on failure.
3834 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3835 unsigned int socket, const struct rte_eth_rxconf *conf,
3836 struct rte_mempool *mp)
3838 struct priv *priv = dev->data->dev_private;
3839 struct rxq *rxq = (*priv->rxqs)[idx];
3843 if (mlx4_is_secondary())
3844 return -E_RTE_SECONDARY;
3846 DEBUG("%p: configuring queue %u for %u descriptors",
3847 (void *)dev, idx, desc);
3848 if (idx >= priv->rxqs_n) {
3849 ERROR("%p: queue index out of range (%u >= %u)",
3850 (void *)dev, idx, priv->rxqs_n);
3855 DEBUG("%p: reusing already allocated queue index %u (%p)",
3856 (void *)dev, idx, (void *)rxq);
3857 if (priv->started) {
3861 (*priv->rxqs)[idx] = NULL;
3864 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3866 ERROR("%p: unable to allocate queue index %u",
3872 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
3874 ret = rxq_setup(dev, rxq, desc, socket, inactive, conf, mp);
3878 rxq->stats.idx = idx;
3879 DEBUG("%p: adding RX queue %p to list",
3880 (void *)dev, (void *)rxq);
3881 (*priv->rxqs)[idx] = rxq;
3882 /* Update receive callback. */
3884 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3886 dev->rx_pkt_burst = mlx4_rx_burst;
3893 * DPDK callback to release a RX queue.
3896 * Generic RX queue pointer.
3899 mlx4_rx_queue_release(void *dpdk_rxq)
3901 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3905 if (mlx4_is_secondary())
3911 assert(rxq != &priv->rxq_parent);
3912 for (i = 0; (i != priv->rxqs_n); ++i)
3913 if ((*priv->rxqs)[i] == rxq) {
3914 DEBUG("%p: removing RX queue %p from list",
3915 (void *)priv->dev, (void *)rxq);
3916 (*priv->rxqs)[i] = NULL;
3925 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3928 * DPDK callback to start the device.
3930 * Simulate device start by attaching all configured flows.
3933 * Pointer to Ethernet device structure.
3936 * 0 on success, negative errno value on failure.
3939 mlx4_dev_start(struct rte_eth_dev *dev)
3941 struct priv *priv = dev->data->dev_private;
3947 if (mlx4_is_secondary())
3948 return -E_RTE_SECONDARY;
3950 if (priv->started) {
3954 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
3957 rxq = &priv->rxq_parent;
3960 rxq = (*priv->rxqs)[0];
3963 /* Iterate only once when RSS is enabled. */
3965 /* Ignore nonexistent RX queues. */
3968 ret = rxq_mac_addrs_add(rxq);
3969 if (!ret && priv->promisc)
3970 ret = rxq_promiscuous_enable(rxq);
3971 if (!ret && priv->allmulti)
3972 ret = rxq_allmulticast_enable(rxq);
3975 WARN("%p: QP flow attachment failed: %s",
3976 (void *)dev, strerror(ret));
3978 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
3979 priv_dev_interrupt_handler_install(priv, dev);
3980 ret = mlx4_priv_flow_start(priv);
3982 ERROR("%p: flow start failed: %s",
3983 (void *)dev, strerror(ret));
3991 rxq = (*priv->rxqs)[i--];
3993 rxq_allmulticast_disable(rxq);
3994 rxq_promiscuous_disable(rxq);
3995 rxq_mac_addrs_del(rxq);
4004 * DPDK callback to stop the device.
4006 * Simulate device stop by detaching all configured flows.
4009 * Pointer to Ethernet device structure.
4012 mlx4_dev_stop(struct rte_eth_dev *dev)
4014 struct priv *priv = dev->data->dev_private;
4019 if (mlx4_is_secondary())
4022 if (!priv->started) {
4026 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4029 rxq = &priv->rxq_parent;
4032 rxq = (*priv->rxqs)[0];
4035 mlx4_priv_flow_stop(priv);
4036 /* Iterate only once when RSS is enabled. */
4038 /* Ignore nonexistent RX queues. */
4041 rxq_allmulticast_disable(rxq);
4042 rxq_promiscuous_disable(rxq);
4043 rxq_mac_addrs_del(rxq);
4044 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4049 * Dummy DPDK callback for TX.
4051 * This function is used to temporarily replace the real callback during
4052 * unsafe control operations on the queue, or in case of error.
4055 * Generic pointer to TX queue structure.
4057 * Packets to transmit.
4059 * Number of packets in array.
4062 * Number of packets successfully transmitted (<= pkts_n).
4065 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4074 * Dummy DPDK callback for RX.
4076 * This function is used to temporarily replace the real callback during
4077 * unsafe control operations on the queue, or in case of error.
4080 * Generic pointer to RX queue structure.
4082 * Array to store received packets.
4084 * Maximum number of packets in array.
4087 * Number of packets successfully received (<= pkts_n).
4090 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4099 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4102 * DPDK callback to close the device.
4104 * Destroy all queues and objects, free memory.
4107 * Pointer to Ethernet device structure.
4110 mlx4_dev_close(struct rte_eth_dev *dev)
4112 struct priv *priv = mlx4_get_priv(dev);
4119 DEBUG("%p: closing device \"%s\"",
4121 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4122 /* Prevent crashes when queues are still in use. This is unfortunately
4123 * still required for DPDK 1.3 because some programs (such as testpmd)
4124 * never release them before closing the device. */
4125 dev->rx_pkt_burst = removed_rx_burst;
4126 dev->tx_pkt_burst = removed_tx_burst;
4127 if (priv->rxqs != NULL) {
4128 /* XXX race condition if mlx4_rx_burst() is still running. */
4130 for (i = 0; (i != priv->rxqs_n); ++i) {
4131 tmp = (*priv->rxqs)[i];
4134 (*priv->rxqs)[i] = NULL;
4141 if (priv->txqs != NULL) {
4142 /* XXX race condition if mlx4_tx_burst() is still running. */
4144 for (i = 0; (i != priv->txqs_n); ++i) {
4145 tmp = (*priv->txqs)[i];
4148 (*priv->txqs)[i] = NULL;
4156 rxq_cleanup(&priv->rxq_parent);
4157 if (priv->pd != NULL) {
4158 assert(priv->ctx != NULL);
4159 claim_zero(ibv_dealloc_pd(priv->pd));
4160 claim_zero(ibv_close_device(priv->ctx));
4162 assert(priv->ctx == NULL);
4163 priv_dev_interrupt_handler_uninstall(priv, dev);
4165 memset(priv, 0, sizeof(*priv));
4169 * Change the link state (UP / DOWN).
4172 * Pointer to Ethernet device private data.
4174 * Nonzero for link up, otherwise link down.
4177 * 0 on success, errno value on failure.
4180 priv_set_link(struct priv *priv, int up)
4182 struct rte_eth_dev *dev = priv->dev;
4187 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
4190 for (i = 0; i < priv->rxqs_n; i++)
4191 if ((*priv->rxqs)[i]->sp)
4193 /* Check if an sp queue exists.
4194 * Note: Some old frames might be received.
4196 if (i == priv->rxqs_n)
4197 dev->rx_pkt_burst = mlx4_rx_burst;
4199 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4200 dev->tx_pkt_burst = mlx4_tx_burst;
4202 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
4205 dev->rx_pkt_burst = removed_rx_burst;
4206 dev->tx_pkt_burst = removed_tx_burst;
4212 * DPDK callback to bring the link DOWN.
4215 * Pointer to Ethernet device structure.
4218 * 0 on success, errno value on failure.
4221 mlx4_set_link_down(struct rte_eth_dev *dev)
4223 struct priv *priv = dev->data->dev_private;
4227 err = priv_set_link(priv, 0);
4233 * DPDK callback to bring the link UP.
4236 * Pointer to Ethernet device structure.
4239 * 0 on success, errno value on failure.
4242 mlx4_set_link_up(struct rte_eth_dev *dev)
4244 struct priv *priv = dev->data->dev_private;
4248 err = priv_set_link(priv, 1);
4253 * DPDK callback to get information about the device.
4256 * Pointer to Ethernet device structure.
4258 * Info structure output buffer.
4261 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4263 struct priv *priv = mlx4_get_priv(dev);
4265 char ifname[IF_NAMESIZE];
4267 info->pci_dev = RTE_DEV_TO_PCI(dev->device);
4272 /* FIXME: we should ask the device for these values. */
4273 info->min_rx_bufsize = 32;
4274 info->max_rx_pktlen = 65536;
4276 * Since we need one CQ per QP, the limit is the minimum number
4277 * between the two values.
4279 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4280 priv->device_attr.max_qp : priv->device_attr.max_cq);
4281 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4284 info->max_rx_queues = max;
4285 info->max_tx_queues = max;
4286 /* Last array entry is reserved for broadcast. */
4287 info->max_mac_addrs = (elemof(priv->mac) - 1);
4288 info->rx_offload_capa =
4290 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4291 DEV_RX_OFFLOAD_UDP_CKSUM |
4292 DEV_RX_OFFLOAD_TCP_CKSUM) :
4294 info->tx_offload_capa =
4296 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4297 DEV_TX_OFFLOAD_UDP_CKSUM |
4298 DEV_TX_OFFLOAD_TCP_CKSUM) :
4300 if (priv_get_ifname(priv, &ifname) == 0)
4301 info->if_index = if_nametoindex(ifname);
4304 ETH_LINK_SPEED_10G |
4305 ETH_LINK_SPEED_20G |
4306 ETH_LINK_SPEED_40G |
4311 static const uint32_t *
4312 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4314 static const uint32_t ptypes[] = {
4315 /* refers to rxq_cq_to_pkt_type() */
4318 RTE_PTYPE_INNER_L3_IPV4,
4319 RTE_PTYPE_INNER_L3_IPV6,
4323 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4324 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4330 * DPDK callback to get device statistics.
4333 * Pointer to Ethernet device structure.
4335 * Stats structure output buffer.
4338 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4340 struct priv *priv = mlx4_get_priv(dev);
4341 struct rte_eth_stats tmp = {0};
4348 /* Add software counters. */
4349 for (i = 0; (i != priv->rxqs_n); ++i) {
4350 struct rxq *rxq = (*priv->rxqs)[i];
4354 idx = rxq->stats.idx;
4355 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4356 #ifdef MLX4_PMD_SOFT_COUNTERS
4357 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4358 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4360 tmp.q_errors[idx] += (rxq->stats.idropped +
4361 rxq->stats.rx_nombuf);
4363 #ifdef MLX4_PMD_SOFT_COUNTERS
4364 tmp.ipackets += rxq->stats.ipackets;
4365 tmp.ibytes += rxq->stats.ibytes;
4367 tmp.ierrors += rxq->stats.idropped;
4368 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4370 for (i = 0; (i != priv->txqs_n); ++i) {
4371 struct txq *txq = (*priv->txqs)[i];
4375 idx = txq->stats.idx;
4376 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4377 #ifdef MLX4_PMD_SOFT_COUNTERS
4378 tmp.q_opackets[idx] += txq->stats.opackets;
4379 tmp.q_obytes[idx] += txq->stats.obytes;
4381 tmp.q_errors[idx] += txq->stats.odropped;
4383 #ifdef MLX4_PMD_SOFT_COUNTERS
4384 tmp.opackets += txq->stats.opackets;
4385 tmp.obytes += txq->stats.obytes;
4387 tmp.oerrors += txq->stats.odropped;
4389 #ifndef MLX4_PMD_SOFT_COUNTERS
4390 /* FIXME: retrieve and add hardware counters. */
4397 * DPDK callback to clear device statistics.
4400 * Pointer to Ethernet device structure.
4403 mlx4_stats_reset(struct rte_eth_dev *dev)
4405 struct priv *priv = mlx4_get_priv(dev);
4412 for (i = 0; (i != priv->rxqs_n); ++i) {
4413 if ((*priv->rxqs)[i] == NULL)
4415 idx = (*priv->rxqs)[i]->stats.idx;
4416 (*priv->rxqs)[i]->stats =
4417 (struct mlx4_rxq_stats){ .idx = idx };
4419 for (i = 0; (i != priv->txqs_n); ++i) {
4420 if ((*priv->txqs)[i] == NULL)
4422 idx = (*priv->txqs)[i]->stats.idx;
4423 (*priv->txqs)[i]->stats =
4424 (struct mlx4_txq_stats){ .idx = idx };
4426 #ifndef MLX4_PMD_SOFT_COUNTERS
4427 /* FIXME: reset hardware counters. */
4433 * DPDK callback to remove a MAC address.
4436 * Pointer to Ethernet device structure.
4438 * MAC address index.
4441 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4443 struct priv *priv = dev->data->dev_private;
4445 if (mlx4_is_secondary())
4448 DEBUG("%p: removing MAC address from index %" PRIu32,
4449 (void *)dev, index);
4450 /* Last array entry is reserved for broadcast. */
4451 if (index >= (elemof(priv->mac) - 1))
4453 priv_mac_addr_del(priv, index);
4459 * DPDK callback to add a MAC address.
4462 * Pointer to Ethernet device structure.
4464 * MAC address to register.
4466 * MAC address index.
4468 * VMDq pool index to associate address with (ignored).
4471 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4472 uint32_t index, uint32_t vmdq)
4474 struct priv *priv = dev->data->dev_private;
4476 if (mlx4_is_secondary())
4480 DEBUG("%p: adding MAC address at index %" PRIu32,
4481 (void *)dev, index);
4482 /* Last array entry is reserved for broadcast. */
4483 if (index >= (elemof(priv->mac) - 1))
4485 priv_mac_addr_add(priv, index,
4486 (const uint8_t (*)[ETHER_ADDR_LEN])
4487 mac_addr->addr_bytes);
4493 * DPDK callback to set the primary MAC address.
4496 * Pointer to Ethernet device structure.
4498 * MAC address to register.
4501 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4503 DEBUG("%p: setting primary MAC address", (void *)dev);
4504 mlx4_mac_addr_remove(dev, 0);
4505 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4509 * DPDK callback to enable promiscuous mode.
4512 * Pointer to Ethernet device structure.
4515 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4517 struct priv *priv = dev->data->dev_private;
4521 if (mlx4_is_secondary())
4524 if (priv->promisc) {
4528 /* If device isn't started, this is all we need to do. */
4532 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4539 for (i = 0; (i != priv->rxqs_n); ++i) {
4540 if ((*priv->rxqs)[i] == NULL)
4542 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4545 /* Failure, rollback. */
4547 if ((*priv->rxqs)[--i] != NULL)
4548 rxq_promiscuous_disable((*priv->rxqs)[i]);
4558 * DPDK callback to disable promiscuous mode.
4561 * Pointer to Ethernet device structure.
4564 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4566 struct priv *priv = dev->data->dev_private;
4569 if (mlx4_is_secondary())
4572 if (!priv->promisc) {
4577 rxq_promiscuous_disable(&priv->rxq_parent);
4580 for (i = 0; (i != priv->rxqs_n); ++i)
4581 if ((*priv->rxqs)[i] != NULL)
4582 rxq_promiscuous_disable((*priv->rxqs)[i]);
4589 * DPDK callback to enable allmulti mode.
4592 * Pointer to Ethernet device structure.
4595 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4597 struct priv *priv = dev->data->dev_private;
4601 if (mlx4_is_secondary())
4604 if (priv->allmulti) {
4608 /* If device isn't started, this is all we need to do. */
4612 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4619 for (i = 0; (i != priv->rxqs_n); ++i) {
4620 if ((*priv->rxqs)[i] == NULL)
4622 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4625 /* Failure, rollback. */
4627 if ((*priv->rxqs)[--i] != NULL)
4628 rxq_allmulticast_disable((*priv->rxqs)[i]);
4638 * DPDK callback to disable allmulti mode.
4641 * Pointer to Ethernet device structure.
4644 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4646 struct priv *priv = dev->data->dev_private;
4649 if (mlx4_is_secondary())
4652 if (!priv->allmulti) {
4657 rxq_allmulticast_disable(&priv->rxq_parent);
4660 for (i = 0; (i != priv->rxqs_n); ++i)
4661 if ((*priv->rxqs)[i] != NULL)
4662 rxq_allmulticast_disable((*priv->rxqs)[i]);
4669 * DPDK callback to retrieve physical link information.
4672 * Pointer to Ethernet device structure.
4673 * @param wait_to_complete
4674 * Wait for request completion (ignored).
4677 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4679 const struct priv *priv = mlx4_get_priv(dev);
4680 struct ethtool_cmd edata = {
4684 struct rte_eth_link dev_link;
4687 /* priv_lock() is not taken to allow concurrent calls. */
4691 (void)wait_to_complete;
4692 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4693 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4696 memset(&dev_link, 0, sizeof(dev_link));
4697 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4698 (ifr.ifr_flags & IFF_RUNNING));
4699 ifr.ifr_data = (void *)&edata;
4700 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4701 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4705 link_speed = ethtool_cmd_speed(&edata);
4706 if (link_speed == -1)
4707 dev_link.link_speed = 0;
4709 dev_link.link_speed = link_speed;
4710 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4711 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4712 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4713 ETH_LINK_SPEED_FIXED);
4714 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4715 /* Link status changed. */
4716 dev->data->dev_link = dev_link;
4719 /* Link status is still the same. */
4724 * DPDK callback to change the MTU.
4726 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4727 * received). Use this as a hint to enable/disable scattered packets support
4728 * and improve performance when not needed.
4729 * Since failure is not an option, reconfiguring queues on the fly is not
4733 * Pointer to Ethernet device structure.
4738 * 0 on success, negative errno value on failure.
4741 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4743 struct priv *priv = dev->data->dev_private;
4746 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4749 if (mlx4_is_secondary())
4750 return -E_RTE_SECONDARY;
4752 /* Set kernel interface MTU first. */
4753 if (priv_set_mtu(priv, mtu)) {
4755 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4759 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4761 /* Temporarily replace RX handler with a fake one, assuming it has not
4762 * been copied elsewhere. */
4763 dev->rx_pkt_burst = removed_rx_burst;
4764 /* Make sure everyone has left mlx4_rx_burst() and uses
4765 * removed_rx_burst() instead. */
4768 /* Reconfigure each RX queue. */
4769 for (i = 0; (i != priv->rxqs_n); ++i) {
4770 struct rxq *rxq = (*priv->rxqs)[i];
4771 unsigned int mb_len;
4772 unsigned int max_frame_len;
4777 /* Calculate new maximum frame length according to MTU and
4778 * toggle scattered support (sp) if necessary. */
4779 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4780 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4781 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
4782 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
4783 sp = (max_frame_len > (mb_len - RTE_PKTMBUF_HEADROOM));
4784 /* Provide new values to rxq_setup(). */
4785 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4786 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4787 ret = rxq_rehash(dev, rxq);
4789 /* Force SP RX if that queue requires it and abort. */
4791 rx_func = mlx4_rx_burst_sp;
4794 /* Reenable non-RSS queue attributes. No need to check
4795 * for errors at this stage. */
4797 rxq_mac_addrs_add(rxq);
4799 rxq_promiscuous_enable(rxq);
4801 rxq_allmulticast_enable(rxq);
4803 /* Scattered burst function takes priority. */
4805 rx_func = mlx4_rx_burst_sp;
4807 /* Burst functions can now be called again. */
4809 dev->rx_pkt_burst = rx_func;
4817 * DPDK callback to get flow control status.
4820 * Pointer to Ethernet device structure.
4821 * @param[out] fc_conf
4822 * Flow control output buffer.
4825 * 0 on success, negative errno value on failure.
4828 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4830 struct priv *priv = dev->data->dev_private;
4832 struct ethtool_pauseparam ethpause = {
4833 .cmd = ETHTOOL_GPAUSEPARAM
4837 if (mlx4_is_secondary())
4838 return -E_RTE_SECONDARY;
4839 ifr.ifr_data = (void *)ðpause;
4841 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4843 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4849 fc_conf->autoneg = ethpause.autoneg;
4850 if (ethpause.rx_pause && ethpause.tx_pause)
4851 fc_conf->mode = RTE_FC_FULL;
4852 else if (ethpause.rx_pause)
4853 fc_conf->mode = RTE_FC_RX_PAUSE;
4854 else if (ethpause.tx_pause)
4855 fc_conf->mode = RTE_FC_TX_PAUSE;
4857 fc_conf->mode = RTE_FC_NONE;
4867 * DPDK callback to modify flow control parameters.
4870 * Pointer to Ethernet device structure.
4871 * @param[in] fc_conf
4872 * Flow control parameters.
4875 * 0 on success, negative errno value on failure.
4878 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4880 struct priv *priv = dev->data->dev_private;
4882 struct ethtool_pauseparam ethpause = {
4883 .cmd = ETHTOOL_SPAUSEPARAM
4887 if (mlx4_is_secondary())
4888 return -E_RTE_SECONDARY;
4889 ifr.ifr_data = (void *)ðpause;
4890 ethpause.autoneg = fc_conf->autoneg;
4891 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4892 (fc_conf->mode & RTE_FC_RX_PAUSE))
4893 ethpause.rx_pause = 1;
4895 ethpause.rx_pause = 0;
4897 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4898 (fc_conf->mode & RTE_FC_TX_PAUSE))
4899 ethpause.tx_pause = 1;
4901 ethpause.tx_pause = 0;
4904 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4906 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4920 * Configure a VLAN filter.
4923 * Pointer to Ethernet device structure.
4925 * VLAN ID to filter.
4930 * 0 on success, errno value on failure.
4933 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4935 struct priv *priv = dev->data->dev_private;
4937 unsigned int j = -1;
4939 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4940 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4941 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4942 if (!priv->vlan_filter[i].enabled) {
4943 /* Unused index, remember it. */
4947 if (priv->vlan_filter[i].id != vlan_id)
4949 /* This VLAN ID is already known, use its index. */
4953 /* Check if there's room for another VLAN filter. */
4954 if (j == (unsigned int)-1)
4957 * VLAN filters apply to all configured MAC addresses, flow
4958 * specifications must be reconfigured accordingly.
4960 priv->vlan_filter[j].id = vlan_id;
4961 if ((on) && (!priv->vlan_filter[j].enabled)) {
4963 * Filter is disabled, enable it.
4964 * Rehashing flows in all RX queues is necessary.
4967 rxq_mac_addrs_del(&priv->rxq_parent);
4969 for (i = 0; (i != priv->rxqs_n); ++i)
4970 if ((*priv->rxqs)[i] != NULL)
4971 rxq_mac_addrs_del((*priv->rxqs)[i]);
4972 priv->vlan_filter[j].enabled = 1;
4973 if (priv->started) {
4975 rxq_mac_addrs_add(&priv->rxq_parent);
4977 for (i = 0; (i != priv->rxqs_n); ++i) {
4978 if ((*priv->rxqs)[i] == NULL)
4980 rxq_mac_addrs_add((*priv->rxqs)[i]);
4983 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
4985 * Filter is enabled, disable it.
4986 * Rehashing flows in all RX queues is necessary.
4989 rxq_mac_addrs_del(&priv->rxq_parent);
4991 for (i = 0; (i != priv->rxqs_n); ++i)
4992 if ((*priv->rxqs)[i] != NULL)
4993 rxq_mac_addrs_del((*priv->rxqs)[i]);
4994 priv->vlan_filter[j].enabled = 0;
4995 if (priv->started) {
4997 rxq_mac_addrs_add(&priv->rxq_parent);
4999 for (i = 0; (i != priv->rxqs_n); ++i) {
5000 if ((*priv->rxqs)[i] == NULL)
5002 rxq_mac_addrs_add((*priv->rxqs)[i]);
5010 * DPDK callback to configure a VLAN filter.
5013 * Pointer to Ethernet device structure.
5015 * VLAN ID to filter.
5020 * 0 on success, negative errno value on failure.
5023 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5025 struct priv *priv = dev->data->dev_private;
5028 if (mlx4_is_secondary())
5029 return -E_RTE_SECONDARY;
5031 ret = vlan_filter_set(dev, vlan_id, on);
5037 const struct rte_flow_ops mlx4_flow_ops = {
5038 .validate = mlx4_flow_validate,
5039 .create = mlx4_flow_create,
5040 .destroy = mlx4_flow_destroy,
5041 .flush = mlx4_flow_flush,
5046 * Manage filter operations.
5049 * Pointer to Ethernet device structure.
5050 * @param filter_type
5053 * Operation to perform.
5055 * Pointer to operation-specific structure.
5058 * 0 on success, negative errno value on failure.
5061 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
5062 enum rte_filter_type filter_type,
5063 enum rte_filter_op filter_op,
5068 switch (filter_type) {
5069 case RTE_ETH_FILTER_GENERIC:
5070 if (filter_op != RTE_ETH_FILTER_GET)
5072 *(const void **)arg = &mlx4_flow_ops;
5074 case RTE_ETH_FILTER_FDIR:
5075 DEBUG("%p: filter type FDIR is not supported by this PMD",
5079 ERROR("%p: filter type (%d) not supported",
5080 (void *)dev, filter_type);
5086 static const struct eth_dev_ops mlx4_dev_ops = {
5087 .dev_configure = mlx4_dev_configure,
5088 .dev_start = mlx4_dev_start,
5089 .dev_stop = mlx4_dev_stop,
5090 .dev_set_link_down = mlx4_set_link_down,
5091 .dev_set_link_up = mlx4_set_link_up,
5092 .dev_close = mlx4_dev_close,
5093 .promiscuous_enable = mlx4_promiscuous_enable,
5094 .promiscuous_disable = mlx4_promiscuous_disable,
5095 .allmulticast_enable = mlx4_allmulticast_enable,
5096 .allmulticast_disable = mlx4_allmulticast_disable,
5097 .link_update = mlx4_link_update,
5098 .stats_get = mlx4_stats_get,
5099 .stats_reset = mlx4_stats_reset,
5100 .queue_stats_mapping_set = NULL,
5101 .dev_infos_get = mlx4_dev_infos_get,
5102 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5103 .vlan_filter_set = mlx4_vlan_filter_set,
5104 .vlan_tpid_set = NULL,
5105 .vlan_strip_queue_set = NULL,
5106 .vlan_offload_set = NULL,
5107 .rx_queue_setup = mlx4_rx_queue_setup,
5108 .tx_queue_setup = mlx4_tx_queue_setup,
5109 .rx_queue_release = mlx4_rx_queue_release,
5110 .tx_queue_release = mlx4_tx_queue_release,
5112 .dev_led_off = NULL,
5113 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5114 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5115 .priority_flow_ctrl_set = NULL,
5116 .mac_addr_remove = mlx4_mac_addr_remove,
5117 .mac_addr_add = mlx4_mac_addr_add,
5118 .mac_addr_set = mlx4_mac_addr_set,
5119 .mtu_set = mlx4_dev_set_mtu,
5120 .filter_ctrl = mlx4_dev_filter_ctrl,
5124 * Get PCI information from struct ibv_device.
5127 * Pointer to Ethernet device structure.
5128 * @param[out] pci_addr
5129 * PCI bus address output buffer.
5132 * 0 on success, -1 on failure and errno is set.
5135 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5136 struct rte_pci_addr *pci_addr)
5140 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5142 file = fopen(path, "rb");
5145 while (fgets(line, sizeof(line), file) == line) {
5146 size_t len = strlen(line);
5149 /* Truncate long lines. */
5150 if (len == (sizeof(line) - 1))
5151 while (line[(len - 1)] != '\n') {
5155 line[(len - 1)] = ret;
5157 /* Extract information. */
5160 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5164 &pci_addr->function) == 4) {
5174 * Get MAC address by querying netdevice.
5177 * struct priv for the requested device.
5179 * MAC address output buffer.
5182 * 0 on success, -1 on failure and errno is set.
5185 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5187 struct ifreq request;
5189 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5191 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5195 /* Support up to 32 adapters. */
5197 struct rte_pci_addr pci_addr; /* associated PCI address */
5198 uint32_t ports; /* physical ports bitfield. */
5202 * Get device index in mlx4_dev[] from PCI bus address.
5204 * @param[in] pci_addr
5205 * PCI bus address to look for.
5208 * mlx4_dev[] index on success, -1 on failure.
5211 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5216 assert(pci_addr != NULL);
5217 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5218 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5219 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5220 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5221 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5223 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5230 * Retrieve integer value from environment variable.
5233 * Environment variable name.
5236 * Integer value, 0 if the variable is not set.
5239 mlx4_getenv_int(const char *name)
5241 const char *val = getenv(name);
5249 mlx4_dev_link_status_handler(void *);
5251 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5254 * Link status handler.
5257 * Pointer to private structure.
5259 * Pointer to the rte_eth_dev structure.
5262 * Nonzero if the callback process can be called immediately.
5265 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5267 struct ibv_async_event event;
5268 int port_change = 0;
5271 /* Read all message and acknowledge them. */
5273 if (ibv_get_async_event(priv->ctx, &event))
5276 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5277 event.event_type == IBV_EVENT_PORT_ERR)
5280 DEBUG("event type %d on port %d not handled",
5281 event.event_type, event.element.port_num);
5282 ibv_ack_async_event(&event);
5285 if (port_change ^ priv->pending_alarm) {
5286 struct rte_eth_link *link = &dev->data->dev_link;
5288 priv->pending_alarm = 0;
5289 mlx4_link_update(dev, 0);
5290 if (((link->link_speed == 0) && link->link_status) ||
5291 ((link->link_speed != 0) && !link->link_status)) {
5292 /* Inconsistent status, check again later. */
5293 priv->pending_alarm = 1;
5294 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5295 mlx4_dev_link_status_handler,
5304 * Handle delayed link status event.
5307 * Registered argument.
5310 mlx4_dev_link_status_handler(void *arg)
5312 struct rte_eth_dev *dev = arg;
5313 struct priv *priv = dev->data->dev_private;
5317 assert(priv->pending_alarm == 1);
5318 ret = priv_dev_link_status_handler(priv, dev);
5321 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
5325 * Handle interrupts from the NIC.
5327 * @param[in] intr_handle
5328 * Interrupt handler.
5330 * Callback argument.
5333 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5335 struct rte_eth_dev *dev = cb_arg;
5336 struct priv *priv = dev->data->dev_private;
5341 ret = priv_dev_link_status_handler(priv, dev);
5344 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
5348 * Uninstall interrupt handler.
5351 * Pointer to private structure.
5353 * Pointer to the rte_eth_dev structure.
5356 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5358 if (!dev->data->dev_conf.intr_conf.lsc)
5360 rte_intr_callback_unregister(&priv->intr_handle,
5361 mlx4_dev_interrupt_handler,
5363 if (priv->pending_alarm)
5364 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5365 priv->pending_alarm = 0;
5366 priv->intr_handle.fd = 0;
5367 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
5371 * Install interrupt handler.
5374 * Pointer to private structure.
5376 * Pointer to the rte_eth_dev structure.
5379 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5383 if (!dev->data->dev_conf.intr_conf.lsc)
5385 assert(priv->ctx->async_fd > 0);
5386 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5387 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5389 INFO("failed to change file descriptor async event queue");
5390 dev->data->dev_conf.intr_conf.lsc = 0;
5392 priv->intr_handle.fd = priv->ctx->async_fd;
5393 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5394 rte_intr_callback_register(&priv->intr_handle,
5395 mlx4_dev_interrupt_handler,
5401 * Verify and store value for device argument.
5404 * Key argument to verify.
5406 * Value associated with key.
5411 * 0 on success, negative errno value on failure.
5414 mlx4_arg_parse(const char *key, const char *val, void *out)
5416 struct mlx4_conf *conf = out;
5420 tmp = strtoul(val, NULL, 0);
5422 WARN("%s: \"%s\" is not a valid integer", key, val);
5425 if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) {
5426 if (tmp >= MLX4_PMD_MAX_PHYS_PORTS) {
5427 ERROR("invalid port index %lu (max: %u)",
5428 tmp, MLX4_PMD_MAX_PHYS_PORTS - 1);
5431 conf->active_ports |= 1 << tmp;
5433 WARN("%s: unknown parameter", key);
5440 * Parse device parameters.
5443 * Device arguments structure.
5446 * 0 on success, negative errno value on failure.
5449 mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)
5451 struct rte_kvargs *kvlist;
5452 unsigned int arg_count;
5456 if (devargs == NULL)
5458 kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params);
5459 if (kvlist == NULL) {
5460 ERROR("failed to parse kvargs");
5463 /* Process parameters. */
5464 for (i = 0; pmd_mlx4_init_params[i]; ++i) {
5465 arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);
5466 while (arg_count-- > 0) {
5467 ret = rte_kvargs_process(kvlist, MLX4_PMD_PORT_KVARG,
5468 mlx4_arg_parse, conf);
5474 rte_kvargs_free(kvlist);
5478 static struct eth_driver mlx4_driver;
5481 * DPDK callback to register a PCI device.
5483 * This function creates an Ethernet device for each port of a given
5486 * @param[in] pci_drv
5487 * PCI driver structure (mlx4_driver).
5488 * @param[in] pci_dev
5489 * PCI device information.
5492 * 0 on success, negative errno value on failure.
5495 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5497 struct ibv_device **list;
5498 struct ibv_device *ibv_dev;
5500 struct ibv_context *attr_ctx = NULL;
5501 struct ibv_device_attr device_attr;
5502 struct mlx4_conf conf = {
5510 assert(pci_drv == &mlx4_driver.pci_drv);
5511 /* Get mlx4_dev[] index. */
5512 idx = mlx4_dev_idx(&pci_dev->addr);
5514 ERROR("this driver cannot support any more adapters");
5517 DEBUG("using driver device index %d", idx);
5519 /* Save PCI address. */
5520 mlx4_dev[idx].pci_addr = pci_dev->addr;
5521 list = ibv_get_device_list(&i);
5524 if (errno == ENOSYS) {
5525 WARN("cannot list devices, is ib_uverbs loaded?");
5532 * For each listed device, check related sysfs entry against
5533 * the provided PCI ID.
5536 struct rte_pci_addr pci_addr;
5539 DEBUG("checking device \"%s\"", list[i]->name);
5540 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5542 if ((pci_dev->addr.domain != pci_addr.domain) ||
5543 (pci_dev->addr.bus != pci_addr.bus) ||
5544 (pci_dev->addr.devid != pci_addr.devid) ||
5545 (pci_dev->addr.function != pci_addr.function))
5547 vf = (pci_dev->id.device_id ==
5548 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5549 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5550 list[i]->name, (vf ? "true" : "false"));
5551 attr_ctx = ibv_open_device(list[i]);
5555 if (attr_ctx == NULL) {
5556 ibv_free_device_list(list);
5559 WARN("cannot access device, is mlx4_ib loaded?");
5562 WARN("cannot use device, are drivers up to date?");
5570 DEBUG("device opened");
5571 if (ibv_query_device(attr_ctx, &device_attr))
5573 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5575 if (mlx4_args(pci_dev->device.devargs, &conf)) {
5576 ERROR("failed to process device arguments");
5579 /* Use all ports when none are defined */
5580 if (conf.active_ports == 0) {
5581 for (i = 0; i < MLX4_PMD_MAX_PHYS_PORTS; i++)
5582 conf.active_ports |= 1 << i;
5584 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5585 uint32_t port = i + 1; /* ports are indexed from one */
5586 uint32_t test = (1 << i);
5587 struct ibv_context *ctx = NULL;
5588 struct ibv_port_attr port_attr;
5589 struct ibv_pd *pd = NULL;
5590 struct priv *priv = NULL;
5591 struct rte_eth_dev *eth_dev = NULL;
5592 #ifdef HAVE_EXP_QUERY_DEVICE
5593 struct ibv_exp_device_attr exp_device_attr;
5594 #endif /* HAVE_EXP_QUERY_DEVICE */
5595 struct ether_addr mac;
5597 /* If port is not active, skip. */
5598 if (!(conf.active_ports & (1 << i)))
5600 #ifdef HAVE_EXP_QUERY_DEVICE
5601 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5603 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5604 #endif /* RSS_SUPPORT */
5605 #endif /* HAVE_EXP_QUERY_DEVICE */
5607 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5609 ctx = ibv_open_device(ibv_dev);
5613 /* Check port status. */
5614 err = ibv_query_port(ctx, port, &port_attr);
5616 ERROR("port query failed: %s", strerror(err));
5620 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5621 ERROR("port %d is not configured in Ethernet mode",
5626 if (port_attr.state != IBV_PORT_ACTIVE)
5627 DEBUG("port %d is not active: \"%s\" (%d)",
5628 port, ibv_port_state_str(port_attr.state),
5631 /* Allocate protection domain. */
5632 pd = ibv_alloc_pd(ctx);
5634 ERROR("PD allocation failure");
5639 mlx4_dev[idx].ports |= test;
5641 /* from rte_ethdev.c */
5642 priv = rte_zmalloc("ethdev private structure",
5644 RTE_CACHE_LINE_SIZE);
5646 ERROR("priv allocation failure");
5652 priv->device_attr = device_attr;
5655 priv->mtu = ETHER_MTU;
5656 #ifdef HAVE_EXP_QUERY_DEVICE
5657 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5658 ERROR("ibv_exp_query_device() failed");
5662 if ((exp_device_attr.exp_device_cap_flags &
5663 IBV_EXP_DEVICE_QPG) &&
5664 (exp_device_attr.exp_device_cap_flags &
5665 IBV_EXP_DEVICE_UD_RSS) &&
5666 (exp_device_attr.comp_mask &
5667 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5668 (exp_device_attr.max_rss_tbl_sz > 0)) {
5671 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5675 priv->max_rss_tbl_sz = 0;
5677 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5678 IBV_EXP_DEVICE_UD_TSS);
5679 DEBUG("device flags: %s%s%s",
5680 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5681 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5682 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5684 DEBUG("maximum RSS indirection table size: %u",
5685 exp_device_attr.max_rss_tbl_sz);
5686 #endif /* RSS_SUPPORT */
5689 ((exp_device_attr.exp_device_cap_flags &
5690 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5691 (exp_device_attr.exp_device_cap_flags &
5692 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5693 DEBUG("checksum offloading is %ssupported",
5694 (priv->hw_csum ? "" : "not "));
5696 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5697 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5698 DEBUG("L2 tunnel checksum offloads are %ssupported",
5699 (priv->hw_csum_l2tun ? "" : "not "));
5702 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5704 if (priv->inl_recv_size) {
5705 exp_device_attr.comp_mask =
5706 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5707 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5708 INFO("Couldn't query device for inline-receive"
5710 priv->inl_recv_size = 0;
5712 if ((unsigned)exp_device_attr.inline_recv_sz <
5713 priv->inl_recv_size) {
5714 INFO("Max inline-receive (%d) <"
5715 " requested inline-receive (%u)",
5716 exp_device_attr.inline_recv_sz,
5717 priv->inl_recv_size);
5718 priv->inl_recv_size =
5719 exp_device_attr.inline_recv_sz;
5722 INFO("Set inline receive size to %u",
5723 priv->inl_recv_size);
5725 #endif /* INLINE_RECV */
5726 #endif /* HAVE_EXP_QUERY_DEVICE */
5728 (void)mlx4_getenv_int;
5730 /* Configure the first MAC address by default. */
5731 if (priv_get_mac(priv, &mac.addr_bytes)) {
5732 ERROR("cannot get MAC address, is mlx4_en loaded?"
5733 " (errno: %s)", strerror(errno));
5736 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5738 mac.addr_bytes[0], mac.addr_bytes[1],
5739 mac.addr_bytes[2], mac.addr_bytes[3],
5740 mac.addr_bytes[4], mac.addr_bytes[5]);
5741 /* Register MAC and broadcast addresses. */
5742 claim_zero(priv_mac_addr_add(priv, 0,
5743 (const uint8_t (*)[ETHER_ADDR_LEN])
5745 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5746 &(const uint8_t [ETHER_ADDR_LEN])
5747 { "\xff\xff\xff\xff\xff\xff" }));
5750 char ifname[IF_NAMESIZE];
5752 if (priv_get_ifname(priv, &ifname) == 0)
5753 DEBUG("port %u ifname is \"%s\"",
5754 priv->port, ifname);
5756 DEBUG("port %u ifname is unknown", priv->port);
5759 /* Get actual MTU if possible. */
5760 priv_get_mtu(priv, &priv->mtu);
5761 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5763 /* from rte_ethdev.c */
5765 char name[RTE_ETH_NAME_MAX_LEN];
5767 snprintf(name, sizeof(name), "%s port %u",
5768 ibv_get_device_name(ibv_dev), port);
5769 eth_dev = rte_eth_dev_allocate(name);
5771 if (eth_dev == NULL) {
5772 ERROR("can not allocate rte ethdev");
5777 /* Secondary processes have to use local storage for their
5778 * private data as well as a copy of eth_dev->data, but this
5779 * pointer must not be modified before burst functions are
5780 * actually called. */
5781 if (mlx4_is_secondary()) {
5782 struct mlx4_secondary_data *sd =
5783 &mlx4_secondary_data[eth_dev->data->port_id];
5785 sd->primary_priv = eth_dev->data->dev_private;
5786 if (sd->primary_priv == NULL) {
5787 ERROR("no private data for port %u",
5788 eth_dev->data->port_id);
5792 sd->shared_dev_data = eth_dev->data;
5793 rte_spinlock_init(&sd->lock);
5794 memcpy(sd->data.name, sd->shared_dev_data->name,
5795 sizeof(sd->data.name));
5796 sd->data.dev_private = priv;
5797 sd->data.rx_mbuf_alloc_failed = 0;
5798 sd->data.mtu = ETHER_MTU;
5799 sd->data.port_id = sd->shared_dev_data->port_id;
5800 sd->data.mac_addrs = priv->mac;
5801 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5802 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5804 eth_dev->data->dev_private = priv;
5805 eth_dev->data->mac_addrs = priv->mac;
5807 eth_dev->device = &pci_dev->device;
5809 rte_eth_copy_pci_info(eth_dev, pci_dev);
5811 eth_dev->driver = &mlx4_driver;
5813 priv->dev = eth_dev;
5814 eth_dev->dev_ops = &mlx4_dev_ops;
5816 /* Bring Ethernet device up. */
5817 DEBUG("forcing Ethernet interface up");
5818 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5819 /* Update link status once if waiting for LSC. */
5820 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
5821 mlx4_link_update(eth_dev, 0);
5827 claim_zero(ibv_dealloc_pd(pd));
5829 claim_zero(ibv_close_device(ctx));
5831 rte_eth_dev_release_port(eth_dev);
5836 * XXX if something went wrong in the loop above, there is a resource
5837 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5838 * long as the dpdk does not provide a way to deallocate a ethdev and a
5839 * way to enumerate the registered ethdevs to free the previous ones.
5842 /* no port found, complain */
5843 if (!mlx4_dev[idx].ports) {
5850 claim_zero(ibv_close_device(attr_ctx));
5852 ibv_free_device_list(list);
5857 static const struct rte_pci_id mlx4_pci_id_map[] = {
5859 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5860 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
5863 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5864 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
5867 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5868 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
5875 static struct eth_driver mlx4_driver = {
5878 .name = MLX4_DRIVER_NAME
5880 .id_table = mlx4_pci_id_map,
5881 .probe = mlx4_pci_probe,
5882 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5884 .dev_private_size = sizeof(struct priv)
5888 * Driver initialization routine.
5890 RTE_INIT(rte_mlx4_pmd_init);
5892 rte_mlx4_pmd_init(void)
5894 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5896 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5897 * huge pages. Calling ibv_fork_init() during init allows
5898 * applications to use fork() safely for purposes other than
5899 * using this PMD, which is not supported in forked processes.
5901 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5903 rte_eal_pci_register(&mlx4_driver.pci_drv);
5906 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
5907 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
5908 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
5909 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");