4 * Copyright 2012-2015 6WIND S.A.
5 * Copyright 2012 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
57 #include <linux/ethtool.h>
58 #include <linux/sockios.h>
62 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
64 #pragma GCC diagnostic ignored "-pedantic"
66 #include <infiniband/verbs.h>
68 #pragma GCC diagnostic error "-pedantic"
71 /* DPDK headers don't like -pedantic. */
73 #pragma GCC diagnostic ignored "-pedantic"
75 #include <rte_ether.h>
76 #include <rte_ethdev.h>
79 #include <rte_errno.h>
80 #include <rte_mempool.h>
81 #include <rte_prefetch.h>
82 #include <rte_malloc.h>
83 #include <rte_spinlock.h>
84 #include <rte_atomic.h>
85 #include <rte_version.h>
87 #include <rte_alarm.h>
88 #include <rte_memory.h>
90 #pragma GCC diagnostic error "-pedantic"
93 /* Generated configuration header. */
94 #include "mlx4_autoconf.h"
99 /* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
100 * Intermediate LOG_*() macros add the required end-of-line characters. */
102 #define INFO(...) DEBUG(__VA_ARGS__)
103 #define WARN(...) DEBUG(__VA_ARGS__)
104 #define ERROR(...) DEBUG(__VA_ARGS__)
106 #define LOG__(level, m, ...) \
107 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
108 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
109 #define INFO(...) LOG_(INFO, __VA_ARGS__)
110 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
111 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
114 /* Convenience macros for accessing mbuf fields. */
115 #define NEXT(m) ((m)->next)
116 #define DATA_LEN(m) ((m)->data_len)
117 #define PKT_LEN(m) ((m)->pkt_len)
118 #define DATA_OFF(m) ((m)->data_off)
119 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
120 #define NB_SEGS(m) ((m)->nb_segs)
121 #define PORT(m) ((m)->port)
123 /* Work Request ID data type (64 bit). */
132 #define WR_ID(o) (((wr_id_t *)&(o))->data)
134 /* Transpose flags. Useful to convert IBV to DPDK flags. */
135 #define TRANSPOSE(val, from, to) \
136 (((from) >= (to)) ? \
137 (((val) & (from)) / ((from) / (to))) : \
138 (((val) & (from)) * ((to) / (from))))
140 struct mlx4_rxq_stats {
141 unsigned int idx; /**< Mapping index. */
142 #ifdef MLX4_PMD_SOFT_COUNTERS
143 uint64_t ipackets; /**< Total of successfully received packets. */
144 uint64_t ibytes; /**< Total of successfully received bytes. */
146 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
147 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
150 struct mlx4_txq_stats {
151 unsigned int idx; /**< Mapping index. */
152 #ifdef MLX4_PMD_SOFT_COUNTERS
153 uint64_t opackets; /**< Total of successfully sent packets. */
154 uint64_t obytes; /**< Total of successfully sent bytes. */
156 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
159 /* RX element (scattered packets). */
161 struct ibv_recv_wr wr; /* Work Request. */
162 struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
163 struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
168 struct ibv_recv_wr wr; /* Work Request. */
169 struct ibv_sge sge; /* Scatter/Gather Element. */
170 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
173 /* RX queue descriptor. */
175 struct priv *priv; /* Back pointer to private data. */
176 struct rte_mempool *mp; /* Memory Pool for allocations. */
177 struct ibv_mr *mr; /* Memory Region (for mp). */
178 struct ibv_cq *cq; /* Completion Queue. */
179 struct ibv_qp *qp; /* Queue Pair. */
180 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
181 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
183 * Each VLAN ID requires a separate flow steering rule.
185 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
186 struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
187 struct ibv_flow *promisc_flow; /* Promiscuous flow. */
188 struct ibv_flow *allmulti_flow; /* Multicast flow. */
189 unsigned int port_id; /* Port ID for incoming packets. */
190 unsigned int elts_n; /* (*elts)[] length. */
191 unsigned int elts_head; /* Current index in (*elts)[]. */
193 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
194 struct rxq_elt (*no_sp)[]; /* RX elements. */
196 unsigned int sp:1; /* Use scattered RX elements. */
197 unsigned int csum:1; /* Enable checksum offloading. */
198 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
199 uint32_t mb_len; /* Length of a mp-issued mbuf. */
200 struct mlx4_rxq_stats stats; /* RX queue counters. */
201 unsigned int socket; /* CPU socket ID for allocations. */
202 struct ibv_exp_res_domain *rd; /* Resource Domain. */
207 struct rte_mbuf *buf;
210 /* Linear buffer type. It is used when transmitting buffers with too many
211 * segments that do not fit the hardware queue (see max_send_sge).
212 * Extra segments are copied (linearized) in such buffers, replacing the
213 * last SGE during TX.
214 * The size is arbitrary but large enough to hold a jumbo frame with
215 * 8 segments considering mbuf.buf_len is about 2048 bytes. */
216 typedef uint8_t linear_t[16384];
218 /* TX queue descriptor. */
220 struct priv *priv; /* Back pointer to private data. */
222 const struct rte_mempool *mp; /* Cached Memory Pool. */
223 struct ibv_mr *mr; /* Memory Region (for mp). */
224 uint32_t lkey; /* mr->lkey */
225 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
226 struct ibv_cq *cq; /* Completion Queue. */
227 struct ibv_qp *qp; /* Queue Pair. */
228 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
229 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
230 #if MLX4_PMD_MAX_INLINE > 0
231 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
233 unsigned int elts_n; /* (*elts)[] length. */
234 struct txq_elt (*elts)[]; /* TX elements. */
235 unsigned int elts_head; /* Current index in (*elts)[]. */
236 unsigned int elts_tail; /* First element awaiting completion. */
237 unsigned int elts_comp; /* Number of completion requests. */
238 unsigned int elts_comp_cd; /* Countdown for next completion request. */
239 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
240 struct mlx4_txq_stats stats; /* TX queue counters. */
241 linear_t (*elts_linear)[]; /* Linearized buffers. */
242 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
243 unsigned int socket; /* CPU socket ID for allocations. */
244 struct ibv_exp_res_domain *rd; /* Resource Domain. */
248 struct rte_eth_dev *dev; /* Ethernet device. */
249 struct ibv_context *ctx; /* Verbs context. */
250 struct ibv_device_attr device_attr; /* Device properties. */
251 struct ibv_pd *pd; /* Protection Domain. */
253 * MAC addresses array and configuration bit-field.
254 * An extra entry that cannot be modified by the DPDK is reserved
255 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
257 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
258 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
261 unsigned int enabled:1; /* If enabled. */
262 unsigned int id:12; /* VLAN ID (0-4095). */
263 } vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
264 /* Device properties. */
265 uint16_t mtu; /* Configured MTU. */
266 uint8_t port; /* Physical port number. */
267 unsigned int started:1; /* Device started, flows enabled. */
268 unsigned int promisc:1; /* Device in promiscuous mode. */
269 unsigned int allmulti:1; /* Device receives all multicast packets. */
270 unsigned int hw_qpg:1; /* QP groups are supported. */
271 unsigned int hw_tss:1; /* TSS is supported. */
272 unsigned int hw_rss:1; /* RSS is supported. */
273 unsigned int hw_csum:1; /* Checksum offload is supported. */
274 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
275 unsigned int rss:1; /* RSS is enabled. */
276 unsigned int vf:1; /* This is a VF device. */
277 unsigned int pending_alarm:1; /* An alarm is pending. */
279 unsigned int inl_recv_size; /* Inline recv size */
281 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
283 struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
284 unsigned int rxqs_n; /* RX queues array size. */
285 unsigned int txqs_n; /* TX queues array size. */
286 struct rxq *(*rxqs)[]; /* RX queues. */
287 struct txq *(*txqs)[]; /* TX queues. */
288 struct rte_intr_handle intr_handle; /* Interrupt handler. */
289 rte_spinlock_t lock; /* Lock for control functions. */
292 /* Local storage for secondary process data. */
293 struct mlx4_secondary_data {
294 struct rte_eth_dev_data data; /* Local device data. */
295 struct priv *primary_priv; /* Private structure from primary. */
296 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
297 rte_spinlock_t lock; /* Port configuration lock. */
298 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
301 * Check if running as a secondary process.
304 * Nonzero if running as a secondary process.
307 mlx4_is_secondary(void)
309 return rte_eal_process_type() != RTE_PROC_PRIMARY;
313 * Return private structure associated with an Ethernet device.
316 * Pointer to Ethernet device structure.
319 * Pointer to private structure.
322 mlx4_get_priv(struct rte_eth_dev *dev)
324 struct mlx4_secondary_data *sd;
326 if (!mlx4_is_secondary())
327 return dev->data->dev_private;
328 sd = &mlx4_secondary_data[dev->data->port_id];
329 return sd->data.dev_private;
333 * Lock private structure to protect it from concurrent access in the
337 * Pointer to private structure.
340 priv_lock(struct priv *priv)
342 rte_spinlock_lock(&priv->lock);
346 * Unlock private structure.
349 * Pointer to private structure.
352 priv_unlock(struct priv *priv)
354 rte_spinlock_unlock(&priv->lock);
357 /* Allocate a buffer on the stack and fill it with a printf format string. */
358 #define MKSTR(name, ...) \
359 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
361 snprintf(name, sizeof(name), __VA_ARGS__)
364 * Get interface name from private structure.
367 * Pointer to private structure.
369 * Interface name output buffer.
372 * 0 on success, -1 on failure and errno is set.
375 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
379 unsigned int dev_type = 0;
380 unsigned int dev_port_prev = ~0u;
381 char match[IF_NAMESIZE] = "";
384 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
390 while ((dent = readdir(dir)) != NULL) {
391 char *name = dent->d_name;
393 unsigned int dev_port;
396 if ((name[0] == '.') &&
397 ((name[1] == '\0') ||
398 ((name[1] == '.') && (name[2] == '\0'))))
401 MKSTR(path, "%s/device/net/%s/%s",
402 priv->ctx->device->ibdev_path, name,
403 (dev_type ? "dev_id" : "dev_port"));
405 file = fopen(path, "rb");
410 * Switch to dev_id when dev_port does not exist as
411 * is the case with Linux kernel versions < 3.15.
422 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
427 * Switch to dev_id when dev_port returns the same value for
428 * all ports. May happen when using a MOFED release older than
429 * 3.0 with a Linux kernel >= 3.15.
431 if (dev_port == dev_port_prev)
433 dev_port_prev = dev_port;
434 if (dev_port == (priv->port - 1u))
435 snprintf(match, sizeof(match), "%s", name);
438 if (match[0] == '\0')
440 strncpy(*ifname, match, sizeof(*ifname));
445 * Read from sysfs entry.
448 * Pointer to private structure.
450 * Entry name relative to sysfs path.
452 * Data output buffer.
457 * 0 on success, -1 on failure and errno is set.
460 priv_sysfs_read(const struct priv *priv, const char *entry,
461 char *buf, size_t size)
463 char ifname[IF_NAMESIZE];
468 if (priv_get_ifname(priv, &ifname))
471 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
474 file = fopen(path, "rb");
477 ret = fread(buf, 1, size, file);
479 if (((size_t)ret < size) && (ferror(file)))
489 * Write to sysfs entry.
492 * Pointer to private structure.
494 * Entry name relative to sysfs path.
501 * 0 on success, -1 on failure and errno is set.
504 priv_sysfs_write(const struct priv *priv, const char *entry,
505 char *buf, size_t size)
507 char ifname[IF_NAMESIZE];
512 if (priv_get_ifname(priv, &ifname))
515 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
518 file = fopen(path, "wb");
521 ret = fwrite(buf, 1, size, file);
523 if (((size_t)ret < size) || (ferror(file)))
533 * Get unsigned long sysfs property.
536 * Pointer to private structure.
538 * Entry name relative to sysfs path.
540 * Value output buffer.
543 * 0 on success, -1 on failure and errno is set.
546 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
549 unsigned long value_ret;
552 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
554 DEBUG("cannot read %s value from sysfs: %s",
555 name, strerror(errno));
558 value_str[ret] = '\0';
560 value_ret = strtoul(value_str, NULL, 0);
562 DEBUG("invalid %s value `%s': %s", name, value_str,
571 * Set unsigned long sysfs property.
574 * Pointer to private structure.
576 * Entry name relative to sysfs path.
581 * 0 on success, -1 on failure and errno is set.
584 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
587 MKSTR(value_str, "%lu", value);
589 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
591 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
592 name, value_str, value, strerror(errno));
599 * Perform ifreq ioctl() on associated Ethernet device.
602 * Pointer to private structure.
604 * Request number to pass to ioctl().
606 * Interface request structure output buffer.
609 * 0 on success, -1 on failure and errno is set.
612 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
614 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
619 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
620 ret = ioctl(sock, req, ifr);
629 * Pointer to private structure.
631 * MTU value output buffer.
634 * 0 on success, -1 on failure and errno is set.
637 priv_get_mtu(struct priv *priv, uint16_t *mtu)
639 unsigned long ulong_mtu;
641 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
651 * Pointer to private structure.
656 * 0 on success, -1 on failure and errno is set.
659 priv_set_mtu(struct priv *priv, uint16_t mtu)
663 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
664 priv_get_mtu(priv, &new_mtu))
676 * Pointer to private structure.
678 * Bitmask for flags that must remain untouched.
680 * Bitmask for flags to modify.
683 * 0 on success, -1 on failure and errno is set.
686 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
690 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
694 return priv_set_sysfs_ulong(priv, "flags", tmp);
697 /* Device configuration. */
700 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
701 unsigned int socket, const struct rte_eth_txconf *conf);
704 txq_cleanup(struct txq *txq);
707 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
708 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
709 struct rte_mempool *mp);
712 rxq_cleanup(struct rxq *rxq);
715 * Ethernet device configuration.
717 * Prepare the driver for a given number of TX and RX queues.
718 * Allocate parent RSS queue when several RX queues are requested.
721 * Pointer to Ethernet device structure.
724 * 0 on success, errno value on failure.
727 dev_configure(struct rte_eth_dev *dev)
729 struct priv *priv = dev->data->dev_private;
730 unsigned int rxqs_n = dev->data->nb_rx_queues;
731 unsigned int txqs_n = dev->data->nb_tx_queues;
735 priv->rxqs = (void *)dev->data->rx_queues;
736 priv->txqs = (void *)dev->data->tx_queues;
737 if (txqs_n != priv->txqs_n) {
738 INFO("%p: TX queues number update: %u -> %u",
739 (void *)dev, priv->txqs_n, txqs_n);
740 priv->txqs_n = txqs_n;
742 if (rxqs_n == priv->rxqs_n)
744 if (!rte_is_power_of_2(rxqs_n)) {
747 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
748 WARN("%p: number of RX queues must be a power"
749 " of 2: %u queues among %u will be active",
750 (void *)dev, n_active, rxqs_n);
753 INFO("%p: RX queues number update: %u -> %u",
754 (void *)dev, priv->rxqs_n, rxqs_n);
755 /* If RSS is enabled, disable it first. */
759 /* Only if there are no remaining child RX queues. */
760 for (i = 0; (i != priv->rxqs_n); ++i)
761 if ((*priv->rxqs)[i] != NULL)
763 rxq_cleanup(&priv->rxq_parent);
768 /* Nothing else to do. */
769 priv->rxqs_n = rxqs_n;
772 /* Allocate a new RSS parent queue if supported by hardware. */
774 ERROR("%p: only a single RX queue can be configured when"
775 " hardware doesn't support RSS",
779 /* Fail if hardware doesn't support that many RSS queues. */
780 if (rxqs_n >= priv->max_rss_tbl_sz) {
781 ERROR("%p: only %u RX queues can be configured for RSS",
782 (void *)dev, priv->max_rss_tbl_sz);
787 priv->rxqs_n = rxqs_n;
788 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, 0, NULL, NULL);
791 /* Failure, rollback. */
799 * DPDK callback for Ethernet device configuration.
802 * Pointer to Ethernet device structure.
805 * 0 on success, negative errno value on failure.
808 mlx4_dev_configure(struct rte_eth_dev *dev)
810 struct priv *priv = dev->data->dev_private;
813 if (mlx4_is_secondary())
814 return -E_RTE_SECONDARY;
816 ret = dev_configure(dev);
822 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
823 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
826 * Configure secondary process queues from a private data pointer (primary
827 * or secondary) and update burst callbacks. Can take place only once.
829 * All queues must have been previously created by the primary process to
830 * avoid undefined behavior.
833 * Private data pointer from either primary or secondary process.
836 * Private data pointer from secondary process, NULL in case of error.
839 mlx4_secondary_data_setup(struct priv *priv)
841 unsigned int port_id = 0;
842 struct mlx4_secondary_data *sd;
845 unsigned int nb_tx_queues;
846 unsigned int nb_rx_queues;
849 /* priv must be valid at this point. */
850 assert(priv != NULL);
851 /* priv->dev must also be valid but may point to local memory from
852 * another process, possibly with the same address and must not
853 * be dereferenced yet. */
854 assert(priv->dev != NULL);
855 /* Determine port ID by finding out where priv comes from. */
857 sd = &mlx4_secondary_data[port_id];
858 rte_spinlock_lock(&sd->lock);
859 /* Primary process? */
860 if (sd->primary_priv == priv)
862 /* Secondary process? */
863 if (sd->data.dev_private == priv)
865 rte_spinlock_unlock(&sd->lock);
866 if (++port_id == RTE_DIM(mlx4_secondary_data))
869 /* Switch to secondary private structure. If private data has already
870 * been updated by another thread, there is nothing else to do. */
871 priv = sd->data.dev_private;
872 if (priv->dev->data == &sd->data)
874 /* Sanity checks. Secondary private structure is supposed to point
875 * to local eth_dev, itself still pointing to the shared device data
876 * structure allocated by the primary process. */
877 assert(sd->shared_dev_data != &sd->data);
878 assert(sd->data.nb_tx_queues == 0);
879 assert(sd->data.tx_queues == NULL);
880 assert(sd->data.nb_rx_queues == 0);
881 assert(sd->data.rx_queues == NULL);
882 assert(priv != sd->primary_priv);
883 assert(priv->dev->data == sd->shared_dev_data);
884 assert(priv->txqs_n == 0);
885 assert(priv->txqs == NULL);
886 assert(priv->rxqs_n == 0);
887 assert(priv->rxqs == NULL);
888 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
889 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
890 /* Allocate local storage for queues. */
891 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
892 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
893 RTE_CACHE_LINE_SIZE);
894 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
895 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
896 RTE_CACHE_LINE_SIZE);
897 if (tx_queues == NULL || rx_queues == NULL)
899 /* Lock to prevent control operations during setup. */
902 for (i = 0; i != nb_tx_queues; ++i) {
903 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
906 if (primary_txq == NULL)
908 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
909 primary_txq->socket);
911 if (txq_setup(priv->dev,
913 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
916 txq->stats.idx = primary_txq->stats.idx;
923 txq = tx_queues[--i];
930 for (i = 0; i != nb_rx_queues; ++i) {
931 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
933 if (primary_rxq == NULL)
935 /* Not supported yet. */
938 /* Update everything. */
939 priv->txqs = (void *)tx_queues;
940 priv->txqs_n = nb_tx_queues;
941 priv->rxqs = (void *)rx_queues;
942 priv->rxqs_n = nb_rx_queues;
943 sd->data.rx_queues = rx_queues;
944 sd->data.tx_queues = tx_queues;
945 sd->data.nb_rx_queues = nb_rx_queues;
946 sd->data.nb_tx_queues = nb_tx_queues;
947 sd->data.dev_link = sd->shared_dev_data->dev_link;
948 sd->data.mtu = sd->shared_dev_data->mtu;
949 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
950 sizeof(sd->data.rx_queue_state));
951 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
952 sizeof(sd->data.tx_queue_state));
953 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
954 /* Use local data from now on. */
956 priv->dev->data = &sd->data;
958 priv->dev->tx_pkt_burst = mlx4_tx_burst;
959 priv->dev->rx_pkt_burst = removed_rx_burst;
962 /* More sanity checks. */
963 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
964 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
965 assert(priv->dev->data == &sd->data);
966 rte_spinlock_unlock(&sd->lock);
972 rte_spinlock_unlock(&sd->lock);
976 /* TX queues handling. */
979 * Allocate TX queue elements.
982 * Pointer to TX queue structure.
984 * Number of elements to allocate.
987 * 0 on success, errno value on failure.
990 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
993 struct txq_elt (*elts)[elts_n] =
994 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
995 linear_t (*elts_linear)[elts_n] =
996 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
998 struct ibv_mr *mr_linear = NULL;
1001 if ((elts == NULL) || (elts_linear == NULL)) {
1002 ERROR("%p: can't allocate packets array", (void *)txq);
1007 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
1008 IBV_ACCESS_LOCAL_WRITE);
1009 if (mr_linear == NULL) {
1010 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
1015 for (i = 0; (i != elts_n); ++i) {
1016 struct txq_elt *elt = &(*elts)[i];
1020 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
1021 txq->elts_n = elts_n;
1026 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
1027 * at least 4 times per ring. */
1028 txq->elts_comp_cd_init =
1029 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
1030 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
1031 txq->elts_comp_cd = txq->elts_comp_cd_init;
1032 txq->elts_linear = elts_linear;
1033 txq->mr_linear = mr_linear;
1037 if (mr_linear != NULL)
1038 claim_zero(ibv_dereg_mr(mr_linear));
1040 rte_free(elts_linear);
1043 DEBUG("%p: failed, freed everything", (void *)txq);
1049 * Free TX queue elements.
1052 * Pointer to TX queue structure.
1055 txq_free_elts(struct txq *txq)
1057 unsigned int elts_n = txq->elts_n;
1058 unsigned int elts_head = txq->elts_head;
1059 unsigned int elts_tail = txq->elts_tail;
1060 struct txq_elt (*elts)[elts_n] = txq->elts;
1061 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
1062 struct ibv_mr *mr_linear = txq->mr_linear;
1064 DEBUG("%p: freeing WRs", (void *)txq);
1069 txq->elts_comp_cd = 0;
1070 txq->elts_comp_cd_init = 0;
1072 txq->elts_linear = NULL;
1073 txq->mr_linear = NULL;
1074 if (mr_linear != NULL)
1075 claim_zero(ibv_dereg_mr(mr_linear));
1077 rte_free(elts_linear);
1080 while (elts_tail != elts_head) {
1081 struct txq_elt *elt = &(*elts)[elts_tail];
1083 assert(elt->buf != NULL);
1084 rte_pktmbuf_free(elt->buf);
1087 memset(elt, 0x77, sizeof(*elt));
1089 if (++elts_tail == elts_n)
1097 * Clean up a TX queue.
1099 * Destroy objects, free allocated memory and reset the structure for reuse.
1102 * Pointer to TX queue structure.
1105 txq_cleanup(struct txq *txq)
1107 struct ibv_exp_release_intf_params params;
1110 DEBUG("cleaning up %p", (void *)txq);
1112 if (txq->if_qp != NULL) {
1113 assert(txq->priv != NULL);
1114 assert(txq->priv->ctx != NULL);
1115 assert(txq->qp != NULL);
1116 params = (struct ibv_exp_release_intf_params){
1119 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1123 if (txq->if_cq != NULL) {
1124 assert(txq->priv != NULL);
1125 assert(txq->priv->ctx != NULL);
1126 assert(txq->cq != NULL);
1127 params = (struct ibv_exp_release_intf_params){
1130 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1134 if (txq->qp != NULL)
1135 claim_zero(ibv_destroy_qp(txq->qp));
1136 if (txq->cq != NULL)
1137 claim_zero(ibv_destroy_cq(txq->cq));
1138 if (txq->rd != NULL) {
1139 struct ibv_exp_destroy_res_domain_attr attr = {
1143 assert(txq->priv != NULL);
1144 assert(txq->priv->ctx != NULL);
1145 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1149 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1150 if (txq->mp2mr[i].mp == NULL)
1152 assert(txq->mp2mr[i].mr != NULL);
1153 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1155 memset(txq, 0, sizeof(*txq));
1159 * Manage TX completions.
1161 * When sending a burst, mlx4_tx_burst() posts several WRs.
1162 * To improve performance, a completion event is only required once every
1163 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1164 * for other WRs, but this information would not be used anyway.
1167 * Pointer to TX queue structure.
1170 * 0 on success, -1 on failure.
1173 txq_complete(struct txq *txq)
1175 unsigned int elts_comp = txq->elts_comp;
1176 unsigned int elts_tail = txq->elts_tail;
1177 const unsigned int elts_n = txq->elts_n;
1180 if (unlikely(elts_comp == 0))
1183 DEBUG("%p: processing %u work requests completions",
1184 (void *)txq, elts_comp);
1186 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1187 if (unlikely(wcs_n == 0))
1189 if (unlikely(wcs_n < 0)) {
1190 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1191 (void *)txq, wcs_n);
1195 assert(elts_comp <= txq->elts_comp);
1197 * Assume WC status is successful as nothing can be done about it
1200 elts_tail += wcs_n * txq->elts_comp_cd_init;
1201 if (elts_tail >= elts_n)
1202 elts_tail -= elts_n;
1203 txq->elts_tail = elts_tail;
1204 txq->elts_comp = elts_comp;
1208 struct mlx4_check_mempool_data {
1214 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
1215 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
1216 void *opaque, struct rte_mempool_memhdr *memhdr,
1219 struct mlx4_check_mempool_data *data = opaque;
1224 /* It already failed, skip the next chunks. */
1227 /* It is the first chunk. */
1228 if (data->start == NULL && data->end == NULL) {
1229 data->start = memhdr->addr;
1230 data->end = data->start + memhdr->len;
1233 if (data->end == memhdr->addr) {
1234 data->end += memhdr->len;
1237 if (data->start == (char *)memhdr->addr + memhdr->len) {
1238 data->start -= memhdr->len;
1241 /* Error, mempool is not virtually contigous. */
1246 * Check if a mempool can be used: it must be virtually contiguous.
1249 * Pointer to memory pool.
1251 * Pointer to the start address of the mempool virtual memory area
1253 * Pointer to the end address of the mempool virtual memory area
1256 * 0 on success (mempool is virtually contiguous), -1 on error.
1258 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
1261 struct mlx4_check_mempool_data data;
1263 memset(&data, 0, sizeof(data));
1264 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
1265 *start = (uintptr_t)data.start;
1266 *end = (uintptr_t)data.end;
1271 /* For best performance, this function should not be inlined. */
1272 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1273 __attribute__((noinline));
1276 * Register mempool as a memory region.
1279 * Pointer to protection domain.
1281 * Pointer to memory pool.
1284 * Memory region pointer, NULL in case of error.
1286 static struct ibv_mr *
1287 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1289 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1294 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1295 ERROR("mempool %p: not virtually contiguous",
1300 DEBUG("mempool %p area start=%p end=%p size=%zu",
1301 (void *)mp, (void *)start, (void *)end,
1302 (size_t)(end - start));
1303 /* Round start and end to page boundary if found in memory segments. */
1304 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1305 uintptr_t addr = (uintptr_t)ms[i].addr;
1306 size_t len = ms[i].len;
1307 unsigned int align = ms[i].hugepage_sz;
1309 if ((start > addr) && (start < addr + len))
1310 start = RTE_ALIGN_FLOOR(start, align);
1311 if ((end > addr) && (end < addr + len))
1312 end = RTE_ALIGN_CEIL(end, align);
1314 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1315 (void *)mp, (void *)start, (void *)end,
1316 (size_t)(end - start));
1317 return ibv_reg_mr(pd,
1320 IBV_ACCESS_LOCAL_WRITE);
1324 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1325 * the cloned mbuf is allocated is returned instead.
1331 * Memory pool where data is located for given mbuf.
1333 static struct rte_mempool *
1334 txq_mb2mp(struct rte_mbuf *buf)
1336 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1337 return rte_mbuf_from_indirect(buf)->pool;
1342 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1343 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1344 * remove an entry first.
1347 * Pointer to TX queue structure.
1349 * Memory Pool for which a Memory Region lkey must be returned.
1352 * mr->lkey on success, (uint32_t)-1 on failure.
1355 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1360 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1361 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1362 /* Unknown MP, add a new MR for it. */
1365 if (txq->mp2mr[i].mp == mp) {
1366 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1367 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1368 return txq->mp2mr[i].lkey;
1371 /* Add a new entry, register MR first. */
1372 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1373 (void *)txq, mp->name, (void *)mp);
1374 mr = mlx4_mp2mr(txq->priv->pd, mp);
1375 if (unlikely(mr == NULL)) {
1376 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1378 return (uint32_t)-1;
1380 if (unlikely(i == elemof(txq->mp2mr))) {
1381 /* Table is full, remove oldest entry. */
1382 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1385 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1386 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1387 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1389 /* Store the new entry. */
1390 txq->mp2mr[i].mp = mp;
1391 txq->mp2mr[i].mr = mr;
1392 txq->mp2mr[i].lkey = mr->lkey;
1393 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1394 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1395 return txq->mp2mr[i].lkey;
1398 struct txq_mp2mr_mbuf_check_data {
1403 * Callback function for rte_mempool_obj_iter() to check whether a given
1404 * mempool object looks like a mbuf.
1407 * The mempool pointer
1409 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1414 * Object index, unused.
1417 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1418 uint32_t index __rte_unused)
1420 struct txq_mp2mr_mbuf_check_data *data = arg;
1421 struct rte_mbuf *buf = obj;
1423 /* Check whether mbuf structure fits element size and whether mempool
1424 * pointer is valid. */
1425 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1430 * Iterator function for rte_mempool_walk() to register existing mempools and
1431 * fill the MP to MR cache of a TX queue.
1434 * Memory Pool to register.
1436 * Pointer to TX queue structure.
1439 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1441 struct txq *txq = arg;
1442 struct txq_mp2mr_mbuf_check_data data = {
1446 /* Register mempool only if the first element looks like a mbuf. */
1447 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1453 #if MLX4_PMD_SGE_WR_N > 1
1456 * Copy scattered mbuf contents to a single linear buffer.
1458 * @param[out] linear
1459 * Linear output buffer.
1461 * Scattered input buffer.
1464 * Number of bytes copied to the output buffer or 0 if not large enough.
1467 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1469 unsigned int size = 0;
1470 unsigned int offset;
1473 unsigned int len = DATA_LEN(buf);
1477 if (unlikely(size > sizeof(*linear)))
1479 memcpy(&(*linear)[offset],
1480 rte_pktmbuf_mtod(buf, uint8_t *),
1483 } while (buf != NULL);
1488 * Handle scattered buffers for mlx4_tx_burst().
1491 * TX queue structure.
1493 * Number of segments in buf.
1495 * TX queue element to fill.
1497 * Buffer to process.
1499 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1501 * Array filled with SGEs on success.
1504 * A structure containing the processed packet size in bytes and the
1505 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1508 static struct tx_burst_sg_ret {
1509 unsigned int length;
1512 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1513 struct rte_mbuf *buf, unsigned int elts_head,
1514 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1516 unsigned int sent_size = 0;
1520 /* When there are too many segments, extra segments are
1521 * linearized in the last SGE. */
1522 if (unlikely(segs > elemof(*sges))) {
1523 segs = (elemof(*sges) - 1);
1526 /* Update element. */
1528 /* Register segments as SGEs. */
1529 for (j = 0; (j != segs); ++j) {
1530 struct ibv_sge *sge = &(*sges)[j];
1533 /* Retrieve Memory Region key for this memory pool. */
1534 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1535 if (unlikely(lkey == (uint32_t)-1)) {
1536 /* MR does not exist. */
1537 DEBUG("%p: unable to get MP <-> MR association",
1539 /* Clean up TX element. */
1544 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1546 rte_prefetch0((volatile void *)
1547 (uintptr_t)sge->addr);
1548 sge->length = DATA_LEN(buf);
1550 sent_size += sge->length;
1553 /* If buf is not NULL here and is not going to be linearized,
1554 * nb_segs is not valid. */
1556 assert((buf == NULL) || (linearize));
1557 /* Linearize extra segments. */
1559 struct ibv_sge *sge = &(*sges)[segs];
1560 linear_t *linear = &(*txq->elts_linear)[elts_head];
1561 unsigned int size = linearize_mbuf(linear, buf);
1563 assert(segs == (elemof(*sges) - 1));
1565 /* Invalid packet. */
1566 DEBUG("%p: packet too large to be linearized.",
1568 /* Clean up TX element. */
1572 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1573 if (elemof(*sges) == 1) {
1575 struct rte_mbuf *next = NEXT(buf);
1577 rte_pktmbuf_free_seg(buf);
1579 } while (buf != NULL);
1583 sge->addr = (uintptr_t)&(*linear)[0];
1585 sge->lkey = txq->mr_linear->lkey;
1587 /* Include last segment. */
1590 return (struct tx_burst_sg_ret){
1591 .length = sent_size,
1595 return (struct tx_burst_sg_ret){
1601 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1604 * DPDK callback for TX.
1607 * Generic pointer to TX queue structure.
1609 * Packets to transmit.
1611 * Number of packets in array.
1614 * Number of packets successfully transmitted (<= pkts_n).
1617 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1619 struct txq *txq = (struct txq *)dpdk_txq;
1620 unsigned int elts_head = txq->elts_head;
1621 const unsigned int elts_n = txq->elts_n;
1622 unsigned int elts_comp_cd = txq->elts_comp_cd;
1623 unsigned int elts_comp = 0;
1628 assert(elts_comp_cd != 0);
1630 max = (elts_n - (elts_head - txq->elts_tail));
1634 assert(max <= elts_n);
1635 /* Always leave one free entry in the ring. */
1641 for (i = 0; (i != max); ++i) {
1642 struct rte_mbuf *buf = pkts[i];
1643 unsigned int elts_head_next =
1644 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1645 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1646 struct txq_elt *elt = &(*txq->elts)[elts_head];
1647 unsigned int segs = NB_SEGS(buf);
1648 #ifdef MLX4_PMD_SOFT_COUNTERS
1649 unsigned int sent_size = 0;
1651 uint32_t send_flags = 0;
1653 /* Clean up old buffer. */
1654 if (likely(elt->buf != NULL)) {
1655 struct rte_mbuf *tmp = elt->buf;
1659 memset(elt, 0x66, sizeof(*elt));
1661 /* Faster than rte_pktmbuf_free(). */
1663 struct rte_mbuf *next = NEXT(tmp);
1665 rte_pktmbuf_free_seg(tmp);
1667 } while (tmp != NULL);
1669 /* Request TX completion. */
1670 if (unlikely(--elts_comp_cd == 0)) {
1671 elts_comp_cd = txq->elts_comp_cd_init;
1673 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1675 /* Should we enable HW CKSUM offload */
1677 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1678 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1679 /* HW does not support checksum offloads at arbitrary
1680 * offsets but automatically recognizes the packet
1681 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1682 * tunnels are currently supported. */
1683 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1684 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1686 if (likely(segs == 1)) {
1691 /* Retrieve buffer information. */
1692 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1693 length = DATA_LEN(buf);
1694 /* Retrieve Memory Region key for this memory pool. */
1695 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1696 if (unlikely(lkey == (uint32_t)-1)) {
1697 /* MR does not exist. */
1698 DEBUG("%p: unable to get MP <-> MR"
1699 " association", (void *)txq);
1700 /* Clean up TX element. */
1704 /* Update element. */
1707 rte_prefetch0((volatile void *)
1709 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1710 /* Put packet into send queue. */
1711 #if MLX4_PMD_MAX_INLINE > 0
1712 if (length <= txq->max_inline)
1713 err = txq->if_qp->send_pending_inline
1720 err = txq->if_qp->send_pending
1728 #ifdef MLX4_PMD_SOFT_COUNTERS
1729 sent_size += length;
1732 #if MLX4_PMD_SGE_WR_N > 1
1733 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1734 struct tx_burst_sg_ret ret;
1736 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1738 if (ret.length == (unsigned int)-1)
1740 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1741 /* Put SG list into send queue. */
1742 err = txq->if_qp->send_pending_sg_list
1749 #ifdef MLX4_PMD_SOFT_COUNTERS
1750 sent_size += ret.length;
1752 #else /* MLX4_PMD_SGE_WR_N > 1 */
1753 DEBUG("%p: TX scattered buffers support not"
1754 " compiled in", (void *)txq);
1756 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1758 elts_head = elts_head_next;
1759 #ifdef MLX4_PMD_SOFT_COUNTERS
1760 /* Increment sent bytes counter. */
1761 txq->stats.obytes += sent_size;
1765 /* Take a shortcut if nothing must be sent. */
1766 if (unlikely(i == 0))
1768 #ifdef MLX4_PMD_SOFT_COUNTERS
1769 /* Increment sent packets counter. */
1770 txq->stats.opackets += i;
1772 /* Ring QP doorbell. */
1773 err = txq->if_qp->send_flush(txq->qp);
1774 if (unlikely(err)) {
1775 /* A nonzero value is not supposed to be returned.
1776 * Nothing can be done about it. */
1777 DEBUG("%p: send_flush() failed with error %d",
1780 txq->elts_head = elts_head;
1781 txq->elts_comp += elts_comp;
1782 txq->elts_comp_cd = elts_comp_cd;
1787 * DPDK callback for TX in secondary processes.
1789 * This function configures all queues from primary process information
1790 * if necessary before reverting to the normal TX burst callback.
1793 * Generic pointer to TX queue structure.
1795 * Packets to transmit.
1797 * Number of packets in array.
1800 * Number of packets successfully transmitted (<= pkts_n).
1803 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1806 struct txq *txq = dpdk_txq;
1807 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1808 struct priv *primary_priv;
1814 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1815 /* Look for queue index in both private structures. */
1816 for (index = 0; index != priv->txqs_n; ++index)
1817 if (((*primary_priv->txqs)[index] == txq) ||
1818 ((*priv->txqs)[index] == txq))
1820 if (index == priv->txqs_n)
1822 txq = (*priv->txqs)[index];
1823 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1827 * Configure a TX queue.
1830 * Pointer to Ethernet device structure.
1832 * Pointer to TX queue structure.
1834 * Number of descriptors to configure in queue.
1836 * NUMA socket on which memory must be allocated.
1838 * Thresholds parameters.
1841 * 0 on success, errno value on failure.
1844 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1845 unsigned int socket, const struct rte_eth_txconf *conf)
1847 struct priv *priv = mlx4_get_priv(dev);
1853 struct ibv_exp_query_intf_params params;
1854 struct ibv_exp_qp_init_attr init;
1855 struct ibv_exp_res_domain_init_attr rd;
1856 struct ibv_exp_cq_init_attr cq;
1857 struct ibv_exp_qp_attr mod;
1859 enum ibv_exp_query_intf_status status;
1862 (void)conf; /* Thresholds configuration (ignored). */
1865 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1866 ERROR("%p: invalid number of TX descriptors (must be a"
1867 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1870 desc /= MLX4_PMD_SGE_WR_N;
1871 /* MRs will be registered in mp2mr[] later. */
1872 attr.rd = (struct ibv_exp_res_domain_init_attr){
1873 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1874 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1875 .thread_model = IBV_EXP_THREAD_SINGLE,
1876 .msg_model = IBV_EXP_MSG_HIGH_BW,
1878 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1879 if (tmpl.rd == NULL) {
1881 ERROR("%p: RD creation failure: %s",
1882 (void *)dev, strerror(ret));
1885 attr.cq = (struct ibv_exp_cq_init_attr){
1886 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1887 .res_domain = tmpl.rd,
1889 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1890 if (tmpl.cq == NULL) {
1892 ERROR("%p: CQ creation failure: %s",
1893 (void *)dev, strerror(ret));
1896 DEBUG("priv->device_attr.max_qp_wr is %d",
1897 priv->device_attr.max_qp_wr);
1898 DEBUG("priv->device_attr.max_sge is %d",
1899 priv->device_attr.max_sge);
1900 attr.init = (struct ibv_exp_qp_init_attr){
1901 /* CQ to be associated with the send queue. */
1903 /* CQ to be associated with the receive queue. */
1906 /* Max number of outstanding WRs. */
1907 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1908 priv->device_attr.max_qp_wr :
1910 /* Max number of scatter/gather elements in a WR. */
1911 .max_send_sge = ((priv->device_attr.max_sge <
1912 MLX4_PMD_SGE_WR_N) ?
1913 priv->device_attr.max_sge :
1915 #if MLX4_PMD_MAX_INLINE > 0
1916 .max_inline_data = MLX4_PMD_MAX_INLINE,
1919 .qp_type = IBV_QPT_RAW_PACKET,
1920 /* Do *NOT* enable this, completions events are managed per
1924 .res_domain = tmpl.rd,
1925 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1926 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1928 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1929 if (tmpl.qp == NULL) {
1930 ret = (errno ? errno : EINVAL);
1931 ERROR("%p: QP creation failure: %s",
1932 (void *)dev, strerror(ret));
1935 #if MLX4_PMD_MAX_INLINE > 0
1936 /* ibv_create_qp() updates this value. */
1937 tmpl.max_inline = attr.init.cap.max_inline_data;
1939 attr.mod = (struct ibv_exp_qp_attr){
1940 /* Move the QP to this state. */
1941 .qp_state = IBV_QPS_INIT,
1942 /* Primary port number. */
1943 .port_num = priv->port
1945 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1946 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1948 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1949 (void *)dev, strerror(ret));
1952 ret = txq_alloc_elts(&tmpl, desc);
1954 ERROR("%p: TXQ allocation failed: %s",
1955 (void *)dev, strerror(ret));
1958 attr.mod = (struct ibv_exp_qp_attr){
1959 .qp_state = IBV_QPS_RTR
1961 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1963 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1964 (void *)dev, strerror(ret));
1967 attr.mod.qp_state = IBV_QPS_RTS;
1968 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1970 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1971 (void *)dev, strerror(ret));
1974 attr.params = (struct ibv_exp_query_intf_params){
1975 .intf_scope = IBV_EXP_INTF_GLOBAL,
1976 .intf = IBV_EXP_INTF_CQ,
1979 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1980 if (tmpl.if_cq == NULL) {
1981 ERROR("%p: CQ interface family query failed with status %d",
1982 (void *)dev, status);
1985 attr.params = (struct ibv_exp_query_intf_params){
1986 .intf_scope = IBV_EXP_INTF_GLOBAL,
1987 .intf = IBV_EXP_INTF_QP_BURST,
1989 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1990 /* MC loopback must be disabled when not using a VF. */
1993 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1997 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1998 if (tmpl.if_qp == NULL) {
1999 ERROR("%p: QP interface family query failed with status %d",
2000 (void *)dev, status);
2003 /* Clean up txq in case we're reinitializing it. */
2004 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
2007 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
2008 /* Pre-register known mempools. */
2009 rte_mempool_walk(txq_mp2mr_iter, txq);
2019 * DPDK callback to configure a TX queue.
2022 * Pointer to Ethernet device structure.
2026 * Number of descriptors to configure in queue.
2028 * NUMA socket on which memory must be allocated.
2030 * Thresholds parameters.
2033 * 0 on success, negative errno value on failure.
2036 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
2037 unsigned int socket, const struct rte_eth_txconf *conf)
2039 struct priv *priv = dev->data->dev_private;
2040 struct txq *txq = (*priv->txqs)[idx];
2043 if (mlx4_is_secondary())
2044 return -E_RTE_SECONDARY;
2046 DEBUG("%p: configuring queue %u for %u descriptors",
2047 (void *)dev, idx, desc);
2048 if (idx >= priv->txqs_n) {
2049 ERROR("%p: queue index out of range (%u >= %u)",
2050 (void *)dev, idx, priv->txqs_n);
2055 DEBUG("%p: reusing already allocated queue index %u (%p)",
2056 (void *)dev, idx, (void *)txq);
2057 if (priv->started) {
2061 (*priv->txqs)[idx] = NULL;
2064 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
2066 ERROR("%p: unable to allocate queue index %u",
2072 ret = txq_setup(dev, txq, desc, socket, conf);
2076 txq->stats.idx = idx;
2077 DEBUG("%p: adding TX queue %p to list",
2078 (void *)dev, (void *)txq);
2079 (*priv->txqs)[idx] = txq;
2080 /* Update send callback. */
2081 dev->tx_pkt_burst = mlx4_tx_burst;
2088 * DPDK callback to release a TX queue.
2091 * Generic TX queue pointer.
2094 mlx4_tx_queue_release(void *dpdk_txq)
2096 struct txq *txq = (struct txq *)dpdk_txq;
2100 if (mlx4_is_secondary())
2106 for (i = 0; (i != priv->txqs_n); ++i)
2107 if ((*priv->txqs)[i] == txq) {
2108 DEBUG("%p: removing TX queue %p from list",
2109 (void *)priv->dev, (void *)txq);
2110 (*priv->txqs)[i] = NULL;
2118 /* RX queues handling. */
2121 * Allocate RX queue elements with scattered packets support.
2124 * Pointer to RX queue structure.
2126 * Number of elements to allocate.
2128 * If not NULL, fetch buffers from this array instead of allocating them
2129 * with rte_pktmbuf_alloc().
2132 * 0 on success, errno value on failure.
2135 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2136 struct rte_mbuf **pool)
2139 struct rxq_elt_sp (*elts)[elts_n] =
2140 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2145 ERROR("%p: can't allocate packets array", (void *)rxq);
2149 /* For each WR (packet). */
2150 for (i = 0; (i != elts_n); ++i) {
2152 struct rxq_elt_sp *elt = &(*elts)[i];
2153 struct ibv_recv_wr *wr = &elt->wr;
2154 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2156 /* These two arrays must have the same size. */
2157 assert(elemof(elt->sges) == elemof(elt->bufs));
2160 wr->next = &(*elts)[(i + 1)].wr;
2161 wr->sg_list = &(*sges)[0];
2162 wr->num_sge = elemof(*sges);
2163 /* For each SGE (segment). */
2164 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2165 struct ibv_sge *sge = &(*sges)[j];
2166 struct rte_mbuf *buf;
2170 assert(buf != NULL);
2171 rte_pktmbuf_reset(buf);
2173 buf = rte_pktmbuf_alloc(rxq->mp);
2175 assert(pool == NULL);
2176 ERROR("%p: empty mbuf pool", (void *)rxq);
2181 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2182 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2183 /* Buffer is supposed to be empty. */
2184 assert(rte_pktmbuf_data_len(buf) == 0);
2185 assert(rte_pktmbuf_pkt_len(buf) == 0);
2186 /* sge->addr must be able to store a pointer. */
2187 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2189 /* The first SGE keeps its headroom. */
2190 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2191 sge->length = (buf->buf_len -
2192 RTE_PKTMBUF_HEADROOM);
2194 /* Subsequent SGEs lose theirs. */
2195 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2196 SET_DATA_OFF(buf, 0);
2197 sge->addr = (uintptr_t)buf->buf_addr;
2198 sge->length = buf->buf_len;
2200 sge->lkey = rxq->mr->lkey;
2201 /* Redundant check for tailroom. */
2202 assert(sge->length == rte_pktmbuf_tailroom(buf));
2205 /* The last WR pointer must be NULL. */
2206 (*elts)[(i - 1)].wr.next = NULL;
2207 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2208 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2209 rxq->elts_n = elts_n;
2211 rxq->elts.sp = elts;
2216 assert(pool == NULL);
2217 for (i = 0; (i != elemof(*elts)); ++i) {
2219 struct rxq_elt_sp *elt = &(*elts)[i];
2221 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2222 struct rte_mbuf *buf = elt->bufs[j];
2225 rte_pktmbuf_free_seg(buf);
2230 DEBUG("%p: failed, freed everything", (void *)rxq);
2236 * Free RX queue elements with scattered packets support.
2239 * Pointer to RX queue structure.
2242 rxq_free_elts_sp(struct rxq *rxq)
2245 unsigned int elts_n = rxq->elts_n;
2246 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2248 DEBUG("%p: freeing WRs", (void *)rxq);
2250 rxq->elts.sp = NULL;
2253 for (i = 0; (i != elemof(*elts)); ++i) {
2255 struct rxq_elt_sp *elt = &(*elts)[i];
2257 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2258 struct rte_mbuf *buf = elt->bufs[j];
2261 rte_pktmbuf_free_seg(buf);
2268 * Allocate RX queue elements.
2271 * Pointer to RX queue structure.
2273 * Number of elements to allocate.
2275 * If not NULL, fetch buffers from this array instead of allocating them
2276 * with rte_pktmbuf_alloc().
2279 * 0 on success, errno value on failure.
2282 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2285 struct rxq_elt (*elts)[elts_n] =
2286 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2291 ERROR("%p: can't allocate packets array", (void *)rxq);
2295 /* For each WR (packet). */
2296 for (i = 0; (i != elts_n); ++i) {
2297 struct rxq_elt *elt = &(*elts)[i];
2298 struct ibv_recv_wr *wr = &elt->wr;
2299 struct ibv_sge *sge = &(*elts)[i].sge;
2300 struct rte_mbuf *buf;
2304 assert(buf != NULL);
2305 rte_pktmbuf_reset(buf);
2307 buf = rte_pktmbuf_alloc(rxq->mp);
2309 assert(pool == NULL);
2310 ERROR("%p: empty mbuf pool", (void *)rxq);
2314 /* Configure WR. Work request ID contains its own index in
2315 * the elts array and the offset between SGE buffer header and
2317 WR_ID(wr->wr_id).id = i;
2318 WR_ID(wr->wr_id).offset =
2319 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2321 wr->next = &(*elts)[(i + 1)].wr;
2324 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2325 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2326 /* Buffer is supposed to be empty. */
2327 assert(rte_pktmbuf_data_len(buf) == 0);
2328 assert(rte_pktmbuf_pkt_len(buf) == 0);
2329 /* sge->addr must be able to store a pointer. */
2330 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2331 /* SGE keeps its headroom. */
2332 sge->addr = (uintptr_t)
2333 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2334 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2335 sge->lkey = rxq->mr->lkey;
2336 /* Redundant check for tailroom. */
2337 assert(sge->length == rte_pktmbuf_tailroom(buf));
2338 /* Make sure elts index and SGE mbuf pointer can be deduced
2340 if ((WR_ID(wr->wr_id).id != i) ||
2341 ((void *)((uintptr_t)sge->addr -
2342 WR_ID(wr->wr_id).offset) != buf)) {
2343 ERROR("%p: cannot store index and offset in WR ID",
2346 rte_pktmbuf_free(buf);
2351 /* The last WR pointer must be NULL. */
2352 (*elts)[(i - 1)].wr.next = NULL;
2353 DEBUG("%p: allocated and configured %u single-segment WRs",
2354 (void *)rxq, elts_n);
2355 rxq->elts_n = elts_n;
2357 rxq->elts.no_sp = elts;
2362 assert(pool == NULL);
2363 for (i = 0; (i != elemof(*elts)); ++i) {
2364 struct rxq_elt *elt = &(*elts)[i];
2365 struct rte_mbuf *buf;
2367 if (elt->sge.addr == 0)
2369 assert(WR_ID(elt->wr.wr_id).id == i);
2370 buf = (void *)((uintptr_t)elt->sge.addr -
2371 WR_ID(elt->wr.wr_id).offset);
2372 rte_pktmbuf_free_seg(buf);
2376 DEBUG("%p: failed, freed everything", (void *)rxq);
2382 * Free RX queue elements.
2385 * Pointer to RX queue structure.
2388 rxq_free_elts(struct rxq *rxq)
2391 unsigned int elts_n = rxq->elts_n;
2392 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2394 DEBUG("%p: freeing WRs", (void *)rxq);
2396 rxq->elts.no_sp = NULL;
2399 for (i = 0; (i != elemof(*elts)); ++i) {
2400 struct rxq_elt *elt = &(*elts)[i];
2401 struct rte_mbuf *buf;
2403 if (elt->sge.addr == 0)
2405 assert(WR_ID(elt->wr.wr_id).id == i);
2406 buf = (void *)((uintptr_t)elt->sge.addr -
2407 WR_ID(elt->wr.wr_id).offset);
2408 rte_pktmbuf_free_seg(buf);
2414 * Delete flow steering rule.
2417 * Pointer to RX queue structure.
2419 * MAC address index.
2424 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2427 struct priv *priv = rxq->priv;
2428 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2429 (const uint8_t (*)[ETHER_ADDR_LEN])
2430 priv->mac[mac_index].addr_bytes;
2432 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2433 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2434 " (VLAN ID %" PRIu16 ")",
2436 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2437 mac_index, priv->vlan_filter[vlan_index].id);
2438 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2439 rxq->mac_flow[mac_index][vlan_index] = NULL;
2443 * Unregister a MAC address from a RX queue.
2446 * Pointer to RX queue structure.
2448 * MAC address index.
2451 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2453 struct priv *priv = rxq->priv;
2455 unsigned int vlans = 0;
2457 assert(mac_index < elemof(priv->mac));
2458 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2460 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2461 if (!priv->vlan_filter[i].enabled)
2463 rxq_del_flow(rxq, mac_index, i);
2467 rxq_del_flow(rxq, mac_index, 0);
2469 BITFIELD_RESET(rxq->mac_configured, mac_index);
2473 * Unregister all MAC addresses from a RX queue.
2476 * Pointer to RX queue structure.
2479 rxq_mac_addrs_del(struct rxq *rxq)
2481 struct priv *priv = rxq->priv;
2484 for (i = 0; (i != elemof(priv->mac)); ++i)
2485 rxq_mac_addr_del(rxq, i);
2488 static int rxq_promiscuous_enable(struct rxq *);
2489 static void rxq_promiscuous_disable(struct rxq *);
2492 * Add single flow steering rule.
2495 * Pointer to RX queue structure.
2497 * MAC address index to register.
2499 * VLAN index. Use -1 for a flow without VLAN.
2502 * 0 on success, errno value on failure.
2505 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2507 struct ibv_flow *flow;
2508 struct priv *priv = rxq->priv;
2509 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2510 (const uint8_t (*)[ETHER_ADDR_LEN])
2511 priv->mac[mac_index].addr_bytes;
2513 /* Allocate flow specification on the stack. */
2514 struct __attribute__((packed)) {
2515 struct ibv_flow_attr attr;
2516 struct ibv_flow_spec_eth spec;
2518 struct ibv_flow_attr *attr = &data.attr;
2519 struct ibv_flow_spec_eth *spec = &data.spec;
2521 assert(mac_index < elemof(priv->mac));
2522 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2524 * No padding must be inserted by the compiler between attr and spec.
2525 * This layout is expected by libibverbs.
2527 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2528 *attr = (struct ibv_flow_attr){
2529 .type = IBV_FLOW_ATTR_NORMAL,
2534 *spec = (struct ibv_flow_spec_eth){
2535 .type = IBV_FLOW_SPEC_ETH,
2536 .size = sizeof(*spec),
2539 (*mac)[0], (*mac)[1], (*mac)[2],
2540 (*mac)[3], (*mac)[4], (*mac)[5]
2542 .vlan_tag = ((vlan_index != -1u) ?
2543 htons(priv->vlan_filter[vlan_index].id) :
2547 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2548 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2551 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2552 " (VLAN %s %" PRIu16 ")",
2554 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2556 ((vlan_index != -1u) ? "ID" : "index"),
2557 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2558 /* Create related flow. */
2560 flow = ibv_create_flow(rxq->qp, attr);
2562 /* It's not clear whether errno is always set in this case. */
2563 ERROR("%p: flow configuration failed, errno=%d: %s",
2565 (errno ? strerror(errno) : "Unknown error"));
2570 if (vlan_index == -1u)
2572 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2573 rxq->mac_flow[mac_index][vlan_index] = flow;
2578 * Register a MAC address in a RX queue.
2581 * Pointer to RX queue structure.
2583 * MAC address index to register.
2586 * 0 on success, errno value on failure.
2589 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2591 struct priv *priv = rxq->priv;
2593 unsigned int vlans = 0;
2596 assert(mac_index < elemof(priv->mac));
2597 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2598 rxq_mac_addr_del(rxq, mac_index);
2599 /* Fill VLAN specifications. */
2600 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2601 if (!priv->vlan_filter[i].enabled)
2603 /* Create related flow. */
2604 ret = rxq_add_flow(rxq, mac_index, i);
2609 /* Failure, rollback. */
2611 if (priv->vlan_filter[--i].enabled)
2612 rxq_del_flow(rxq, mac_index, i);
2616 /* In case there is no VLAN filter. */
2618 ret = rxq_add_flow(rxq, mac_index, -1);
2622 BITFIELD_SET(rxq->mac_configured, mac_index);
2627 * Register all MAC addresses in a RX queue.
2630 * Pointer to RX queue structure.
2633 * 0 on success, errno value on failure.
2636 rxq_mac_addrs_add(struct rxq *rxq)
2638 struct priv *priv = rxq->priv;
2642 for (i = 0; (i != elemof(priv->mac)); ++i) {
2643 if (!BITFIELD_ISSET(priv->mac_configured, i))
2645 ret = rxq_mac_addr_add(rxq, i);
2648 /* Failure, rollback. */
2650 rxq_mac_addr_del(rxq, --i);
2658 * Unregister a MAC address.
2660 * In RSS mode, the MAC address is unregistered from the parent queue,
2661 * otherwise it is unregistered from each queue directly.
2664 * Pointer to private structure.
2666 * MAC address index.
2669 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2673 assert(mac_index < elemof(priv->mac));
2674 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2677 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2680 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2681 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2683 BITFIELD_RESET(priv->mac_configured, mac_index);
2687 * Register a MAC address.
2689 * In RSS mode, the MAC address is registered in the parent queue,
2690 * otherwise it is registered in each queue directly.
2693 * Pointer to private structure.
2695 * MAC address index to use.
2697 * MAC address to register.
2700 * 0 on success, errno value on failure.
2703 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2704 const uint8_t (*mac)[ETHER_ADDR_LEN])
2709 assert(mac_index < elemof(priv->mac));
2710 /* First, make sure this address isn't already configured. */
2711 for (i = 0; (i != elemof(priv->mac)); ++i) {
2712 /* Skip this index, it's going to be reconfigured. */
2715 if (!BITFIELD_ISSET(priv->mac_configured, i))
2717 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2719 /* Address already configured elsewhere, return with error. */
2722 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2723 priv_mac_addr_del(priv, mac_index);
2724 priv->mac[mac_index] = (struct ether_addr){
2726 (*mac)[0], (*mac)[1], (*mac)[2],
2727 (*mac)[3], (*mac)[4], (*mac)[5]
2730 /* If device isn't started, this is all we need to do. */
2731 if (!priv->started) {
2733 /* Verify that all queues have this index disabled. */
2734 for (i = 0; (i != priv->rxqs_n); ++i) {
2735 if ((*priv->rxqs)[i] == NULL)
2737 assert(!BITFIELD_ISSET
2738 ((*priv->rxqs)[i]->mac_configured, mac_index));
2744 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2749 for (i = 0; (i != priv->rxqs_n); ++i) {
2750 if ((*priv->rxqs)[i] == NULL)
2752 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2755 /* Failure, rollback. */
2757 if ((*priv->rxqs)[(--i)] != NULL)
2758 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2762 BITFIELD_SET(priv->mac_configured, mac_index);
2767 * Enable allmulti mode in a RX queue.
2770 * Pointer to RX queue structure.
2773 * 0 on success, errno value on failure.
2776 rxq_allmulticast_enable(struct rxq *rxq)
2778 struct ibv_flow *flow;
2779 struct ibv_flow_attr attr = {
2780 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2782 .port = rxq->priv->port,
2786 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2787 if (rxq->allmulti_flow != NULL)
2790 flow = ibv_create_flow(rxq->qp, &attr);
2792 /* It's not clear whether errno is always set in this case. */
2793 ERROR("%p: flow configuration failed, errno=%d: %s",
2795 (errno ? strerror(errno) : "Unknown error"));
2800 rxq->allmulti_flow = flow;
2801 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2806 * Disable allmulti mode in a RX queue.
2809 * Pointer to RX queue structure.
2812 rxq_allmulticast_disable(struct rxq *rxq)
2814 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2815 if (rxq->allmulti_flow == NULL)
2817 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2818 rxq->allmulti_flow = NULL;
2819 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2823 * Enable promiscuous mode in a RX queue.
2826 * Pointer to RX queue structure.
2829 * 0 on success, errno value on failure.
2832 rxq_promiscuous_enable(struct rxq *rxq)
2834 struct ibv_flow *flow;
2835 struct ibv_flow_attr attr = {
2836 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2838 .port = rxq->priv->port,
2844 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2845 if (rxq->promisc_flow != NULL)
2848 flow = ibv_create_flow(rxq->qp, &attr);
2850 /* It's not clear whether errno is always set in this case. */
2851 ERROR("%p: flow configuration failed, errno=%d: %s",
2853 (errno ? strerror(errno) : "Unknown error"));
2858 rxq->promisc_flow = flow;
2859 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2864 * Disable promiscuous mode in a RX queue.
2867 * Pointer to RX queue structure.
2870 rxq_promiscuous_disable(struct rxq *rxq)
2874 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2875 if (rxq->promisc_flow == NULL)
2877 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2878 rxq->promisc_flow = NULL;
2879 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2883 * Clean up a RX queue.
2885 * Destroy objects, free allocated memory and reset the structure for reuse.
2888 * Pointer to RX queue structure.
2891 rxq_cleanup(struct rxq *rxq)
2893 struct ibv_exp_release_intf_params params;
2895 DEBUG("cleaning up %p", (void *)rxq);
2897 rxq_free_elts_sp(rxq);
2900 if (rxq->if_qp != NULL) {
2901 assert(rxq->priv != NULL);
2902 assert(rxq->priv->ctx != NULL);
2903 assert(rxq->qp != NULL);
2904 params = (struct ibv_exp_release_intf_params){
2907 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2911 if (rxq->if_cq != NULL) {
2912 assert(rxq->priv != NULL);
2913 assert(rxq->priv->ctx != NULL);
2914 assert(rxq->cq != NULL);
2915 params = (struct ibv_exp_release_intf_params){
2918 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2922 if (rxq->qp != NULL) {
2923 rxq_promiscuous_disable(rxq);
2924 rxq_allmulticast_disable(rxq);
2925 rxq_mac_addrs_del(rxq);
2926 claim_zero(ibv_destroy_qp(rxq->qp));
2928 if (rxq->cq != NULL)
2929 claim_zero(ibv_destroy_cq(rxq->cq));
2930 if (rxq->rd != NULL) {
2931 struct ibv_exp_destroy_res_domain_attr attr = {
2935 assert(rxq->priv != NULL);
2936 assert(rxq->priv->ctx != NULL);
2937 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2941 if (rxq->mr != NULL)
2942 claim_zero(ibv_dereg_mr(rxq->mr));
2943 memset(rxq, 0, sizeof(*rxq));
2947 * Translate RX completion flags to packet type.
2950 * RX completion flags returned by poll_length_flags().
2952 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2955 * Packet type for struct rte_mbuf.
2957 static inline uint32_t
2958 rxq_cq_to_pkt_type(uint32_t flags)
2962 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2965 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2967 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET, RTE_PTYPE_L3_IPV6) |
2969 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_INNER_L3_IPV4) |
2971 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_INNER_L3_IPV6);
2975 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2977 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_L3_IPV6);
2982 * Translate RX completion flags to offload flags.
2985 * Pointer to RX queue structure.
2987 * RX completion flags returned by poll_length_flags().
2990 * Offload flags (ol_flags) for struct rte_mbuf.
2992 static inline uint32_t
2993 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2995 uint32_t ol_flags = 0;
3000 IBV_EXP_CQ_RX_IP_CSUM_OK,
3001 PKT_RX_IP_CKSUM_BAD) |
3003 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
3004 PKT_RX_L4_CKSUM_BAD);
3006 * PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD are used in place
3007 * of PKT_RX_EIP_CKSUM_BAD because the latter is not functional
3010 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
3013 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
3014 PKT_RX_IP_CKSUM_BAD) |
3016 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
3017 PKT_RX_L4_CKSUM_BAD);
3022 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
3025 * DPDK callback for RX with scattered packets support.
3028 * Generic pointer to RX queue structure.
3030 * Array to store received packets.
3032 * Maximum number of packets in array.
3035 * Number of packets successfully received (<= pkts_n).
3038 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3040 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3041 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3042 const unsigned int elts_n = rxq->elts_n;
3043 unsigned int elts_head = rxq->elts_head;
3044 struct ibv_recv_wr head;
3045 struct ibv_recv_wr **next = &head.next;
3046 struct ibv_recv_wr *bad_wr;
3048 unsigned int pkts_ret = 0;
3051 if (unlikely(!rxq->sp))
3052 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
3053 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
3055 for (i = 0; (i != pkts_n); ++i) {
3056 struct rxq_elt_sp *elt = &(*elts)[elts_head];
3057 struct ibv_recv_wr *wr = &elt->wr;
3058 uint64_t wr_id = wr->wr_id;
3060 unsigned int pkt_buf_len;
3061 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
3062 struct rte_mbuf **pkt_buf_next = &pkt_buf;
3063 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
3067 /* Sanity checks. */
3071 assert(wr_id < rxq->elts_n);
3072 assert(wr->sg_list == elt->sges);
3073 assert(wr->num_sge == elemof(elt->sges));
3074 assert(elts_head < rxq->elts_n);
3075 assert(rxq->elts_head < rxq->elts_n);
3076 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3078 if (unlikely(ret < 0)) {
3082 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3084 /* ibv_poll_cq() must be used in case of failure. */
3085 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3086 if (unlikely(wcs_n == 0))
3088 if (unlikely(wcs_n < 0)) {
3089 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3090 (void *)rxq, wcs_n);
3094 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3095 /* Whatever, just repost the offending WR. */
3096 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3097 " completion status (%d): %s",
3098 (void *)rxq, wc.wr_id, wc.status,
3099 ibv_wc_status_str(wc.status));
3100 #ifdef MLX4_PMD_SOFT_COUNTERS
3101 /* Increment dropped packets counter. */
3102 ++rxq->stats.idropped;
3104 /* Link completed WRs together for repost. */
3115 /* Link completed WRs together for repost. */
3119 * Replace spent segments with new ones, concatenate and
3120 * return them as pkt_buf.
3123 struct ibv_sge *sge = &elt->sges[j];
3124 struct rte_mbuf *seg = elt->bufs[j];
3125 struct rte_mbuf *rep;
3126 unsigned int seg_tailroom;
3129 * Fetch initial bytes of packet descriptor into a
3130 * cacheline while allocating rep.
3133 rep = rte_mbuf_raw_alloc(rxq->mp);
3134 if (unlikely(rep == NULL)) {
3136 * Unable to allocate a replacement mbuf,
3139 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3140 " can't allocate a new mbuf",
3141 (void *)rxq, wr_id);
3142 if (pkt_buf != NULL) {
3143 *pkt_buf_next = NULL;
3144 rte_pktmbuf_free(pkt_buf);
3146 /* Increase out of memory counters. */
3147 ++rxq->stats.rx_nombuf;
3148 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3152 /* Poison user-modifiable fields in rep. */
3153 NEXT(rep) = (void *)((uintptr_t)-1);
3154 SET_DATA_OFF(rep, 0xdead);
3155 DATA_LEN(rep) = 0xd00d;
3156 PKT_LEN(rep) = 0xdeadd00d;
3157 NB_SEGS(rep) = 0x2a;
3161 assert(rep->buf_len == seg->buf_len);
3162 assert(rep->buf_len == rxq->mb_len);
3163 /* Reconfigure sge to use rep instead of seg. */
3164 assert(sge->lkey == rxq->mr->lkey);
3165 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3168 /* Update pkt_buf if it's the first segment, or link
3169 * seg to the previous one and update pkt_buf_next. */
3170 *pkt_buf_next = seg;
3171 pkt_buf_next = &NEXT(seg);
3172 /* Update seg information. */
3173 seg_tailroom = (seg->buf_len - seg_headroom);
3174 assert(sge->length == seg_tailroom);
3175 SET_DATA_OFF(seg, seg_headroom);
3176 if (likely(len <= seg_tailroom)) {
3178 DATA_LEN(seg) = len;
3181 assert(rte_pktmbuf_headroom(seg) ==
3183 assert(rte_pktmbuf_tailroom(seg) ==
3184 (seg_tailroom - len));
3187 DATA_LEN(seg) = seg_tailroom;
3188 PKT_LEN(seg) = seg_tailroom;
3190 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3191 assert(rte_pktmbuf_tailroom(seg) == 0);
3192 /* Fix len and clear headroom for next segments. */
3193 len -= seg_tailroom;
3196 /* Update head and tail segments. */
3197 *pkt_buf_next = NULL;
3198 assert(pkt_buf != NULL);
3200 NB_SEGS(pkt_buf) = j;
3201 PORT(pkt_buf) = rxq->port_id;
3202 PKT_LEN(pkt_buf) = pkt_buf_len;
3203 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3204 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3206 /* Return packet. */
3207 *(pkts++) = pkt_buf;
3209 #ifdef MLX4_PMD_SOFT_COUNTERS
3210 /* Increase bytes counter. */
3211 rxq->stats.ibytes += pkt_buf_len;
3214 if (++elts_head >= elts_n)
3218 if (unlikely(i == 0))
3223 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3225 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3226 if (unlikely(ret)) {
3227 /* Inability to repost WRs is fatal. */
3228 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3234 rxq->elts_head = elts_head;
3235 #ifdef MLX4_PMD_SOFT_COUNTERS
3236 /* Increase packets counter. */
3237 rxq->stats.ipackets += pkts_ret;
3243 * DPDK callback for RX.
3245 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3246 * manage scattered packets. Improves performance when MRU is lower than the
3247 * size of the first segment.
3250 * Generic pointer to RX queue structure.
3252 * Array to store received packets.
3254 * Maximum number of packets in array.
3257 * Number of packets successfully received (<= pkts_n).
3260 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3262 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3263 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3264 const unsigned int elts_n = rxq->elts_n;
3265 unsigned int elts_head = rxq->elts_head;
3266 struct ibv_sge sges[pkts_n];
3268 unsigned int pkts_ret = 0;
3271 if (unlikely(rxq->sp))
3272 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3273 for (i = 0; (i != pkts_n); ++i) {
3274 struct rxq_elt *elt = &(*elts)[elts_head];
3275 struct ibv_recv_wr *wr = &elt->wr;
3276 uint64_t wr_id = wr->wr_id;
3278 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3279 WR_ID(wr_id).offset);
3280 struct rte_mbuf *rep;
3283 /* Sanity checks. */
3284 assert(WR_ID(wr_id).id < rxq->elts_n);
3285 assert(wr->sg_list == &elt->sge);
3286 assert(wr->num_sge == 1);
3287 assert(elts_head < rxq->elts_n);
3288 assert(rxq->elts_head < rxq->elts_n);
3290 * Fetch initial bytes of packet descriptor into a
3291 * cacheline while allocating rep.
3293 rte_mbuf_prefetch_part1(seg);
3294 rte_mbuf_prefetch_part2(seg);
3295 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3297 if (unlikely(ret < 0)) {
3301 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3303 /* ibv_poll_cq() must be used in case of failure. */
3304 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3305 if (unlikely(wcs_n == 0))
3307 if (unlikely(wcs_n < 0)) {
3308 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3309 (void *)rxq, wcs_n);
3313 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3314 /* Whatever, just repost the offending WR. */
3315 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3316 " completion status (%d): %s",
3317 (void *)rxq, wc.wr_id, wc.status,
3318 ibv_wc_status_str(wc.status));
3319 #ifdef MLX4_PMD_SOFT_COUNTERS
3320 /* Increment dropped packets counter. */
3321 ++rxq->stats.idropped;
3323 /* Add SGE to array for repost. */
3332 rep = rte_mbuf_raw_alloc(rxq->mp);
3333 if (unlikely(rep == NULL)) {
3335 * Unable to allocate a replacement mbuf,
3338 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3339 " can't allocate a new mbuf",
3340 (void *)rxq, WR_ID(wr_id).id);
3341 /* Increase out of memory counters. */
3342 ++rxq->stats.rx_nombuf;
3343 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3347 /* Reconfigure sge to use rep instead of seg. */
3348 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3349 assert(elt->sge.lkey == rxq->mr->lkey);
3350 WR_ID(wr->wr_id).offset =
3351 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3353 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3355 /* Add SGE to array for repost. */
3358 /* Update seg information. */
3359 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3361 PORT(seg) = rxq->port_id;
3364 DATA_LEN(seg) = len;
3365 seg->packet_type = rxq_cq_to_pkt_type(flags);
3366 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3368 /* Return packet. */
3371 #ifdef MLX4_PMD_SOFT_COUNTERS
3372 /* Increase bytes counter. */
3373 rxq->stats.ibytes += len;
3376 if (++elts_head >= elts_n)
3380 if (unlikely(i == 0))
3384 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3386 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3387 if (unlikely(ret)) {
3388 /* Inability to repost WRs is fatal. */
3389 DEBUG("%p: recv_burst(): failed (ret=%d)",
3394 rxq->elts_head = elts_head;
3395 #ifdef MLX4_PMD_SOFT_COUNTERS
3396 /* Increase packets counter. */
3397 rxq->stats.ipackets += pkts_ret;
3403 * DPDK callback for RX in secondary processes.
3405 * This function configures all queues from primary process information
3406 * if necessary before reverting to the normal RX burst callback.
3409 * Generic pointer to RX queue structure.
3411 * Array to store received packets.
3413 * Maximum number of packets in array.
3416 * Number of packets successfully received (<= pkts_n).
3419 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3422 struct rxq *rxq = dpdk_rxq;
3423 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3424 struct priv *primary_priv;
3430 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3431 /* Look for queue index in both private structures. */
3432 for (index = 0; index != priv->rxqs_n; ++index)
3433 if (((*primary_priv->rxqs)[index] == rxq) ||
3434 ((*priv->rxqs)[index] == rxq))
3436 if (index == priv->rxqs_n)
3438 rxq = (*priv->rxqs)[index];
3439 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3443 * Allocate a Queue Pair.
3444 * Optionally setup inline receive if supported.
3447 * Pointer to private structure.
3449 * Completion queue to associate with QP.
3451 * Number of descriptors in QP (hint only).
3454 * QP pointer or NULL in case of error.
3456 static struct ibv_qp *
3457 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3458 struct ibv_exp_res_domain *rd)
3460 struct ibv_exp_qp_init_attr attr = {
3461 /* CQ to be associated with the send queue. */
3463 /* CQ to be associated with the receive queue. */
3466 /* Max number of outstanding WRs. */
3467 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3468 priv->device_attr.max_qp_wr :
3470 /* Max number of scatter/gather elements in a WR. */
3471 .max_recv_sge = ((priv->device_attr.max_sge <
3472 MLX4_PMD_SGE_WR_N) ?
3473 priv->device_attr.max_sge :
3476 .qp_type = IBV_QPT_RAW_PACKET,
3477 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3478 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3484 attr.max_inl_recv = priv->inl_recv_size;
3485 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3487 return ibv_exp_create_qp(priv->ctx, &attr);
3493 * Allocate a RSS Queue Pair.
3494 * Optionally setup inline receive if supported.
3497 * Pointer to private structure.
3499 * Completion queue to associate with QP.
3501 * Number of descriptors in QP (hint only).
3503 * If nonzero, create a parent QP, otherwise a child.
3506 * QP pointer or NULL in case of error.
3508 static struct ibv_qp *
3509 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3510 int parent, struct ibv_exp_res_domain *rd)
3512 struct ibv_exp_qp_init_attr attr = {
3513 /* CQ to be associated with the send queue. */
3515 /* CQ to be associated with the receive queue. */
3518 /* Max number of outstanding WRs. */
3519 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3520 priv->device_attr.max_qp_wr :
3522 /* Max number of scatter/gather elements in a WR. */
3523 .max_recv_sge = ((priv->device_attr.max_sge <
3524 MLX4_PMD_SGE_WR_N) ?
3525 priv->device_attr.max_sge :
3528 .qp_type = IBV_QPT_RAW_PACKET,
3529 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3530 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3531 IBV_EXP_QP_INIT_ATTR_QPG),
3537 attr.max_inl_recv = priv->inl_recv_size,
3538 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3541 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3542 /* TSS isn't necessary. */
3543 attr.qpg.parent_attrib.tss_child_count = 0;
3544 attr.qpg.parent_attrib.rss_child_count =
3545 rte_align32pow2(priv->rxqs_n + 1) >> 1;
3546 DEBUG("initializing parent RSS queue");
3548 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3549 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3550 DEBUG("initializing child RSS queue");
3552 return ibv_exp_create_qp(priv->ctx, &attr);
3555 #endif /* RSS_SUPPORT */
3558 * Reconfigure a RX queue with new parameters.
3560 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3561 * thread (such as a control thread), may corrupt the pool.
3562 * In case of failure, the queue is left untouched.
3565 * Pointer to Ethernet device structure.
3570 * 0 on success, errno value on failure.
3573 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3575 struct priv *priv = rxq->priv;
3576 struct rxq tmpl = *rxq;
3577 unsigned int mbuf_n;
3578 unsigned int desc_n;
3579 struct rte_mbuf **pool;
3581 struct ibv_exp_qp_attr mod;
3582 struct ibv_recv_wr *bad_wr;
3584 int parent = (rxq == &priv->rxq_parent);
3587 ERROR("%p: cannot rehash parent queue %p",
3588 (void *)dev, (void *)rxq);
3591 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3592 /* Number of descriptors and mbufs currently allocated. */
3593 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3595 /* Toggle RX checksum offload if hardware supports it. */
3596 if (priv->hw_csum) {
3597 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3598 rxq->csum = tmpl.csum;
3600 if (priv->hw_csum_l2tun) {
3601 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3602 rxq->csum_l2tun = tmpl.csum_l2tun;
3604 /* Enable scattered packets support for this queue if necessary. */
3605 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3606 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3607 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3609 desc_n /= MLX4_PMD_SGE_WR_N;
3612 DEBUG("%p: %s scattered packets support (%u WRs)",
3613 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3614 /* If scatter mode is the same as before, nothing to do. */
3615 if (tmpl.sp == rxq->sp) {
3616 DEBUG("%p: nothing to do", (void *)dev);
3619 /* Remove attached flows if RSS is disabled (no parent queue). */
3621 rxq_allmulticast_disable(&tmpl);
3622 rxq_promiscuous_disable(&tmpl);
3623 rxq_mac_addrs_del(&tmpl);
3624 /* Update original queue in case of failure. */
3625 rxq->allmulti_flow = tmpl.allmulti_flow;
3626 rxq->promisc_flow = tmpl.promisc_flow;
3627 memcpy(rxq->mac_configured, tmpl.mac_configured,
3628 sizeof(rxq->mac_configured));
3629 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3631 /* From now on, any failure will render the queue unusable.
3632 * Reinitialize QP. */
3633 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3634 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3636 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3640 err = ibv_resize_cq(tmpl.cq, desc_n);
3642 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3646 mod = (struct ibv_exp_qp_attr){
3647 /* Move the QP to this state. */
3648 .qp_state = IBV_QPS_INIT,
3649 /* Primary port number. */
3650 .port_num = priv->port
3652 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3655 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3656 #endif /* RSS_SUPPORT */
3659 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3660 (void *)dev, strerror(err));
3664 /* Reconfigure flows. Do not care for errors. */
3666 rxq_mac_addrs_add(&tmpl);
3668 rxq_promiscuous_enable(&tmpl);
3670 rxq_allmulticast_enable(&tmpl);
3671 /* Update original queue in case of failure. */
3672 rxq->allmulti_flow = tmpl.allmulti_flow;
3673 rxq->promisc_flow = tmpl.promisc_flow;
3674 memcpy(rxq->mac_configured, tmpl.mac_configured,
3675 sizeof(rxq->mac_configured));
3676 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3678 /* Allocate pool. */
3679 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3681 ERROR("%p: cannot allocate memory", (void *)dev);
3684 /* Snatch mbufs from original queue. */
3687 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3689 for (i = 0; (i != elemof(*elts)); ++i) {
3690 struct rxq_elt_sp *elt = &(*elts)[i];
3693 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3694 assert(elt->bufs[j] != NULL);
3695 pool[k++] = elt->bufs[j];
3699 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3701 for (i = 0; (i != elemof(*elts)); ++i) {
3702 struct rxq_elt *elt = &(*elts)[i];
3703 struct rte_mbuf *buf = (void *)
3704 ((uintptr_t)elt->sge.addr -
3705 WR_ID(elt->wr.wr_id).offset);
3707 assert(WR_ID(elt->wr.wr_id).id == i);
3711 assert(k == mbuf_n);
3713 tmpl.elts.sp = NULL;
3714 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3716 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3717 rxq_alloc_elts(&tmpl, desc_n, pool));
3719 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3724 assert(tmpl.elts_n == desc_n);
3725 assert(tmpl.elts.sp != NULL);
3727 /* Clean up original data. */
3729 rte_free(rxq->elts.sp);
3730 rxq->elts.sp = NULL;
3732 err = ibv_post_recv(tmpl.qp,
3734 &(*tmpl.elts.sp)[0].wr :
3735 &(*tmpl.elts.no_sp)[0].wr),
3738 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3744 mod = (struct ibv_exp_qp_attr){
3745 .qp_state = IBV_QPS_RTR
3747 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3749 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3750 (void *)dev, strerror(err));
3758 * Configure a RX queue.
3761 * Pointer to Ethernet device structure.
3763 * Pointer to RX queue structure.
3765 * Number of descriptors to configure in queue.
3767 * NUMA socket on which memory must be allocated.
3769 * If true, the queue is disabled because its index is higher or
3770 * equal to the real number of queues, which must be a power of 2.
3772 * Thresholds parameters.
3774 * Memory pool for buffer allocations.
3777 * 0 on success, errno value on failure.
3780 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3781 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
3782 struct rte_mempool *mp)
3784 struct priv *priv = dev->data->dev_private;
3790 struct ibv_exp_qp_attr mod;
3792 struct ibv_exp_query_intf_params params;
3793 struct ibv_exp_cq_init_attr cq;
3794 struct ibv_exp_res_domain_init_attr rd;
3796 enum ibv_exp_query_intf_status status;
3797 struct ibv_recv_wr *bad_wr;
3798 struct rte_mbuf *buf;
3800 int parent = (rxq == &priv->rxq_parent);
3802 (void)conf; /* Thresholds configuration (ignored). */
3804 * If this is a parent queue, hardware must support RSS and
3805 * RSS must be enabled.
3807 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3809 /* Even if unused, ibv_create_cq() requires at least one
3814 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3815 ERROR("%p: invalid number of RX descriptors (must be a"
3816 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3819 /* Get mbuf length. */
3820 buf = rte_pktmbuf_alloc(mp);
3822 ERROR("%p: unable to allocate mbuf", (void *)dev);
3825 tmpl.mb_len = buf->buf_len;
3826 assert((rte_pktmbuf_headroom(buf) +
3827 rte_pktmbuf_tailroom(buf)) == tmpl.mb_len);
3828 assert(rte_pktmbuf_headroom(buf) == RTE_PKTMBUF_HEADROOM);
3829 rte_pktmbuf_free(buf);
3830 /* Toggle RX checksum offload if hardware supports it. */
3832 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3833 if (priv->hw_csum_l2tun)
3834 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3835 /* Enable scattered packets support for this queue if necessary. */
3836 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3837 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3838 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3840 desc /= MLX4_PMD_SGE_WR_N;
3842 DEBUG("%p: %s scattered packets support (%u WRs)",
3843 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3844 /* Use the entire RX mempool as the memory region. */
3845 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3846 if (tmpl.mr == NULL) {
3848 ERROR("%p: MR creation failure: %s",
3849 (void *)dev, strerror(ret));
3853 attr.rd = (struct ibv_exp_res_domain_init_attr){
3854 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3855 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3856 .thread_model = IBV_EXP_THREAD_SINGLE,
3857 .msg_model = IBV_EXP_MSG_HIGH_BW,
3859 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3860 if (tmpl.rd == NULL) {
3862 ERROR("%p: RD creation failure: %s",
3863 (void *)dev, strerror(ret));
3866 attr.cq = (struct ibv_exp_cq_init_attr){
3867 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3868 .res_domain = tmpl.rd,
3870 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3871 if (tmpl.cq == NULL) {
3873 ERROR("%p: CQ creation failure: %s",
3874 (void *)dev, strerror(ret));
3877 DEBUG("priv->device_attr.max_qp_wr is %d",
3878 priv->device_attr.max_qp_wr);
3879 DEBUG("priv->device_attr.max_sge is %d",
3880 priv->device_attr.max_sge);
3882 if (priv->rss && !inactive)
3883 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3886 #endif /* RSS_SUPPORT */
3887 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3888 if (tmpl.qp == NULL) {
3889 ret = (errno ? errno : EINVAL);
3890 ERROR("%p: QP creation failure: %s",
3891 (void *)dev, strerror(ret));
3894 mod = (struct ibv_exp_qp_attr){
3895 /* Move the QP to this state. */
3896 .qp_state = IBV_QPS_INIT,
3897 /* Primary port number. */
3898 .port_num = priv->port
3900 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3903 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3904 #endif /* RSS_SUPPORT */
3907 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3908 (void *)dev, strerror(ret));
3911 if ((parent) || (!priv->rss)) {
3912 /* Configure MAC and broadcast addresses. */
3913 ret = rxq_mac_addrs_add(&tmpl);
3915 ERROR("%p: QP flow attachment failed: %s",
3916 (void *)dev, strerror(ret));
3920 /* Allocate descriptors for RX queues, except for the RSS parent. */
3924 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3926 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3928 ERROR("%p: RXQ allocation failed: %s",
3929 (void *)dev, strerror(ret));
3932 ret = ibv_post_recv(tmpl.qp,
3934 &(*tmpl.elts.sp)[0].wr :
3935 &(*tmpl.elts.no_sp)[0].wr),
3938 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3945 mod = (struct ibv_exp_qp_attr){
3946 .qp_state = IBV_QPS_RTR
3948 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3950 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3951 (void *)dev, strerror(ret));
3955 tmpl.port_id = dev->data->port_id;
3956 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3957 attr.params = (struct ibv_exp_query_intf_params){
3958 .intf_scope = IBV_EXP_INTF_GLOBAL,
3959 .intf = IBV_EXP_INTF_CQ,
3962 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3963 if (tmpl.if_cq == NULL) {
3964 ERROR("%p: CQ interface family query failed with status %d",
3965 (void *)dev, status);
3968 attr.params = (struct ibv_exp_query_intf_params){
3969 .intf_scope = IBV_EXP_INTF_GLOBAL,
3970 .intf = IBV_EXP_INTF_QP_BURST,
3973 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3974 if (tmpl.if_qp == NULL) {
3975 ERROR("%p: QP interface family query failed with status %d",
3976 (void *)dev, status);
3979 /* Clean up rxq in case we're reinitializing it. */
3980 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3983 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3993 * DPDK callback to configure a RX queue.
3996 * Pointer to Ethernet device structure.
4000 * Number of descriptors to configure in queue.
4002 * NUMA socket on which memory must be allocated.
4004 * Thresholds parameters.
4006 * Memory pool for buffer allocations.
4009 * 0 on success, negative errno value on failure.
4012 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
4013 unsigned int socket, const struct rte_eth_rxconf *conf,
4014 struct rte_mempool *mp)
4016 struct priv *priv = dev->data->dev_private;
4017 struct rxq *rxq = (*priv->rxqs)[idx];
4021 if (mlx4_is_secondary())
4022 return -E_RTE_SECONDARY;
4024 DEBUG("%p: configuring queue %u for %u descriptors",
4025 (void *)dev, idx, desc);
4026 if (idx >= priv->rxqs_n) {
4027 ERROR("%p: queue index out of range (%u >= %u)",
4028 (void *)dev, idx, priv->rxqs_n);
4033 DEBUG("%p: reusing already allocated queue index %u (%p)",
4034 (void *)dev, idx, (void *)rxq);
4035 if (priv->started) {
4039 (*priv->rxqs)[idx] = NULL;
4042 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
4044 ERROR("%p: unable to allocate queue index %u",
4050 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
4052 ret = rxq_setup(dev, rxq, desc, socket, inactive, conf, mp);
4056 rxq->stats.idx = idx;
4057 DEBUG("%p: adding RX queue %p to list",
4058 (void *)dev, (void *)rxq);
4059 (*priv->rxqs)[idx] = rxq;
4060 /* Update receive callback. */
4062 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4064 dev->rx_pkt_burst = mlx4_rx_burst;
4071 * DPDK callback to release a RX queue.
4074 * Generic RX queue pointer.
4077 mlx4_rx_queue_release(void *dpdk_rxq)
4079 struct rxq *rxq = (struct rxq *)dpdk_rxq;
4083 if (mlx4_is_secondary())
4089 assert(rxq != &priv->rxq_parent);
4090 for (i = 0; (i != priv->rxqs_n); ++i)
4091 if ((*priv->rxqs)[i] == rxq) {
4092 DEBUG("%p: removing RX queue %p from list",
4093 (void *)priv->dev, (void *)rxq);
4094 (*priv->rxqs)[i] = NULL;
4103 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4106 * DPDK callback to start the device.
4108 * Simulate device start by attaching all configured flows.
4111 * Pointer to Ethernet device structure.
4114 * 0 on success, negative errno value on failure.
4117 mlx4_dev_start(struct rte_eth_dev *dev)
4119 struct priv *priv = dev->data->dev_private;
4124 if (mlx4_is_secondary())
4125 return -E_RTE_SECONDARY;
4127 if (priv->started) {
4131 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4134 rxq = &priv->rxq_parent;
4137 rxq = (*priv->rxqs)[0];
4140 /* Iterate only once when RSS is enabled. */
4144 /* Ignore nonexistent RX queues. */
4147 ret = rxq_mac_addrs_add(rxq);
4148 if (!ret && priv->promisc)
4149 ret = rxq_promiscuous_enable(rxq);
4150 if (!ret && priv->allmulti)
4151 ret = rxq_allmulticast_enable(rxq);
4154 WARN("%p: QP flow attachment failed: %s",
4155 (void *)dev, strerror(ret));
4158 rxq = (*priv->rxqs)[--i];
4160 rxq_allmulticast_disable(rxq);
4161 rxq_promiscuous_disable(rxq);
4162 rxq_mac_addrs_del(rxq);
4168 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4169 priv_dev_interrupt_handler_install(priv, dev);
4175 * DPDK callback to stop the device.
4177 * Simulate device stop by detaching all configured flows.
4180 * Pointer to Ethernet device structure.
4183 mlx4_dev_stop(struct rte_eth_dev *dev)
4185 struct priv *priv = dev->data->dev_private;
4190 if (mlx4_is_secondary())
4193 if (!priv->started) {
4197 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4200 rxq = &priv->rxq_parent;
4203 rxq = (*priv->rxqs)[0];
4206 /* Iterate only once when RSS is enabled. */
4208 /* Ignore nonexistent RX queues. */
4211 rxq_allmulticast_disable(rxq);
4212 rxq_promiscuous_disable(rxq);
4213 rxq_mac_addrs_del(rxq);
4214 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4219 * Dummy DPDK callback for TX.
4221 * This function is used to temporarily replace the real callback during
4222 * unsafe control operations on the queue, or in case of error.
4225 * Generic pointer to TX queue structure.
4227 * Packets to transmit.
4229 * Number of packets in array.
4232 * Number of packets successfully transmitted (<= pkts_n).
4235 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4244 * Dummy DPDK callback for RX.
4246 * This function is used to temporarily replace the real callback during
4247 * unsafe control operations on the queue, or in case of error.
4250 * Generic pointer to RX queue structure.
4252 * Array to store received packets.
4254 * Maximum number of packets in array.
4257 * Number of packets successfully received (<= pkts_n).
4260 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4269 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4272 * DPDK callback to close the device.
4274 * Destroy all queues and objects, free memory.
4277 * Pointer to Ethernet device structure.
4280 mlx4_dev_close(struct rte_eth_dev *dev)
4282 struct priv *priv = mlx4_get_priv(dev);
4289 DEBUG("%p: closing device \"%s\"",
4291 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4292 /* Prevent crashes when queues are still in use. This is unfortunately
4293 * still required for DPDK 1.3 because some programs (such as testpmd)
4294 * never release them before closing the device. */
4295 dev->rx_pkt_burst = removed_rx_burst;
4296 dev->tx_pkt_burst = removed_tx_burst;
4297 if (priv->rxqs != NULL) {
4298 /* XXX race condition if mlx4_rx_burst() is still running. */
4300 for (i = 0; (i != priv->rxqs_n); ++i) {
4301 tmp = (*priv->rxqs)[i];
4304 (*priv->rxqs)[i] = NULL;
4311 if (priv->txqs != NULL) {
4312 /* XXX race condition if mlx4_tx_burst() is still running. */
4314 for (i = 0; (i != priv->txqs_n); ++i) {
4315 tmp = (*priv->txqs)[i];
4318 (*priv->txqs)[i] = NULL;
4326 rxq_cleanup(&priv->rxq_parent);
4327 if (priv->pd != NULL) {
4328 assert(priv->ctx != NULL);
4329 claim_zero(ibv_dealloc_pd(priv->pd));
4330 claim_zero(ibv_close_device(priv->ctx));
4332 assert(priv->ctx == NULL);
4333 priv_dev_interrupt_handler_uninstall(priv, dev);
4335 memset(priv, 0, sizeof(*priv));
4339 * DPDK callback to get information about the device.
4342 * Pointer to Ethernet device structure.
4344 * Info structure output buffer.
4347 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4349 struct priv *priv = mlx4_get_priv(dev);
4351 char ifname[IF_NAMESIZE];
4356 /* FIXME: we should ask the device for these values. */
4357 info->min_rx_bufsize = 32;
4358 info->max_rx_pktlen = 65536;
4360 * Since we need one CQ per QP, the limit is the minimum number
4361 * between the two values.
4363 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4364 priv->device_attr.max_qp : priv->device_attr.max_cq);
4365 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4368 info->max_rx_queues = max;
4369 info->max_tx_queues = max;
4370 /* Last array entry is reserved for broadcast. */
4371 info->max_mac_addrs = (elemof(priv->mac) - 1);
4372 info->rx_offload_capa =
4374 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4375 DEV_RX_OFFLOAD_UDP_CKSUM |
4376 DEV_RX_OFFLOAD_TCP_CKSUM) :
4378 info->tx_offload_capa =
4380 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4381 DEV_TX_OFFLOAD_UDP_CKSUM |
4382 DEV_TX_OFFLOAD_TCP_CKSUM) :
4384 if (priv_get_ifname(priv, &ifname) == 0)
4385 info->if_index = if_nametoindex(ifname);
4388 ETH_LINK_SPEED_10G |
4389 ETH_LINK_SPEED_20G |
4390 ETH_LINK_SPEED_40G |
4395 static const uint32_t *
4396 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4398 static const uint32_t ptypes[] = {
4399 /* refers to rxq_cq_to_pkt_type() */
4402 RTE_PTYPE_INNER_L3_IPV4,
4403 RTE_PTYPE_INNER_L3_IPV6,
4407 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4408 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4414 * DPDK callback to get device statistics.
4417 * Pointer to Ethernet device structure.
4419 * Stats structure output buffer.
4422 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4424 struct priv *priv = mlx4_get_priv(dev);
4425 struct rte_eth_stats tmp = {0};
4432 /* Add software counters. */
4433 for (i = 0; (i != priv->rxqs_n); ++i) {
4434 struct rxq *rxq = (*priv->rxqs)[i];
4438 idx = rxq->stats.idx;
4439 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4440 #ifdef MLX4_PMD_SOFT_COUNTERS
4441 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4442 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4444 tmp.q_errors[idx] += (rxq->stats.idropped +
4445 rxq->stats.rx_nombuf);
4447 #ifdef MLX4_PMD_SOFT_COUNTERS
4448 tmp.ipackets += rxq->stats.ipackets;
4449 tmp.ibytes += rxq->stats.ibytes;
4451 tmp.ierrors += rxq->stats.idropped;
4452 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4454 for (i = 0; (i != priv->txqs_n); ++i) {
4455 struct txq *txq = (*priv->txqs)[i];
4459 idx = txq->stats.idx;
4460 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4461 #ifdef MLX4_PMD_SOFT_COUNTERS
4462 tmp.q_opackets[idx] += txq->stats.opackets;
4463 tmp.q_obytes[idx] += txq->stats.obytes;
4465 tmp.q_errors[idx] += txq->stats.odropped;
4467 #ifdef MLX4_PMD_SOFT_COUNTERS
4468 tmp.opackets += txq->stats.opackets;
4469 tmp.obytes += txq->stats.obytes;
4471 tmp.oerrors += txq->stats.odropped;
4473 #ifndef MLX4_PMD_SOFT_COUNTERS
4474 /* FIXME: retrieve and add hardware counters. */
4481 * DPDK callback to clear device statistics.
4484 * Pointer to Ethernet device structure.
4487 mlx4_stats_reset(struct rte_eth_dev *dev)
4489 struct priv *priv = mlx4_get_priv(dev);
4496 for (i = 0; (i != priv->rxqs_n); ++i) {
4497 if ((*priv->rxqs)[i] == NULL)
4499 idx = (*priv->rxqs)[i]->stats.idx;
4500 (*priv->rxqs)[i]->stats =
4501 (struct mlx4_rxq_stats){ .idx = idx };
4503 for (i = 0; (i != priv->txqs_n); ++i) {
4504 if ((*priv->txqs)[i] == NULL)
4506 idx = (*priv->txqs)[i]->stats.idx;
4507 (*priv->txqs)[i]->stats =
4508 (struct mlx4_txq_stats){ .idx = idx };
4510 #ifndef MLX4_PMD_SOFT_COUNTERS
4511 /* FIXME: reset hardware counters. */
4517 * DPDK callback to remove a MAC address.
4520 * Pointer to Ethernet device structure.
4522 * MAC address index.
4525 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4527 struct priv *priv = dev->data->dev_private;
4529 if (mlx4_is_secondary())
4532 DEBUG("%p: removing MAC address from index %" PRIu32,
4533 (void *)dev, index);
4534 /* Last array entry is reserved for broadcast. */
4535 if (index >= (elemof(priv->mac) - 1))
4537 priv_mac_addr_del(priv, index);
4543 * DPDK callback to add a MAC address.
4546 * Pointer to Ethernet device structure.
4548 * MAC address to register.
4550 * MAC address index.
4552 * VMDq pool index to associate address with (ignored).
4555 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4556 uint32_t index, uint32_t vmdq)
4558 struct priv *priv = dev->data->dev_private;
4560 if (mlx4_is_secondary())
4564 DEBUG("%p: adding MAC address at index %" PRIu32,
4565 (void *)dev, index);
4566 /* Last array entry is reserved for broadcast. */
4567 if (index >= (elemof(priv->mac) - 1))
4569 priv_mac_addr_add(priv, index,
4570 (const uint8_t (*)[ETHER_ADDR_LEN])
4571 mac_addr->addr_bytes);
4577 * DPDK callback to set the primary MAC address.
4580 * Pointer to Ethernet device structure.
4582 * MAC address to register.
4585 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4587 DEBUG("%p: setting primary MAC address", (void *)dev);
4588 mlx4_mac_addr_remove(dev, 0);
4589 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4593 * DPDK callback to enable promiscuous mode.
4596 * Pointer to Ethernet device structure.
4599 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4601 struct priv *priv = dev->data->dev_private;
4605 if (mlx4_is_secondary())
4608 if (priv->promisc) {
4612 /* If device isn't started, this is all we need to do. */
4616 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4623 for (i = 0; (i != priv->rxqs_n); ++i) {
4624 if ((*priv->rxqs)[i] == NULL)
4626 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4629 /* Failure, rollback. */
4631 if ((*priv->rxqs)[--i] != NULL)
4632 rxq_promiscuous_disable((*priv->rxqs)[i]);
4642 * DPDK callback to disable promiscuous mode.
4645 * Pointer to Ethernet device structure.
4648 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4650 struct priv *priv = dev->data->dev_private;
4653 if (mlx4_is_secondary())
4656 if (!priv->promisc) {
4661 rxq_promiscuous_disable(&priv->rxq_parent);
4664 for (i = 0; (i != priv->rxqs_n); ++i)
4665 if ((*priv->rxqs)[i] != NULL)
4666 rxq_promiscuous_disable((*priv->rxqs)[i]);
4673 * DPDK callback to enable allmulti mode.
4676 * Pointer to Ethernet device structure.
4679 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4681 struct priv *priv = dev->data->dev_private;
4685 if (mlx4_is_secondary())
4688 if (priv->allmulti) {
4692 /* If device isn't started, this is all we need to do. */
4696 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4703 for (i = 0; (i != priv->rxqs_n); ++i) {
4704 if ((*priv->rxqs)[i] == NULL)
4706 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4709 /* Failure, rollback. */
4711 if ((*priv->rxqs)[--i] != NULL)
4712 rxq_allmulticast_disable((*priv->rxqs)[i]);
4722 * DPDK callback to disable allmulti mode.
4725 * Pointer to Ethernet device structure.
4728 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4730 struct priv *priv = dev->data->dev_private;
4733 if (mlx4_is_secondary())
4736 if (!priv->allmulti) {
4741 rxq_allmulticast_disable(&priv->rxq_parent);
4744 for (i = 0; (i != priv->rxqs_n); ++i)
4745 if ((*priv->rxqs)[i] != NULL)
4746 rxq_allmulticast_disable((*priv->rxqs)[i]);
4753 * DPDK callback to retrieve physical link information (unlocked version).
4756 * Pointer to Ethernet device structure.
4757 * @param wait_to_complete
4758 * Wait for request completion (ignored).
4761 mlx4_link_update_unlocked(struct rte_eth_dev *dev, int wait_to_complete)
4763 struct priv *priv = mlx4_get_priv(dev);
4764 struct ethtool_cmd edata = {
4768 struct rte_eth_link dev_link;
4773 (void)wait_to_complete;
4774 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4775 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4778 memset(&dev_link, 0, sizeof(dev_link));
4779 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4780 (ifr.ifr_flags & IFF_RUNNING));
4781 ifr.ifr_data = (void *)&edata;
4782 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4783 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4787 link_speed = ethtool_cmd_speed(&edata);
4788 if (link_speed == -1)
4789 dev_link.link_speed = 0;
4791 dev_link.link_speed = link_speed;
4792 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4793 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4794 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4795 ETH_LINK_SPEED_FIXED);
4796 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4797 /* Link status changed. */
4798 dev->data->dev_link = dev_link;
4801 /* Link status is still the same. */
4806 * DPDK callback to retrieve physical link information.
4809 * Pointer to Ethernet device structure.
4810 * @param wait_to_complete
4811 * Wait for request completion (ignored).
4814 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4816 struct priv *priv = mlx4_get_priv(dev);
4822 ret = mlx4_link_update_unlocked(dev, wait_to_complete);
4828 * DPDK callback to change the MTU.
4830 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4831 * received). Use this as a hint to enable/disable scattered packets support
4832 * and improve performance when not needed.
4833 * Since failure is not an option, reconfiguring queues on the fly is not
4837 * Pointer to Ethernet device structure.
4842 * 0 on success, negative errno value on failure.
4845 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4847 struct priv *priv = dev->data->dev_private;
4850 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4853 if (mlx4_is_secondary())
4854 return -E_RTE_SECONDARY;
4856 /* Set kernel interface MTU first. */
4857 if (priv_set_mtu(priv, mtu)) {
4859 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4863 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4865 /* Temporarily replace RX handler with a fake one, assuming it has not
4866 * been copied elsewhere. */
4867 dev->rx_pkt_burst = removed_rx_burst;
4868 /* Make sure everyone has left mlx4_rx_burst() and uses
4869 * removed_rx_burst() instead. */
4872 /* Reconfigure each RX queue. */
4873 for (i = 0; (i != priv->rxqs_n); ++i) {
4874 struct rxq *rxq = (*priv->rxqs)[i];
4875 unsigned int max_frame_len;
4880 /* Calculate new maximum frame length according to MTU and
4881 * toggle scattered support (sp) if necessary. */
4882 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4883 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4884 sp = (max_frame_len > (rxq->mb_len - RTE_PKTMBUF_HEADROOM));
4885 /* Provide new values to rxq_setup(). */
4886 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4887 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4888 ret = rxq_rehash(dev, rxq);
4890 /* Force SP RX if that queue requires it and abort. */
4892 rx_func = mlx4_rx_burst_sp;
4895 /* Reenable non-RSS queue attributes. No need to check
4896 * for errors at this stage. */
4898 rxq_mac_addrs_add(rxq);
4900 rxq_promiscuous_enable(rxq);
4902 rxq_allmulticast_enable(rxq);
4904 /* Scattered burst function takes priority. */
4906 rx_func = mlx4_rx_burst_sp;
4908 /* Burst functions can now be called again. */
4910 dev->rx_pkt_burst = rx_func;
4918 * DPDK callback to get flow control status.
4921 * Pointer to Ethernet device structure.
4922 * @param[out] fc_conf
4923 * Flow control output buffer.
4926 * 0 on success, negative errno value on failure.
4929 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4931 struct priv *priv = dev->data->dev_private;
4933 struct ethtool_pauseparam ethpause = {
4934 .cmd = ETHTOOL_GPAUSEPARAM
4938 if (mlx4_is_secondary())
4939 return -E_RTE_SECONDARY;
4940 ifr.ifr_data = (void *)ðpause;
4942 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4944 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4950 fc_conf->autoneg = ethpause.autoneg;
4951 if (ethpause.rx_pause && ethpause.tx_pause)
4952 fc_conf->mode = RTE_FC_FULL;
4953 else if (ethpause.rx_pause)
4954 fc_conf->mode = RTE_FC_RX_PAUSE;
4955 else if (ethpause.tx_pause)
4956 fc_conf->mode = RTE_FC_TX_PAUSE;
4958 fc_conf->mode = RTE_FC_NONE;
4968 * DPDK callback to modify flow control parameters.
4971 * Pointer to Ethernet device structure.
4972 * @param[in] fc_conf
4973 * Flow control parameters.
4976 * 0 on success, negative errno value on failure.
4979 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4981 struct priv *priv = dev->data->dev_private;
4983 struct ethtool_pauseparam ethpause = {
4984 .cmd = ETHTOOL_SPAUSEPARAM
4988 if (mlx4_is_secondary())
4989 return -E_RTE_SECONDARY;
4990 ifr.ifr_data = (void *)ðpause;
4991 ethpause.autoneg = fc_conf->autoneg;
4992 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4993 (fc_conf->mode & RTE_FC_RX_PAUSE))
4994 ethpause.rx_pause = 1;
4996 ethpause.rx_pause = 0;
4998 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4999 (fc_conf->mode & RTE_FC_TX_PAUSE))
5000 ethpause.tx_pause = 1;
5002 ethpause.tx_pause = 0;
5005 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
5007 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
5021 * Configure a VLAN filter.
5024 * Pointer to Ethernet device structure.
5026 * VLAN ID to filter.
5031 * 0 on success, errno value on failure.
5034 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5036 struct priv *priv = dev->data->dev_private;
5038 unsigned int j = -1;
5040 DEBUG("%p: %s VLAN filter ID %" PRIu16,
5041 (void *)dev, (on ? "enable" : "disable"), vlan_id);
5042 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
5043 if (!priv->vlan_filter[i].enabled) {
5044 /* Unused index, remember it. */
5048 if (priv->vlan_filter[i].id != vlan_id)
5050 /* This VLAN ID is already known, use its index. */
5054 /* Check if there's room for another VLAN filter. */
5055 if (j == (unsigned int)-1)
5058 * VLAN filters apply to all configured MAC addresses, flow
5059 * specifications must be reconfigured accordingly.
5061 priv->vlan_filter[j].id = vlan_id;
5062 if ((on) && (!priv->vlan_filter[j].enabled)) {
5064 * Filter is disabled, enable it.
5065 * Rehashing flows in all RX queues is necessary.
5068 rxq_mac_addrs_del(&priv->rxq_parent);
5070 for (i = 0; (i != priv->rxqs_n); ++i)
5071 if ((*priv->rxqs)[i] != NULL)
5072 rxq_mac_addrs_del((*priv->rxqs)[i]);
5073 priv->vlan_filter[j].enabled = 1;
5074 if (priv->started) {
5076 rxq_mac_addrs_add(&priv->rxq_parent);
5078 for (i = 0; (i != priv->rxqs_n); ++i) {
5079 if ((*priv->rxqs)[i] == NULL)
5081 rxq_mac_addrs_add((*priv->rxqs)[i]);
5084 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
5086 * Filter is enabled, disable it.
5087 * Rehashing flows in all RX queues is necessary.
5090 rxq_mac_addrs_del(&priv->rxq_parent);
5092 for (i = 0; (i != priv->rxqs_n); ++i)
5093 if ((*priv->rxqs)[i] != NULL)
5094 rxq_mac_addrs_del((*priv->rxqs)[i]);
5095 priv->vlan_filter[j].enabled = 0;
5096 if (priv->started) {
5098 rxq_mac_addrs_add(&priv->rxq_parent);
5100 for (i = 0; (i != priv->rxqs_n); ++i) {
5101 if ((*priv->rxqs)[i] == NULL)
5103 rxq_mac_addrs_add((*priv->rxqs)[i]);
5111 * DPDK callback to configure a VLAN filter.
5114 * Pointer to Ethernet device structure.
5116 * VLAN ID to filter.
5121 * 0 on success, negative errno value on failure.
5124 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5126 struct priv *priv = dev->data->dev_private;
5129 if (mlx4_is_secondary())
5130 return -E_RTE_SECONDARY;
5132 ret = vlan_filter_set(dev, vlan_id, on);
5138 static const struct eth_dev_ops mlx4_dev_ops = {
5139 .dev_configure = mlx4_dev_configure,
5140 .dev_start = mlx4_dev_start,
5141 .dev_stop = mlx4_dev_stop,
5142 .dev_close = mlx4_dev_close,
5143 .promiscuous_enable = mlx4_promiscuous_enable,
5144 .promiscuous_disable = mlx4_promiscuous_disable,
5145 .allmulticast_enable = mlx4_allmulticast_enable,
5146 .allmulticast_disable = mlx4_allmulticast_disable,
5147 .link_update = mlx4_link_update,
5148 .stats_get = mlx4_stats_get,
5149 .stats_reset = mlx4_stats_reset,
5150 .queue_stats_mapping_set = NULL,
5151 .dev_infos_get = mlx4_dev_infos_get,
5152 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5153 .vlan_filter_set = mlx4_vlan_filter_set,
5154 .vlan_tpid_set = NULL,
5155 .vlan_strip_queue_set = NULL,
5156 .vlan_offload_set = NULL,
5157 .rx_queue_setup = mlx4_rx_queue_setup,
5158 .tx_queue_setup = mlx4_tx_queue_setup,
5159 .rx_queue_release = mlx4_rx_queue_release,
5160 .tx_queue_release = mlx4_tx_queue_release,
5162 .dev_led_off = NULL,
5163 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5164 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5165 .priority_flow_ctrl_set = NULL,
5166 .mac_addr_remove = mlx4_mac_addr_remove,
5167 .mac_addr_add = mlx4_mac_addr_add,
5168 .mac_addr_set = mlx4_mac_addr_set,
5169 .mtu_set = mlx4_dev_set_mtu,
5173 * Get PCI information from struct ibv_device.
5176 * Pointer to Ethernet device structure.
5177 * @param[out] pci_addr
5178 * PCI bus address output buffer.
5181 * 0 on success, -1 on failure and errno is set.
5184 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5185 struct rte_pci_addr *pci_addr)
5189 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5191 file = fopen(path, "rb");
5194 while (fgets(line, sizeof(line), file) == line) {
5195 size_t len = strlen(line);
5198 /* Truncate long lines. */
5199 if (len == (sizeof(line) - 1))
5200 while (line[(len - 1)] != '\n') {
5204 line[(len - 1)] = ret;
5206 /* Extract information. */
5209 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5213 &pci_addr->function) == 4) {
5223 * Get MAC address by querying netdevice.
5226 * struct priv for the requested device.
5228 * MAC address output buffer.
5231 * 0 on success, -1 on failure and errno is set.
5234 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5236 struct ifreq request;
5238 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5240 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5244 /* Support up to 32 adapters. */
5246 struct rte_pci_addr pci_addr; /* associated PCI address */
5247 uint32_t ports; /* physical ports bitfield. */
5251 * Get device index in mlx4_dev[] from PCI bus address.
5253 * @param[in] pci_addr
5254 * PCI bus address to look for.
5257 * mlx4_dev[] index on success, -1 on failure.
5260 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5265 assert(pci_addr != NULL);
5266 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5267 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5268 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5269 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5270 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5272 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5279 * Retrieve integer value from environment variable.
5282 * Environment variable name.
5285 * Integer value, 0 if the variable is not set.
5288 mlx4_getenv_int(const char *name)
5290 const char *val = getenv(name);
5298 mlx4_dev_link_status_handler(void *);
5300 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5303 * Link status handler.
5306 * Pointer to private structure.
5308 * Pointer to the rte_eth_dev structure.
5311 * Nonzero if the callback process can be called immediately.
5314 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5316 struct ibv_async_event event;
5317 int port_change = 0;
5320 /* Read all message and acknowledge them. */
5322 if (ibv_get_async_event(priv->ctx, &event))
5325 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5326 event.event_type == IBV_EVENT_PORT_ERR)
5329 DEBUG("event type %d on port %d not handled",
5330 event.event_type, event.element.port_num);
5331 ibv_ack_async_event(&event);
5334 if (port_change ^ priv->pending_alarm) {
5335 struct rte_eth_link *link = &dev->data->dev_link;
5337 priv->pending_alarm = 0;
5338 mlx4_link_update_unlocked(dev, 0);
5339 if (((link->link_speed == 0) && link->link_status) ||
5340 ((link->link_speed != 0) && !link->link_status)) {
5341 /* Inconsistent status, check again later. */
5342 priv->pending_alarm = 1;
5343 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5344 mlx4_dev_link_status_handler,
5353 * Handle delayed link status event.
5356 * Registered argument.
5359 mlx4_dev_link_status_handler(void *arg)
5361 struct rte_eth_dev *dev = arg;
5362 struct priv *priv = dev->data->dev_private;
5366 assert(priv->pending_alarm == 1);
5367 ret = priv_dev_link_status_handler(priv, dev);
5370 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5374 * Handle interrupts from the NIC.
5376 * @param[in] intr_handle
5377 * Interrupt handler.
5379 * Callback argument.
5382 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5384 struct rte_eth_dev *dev = cb_arg;
5385 struct priv *priv = dev->data->dev_private;
5390 ret = priv_dev_link_status_handler(priv, dev);
5393 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5397 * Uninstall interrupt handler.
5400 * Pointer to private structure.
5402 * Pointer to the rte_eth_dev structure.
5405 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5407 if (!dev->data->dev_conf.intr_conf.lsc)
5409 rte_intr_callback_unregister(&priv->intr_handle,
5410 mlx4_dev_interrupt_handler,
5412 if (priv->pending_alarm)
5413 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5414 priv->pending_alarm = 0;
5415 priv->intr_handle.fd = 0;
5416 priv->intr_handle.type = 0;
5420 * Install interrupt handler.
5423 * Pointer to private structure.
5425 * Pointer to the rte_eth_dev structure.
5428 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5432 if (!dev->data->dev_conf.intr_conf.lsc)
5434 assert(priv->ctx->async_fd > 0);
5435 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5436 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5438 INFO("failed to change file descriptor async event queue");
5439 dev->data->dev_conf.intr_conf.lsc = 0;
5441 priv->intr_handle.fd = priv->ctx->async_fd;
5442 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5443 rte_intr_callback_register(&priv->intr_handle,
5444 mlx4_dev_interrupt_handler,
5449 static struct eth_driver mlx4_driver;
5452 * DPDK callback to register a PCI device.
5454 * This function creates an Ethernet device for each port of a given
5457 * @param[in] pci_drv
5458 * PCI driver structure (mlx4_driver).
5459 * @param[in] pci_dev
5460 * PCI device information.
5463 * 0 on success, negative errno value on failure.
5466 mlx4_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5468 struct ibv_device **list;
5469 struct ibv_device *ibv_dev;
5471 struct ibv_context *attr_ctx = NULL;
5472 struct ibv_device_attr device_attr;
5478 assert(pci_drv == &mlx4_driver.pci_drv);
5479 /* Get mlx4_dev[] index. */
5480 idx = mlx4_dev_idx(&pci_dev->addr);
5482 ERROR("this driver cannot support any more adapters");
5485 DEBUG("using driver device index %d", idx);
5487 /* Save PCI address. */
5488 mlx4_dev[idx].pci_addr = pci_dev->addr;
5489 list = ibv_get_device_list(&i);
5492 if (errno == ENOSYS) {
5493 WARN("cannot list devices, is ib_uverbs loaded?");
5500 * For each listed device, check related sysfs entry against
5501 * the provided PCI ID.
5504 struct rte_pci_addr pci_addr;
5507 DEBUG("checking device \"%s\"", list[i]->name);
5508 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5510 if ((pci_dev->addr.domain != pci_addr.domain) ||
5511 (pci_dev->addr.bus != pci_addr.bus) ||
5512 (pci_dev->addr.devid != pci_addr.devid) ||
5513 (pci_dev->addr.function != pci_addr.function))
5515 vf = (pci_dev->id.device_id ==
5516 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5517 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5518 list[i]->name, (vf ? "true" : "false"));
5519 attr_ctx = ibv_open_device(list[i]);
5523 if (attr_ctx == NULL) {
5524 ibv_free_device_list(list);
5527 WARN("cannot access device, is mlx4_ib loaded?");
5530 WARN("cannot use device, are drivers up to date?");
5538 DEBUG("device opened");
5539 if (ibv_query_device(attr_ctx, &device_attr))
5541 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5543 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5544 uint32_t port = i + 1; /* ports are indexed from one */
5545 uint32_t test = (1 << i);
5546 struct ibv_context *ctx = NULL;
5547 struct ibv_port_attr port_attr;
5548 struct ibv_pd *pd = NULL;
5549 struct priv *priv = NULL;
5550 struct rte_eth_dev *eth_dev = NULL;
5551 #ifdef HAVE_EXP_QUERY_DEVICE
5552 struct ibv_exp_device_attr exp_device_attr;
5553 #endif /* HAVE_EXP_QUERY_DEVICE */
5554 struct ether_addr mac;
5556 #ifdef HAVE_EXP_QUERY_DEVICE
5557 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5559 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5560 #endif /* RSS_SUPPORT */
5561 #endif /* HAVE_EXP_QUERY_DEVICE */
5563 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5565 ctx = ibv_open_device(ibv_dev);
5569 /* Check port status. */
5570 err = ibv_query_port(ctx, port, &port_attr);
5572 ERROR("port query failed: %s", strerror(err));
5576 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5577 ERROR("port %d is not configured in Ethernet mode",
5582 if (port_attr.state != IBV_PORT_ACTIVE)
5583 DEBUG("port %d is not active: \"%s\" (%d)",
5584 port, ibv_port_state_str(port_attr.state),
5587 /* Allocate protection domain. */
5588 pd = ibv_alloc_pd(ctx);
5590 ERROR("PD allocation failure");
5595 mlx4_dev[idx].ports |= test;
5597 /* from rte_ethdev.c */
5598 priv = rte_zmalloc("ethdev private structure",
5600 RTE_CACHE_LINE_SIZE);
5602 ERROR("priv allocation failure");
5608 priv->device_attr = device_attr;
5611 priv->mtu = ETHER_MTU;
5612 #ifdef HAVE_EXP_QUERY_DEVICE
5613 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5614 ERROR("ibv_exp_query_device() failed");
5618 if ((exp_device_attr.exp_device_cap_flags &
5619 IBV_EXP_DEVICE_QPG) &&
5620 (exp_device_attr.exp_device_cap_flags &
5621 IBV_EXP_DEVICE_UD_RSS) &&
5622 (exp_device_attr.comp_mask &
5623 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5624 (exp_device_attr.max_rss_tbl_sz > 0)) {
5627 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5631 priv->max_rss_tbl_sz = 0;
5633 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5634 IBV_EXP_DEVICE_UD_TSS);
5635 DEBUG("device flags: %s%s%s",
5636 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5637 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5638 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5640 DEBUG("maximum RSS indirection table size: %u",
5641 exp_device_attr.max_rss_tbl_sz);
5642 #endif /* RSS_SUPPORT */
5645 ((exp_device_attr.exp_device_cap_flags &
5646 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5647 (exp_device_attr.exp_device_cap_flags &
5648 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5649 DEBUG("checksum offloading is %ssupported",
5650 (priv->hw_csum ? "" : "not "));
5652 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5653 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5654 DEBUG("L2 tunnel checksum offloads are %ssupported",
5655 (priv->hw_csum_l2tun ? "" : "not "));
5658 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5660 if (priv->inl_recv_size) {
5661 exp_device_attr.comp_mask =
5662 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5663 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5664 INFO("Couldn't query device for inline-receive"
5666 priv->inl_recv_size = 0;
5668 if ((unsigned)exp_device_attr.inline_recv_sz <
5669 priv->inl_recv_size) {
5670 INFO("Max inline-receive (%d) <"
5671 " requested inline-receive (%u)",
5672 exp_device_attr.inline_recv_sz,
5673 priv->inl_recv_size);
5674 priv->inl_recv_size =
5675 exp_device_attr.inline_recv_sz;
5678 INFO("Set inline receive size to %u",
5679 priv->inl_recv_size);
5681 #endif /* INLINE_RECV */
5682 #endif /* HAVE_EXP_QUERY_DEVICE */
5684 (void)mlx4_getenv_int;
5686 /* Configure the first MAC address by default. */
5687 if (priv_get_mac(priv, &mac.addr_bytes)) {
5688 ERROR("cannot get MAC address, is mlx4_en loaded?"
5689 " (errno: %s)", strerror(errno));
5692 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5694 mac.addr_bytes[0], mac.addr_bytes[1],
5695 mac.addr_bytes[2], mac.addr_bytes[3],
5696 mac.addr_bytes[4], mac.addr_bytes[5]);
5697 /* Register MAC and broadcast addresses. */
5698 claim_zero(priv_mac_addr_add(priv, 0,
5699 (const uint8_t (*)[ETHER_ADDR_LEN])
5701 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5702 &(const uint8_t [ETHER_ADDR_LEN])
5703 { "\xff\xff\xff\xff\xff\xff" }));
5706 char ifname[IF_NAMESIZE];
5708 if (priv_get_ifname(priv, &ifname) == 0)
5709 DEBUG("port %u ifname is \"%s\"",
5710 priv->port, ifname);
5712 DEBUG("port %u ifname is unknown", priv->port);
5715 /* Get actual MTU if possible. */
5716 priv_get_mtu(priv, &priv->mtu);
5717 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5719 /* from rte_ethdev.c */
5721 char name[RTE_ETH_NAME_MAX_LEN];
5723 snprintf(name, sizeof(name), "%s port %u",
5724 ibv_get_device_name(ibv_dev), port);
5725 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
5727 if (eth_dev == NULL) {
5728 ERROR("can not allocate rte ethdev");
5733 /* Secondary processes have to use local storage for their
5734 * private data as well as a copy of eth_dev->data, but this
5735 * pointer must not be modified before burst functions are
5736 * actually called. */
5737 if (mlx4_is_secondary()) {
5738 struct mlx4_secondary_data *sd =
5739 &mlx4_secondary_data[eth_dev->data->port_id];
5741 sd->primary_priv = eth_dev->data->dev_private;
5742 if (sd->primary_priv == NULL) {
5743 ERROR("no private data for port %u",
5744 eth_dev->data->port_id);
5748 sd->shared_dev_data = eth_dev->data;
5749 rte_spinlock_init(&sd->lock);
5750 memcpy(sd->data.name, sd->shared_dev_data->name,
5751 sizeof(sd->data.name));
5752 sd->data.dev_private = priv;
5753 sd->data.rx_mbuf_alloc_failed = 0;
5754 sd->data.mtu = ETHER_MTU;
5755 sd->data.port_id = sd->shared_dev_data->port_id;
5756 sd->data.mac_addrs = priv->mac;
5757 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5758 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5760 eth_dev->data->dev_private = priv;
5761 eth_dev->data->rx_mbuf_alloc_failed = 0;
5762 eth_dev->data->mtu = ETHER_MTU;
5763 eth_dev->data->mac_addrs = priv->mac;
5765 eth_dev->pci_dev = pci_dev;
5767 rte_eth_copy_pci_info(eth_dev, pci_dev);
5769 eth_dev->driver = &mlx4_driver;
5771 priv->dev = eth_dev;
5772 eth_dev->dev_ops = &mlx4_dev_ops;
5773 TAILQ_INIT(ð_dev->link_intr_cbs);
5775 /* Bring Ethernet device up. */
5776 DEBUG("forcing Ethernet interface up");
5777 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5783 claim_zero(ibv_dealloc_pd(pd));
5785 claim_zero(ibv_close_device(ctx));
5787 rte_eth_dev_release_port(eth_dev);
5792 * XXX if something went wrong in the loop above, there is a resource
5793 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5794 * long as the dpdk does not provide a way to deallocate a ethdev and a
5795 * way to enumerate the registered ethdevs to free the previous ones.
5798 /* no port found, complain */
5799 if (!mlx4_dev[idx].ports) {
5806 claim_zero(ibv_close_device(attr_ctx));
5808 ibv_free_device_list(list);
5813 static const struct rte_pci_id mlx4_pci_id_map[] = {
5815 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5816 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3,
5817 .subsystem_vendor_id = PCI_ANY_ID,
5818 .subsystem_device_id = PCI_ANY_ID
5821 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5822 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO,
5823 .subsystem_vendor_id = PCI_ANY_ID,
5824 .subsystem_device_id = PCI_ANY_ID
5827 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5828 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3VF,
5829 .subsystem_vendor_id = PCI_ANY_ID,
5830 .subsystem_device_id = PCI_ANY_ID
5837 static struct eth_driver mlx4_driver = {
5839 .name = MLX4_DRIVER_NAME,
5840 .id_table = mlx4_pci_id_map,
5841 .devinit = mlx4_pci_devinit,
5842 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5844 .dev_private_size = sizeof(struct priv)
5848 * Driver initialization routine.
5851 rte_mlx4_pmd_init(const char *name, const char *args)
5856 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5858 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5859 * huge pages. Calling ibv_fork_init() during init allows
5860 * applications to use fork() safely for purposes other than
5861 * using this PMD, which is not supported in forked processes.
5863 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5865 rte_eal_pci_register(&mlx4_driver.pci_drv);
5869 static struct rte_driver rte_mlx4_driver = {
5871 .name = MLX4_DRIVER_NAME,
5872 .init = rte_mlx4_pmd_init,
5875 PMD_REGISTER_DRIVER(rte_mlx4_driver)