4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
57 #include <linux/ethtool.h>
58 #include <linux/sockios.h>
61 #include <rte_ether.h>
62 #include <rte_ethdev.h>
63 #include <rte_ethdev_pci.h>
66 #include <rte_errno.h>
67 #include <rte_mempool.h>
68 #include <rte_prefetch.h>
69 #include <rte_malloc.h>
70 #include <rte_spinlock.h>
71 #include <rte_atomic.h>
72 #include <rte_version.h>
74 #include <rte_alarm.h>
75 #include <rte_memory.h>
77 #include <rte_kvargs.h>
78 #include <rte_interrupts.h>
80 /* Generated configuration header. */
81 #include "mlx4_autoconf.h"
85 #include "mlx4_flow.h"
87 /* Convenience macros for accessing mbuf fields. */
88 #define NEXT(m) ((m)->next)
89 #define DATA_LEN(m) ((m)->data_len)
90 #define PKT_LEN(m) ((m)->pkt_len)
91 #define DATA_OFF(m) ((m)->data_off)
92 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
93 #define NB_SEGS(m) ((m)->nb_segs)
94 #define PORT(m) ((m)->port)
96 /* Work Request ID data type (64 bit). */
105 #define WR_ID(o) (((wr_id_t *)&(o))->data)
107 /* Transpose flags. Useful to convert IBV to DPDK flags. */
108 #define TRANSPOSE(val, from, to) \
109 (((from) >= (to)) ? \
110 (((val) & (from)) / ((from) / (to))) : \
111 (((val) & (from)) * ((to) / (from))))
113 /* Local storage for secondary process data. */
114 struct mlx4_secondary_data {
115 struct rte_eth_dev_data data; /* Local device data. */
116 struct priv *primary_priv; /* Private structure from primary. */
117 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
118 rte_spinlock_t lock; /* Port configuration lock. */
119 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
121 /** Configuration structure for device arguments. */
124 uint32_t present; /**< Bit-field for existing ports. */
125 uint32_t enabled; /**< Bit-field for user-enabled ports. */
129 /* Available parameters list. */
130 const char *pmd_mlx4_init_params[] = {
136 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
139 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
142 priv_rx_intr_vec_enable(struct priv *priv);
145 priv_rx_intr_vec_disable(struct priv *priv);
148 * Check if running as a secondary process.
151 * Nonzero if running as a secondary process.
154 mlx4_is_secondary(void)
156 return rte_eal_process_type() != RTE_PROC_PRIMARY;
160 * Return private structure associated with an Ethernet device.
163 * Pointer to Ethernet device structure.
166 * Pointer to private structure.
169 mlx4_get_priv(struct rte_eth_dev *dev)
171 struct mlx4_secondary_data *sd;
173 if (!mlx4_is_secondary())
174 return dev->data->dev_private;
175 sd = &mlx4_secondary_data[dev->data->port_id];
176 return sd->data.dev_private;
180 * Lock private structure to protect it from concurrent access in the
184 * Pointer to private structure.
186 void priv_lock(struct priv *priv)
188 rte_spinlock_lock(&priv->lock);
192 * Unlock private structure.
195 * Pointer to private structure.
197 void priv_unlock(struct priv *priv)
199 rte_spinlock_unlock(&priv->lock);
202 /* Allocate a buffer on the stack and fill it with a printf format string. */
203 #define MKSTR(name, ...) \
204 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
206 snprintf(name, sizeof(name), __VA_ARGS__)
209 * Get interface name from private structure.
212 * Pointer to private structure.
214 * Interface name output buffer.
217 * 0 on success, -1 on failure and errno is set.
220 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
224 unsigned int dev_type = 0;
225 unsigned int dev_port_prev = ~0u;
226 char match[IF_NAMESIZE] = "";
229 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
235 while ((dent = readdir(dir)) != NULL) {
236 char *name = dent->d_name;
238 unsigned int dev_port;
241 if ((name[0] == '.') &&
242 ((name[1] == '\0') ||
243 ((name[1] == '.') && (name[2] == '\0'))))
246 MKSTR(path, "%s/device/net/%s/%s",
247 priv->ctx->device->ibdev_path, name,
248 (dev_type ? "dev_id" : "dev_port"));
250 file = fopen(path, "rb");
255 * Switch to dev_id when dev_port does not exist as
256 * is the case with Linux kernel versions < 3.15.
267 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
272 * Switch to dev_id when dev_port returns the same value for
273 * all ports. May happen when using a MOFED release older than
274 * 3.0 with a Linux kernel >= 3.15.
276 if (dev_port == dev_port_prev)
278 dev_port_prev = dev_port;
279 if (dev_port == (priv->port - 1u))
280 snprintf(match, sizeof(match), "%s", name);
283 if (match[0] == '\0')
285 strncpy(*ifname, match, sizeof(*ifname));
290 * Read from sysfs entry.
293 * Pointer to private structure.
295 * Entry name relative to sysfs path.
297 * Data output buffer.
302 * 0 on success, -1 on failure and errno is set.
305 priv_sysfs_read(const struct priv *priv, const char *entry,
306 char *buf, size_t size)
308 char ifname[IF_NAMESIZE];
313 if (priv_get_ifname(priv, &ifname))
316 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
319 file = fopen(path, "rb");
322 ret = fread(buf, 1, size, file);
324 if (((size_t)ret < size) && (ferror(file)))
334 * Write to sysfs entry.
337 * Pointer to private structure.
339 * Entry name relative to sysfs path.
346 * 0 on success, -1 on failure and errno is set.
349 priv_sysfs_write(const struct priv *priv, const char *entry,
350 char *buf, size_t size)
352 char ifname[IF_NAMESIZE];
357 if (priv_get_ifname(priv, &ifname))
360 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
363 file = fopen(path, "wb");
366 ret = fwrite(buf, 1, size, file);
368 if (((size_t)ret < size) || (ferror(file)))
378 * Get unsigned long sysfs property.
381 * Pointer to private structure.
383 * Entry name relative to sysfs path.
385 * Value output buffer.
388 * 0 on success, -1 on failure and errno is set.
391 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
394 unsigned long value_ret;
397 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
399 DEBUG("cannot read %s value from sysfs: %s",
400 name, strerror(errno));
403 value_str[ret] = '\0';
405 value_ret = strtoul(value_str, NULL, 0);
407 DEBUG("invalid %s value `%s': %s", name, value_str,
416 * Set unsigned long sysfs property.
419 * Pointer to private structure.
421 * Entry name relative to sysfs path.
426 * 0 on success, -1 on failure and errno is set.
429 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
432 MKSTR(value_str, "%lu", value);
434 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
436 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
437 name, value_str, value, strerror(errno));
444 * Perform ifreq ioctl() on associated Ethernet device.
447 * Pointer to private structure.
449 * Request number to pass to ioctl().
451 * Interface request structure output buffer.
454 * 0 on success, -1 on failure and errno is set.
457 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
459 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
464 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
465 ret = ioctl(sock, req, ifr);
474 * Pointer to private structure.
476 * MTU value output buffer.
479 * 0 on success, -1 on failure and errno is set.
482 priv_get_mtu(struct priv *priv, uint16_t *mtu)
484 unsigned long ulong_mtu;
486 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
496 * Pointer to private structure.
501 * 0 on success, -1 on failure and errno is set.
504 priv_set_mtu(struct priv *priv, uint16_t mtu)
508 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
509 priv_get_mtu(priv, &new_mtu))
521 * Pointer to private structure.
523 * Bitmask for flags that must remain untouched.
525 * Bitmask for flags to modify.
528 * 0 on success, -1 on failure and errno is set.
531 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
535 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
538 tmp |= (flags & (~keep));
539 return priv_set_sysfs_ulong(priv, "flags", tmp);
542 /* Device configuration. */
545 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
546 unsigned int socket, const struct rte_eth_txconf *conf);
549 txq_cleanup(struct txq *txq);
552 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
553 unsigned int socket, int inactive,
554 const struct rte_eth_rxconf *conf,
555 struct rte_mempool *mp, int children_n,
556 struct rxq *rxq_parent);
559 rxq_cleanup(struct rxq *rxq);
562 * Create RSS parent queue.
564 * The new parent is inserted in front of the list in the private structure.
567 * Pointer to private structure.
569 * Queues indices array, if NULL use all Rx queues.
571 * The number of entries in queues[].
574 * Pointer to a parent rxq structure, NULL on failure.
577 priv_parent_create(struct priv *priv,
585 parent = rte_zmalloc("parent queue",
587 RTE_CACHE_LINE_SIZE);
589 ERROR("cannot allocate memory for RSS parent queue");
592 ret = rxq_setup(priv->dev, parent, 0, 0, 0,
593 NULL, NULL, children_n, NULL);
598 parent->rss.queues_n = children_n;
600 for (i = 0; i < children_n; ++i)
601 parent->rss.queues[i] = queues[i];
603 /* the default RSS ring case */
604 assert(priv->rxqs_n == children_n);
605 for (i = 0; i < priv->rxqs_n; ++i)
606 parent->rss.queues[i] = i;
608 LIST_INSERT_HEAD(&priv->parents, parent, next);
613 * Clean up RX queue parent structure.
616 * RX queue parent structure.
619 rxq_parent_cleanup(struct rxq *parent)
621 LIST_REMOVE(parent, next);
627 * Clean up parent structures from the parent list.
630 * Pointer to private structure.
633 priv_parent_list_cleanup(struct priv *priv)
635 while (!LIST_EMPTY(&priv->parents))
636 rxq_parent_cleanup(LIST_FIRST(&priv->parents));
640 * Ethernet device configuration.
642 * Prepare the driver for a given number of TX and RX queues.
643 * Allocate parent RSS queue when several RX queues are requested.
646 * Pointer to Ethernet device structure.
649 * 0 on success, errno value on failure.
652 dev_configure(struct rte_eth_dev *dev)
654 struct priv *priv = dev->data->dev_private;
655 unsigned int rxqs_n = dev->data->nb_rx_queues;
656 unsigned int txqs_n = dev->data->nb_tx_queues;
659 priv->rxqs = (void *)dev->data->rx_queues;
660 priv->txqs = (void *)dev->data->tx_queues;
661 if (txqs_n != priv->txqs_n) {
662 INFO("%p: TX queues number update: %u -> %u",
663 (void *)dev, priv->txqs_n, txqs_n);
664 priv->txqs_n = txqs_n;
666 if (rxqs_n == priv->rxqs_n)
668 if (!rte_is_power_of_2(rxqs_n) && !priv->isolated) {
671 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
672 WARN("%p: number of RX queues must be a power"
673 " of 2: %u queues among %u will be active",
674 (void *)dev, n_active, rxqs_n);
677 INFO("%p: RX queues number update: %u -> %u",
678 (void *)dev, priv->rxqs_n, rxqs_n);
679 /* If RSS is enabled, disable it first. */
683 /* Only if there are no remaining child RX queues. */
684 for (i = 0; (i != priv->rxqs_n); ++i)
685 if ((*priv->rxqs)[i] != NULL)
687 priv_parent_list_cleanup(priv);
692 /* Nothing else to do. */
693 priv->rxqs_n = rxqs_n;
696 /* Allocate a new RSS parent queue if supported by hardware. */
698 ERROR("%p: only a single RX queue can be configured when"
699 " hardware doesn't support RSS",
703 /* Fail if hardware doesn't support that many RSS queues. */
704 if (rxqs_n >= priv->max_rss_tbl_sz) {
705 ERROR("%p: only %u RX queues can be configured for RSS",
706 (void *)dev, priv->max_rss_tbl_sz);
711 priv->rxqs_n = rxqs_n;
714 if (priv_parent_create(priv, NULL, priv->rxqs_n))
716 /* Failure, rollback. */
723 * DPDK callback for Ethernet device configuration.
726 * Pointer to Ethernet device structure.
729 * 0 on success, negative errno value on failure.
732 mlx4_dev_configure(struct rte_eth_dev *dev)
734 struct priv *priv = dev->data->dev_private;
737 if (mlx4_is_secondary())
738 return -E_RTE_SECONDARY;
740 ret = dev_configure(dev);
746 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
747 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
750 * Configure secondary process queues from a private data pointer (primary
751 * or secondary) and update burst callbacks. Can take place only once.
753 * All queues must have been previously created by the primary process to
754 * avoid undefined behavior.
757 * Private data pointer from either primary or secondary process.
760 * Private data pointer from secondary process, NULL in case of error.
763 mlx4_secondary_data_setup(struct priv *priv)
765 unsigned int port_id = 0;
766 struct mlx4_secondary_data *sd;
769 unsigned int nb_tx_queues;
770 unsigned int nb_rx_queues;
773 /* priv must be valid at this point. */
774 assert(priv != NULL);
775 /* priv->dev must also be valid but may point to local memory from
776 * another process, possibly with the same address and must not
777 * be dereferenced yet. */
778 assert(priv->dev != NULL);
779 /* Determine port ID by finding out where priv comes from. */
781 sd = &mlx4_secondary_data[port_id];
782 rte_spinlock_lock(&sd->lock);
783 /* Primary process? */
784 if (sd->primary_priv == priv)
786 /* Secondary process? */
787 if (sd->data.dev_private == priv)
789 rte_spinlock_unlock(&sd->lock);
790 if (++port_id == RTE_DIM(mlx4_secondary_data))
793 /* Switch to secondary private structure. If private data has already
794 * been updated by another thread, there is nothing else to do. */
795 priv = sd->data.dev_private;
796 if (priv->dev->data == &sd->data)
798 /* Sanity checks. Secondary private structure is supposed to point
799 * to local eth_dev, itself still pointing to the shared device data
800 * structure allocated by the primary process. */
801 assert(sd->shared_dev_data != &sd->data);
802 assert(sd->data.nb_tx_queues == 0);
803 assert(sd->data.tx_queues == NULL);
804 assert(sd->data.nb_rx_queues == 0);
805 assert(sd->data.rx_queues == NULL);
806 assert(priv != sd->primary_priv);
807 assert(priv->dev->data == sd->shared_dev_data);
808 assert(priv->txqs_n == 0);
809 assert(priv->txqs == NULL);
810 assert(priv->rxqs_n == 0);
811 assert(priv->rxqs == NULL);
812 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
813 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
814 /* Allocate local storage for queues. */
815 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
816 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
817 RTE_CACHE_LINE_SIZE);
818 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
819 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
820 RTE_CACHE_LINE_SIZE);
821 if (tx_queues == NULL || rx_queues == NULL)
823 /* Lock to prevent control operations during setup. */
826 for (i = 0; i != nb_tx_queues; ++i) {
827 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
830 if (primary_txq == NULL)
832 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
833 primary_txq->socket);
835 if (txq_setup(priv->dev,
837 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
840 txq->stats.idx = primary_txq->stats.idx;
847 txq = tx_queues[--i];
854 for (i = 0; i != nb_rx_queues; ++i) {
855 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
857 if (primary_rxq == NULL)
859 /* Not supported yet. */
862 /* Update everything. */
863 priv->txqs = (void *)tx_queues;
864 priv->txqs_n = nb_tx_queues;
865 priv->rxqs = (void *)rx_queues;
866 priv->rxqs_n = nb_rx_queues;
867 sd->data.rx_queues = rx_queues;
868 sd->data.tx_queues = tx_queues;
869 sd->data.nb_rx_queues = nb_rx_queues;
870 sd->data.nb_tx_queues = nb_tx_queues;
871 sd->data.dev_link = sd->shared_dev_data->dev_link;
872 sd->data.mtu = sd->shared_dev_data->mtu;
873 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
874 sizeof(sd->data.rx_queue_state));
875 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
876 sizeof(sd->data.tx_queue_state));
877 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
878 /* Use local data from now on. */
880 priv->dev->data = &sd->data;
882 priv->dev->tx_pkt_burst = mlx4_tx_burst;
883 priv->dev->rx_pkt_burst = removed_rx_burst;
886 /* More sanity checks. */
887 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
888 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
889 assert(priv->dev->data == &sd->data);
890 rte_spinlock_unlock(&sd->lock);
896 rte_spinlock_unlock(&sd->lock);
900 /* TX queues handling. */
903 * Allocate TX queue elements.
906 * Pointer to TX queue structure.
908 * Number of elements to allocate.
911 * 0 on success, errno value on failure.
914 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
917 struct txq_elt (*elts)[elts_n] =
918 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
919 linear_t (*elts_linear)[elts_n] =
920 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
922 struct ibv_mr *mr_linear = NULL;
925 if ((elts == NULL) || (elts_linear == NULL)) {
926 ERROR("%p: can't allocate packets array", (void *)txq);
931 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
932 IBV_ACCESS_LOCAL_WRITE);
933 if (mr_linear == NULL) {
934 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
939 for (i = 0; (i != elts_n); ++i) {
940 struct txq_elt *elt = &(*elts)[i];
944 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
945 txq->elts_n = elts_n;
950 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
951 * at least 4 times per ring. */
952 txq->elts_comp_cd_init =
953 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
954 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
955 txq->elts_comp_cd = txq->elts_comp_cd_init;
956 txq->elts_linear = elts_linear;
957 txq->mr_linear = mr_linear;
961 if (mr_linear != NULL)
962 claim_zero(ibv_dereg_mr(mr_linear));
964 rte_free(elts_linear);
967 DEBUG("%p: failed, freed everything", (void *)txq);
973 * Free TX queue elements.
976 * Pointer to TX queue structure.
979 txq_free_elts(struct txq *txq)
981 unsigned int elts_n = txq->elts_n;
982 unsigned int elts_head = txq->elts_head;
983 unsigned int elts_tail = txq->elts_tail;
984 struct txq_elt (*elts)[elts_n] = txq->elts;
985 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
986 struct ibv_mr *mr_linear = txq->mr_linear;
988 DEBUG("%p: freeing WRs", (void *)txq);
993 txq->elts_comp_cd = 0;
994 txq->elts_comp_cd_init = 0;
996 txq->elts_linear = NULL;
997 txq->mr_linear = NULL;
998 if (mr_linear != NULL)
999 claim_zero(ibv_dereg_mr(mr_linear));
1001 rte_free(elts_linear);
1004 while (elts_tail != elts_head) {
1005 struct txq_elt *elt = &(*elts)[elts_tail];
1007 assert(elt->buf != NULL);
1008 rte_pktmbuf_free(elt->buf);
1011 memset(elt, 0x77, sizeof(*elt));
1013 if (++elts_tail == elts_n)
1021 * Clean up a TX queue.
1023 * Destroy objects, free allocated memory and reset the structure for reuse.
1026 * Pointer to TX queue structure.
1029 txq_cleanup(struct txq *txq)
1031 struct ibv_exp_release_intf_params params;
1034 DEBUG("cleaning up %p", (void *)txq);
1036 if (txq->if_qp != NULL) {
1037 assert(txq->priv != NULL);
1038 assert(txq->priv->ctx != NULL);
1039 assert(txq->qp != NULL);
1040 params = (struct ibv_exp_release_intf_params){
1043 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1047 if (txq->if_cq != NULL) {
1048 assert(txq->priv != NULL);
1049 assert(txq->priv->ctx != NULL);
1050 assert(txq->cq != NULL);
1051 params = (struct ibv_exp_release_intf_params){
1054 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1058 if (txq->qp != NULL)
1059 claim_zero(ibv_destroy_qp(txq->qp));
1060 if (txq->cq != NULL)
1061 claim_zero(ibv_destroy_cq(txq->cq));
1062 if (txq->rd != NULL) {
1063 struct ibv_exp_destroy_res_domain_attr attr = {
1067 assert(txq->priv != NULL);
1068 assert(txq->priv->ctx != NULL);
1069 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1073 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1074 if (txq->mp2mr[i].mp == NULL)
1076 assert(txq->mp2mr[i].mr != NULL);
1077 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1079 memset(txq, 0, sizeof(*txq));
1083 * Manage TX completions.
1085 * When sending a burst, mlx4_tx_burst() posts several WRs.
1086 * To improve performance, a completion event is only required once every
1087 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1088 * for other WRs, but this information would not be used anyway.
1091 * Pointer to TX queue structure.
1094 * 0 on success, -1 on failure.
1097 txq_complete(struct txq *txq)
1099 unsigned int elts_comp = txq->elts_comp;
1100 unsigned int elts_tail = txq->elts_tail;
1101 const unsigned int elts_n = txq->elts_n;
1104 if (unlikely(elts_comp == 0))
1107 DEBUG("%p: processing %u work requests completions",
1108 (void *)txq, elts_comp);
1110 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1111 if (unlikely(wcs_n == 0))
1113 if (unlikely(wcs_n < 0)) {
1114 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1115 (void *)txq, wcs_n);
1119 assert(elts_comp <= txq->elts_comp);
1121 * Assume WC status is successful as nothing can be done about it
1124 elts_tail += wcs_n * txq->elts_comp_cd_init;
1125 if (elts_tail >= elts_n)
1126 elts_tail -= elts_n;
1127 txq->elts_tail = elts_tail;
1128 txq->elts_comp = elts_comp;
1132 struct mlx4_check_mempool_data {
1138 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
1139 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
1140 void *opaque, struct rte_mempool_memhdr *memhdr,
1143 struct mlx4_check_mempool_data *data = opaque;
1148 /* It already failed, skip the next chunks. */
1151 /* It is the first chunk. */
1152 if (data->start == NULL && data->end == NULL) {
1153 data->start = memhdr->addr;
1154 data->end = data->start + memhdr->len;
1157 if (data->end == memhdr->addr) {
1158 data->end += memhdr->len;
1161 if (data->start == (char *)memhdr->addr + memhdr->len) {
1162 data->start -= memhdr->len;
1165 /* Error, mempool is not virtually contigous. */
1170 * Check if a mempool can be used: it must be virtually contiguous.
1173 * Pointer to memory pool.
1175 * Pointer to the start address of the mempool virtual memory area
1177 * Pointer to the end address of the mempool virtual memory area
1180 * 0 on success (mempool is virtually contiguous), -1 on error.
1182 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
1185 struct mlx4_check_mempool_data data;
1187 memset(&data, 0, sizeof(data));
1188 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
1189 *start = (uintptr_t)data.start;
1190 *end = (uintptr_t)data.end;
1195 /* For best performance, this function should not be inlined. */
1196 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1200 * Register mempool as a memory region.
1203 * Pointer to protection domain.
1205 * Pointer to memory pool.
1208 * Memory region pointer, NULL in case of error.
1210 static struct ibv_mr *
1211 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1213 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1218 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1219 ERROR("mempool %p: not virtually contiguous",
1224 DEBUG("mempool %p area start=%p end=%p size=%zu",
1225 (void *)mp, (void *)start, (void *)end,
1226 (size_t)(end - start));
1227 /* Round start and end to page boundary if found in memory segments. */
1228 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1229 uintptr_t addr = (uintptr_t)ms[i].addr;
1230 size_t len = ms[i].len;
1231 unsigned int align = ms[i].hugepage_sz;
1233 if ((start > addr) && (start < addr + len))
1234 start = RTE_ALIGN_FLOOR(start, align);
1235 if ((end > addr) && (end < addr + len))
1236 end = RTE_ALIGN_CEIL(end, align);
1238 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1239 (void *)mp, (void *)start, (void *)end,
1240 (size_t)(end - start));
1241 return ibv_reg_mr(pd,
1244 IBV_ACCESS_LOCAL_WRITE);
1248 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1249 * the cloned mbuf is allocated is returned instead.
1255 * Memory pool where data is located for given mbuf.
1257 static struct rte_mempool *
1258 txq_mb2mp(struct rte_mbuf *buf)
1260 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1261 return rte_mbuf_from_indirect(buf)->pool;
1266 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1267 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1268 * remove an entry first.
1271 * Pointer to TX queue structure.
1273 * Memory Pool for which a Memory Region lkey must be returned.
1276 * mr->lkey on success, (uint32_t)-1 on failure.
1279 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1284 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1285 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1286 /* Unknown MP, add a new MR for it. */
1289 if (txq->mp2mr[i].mp == mp) {
1290 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1291 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1292 return txq->mp2mr[i].lkey;
1295 /* Add a new entry, register MR first. */
1296 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1297 (void *)txq, mp->name, (void *)mp);
1298 mr = mlx4_mp2mr(txq->priv->pd, mp);
1299 if (unlikely(mr == NULL)) {
1300 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1302 return (uint32_t)-1;
1304 if (unlikely(i == elemof(txq->mp2mr))) {
1305 /* Table is full, remove oldest entry. */
1306 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1309 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1310 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1311 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1313 /* Store the new entry. */
1314 txq->mp2mr[i].mp = mp;
1315 txq->mp2mr[i].mr = mr;
1316 txq->mp2mr[i].lkey = mr->lkey;
1317 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1318 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1319 return txq->mp2mr[i].lkey;
1322 struct txq_mp2mr_mbuf_check_data {
1327 * Callback function for rte_mempool_obj_iter() to check whether a given
1328 * mempool object looks like a mbuf.
1331 * The mempool pointer
1333 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1338 * Object index, unused.
1341 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1342 uint32_t index __rte_unused)
1344 struct txq_mp2mr_mbuf_check_data *data = arg;
1345 struct rte_mbuf *buf = obj;
1347 /* Check whether mbuf structure fits element size and whether mempool
1348 * pointer is valid. */
1349 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1354 * Iterator function for rte_mempool_walk() to register existing mempools and
1355 * fill the MP to MR cache of a TX queue.
1358 * Memory Pool to register.
1360 * Pointer to TX queue structure.
1363 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1365 struct txq *txq = arg;
1366 struct txq_mp2mr_mbuf_check_data data = {
1370 /* Register mempool only if the first element looks like a mbuf. */
1371 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1377 #if MLX4_PMD_SGE_WR_N > 1
1380 * Copy scattered mbuf contents to a single linear buffer.
1382 * @param[out] linear
1383 * Linear output buffer.
1385 * Scattered input buffer.
1388 * Number of bytes copied to the output buffer or 0 if not large enough.
1391 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1393 unsigned int size = 0;
1394 unsigned int offset;
1397 unsigned int len = DATA_LEN(buf);
1401 if (unlikely(size > sizeof(*linear)))
1403 memcpy(&(*linear)[offset],
1404 rte_pktmbuf_mtod(buf, uint8_t *),
1407 } while (buf != NULL);
1412 * Handle scattered buffers for mlx4_tx_burst().
1415 * TX queue structure.
1417 * Number of segments in buf.
1419 * TX queue element to fill.
1421 * Buffer to process.
1423 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1425 * Array filled with SGEs on success.
1428 * A structure containing the processed packet size in bytes and the
1429 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1432 static struct tx_burst_sg_ret {
1433 unsigned int length;
1436 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1437 struct rte_mbuf *buf, unsigned int elts_head,
1438 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1440 unsigned int sent_size = 0;
1444 /* When there are too many segments, extra segments are
1445 * linearized in the last SGE. */
1446 if (unlikely(segs > elemof(*sges))) {
1447 segs = (elemof(*sges) - 1);
1450 /* Update element. */
1452 /* Register segments as SGEs. */
1453 for (j = 0; (j != segs); ++j) {
1454 struct ibv_sge *sge = &(*sges)[j];
1457 /* Retrieve Memory Region key for this memory pool. */
1458 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1459 if (unlikely(lkey == (uint32_t)-1)) {
1460 /* MR does not exist. */
1461 DEBUG("%p: unable to get MP <-> MR association",
1463 /* Clean up TX element. */
1468 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1470 rte_prefetch0((volatile void *)
1471 (uintptr_t)sge->addr);
1472 sge->length = DATA_LEN(buf);
1474 sent_size += sge->length;
1477 /* If buf is not NULL here and is not going to be linearized,
1478 * nb_segs is not valid. */
1480 assert((buf == NULL) || (linearize));
1481 /* Linearize extra segments. */
1483 struct ibv_sge *sge = &(*sges)[segs];
1484 linear_t *linear = &(*txq->elts_linear)[elts_head];
1485 unsigned int size = linearize_mbuf(linear, buf);
1487 assert(segs == (elemof(*sges) - 1));
1489 /* Invalid packet. */
1490 DEBUG("%p: packet too large to be linearized.",
1492 /* Clean up TX element. */
1496 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1497 if (elemof(*sges) == 1) {
1499 struct rte_mbuf *next = NEXT(buf);
1501 rte_pktmbuf_free_seg(buf);
1503 } while (buf != NULL);
1507 sge->addr = (uintptr_t)&(*linear)[0];
1509 sge->lkey = txq->mr_linear->lkey;
1511 /* Include last segment. */
1514 return (struct tx_burst_sg_ret){
1515 .length = sent_size,
1519 return (struct tx_burst_sg_ret){
1525 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1528 * DPDK callback for TX.
1531 * Generic pointer to TX queue structure.
1533 * Packets to transmit.
1535 * Number of packets in array.
1538 * Number of packets successfully transmitted (<= pkts_n).
1541 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1543 struct txq *txq = (struct txq *)dpdk_txq;
1544 unsigned int elts_head = txq->elts_head;
1545 const unsigned int elts_n = txq->elts_n;
1546 unsigned int elts_comp_cd = txq->elts_comp_cd;
1547 unsigned int elts_comp = 0;
1552 assert(elts_comp_cd != 0);
1554 max = (elts_n - (elts_head - txq->elts_tail));
1558 assert(max <= elts_n);
1559 /* Always leave one free entry in the ring. */
1565 for (i = 0; (i != max); ++i) {
1566 struct rte_mbuf *buf = pkts[i];
1567 unsigned int elts_head_next =
1568 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1569 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1570 struct txq_elt *elt = &(*txq->elts)[elts_head];
1571 unsigned int segs = NB_SEGS(buf);
1572 #ifdef MLX4_PMD_SOFT_COUNTERS
1573 unsigned int sent_size = 0;
1575 uint32_t send_flags = 0;
1577 /* Clean up old buffer. */
1578 if (likely(elt->buf != NULL)) {
1579 struct rte_mbuf *tmp = elt->buf;
1583 memset(elt, 0x66, sizeof(*elt));
1585 /* Faster than rte_pktmbuf_free(). */
1587 struct rte_mbuf *next = NEXT(tmp);
1589 rte_pktmbuf_free_seg(tmp);
1591 } while (tmp != NULL);
1593 /* Request TX completion. */
1594 if (unlikely(--elts_comp_cd == 0)) {
1595 elts_comp_cd = txq->elts_comp_cd_init;
1597 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1599 /* Should we enable HW CKSUM offload */
1601 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1602 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1603 /* HW does not support checksum offloads at arbitrary
1604 * offsets but automatically recognizes the packet
1605 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1606 * tunnels are currently supported. */
1607 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1608 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1610 if (likely(segs == 1)) {
1615 /* Retrieve buffer information. */
1616 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1617 length = DATA_LEN(buf);
1618 /* Retrieve Memory Region key for this memory pool. */
1619 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1620 if (unlikely(lkey == (uint32_t)-1)) {
1621 /* MR does not exist. */
1622 DEBUG("%p: unable to get MP <-> MR"
1623 " association", (void *)txq);
1624 /* Clean up TX element. */
1628 /* Update element. */
1631 rte_prefetch0((volatile void *)
1633 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1634 /* Put packet into send queue. */
1635 #if MLX4_PMD_MAX_INLINE > 0
1636 if (length <= txq->max_inline)
1637 err = txq->if_qp->send_pending_inline
1644 err = txq->if_qp->send_pending
1652 #ifdef MLX4_PMD_SOFT_COUNTERS
1653 sent_size += length;
1656 #if MLX4_PMD_SGE_WR_N > 1
1657 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1658 struct tx_burst_sg_ret ret;
1660 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1662 if (ret.length == (unsigned int)-1)
1664 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1665 /* Put SG list into send queue. */
1666 err = txq->if_qp->send_pending_sg_list
1673 #ifdef MLX4_PMD_SOFT_COUNTERS
1674 sent_size += ret.length;
1676 #else /* MLX4_PMD_SGE_WR_N > 1 */
1677 DEBUG("%p: TX scattered buffers support not"
1678 " compiled in", (void *)txq);
1680 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1682 elts_head = elts_head_next;
1683 #ifdef MLX4_PMD_SOFT_COUNTERS
1684 /* Increment sent bytes counter. */
1685 txq->stats.obytes += sent_size;
1689 /* Take a shortcut if nothing must be sent. */
1690 if (unlikely(i == 0))
1692 #ifdef MLX4_PMD_SOFT_COUNTERS
1693 /* Increment sent packets counter. */
1694 txq->stats.opackets += i;
1696 /* Ring QP doorbell. */
1697 err = txq->if_qp->send_flush(txq->qp);
1698 if (unlikely(err)) {
1699 /* A nonzero value is not supposed to be returned.
1700 * Nothing can be done about it. */
1701 DEBUG("%p: send_flush() failed with error %d",
1704 txq->elts_head = elts_head;
1705 txq->elts_comp += elts_comp;
1706 txq->elts_comp_cd = elts_comp_cd;
1711 * DPDK callback for TX in secondary processes.
1713 * This function configures all queues from primary process information
1714 * if necessary before reverting to the normal TX burst callback.
1717 * Generic pointer to TX queue structure.
1719 * Packets to transmit.
1721 * Number of packets in array.
1724 * Number of packets successfully transmitted (<= pkts_n).
1727 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1730 struct txq *txq = dpdk_txq;
1731 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1732 struct priv *primary_priv;
1738 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1739 /* Look for queue index in both private structures. */
1740 for (index = 0; index != priv->txqs_n; ++index)
1741 if (((*primary_priv->txqs)[index] == txq) ||
1742 ((*priv->txqs)[index] == txq))
1744 if (index == priv->txqs_n)
1746 txq = (*priv->txqs)[index];
1747 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1751 * Configure a TX queue.
1754 * Pointer to Ethernet device structure.
1756 * Pointer to TX queue structure.
1758 * Number of descriptors to configure in queue.
1760 * NUMA socket on which memory must be allocated.
1762 * Thresholds parameters.
1765 * 0 on success, errno value on failure.
1768 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1769 unsigned int socket, const struct rte_eth_txconf *conf)
1771 struct priv *priv = mlx4_get_priv(dev);
1777 struct ibv_exp_query_intf_params params;
1778 struct ibv_exp_qp_init_attr init;
1779 struct ibv_exp_res_domain_init_attr rd;
1780 struct ibv_exp_cq_init_attr cq;
1781 struct ibv_exp_qp_attr mod;
1783 enum ibv_exp_query_intf_status status;
1786 (void)conf; /* Thresholds configuration (ignored). */
1789 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1790 ERROR("%p: invalid number of TX descriptors (must be a"
1791 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1794 desc /= MLX4_PMD_SGE_WR_N;
1795 /* MRs will be registered in mp2mr[] later. */
1796 attr.rd = (struct ibv_exp_res_domain_init_attr){
1797 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1798 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1799 .thread_model = IBV_EXP_THREAD_SINGLE,
1800 .msg_model = IBV_EXP_MSG_HIGH_BW,
1802 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1803 if (tmpl.rd == NULL) {
1805 ERROR("%p: RD creation failure: %s",
1806 (void *)dev, strerror(ret));
1809 attr.cq = (struct ibv_exp_cq_init_attr){
1810 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1811 .res_domain = tmpl.rd,
1813 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1814 if (tmpl.cq == NULL) {
1816 ERROR("%p: CQ creation failure: %s",
1817 (void *)dev, strerror(ret));
1820 DEBUG("priv->device_attr.max_qp_wr is %d",
1821 priv->device_attr.max_qp_wr);
1822 DEBUG("priv->device_attr.max_sge is %d",
1823 priv->device_attr.max_sge);
1824 attr.init = (struct ibv_exp_qp_init_attr){
1825 /* CQ to be associated with the send queue. */
1827 /* CQ to be associated with the receive queue. */
1830 /* Max number of outstanding WRs. */
1831 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1832 priv->device_attr.max_qp_wr :
1834 /* Max number of scatter/gather elements in a WR. */
1835 .max_send_sge = ((priv->device_attr.max_sge <
1836 MLX4_PMD_SGE_WR_N) ?
1837 priv->device_attr.max_sge :
1839 #if MLX4_PMD_MAX_INLINE > 0
1840 .max_inline_data = MLX4_PMD_MAX_INLINE,
1843 .qp_type = IBV_QPT_RAW_PACKET,
1844 /* Do *NOT* enable this, completions events are managed per
1848 .res_domain = tmpl.rd,
1849 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1850 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1852 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1853 if (tmpl.qp == NULL) {
1854 ret = (errno ? errno : EINVAL);
1855 ERROR("%p: QP creation failure: %s",
1856 (void *)dev, strerror(ret));
1859 #if MLX4_PMD_MAX_INLINE > 0
1860 /* ibv_create_qp() updates this value. */
1861 tmpl.max_inline = attr.init.cap.max_inline_data;
1863 attr.mod = (struct ibv_exp_qp_attr){
1864 /* Move the QP to this state. */
1865 .qp_state = IBV_QPS_INIT,
1866 /* Primary port number. */
1867 .port_num = priv->port
1869 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1870 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1872 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1873 (void *)dev, strerror(ret));
1876 ret = txq_alloc_elts(&tmpl, desc);
1878 ERROR("%p: TXQ allocation failed: %s",
1879 (void *)dev, strerror(ret));
1882 attr.mod = (struct ibv_exp_qp_attr){
1883 .qp_state = IBV_QPS_RTR
1885 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1887 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1888 (void *)dev, strerror(ret));
1891 attr.mod.qp_state = IBV_QPS_RTS;
1892 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1894 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1895 (void *)dev, strerror(ret));
1898 attr.params = (struct ibv_exp_query_intf_params){
1899 .intf_scope = IBV_EXP_INTF_GLOBAL,
1900 .intf = IBV_EXP_INTF_CQ,
1903 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1904 if (tmpl.if_cq == NULL) {
1905 ERROR("%p: CQ interface family query failed with status %d",
1906 (void *)dev, status);
1909 attr.params = (struct ibv_exp_query_intf_params){
1910 .intf_scope = IBV_EXP_INTF_GLOBAL,
1911 .intf = IBV_EXP_INTF_QP_BURST,
1913 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1914 /* MC loopback must be disabled when not using a VF. */
1917 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1921 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1922 if (tmpl.if_qp == NULL) {
1923 ERROR("%p: QP interface family query failed with status %d",
1924 (void *)dev, status);
1927 /* Clean up txq in case we're reinitializing it. */
1928 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1931 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1932 /* Pre-register known mempools. */
1933 rte_mempool_walk(txq_mp2mr_iter, txq);
1943 * DPDK callback to configure a TX queue.
1946 * Pointer to Ethernet device structure.
1950 * Number of descriptors to configure in queue.
1952 * NUMA socket on which memory must be allocated.
1954 * Thresholds parameters.
1957 * 0 on success, negative errno value on failure.
1960 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1961 unsigned int socket, const struct rte_eth_txconf *conf)
1963 struct priv *priv = dev->data->dev_private;
1964 struct txq *txq = (*priv->txqs)[idx];
1967 if (mlx4_is_secondary())
1968 return -E_RTE_SECONDARY;
1970 DEBUG("%p: configuring queue %u for %u descriptors",
1971 (void *)dev, idx, desc);
1972 if (idx >= priv->txqs_n) {
1973 ERROR("%p: queue index out of range (%u >= %u)",
1974 (void *)dev, idx, priv->txqs_n);
1979 DEBUG("%p: reusing already allocated queue index %u (%p)",
1980 (void *)dev, idx, (void *)txq);
1981 if (priv->started) {
1985 (*priv->txqs)[idx] = NULL;
1988 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1990 ERROR("%p: unable to allocate queue index %u",
1996 ret = txq_setup(dev, txq, desc, socket, conf);
2000 txq->stats.idx = idx;
2001 DEBUG("%p: adding TX queue %p to list",
2002 (void *)dev, (void *)txq);
2003 (*priv->txqs)[idx] = txq;
2004 /* Update send callback. */
2005 dev->tx_pkt_burst = mlx4_tx_burst;
2012 * DPDK callback to release a TX queue.
2015 * Generic TX queue pointer.
2018 mlx4_tx_queue_release(void *dpdk_txq)
2020 struct txq *txq = (struct txq *)dpdk_txq;
2024 if (mlx4_is_secondary())
2030 for (i = 0; (i != priv->txqs_n); ++i)
2031 if ((*priv->txqs)[i] == txq) {
2032 DEBUG("%p: removing TX queue %p from list",
2033 (void *)priv->dev, (void *)txq);
2034 (*priv->txqs)[i] = NULL;
2042 /* RX queues handling. */
2045 * Allocate RX queue elements with scattered packets support.
2048 * Pointer to RX queue structure.
2050 * Number of elements to allocate.
2052 * If not NULL, fetch buffers from this array instead of allocating them
2053 * with rte_pktmbuf_alloc().
2056 * 0 on success, errno value on failure.
2059 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2060 struct rte_mbuf **pool)
2063 struct rxq_elt_sp (*elts)[elts_n] =
2064 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2069 ERROR("%p: can't allocate packets array", (void *)rxq);
2073 /* For each WR (packet). */
2074 for (i = 0; (i != elts_n); ++i) {
2076 struct rxq_elt_sp *elt = &(*elts)[i];
2077 struct ibv_recv_wr *wr = &elt->wr;
2078 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2080 /* These two arrays must have the same size. */
2081 assert(elemof(elt->sges) == elemof(elt->bufs));
2084 wr->next = &(*elts)[(i + 1)].wr;
2085 wr->sg_list = &(*sges)[0];
2086 wr->num_sge = elemof(*sges);
2087 /* For each SGE (segment). */
2088 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2089 struct ibv_sge *sge = &(*sges)[j];
2090 struct rte_mbuf *buf;
2094 assert(buf != NULL);
2095 rte_pktmbuf_reset(buf);
2097 buf = rte_pktmbuf_alloc(rxq->mp);
2099 assert(pool == NULL);
2100 ERROR("%p: empty mbuf pool", (void *)rxq);
2105 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2106 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2107 /* Buffer is supposed to be empty. */
2108 assert(rte_pktmbuf_data_len(buf) == 0);
2109 assert(rte_pktmbuf_pkt_len(buf) == 0);
2110 /* sge->addr must be able to store a pointer. */
2111 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2113 /* The first SGE keeps its headroom. */
2114 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2115 sge->length = (buf->buf_len -
2116 RTE_PKTMBUF_HEADROOM);
2118 /* Subsequent SGEs lose theirs. */
2119 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2120 SET_DATA_OFF(buf, 0);
2121 sge->addr = (uintptr_t)buf->buf_addr;
2122 sge->length = buf->buf_len;
2124 sge->lkey = rxq->mr->lkey;
2125 /* Redundant check for tailroom. */
2126 assert(sge->length == rte_pktmbuf_tailroom(buf));
2129 /* The last WR pointer must be NULL. */
2130 (*elts)[(i - 1)].wr.next = NULL;
2131 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2132 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2133 rxq->elts_n = elts_n;
2135 rxq->elts.sp = elts;
2140 assert(pool == NULL);
2141 for (i = 0; (i != elemof(*elts)); ++i) {
2143 struct rxq_elt_sp *elt = &(*elts)[i];
2145 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2146 struct rte_mbuf *buf = elt->bufs[j];
2149 rte_pktmbuf_free_seg(buf);
2154 DEBUG("%p: failed, freed everything", (void *)rxq);
2160 * Free RX queue elements with scattered packets support.
2163 * Pointer to RX queue structure.
2166 rxq_free_elts_sp(struct rxq *rxq)
2169 unsigned int elts_n = rxq->elts_n;
2170 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2172 DEBUG("%p: freeing WRs", (void *)rxq);
2174 rxq->elts.sp = NULL;
2177 for (i = 0; (i != elemof(*elts)); ++i) {
2179 struct rxq_elt_sp *elt = &(*elts)[i];
2181 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2182 struct rte_mbuf *buf = elt->bufs[j];
2185 rte_pktmbuf_free_seg(buf);
2192 * Allocate RX queue elements.
2195 * Pointer to RX queue structure.
2197 * Number of elements to allocate.
2199 * If not NULL, fetch buffers from this array instead of allocating them
2200 * with rte_pktmbuf_alloc().
2203 * 0 on success, errno value on failure.
2206 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2209 struct rxq_elt (*elts)[elts_n] =
2210 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2215 ERROR("%p: can't allocate packets array", (void *)rxq);
2219 /* For each WR (packet). */
2220 for (i = 0; (i != elts_n); ++i) {
2221 struct rxq_elt *elt = &(*elts)[i];
2222 struct ibv_recv_wr *wr = &elt->wr;
2223 struct ibv_sge *sge = &(*elts)[i].sge;
2224 struct rte_mbuf *buf;
2228 assert(buf != NULL);
2229 rte_pktmbuf_reset(buf);
2231 buf = rte_pktmbuf_alloc(rxq->mp);
2233 assert(pool == NULL);
2234 ERROR("%p: empty mbuf pool", (void *)rxq);
2238 /* Configure WR. Work request ID contains its own index in
2239 * the elts array and the offset between SGE buffer header and
2241 WR_ID(wr->wr_id).id = i;
2242 WR_ID(wr->wr_id).offset =
2243 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2245 wr->next = &(*elts)[(i + 1)].wr;
2248 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2249 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2250 /* Buffer is supposed to be empty. */
2251 assert(rte_pktmbuf_data_len(buf) == 0);
2252 assert(rte_pktmbuf_pkt_len(buf) == 0);
2253 /* sge->addr must be able to store a pointer. */
2254 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2255 /* SGE keeps its headroom. */
2256 sge->addr = (uintptr_t)
2257 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2258 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2259 sge->lkey = rxq->mr->lkey;
2260 /* Redundant check for tailroom. */
2261 assert(sge->length == rte_pktmbuf_tailroom(buf));
2262 /* Make sure elts index and SGE mbuf pointer can be deduced
2264 if ((WR_ID(wr->wr_id).id != i) ||
2265 ((void *)((uintptr_t)sge->addr -
2266 WR_ID(wr->wr_id).offset) != buf)) {
2267 ERROR("%p: cannot store index and offset in WR ID",
2270 rte_pktmbuf_free(buf);
2275 /* The last WR pointer must be NULL. */
2276 (*elts)[(i - 1)].wr.next = NULL;
2277 DEBUG("%p: allocated and configured %u single-segment WRs",
2278 (void *)rxq, elts_n);
2279 rxq->elts_n = elts_n;
2281 rxq->elts.no_sp = elts;
2286 assert(pool == NULL);
2287 for (i = 0; (i != elemof(*elts)); ++i) {
2288 struct rxq_elt *elt = &(*elts)[i];
2289 struct rte_mbuf *buf;
2291 if (elt->sge.addr == 0)
2293 assert(WR_ID(elt->wr.wr_id).id == i);
2294 buf = (void *)((uintptr_t)elt->sge.addr -
2295 WR_ID(elt->wr.wr_id).offset);
2296 rte_pktmbuf_free_seg(buf);
2300 DEBUG("%p: failed, freed everything", (void *)rxq);
2306 * Free RX queue elements.
2309 * Pointer to RX queue structure.
2312 rxq_free_elts(struct rxq *rxq)
2315 unsigned int elts_n = rxq->elts_n;
2316 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2318 DEBUG("%p: freeing WRs", (void *)rxq);
2320 rxq->elts.no_sp = NULL;
2323 for (i = 0; (i != elemof(*elts)); ++i) {
2324 struct rxq_elt *elt = &(*elts)[i];
2325 struct rte_mbuf *buf;
2327 if (elt->sge.addr == 0)
2329 assert(WR_ID(elt->wr.wr_id).id == i);
2330 buf = (void *)((uintptr_t)elt->sge.addr -
2331 WR_ID(elt->wr.wr_id).offset);
2332 rte_pktmbuf_free_seg(buf);
2338 * Delete flow steering rule.
2341 * Pointer to RX queue structure.
2343 * MAC address index.
2348 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2351 struct priv *priv = rxq->priv;
2352 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2353 (const uint8_t (*)[ETHER_ADDR_LEN])
2354 priv->mac[mac_index].addr_bytes;
2356 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2357 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2358 " (VLAN ID %" PRIu16 ")",
2360 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2361 mac_index, priv->vlan_filter[vlan_index].id);
2362 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2363 rxq->mac_flow[mac_index][vlan_index] = NULL;
2367 * Unregister a MAC address from a RX queue.
2370 * Pointer to RX queue structure.
2372 * MAC address index.
2375 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2377 struct priv *priv = rxq->priv;
2379 unsigned int vlans = 0;
2381 assert(mac_index < elemof(priv->mac));
2382 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2384 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2385 if (!priv->vlan_filter[i].enabled)
2387 rxq_del_flow(rxq, mac_index, i);
2391 rxq_del_flow(rxq, mac_index, 0);
2393 BITFIELD_RESET(rxq->mac_configured, mac_index);
2397 * Unregister all MAC addresses from a RX queue.
2400 * Pointer to RX queue structure.
2403 rxq_mac_addrs_del(struct rxq *rxq)
2405 struct priv *priv = rxq->priv;
2408 for (i = 0; (i != elemof(priv->mac)); ++i)
2409 rxq_mac_addr_del(rxq, i);
2412 static int rxq_promiscuous_enable(struct rxq *);
2413 static void rxq_promiscuous_disable(struct rxq *);
2416 * Add single flow steering rule.
2419 * Pointer to RX queue structure.
2421 * MAC address index to register.
2423 * VLAN index. Use -1 for a flow without VLAN.
2426 * 0 on success, errno value on failure.
2429 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2431 struct ibv_flow *flow;
2432 struct priv *priv = rxq->priv;
2433 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2434 (const uint8_t (*)[ETHER_ADDR_LEN])
2435 priv->mac[mac_index].addr_bytes;
2437 /* Allocate flow specification on the stack. */
2438 struct __attribute__((packed)) {
2439 struct ibv_flow_attr attr;
2440 struct ibv_flow_spec_eth spec;
2442 struct ibv_flow_attr *attr = &data.attr;
2443 struct ibv_flow_spec_eth *spec = &data.spec;
2445 assert(mac_index < elemof(priv->mac));
2446 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2448 * No padding must be inserted by the compiler between attr and spec.
2449 * This layout is expected by libibverbs.
2451 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2452 *attr = (struct ibv_flow_attr){
2453 .type = IBV_FLOW_ATTR_NORMAL,
2459 *spec = (struct ibv_flow_spec_eth){
2460 .type = IBV_FLOW_SPEC_ETH,
2461 .size = sizeof(*spec),
2464 (*mac)[0], (*mac)[1], (*mac)[2],
2465 (*mac)[3], (*mac)[4], (*mac)[5]
2467 .vlan_tag = ((vlan_index != -1u) ?
2468 htons(priv->vlan_filter[vlan_index].id) :
2472 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2473 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2476 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2477 " (VLAN %s %" PRIu16 ")",
2479 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2481 ((vlan_index != -1u) ? "ID" : "index"),
2482 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2483 /* Create related flow. */
2485 flow = ibv_create_flow(rxq->qp, attr);
2487 /* It's not clear whether errno is always set in this case. */
2488 ERROR("%p: flow configuration failed, errno=%d: %s",
2490 (errno ? strerror(errno) : "Unknown error"));
2495 if (vlan_index == -1u)
2497 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2498 rxq->mac_flow[mac_index][vlan_index] = flow;
2503 * Register a MAC address in a RX queue.
2506 * Pointer to RX queue structure.
2508 * MAC address index to register.
2511 * 0 on success, errno value on failure.
2514 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2516 struct priv *priv = rxq->priv;
2518 unsigned int vlans = 0;
2521 assert(mac_index < elemof(priv->mac));
2522 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2523 rxq_mac_addr_del(rxq, mac_index);
2524 /* Fill VLAN specifications. */
2525 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2526 if (!priv->vlan_filter[i].enabled)
2528 /* Create related flow. */
2529 ret = rxq_add_flow(rxq, mac_index, i);
2534 /* Failure, rollback. */
2536 if (priv->vlan_filter[--i].enabled)
2537 rxq_del_flow(rxq, mac_index, i);
2541 /* In case there is no VLAN filter. */
2543 ret = rxq_add_flow(rxq, mac_index, -1);
2547 BITFIELD_SET(rxq->mac_configured, mac_index);
2552 * Register all MAC addresses in a RX queue.
2555 * Pointer to RX queue structure.
2558 * 0 on success, errno value on failure.
2561 rxq_mac_addrs_add(struct rxq *rxq)
2563 struct priv *priv = rxq->priv;
2567 for (i = 0; (i != elemof(priv->mac)); ++i) {
2568 if (!BITFIELD_ISSET(priv->mac_configured, i))
2570 ret = rxq_mac_addr_add(rxq, i);
2573 /* Failure, rollback. */
2575 rxq_mac_addr_del(rxq, --i);
2583 * Unregister a MAC address.
2585 * In RSS mode, the MAC address is unregistered from the parent queue,
2586 * otherwise it is unregistered from each queue directly.
2589 * Pointer to private structure.
2591 * MAC address index.
2594 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2598 assert(!priv->isolated);
2599 assert(mac_index < elemof(priv->mac));
2600 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2603 rxq_mac_addr_del(LIST_FIRST(&priv->parents), mac_index);
2606 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2607 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2609 BITFIELD_RESET(priv->mac_configured, mac_index);
2613 * Register a MAC address.
2615 * In RSS mode, the MAC address is registered in the parent queue,
2616 * otherwise it is registered in each queue directly.
2619 * Pointer to private structure.
2621 * MAC address index to use.
2623 * MAC address to register.
2626 * 0 on success, errno value on failure.
2629 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2630 const uint8_t (*mac)[ETHER_ADDR_LEN])
2635 assert(mac_index < elemof(priv->mac));
2636 /* First, make sure this address isn't already configured. */
2637 for (i = 0; (i != elemof(priv->mac)); ++i) {
2638 /* Skip this index, it's going to be reconfigured. */
2641 if (!BITFIELD_ISSET(priv->mac_configured, i))
2643 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2645 /* Address already configured elsewhere, return with error. */
2648 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2649 priv_mac_addr_del(priv, mac_index);
2650 priv->mac[mac_index] = (struct ether_addr){
2652 (*mac)[0], (*mac)[1], (*mac)[2],
2653 (*mac)[3], (*mac)[4], (*mac)[5]
2656 /* If device isn't started, this is all we need to do. */
2657 if (!priv->started) {
2659 /* Verify that all queues have this index disabled. */
2660 for (i = 0; (i != priv->rxqs_n); ++i) {
2661 if ((*priv->rxqs)[i] == NULL)
2663 assert(!BITFIELD_ISSET
2664 ((*priv->rxqs)[i]->mac_configured, mac_index));
2670 ret = rxq_mac_addr_add(LIST_FIRST(&priv->parents), mac_index);
2675 for (i = 0; (i != priv->rxqs_n); ++i) {
2676 if ((*priv->rxqs)[i] == NULL)
2678 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2681 /* Failure, rollback. */
2683 if ((*priv->rxqs)[(--i)] != NULL)
2684 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2688 BITFIELD_SET(priv->mac_configured, mac_index);
2693 * Enable allmulti mode in a RX queue.
2696 * Pointer to RX queue structure.
2699 * 0 on success, errno value on failure.
2702 rxq_allmulticast_enable(struct rxq *rxq)
2704 struct ibv_flow *flow;
2705 struct ibv_flow_attr attr = {
2706 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2708 .port = rxq->priv->port,
2712 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2713 if (rxq->allmulti_flow != NULL)
2716 flow = ibv_create_flow(rxq->qp, &attr);
2718 /* It's not clear whether errno is always set in this case. */
2719 ERROR("%p: flow configuration failed, errno=%d: %s",
2721 (errno ? strerror(errno) : "Unknown error"));
2726 rxq->allmulti_flow = flow;
2727 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2732 * Disable allmulti mode in a RX queue.
2735 * Pointer to RX queue structure.
2738 rxq_allmulticast_disable(struct rxq *rxq)
2740 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2741 if (rxq->allmulti_flow == NULL)
2743 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2744 rxq->allmulti_flow = NULL;
2745 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2749 * Enable promiscuous mode in a RX queue.
2752 * Pointer to RX queue structure.
2755 * 0 on success, errno value on failure.
2758 rxq_promiscuous_enable(struct rxq *rxq)
2760 struct ibv_flow *flow;
2761 struct ibv_flow_attr attr = {
2762 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2764 .port = rxq->priv->port,
2770 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2771 if (rxq->promisc_flow != NULL)
2774 flow = ibv_create_flow(rxq->qp, &attr);
2776 /* It's not clear whether errno is always set in this case. */
2777 ERROR("%p: flow configuration failed, errno=%d: %s",
2779 (errno ? strerror(errno) : "Unknown error"));
2784 rxq->promisc_flow = flow;
2785 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2790 * Disable promiscuous mode in a RX queue.
2793 * Pointer to RX queue structure.
2796 rxq_promiscuous_disable(struct rxq *rxq)
2800 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2801 if (rxq->promisc_flow == NULL)
2803 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2804 rxq->promisc_flow = NULL;
2805 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2809 * Clean up a RX queue.
2811 * Destroy objects, free allocated memory and reset the structure for reuse.
2814 * Pointer to RX queue structure.
2817 rxq_cleanup(struct rxq *rxq)
2819 struct ibv_exp_release_intf_params params;
2821 DEBUG("cleaning up %p", (void *)rxq);
2823 rxq_free_elts_sp(rxq);
2826 if (rxq->if_qp != NULL) {
2827 assert(rxq->priv != NULL);
2828 assert(rxq->priv->ctx != NULL);
2829 assert(rxq->qp != NULL);
2830 params = (struct ibv_exp_release_intf_params){
2833 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2837 if (rxq->if_cq != NULL) {
2838 assert(rxq->priv != NULL);
2839 assert(rxq->priv->ctx != NULL);
2840 assert(rxq->cq != NULL);
2841 params = (struct ibv_exp_release_intf_params){
2844 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2848 if (rxq->qp != NULL && !rxq->priv->isolated) {
2849 rxq_promiscuous_disable(rxq);
2850 rxq_allmulticast_disable(rxq);
2851 rxq_mac_addrs_del(rxq);
2853 if (rxq->qp != NULL)
2854 claim_zero(ibv_destroy_qp(rxq->qp));
2855 if (rxq->cq != NULL)
2856 claim_zero(ibv_destroy_cq(rxq->cq));
2857 if (rxq->channel != NULL)
2858 claim_zero(ibv_destroy_comp_channel(rxq->channel));
2859 if (rxq->rd != NULL) {
2860 struct ibv_exp_destroy_res_domain_attr attr = {
2864 assert(rxq->priv != NULL);
2865 assert(rxq->priv->ctx != NULL);
2866 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2870 if (rxq->mr != NULL)
2871 claim_zero(ibv_dereg_mr(rxq->mr));
2872 memset(rxq, 0, sizeof(*rxq));
2876 * Translate RX completion flags to packet type.
2879 * RX completion flags returned by poll_length_flags().
2881 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2884 * Packet type for struct rte_mbuf.
2886 static inline uint32_t
2887 rxq_cq_to_pkt_type(uint32_t flags)
2891 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2894 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,
2895 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2897 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,
2898 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN) |
2900 IBV_EXP_CQ_RX_IPV4_PACKET,
2901 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN) |
2903 IBV_EXP_CQ_RX_IPV6_PACKET,
2904 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN);
2908 IBV_EXP_CQ_RX_IPV4_PACKET,
2909 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2911 IBV_EXP_CQ_RX_IPV6_PACKET,
2912 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN);
2917 * Translate RX completion flags to offload flags.
2920 * Pointer to RX queue structure.
2922 * RX completion flags returned by poll_length_flags().
2925 * Offload flags (ol_flags) for struct rte_mbuf.
2927 static inline uint32_t
2928 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2930 uint32_t ol_flags = 0;
2935 IBV_EXP_CQ_RX_IP_CSUM_OK,
2936 PKT_RX_IP_CKSUM_GOOD) |
2938 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2939 PKT_RX_L4_CKSUM_GOOD);
2940 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2943 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2944 PKT_RX_IP_CKSUM_GOOD) |
2946 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2947 PKT_RX_L4_CKSUM_GOOD);
2952 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2955 * DPDK callback for RX with scattered packets support.
2958 * Generic pointer to RX queue structure.
2960 * Array to store received packets.
2962 * Maximum number of packets in array.
2965 * Number of packets successfully received (<= pkts_n).
2968 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2970 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2971 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2972 const unsigned int elts_n = rxq->elts_n;
2973 unsigned int elts_head = rxq->elts_head;
2974 struct ibv_recv_wr head;
2975 struct ibv_recv_wr **next = &head.next;
2976 struct ibv_recv_wr *bad_wr;
2978 unsigned int pkts_ret = 0;
2981 if (unlikely(!rxq->sp))
2982 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2983 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2985 for (i = 0; (i != pkts_n); ++i) {
2986 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2987 struct ibv_recv_wr *wr = &elt->wr;
2988 uint64_t wr_id = wr->wr_id;
2990 unsigned int pkt_buf_len;
2991 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2992 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2993 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2997 /* Sanity checks. */
3001 assert(wr_id < rxq->elts_n);
3002 assert(wr->sg_list == elt->sges);
3003 assert(wr->num_sge == elemof(elt->sges));
3004 assert(elts_head < rxq->elts_n);
3005 assert(rxq->elts_head < rxq->elts_n);
3006 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3008 if (unlikely(ret < 0)) {
3012 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3014 /* ibv_poll_cq() must be used in case of failure. */
3015 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3016 if (unlikely(wcs_n == 0))
3018 if (unlikely(wcs_n < 0)) {
3019 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3020 (void *)rxq, wcs_n);
3024 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3025 /* Whatever, just repost the offending WR. */
3026 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3027 " completion status (%d): %s",
3028 (void *)rxq, wc.wr_id, wc.status,
3029 ibv_wc_status_str(wc.status));
3030 #ifdef MLX4_PMD_SOFT_COUNTERS
3031 /* Increment dropped packets counter. */
3032 ++rxq->stats.idropped;
3034 /* Link completed WRs together for repost. */
3045 /* Link completed WRs together for repost. */
3049 * Replace spent segments with new ones, concatenate and
3050 * return them as pkt_buf.
3053 struct ibv_sge *sge = &elt->sges[j];
3054 struct rte_mbuf *seg = elt->bufs[j];
3055 struct rte_mbuf *rep;
3056 unsigned int seg_tailroom;
3059 * Fetch initial bytes of packet descriptor into a
3060 * cacheline while allocating rep.
3063 rep = rte_mbuf_raw_alloc(rxq->mp);
3064 if (unlikely(rep == NULL)) {
3066 * Unable to allocate a replacement mbuf,
3069 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3070 " can't allocate a new mbuf",
3071 (void *)rxq, wr_id);
3072 if (pkt_buf != NULL) {
3073 *pkt_buf_next = NULL;
3074 rte_pktmbuf_free(pkt_buf);
3076 /* Increase out of memory counters. */
3077 ++rxq->stats.rx_nombuf;
3078 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3082 /* Poison user-modifiable fields in rep. */
3083 NEXT(rep) = (void *)((uintptr_t)-1);
3084 SET_DATA_OFF(rep, 0xdead);
3085 DATA_LEN(rep) = 0xd00d;
3086 PKT_LEN(rep) = 0xdeadd00d;
3087 NB_SEGS(rep) = 0x2a;
3091 * Clear special flags in mbuf to avoid
3092 * crashing while freeing.
3095 ~(uint64_t)(IND_ATTACHED_MBUF |
3098 assert(rep->buf_len == seg->buf_len);
3099 /* Reconfigure sge to use rep instead of seg. */
3100 assert(sge->lkey == rxq->mr->lkey);
3101 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3104 /* Update pkt_buf if it's the first segment, or link
3105 * seg to the previous one and update pkt_buf_next. */
3106 *pkt_buf_next = seg;
3107 pkt_buf_next = &NEXT(seg);
3108 /* Update seg information. */
3109 seg_tailroom = (seg->buf_len - seg_headroom);
3110 assert(sge->length == seg_tailroom);
3111 SET_DATA_OFF(seg, seg_headroom);
3112 if (likely(len <= seg_tailroom)) {
3114 DATA_LEN(seg) = len;
3117 assert(rte_pktmbuf_headroom(seg) ==
3119 assert(rte_pktmbuf_tailroom(seg) ==
3120 (seg_tailroom - len));
3123 DATA_LEN(seg) = seg_tailroom;
3124 PKT_LEN(seg) = seg_tailroom;
3126 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3127 assert(rte_pktmbuf_tailroom(seg) == 0);
3128 /* Fix len and clear headroom for next segments. */
3129 len -= seg_tailroom;
3132 /* Update head and tail segments. */
3133 *pkt_buf_next = NULL;
3134 assert(pkt_buf != NULL);
3136 NB_SEGS(pkt_buf) = j;
3137 PORT(pkt_buf) = rxq->port_id;
3138 PKT_LEN(pkt_buf) = pkt_buf_len;
3139 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3140 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3142 /* Return packet. */
3143 *(pkts++) = pkt_buf;
3145 #ifdef MLX4_PMD_SOFT_COUNTERS
3146 /* Increase bytes counter. */
3147 rxq->stats.ibytes += pkt_buf_len;
3150 if (++elts_head >= elts_n)
3154 if (unlikely(i == 0))
3159 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3161 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3162 if (unlikely(ret)) {
3163 /* Inability to repost WRs is fatal. */
3164 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3170 rxq->elts_head = elts_head;
3171 #ifdef MLX4_PMD_SOFT_COUNTERS
3172 /* Increase packets counter. */
3173 rxq->stats.ipackets += pkts_ret;
3179 * DPDK callback for RX.
3181 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3182 * manage scattered packets. Improves performance when MRU is lower than the
3183 * size of the first segment.
3186 * Generic pointer to RX queue structure.
3188 * Array to store received packets.
3190 * Maximum number of packets in array.
3193 * Number of packets successfully received (<= pkts_n).
3196 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3198 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3199 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3200 const unsigned int elts_n = rxq->elts_n;
3201 unsigned int elts_head = rxq->elts_head;
3202 struct ibv_sge sges[pkts_n];
3204 unsigned int pkts_ret = 0;
3207 if (unlikely(rxq->sp))
3208 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3209 for (i = 0; (i != pkts_n); ++i) {
3210 struct rxq_elt *elt = &(*elts)[elts_head];
3211 struct ibv_recv_wr *wr = &elt->wr;
3212 uint64_t wr_id = wr->wr_id;
3214 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3215 WR_ID(wr_id).offset);
3216 struct rte_mbuf *rep;
3219 /* Sanity checks. */
3220 assert(WR_ID(wr_id).id < rxq->elts_n);
3221 assert(wr->sg_list == &elt->sge);
3222 assert(wr->num_sge == 1);
3223 assert(elts_head < rxq->elts_n);
3224 assert(rxq->elts_head < rxq->elts_n);
3226 * Fetch initial bytes of packet descriptor into a
3227 * cacheline while allocating rep.
3229 rte_mbuf_prefetch_part1(seg);
3230 rte_mbuf_prefetch_part2(seg);
3231 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3233 if (unlikely(ret < 0)) {
3237 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3239 /* ibv_poll_cq() must be used in case of failure. */
3240 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3241 if (unlikely(wcs_n == 0))
3243 if (unlikely(wcs_n < 0)) {
3244 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3245 (void *)rxq, wcs_n);
3249 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3250 /* Whatever, just repost the offending WR. */
3251 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3252 " completion status (%d): %s",
3253 (void *)rxq, wc.wr_id, wc.status,
3254 ibv_wc_status_str(wc.status));
3255 #ifdef MLX4_PMD_SOFT_COUNTERS
3256 /* Increment dropped packets counter. */
3257 ++rxq->stats.idropped;
3259 /* Add SGE to array for repost. */
3268 rep = rte_mbuf_raw_alloc(rxq->mp);
3269 if (unlikely(rep == NULL)) {
3271 * Unable to allocate a replacement mbuf,
3274 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3275 " can't allocate a new mbuf",
3276 (void *)rxq, WR_ID(wr_id).id);
3277 /* Increase out of memory counters. */
3278 ++rxq->stats.rx_nombuf;
3279 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3280 /* Add SGE to array for repost. */
3285 /* Reconfigure sge to use rep instead of seg. */
3286 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3287 assert(elt->sge.lkey == rxq->mr->lkey);
3288 WR_ID(wr->wr_id).offset =
3289 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3291 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3293 /* Add SGE to array for repost. */
3296 /* Update seg information. */
3297 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3299 PORT(seg) = rxq->port_id;
3302 DATA_LEN(seg) = len;
3303 seg->packet_type = rxq_cq_to_pkt_type(flags);
3304 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3306 /* Return packet. */
3309 #ifdef MLX4_PMD_SOFT_COUNTERS
3310 /* Increase bytes counter. */
3311 rxq->stats.ibytes += len;
3314 if (++elts_head >= elts_n)
3318 if (unlikely(i == 0))
3322 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3324 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3325 if (unlikely(ret)) {
3326 /* Inability to repost WRs is fatal. */
3327 DEBUG("%p: recv_burst(): failed (ret=%d)",
3332 rxq->elts_head = elts_head;
3333 #ifdef MLX4_PMD_SOFT_COUNTERS
3334 /* Increase packets counter. */
3335 rxq->stats.ipackets += pkts_ret;
3341 * DPDK callback for RX in secondary processes.
3343 * This function configures all queues from primary process information
3344 * if necessary before reverting to the normal RX burst callback.
3347 * Generic pointer to RX queue structure.
3349 * Array to store received packets.
3351 * Maximum number of packets in array.
3354 * Number of packets successfully received (<= pkts_n).
3357 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3360 struct rxq *rxq = dpdk_rxq;
3361 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3362 struct priv *primary_priv;
3368 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3369 /* Look for queue index in both private structures. */
3370 for (index = 0; index != priv->rxqs_n; ++index)
3371 if (((*primary_priv->rxqs)[index] == rxq) ||
3372 ((*priv->rxqs)[index] == rxq))
3374 if (index == priv->rxqs_n)
3376 rxq = (*priv->rxqs)[index];
3377 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3381 * Allocate a Queue Pair.
3382 * Optionally setup inline receive if supported.
3385 * Pointer to private structure.
3387 * Completion queue to associate with QP.
3389 * Number of descriptors in QP (hint only).
3392 * QP pointer or NULL in case of error.
3394 static struct ibv_qp *
3395 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3396 struct ibv_exp_res_domain *rd)
3398 struct ibv_exp_qp_init_attr attr = {
3399 /* CQ to be associated with the send queue. */
3401 /* CQ to be associated with the receive queue. */
3404 /* Max number of outstanding WRs. */
3405 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3406 priv->device_attr.max_qp_wr :
3408 /* Max number of scatter/gather elements in a WR. */
3409 .max_recv_sge = ((priv->device_attr.max_sge <
3410 MLX4_PMD_SGE_WR_N) ?
3411 priv->device_attr.max_sge :
3414 .qp_type = IBV_QPT_RAW_PACKET,
3415 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3416 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3422 attr.max_inl_recv = priv->inl_recv_size;
3423 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3425 return ibv_exp_create_qp(priv->ctx, &attr);
3431 * Allocate a RSS Queue Pair.
3432 * Optionally setup inline receive if supported.
3435 * Pointer to private structure.
3437 * Completion queue to associate with QP.
3439 * Number of descriptors in QP (hint only).
3441 * If nonzero, a number of children for parent QP and zero for a child.
3443 * Pointer for a parent in a child case, NULL otherwise.
3446 * QP pointer or NULL in case of error.
3448 static struct ibv_qp *
3449 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3450 int children_n, struct ibv_exp_res_domain *rd,
3451 struct rxq *rxq_parent)
3453 struct ibv_exp_qp_init_attr attr = {
3454 /* CQ to be associated with the send queue. */
3456 /* CQ to be associated with the receive queue. */
3459 /* Max number of outstanding WRs. */
3460 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3461 priv->device_attr.max_qp_wr :
3463 /* Max number of scatter/gather elements in a WR. */
3464 .max_recv_sge = ((priv->device_attr.max_sge <
3465 MLX4_PMD_SGE_WR_N) ?
3466 priv->device_attr.max_sge :
3469 .qp_type = IBV_QPT_RAW_PACKET,
3470 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3471 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3472 IBV_EXP_QP_INIT_ATTR_QPG),
3478 attr.max_inl_recv = priv->inl_recv_size,
3479 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3481 if (children_n > 0) {
3482 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3483 /* TSS isn't necessary. */
3484 attr.qpg.parent_attrib.tss_child_count = 0;
3485 attr.qpg.parent_attrib.rss_child_count =
3486 rte_align32pow2(children_n + 1) >> 1;
3487 DEBUG("initializing parent RSS queue");
3489 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3490 attr.qpg.qpg_parent = rxq_parent->qp;
3491 DEBUG("initializing child RSS queue");
3493 return ibv_exp_create_qp(priv->ctx, &attr);
3496 #endif /* RSS_SUPPORT */
3499 * Reconfigure a RX queue with new parameters.
3501 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3502 * thread (such as a control thread), may corrupt the pool.
3503 * In case of failure, the queue is left untouched.
3506 * Pointer to Ethernet device structure.
3511 * 0 on success, errno value on failure.
3514 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3516 struct priv *priv = rxq->priv;
3517 struct rxq tmpl = *rxq;
3518 unsigned int mbuf_n;
3519 unsigned int desc_n;
3520 struct rte_mbuf **pool;
3522 struct ibv_exp_qp_attr mod;
3523 struct ibv_recv_wr *bad_wr;
3524 unsigned int mb_len;
3527 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
3528 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3529 /* Number of descriptors and mbufs currently allocated. */
3530 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3532 /* Toggle RX checksum offload if hardware supports it. */
3533 if (priv->hw_csum) {
3534 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3535 rxq->csum = tmpl.csum;
3537 if (priv->hw_csum_l2tun) {
3538 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3539 rxq->csum_l2tun = tmpl.csum_l2tun;
3541 /* Enable scattered packets support for this queue if necessary. */
3542 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3543 if (dev->data->dev_conf.rxmode.enable_scatter &&
3544 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3545 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3547 desc_n /= MLX4_PMD_SGE_WR_N;
3550 DEBUG("%p: %s scattered packets support (%u WRs)",
3551 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3552 /* If scatter mode is the same as before, nothing to do. */
3553 if (tmpl.sp == rxq->sp) {
3554 DEBUG("%p: nothing to do", (void *)dev);
3557 /* Remove attached flows if RSS is disabled (no parent queue). */
3558 if (!priv->rss && !priv->isolated) {
3559 rxq_allmulticast_disable(&tmpl);
3560 rxq_promiscuous_disable(&tmpl);
3561 rxq_mac_addrs_del(&tmpl);
3562 /* Update original queue in case of failure. */
3563 rxq->allmulti_flow = tmpl.allmulti_flow;
3564 rxq->promisc_flow = tmpl.promisc_flow;
3565 memcpy(rxq->mac_configured, tmpl.mac_configured,
3566 sizeof(rxq->mac_configured));
3567 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3569 /* From now on, any failure will render the queue unusable.
3570 * Reinitialize QP. */
3573 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3574 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3576 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3580 mod = (struct ibv_exp_qp_attr){
3581 /* Move the QP to this state. */
3582 .qp_state = IBV_QPS_INIT,
3583 /* Primary port number. */
3584 .port_num = priv->port
3586 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3590 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3591 (void *)dev, strerror(err));
3596 err = ibv_resize_cq(tmpl.cq, desc_n);
3598 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3602 /* Reconfigure flows. Do not care for errors. */
3603 if (!priv->rss && !priv->isolated) {
3604 rxq_mac_addrs_add(&tmpl);
3606 rxq_promiscuous_enable(&tmpl);
3608 rxq_allmulticast_enable(&tmpl);
3609 /* Update original queue in case of failure. */
3610 rxq->allmulti_flow = tmpl.allmulti_flow;
3611 rxq->promisc_flow = tmpl.promisc_flow;
3612 memcpy(rxq->mac_configured, tmpl.mac_configured,
3613 sizeof(rxq->mac_configured));
3614 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3616 /* Allocate pool. */
3617 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3619 ERROR("%p: cannot allocate memory", (void *)dev);
3622 /* Snatch mbufs from original queue. */
3625 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3627 for (i = 0; (i != elemof(*elts)); ++i) {
3628 struct rxq_elt_sp *elt = &(*elts)[i];
3631 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3632 assert(elt->bufs[j] != NULL);
3633 pool[k++] = elt->bufs[j];
3637 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3639 for (i = 0; (i != elemof(*elts)); ++i) {
3640 struct rxq_elt *elt = &(*elts)[i];
3641 struct rte_mbuf *buf = (void *)
3642 ((uintptr_t)elt->sge.addr -
3643 WR_ID(elt->wr.wr_id).offset);
3645 assert(WR_ID(elt->wr.wr_id).id == i);
3649 assert(k == mbuf_n);
3651 tmpl.elts.sp = NULL;
3652 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3654 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3655 rxq_alloc_elts(&tmpl, desc_n, pool));
3657 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3662 assert(tmpl.elts_n == desc_n);
3663 assert(tmpl.elts.sp != NULL);
3665 /* Clean up original data. */
3667 rte_free(rxq->elts.sp);
3668 rxq->elts.sp = NULL;
3672 err = ibv_post_recv(tmpl.qp,
3674 &(*tmpl.elts.sp)[0].wr :
3675 &(*tmpl.elts.no_sp)[0].wr),
3678 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3684 mod = (struct ibv_exp_qp_attr){
3685 .qp_state = IBV_QPS_RTR
3687 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3689 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3690 (void *)dev, strerror(err));
3698 * Create verbs QP resources associated with a rxq.
3701 * Pointer to RX queue structure.
3703 * Number of descriptors to configure in queue.
3705 * If true, the queue is disabled because its index is higher or
3706 * equal to the real number of queues, which must be a power of 2.
3708 * The number of children in a parent case, zero for a child.
3710 * The pointer to a parent RX structure for a child in RSS case,
3714 * 0 on success, errno value on failure.
3717 rxq_create_qp(struct rxq *rxq,
3721 struct rxq *rxq_parent)
3724 struct ibv_exp_qp_attr mod;
3725 struct ibv_exp_query_intf_params params;
3726 enum ibv_exp_query_intf_status status;
3727 struct ibv_recv_wr *bad_wr;
3728 int parent = (children_n > 0);
3729 struct priv *priv = rxq->priv;
3732 if (priv->rss && !inactive && (rxq_parent || parent))
3733 rxq->qp = rxq_setup_qp_rss(priv, rxq->cq, desc,
3734 children_n, rxq->rd,
3737 #endif /* RSS_SUPPORT */
3738 rxq->qp = rxq_setup_qp(priv, rxq->cq, desc, rxq->rd);
3739 if (rxq->qp == NULL) {
3740 ret = (errno ? errno : EINVAL);
3741 ERROR("QP creation failure: %s",
3745 mod = (struct ibv_exp_qp_attr){
3746 /* Move the QP to this state. */
3747 .qp_state = IBV_QPS_INIT,
3748 /* Primary port number. */
3749 .port_num = priv->port
3751 ret = ibv_exp_modify_qp(rxq->qp, &mod,
3754 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3755 #endif /* RSS_SUPPORT */
3758 ERROR("QP state to IBV_QPS_INIT failed: %s",
3762 if (!priv->isolated && (parent || !priv->rss)) {
3763 /* Configure MAC and broadcast addresses. */
3764 ret = rxq_mac_addrs_add(rxq);
3766 ERROR("QP flow attachment failed: %s",
3772 ret = ibv_post_recv(rxq->qp,
3774 &(*rxq->elts.sp)[0].wr :
3775 &(*rxq->elts.no_sp)[0].wr),
3778 ERROR("ibv_post_recv() failed for WR %p: %s",
3784 mod = (struct ibv_exp_qp_attr){
3785 .qp_state = IBV_QPS_RTR
3787 ret = ibv_exp_modify_qp(rxq->qp, &mod, IBV_EXP_QP_STATE);
3789 ERROR("QP state to IBV_QPS_RTR failed: %s",
3793 params = (struct ibv_exp_query_intf_params){
3794 .intf_scope = IBV_EXP_INTF_GLOBAL,
3795 .intf = IBV_EXP_INTF_QP_BURST,
3798 rxq->if_qp = ibv_exp_query_intf(priv->ctx, ¶ms, &status);
3799 if (rxq->if_qp == NULL) {
3800 ERROR("QP interface family query failed with status %d",
3808 * Configure a RX queue.
3811 * Pointer to Ethernet device structure.
3813 * Pointer to RX queue structure.
3815 * Number of descriptors to configure in queue.
3817 * NUMA socket on which memory must be allocated.
3819 * If true, the queue is disabled because its index is higher or
3820 * equal to the real number of queues, which must be a power of 2.
3822 * Thresholds parameters.
3824 * Memory pool for buffer allocations.
3826 * The number of children in a parent case, zero for a child.
3828 * The pointer to a parent RX structure (or NULL) in a child case,
3832 * 0 on success, errno value on failure.
3835 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3836 unsigned int socket, int inactive,
3837 const struct rte_eth_rxconf *conf,
3838 struct rte_mempool *mp, int children_n,
3839 struct rxq *rxq_parent)
3841 struct priv *priv = dev->data->dev_private;
3848 struct ibv_exp_query_intf_params params;
3849 struct ibv_exp_cq_init_attr cq;
3850 struct ibv_exp_res_domain_init_attr rd;
3852 enum ibv_exp_query_intf_status status;
3853 unsigned int mb_len;
3855 int parent = (children_n > 0);
3857 (void)conf; /* Thresholds configuration (ignored). */
3859 * If this is a parent queue, hardware must support RSS and
3860 * RSS must be enabled.
3862 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3864 /* Even if unused, ibv_create_cq() requires at least one
3869 mb_len = rte_pktmbuf_data_room_size(mp);
3870 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3871 ERROR("%p: invalid number of RX descriptors (must be a"
3872 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3875 /* Toggle RX checksum offload if hardware supports it. */
3877 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3878 if (priv->hw_csum_l2tun)
3879 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3880 /* Enable scattered packets support for this queue if necessary. */
3881 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3882 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
3883 (mb_len - RTE_PKTMBUF_HEADROOM)) {
3885 } else if (dev->data->dev_conf.rxmode.enable_scatter) {
3887 desc /= MLX4_PMD_SGE_WR_N;
3889 WARN("%p: the requested maximum Rx packet size (%u) is"
3890 " larger than a single mbuf (%u) and scattered"
3891 " mode has not been requested",
3893 dev->data->dev_conf.rxmode.max_rx_pkt_len,
3894 mb_len - RTE_PKTMBUF_HEADROOM);
3896 DEBUG("%p: %s scattered packets support (%u WRs)",
3897 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3898 /* Use the entire RX mempool as the memory region. */
3899 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3900 if (tmpl.mr == NULL) {
3902 ERROR("%p: MR creation failure: %s",
3903 (void *)dev, strerror(ret));
3907 attr.rd = (struct ibv_exp_res_domain_init_attr){
3908 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3909 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3910 .thread_model = IBV_EXP_THREAD_SINGLE,
3911 .msg_model = IBV_EXP_MSG_HIGH_BW,
3913 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3914 if (tmpl.rd == NULL) {
3916 ERROR("%p: RD creation failure: %s",
3917 (void *)dev, strerror(ret));
3920 if (dev->data->dev_conf.intr_conf.rxq) {
3921 tmpl.channel = ibv_create_comp_channel(priv->ctx);
3922 if (tmpl.channel == NULL) {
3924 ERROR("%p: Rx interrupt completion channel creation"
3926 (void *)dev, strerror(ret));
3930 attr.cq = (struct ibv_exp_cq_init_attr){
3931 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3932 .res_domain = tmpl.rd,
3934 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, tmpl.channel, 0,
3936 if (tmpl.cq == NULL) {
3938 ERROR("%p: CQ creation failure: %s",
3939 (void *)dev, strerror(ret));
3942 DEBUG("priv->device_attr.max_qp_wr is %d",
3943 priv->device_attr.max_qp_wr);
3944 DEBUG("priv->device_attr.max_sge is %d",
3945 priv->device_attr.max_sge);
3946 /* Allocate descriptors for RX queues, except for the RSS parent. */
3950 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3952 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3954 ERROR("%p: RXQ allocation failed: %s",
3955 (void *)dev, strerror(ret));
3959 if (parent || rxq_parent || !priv->rss) {
3960 ret = rxq_create_qp(&tmpl, desc, inactive,
3961 children_n, rxq_parent);
3966 tmpl.port_id = dev->data->port_id;
3967 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3968 attr.params = (struct ibv_exp_query_intf_params){
3969 .intf_scope = IBV_EXP_INTF_GLOBAL,
3970 .intf = IBV_EXP_INTF_CQ,
3973 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3974 if (tmpl.if_cq == NULL) {
3976 ERROR("%p: CQ interface family query failed with status %d",
3977 (void *)dev, status);
3980 /* Clean up rxq in case we're reinitializing it. */
3981 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3984 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3994 * DPDK callback to configure a RX queue.
3997 * Pointer to Ethernet device structure.
4001 * Number of descriptors to configure in queue.
4003 * NUMA socket on which memory must be allocated.
4005 * Thresholds parameters.
4007 * Memory pool for buffer allocations.
4010 * 0 on success, negative errno value on failure.
4013 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
4014 unsigned int socket, const struct rte_eth_rxconf *conf,
4015 struct rte_mempool *mp)
4018 struct priv *priv = dev->data->dev_private;
4019 struct rxq *rxq = (*priv->rxqs)[idx];
4023 if (mlx4_is_secondary())
4024 return -E_RTE_SECONDARY;
4026 DEBUG("%p: configuring queue %u for %u descriptors",
4027 (void *)dev, idx, desc);
4028 if (idx >= priv->rxqs_n) {
4029 ERROR("%p: queue index out of range (%u >= %u)",
4030 (void *)dev, idx, priv->rxqs_n);
4035 DEBUG("%p: reusing already allocated queue index %u (%p)",
4036 (void *)dev, idx, (void *)rxq);
4037 if (priv->started) {
4041 (*priv->rxqs)[idx] = NULL;
4044 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
4046 ERROR("%p: unable to allocate queue index %u",
4052 if (priv->rss && !priv->isolated) {
4053 /* The list consists of the single default one. */
4054 parent = LIST_FIRST(&priv->parents);
4055 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
4060 ret = rxq_setup(dev, rxq, desc, socket,
4061 inactive, conf, mp, 0, parent);
4065 rxq->stats.idx = idx;
4066 DEBUG("%p: adding RX queue %p to list",
4067 (void *)dev, (void *)rxq);
4068 (*priv->rxqs)[idx] = rxq;
4069 /* Update receive callback. */
4071 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4073 dev->rx_pkt_burst = mlx4_rx_burst;
4080 * DPDK callback to release a RX queue.
4083 * Generic RX queue pointer.
4086 mlx4_rx_queue_release(void *dpdk_rxq)
4088 struct rxq *rxq = (struct rxq *)dpdk_rxq;
4092 if (mlx4_is_secondary())
4098 for (i = 0; (i != priv->rxqs_n); ++i)
4099 if ((*priv->rxqs)[i] == rxq) {
4100 DEBUG("%p: removing RX queue %p from list",
4101 (void *)priv->dev, (void *)rxq);
4102 (*priv->rxqs)[i] = NULL;
4111 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4114 priv_dev_removal_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4117 priv_dev_link_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4120 * DPDK callback to start the device.
4122 * Simulate device start by attaching all configured flows.
4125 * Pointer to Ethernet device structure.
4128 * 0 on success, negative errno value on failure.
4131 mlx4_dev_start(struct rte_eth_dev *dev)
4133 struct priv *priv = dev->data->dev_private;
4139 if (mlx4_is_secondary())
4140 return -E_RTE_SECONDARY;
4142 if (priv->started) {
4146 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4148 if (priv->isolated) {
4151 } else if (priv->rss) {
4152 rxq = LIST_FIRST(&priv->parents);
4155 rxq = (*priv->rxqs)[0];
4158 /* Iterate only once when RSS is enabled. */
4160 /* Ignore nonexistent RX queues. */
4163 ret = rxq_mac_addrs_add(rxq);
4164 if (!ret && priv->promisc)
4165 ret = rxq_promiscuous_enable(rxq);
4166 if (!ret && priv->allmulti)
4167 ret = rxq_allmulticast_enable(rxq);
4170 WARN("%p: QP flow attachment failed: %s",
4171 (void *)dev, strerror(ret));
4173 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4174 ret = priv_dev_link_interrupt_handler_install(priv, dev);
4176 ERROR("%p: LSC handler install failed",
4180 ret = priv_dev_removal_interrupt_handler_install(priv, dev);
4182 ERROR("%p: RMV handler install failed",
4186 ret = priv_rx_intr_vec_enable(priv);
4188 ERROR("%p: Rx interrupt vector creation failed",
4192 ret = mlx4_priv_flow_start(priv);
4194 ERROR("%p: flow start failed: %s",
4195 (void *)dev, strerror(ret));
4203 rxq = (*priv->rxqs)[i--];
4205 rxq_allmulticast_disable(rxq);
4206 rxq_promiscuous_disable(rxq);
4207 rxq_mac_addrs_del(rxq);
4216 * DPDK callback to stop the device.
4218 * Simulate device stop by detaching all configured flows.
4221 * Pointer to Ethernet device structure.
4224 mlx4_dev_stop(struct rte_eth_dev *dev)
4226 struct priv *priv = dev->data->dev_private;
4231 if (mlx4_is_secondary())
4234 if (!priv->started) {
4238 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4240 if (priv->isolated) {
4243 } else if (priv->rss) {
4244 rxq = LIST_FIRST(&priv->parents);
4247 rxq = (*priv->rxqs)[0];
4250 mlx4_priv_flow_stop(priv);
4251 /* Iterate only once when RSS is enabled. */
4253 /* Ignore nonexistent RX queues. */
4256 rxq_allmulticast_disable(rxq);
4257 rxq_promiscuous_disable(rxq);
4258 rxq_mac_addrs_del(rxq);
4259 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4264 * Dummy DPDK callback for TX.
4266 * This function is used to temporarily replace the real callback during
4267 * unsafe control operations on the queue, or in case of error.
4270 * Generic pointer to TX queue structure.
4272 * Packets to transmit.
4274 * Number of packets in array.
4277 * Number of packets successfully transmitted (<= pkts_n).
4280 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4289 * Dummy DPDK callback for RX.
4291 * This function is used to temporarily replace the real callback during
4292 * unsafe control operations on the queue, or in case of error.
4295 * Generic pointer to RX queue structure.
4297 * Array to store received packets.
4299 * Maximum number of packets in array.
4302 * Number of packets successfully received (<= pkts_n).
4305 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4314 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4317 priv_dev_removal_interrupt_handler_uninstall(struct priv *,
4318 struct rte_eth_dev *);
4321 priv_dev_link_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4324 * DPDK callback to close the device.
4326 * Destroy all queues and objects, free memory.
4329 * Pointer to Ethernet device structure.
4332 mlx4_dev_close(struct rte_eth_dev *dev)
4334 struct priv *priv = mlx4_get_priv(dev);
4341 DEBUG("%p: closing device \"%s\"",
4343 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4344 /* Prevent crashes when queues are still in use. This is unfortunately
4345 * still required for DPDK 1.3 because some programs (such as testpmd)
4346 * never release them before closing the device. */
4347 dev->rx_pkt_burst = removed_rx_burst;
4348 dev->tx_pkt_burst = removed_tx_burst;
4349 if (priv->rxqs != NULL) {
4350 /* XXX race condition if mlx4_rx_burst() is still running. */
4352 for (i = 0; (i != priv->rxqs_n); ++i) {
4353 tmp = (*priv->rxqs)[i];
4356 (*priv->rxqs)[i] = NULL;
4363 if (priv->txqs != NULL) {
4364 /* XXX race condition if mlx4_tx_burst() is still running. */
4366 for (i = 0; (i != priv->txqs_n); ++i) {
4367 tmp = (*priv->txqs)[i];
4370 (*priv->txqs)[i] = NULL;
4378 priv_parent_list_cleanup(priv);
4379 if (priv->pd != NULL) {
4380 assert(priv->ctx != NULL);
4381 claim_zero(ibv_dealloc_pd(priv->pd));
4382 claim_zero(ibv_close_device(priv->ctx));
4384 assert(priv->ctx == NULL);
4385 priv_dev_removal_interrupt_handler_uninstall(priv, dev);
4386 priv_dev_link_interrupt_handler_uninstall(priv, dev);
4387 priv_rx_intr_vec_disable(priv);
4389 memset(priv, 0, sizeof(*priv));
4393 * Change the link state (UP / DOWN).
4396 * Pointer to Ethernet device private data.
4398 * Nonzero for link up, otherwise link down.
4401 * 0 on success, errno value on failure.
4404 priv_set_link(struct priv *priv, int up)
4406 struct rte_eth_dev *dev = priv->dev;
4411 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
4414 for (i = 0; i < priv->rxqs_n; i++)
4415 if ((*priv->rxqs)[i]->sp)
4417 /* Check if an sp queue exists.
4418 * Note: Some old frames might be received.
4420 if (i == priv->rxqs_n)
4421 dev->rx_pkt_burst = mlx4_rx_burst;
4423 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4424 dev->tx_pkt_burst = mlx4_tx_burst;
4426 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
4429 dev->rx_pkt_burst = removed_rx_burst;
4430 dev->tx_pkt_burst = removed_tx_burst;
4436 * DPDK callback to bring the link DOWN.
4439 * Pointer to Ethernet device structure.
4442 * 0 on success, errno value on failure.
4445 mlx4_set_link_down(struct rte_eth_dev *dev)
4447 struct priv *priv = dev->data->dev_private;
4451 err = priv_set_link(priv, 0);
4457 * DPDK callback to bring the link UP.
4460 * Pointer to Ethernet device structure.
4463 * 0 on success, errno value on failure.
4466 mlx4_set_link_up(struct rte_eth_dev *dev)
4468 struct priv *priv = dev->data->dev_private;
4472 err = priv_set_link(priv, 1);
4477 * DPDK callback to get information about the device.
4480 * Pointer to Ethernet device structure.
4482 * Info structure output buffer.
4485 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4487 struct priv *priv = mlx4_get_priv(dev);
4489 char ifname[IF_NAMESIZE];
4491 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
4496 /* FIXME: we should ask the device for these values. */
4497 info->min_rx_bufsize = 32;
4498 info->max_rx_pktlen = 65536;
4500 * Since we need one CQ per QP, the limit is the minimum number
4501 * between the two values.
4503 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4504 priv->device_attr.max_qp : priv->device_attr.max_cq);
4505 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4508 info->max_rx_queues = max;
4509 info->max_tx_queues = max;
4510 /* Last array entry is reserved for broadcast. */
4511 info->max_mac_addrs = (elemof(priv->mac) - 1);
4512 info->rx_offload_capa =
4514 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4515 DEV_RX_OFFLOAD_UDP_CKSUM |
4516 DEV_RX_OFFLOAD_TCP_CKSUM) :
4518 info->tx_offload_capa =
4520 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4521 DEV_TX_OFFLOAD_UDP_CKSUM |
4522 DEV_TX_OFFLOAD_TCP_CKSUM) :
4524 if (priv_get_ifname(priv, &ifname) == 0)
4525 info->if_index = if_nametoindex(ifname);
4528 ETH_LINK_SPEED_10G |
4529 ETH_LINK_SPEED_20G |
4530 ETH_LINK_SPEED_40G |
4535 static const uint32_t *
4536 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4538 static const uint32_t ptypes[] = {
4539 /* refers to rxq_cq_to_pkt_type() */
4542 RTE_PTYPE_INNER_L3_IPV4,
4543 RTE_PTYPE_INNER_L3_IPV6,
4547 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4548 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4554 * DPDK callback to get device statistics.
4557 * Pointer to Ethernet device structure.
4559 * Stats structure output buffer.
4562 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4564 struct priv *priv = mlx4_get_priv(dev);
4565 struct rte_eth_stats tmp = {0};
4572 /* Add software counters. */
4573 for (i = 0; (i != priv->rxqs_n); ++i) {
4574 struct rxq *rxq = (*priv->rxqs)[i];
4578 idx = rxq->stats.idx;
4579 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4580 #ifdef MLX4_PMD_SOFT_COUNTERS
4581 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4582 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4584 tmp.q_errors[idx] += (rxq->stats.idropped +
4585 rxq->stats.rx_nombuf);
4587 #ifdef MLX4_PMD_SOFT_COUNTERS
4588 tmp.ipackets += rxq->stats.ipackets;
4589 tmp.ibytes += rxq->stats.ibytes;
4591 tmp.ierrors += rxq->stats.idropped;
4592 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4594 for (i = 0; (i != priv->txqs_n); ++i) {
4595 struct txq *txq = (*priv->txqs)[i];
4599 idx = txq->stats.idx;
4600 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4601 #ifdef MLX4_PMD_SOFT_COUNTERS
4602 tmp.q_opackets[idx] += txq->stats.opackets;
4603 tmp.q_obytes[idx] += txq->stats.obytes;
4605 tmp.q_errors[idx] += txq->stats.odropped;
4607 #ifdef MLX4_PMD_SOFT_COUNTERS
4608 tmp.opackets += txq->stats.opackets;
4609 tmp.obytes += txq->stats.obytes;
4611 tmp.oerrors += txq->stats.odropped;
4613 #ifndef MLX4_PMD_SOFT_COUNTERS
4614 /* FIXME: retrieve and add hardware counters. */
4621 * DPDK callback to clear device statistics.
4624 * Pointer to Ethernet device structure.
4627 mlx4_stats_reset(struct rte_eth_dev *dev)
4629 struct priv *priv = mlx4_get_priv(dev);
4636 for (i = 0; (i != priv->rxqs_n); ++i) {
4637 if ((*priv->rxqs)[i] == NULL)
4639 idx = (*priv->rxqs)[i]->stats.idx;
4640 (*priv->rxqs)[i]->stats =
4641 (struct mlx4_rxq_stats){ .idx = idx };
4643 for (i = 0; (i != priv->txqs_n); ++i) {
4644 if ((*priv->txqs)[i] == NULL)
4646 idx = (*priv->txqs)[i]->stats.idx;
4647 (*priv->txqs)[i]->stats =
4648 (struct mlx4_txq_stats){ .idx = idx };
4650 #ifndef MLX4_PMD_SOFT_COUNTERS
4651 /* FIXME: reset hardware counters. */
4657 * DPDK callback to remove a MAC address.
4660 * Pointer to Ethernet device structure.
4662 * MAC address index.
4665 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4667 struct priv *priv = dev->data->dev_private;
4669 if (mlx4_is_secondary())
4674 DEBUG("%p: removing MAC address from index %" PRIu32,
4675 (void *)dev, index);
4676 /* Last array entry is reserved for broadcast. */
4677 if (index >= (elemof(priv->mac) - 1))
4679 priv_mac_addr_del(priv, index);
4685 * DPDK callback to add a MAC address.
4688 * Pointer to Ethernet device structure.
4690 * MAC address to register.
4692 * MAC address index.
4694 * VMDq pool index to associate address with (ignored).
4697 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4698 uint32_t index, uint32_t vmdq)
4700 struct priv *priv = dev->data->dev_private;
4703 if (mlx4_is_secondary())
4707 if (priv->isolated) {
4708 DEBUG("%p: cannot add MAC address, "
4709 "device is in isolated mode", (void *)dev);
4713 DEBUG("%p: adding MAC address at index %" PRIu32,
4714 (void *)dev, index);
4715 /* Last array entry is reserved for broadcast. */
4716 if (index >= (elemof(priv->mac) - 1)) {
4720 re = priv_mac_addr_add(priv, index,
4721 (const uint8_t (*)[ETHER_ADDR_LEN])
4722 mac_addr->addr_bytes);
4729 * DPDK callback to set the primary MAC address.
4732 * Pointer to Ethernet device structure.
4734 * MAC address to register.
4737 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4739 DEBUG("%p: setting primary MAC address", (void *)dev);
4740 mlx4_mac_addr_remove(dev, 0);
4741 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4745 * DPDK callback to enable promiscuous mode.
4748 * Pointer to Ethernet device structure.
4751 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4753 struct priv *priv = dev->data->dev_private;
4757 if (mlx4_is_secondary())
4760 if (priv->isolated) {
4761 DEBUG("%p: cannot enable promiscuous, "
4762 "device is in isolated mode", (void *)dev);
4766 if (priv->promisc) {
4770 /* If device isn't started, this is all we need to do. */
4774 ret = rxq_promiscuous_enable(LIST_FIRST(&priv->parents));
4781 for (i = 0; (i != priv->rxqs_n); ++i) {
4782 if ((*priv->rxqs)[i] == NULL)
4784 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4787 /* Failure, rollback. */
4789 if ((*priv->rxqs)[--i] != NULL)
4790 rxq_promiscuous_disable((*priv->rxqs)[i]);
4800 * DPDK callback to disable promiscuous mode.
4803 * Pointer to Ethernet device structure.
4806 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4808 struct priv *priv = dev->data->dev_private;
4811 if (mlx4_is_secondary())
4814 if (!priv->promisc || priv->isolated) {
4819 rxq_promiscuous_disable(LIST_FIRST(&priv->parents));
4822 for (i = 0; (i != priv->rxqs_n); ++i)
4823 if ((*priv->rxqs)[i] != NULL)
4824 rxq_promiscuous_disable((*priv->rxqs)[i]);
4831 * DPDK callback to enable allmulti mode.
4834 * Pointer to Ethernet device structure.
4837 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4839 struct priv *priv = dev->data->dev_private;
4843 if (mlx4_is_secondary())
4846 if (priv->isolated) {
4847 DEBUG("%p: cannot enable allmulticast, "
4848 "device is in isolated mode", (void *)dev);
4852 if (priv->allmulti) {
4856 /* If device isn't started, this is all we need to do. */
4860 ret = rxq_allmulticast_enable(LIST_FIRST(&priv->parents));
4867 for (i = 0; (i != priv->rxqs_n); ++i) {
4868 if ((*priv->rxqs)[i] == NULL)
4870 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4873 /* Failure, rollback. */
4875 if ((*priv->rxqs)[--i] != NULL)
4876 rxq_allmulticast_disable((*priv->rxqs)[i]);
4886 * DPDK callback to disable allmulti mode.
4889 * Pointer to Ethernet device structure.
4892 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4894 struct priv *priv = dev->data->dev_private;
4897 if (mlx4_is_secondary())
4900 if (!priv->allmulti || priv->isolated) {
4905 rxq_allmulticast_disable(LIST_FIRST(&priv->parents));
4908 for (i = 0; (i != priv->rxqs_n); ++i)
4909 if ((*priv->rxqs)[i] != NULL)
4910 rxq_allmulticast_disable((*priv->rxqs)[i]);
4917 * DPDK callback to retrieve physical link information.
4920 * Pointer to Ethernet device structure.
4921 * @param wait_to_complete
4922 * Wait for request completion (ignored).
4925 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4927 const struct priv *priv = mlx4_get_priv(dev);
4928 struct ethtool_cmd edata = {
4932 struct rte_eth_link dev_link;
4935 /* priv_lock() is not taken to allow concurrent calls. */
4939 (void)wait_to_complete;
4940 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4941 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4944 memset(&dev_link, 0, sizeof(dev_link));
4945 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4946 (ifr.ifr_flags & IFF_RUNNING));
4947 ifr.ifr_data = (void *)&edata;
4948 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4949 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4953 link_speed = ethtool_cmd_speed(&edata);
4954 if (link_speed == -1)
4955 dev_link.link_speed = 0;
4957 dev_link.link_speed = link_speed;
4958 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4959 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4960 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4961 ETH_LINK_SPEED_FIXED);
4962 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4963 /* Link status changed. */
4964 dev->data->dev_link = dev_link;
4967 /* Link status is still the same. */
4972 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
4973 struct rte_pci_addr *pci_addr);
4976 * DPDK callback to change the MTU.
4978 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4979 * received). Use this as a hint to enable/disable scattered packets support
4980 * and improve performance when not needed.
4981 * Since failure is not an option, reconfiguring queues on the fly is not
4985 * Pointer to Ethernet device structure.
4990 * 0 on success, negative errno value on failure.
4993 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4995 struct priv *priv = dev->data->dev_private;
4998 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
5001 if (mlx4_is_secondary())
5002 return -E_RTE_SECONDARY;
5004 /* Set kernel interface MTU first. */
5005 if (priv_set_mtu(priv, mtu)) {
5007 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
5011 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
5013 /* Temporarily replace RX handler with a fake one, assuming it has not
5014 * been copied elsewhere. */
5015 dev->rx_pkt_burst = removed_rx_burst;
5016 /* Make sure everyone has left mlx4_rx_burst() and uses
5017 * removed_rx_burst() instead. */
5020 /* Reconfigure each RX queue. */
5021 for (i = 0; (i != priv->rxqs_n); ++i) {
5022 struct rxq *rxq = (*priv->rxqs)[i];
5023 unsigned int max_frame_len;
5027 /* Calculate new maximum frame length according to MTU. */
5028 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
5029 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
5030 /* Provide new values to rxq_setup(). */
5031 dev->data->dev_conf.rxmode.jumbo_frame =
5032 (max_frame_len > ETHER_MAX_LEN);
5033 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
5034 ret = rxq_rehash(dev, rxq);
5036 /* Force SP RX if that queue requires it and abort. */
5038 rx_func = mlx4_rx_burst_sp;
5041 /* Reenable non-RSS queue attributes. No need to check
5042 * for errors at this stage. */
5043 if (!priv->rss && !priv->isolated) {
5044 rxq_mac_addrs_add(rxq);
5046 rxq_promiscuous_enable(rxq);
5048 rxq_allmulticast_enable(rxq);
5050 /* Scattered burst function takes priority. */
5052 rx_func = mlx4_rx_burst_sp;
5054 /* Burst functions can now be called again. */
5056 dev->rx_pkt_burst = rx_func;
5064 * DPDK callback to get flow control status.
5067 * Pointer to Ethernet device structure.
5068 * @param[out] fc_conf
5069 * Flow control output buffer.
5072 * 0 on success, negative errno value on failure.
5075 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
5077 struct priv *priv = dev->data->dev_private;
5079 struct ethtool_pauseparam ethpause = {
5080 .cmd = ETHTOOL_GPAUSEPARAM
5084 if (mlx4_is_secondary())
5085 return -E_RTE_SECONDARY;
5086 ifr.ifr_data = (void *)ðpause;
5088 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
5090 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
5096 fc_conf->autoneg = ethpause.autoneg;
5097 if (ethpause.rx_pause && ethpause.tx_pause)
5098 fc_conf->mode = RTE_FC_FULL;
5099 else if (ethpause.rx_pause)
5100 fc_conf->mode = RTE_FC_RX_PAUSE;
5101 else if (ethpause.tx_pause)
5102 fc_conf->mode = RTE_FC_TX_PAUSE;
5104 fc_conf->mode = RTE_FC_NONE;
5114 * DPDK callback to modify flow control parameters.
5117 * Pointer to Ethernet device structure.
5118 * @param[in] fc_conf
5119 * Flow control parameters.
5122 * 0 on success, negative errno value on failure.
5125 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
5127 struct priv *priv = dev->data->dev_private;
5129 struct ethtool_pauseparam ethpause = {
5130 .cmd = ETHTOOL_SPAUSEPARAM
5134 if (mlx4_is_secondary())
5135 return -E_RTE_SECONDARY;
5136 ifr.ifr_data = (void *)ðpause;
5137 ethpause.autoneg = fc_conf->autoneg;
5138 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
5139 (fc_conf->mode & RTE_FC_RX_PAUSE))
5140 ethpause.rx_pause = 1;
5142 ethpause.rx_pause = 0;
5144 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
5145 (fc_conf->mode & RTE_FC_TX_PAUSE))
5146 ethpause.tx_pause = 1;
5148 ethpause.tx_pause = 0;
5151 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
5153 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
5167 * Configure a VLAN filter.
5170 * Pointer to Ethernet device structure.
5172 * VLAN ID to filter.
5177 * 0 on success, errno value on failure.
5180 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5182 struct priv *priv = dev->data->dev_private;
5184 unsigned int j = -1;
5186 DEBUG("%p: %s VLAN filter ID %" PRIu16,
5187 (void *)dev, (on ? "enable" : "disable"), vlan_id);
5188 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
5189 if (!priv->vlan_filter[i].enabled) {
5190 /* Unused index, remember it. */
5194 if (priv->vlan_filter[i].id != vlan_id)
5196 /* This VLAN ID is already known, use its index. */
5200 /* Check if there's room for another VLAN filter. */
5201 if (j == (unsigned int)-1)
5204 * VLAN filters apply to all configured MAC addresses, flow
5205 * specifications must be reconfigured accordingly.
5207 priv->vlan_filter[j].id = vlan_id;
5208 if ((on) && (!priv->vlan_filter[j].enabled)) {
5210 * Filter is disabled, enable it.
5211 * Rehashing flows in all RX queues is necessary.
5214 rxq_mac_addrs_del(LIST_FIRST(&priv->parents));
5216 for (i = 0; (i != priv->rxqs_n); ++i)
5217 if ((*priv->rxqs)[i] != NULL)
5218 rxq_mac_addrs_del((*priv->rxqs)[i]);
5219 priv->vlan_filter[j].enabled = 1;
5220 if (priv->started) {
5222 rxq_mac_addrs_add(LIST_FIRST(&priv->parents));
5224 for (i = 0; (i != priv->rxqs_n); ++i) {
5225 if ((*priv->rxqs)[i] == NULL)
5227 rxq_mac_addrs_add((*priv->rxqs)[i]);
5230 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
5232 * Filter is enabled, disable it.
5233 * Rehashing flows in all RX queues is necessary.
5236 rxq_mac_addrs_del(LIST_FIRST(&priv->parents));
5238 for (i = 0; (i != priv->rxqs_n); ++i)
5239 if ((*priv->rxqs)[i] != NULL)
5240 rxq_mac_addrs_del((*priv->rxqs)[i]);
5241 priv->vlan_filter[j].enabled = 0;
5242 if (priv->started) {
5244 rxq_mac_addrs_add(LIST_FIRST(&priv->parents));
5246 for (i = 0; (i != priv->rxqs_n); ++i) {
5247 if ((*priv->rxqs)[i] == NULL)
5249 rxq_mac_addrs_add((*priv->rxqs)[i]);
5257 * DPDK callback to configure a VLAN filter.
5260 * Pointer to Ethernet device structure.
5262 * VLAN ID to filter.
5267 * 0 on success, negative errno value on failure.
5270 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5272 struct priv *priv = dev->data->dev_private;
5275 if (mlx4_is_secondary())
5276 return -E_RTE_SECONDARY;
5278 if (priv->isolated) {
5279 DEBUG("%p: cannot set vlan filter, "
5280 "device is in isolated mode", (void *)dev);
5284 ret = vlan_filter_set(dev, vlan_id, on);
5290 const struct rte_flow_ops mlx4_flow_ops = {
5291 .validate = mlx4_flow_validate,
5292 .create = mlx4_flow_create,
5293 .destroy = mlx4_flow_destroy,
5294 .flush = mlx4_flow_flush,
5296 .isolate = mlx4_flow_isolate,
5300 * Manage filter operations.
5303 * Pointer to Ethernet device structure.
5304 * @param filter_type
5307 * Operation to perform.
5309 * Pointer to operation-specific structure.
5312 * 0 on success, negative errno value on failure.
5315 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
5316 enum rte_filter_type filter_type,
5317 enum rte_filter_op filter_op,
5322 switch (filter_type) {
5323 case RTE_ETH_FILTER_GENERIC:
5324 if (filter_op != RTE_ETH_FILTER_GET)
5326 *(const void **)arg = &mlx4_flow_ops;
5328 case RTE_ETH_FILTER_FDIR:
5329 DEBUG("%p: filter type FDIR is not supported by this PMD",
5333 ERROR("%p: filter type (%d) not supported",
5334 (void *)dev, filter_type);
5340 static const struct eth_dev_ops mlx4_dev_ops = {
5341 .dev_configure = mlx4_dev_configure,
5342 .dev_start = mlx4_dev_start,
5343 .dev_stop = mlx4_dev_stop,
5344 .dev_set_link_down = mlx4_set_link_down,
5345 .dev_set_link_up = mlx4_set_link_up,
5346 .dev_close = mlx4_dev_close,
5347 .promiscuous_enable = mlx4_promiscuous_enable,
5348 .promiscuous_disable = mlx4_promiscuous_disable,
5349 .allmulticast_enable = mlx4_allmulticast_enable,
5350 .allmulticast_disable = mlx4_allmulticast_disable,
5351 .link_update = mlx4_link_update,
5352 .stats_get = mlx4_stats_get,
5353 .stats_reset = mlx4_stats_reset,
5354 .queue_stats_mapping_set = NULL,
5355 .dev_infos_get = mlx4_dev_infos_get,
5356 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5357 .vlan_filter_set = mlx4_vlan_filter_set,
5358 .vlan_tpid_set = NULL,
5359 .vlan_strip_queue_set = NULL,
5360 .vlan_offload_set = NULL,
5361 .rx_queue_setup = mlx4_rx_queue_setup,
5362 .tx_queue_setup = mlx4_tx_queue_setup,
5363 .rx_queue_release = mlx4_rx_queue_release,
5364 .tx_queue_release = mlx4_tx_queue_release,
5366 .dev_led_off = NULL,
5367 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5368 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5369 .priority_flow_ctrl_set = NULL,
5370 .mac_addr_remove = mlx4_mac_addr_remove,
5371 .mac_addr_add = mlx4_mac_addr_add,
5372 .mac_addr_set = mlx4_mac_addr_set,
5373 .mtu_set = mlx4_dev_set_mtu,
5374 .filter_ctrl = mlx4_dev_filter_ctrl,
5375 .rx_queue_intr_enable = mlx4_rx_intr_enable,
5376 .rx_queue_intr_disable = mlx4_rx_intr_disable,
5380 * Get PCI information from struct ibv_device.
5383 * Pointer to Ethernet device structure.
5384 * @param[out] pci_addr
5385 * PCI bus address output buffer.
5388 * 0 on success, -1 on failure and errno is set.
5391 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5392 struct rte_pci_addr *pci_addr)
5396 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5398 file = fopen(path, "rb");
5401 while (fgets(line, sizeof(line), file) == line) {
5402 size_t len = strlen(line);
5405 /* Truncate long lines. */
5406 if (len == (sizeof(line) - 1))
5407 while (line[(len - 1)] != '\n') {
5411 line[(len - 1)] = ret;
5413 /* Extract information. */
5416 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5420 &pci_addr->function) == 4) {
5430 * Get MAC address by querying netdevice.
5433 * struct priv for the requested device.
5435 * MAC address output buffer.
5438 * 0 on success, -1 on failure and errno is set.
5441 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5443 struct ifreq request;
5445 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5447 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5452 * Retrieve integer value from environment variable.
5455 * Environment variable name.
5458 * Integer value, 0 if the variable is not set.
5461 mlx4_getenv_int(const char *name)
5463 const char *val = getenv(name);
5471 mlx4_dev_link_status_handler(void *);
5473 mlx4_dev_interrupt_handler(void *);
5476 * Link/device status handler.
5479 * Pointer to private structure.
5481 * Pointer to the rte_eth_dev structure.
5483 * Pointer to event flags holder.
5489 priv_dev_status_handler(struct priv *priv, struct rte_eth_dev *dev,
5492 struct ibv_async_event event;
5493 int port_change = 0;
5494 struct rte_eth_link *link = &dev->data->dev_link;
5498 /* Read all message and acknowledge them. */
5500 if (ibv_get_async_event(priv->ctx, &event))
5502 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
5503 event.event_type == IBV_EVENT_PORT_ERR) &&
5504 (priv->intr_conf.lsc == 1)) {
5507 } else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
5508 priv->intr_conf.rmv == 1) {
5509 *events |= (1 << RTE_ETH_EVENT_INTR_RMV);
5512 DEBUG("event type %d on port %d not handled",
5513 event.event_type, event.element.port_num);
5514 ibv_ack_async_event(&event);
5518 mlx4_link_update(dev, 0);
5519 if (((link->link_speed == 0) && link->link_status) ||
5520 ((link->link_speed != 0) && !link->link_status)) {
5521 if (!priv->pending_alarm) {
5522 /* Inconsistent status, check again later. */
5523 priv->pending_alarm = 1;
5524 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5525 mlx4_dev_link_status_handler,
5529 *events |= (1 << RTE_ETH_EVENT_INTR_LSC);
5535 * Handle delayed link status event.
5538 * Registered argument.
5541 mlx4_dev_link_status_handler(void *arg)
5543 struct rte_eth_dev *dev = arg;
5544 struct priv *priv = dev->data->dev_private;
5549 assert(priv->pending_alarm == 1);
5550 priv->pending_alarm = 0;
5551 ret = priv_dev_status_handler(priv, dev, &events);
5553 if (ret > 0 && events & (1 << RTE_ETH_EVENT_INTR_LSC))
5554 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
5559 * Handle interrupts from the NIC.
5561 * @param[in] intr_handle
5562 * Interrupt handler.
5564 * Callback argument.
5567 mlx4_dev_interrupt_handler(void *cb_arg)
5569 struct rte_eth_dev *dev = cb_arg;
5570 struct priv *priv = dev->data->dev_private;
5576 ret = priv_dev_status_handler(priv, dev, &ev);
5579 for (i = RTE_ETH_EVENT_UNKNOWN;
5580 i < RTE_ETH_EVENT_MAX;
5582 if (ev & (1 << i)) {
5584 _rte_eth_dev_callback_process(dev, i, NULL,
5590 WARN("%d event%s not processed", ret,
5591 (ret > 1 ? "s were" : " was"));
5596 * Uninstall interrupt handler.
5599 * Pointer to private structure.
5601 * Pointer to the rte_eth_dev structure.
5603 * 0 on success, negative errno value on failure.
5606 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5610 if (priv->intr_conf.lsc ||
5611 priv->intr_conf.rmv)
5613 ret = rte_intr_callback_unregister(&priv->intr_handle,
5614 mlx4_dev_interrupt_handler,
5617 ERROR("rte_intr_callback_unregister failed with %d"
5619 (errno ? " (errno: " : ""),
5620 (errno ? strerror(errno) : ""),
5621 (errno ? ")" : ""));
5623 priv->intr_handle.fd = 0;
5624 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
5629 * Install interrupt handler.
5632 * Pointer to private structure.
5634 * Pointer to the rte_eth_dev structure.
5636 * 0 on success, negative errno value on failure.
5639 priv_dev_interrupt_handler_install(struct priv *priv,
5640 struct rte_eth_dev *dev)
5645 /* Check whether the interrupt handler has already been installed
5646 * for either type of interrupt
5648 if (priv->intr_conf.lsc &&
5649 priv->intr_conf.rmv &&
5650 priv->intr_handle.fd)
5652 assert(priv->ctx->async_fd > 0);
5653 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5654 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5656 INFO("failed to change file descriptor async event queue");
5657 dev->data->dev_conf.intr_conf.lsc = 0;
5658 dev->data->dev_conf.intr_conf.rmv = 0;
5661 priv->intr_handle.fd = priv->ctx->async_fd;
5662 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5663 rc = rte_intr_callback_register(&priv->intr_handle,
5664 mlx4_dev_interrupt_handler,
5667 ERROR("rte_intr_callback_register failed "
5668 " (errno: %s)", strerror(errno));
5676 * Uninstall interrupt handler.
5679 * Pointer to private structure.
5681 * Pointer to the rte_eth_dev structure.
5683 * 0 on success, negative value on error.
5686 priv_dev_removal_interrupt_handler_uninstall(struct priv *priv,
5687 struct rte_eth_dev *dev)
5689 if (dev->data->dev_conf.intr_conf.rmv) {
5690 priv->intr_conf.rmv = 0;
5691 return priv_dev_interrupt_handler_uninstall(priv, dev);
5697 * Uninstall interrupt handler.
5700 * Pointer to private structure.
5702 * Pointer to the rte_eth_dev structure.
5704 * 0 on success, negative value on error,
5707 priv_dev_link_interrupt_handler_uninstall(struct priv *priv,
5708 struct rte_eth_dev *dev)
5712 if (dev->data->dev_conf.intr_conf.lsc) {
5713 priv->intr_conf.lsc = 0;
5714 ret = priv_dev_interrupt_handler_uninstall(priv, dev);
5718 if (priv->pending_alarm)
5719 if (rte_eal_alarm_cancel(mlx4_dev_link_status_handler,
5721 ERROR("rte_eal_alarm_cancel failed "
5722 " (errno: %s)", strerror(rte_errno));
5725 priv->pending_alarm = 0;
5730 * Install link interrupt handler.
5733 * Pointer to private structure.
5735 * Pointer to the rte_eth_dev structure.
5737 * 0 on success, negative value on error.
5740 priv_dev_link_interrupt_handler_install(struct priv *priv,
5741 struct rte_eth_dev *dev)
5745 if (dev->data->dev_conf.intr_conf.lsc) {
5746 ret = priv_dev_interrupt_handler_install(priv, dev);
5749 priv->intr_conf.lsc = 1;
5755 * Install removal interrupt handler.
5758 * Pointer to private structure.
5760 * Pointer to the rte_eth_dev structure.
5762 * 0 on success, negative value on error.
5765 priv_dev_removal_interrupt_handler_install(struct priv *priv,
5766 struct rte_eth_dev *dev)
5770 if (dev->data->dev_conf.intr_conf.rmv) {
5771 ret = priv_dev_interrupt_handler_install(priv, dev);
5774 priv->intr_conf.rmv = 1;
5780 * Allocate queue vector and fill epoll fd list for Rx interrupts.
5783 * Pointer to private structure.
5786 * 0 on success, negative on failure.
5789 priv_rx_intr_vec_enable(struct priv *priv)
5792 unsigned int rxqs_n = priv->rxqs_n;
5793 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
5794 unsigned int count = 0;
5795 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
5797 if (!priv->dev->data->dev_conf.intr_conf.rxq)
5799 priv_rx_intr_vec_disable(priv);
5800 intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
5801 if (intr_handle->intr_vec == NULL) {
5802 ERROR("failed to allocate memory for interrupt vector,"
5803 " Rx interrupts will not be supported");
5806 intr_handle->type = RTE_INTR_HANDLE_EXT;
5807 for (i = 0; i != n; ++i) {
5808 struct rxq *rxq = (*priv->rxqs)[i];
5813 /* Skip queues that cannot request interrupts. */
5814 if (!rxq || !rxq->channel) {
5815 /* Use invalid intr_vec[] index to disable entry. */
5816 intr_handle->intr_vec[i] =
5817 RTE_INTR_VEC_RXTX_OFFSET +
5818 RTE_MAX_RXTX_INTR_VEC_ID;
5821 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
5822 ERROR("too many Rx queues for interrupt vector size"
5823 " (%d), Rx interrupts cannot be enabled",
5824 RTE_MAX_RXTX_INTR_VEC_ID);
5825 priv_rx_intr_vec_disable(priv);
5828 fd = rxq->channel->fd;
5829 flags = fcntl(fd, F_GETFL);
5830 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
5832 ERROR("failed to make Rx interrupt file descriptor"
5833 " %d non-blocking for queue index %d", fd, i);
5834 priv_rx_intr_vec_disable(priv);
5837 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
5838 intr_handle->efds[count] = fd;
5842 priv_rx_intr_vec_disable(priv);
5844 intr_handle->nb_efd = count;
5849 * Clean up Rx interrupts handler.
5852 * Pointer to private structure.
5855 priv_rx_intr_vec_disable(struct priv *priv)
5857 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
5859 rte_intr_free_epoll_fd(intr_handle);
5860 free(intr_handle->intr_vec);
5861 intr_handle->nb_efd = 0;
5862 intr_handle->intr_vec = NULL;
5866 * DPDK callback for Rx queue interrupt enable.
5869 * Pointer to Ethernet device structure.
5874 * 0 on success, negative on failure.
5877 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)
5879 struct priv *priv = dev->data->dev_private;
5880 struct rxq *rxq = (*priv->rxqs)[idx];
5883 if (!rxq || !rxq->channel)
5886 ret = ibv_req_notify_cq(rxq->cq, 0);
5888 WARN("unable to arm interrupt on rx queue %d", idx);
5893 * DPDK callback for Rx queue interrupt disable.
5896 * Pointer to Ethernet device structure.
5901 * 0 on success, negative on failure.
5904 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)
5906 struct priv *priv = dev->data->dev_private;
5907 struct rxq *rxq = (*priv->rxqs)[idx];
5908 struct ibv_cq *ev_cq;
5912 if (!rxq || !rxq->channel) {
5915 ret = ibv_get_cq_event(rxq->cq->channel, &ev_cq, &ev_ctx);
5916 if (ret || ev_cq != rxq->cq)
5920 WARN("unable to disable interrupt on rx queue %d",
5923 ibv_ack_cq_events(rxq->cq, 1);
5928 * Verify and store value for device argument.
5931 * Key argument to verify.
5933 * Value associated with key.
5934 * @param[in, out] conf
5935 * Shared configuration data.
5938 * 0 on success, negative errno value on failure.
5941 mlx4_arg_parse(const char *key, const char *val, struct mlx4_conf *conf)
5946 tmp = strtoul(val, NULL, 0);
5948 WARN("%s: \"%s\" is not a valid integer", key, val);
5951 if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) {
5952 uint32_t ports = rte_log2_u32(conf->ports.present);
5955 ERROR("port index %lu outside range [0,%" PRIu32 ")",
5959 if (!(conf->ports.present & (1 << tmp))) {
5960 ERROR("invalid port index %lu", tmp);
5963 conf->ports.enabled |= 1 << tmp;
5965 WARN("%s: unknown parameter", key);
5972 * Parse device parameters.
5975 * Device arguments structure.
5978 * 0 on success, negative errno value on failure.
5981 mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)
5983 struct rte_kvargs *kvlist;
5984 unsigned int arg_count;
5988 if (devargs == NULL)
5990 kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params);
5991 if (kvlist == NULL) {
5992 ERROR("failed to parse kvargs");
5995 /* Process parameters. */
5996 for (i = 0; pmd_mlx4_init_params[i]; ++i) {
5997 arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);
5998 while (arg_count-- > 0) {
5999 ret = rte_kvargs_process(kvlist,
6000 MLX4_PMD_PORT_KVARG,
6001 (int (*)(const char *,
6011 rte_kvargs_free(kvlist);
6015 static struct rte_pci_driver mlx4_driver;
6018 * DPDK callback to register a PCI device.
6020 * This function creates an Ethernet device for each port of a given
6023 * @param[in] pci_drv
6024 * PCI driver structure (mlx4_driver).
6025 * @param[in] pci_dev
6026 * PCI device information.
6029 * 0 on success, negative errno value on failure.
6032 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
6034 struct ibv_device **list;
6035 struct ibv_device *ibv_dev;
6037 struct ibv_context *attr_ctx = NULL;
6038 struct ibv_device_attr device_attr;
6039 struct mlx4_conf conf = {
6046 assert(pci_drv == &mlx4_driver);
6048 list = ibv_get_device_list(&i);
6051 if (errno == ENOSYS)
6052 ERROR("cannot list devices, is ib_uverbs loaded?");
6057 * For each listed device, check related sysfs entry against
6058 * the provided PCI ID.
6061 struct rte_pci_addr pci_addr;
6064 DEBUG("checking device \"%s\"", list[i]->name);
6065 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
6067 if ((pci_dev->addr.domain != pci_addr.domain) ||
6068 (pci_dev->addr.bus != pci_addr.bus) ||
6069 (pci_dev->addr.devid != pci_addr.devid) ||
6070 (pci_dev->addr.function != pci_addr.function))
6072 vf = (pci_dev->id.device_id ==
6073 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
6074 INFO("PCI information matches, using device \"%s\" (VF: %s)",
6075 list[i]->name, (vf ? "true" : "false"));
6076 attr_ctx = ibv_open_device(list[i]);
6080 if (attr_ctx == NULL) {
6081 ibv_free_device_list(list);
6084 ERROR("cannot access device, is mlx4_ib loaded?");
6087 ERROR("cannot use device, are drivers up to date?");
6095 DEBUG("device opened");
6096 if (ibv_query_device(attr_ctx, &device_attr)) {
6100 INFO("%u port(s) detected", device_attr.phys_port_cnt);
6102 conf.ports.present |= (UINT64_C(1) << device_attr.phys_port_cnt) - 1;
6103 if (mlx4_args(pci_dev->device.devargs, &conf)) {
6104 ERROR("failed to process device arguments");
6108 /* Use all ports when none are defined */
6109 if (!conf.ports.enabled)
6110 conf.ports.enabled = conf.ports.present;
6111 for (i = 0; i < device_attr.phys_port_cnt; i++) {
6112 uint32_t port = i + 1; /* ports are indexed from one */
6113 struct ibv_context *ctx = NULL;
6114 struct ibv_port_attr port_attr;
6115 struct ibv_pd *pd = NULL;
6116 struct priv *priv = NULL;
6117 struct rte_eth_dev *eth_dev = NULL;
6118 #ifdef HAVE_EXP_QUERY_DEVICE
6119 struct ibv_exp_device_attr exp_device_attr;
6120 #endif /* HAVE_EXP_QUERY_DEVICE */
6121 struct ether_addr mac;
6123 /* If port is not enabled, skip. */
6124 if (!(conf.ports.enabled & (1 << i)))
6126 #ifdef HAVE_EXP_QUERY_DEVICE
6127 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
6129 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
6130 #endif /* RSS_SUPPORT */
6131 #endif /* HAVE_EXP_QUERY_DEVICE */
6133 DEBUG("using port %u", port);
6135 ctx = ibv_open_device(ibv_dev);
6141 /* Check port status. */
6142 err = ibv_query_port(ctx, port, &port_attr);
6144 ERROR("port query failed: %s", strerror(err));
6149 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
6150 ERROR("port %d is not configured in Ethernet mode",
6156 if (port_attr.state != IBV_PORT_ACTIVE)
6157 DEBUG("port %d is not active: \"%s\" (%d)",
6158 port, ibv_port_state_str(port_attr.state),
6161 /* Allocate protection domain. */
6162 pd = ibv_alloc_pd(ctx);
6164 ERROR("PD allocation failure");
6169 /* from rte_ethdev.c */
6170 priv = rte_zmalloc("ethdev private structure",
6172 RTE_CACHE_LINE_SIZE);
6174 ERROR("priv allocation failure");
6180 priv->device_attr = device_attr;
6183 priv->mtu = ETHER_MTU;
6184 #ifdef HAVE_EXP_QUERY_DEVICE
6185 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
6186 ERROR("ibv_exp_query_device() failed");
6191 if ((exp_device_attr.exp_device_cap_flags &
6192 IBV_EXP_DEVICE_QPG) &&
6193 (exp_device_attr.exp_device_cap_flags &
6194 IBV_EXP_DEVICE_UD_RSS) &&
6195 (exp_device_attr.comp_mask &
6196 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
6197 (exp_device_attr.max_rss_tbl_sz > 0)) {
6200 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
6204 priv->max_rss_tbl_sz = 0;
6206 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
6207 IBV_EXP_DEVICE_UD_TSS);
6208 DEBUG("device flags: %s%s%s",
6209 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
6210 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
6211 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
6213 DEBUG("maximum RSS indirection table size: %u",
6214 exp_device_attr.max_rss_tbl_sz);
6215 #endif /* RSS_SUPPORT */
6218 ((exp_device_attr.exp_device_cap_flags &
6219 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
6220 (exp_device_attr.exp_device_cap_flags &
6221 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
6222 DEBUG("checksum offloading is %ssupported",
6223 (priv->hw_csum ? "" : "not "));
6225 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
6226 IBV_EXP_DEVICE_VXLAN_SUPPORT);
6227 DEBUG("L2 tunnel checksum offloads are %ssupported",
6228 (priv->hw_csum_l2tun ? "" : "not "));
6231 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
6233 if (priv->inl_recv_size) {
6234 exp_device_attr.comp_mask =
6235 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
6236 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
6237 INFO("Couldn't query device for inline-receive"
6239 priv->inl_recv_size = 0;
6241 if ((unsigned)exp_device_attr.inline_recv_sz <
6242 priv->inl_recv_size) {
6243 INFO("Max inline-receive (%d) <"
6244 " requested inline-receive (%u)",
6245 exp_device_attr.inline_recv_sz,
6246 priv->inl_recv_size);
6247 priv->inl_recv_size =
6248 exp_device_attr.inline_recv_sz;
6251 INFO("Set inline receive size to %u",
6252 priv->inl_recv_size);
6254 #endif /* INLINE_RECV */
6255 #endif /* HAVE_EXP_QUERY_DEVICE */
6257 (void)mlx4_getenv_int;
6259 /* Configure the first MAC address by default. */
6260 if (priv_get_mac(priv, &mac.addr_bytes)) {
6261 ERROR("cannot get MAC address, is mlx4_en loaded?"
6262 " (errno: %s)", strerror(errno));
6266 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
6268 mac.addr_bytes[0], mac.addr_bytes[1],
6269 mac.addr_bytes[2], mac.addr_bytes[3],
6270 mac.addr_bytes[4], mac.addr_bytes[5]);
6271 /* Register MAC and broadcast addresses. */
6272 claim_zero(priv_mac_addr_add(priv, 0,
6273 (const uint8_t (*)[ETHER_ADDR_LEN])
6275 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
6276 &(const uint8_t [ETHER_ADDR_LEN])
6277 { "\xff\xff\xff\xff\xff\xff" }));
6280 char ifname[IF_NAMESIZE];
6282 if (priv_get_ifname(priv, &ifname) == 0)
6283 DEBUG("port %u ifname is \"%s\"",
6284 priv->port, ifname);
6286 DEBUG("port %u ifname is unknown", priv->port);
6289 /* Get actual MTU if possible. */
6290 priv_get_mtu(priv, &priv->mtu);
6291 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
6293 /* from rte_ethdev.c */
6295 char name[RTE_ETH_NAME_MAX_LEN];
6297 snprintf(name, sizeof(name), "%s port %u",
6298 ibv_get_device_name(ibv_dev), port);
6299 eth_dev = rte_eth_dev_allocate(name);
6301 if (eth_dev == NULL) {
6302 ERROR("can not allocate rte ethdev");
6307 /* Secondary processes have to use local storage for their
6308 * private data as well as a copy of eth_dev->data, but this
6309 * pointer must not be modified before burst functions are
6310 * actually called. */
6311 if (mlx4_is_secondary()) {
6312 struct mlx4_secondary_data *sd =
6313 &mlx4_secondary_data[eth_dev->data->port_id];
6315 sd->primary_priv = eth_dev->data->dev_private;
6316 if (sd->primary_priv == NULL) {
6317 ERROR("no private data for port %u",
6318 eth_dev->data->port_id);
6322 sd->shared_dev_data = eth_dev->data;
6323 rte_spinlock_init(&sd->lock);
6324 memcpy(sd->data.name, sd->shared_dev_data->name,
6325 sizeof(sd->data.name));
6326 sd->data.dev_private = priv;
6327 sd->data.rx_mbuf_alloc_failed = 0;
6328 sd->data.mtu = ETHER_MTU;
6329 sd->data.port_id = sd->shared_dev_data->port_id;
6330 sd->data.mac_addrs = priv->mac;
6331 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
6332 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
6334 eth_dev->data->dev_private = priv;
6335 eth_dev->data->mac_addrs = priv->mac;
6337 eth_dev->device = &pci_dev->device;
6339 rte_eth_copy_pci_info(eth_dev, pci_dev);
6341 eth_dev->device->driver = &mlx4_driver.driver;
6344 * Copy and override interrupt handle to prevent it from
6345 * being shared between all ethdev instances of a given PCI
6346 * device. This is required to properly handle Rx interrupts
6349 priv->intr_handle_dev = *eth_dev->intr_handle;
6350 eth_dev->intr_handle = &priv->intr_handle_dev;
6352 priv->dev = eth_dev;
6353 eth_dev->dev_ops = &mlx4_dev_ops;
6354 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
6356 /* Bring Ethernet device up. */
6357 DEBUG("forcing Ethernet interface up");
6358 priv_set_flags(priv, ~IFF_UP, IFF_UP);
6359 /* Update link status once if waiting for LSC. */
6360 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
6361 mlx4_link_update(eth_dev, 0);
6367 claim_zero(ibv_dealloc_pd(pd));
6369 claim_zero(ibv_close_device(ctx));
6371 rte_eth_dev_release_port(eth_dev);
6374 if (i == device_attr.phys_port_cnt)
6378 * XXX if something went wrong in the loop above, there is a resource
6379 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
6380 * long as the dpdk does not provide a way to deallocate a ethdev and a
6381 * way to enumerate the registered ethdevs to free the previous ones.
6386 claim_zero(ibv_close_device(attr_ctx));
6388 ibv_free_device_list(list);
6393 static const struct rte_pci_id mlx4_pci_id_map[] = {
6395 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6396 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
6399 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6400 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
6403 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6404 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
6411 static struct rte_pci_driver mlx4_driver = {
6413 .name = MLX4_DRIVER_NAME
6415 .id_table = mlx4_pci_id_map,
6416 .probe = mlx4_pci_probe,
6417 .drv_flags = RTE_PCI_DRV_INTR_LSC |
6418 RTE_PCI_DRV_INTR_RMV,
6422 * Driver initialization routine.
6424 RTE_INIT(rte_mlx4_pmd_init);
6426 rte_mlx4_pmd_init(void)
6428 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
6430 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
6431 * huge pages. Calling ibv_fork_init() during init allows
6432 * applications to use fork() safely for purposes other than
6433 * using this PMD, which is not supported in forked processes.
6435 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
6437 rte_pci_register(&mlx4_driver);
6440 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
6441 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
6442 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
6443 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");