4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
57 #include <linux/ethtool.h>
58 #include <linux/sockios.h>
61 #include <rte_ether.h>
62 #include <rte_ethdev.h>
63 #include <rte_ethdev_pci.h>
66 #include <rte_errno.h>
67 #include <rte_mempool.h>
68 #include <rte_prefetch.h>
69 #include <rte_malloc.h>
70 #include <rte_spinlock.h>
71 #include <rte_atomic.h>
73 #include <rte_alarm.h>
74 #include <rte_memory.h>
76 #include <rte_kvargs.h>
77 #include <rte_interrupts.h>
78 #include <rte_branch_prediction.h>
80 /* Generated configuration header. */
81 #include "mlx4_autoconf.h"
85 #include "mlx4_flow.h"
87 /* Convenience macros for accessing mbuf fields. */
88 #define NEXT(m) ((m)->next)
89 #define DATA_LEN(m) ((m)->data_len)
90 #define PKT_LEN(m) ((m)->pkt_len)
91 #define DATA_OFF(m) ((m)->data_off)
92 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
93 #define NB_SEGS(m) ((m)->nb_segs)
94 #define PORT(m) ((m)->port)
96 /* Work Request ID data type (64 bit). */
105 #define WR_ID(o) (((wr_id_t *)&(o))->data)
107 /* Transpose flags. Useful to convert IBV to DPDK flags. */
108 #define TRANSPOSE(val, from, to) \
109 (((from) >= (to)) ? \
110 (((val) & (from)) / ((from) / (to))) : \
111 (((val) & (from)) * ((to) / (from))))
113 /** Configuration structure for device arguments. */
116 uint32_t present; /**< Bit-field for existing ports. */
117 uint32_t enabled; /**< Bit-field for user-enabled ports. */
121 /* Available parameters list. */
122 const char *pmd_mlx4_init_params[] = {
128 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
131 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
134 priv_rx_intr_vec_enable(struct priv *priv);
137 priv_rx_intr_vec_disable(struct priv *priv);
140 * Lock private structure to protect it from concurrent access in the
144 * Pointer to private structure.
146 void priv_lock(struct priv *priv)
148 rte_spinlock_lock(&priv->lock);
152 * Unlock private structure.
155 * Pointer to private structure.
157 void priv_unlock(struct priv *priv)
159 rte_spinlock_unlock(&priv->lock);
162 /* Allocate a buffer on the stack and fill it with a printf format string. */
163 #define MKSTR(name, ...) \
164 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
166 snprintf(name, sizeof(name), __VA_ARGS__)
169 * Get interface name from private structure.
172 * Pointer to private structure.
174 * Interface name output buffer.
177 * 0 on success, -1 on failure and errno is set.
180 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
184 unsigned int dev_type = 0;
185 unsigned int dev_port_prev = ~0u;
186 char match[IF_NAMESIZE] = "";
189 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
195 while ((dent = readdir(dir)) != NULL) {
196 char *name = dent->d_name;
198 unsigned int dev_port;
201 if ((name[0] == '.') &&
202 ((name[1] == '\0') ||
203 ((name[1] == '.') && (name[2] == '\0'))))
206 MKSTR(path, "%s/device/net/%s/%s",
207 priv->ctx->device->ibdev_path, name,
208 (dev_type ? "dev_id" : "dev_port"));
210 file = fopen(path, "rb");
215 * Switch to dev_id when dev_port does not exist as
216 * is the case with Linux kernel versions < 3.15.
227 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
232 * Switch to dev_id when dev_port returns the same value for
233 * all ports. May happen when using a MOFED release older than
234 * 3.0 with a Linux kernel >= 3.15.
236 if (dev_port == dev_port_prev)
238 dev_port_prev = dev_port;
239 if (dev_port == (priv->port - 1u))
240 snprintf(match, sizeof(match), "%s", name);
243 if (match[0] == '\0')
245 strncpy(*ifname, match, sizeof(*ifname));
250 * Read from sysfs entry.
253 * Pointer to private structure.
255 * Entry name relative to sysfs path.
257 * Data output buffer.
262 * 0 on success, -1 on failure and errno is set.
265 priv_sysfs_read(const struct priv *priv, const char *entry,
266 char *buf, size_t size)
268 char ifname[IF_NAMESIZE];
273 if (priv_get_ifname(priv, &ifname))
276 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
279 file = fopen(path, "rb");
282 ret = fread(buf, 1, size, file);
284 if (((size_t)ret < size) && (ferror(file)))
294 * Write to sysfs entry.
297 * Pointer to private structure.
299 * Entry name relative to sysfs path.
306 * 0 on success, -1 on failure and errno is set.
309 priv_sysfs_write(const struct priv *priv, const char *entry,
310 char *buf, size_t size)
312 char ifname[IF_NAMESIZE];
317 if (priv_get_ifname(priv, &ifname))
320 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
323 file = fopen(path, "wb");
326 ret = fwrite(buf, 1, size, file);
328 if (((size_t)ret < size) || (ferror(file)))
338 * Get unsigned long sysfs property.
341 * Pointer to private structure.
343 * Entry name relative to sysfs path.
345 * Value output buffer.
348 * 0 on success, -1 on failure and errno is set.
351 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
354 unsigned long value_ret;
357 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
359 DEBUG("cannot read %s value from sysfs: %s",
360 name, strerror(errno));
363 value_str[ret] = '\0';
365 value_ret = strtoul(value_str, NULL, 0);
367 DEBUG("invalid %s value `%s': %s", name, value_str,
376 * Set unsigned long sysfs property.
379 * Pointer to private structure.
381 * Entry name relative to sysfs path.
386 * 0 on success, -1 on failure and errno is set.
389 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
392 MKSTR(value_str, "%lu", value);
394 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
396 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
397 name, value_str, value, strerror(errno));
404 * Perform ifreq ioctl() on associated Ethernet device.
407 * Pointer to private structure.
409 * Request number to pass to ioctl().
411 * Interface request structure output buffer.
414 * 0 on success, -1 on failure and errno is set.
417 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
419 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
424 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
425 ret = ioctl(sock, req, ifr);
434 * Pointer to private structure.
436 * MTU value output buffer.
439 * 0 on success, -1 on failure and errno is set.
442 priv_get_mtu(struct priv *priv, uint16_t *mtu)
444 unsigned long ulong_mtu;
446 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
456 * Pointer to private structure.
461 * 0 on success, -1 on failure and errno is set.
464 priv_set_mtu(struct priv *priv, uint16_t mtu)
468 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
469 priv_get_mtu(priv, &new_mtu))
481 * Pointer to private structure.
483 * Bitmask for flags that must remain untouched.
485 * Bitmask for flags to modify.
488 * 0 on success, -1 on failure and errno is set.
491 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
495 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
498 tmp |= (flags & (~keep));
499 return priv_set_sysfs_ulong(priv, "flags", tmp);
502 /* Device configuration. */
505 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
506 unsigned int socket, const struct rte_eth_txconf *conf);
509 txq_cleanup(struct txq *txq);
512 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
513 unsigned int socket, int inactive,
514 const struct rte_eth_rxconf *conf,
515 struct rte_mempool *mp, int children_n,
516 struct rxq *rxq_parent);
519 rxq_cleanup(struct rxq *rxq);
522 * Create RSS parent queue.
524 * The new parent is inserted in front of the list in the private structure.
527 * Pointer to private structure.
529 * Queues indices array, if NULL use all Rx queues.
531 * The number of entries in queues[].
534 * Pointer to a parent rxq structure, NULL on failure.
537 priv_parent_create(struct priv *priv,
545 parent = rte_zmalloc("parent queue",
547 RTE_CACHE_LINE_SIZE);
549 ERROR("cannot allocate memory for RSS parent queue");
552 ret = rxq_setup(priv->dev, parent, 0, 0, 0,
553 NULL, NULL, children_n, NULL);
558 parent->rss.queues_n = children_n;
560 for (i = 0; i < children_n; ++i)
561 parent->rss.queues[i] = queues[i];
563 /* the default RSS ring case */
564 assert(priv->rxqs_n == children_n);
565 for (i = 0; i < priv->rxqs_n; ++i)
566 parent->rss.queues[i] = i;
568 LIST_INSERT_HEAD(&priv->parents, parent, next);
573 * Clean up RX queue parent structure.
576 * RX queue parent structure.
579 rxq_parent_cleanup(struct rxq *parent)
581 LIST_REMOVE(parent, next);
587 * Clean up parent structures from the parent list.
590 * Pointer to private structure.
593 priv_parent_list_cleanup(struct priv *priv)
595 while (!LIST_EMPTY(&priv->parents))
596 rxq_parent_cleanup(LIST_FIRST(&priv->parents));
600 * Ethernet device configuration.
602 * Prepare the driver for a given number of TX and RX queues.
603 * Allocate parent RSS queue when several RX queues are requested.
606 * Pointer to Ethernet device structure.
609 * 0 on success, errno value on failure.
612 dev_configure(struct rte_eth_dev *dev)
614 struct priv *priv = dev->data->dev_private;
615 unsigned int rxqs_n = dev->data->nb_rx_queues;
616 unsigned int txqs_n = dev->data->nb_tx_queues;
619 priv->rxqs = (void *)dev->data->rx_queues;
620 priv->txqs = (void *)dev->data->tx_queues;
621 if (txqs_n != priv->txqs_n) {
622 INFO("%p: TX queues number update: %u -> %u",
623 (void *)dev, priv->txqs_n, txqs_n);
624 priv->txqs_n = txqs_n;
626 if (rxqs_n == priv->rxqs_n)
628 if (!rte_is_power_of_2(rxqs_n) && !priv->isolated) {
631 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
632 WARN("%p: number of RX queues must be a power"
633 " of 2: %u queues among %u will be active",
634 (void *)dev, n_active, rxqs_n);
637 INFO("%p: RX queues number update: %u -> %u",
638 (void *)dev, priv->rxqs_n, rxqs_n);
639 /* If RSS is enabled, disable it first. */
643 /* Only if there are no remaining child RX queues. */
644 for (i = 0; (i != priv->rxqs_n); ++i)
645 if ((*priv->rxqs)[i] != NULL)
647 priv_parent_list_cleanup(priv);
652 /* Nothing else to do. */
653 priv->rxqs_n = rxqs_n;
656 /* Allocate a new RSS parent queue if supported by hardware. */
658 ERROR("%p: only a single RX queue can be configured when"
659 " hardware doesn't support RSS",
663 /* Fail if hardware doesn't support that many RSS queues. */
664 if (rxqs_n >= priv->max_rss_tbl_sz) {
665 ERROR("%p: only %u RX queues can be configured for RSS",
666 (void *)dev, priv->max_rss_tbl_sz);
671 priv->rxqs_n = rxqs_n;
674 if (priv_parent_create(priv, NULL, priv->rxqs_n))
676 /* Failure, rollback. */
683 * DPDK callback for Ethernet device configuration.
686 * Pointer to Ethernet device structure.
689 * 0 on success, negative errno value on failure.
692 mlx4_dev_configure(struct rte_eth_dev *dev)
694 struct priv *priv = dev->data->dev_private;
698 ret = dev_configure(dev);
704 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
705 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
707 /* TX queues handling. */
710 * Allocate TX queue elements.
713 * Pointer to TX queue structure.
715 * Number of elements to allocate.
718 * 0 on success, errno value on failure.
721 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
724 struct txq_elt (*elts)[elts_n] =
725 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
726 linear_t (*elts_linear)[elts_n] =
727 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
729 struct ibv_mr *mr_linear = NULL;
732 if ((elts == NULL) || (elts_linear == NULL)) {
733 ERROR("%p: can't allocate packets array", (void *)txq);
738 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
739 IBV_ACCESS_LOCAL_WRITE);
740 if (mr_linear == NULL) {
741 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
746 for (i = 0; (i != elts_n); ++i) {
747 struct txq_elt *elt = &(*elts)[i];
751 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
752 txq->elts_n = elts_n;
757 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
758 * at least 4 times per ring. */
759 txq->elts_comp_cd_init =
760 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
761 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
762 txq->elts_comp_cd = txq->elts_comp_cd_init;
763 txq->elts_linear = elts_linear;
764 txq->mr_linear = mr_linear;
768 if (mr_linear != NULL)
769 claim_zero(ibv_dereg_mr(mr_linear));
771 rte_free(elts_linear);
774 DEBUG("%p: failed, freed everything", (void *)txq);
780 * Free TX queue elements.
783 * Pointer to TX queue structure.
786 txq_free_elts(struct txq *txq)
788 unsigned int elts_n = txq->elts_n;
789 unsigned int elts_head = txq->elts_head;
790 unsigned int elts_tail = txq->elts_tail;
791 struct txq_elt (*elts)[elts_n] = txq->elts;
792 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
793 struct ibv_mr *mr_linear = txq->mr_linear;
795 DEBUG("%p: freeing WRs", (void *)txq);
800 txq->elts_comp_cd = 0;
801 txq->elts_comp_cd_init = 0;
803 txq->elts_linear = NULL;
804 txq->mr_linear = NULL;
805 if (mr_linear != NULL)
806 claim_zero(ibv_dereg_mr(mr_linear));
808 rte_free(elts_linear);
811 while (elts_tail != elts_head) {
812 struct txq_elt *elt = &(*elts)[elts_tail];
814 assert(elt->buf != NULL);
815 rte_pktmbuf_free(elt->buf);
818 memset(elt, 0x77, sizeof(*elt));
820 if (++elts_tail == elts_n)
828 * Clean up a TX queue.
830 * Destroy objects, free allocated memory and reset the structure for reuse.
833 * Pointer to TX queue structure.
836 txq_cleanup(struct txq *txq)
838 struct ibv_exp_release_intf_params params;
841 DEBUG("cleaning up %p", (void *)txq);
843 if (txq->if_qp != NULL) {
844 assert(txq->priv != NULL);
845 assert(txq->priv->ctx != NULL);
846 assert(txq->qp != NULL);
847 params = (struct ibv_exp_release_intf_params){
850 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
854 if (txq->if_cq != NULL) {
855 assert(txq->priv != NULL);
856 assert(txq->priv->ctx != NULL);
857 assert(txq->cq != NULL);
858 params = (struct ibv_exp_release_intf_params){
861 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
866 claim_zero(ibv_destroy_qp(txq->qp));
868 claim_zero(ibv_destroy_cq(txq->cq));
869 if (txq->rd != NULL) {
870 struct ibv_exp_destroy_res_domain_attr attr = {
874 assert(txq->priv != NULL);
875 assert(txq->priv->ctx != NULL);
876 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
880 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
881 if (txq->mp2mr[i].mp == NULL)
883 assert(txq->mp2mr[i].mr != NULL);
884 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
886 memset(txq, 0, sizeof(*txq));
890 * Manage TX completions.
892 * When sending a burst, mlx4_tx_burst() posts several WRs.
893 * To improve performance, a completion event is only required once every
894 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
895 * for other WRs, but this information would not be used anyway.
898 * Pointer to TX queue structure.
901 * 0 on success, -1 on failure.
904 txq_complete(struct txq *txq)
906 unsigned int elts_comp = txq->elts_comp;
907 unsigned int elts_tail = txq->elts_tail;
908 const unsigned int elts_n = txq->elts_n;
911 if (unlikely(elts_comp == 0))
913 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
914 if (unlikely(wcs_n == 0))
916 if (unlikely(wcs_n < 0)) {
917 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
922 assert(elts_comp <= txq->elts_comp);
924 * Assume WC status is successful as nothing can be done about it
927 elts_tail += wcs_n * txq->elts_comp_cd_init;
928 if (elts_tail >= elts_n)
930 txq->elts_tail = elts_tail;
931 txq->elts_comp = elts_comp;
935 struct mlx4_check_mempool_data {
941 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
942 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
943 void *opaque, struct rte_mempool_memhdr *memhdr,
946 struct mlx4_check_mempool_data *data = opaque;
951 /* It already failed, skip the next chunks. */
954 /* It is the first chunk. */
955 if (data->start == NULL && data->end == NULL) {
956 data->start = memhdr->addr;
957 data->end = data->start + memhdr->len;
960 if (data->end == memhdr->addr) {
961 data->end += memhdr->len;
964 if (data->start == (char *)memhdr->addr + memhdr->len) {
965 data->start -= memhdr->len;
968 /* Error, mempool is not virtually contigous. */
973 * Check if a mempool can be used: it must be virtually contiguous.
976 * Pointer to memory pool.
978 * Pointer to the start address of the mempool virtual memory area
980 * Pointer to the end address of the mempool virtual memory area
983 * 0 on success (mempool is virtually contiguous), -1 on error.
985 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
988 struct mlx4_check_mempool_data data;
990 memset(&data, 0, sizeof(data));
991 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
992 *start = (uintptr_t)data.start;
993 *end = (uintptr_t)data.end;
998 /* For best performance, this function should not be inlined. */
999 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1003 * Register mempool as a memory region.
1006 * Pointer to protection domain.
1008 * Pointer to memory pool.
1011 * Memory region pointer, NULL in case of error.
1013 static struct ibv_mr *
1014 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1016 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1021 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1022 ERROR("mempool %p: not virtually contiguous",
1027 DEBUG("mempool %p area start=%p end=%p size=%zu",
1028 (void *)mp, (void *)start, (void *)end,
1029 (size_t)(end - start));
1030 /* Round start and end to page boundary if found in memory segments. */
1031 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1032 uintptr_t addr = (uintptr_t)ms[i].addr;
1033 size_t len = ms[i].len;
1034 unsigned int align = ms[i].hugepage_sz;
1036 if ((start > addr) && (start < addr + len))
1037 start = RTE_ALIGN_FLOOR(start, align);
1038 if ((end > addr) && (end < addr + len))
1039 end = RTE_ALIGN_CEIL(end, align);
1041 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1042 (void *)mp, (void *)start, (void *)end,
1043 (size_t)(end - start));
1044 return ibv_reg_mr(pd,
1047 IBV_ACCESS_LOCAL_WRITE);
1051 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1052 * the cloned mbuf is allocated is returned instead.
1058 * Memory pool where data is located for given mbuf.
1060 static struct rte_mempool *
1061 txq_mb2mp(struct rte_mbuf *buf)
1063 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1064 return rte_mbuf_from_indirect(buf)->pool;
1069 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1070 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1071 * remove an entry first.
1074 * Pointer to TX queue structure.
1076 * Memory Pool for which a Memory Region lkey must be returned.
1079 * mr->lkey on success, (uint32_t)-1 on failure.
1082 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1087 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1088 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1089 /* Unknown MP, add a new MR for it. */
1092 if (txq->mp2mr[i].mp == mp) {
1093 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1094 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1095 return txq->mp2mr[i].lkey;
1098 /* Add a new entry, register MR first. */
1099 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1100 (void *)txq, mp->name, (void *)mp);
1101 mr = mlx4_mp2mr(txq->priv->pd, mp);
1102 if (unlikely(mr == NULL)) {
1103 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1105 return (uint32_t)-1;
1107 if (unlikely(i == elemof(txq->mp2mr))) {
1108 /* Table is full, remove oldest entry. */
1109 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1112 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1113 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1114 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1116 /* Store the new entry. */
1117 txq->mp2mr[i].mp = mp;
1118 txq->mp2mr[i].mr = mr;
1119 txq->mp2mr[i].lkey = mr->lkey;
1120 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1121 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1122 return txq->mp2mr[i].lkey;
1125 struct txq_mp2mr_mbuf_check_data {
1130 * Callback function for rte_mempool_obj_iter() to check whether a given
1131 * mempool object looks like a mbuf.
1134 * The mempool pointer
1136 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1141 * Object index, unused.
1144 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1145 uint32_t index __rte_unused)
1147 struct txq_mp2mr_mbuf_check_data *data = arg;
1148 struct rte_mbuf *buf = obj;
1150 /* Check whether mbuf structure fits element size and whether mempool
1151 * pointer is valid. */
1152 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1157 * Iterator function for rte_mempool_walk() to register existing mempools and
1158 * fill the MP to MR cache of a TX queue.
1161 * Memory Pool to register.
1163 * Pointer to TX queue structure.
1166 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1168 struct txq *txq = arg;
1169 struct txq_mp2mr_mbuf_check_data data = {
1173 /* Register mempool only if the first element looks like a mbuf. */
1174 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1180 #if MLX4_PMD_SGE_WR_N > 1
1183 * Copy scattered mbuf contents to a single linear buffer.
1185 * @param[out] linear
1186 * Linear output buffer.
1188 * Scattered input buffer.
1191 * Number of bytes copied to the output buffer or 0 if not large enough.
1194 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1196 unsigned int size = 0;
1197 unsigned int offset;
1200 unsigned int len = DATA_LEN(buf);
1204 if (unlikely(size > sizeof(*linear)))
1206 memcpy(&(*linear)[offset],
1207 rte_pktmbuf_mtod(buf, uint8_t *),
1210 } while (buf != NULL);
1215 * Handle scattered buffers for mlx4_tx_burst().
1218 * TX queue structure.
1220 * Number of segments in buf.
1222 * TX queue element to fill.
1224 * Buffer to process.
1226 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1228 * Array filled with SGEs on success.
1231 * A structure containing the processed packet size in bytes and the
1232 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1235 static struct tx_burst_sg_ret {
1236 unsigned int length;
1239 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1240 struct rte_mbuf *buf, unsigned int elts_head,
1241 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1243 unsigned int sent_size = 0;
1247 /* When there are too many segments, extra segments are
1248 * linearized in the last SGE. */
1249 if (unlikely(segs > elemof(*sges))) {
1250 segs = (elemof(*sges) - 1);
1253 /* Update element. */
1255 /* Register segments as SGEs. */
1256 for (j = 0; (j != segs); ++j) {
1257 struct ibv_sge *sge = &(*sges)[j];
1260 /* Retrieve Memory Region key for this memory pool. */
1261 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1262 if (unlikely(lkey == (uint32_t)-1)) {
1263 /* MR does not exist. */
1264 DEBUG("%p: unable to get MP <-> MR association",
1266 /* Clean up TX element. */
1271 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1273 rte_prefetch0((volatile void *)
1274 (uintptr_t)sge->addr);
1275 sge->length = DATA_LEN(buf);
1277 sent_size += sge->length;
1280 /* If buf is not NULL here and is not going to be linearized,
1281 * nb_segs is not valid. */
1283 assert((buf == NULL) || (linearize));
1284 /* Linearize extra segments. */
1286 struct ibv_sge *sge = &(*sges)[segs];
1287 linear_t *linear = &(*txq->elts_linear)[elts_head];
1288 unsigned int size = linearize_mbuf(linear, buf);
1290 assert(segs == (elemof(*sges) - 1));
1292 /* Invalid packet. */
1293 DEBUG("%p: packet too large to be linearized.",
1295 /* Clean up TX element. */
1299 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1300 if (elemof(*sges) == 1) {
1302 struct rte_mbuf *next = NEXT(buf);
1304 rte_pktmbuf_free_seg(buf);
1306 } while (buf != NULL);
1310 sge->addr = (uintptr_t)&(*linear)[0];
1312 sge->lkey = txq->mr_linear->lkey;
1314 /* Include last segment. */
1317 return (struct tx_burst_sg_ret){
1318 .length = sent_size,
1322 return (struct tx_burst_sg_ret){
1328 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1331 * DPDK callback for TX.
1334 * Generic pointer to TX queue structure.
1336 * Packets to transmit.
1338 * Number of packets in array.
1341 * Number of packets successfully transmitted (<= pkts_n).
1344 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1346 struct txq *txq = (struct txq *)dpdk_txq;
1347 unsigned int elts_head = txq->elts_head;
1348 const unsigned int elts_n = txq->elts_n;
1349 unsigned int elts_comp_cd = txq->elts_comp_cd;
1350 unsigned int elts_comp = 0;
1355 assert(elts_comp_cd != 0);
1357 max = (elts_n - (elts_head - txq->elts_tail));
1361 assert(max <= elts_n);
1362 /* Always leave one free entry in the ring. */
1368 for (i = 0; (i != max); ++i) {
1369 struct rte_mbuf *buf = pkts[i];
1370 unsigned int elts_head_next =
1371 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1372 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1373 struct txq_elt *elt = &(*txq->elts)[elts_head];
1374 unsigned int segs = NB_SEGS(buf);
1375 #ifdef MLX4_PMD_SOFT_COUNTERS
1376 unsigned int sent_size = 0;
1378 uint32_t send_flags = 0;
1380 /* Clean up old buffer. */
1381 if (likely(elt->buf != NULL)) {
1382 struct rte_mbuf *tmp = elt->buf;
1386 memset(elt, 0x66, sizeof(*elt));
1388 /* Faster than rte_pktmbuf_free(). */
1390 struct rte_mbuf *next = NEXT(tmp);
1392 rte_pktmbuf_free_seg(tmp);
1394 } while (tmp != NULL);
1396 /* Request TX completion. */
1397 if (unlikely(--elts_comp_cd == 0)) {
1398 elts_comp_cd = txq->elts_comp_cd_init;
1400 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1402 /* Should we enable HW CKSUM offload */
1404 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1405 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1406 /* HW does not support checksum offloads at arbitrary
1407 * offsets but automatically recognizes the packet
1408 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1409 * tunnels are currently supported. */
1410 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1411 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1413 if (likely(segs == 1)) {
1418 /* Retrieve buffer information. */
1419 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1420 length = DATA_LEN(buf);
1421 /* Retrieve Memory Region key for this memory pool. */
1422 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1423 if (unlikely(lkey == (uint32_t)-1)) {
1424 /* MR does not exist. */
1425 DEBUG("%p: unable to get MP <-> MR"
1426 " association", (void *)txq);
1427 /* Clean up TX element. */
1431 /* Update element. */
1434 rte_prefetch0((volatile void *)
1436 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1437 /* Put packet into send queue. */
1438 #if MLX4_PMD_MAX_INLINE > 0
1439 if (length <= txq->max_inline)
1440 err = txq->if_qp->send_pending_inline
1447 err = txq->if_qp->send_pending
1455 #ifdef MLX4_PMD_SOFT_COUNTERS
1456 sent_size += length;
1459 #if MLX4_PMD_SGE_WR_N > 1
1460 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1461 struct tx_burst_sg_ret ret;
1463 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1465 if (ret.length == (unsigned int)-1)
1467 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1468 /* Put SG list into send queue. */
1469 err = txq->if_qp->send_pending_sg_list
1476 #ifdef MLX4_PMD_SOFT_COUNTERS
1477 sent_size += ret.length;
1479 #else /* MLX4_PMD_SGE_WR_N > 1 */
1480 DEBUG("%p: TX scattered buffers support not"
1481 " compiled in", (void *)txq);
1483 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1485 elts_head = elts_head_next;
1486 #ifdef MLX4_PMD_SOFT_COUNTERS
1487 /* Increment sent bytes counter. */
1488 txq->stats.obytes += sent_size;
1492 /* Take a shortcut if nothing must be sent. */
1493 if (unlikely(i == 0))
1495 #ifdef MLX4_PMD_SOFT_COUNTERS
1496 /* Increment sent packets counter. */
1497 txq->stats.opackets += i;
1499 /* Ring QP doorbell. */
1500 err = txq->if_qp->send_flush(txq->qp);
1501 if (unlikely(err)) {
1502 /* A nonzero value is not supposed to be returned.
1503 * Nothing can be done about it. */
1504 DEBUG("%p: send_flush() failed with error %d",
1507 txq->elts_head = elts_head;
1508 txq->elts_comp += elts_comp;
1509 txq->elts_comp_cd = elts_comp_cd;
1514 * Configure a TX queue.
1517 * Pointer to Ethernet device structure.
1519 * Pointer to TX queue structure.
1521 * Number of descriptors to configure in queue.
1523 * NUMA socket on which memory must be allocated.
1525 * Thresholds parameters.
1528 * 0 on success, errno value on failure.
1531 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1532 unsigned int socket, const struct rte_eth_txconf *conf)
1534 struct priv *priv = dev->data->dev_private;
1540 struct ibv_exp_query_intf_params params;
1541 struct ibv_exp_qp_init_attr init;
1542 struct ibv_exp_res_domain_init_attr rd;
1543 struct ibv_exp_cq_init_attr cq;
1544 struct ibv_exp_qp_attr mod;
1546 enum ibv_exp_query_intf_status status;
1549 (void)conf; /* Thresholds configuration (ignored). */
1552 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1553 ERROR("%p: invalid number of TX descriptors (must be a"
1554 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1557 desc /= MLX4_PMD_SGE_WR_N;
1558 /* MRs will be registered in mp2mr[] later. */
1559 attr.rd = (struct ibv_exp_res_domain_init_attr){
1560 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1561 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1562 .thread_model = IBV_EXP_THREAD_SINGLE,
1563 .msg_model = IBV_EXP_MSG_HIGH_BW,
1565 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1566 if (tmpl.rd == NULL) {
1568 ERROR("%p: RD creation failure: %s",
1569 (void *)dev, strerror(ret));
1572 attr.cq = (struct ibv_exp_cq_init_attr){
1573 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1574 .res_domain = tmpl.rd,
1576 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1577 if (tmpl.cq == NULL) {
1579 ERROR("%p: CQ creation failure: %s",
1580 (void *)dev, strerror(ret));
1583 DEBUG("priv->device_attr.max_qp_wr is %d",
1584 priv->device_attr.max_qp_wr);
1585 DEBUG("priv->device_attr.max_sge is %d",
1586 priv->device_attr.max_sge);
1587 attr.init = (struct ibv_exp_qp_init_attr){
1588 /* CQ to be associated with the send queue. */
1590 /* CQ to be associated with the receive queue. */
1593 /* Max number of outstanding WRs. */
1594 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1595 priv->device_attr.max_qp_wr :
1597 /* Max number of scatter/gather elements in a WR. */
1598 .max_send_sge = ((priv->device_attr.max_sge <
1599 MLX4_PMD_SGE_WR_N) ?
1600 priv->device_attr.max_sge :
1602 #if MLX4_PMD_MAX_INLINE > 0
1603 .max_inline_data = MLX4_PMD_MAX_INLINE,
1606 .qp_type = IBV_QPT_RAW_PACKET,
1607 /* Do *NOT* enable this, completions events are managed per
1611 .res_domain = tmpl.rd,
1612 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1613 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1615 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1616 if (tmpl.qp == NULL) {
1617 ret = (errno ? errno : EINVAL);
1618 ERROR("%p: QP creation failure: %s",
1619 (void *)dev, strerror(ret));
1622 #if MLX4_PMD_MAX_INLINE > 0
1623 /* ibv_create_qp() updates this value. */
1624 tmpl.max_inline = attr.init.cap.max_inline_data;
1626 attr.mod = (struct ibv_exp_qp_attr){
1627 /* Move the QP to this state. */
1628 .qp_state = IBV_QPS_INIT,
1629 /* Primary port number. */
1630 .port_num = priv->port
1632 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1633 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1635 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1636 (void *)dev, strerror(ret));
1639 ret = txq_alloc_elts(&tmpl, desc);
1641 ERROR("%p: TXQ allocation failed: %s",
1642 (void *)dev, strerror(ret));
1645 attr.mod = (struct ibv_exp_qp_attr){
1646 .qp_state = IBV_QPS_RTR
1648 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1650 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1651 (void *)dev, strerror(ret));
1654 attr.mod.qp_state = IBV_QPS_RTS;
1655 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1657 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1658 (void *)dev, strerror(ret));
1661 attr.params = (struct ibv_exp_query_intf_params){
1662 .intf_scope = IBV_EXP_INTF_GLOBAL,
1663 .intf = IBV_EXP_INTF_CQ,
1666 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1667 if (tmpl.if_cq == NULL) {
1668 ERROR("%p: CQ interface family query failed with status %d",
1669 (void *)dev, status);
1672 attr.params = (struct ibv_exp_query_intf_params){
1673 .intf_scope = IBV_EXP_INTF_GLOBAL,
1674 .intf = IBV_EXP_INTF_QP_BURST,
1676 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1677 /* MC loopback must be disabled when not using a VF. */
1680 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1684 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1685 if (tmpl.if_qp == NULL) {
1686 ERROR("%p: QP interface family query failed with status %d",
1687 (void *)dev, status);
1690 /* Clean up txq in case we're reinitializing it. */
1691 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1694 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1695 /* Pre-register known mempools. */
1696 rte_mempool_walk(txq_mp2mr_iter, txq);
1706 * DPDK callback to configure a TX queue.
1709 * Pointer to Ethernet device structure.
1713 * Number of descriptors to configure in queue.
1715 * NUMA socket on which memory must be allocated.
1717 * Thresholds parameters.
1720 * 0 on success, negative errno value on failure.
1723 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1724 unsigned int socket, const struct rte_eth_txconf *conf)
1726 struct priv *priv = dev->data->dev_private;
1727 struct txq *txq = (*priv->txqs)[idx];
1731 DEBUG("%p: configuring queue %u for %u descriptors",
1732 (void *)dev, idx, desc);
1733 if (idx >= priv->txqs_n) {
1734 ERROR("%p: queue index out of range (%u >= %u)",
1735 (void *)dev, idx, priv->txqs_n);
1740 DEBUG("%p: reusing already allocated queue index %u (%p)",
1741 (void *)dev, idx, (void *)txq);
1742 if (priv->started) {
1746 (*priv->txqs)[idx] = NULL;
1749 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1751 ERROR("%p: unable to allocate queue index %u",
1757 ret = txq_setup(dev, txq, desc, socket, conf);
1761 txq->stats.idx = idx;
1762 DEBUG("%p: adding TX queue %p to list",
1763 (void *)dev, (void *)txq);
1764 (*priv->txqs)[idx] = txq;
1765 /* Update send callback. */
1766 dev->tx_pkt_burst = mlx4_tx_burst;
1773 * DPDK callback to release a TX queue.
1776 * Generic TX queue pointer.
1779 mlx4_tx_queue_release(void *dpdk_txq)
1781 struct txq *txq = (struct txq *)dpdk_txq;
1789 for (i = 0; (i != priv->txqs_n); ++i)
1790 if ((*priv->txqs)[i] == txq) {
1791 DEBUG("%p: removing TX queue %p from list",
1792 (void *)priv->dev, (void *)txq);
1793 (*priv->txqs)[i] = NULL;
1801 /* RX queues handling. */
1804 * Allocate RX queue elements with scattered packets support.
1807 * Pointer to RX queue structure.
1809 * Number of elements to allocate.
1811 * If not NULL, fetch buffers from this array instead of allocating them
1812 * with rte_pktmbuf_alloc().
1815 * 0 on success, errno value on failure.
1818 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
1819 struct rte_mbuf **pool)
1822 struct rxq_elt_sp (*elts)[elts_n] =
1823 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1828 ERROR("%p: can't allocate packets array", (void *)rxq);
1832 /* For each WR (packet). */
1833 for (i = 0; (i != elts_n); ++i) {
1835 struct rxq_elt_sp *elt = &(*elts)[i];
1836 struct ibv_recv_wr *wr = &elt->wr;
1837 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
1839 /* These two arrays must have the same size. */
1840 assert(elemof(elt->sges) == elemof(elt->bufs));
1843 wr->next = &(*elts)[(i + 1)].wr;
1844 wr->sg_list = &(*sges)[0];
1845 wr->num_sge = elemof(*sges);
1846 /* For each SGE (segment). */
1847 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1848 struct ibv_sge *sge = &(*sges)[j];
1849 struct rte_mbuf *buf;
1853 assert(buf != NULL);
1854 rte_pktmbuf_reset(buf);
1856 buf = rte_pktmbuf_alloc(rxq->mp);
1858 assert(pool == NULL);
1859 ERROR("%p: empty mbuf pool", (void *)rxq);
1864 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1865 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1866 /* Buffer is supposed to be empty. */
1867 assert(rte_pktmbuf_data_len(buf) == 0);
1868 assert(rte_pktmbuf_pkt_len(buf) == 0);
1869 /* sge->addr must be able to store a pointer. */
1870 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
1872 /* The first SGE keeps its headroom. */
1873 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1874 sge->length = (buf->buf_len -
1875 RTE_PKTMBUF_HEADROOM);
1877 /* Subsequent SGEs lose theirs. */
1878 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1879 SET_DATA_OFF(buf, 0);
1880 sge->addr = (uintptr_t)buf->buf_addr;
1881 sge->length = buf->buf_len;
1883 sge->lkey = rxq->mr->lkey;
1884 /* Redundant check for tailroom. */
1885 assert(sge->length == rte_pktmbuf_tailroom(buf));
1888 /* The last WR pointer must be NULL. */
1889 (*elts)[(i - 1)].wr.next = NULL;
1890 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
1891 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
1892 rxq->elts_n = elts_n;
1894 rxq->elts.sp = elts;
1899 assert(pool == NULL);
1900 for (i = 0; (i != elemof(*elts)); ++i) {
1902 struct rxq_elt_sp *elt = &(*elts)[i];
1904 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1905 struct rte_mbuf *buf = elt->bufs[j];
1908 rte_pktmbuf_free_seg(buf);
1913 DEBUG("%p: failed, freed everything", (void *)rxq);
1919 * Free RX queue elements with scattered packets support.
1922 * Pointer to RX queue structure.
1925 rxq_free_elts_sp(struct rxq *rxq)
1928 unsigned int elts_n = rxq->elts_n;
1929 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
1931 DEBUG("%p: freeing WRs", (void *)rxq);
1933 rxq->elts.sp = NULL;
1936 for (i = 0; (i != elemof(*elts)); ++i) {
1938 struct rxq_elt_sp *elt = &(*elts)[i];
1940 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1941 struct rte_mbuf *buf = elt->bufs[j];
1944 rte_pktmbuf_free_seg(buf);
1951 * Allocate RX queue elements.
1954 * Pointer to RX queue structure.
1956 * Number of elements to allocate.
1958 * If not NULL, fetch buffers from this array instead of allocating them
1959 * with rte_pktmbuf_alloc().
1962 * 0 on success, errno value on failure.
1965 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
1968 struct rxq_elt (*elts)[elts_n] =
1969 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1974 ERROR("%p: can't allocate packets array", (void *)rxq);
1978 /* For each WR (packet). */
1979 for (i = 0; (i != elts_n); ++i) {
1980 struct rxq_elt *elt = &(*elts)[i];
1981 struct ibv_recv_wr *wr = &elt->wr;
1982 struct ibv_sge *sge = &(*elts)[i].sge;
1983 struct rte_mbuf *buf;
1987 assert(buf != NULL);
1988 rte_pktmbuf_reset(buf);
1990 buf = rte_pktmbuf_alloc(rxq->mp);
1992 assert(pool == NULL);
1993 ERROR("%p: empty mbuf pool", (void *)rxq);
1997 /* Configure WR. Work request ID contains its own index in
1998 * the elts array and the offset between SGE buffer header and
2000 WR_ID(wr->wr_id).id = i;
2001 WR_ID(wr->wr_id).offset =
2002 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2004 wr->next = &(*elts)[(i + 1)].wr;
2007 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2008 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2009 /* Buffer is supposed to be empty. */
2010 assert(rte_pktmbuf_data_len(buf) == 0);
2011 assert(rte_pktmbuf_pkt_len(buf) == 0);
2012 /* sge->addr must be able to store a pointer. */
2013 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2014 /* SGE keeps its headroom. */
2015 sge->addr = (uintptr_t)
2016 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2017 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2018 sge->lkey = rxq->mr->lkey;
2019 /* Redundant check for tailroom. */
2020 assert(sge->length == rte_pktmbuf_tailroom(buf));
2021 /* Make sure elts index and SGE mbuf pointer can be deduced
2023 if ((WR_ID(wr->wr_id).id != i) ||
2024 ((void *)((uintptr_t)sge->addr -
2025 WR_ID(wr->wr_id).offset) != buf)) {
2026 ERROR("%p: cannot store index and offset in WR ID",
2029 rte_pktmbuf_free(buf);
2034 /* The last WR pointer must be NULL. */
2035 (*elts)[(i - 1)].wr.next = NULL;
2036 DEBUG("%p: allocated and configured %u single-segment WRs",
2037 (void *)rxq, elts_n);
2038 rxq->elts_n = elts_n;
2040 rxq->elts.no_sp = elts;
2045 assert(pool == NULL);
2046 for (i = 0; (i != elemof(*elts)); ++i) {
2047 struct rxq_elt *elt = &(*elts)[i];
2048 struct rte_mbuf *buf;
2050 if (elt->sge.addr == 0)
2052 assert(WR_ID(elt->wr.wr_id).id == i);
2053 buf = (void *)((uintptr_t)elt->sge.addr -
2054 WR_ID(elt->wr.wr_id).offset);
2055 rte_pktmbuf_free_seg(buf);
2059 DEBUG("%p: failed, freed everything", (void *)rxq);
2065 * Free RX queue elements.
2068 * Pointer to RX queue structure.
2071 rxq_free_elts(struct rxq *rxq)
2074 unsigned int elts_n = rxq->elts_n;
2075 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2077 DEBUG("%p: freeing WRs", (void *)rxq);
2079 rxq->elts.no_sp = NULL;
2082 for (i = 0; (i != elemof(*elts)); ++i) {
2083 struct rxq_elt *elt = &(*elts)[i];
2084 struct rte_mbuf *buf;
2086 if (elt->sge.addr == 0)
2088 assert(WR_ID(elt->wr.wr_id).id == i);
2089 buf = (void *)((uintptr_t)elt->sge.addr -
2090 WR_ID(elt->wr.wr_id).offset);
2091 rte_pktmbuf_free_seg(buf);
2097 * Delete flow steering rule.
2100 * Pointer to RX queue structure.
2102 * MAC address index.
2107 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2110 struct priv *priv = rxq->priv;
2111 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2112 (const uint8_t (*)[ETHER_ADDR_LEN])
2113 priv->mac[mac_index].addr_bytes;
2115 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2116 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2117 " (VLAN ID %" PRIu16 ")",
2119 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2120 mac_index, priv->vlan_filter[vlan_index].id);
2121 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2122 rxq->mac_flow[mac_index][vlan_index] = NULL;
2126 * Unregister a MAC address from a RX queue.
2129 * Pointer to RX queue structure.
2131 * MAC address index.
2134 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2136 struct priv *priv = rxq->priv;
2138 unsigned int vlans = 0;
2140 assert(mac_index < elemof(priv->mac));
2141 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2143 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2144 if (!priv->vlan_filter[i].enabled)
2146 rxq_del_flow(rxq, mac_index, i);
2150 rxq_del_flow(rxq, mac_index, 0);
2152 BITFIELD_RESET(rxq->mac_configured, mac_index);
2156 * Unregister all MAC addresses from a RX queue.
2159 * Pointer to RX queue structure.
2162 rxq_mac_addrs_del(struct rxq *rxq)
2164 struct priv *priv = rxq->priv;
2167 for (i = 0; (i != elemof(priv->mac)); ++i)
2168 rxq_mac_addr_del(rxq, i);
2171 static int rxq_promiscuous_enable(struct rxq *);
2172 static void rxq_promiscuous_disable(struct rxq *);
2175 * Add single flow steering rule.
2178 * Pointer to RX queue structure.
2180 * MAC address index to register.
2182 * VLAN index. Use -1 for a flow without VLAN.
2185 * 0 on success, errno value on failure.
2188 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2190 struct ibv_flow *flow;
2191 struct priv *priv = rxq->priv;
2192 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2193 (const uint8_t (*)[ETHER_ADDR_LEN])
2194 priv->mac[mac_index].addr_bytes;
2196 /* Allocate flow specification on the stack. */
2197 struct __attribute__((packed)) {
2198 struct ibv_flow_attr attr;
2199 struct ibv_flow_spec_eth spec;
2201 struct ibv_flow_attr *attr = &data.attr;
2202 struct ibv_flow_spec_eth *spec = &data.spec;
2204 assert(mac_index < elemof(priv->mac));
2205 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2207 * No padding must be inserted by the compiler between attr and spec.
2208 * This layout is expected by libibverbs.
2210 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2211 *attr = (struct ibv_flow_attr){
2212 .type = IBV_FLOW_ATTR_NORMAL,
2218 *spec = (struct ibv_flow_spec_eth){
2219 .type = IBV_FLOW_SPEC_ETH,
2220 .size = sizeof(*spec),
2223 (*mac)[0], (*mac)[1], (*mac)[2],
2224 (*mac)[3], (*mac)[4], (*mac)[5]
2226 .vlan_tag = ((vlan_index != -1u) ?
2227 htons(priv->vlan_filter[vlan_index].id) :
2231 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2232 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2235 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2236 " (VLAN %s %" PRIu16 ")",
2238 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2240 ((vlan_index != -1u) ? "ID" : "index"),
2241 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2242 /* Create related flow. */
2244 flow = ibv_create_flow(rxq->qp, attr);
2246 /* It's not clear whether errno is always set in this case. */
2247 ERROR("%p: flow configuration failed, errno=%d: %s",
2249 (errno ? strerror(errno) : "Unknown error"));
2254 if (vlan_index == -1u)
2256 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2257 rxq->mac_flow[mac_index][vlan_index] = flow;
2262 * Register a MAC address in a RX queue.
2265 * Pointer to RX queue structure.
2267 * MAC address index to register.
2270 * 0 on success, errno value on failure.
2273 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2275 struct priv *priv = rxq->priv;
2277 unsigned int vlans = 0;
2280 assert(mac_index < elemof(priv->mac));
2281 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2282 rxq_mac_addr_del(rxq, mac_index);
2283 /* Fill VLAN specifications. */
2284 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2285 if (!priv->vlan_filter[i].enabled)
2287 /* Create related flow. */
2288 ret = rxq_add_flow(rxq, mac_index, i);
2293 /* Failure, rollback. */
2295 if (priv->vlan_filter[--i].enabled)
2296 rxq_del_flow(rxq, mac_index, i);
2300 /* In case there is no VLAN filter. */
2302 ret = rxq_add_flow(rxq, mac_index, -1);
2306 BITFIELD_SET(rxq->mac_configured, mac_index);
2311 * Register all MAC addresses in a RX queue.
2314 * Pointer to RX queue structure.
2317 * 0 on success, errno value on failure.
2320 rxq_mac_addrs_add(struct rxq *rxq)
2322 struct priv *priv = rxq->priv;
2326 for (i = 0; (i != elemof(priv->mac)); ++i) {
2327 if (!BITFIELD_ISSET(priv->mac_configured, i))
2329 ret = rxq_mac_addr_add(rxq, i);
2332 /* Failure, rollback. */
2334 rxq_mac_addr_del(rxq, --i);
2342 * Unregister a MAC address.
2344 * In RSS mode, the MAC address is unregistered from the parent queue,
2345 * otherwise it is unregistered from each queue directly.
2348 * Pointer to private structure.
2350 * MAC address index.
2353 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2357 assert(!priv->isolated);
2358 assert(mac_index < elemof(priv->mac));
2359 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2362 rxq_mac_addr_del(LIST_FIRST(&priv->parents), mac_index);
2365 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2366 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2368 BITFIELD_RESET(priv->mac_configured, mac_index);
2372 * Register a MAC address.
2374 * In RSS mode, the MAC address is registered in the parent queue,
2375 * otherwise it is registered in each queue directly.
2378 * Pointer to private structure.
2380 * MAC address index to use.
2382 * MAC address to register.
2385 * 0 on success, errno value on failure.
2388 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2389 const uint8_t (*mac)[ETHER_ADDR_LEN])
2394 assert(mac_index < elemof(priv->mac));
2395 /* First, make sure this address isn't already configured. */
2396 for (i = 0; (i != elemof(priv->mac)); ++i) {
2397 /* Skip this index, it's going to be reconfigured. */
2400 if (!BITFIELD_ISSET(priv->mac_configured, i))
2402 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2404 /* Address already configured elsewhere, return with error. */
2407 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2408 priv_mac_addr_del(priv, mac_index);
2409 priv->mac[mac_index] = (struct ether_addr){
2411 (*mac)[0], (*mac)[1], (*mac)[2],
2412 (*mac)[3], (*mac)[4], (*mac)[5]
2415 /* If device isn't started, this is all we need to do. */
2416 if (!priv->started) {
2418 /* Verify that all queues have this index disabled. */
2419 for (i = 0; (i != priv->rxqs_n); ++i) {
2420 if ((*priv->rxqs)[i] == NULL)
2422 assert(!BITFIELD_ISSET
2423 ((*priv->rxqs)[i]->mac_configured, mac_index));
2429 ret = rxq_mac_addr_add(LIST_FIRST(&priv->parents), mac_index);
2434 for (i = 0; (i != priv->rxqs_n); ++i) {
2435 if ((*priv->rxqs)[i] == NULL)
2437 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2440 /* Failure, rollback. */
2442 if ((*priv->rxqs)[(--i)] != NULL)
2443 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2447 BITFIELD_SET(priv->mac_configured, mac_index);
2452 * Enable allmulti mode in a RX queue.
2455 * Pointer to RX queue structure.
2458 * 0 on success, errno value on failure.
2461 rxq_allmulticast_enable(struct rxq *rxq)
2463 struct ibv_flow *flow;
2464 struct ibv_flow_attr attr = {
2465 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2467 .port = rxq->priv->port,
2471 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2472 if (rxq->allmulti_flow != NULL)
2475 flow = ibv_create_flow(rxq->qp, &attr);
2477 /* It's not clear whether errno is always set in this case. */
2478 ERROR("%p: flow configuration failed, errno=%d: %s",
2480 (errno ? strerror(errno) : "Unknown error"));
2485 rxq->allmulti_flow = flow;
2486 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2491 * Disable allmulti mode in a RX queue.
2494 * Pointer to RX queue structure.
2497 rxq_allmulticast_disable(struct rxq *rxq)
2499 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2500 if (rxq->allmulti_flow == NULL)
2502 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2503 rxq->allmulti_flow = NULL;
2504 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2508 * Enable promiscuous mode in a RX queue.
2511 * Pointer to RX queue structure.
2514 * 0 on success, errno value on failure.
2517 rxq_promiscuous_enable(struct rxq *rxq)
2519 struct ibv_flow *flow;
2520 struct ibv_flow_attr attr = {
2521 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2523 .port = rxq->priv->port,
2529 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2530 if (rxq->promisc_flow != NULL)
2533 flow = ibv_create_flow(rxq->qp, &attr);
2535 /* It's not clear whether errno is always set in this case. */
2536 ERROR("%p: flow configuration failed, errno=%d: %s",
2538 (errno ? strerror(errno) : "Unknown error"));
2543 rxq->promisc_flow = flow;
2544 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2549 * Disable promiscuous mode in a RX queue.
2552 * Pointer to RX queue structure.
2555 rxq_promiscuous_disable(struct rxq *rxq)
2559 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2560 if (rxq->promisc_flow == NULL)
2562 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2563 rxq->promisc_flow = NULL;
2564 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2568 * Clean up a RX queue.
2570 * Destroy objects, free allocated memory and reset the structure for reuse.
2573 * Pointer to RX queue structure.
2576 rxq_cleanup(struct rxq *rxq)
2578 struct ibv_exp_release_intf_params params;
2580 DEBUG("cleaning up %p", (void *)rxq);
2582 rxq_free_elts_sp(rxq);
2585 if (rxq->if_qp != NULL) {
2586 assert(rxq->priv != NULL);
2587 assert(rxq->priv->ctx != NULL);
2588 assert(rxq->qp != NULL);
2589 params = (struct ibv_exp_release_intf_params){
2592 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2596 if (rxq->if_cq != NULL) {
2597 assert(rxq->priv != NULL);
2598 assert(rxq->priv->ctx != NULL);
2599 assert(rxq->cq != NULL);
2600 params = (struct ibv_exp_release_intf_params){
2603 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2607 if (rxq->qp != NULL && !rxq->priv->isolated) {
2608 rxq_promiscuous_disable(rxq);
2609 rxq_allmulticast_disable(rxq);
2610 rxq_mac_addrs_del(rxq);
2612 if (rxq->qp != NULL)
2613 claim_zero(ibv_destroy_qp(rxq->qp));
2614 if (rxq->cq != NULL)
2615 claim_zero(ibv_destroy_cq(rxq->cq));
2616 if (rxq->channel != NULL)
2617 claim_zero(ibv_destroy_comp_channel(rxq->channel));
2618 if (rxq->rd != NULL) {
2619 struct ibv_exp_destroy_res_domain_attr attr = {
2623 assert(rxq->priv != NULL);
2624 assert(rxq->priv->ctx != NULL);
2625 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2629 if (rxq->mr != NULL)
2630 claim_zero(ibv_dereg_mr(rxq->mr));
2631 memset(rxq, 0, sizeof(*rxq));
2635 * Translate RX completion flags to packet type.
2638 * RX completion flags returned by poll_length_flags().
2640 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2643 * Packet type for struct rte_mbuf.
2645 static inline uint32_t
2646 rxq_cq_to_pkt_type(uint32_t flags)
2650 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2653 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,
2654 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2656 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,
2657 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN) |
2659 IBV_EXP_CQ_RX_IPV4_PACKET,
2660 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN) |
2662 IBV_EXP_CQ_RX_IPV6_PACKET,
2663 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN);
2667 IBV_EXP_CQ_RX_IPV4_PACKET,
2668 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2670 IBV_EXP_CQ_RX_IPV6_PACKET,
2671 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN);
2676 * Translate RX completion flags to offload flags.
2679 * Pointer to RX queue structure.
2681 * RX completion flags returned by poll_length_flags().
2684 * Offload flags (ol_flags) for struct rte_mbuf.
2686 static inline uint32_t
2687 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2689 uint32_t ol_flags = 0;
2694 IBV_EXP_CQ_RX_IP_CSUM_OK,
2695 PKT_RX_IP_CKSUM_GOOD) |
2697 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2698 PKT_RX_L4_CKSUM_GOOD);
2699 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2702 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2703 PKT_RX_IP_CKSUM_GOOD) |
2705 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2706 PKT_RX_L4_CKSUM_GOOD);
2711 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2714 * DPDK callback for RX with scattered packets support.
2717 * Generic pointer to RX queue structure.
2719 * Array to store received packets.
2721 * Maximum number of packets in array.
2724 * Number of packets successfully received (<= pkts_n).
2727 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2729 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2730 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2731 const unsigned int elts_n = rxq->elts_n;
2732 unsigned int elts_head = rxq->elts_head;
2733 struct ibv_recv_wr head;
2734 struct ibv_recv_wr **next = &head.next;
2735 struct ibv_recv_wr *bad_wr;
2737 unsigned int pkts_ret = 0;
2740 if (unlikely(!rxq->sp))
2741 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2742 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2744 for (i = 0; (i != pkts_n); ++i) {
2745 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2746 struct ibv_recv_wr *wr = &elt->wr;
2747 uint64_t wr_id = wr->wr_id;
2749 unsigned int pkt_buf_len;
2750 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2751 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2752 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2756 /* Sanity checks. */
2760 assert(wr_id < rxq->elts_n);
2761 assert(wr->sg_list == elt->sges);
2762 assert(wr->num_sge == elemof(elt->sges));
2763 assert(elts_head < rxq->elts_n);
2764 assert(rxq->elts_head < rxq->elts_n);
2765 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2767 if (unlikely(ret < 0)) {
2771 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2773 /* ibv_poll_cq() must be used in case of failure. */
2774 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2775 if (unlikely(wcs_n == 0))
2777 if (unlikely(wcs_n < 0)) {
2778 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2779 (void *)rxq, wcs_n);
2783 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2784 /* Whatever, just repost the offending WR. */
2785 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2786 " completion status (%d): %s",
2787 (void *)rxq, wc.wr_id, wc.status,
2788 ibv_wc_status_str(wc.status));
2789 #ifdef MLX4_PMD_SOFT_COUNTERS
2790 /* Increment dropped packets counter. */
2791 ++rxq->stats.idropped;
2793 /* Link completed WRs together for repost. */
2804 /* Link completed WRs together for repost. */
2808 * Replace spent segments with new ones, concatenate and
2809 * return them as pkt_buf.
2812 struct ibv_sge *sge = &elt->sges[j];
2813 struct rte_mbuf *seg = elt->bufs[j];
2814 struct rte_mbuf *rep;
2815 unsigned int seg_tailroom;
2818 * Fetch initial bytes of packet descriptor into a
2819 * cacheline while allocating rep.
2822 rep = rte_mbuf_raw_alloc(rxq->mp);
2823 if (unlikely(rep == NULL)) {
2825 * Unable to allocate a replacement mbuf,
2828 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
2829 " can't allocate a new mbuf",
2830 (void *)rxq, wr_id);
2831 if (pkt_buf != NULL) {
2832 *pkt_buf_next = NULL;
2833 rte_pktmbuf_free(pkt_buf);
2835 /* Increase out of memory counters. */
2836 ++rxq->stats.rx_nombuf;
2837 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2841 /* Poison user-modifiable fields in rep. */
2842 NEXT(rep) = (void *)((uintptr_t)-1);
2843 SET_DATA_OFF(rep, 0xdead);
2844 DATA_LEN(rep) = 0xd00d;
2845 PKT_LEN(rep) = 0xdeadd00d;
2846 NB_SEGS(rep) = 0x2a;
2850 * Clear special flags in mbuf to avoid
2851 * crashing while freeing.
2854 ~(uint64_t)(IND_ATTACHED_MBUF |
2857 assert(rep->buf_len == seg->buf_len);
2858 /* Reconfigure sge to use rep instead of seg. */
2859 assert(sge->lkey == rxq->mr->lkey);
2860 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
2863 /* Update pkt_buf if it's the first segment, or link
2864 * seg to the previous one and update pkt_buf_next. */
2865 *pkt_buf_next = seg;
2866 pkt_buf_next = &NEXT(seg);
2867 /* Update seg information. */
2868 seg_tailroom = (seg->buf_len - seg_headroom);
2869 assert(sge->length == seg_tailroom);
2870 SET_DATA_OFF(seg, seg_headroom);
2871 if (likely(len <= seg_tailroom)) {
2873 DATA_LEN(seg) = len;
2876 assert(rte_pktmbuf_headroom(seg) ==
2878 assert(rte_pktmbuf_tailroom(seg) ==
2879 (seg_tailroom - len));
2882 DATA_LEN(seg) = seg_tailroom;
2883 PKT_LEN(seg) = seg_tailroom;
2885 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
2886 assert(rte_pktmbuf_tailroom(seg) == 0);
2887 /* Fix len and clear headroom for next segments. */
2888 len -= seg_tailroom;
2891 /* Update head and tail segments. */
2892 *pkt_buf_next = NULL;
2893 assert(pkt_buf != NULL);
2895 NB_SEGS(pkt_buf) = j;
2896 PORT(pkt_buf) = rxq->port_id;
2897 PKT_LEN(pkt_buf) = pkt_buf_len;
2898 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
2899 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
2901 /* Return packet. */
2902 *(pkts++) = pkt_buf;
2904 #ifdef MLX4_PMD_SOFT_COUNTERS
2905 /* Increase bytes counter. */
2906 rxq->stats.ibytes += pkt_buf_len;
2909 if (++elts_head >= elts_n)
2913 if (unlikely(i == 0))
2917 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
2918 if (unlikely(ret)) {
2919 /* Inability to repost WRs is fatal. */
2920 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
2926 rxq->elts_head = elts_head;
2927 #ifdef MLX4_PMD_SOFT_COUNTERS
2928 /* Increase packets counter. */
2929 rxq->stats.ipackets += pkts_ret;
2935 * DPDK callback for RX.
2937 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
2938 * manage scattered packets. Improves performance when MRU is lower than the
2939 * size of the first segment.
2942 * Generic pointer to RX queue structure.
2944 * Array to store received packets.
2946 * Maximum number of packets in array.
2949 * Number of packets successfully received (<= pkts_n).
2952 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2954 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2955 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
2956 const unsigned int elts_n = rxq->elts_n;
2957 unsigned int elts_head = rxq->elts_head;
2958 struct ibv_sge sges[pkts_n];
2960 unsigned int pkts_ret = 0;
2963 if (unlikely(rxq->sp))
2964 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
2965 for (i = 0; (i != pkts_n); ++i) {
2966 struct rxq_elt *elt = &(*elts)[elts_head];
2967 struct ibv_recv_wr *wr = &elt->wr;
2968 uint64_t wr_id = wr->wr_id;
2970 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
2971 WR_ID(wr_id).offset);
2972 struct rte_mbuf *rep;
2975 /* Sanity checks. */
2976 assert(WR_ID(wr_id).id < rxq->elts_n);
2977 assert(wr->sg_list == &elt->sge);
2978 assert(wr->num_sge == 1);
2979 assert(elts_head < rxq->elts_n);
2980 assert(rxq->elts_head < rxq->elts_n);
2982 * Fetch initial bytes of packet descriptor into a
2983 * cacheline while allocating rep.
2985 rte_mbuf_prefetch_part1(seg);
2986 rte_mbuf_prefetch_part2(seg);
2987 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2989 if (unlikely(ret < 0)) {
2993 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2995 /* ibv_poll_cq() must be used in case of failure. */
2996 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2997 if (unlikely(wcs_n == 0))
2999 if (unlikely(wcs_n < 0)) {
3000 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3001 (void *)rxq, wcs_n);
3005 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3006 /* Whatever, just repost the offending WR. */
3007 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3008 " completion status (%d): %s",
3009 (void *)rxq, wc.wr_id, wc.status,
3010 ibv_wc_status_str(wc.status));
3011 #ifdef MLX4_PMD_SOFT_COUNTERS
3012 /* Increment dropped packets counter. */
3013 ++rxq->stats.idropped;
3015 /* Add SGE to array for repost. */
3024 rep = rte_mbuf_raw_alloc(rxq->mp);
3025 if (unlikely(rep == NULL)) {
3027 * Unable to allocate a replacement mbuf,
3030 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3031 " can't allocate a new mbuf",
3032 (void *)rxq, WR_ID(wr_id).id);
3033 /* Increase out of memory counters. */
3034 ++rxq->stats.rx_nombuf;
3035 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3036 /* Add SGE to array for repost. */
3041 /* Reconfigure sge to use rep instead of seg. */
3042 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3043 assert(elt->sge.lkey == rxq->mr->lkey);
3044 WR_ID(wr->wr_id).offset =
3045 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3047 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3049 /* Add SGE to array for repost. */
3052 /* Update seg information. */
3053 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3055 PORT(seg) = rxq->port_id;
3058 DATA_LEN(seg) = len;
3059 seg->packet_type = rxq_cq_to_pkt_type(flags);
3060 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3062 /* Return packet. */
3065 #ifdef MLX4_PMD_SOFT_COUNTERS
3066 /* Increase bytes counter. */
3067 rxq->stats.ibytes += len;
3070 if (++elts_head >= elts_n)
3074 if (unlikely(i == 0))
3077 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3078 if (unlikely(ret)) {
3079 /* Inability to repost WRs is fatal. */
3080 DEBUG("%p: recv_burst(): failed (ret=%d)",
3085 rxq->elts_head = elts_head;
3086 #ifdef MLX4_PMD_SOFT_COUNTERS
3087 /* Increase packets counter. */
3088 rxq->stats.ipackets += pkts_ret;
3094 * Allocate a Queue Pair.
3095 * Optionally setup inline receive if supported.
3098 * Pointer to private structure.
3100 * Completion queue to associate with QP.
3102 * Number of descriptors in QP (hint only).
3105 * QP pointer or NULL in case of error.
3107 static struct ibv_qp *
3108 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3109 struct ibv_exp_res_domain *rd)
3111 struct ibv_exp_qp_init_attr attr = {
3112 /* CQ to be associated with the send queue. */
3114 /* CQ to be associated with the receive queue. */
3117 /* Max number of outstanding WRs. */
3118 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3119 priv->device_attr.max_qp_wr :
3121 /* Max number of scatter/gather elements in a WR. */
3122 .max_recv_sge = ((priv->device_attr.max_sge <
3123 MLX4_PMD_SGE_WR_N) ?
3124 priv->device_attr.max_sge :
3127 .qp_type = IBV_QPT_RAW_PACKET,
3128 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3129 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3134 attr.max_inl_recv = priv->inl_recv_size;
3135 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3136 return ibv_exp_create_qp(priv->ctx, &attr);
3140 * Allocate a RSS Queue Pair.
3141 * Optionally setup inline receive if supported.
3144 * Pointer to private structure.
3146 * Completion queue to associate with QP.
3148 * Number of descriptors in QP (hint only).
3150 * If nonzero, a number of children for parent QP and zero for a child.
3152 * Pointer for a parent in a child case, NULL otherwise.
3155 * QP pointer or NULL in case of error.
3157 static struct ibv_qp *
3158 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3159 int children_n, struct ibv_exp_res_domain *rd,
3160 struct rxq *rxq_parent)
3162 struct ibv_exp_qp_init_attr attr = {
3163 /* CQ to be associated with the send queue. */
3165 /* CQ to be associated with the receive queue. */
3168 /* Max number of outstanding WRs. */
3169 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3170 priv->device_attr.max_qp_wr :
3172 /* Max number of scatter/gather elements in a WR. */
3173 .max_recv_sge = ((priv->device_attr.max_sge <
3174 MLX4_PMD_SGE_WR_N) ?
3175 priv->device_attr.max_sge :
3178 .qp_type = IBV_QPT_RAW_PACKET,
3179 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3180 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3181 IBV_EXP_QP_INIT_ATTR_QPG),
3186 attr.max_inl_recv = priv->inl_recv_size,
3187 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3188 if (children_n > 0) {
3189 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3190 /* TSS isn't necessary. */
3191 attr.qpg.parent_attrib.tss_child_count = 0;
3192 attr.qpg.parent_attrib.rss_child_count =
3193 rte_align32pow2(children_n + 1) >> 1;
3194 DEBUG("initializing parent RSS queue");
3196 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3197 attr.qpg.qpg_parent = rxq_parent->qp;
3198 DEBUG("initializing child RSS queue");
3200 return ibv_exp_create_qp(priv->ctx, &attr);
3204 * Reconfigure a RX queue with new parameters.
3206 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3207 * thread (such as a control thread), may corrupt the pool.
3208 * In case of failure, the queue is left untouched.
3211 * Pointer to Ethernet device structure.
3216 * 0 on success, errno value on failure.
3219 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3221 struct priv *priv = rxq->priv;
3222 struct rxq tmpl = *rxq;
3223 unsigned int mbuf_n;
3224 unsigned int desc_n;
3225 struct rte_mbuf **pool;
3227 struct ibv_exp_qp_attr mod;
3228 struct ibv_recv_wr *bad_wr;
3229 unsigned int mb_len;
3232 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
3233 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3234 /* Number of descriptors and mbufs currently allocated. */
3235 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3237 /* Toggle RX checksum offload if hardware supports it. */
3238 if (priv->hw_csum) {
3239 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3240 rxq->csum = tmpl.csum;
3242 if (priv->hw_csum_l2tun) {
3243 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3244 rxq->csum_l2tun = tmpl.csum_l2tun;
3246 /* Enable scattered packets support for this queue if necessary. */
3247 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3248 if (dev->data->dev_conf.rxmode.enable_scatter &&
3249 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3250 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3252 desc_n /= MLX4_PMD_SGE_WR_N;
3255 DEBUG("%p: %s scattered packets support (%u WRs)",
3256 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3257 /* If scatter mode is the same as before, nothing to do. */
3258 if (tmpl.sp == rxq->sp) {
3259 DEBUG("%p: nothing to do", (void *)dev);
3262 /* Remove attached flows if RSS is disabled (no parent queue). */
3263 if (!priv->rss && !priv->isolated) {
3264 rxq_allmulticast_disable(&tmpl);
3265 rxq_promiscuous_disable(&tmpl);
3266 rxq_mac_addrs_del(&tmpl);
3267 /* Update original queue in case of failure. */
3268 rxq->allmulti_flow = tmpl.allmulti_flow;
3269 rxq->promisc_flow = tmpl.promisc_flow;
3270 memcpy(rxq->mac_configured, tmpl.mac_configured,
3271 sizeof(rxq->mac_configured));
3272 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3274 /* From now on, any failure will render the queue unusable.
3275 * Reinitialize QP. */
3278 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3279 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3281 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3285 mod = (struct ibv_exp_qp_attr){
3286 /* Move the QP to this state. */
3287 .qp_state = IBV_QPS_INIT,
3288 /* Primary port number. */
3289 .port_num = priv->port
3291 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3295 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3296 (void *)dev, strerror(err));
3301 err = ibv_resize_cq(tmpl.cq, desc_n);
3303 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3307 /* Reconfigure flows. Do not care for errors. */
3308 if (!priv->rss && !priv->isolated) {
3309 rxq_mac_addrs_add(&tmpl);
3311 rxq_promiscuous_enable(&tmpl);
3313 rxq_allmulticast_enable(&tmpl);
3314 /* Update original queue in case of failure. */
3315 rxq->allmulti_flow = tmpl.allmulti_flow;
3316 rxq->promisc_flow = tmpl.promisc_flow;
3317 memcpy(rxq->mac_configured, tmpl.mac_configured,
3318 sizeof(rxq->mac_configured));
3319 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3321 /* Allocate pool. */
3322 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3324 ERROR("%p: cannot allocate memory", (void *)dev);
3327 /* Snatch mbufs from original queue. */
3330 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3332 for (i = 0; (i != elemof(*elts)); ++i) {
3333 struct rxq_elt_sp *elt = &(*elts)[i];
3336 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3337 assert(elt->bufs[j] != NULL);
3338 pool[k++] = elt->bufs[j];
3342 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3344 for (i = 0; (i != elemof(*elts)); ++i) {
3345 struct rxq_elt *elt = &(*elts)[i];
3346 struct rte_mbuf *buf = (void *)
3347 ((uintptr_t)elt->sge.addr -
3348 WR_ID(elt->wr.wr_id).offset);
3350 assert(WR_ID(elt->wr.wr_id).id == i);
3354 assert(k == mbuf_n);
3356 tmpl.elts.sp = NULL;
3357 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3359 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3360 rxq_alloc_elts(&tmpl, desc_n, pool));
3362 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3367 assert(tmpl.elts_n == desc_n);
3368 assert(tmpl.elts.sp != NULL);
3370 /* Clean up original data. */
3372 rte_free(rxq->elts.sp);
3373 rxq->elts.sp = NULL;
3377 err = ibv_post_recv(tmpl.qp,
3379 &(*tmpl.elts.sp)[0].wr :
3380 &(*tmpl.elts.no_sp)[0].wr),
3383 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3389 mod = (struct ibv_exp_qp_attr){
3390 .qp_state = IBV_QPS_RTR
3392 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3394 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3395 (void *)dev, strerror(err));
3403 * Create verbs QP resources associated with a rxq.
3406 * Pointer to RX queue structure.
3408 * Number of descriptors to configure in queue.
3410 * If true, the queue is disabled because its index is higher or
3411 * equal to the real number of queues, which must be a power of 2.
3413 * The number of children in a parent case, zero for a child.
3415 * The pointer to a parent RX structure for a child in RSS case,
3419 * 0 on success, errno value on failure.
3422 rxq_create_qp(struct rxq *rxq,
3426 struct rxq *rxq_parent)
3429 struct ibv_exp_qp_attr mod;
3430 struct ibv_exp_query_intf_params params;
3431 enum ibv_exp_query_intf_status status;
3432 struct ibv_recv_wr *bad_wr;
3433 int parent = (children_n > 0);
3434 struct priv *priv = rxq->priv;
3436 if (priv->rss && !inactive && (rxq_parent || parent))
3437 rxq->qp = rxq_setup_qp_rss(priv, rxq->cq, desc,
3438 children_n, rxq->rd,
3441 rxq->qp = rxq_setup_qp(priv, rxq->cq, desc, rxq->rd);
3442 if (rxq->qp == NULL) {
3443 ret = (errno ? errno : EINVAL);
3444 ERROR("QP creation failure: %s",
3448 mod = (struct ibv_exp_qp_attr){
3449 /* Move the QP to this state. */
3450 .qp_state = IBV_QPS_INIT,
3451 /* Primary port number. */
3452 .port_num = priv->port
3454 ret = ibv_exp_modify_qp(rxq->qp, &mod,
3456 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3459 ERROR("QP state to IBV_QPS_INIT failed: %s",
3463 if (!priv->isolated && (parent || !priv->rss)) {
3464 /* Configure MAC and broadcast addresses. */
3465 ret = rxq_mac_addrs_add(rxq);
3467 ERROR("QP flow attachment failed: %s",
3473 ret = ibv_post_recv(rxq->qp,
3475 &(*rxq->elts.sp)[0].wr :
3476 &(*rxq->elts.no_sp)[0].wr),
3479 ERROR("ibv_post_recv() failed for WR %p: %s",
3485 mod = (struct ibv_exp_qp_attr){
3486 .qp_state = IBV_QPS_RTR
3488 ret = ibv_exp_modify_qp(rxq->qp, &mod, IBV_EXP_QP_STATE);
3490 ERROR("QP state to IBV_QPS_RTR failed: %s",
3494 params = (struct ibv_exp_query_intf_params){
3495 .intf_scope = IBV_EXP_INTF_GLOBAL,
3496 .intf = IBV_EXP_INTF_QP_BURST,
3499 rxq->if_qp = ibv_exp_query_intf(priv->ctx, ¶ms, &status);
3500 if (rxq->if_qp == NULL) {
3501 ERROR("QP interface family query failed with status %d",
3509 * Configure a RX queue.
3512 * Pointer to Ethernet device structure.
3514 * Pointer to RX queue structure.
3516 * Number of descriptors to configure in queue.
3518 * NUMA socket on which memory must be allocated.
3520 * If true, the queue is disabled because its index is higher or
3521 * equal to the real number of queues, which must be a power of 2.
3523 * Thresholds parameters.
3525 * Memory pool for buffer allocations.
3527 * The number of children in a parent case, zero for a child.
3529 * The pointer to a parent RX structure (or NULL) in a child case,
3533 * 0 on success, errno value on failure.
3536 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3537 unsigned int socket, int inactive,
3538 const struct rte_eth_rxconf *conf,
3539 struct rte_mempool *mp, int children_n,
3540 struct rxq *rxq_parent)
3542 struct priv *priv = dev->data->dev_private;
3549 struct ibv_exp_query_intf_params params;
3550 struct ibv_exp_cq_init_attr cq;
3551 struct ibv_exp_res_domain_init_attr rd;
3553 enum ibv_exp_query_intf_status status;
3554 unsigned int mb_len;
3556 int parent = (children_n > 0);
3558 (void)conf; /* Thresholds configuration (ignored). */
3560 * If this is a parent queue, hardware must support RSS and
3561 * RSS must be enabled.
3563 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3565 /* Even if unused, ibv_create_cq() requires at least one
3570 mb_len = rte_pktmbuf_data_room_size(mp);
3571 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3572 ERROR("%p: invalid number of RX descriptors (must be a"
3573 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3576 /* Toggle RX checksum offload if hardware supports it. */
3578 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3579 if (priv->hw_csum_l2tun)
3580 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3581 /* Enable scattered packets support for this queue if necessary. */
3582 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3583 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
3584 (mb_len - RTE_PKTMBUF_HEADROOM)) {
3586 } else if (dev->data->dev_conf.rxmode.enable_scatter) {
3588 desc /= MLX4_PMD_SGE_WR_N;
3590 WARN("%p: the requested maximum Rx packet size (%u) is"
3591 " larger than a single mbuf (%u) and scattered"
3592 " mode has not been requested",
3594 dev->data->dev_conf.rxmode.max_rx_pkt_len,
3595 mb_len - RTE_PKTMBUF_HEADROOM);
3597 DEBUG("%p: %s scattered packets support (%u WRs)",
3598 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3599 /* Use the entire RX mempool as the memory region. */
3600 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3601 if (tmpl.mr == NULL) {
3603 ERROR("%p: MR creation failure: %s",
3604 (void *)dev, strerror(ret));
3608 attr.rd = (struct ibv_exp_res_domain_init_attr){
3609 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3610 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3611 .thread_model = IBV_EXP_THREAD_SINGLE,
3612 .msg_model = IBV_EXP_MSG_HIGH_BW,
3614 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3615 if (tmpl.rd == NULL) {
3617 ERROR("%p: RD creation failure: %s",
3618 (void *)dev, strerror(ret));
3621 if (dev->data->dev_conf.intr_conf.rxq) {
3622 tmpl.channel = ibv_create_comp_channel(priv->ctx);
3623 if (tmpl.channel == NULL) {
3625 ERROR("%p: Rx interrupt completion channel creation"
3627 (void *)dev, strerror(ret));
3631 attr.cq = (struct ibv_exp_cq_init_attr){
3632 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3633 .res_domain = tmpl.rd,
3635 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, tmpl.channel, 0,
3637 if (tmpl.cq == NULL) {
3639 ERROR("%p: CQ creation failure: %s",
3640 (void *)dev, strerror(ret));
3643 DEBUG("priv->device_attr.max_qp_wr is %d",
3644 priv->device_attr.max_qp_wr);
3645 DEBUG("priv->device_attr.max_sge is %d",
3646 priv->device_attr.max_sge);
3647 /* Allocate descriptors for RX queues, except for the RSS parent. */
3651 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3653 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3655 ERROR("%p: RXQ allocation failed: %s",
3656 (void *)dev, strerror(ret));
3660 if (parent || rxq_parent || !priv->rss) {
3661 ret = rxq_create_qp(&tmpl, desc, inactive,
3662 children_n, rxq_parent);
3667 tmpl.port_id = dev->data->port_id;
3668 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3669 attr.params = (struct ibv_exp_query_intf_params){
3670 .intf_scope = IBV_EXP_INTF_GLOBAL,
3671 .intf = IBV_EXP_INTF_CQ,
3674 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3675 if (tmpl.if_cq == NULL) {
3677 ERROR("%p: CQ interface family query failed with status %d",
3678 (void *)dev, status);
3681 /* Clean up rxq in case we're reinitializing it. */
3682 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3685 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3695 * DPDK callback to configure a RX queue.
3698 * Pointer to Ethernet device structure.
3702 * Number of descriptors to configure in queue.
3704 * NUMA socket on which memory must be allocated.
3706 * Thresholds parameters.
3708 * Memory pool for buffer allocations.
3711 * 0 on success, negative errno value on failure.
3714 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3715 unsigned int socket, const struct rte_eth_rxconf *conf,
3716 struct rte_mempool *mp)
3719 struct priv *priv = dev->data->dev_private;
3720 struct rxq *rxq = (*priv->rxqs)[idx];
3725 DEBUG("%p: configuring queue %u for %u descriptors",
3726 (void *)dev, idx, desc);
3727 if (idx >= priv->rxqs_n) {
3728 ERROR("%p: queue index out of range (%u >= %u)",
3729 (void *)dev, idx, priv->rxqs_n);
3734 DEBUG("%p: reusing already allocated queue index %u (%p)",
3735 (void *)dev, idx, (void *)rxq);
3736 if (priv->started) {
3740 (*priv->rxqs)[idx] = NULL;
3743 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3745 ERROR("%p: unable to allocate queue index %u",
3751 if (priv->rss && !priv->isolated) {
3752 /* The list consists of the single default one. */
3753 parent = LIST_FIRST(&priv->parents);
3754 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
3759 ret = rxq_setup(dev, rxq, desc, socket,
3760 inactive, conf, mp, 0, parent);
3764 rxq->stats.idx = idx;
3765 DEBUG("%p: adding RX queue %p to list",
3766 (void *)dev, (void *)rxq);
3767 (*priv->rxqs)[idx] = rxq;
3768 /* Update receive callback. */
3770 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3772 dev->rx_pkt_burst = mlx4_rx_burst;
3779 * DPDK callback to release a RX queue.
3782 * Generic RX queue pointer.
3785 mlx4_rx_queue_release(void *dpdk_rxq)
3787 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3795 for (i = 0; (i != priv->rxqs_n); ++i)
3796 if ((*priv->rxqs)[i] == rxq) {
3797 DEBUG("%p: removing RX queue %p from list",
3798 (void *)priv->dev, (void *)rxq);
3799 (*priv->rxqs)[i] = NULL;
3808 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3811 priv_dev_removal_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3814 priv_dev_link_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3817 * DPDK callback to start the device.
3819 * Simulate device start by attaching all configured flows.
3822 * Pointer to Ethernet device structure.
3825 * 0 on success, negative errno value on failure.
3828 mlx4_dev_start(struct rte_eth_dev *dev)
3830 struct priv *priv = dev->data->dev_private;
3837 if (priv->started) {
3841 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
3843 if (priv->isolated) {
3846 } else if (priv->rss) {
3847 rxq = LIST_FIRST(&priv->parents);
3850 rxq = (*priv->rxqs)[0];
3853 /* Iterate only once when RSS is enabled. */
3855 /* Ignore nonexistent RX queues. */
3858 ret = rxq_mac_addrs_add(rxq);
3859 if (!ret && priv->promisc)
3860 ret = rxq_promiscuous_enable(rxq);
3861 if (!ret && priv->allmulti)
3862 ret = rxq_allmulticast_enable(rxq);
3865 WARN("%p: QP flow attachment failed: %s",
3866 (void *)dev, strerror(ret));
3868 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
3869 ret = priv_dev_link_interrupt_handler_install(priv, dev);
3871 ERROR("%p: LSC handler install failed",
3875 ret = priv_dev_removal_interrupt_handler_install(priv, dev);
3877 ERROR("%p: RMV handler install failed",
3881 ret = priv_rx_intr_vec_enable(priv);
3883 ERROR("%p: Rx interrupt vector creation failed",
3887 ret = mlx4_priv_flow_start(priv);
3889 ERROR("%p: flow start failed: %s",
3890 (void *)dev, strerror(ret));
3898 rxq = (*priv->rxqs)[i--];
3900 rxq_allmulticast_disable(rxq);
3901 rxq_promiscuous_disable(rxq);
3902 rxq_mac_addrs_del(rxq);
3911 * DPDK callback to stop the device.
3913 * Simulate device stop by detaching all configured flows.
3916 * Pointer to Ethernet device structure.
3919 mlx4_dev_stop(struct rte_eth_dev *dev)
3921 struct priv *priv = dev->data->dev_private;
3927 if (!priv->started) {
3931 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
3933 if (priv->isolated) {
3936 } else if (priv->rss) {
3937 rxq = LIST_FIRST(&priv->parents);
3940 rxq = (*priv->rxqs)[0];
3943 mlx4_priv_flow_stop(priv);
3944 /* Iterate only once when RSS is enabled. */
3946 /* Ignore nonexistent RX queues. */
3949 rxq_allmulticast_disable(rxq);
3950 rxq_promiscuous_disable(rxq);
3951 rxq_mac_addrs_del(rxq);
3952 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
3957 * Dummy DPDK callback for TX.
3959 * This function is used to temporarily replace the real callback during
3960 * unsafe control operations on the queue, or in case of error.
3963 * Generic pointer to TX queue structure.
3965 * Packets to transmit.
3967 * Number of packets in array.
3970 * Number of packets successfully transmitted (<= pkts_n).
3973 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
3982 * Dummy DPDK callback for RX.
3984 * This function is used to temporarily replace the real callback during
3985 * unsafe control operations on the queue, or in case of error.
3988 * Generic pointer to RX queue structure.
3990 * Array to store received packets.
3992 * Maximum number of packets in array.
3995 * Number of packets successfully received (<= pkts_n).
3998 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4007 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4010 priv_dev_removal_interrupt_handler_uninstall(struct priv *,
4011 struct rte_eth_dev *);
4014 priv_dev_link_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4017 * DPDK callback to close the device.
4019 * Destroy all queues and objects, free memory.
4022 * Pointer to Ethernet device structure.
4025 mlx4_dev_close(struct rte_eth_dev *dev)
4027 struct priv *priv = dev->data->dev_private;
4034 DEBUG("%p: closing device \"%s\"",
4036 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4037 /* Prevent crashes when queues are still in use. This is unfortunately
4038 * still required for DPDK 1.3 because some programs (such as testpmd)
4039 * never release them before closing the device. */
4040 dev->rx_pkt_burst = removed_rx_burst;
4041 dev->tx_pkt_burst = removed_tx_burst;
4042 if (priv->rxqs != NULL) {
4043 /* XXX race condition if mlx4_rx_burst() is still running. */
4045 for (i = 0; (i != priv->rxqs_n); ++i) {
4046 tmp = (*priv->rxqs)[i];
4049 (*priv->rxqs)[i] = NULL;
4056 if (priv->txqs != NULL) {
4057 /* XXX race condition if mlx4_tx_burst() is still running. */
4059 for (i = 0; (i != priv->txqs_n); ++i) {
4060 tmp = (*priv->txqs)[i];
4063 (*priv->txqs)[i] = NULL;
4071 priv_parent_list_cleanup(priv);
4072 if (priv->pd != NULL) {
4073 assert(priv->ctx != NULL);
4074 claim_zero(ibv_dealloc_pd(priv->pd));
4075 claim_zero(ibv_close_device(priv->ctx));
4077 assert(priv->ctx == NULL);
4078 priv_dev_removal_interrupt_handler_uninstall(priv, dev);
4079 priv_dev_link_interrupt_handler_uninstall(priv, dev);
4080 priv_rx_intr_vec_disable(priv);
4082 memset(priv, 0, sizeof(*priv));
4086 * Change the link state (UP / DOWN).
4089 * Pointer to Ethernet device private data.
4091 * Nonzero for link up, otherwise link down.
4094 * 0 on success, errno value on failure.
4097 priv_set_link(struct priv *priv, int up)
4099 struct rte_eth_dev *dev = priv->dev;
4104 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
4107 for (i = 0; i < priv->rxqs_n; i++)
4108 if ((*priv->rxqs)[i]->sp)
4110 /* Check if an sp queue exists.
4111 * Note: Some old frames might be received.
4113 if (i == priv->rxqs_n)
4114 dev->rx_pkt_burst = mlx4_rx_burst;
4116 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4117 dev->tx_pkt_burst = mlx4_tx_burst;
4119 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
4122 dev->rx_pkt_burst = removed_rx_burst;
4123 dev->tx_pkt_burst = removed_tx_burst;
4129 * DPDK callback to bring the link DOWN.
4132 * Pointer to Ethernet device structure.
4135 * 0 on success, errno value on failure.
4138 mlx4_set_link_down(struct rte_eth_dev *dev)
4140 struct priv *priv = dev->data->dev_private;
4144 err = priv_set_link(priv, 0);
4150 * DPDK callback to bring the link UP.
4153 * Pointer to Ethernet device structure.
4156 * 0 on success, errno value on failure.
4159 mlx4_set_link_up(struct rte_eth_dev *dev)
4161 struct priv *priv = dev->data->dev_private;
4165 err = priv_set_link(priv, 1);
4170 * DPDK callback to get information about the device.
4173 * Pointer to Ethernet device structure.
4175 * Info structure output buffer.
4178 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4180 struct priv *priv = dev->data->dev_private;
4182 char ifname[IF_NAMESIZE];
4184 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
4189 /* FIXME: we should ask the device for these values. */
4190 info->min_rx_bufsize = 32;
4191 info->max_rx_pktlen = 65536;
4193 * Since we need one CQ per QP, the limit is the minimum number
4194 * between the two values.
4196 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4197 priv->device_attr.max_qp : priv->device_attr.max_cq);
4198 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4201 info->max_rx_queues = max;
4202 info->max_tx_queues = max;
4203 /* Last array entry is reserved for broadcast. */
4204 info->max_mac_addrs = (elemof(priv->mac) - 1);
4205 info->rx_offload_capa =
4207 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4208 DEV_RX_OFFLOAD_UDP_CKSUM |
4209 DEV_RX_OFFLOAD_TCP_CKSUM) :
4211 info->tx_offload_capa =
4213 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4214 DEV_TX_OFFLOAD_UDP_CKSUM |
4215 DEV_TX_OFFLOAD_TCP_CKSUM) :
4217 if (priv_get_ifname(priv, &ifname) == 0)
4218 info->if_index = if_nametoindex(ifname);
4221 ETH_LINK_SPEED_10G |
4222 ETH_LINK_SPEED_20G |
4223 ETH_LINK_SPEED_40G |
4228 static const uint32_t *
4229 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4231 static const uint32_t ptypes[] = {
4232 /* refers to rxq_cq_to_pkt_type() */
4235 RTE_PTYPE_INNER_L3_IPV4,
4236 RTE_PTYPE_INNER_L3_IPV6,
4240 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4241 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4247 * DPDK callback to get device statistics.
4250 * Pointer to Ethernet device structure.
4252 * Stats structure output buffer.
4255 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4257 struct priv *priv = dev->data->dev_private;
4258 struct rte_eth_stats tmp = {0};
4265 /* Add software counters. */
4266 for (i = 0; (i != priv->rxqs_n); ++i) {
4267 struct rxq *rxq = (*priv->rxqs)[i];
4271 idx = rxq->stats.idx;
4272 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4273 #ifdef MLX4_PMD_SOFT_COUNTERS
4274 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4275 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4277 tmp.q_errors[idx] += (rxq->stats.idropped +
4278 rxq->stats.rx_nombuf);
4280 #ifdef MLX4_PMD_SOFT_COUNTERS
4281 tmp.ipackets += rxq->stats.ipackets;
4282 tmp.ibytes += rxq->stats.ibytes;
4284 tmp.ierrors += rxq->stats.idropped;
4285 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4287 for (i = 0; (i != priv->txqs_n); ++i) {
4288 struct txq *txq = (*priv->txqs)[i];
4292 idx = txq->stats.idx;
4293 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4294 #ifdef MLX4_PMD_SOFT_COUNTERS
4295 tmp.q_opackets[idx] += txq->stats.opackets;
4296 tmp.q_obytes[idx] += txq->stats.obytes;
4298 tmp.q_errors[idx] += txq->stats.odropped;
4300 #ifdef MLX4_PMD_SOFT_COUNTERS
4301 tmp.opackets += txq->stats.opackets;
4302 tmp.obytes += txq->stats.obytes;
4304 tmp.oerrors += txq->stats.odropped;
4306 #ifndef MLX4_PMD_SOFT_COUNTERS
4307 /* FIXME: retrieve and add hardware counters. */
4314 * DPDK callback to clear device statistics.
4317 * Pointer to Ethernet device structure.
4320 mlx4_stats_reset(struct rte_eth_dev *dev)
4322 struct priv *priv = dev->data->dev_private;
4329 for (i = 0; (i != priv->rxqs_n); ++i) {
4330 if ((*priv->rxqs)[i] == NULL)
4332 idx = (*priv->rxqs)[i]->stats.idx;
4333 (*priv->rxqs)[i]->stats =
4334 (struct mlx4_rxq_stats){ .idx = idx };
4336 for (i = 0; (i != priv->txqs_n); ++i) {
4337 if ((*priv->txqs)[i] == NULL)
4339 idx = (*priv->txqs)[i]->stats.idx;
4340 (*priv->txqs)[i]->stats =
4341 (struct mlx4_txq_stats){ .idx = idx };
4343 #ifndef MLX4_PMD_SOFT_COUNTERS
4344 /* FIXME: reset hardware counters. */
4350 * DPDK callback to remove a MAC address.
4353 * Pointer to Ethernet device structure.
4355 * MAC address index.
4358 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4360 struct priv *priv = dev->data->dev_private;
4365 DEBUG("%p: removing MAC address from index %" PRIu32,
4366 (void *)dev, index);
4367 /* Last array entry is reserved for broadcast. */
4368 if (index >= (elemof(priv->mac) - 1))
4370 priv_mac_addr_del(priv, index);
4376 * DPDK callback to add a MAC address.
4379 * Pointer to Ethernet device structure.
4381 * MAC address to register.
4383 * MAC address index.
4385 * VMDq pool index to associate address with (ignored).
4388 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4389 uint32_t index, uint32_t vmdq)
4391 struct priv *priv = dev->data->dev_private;
4396 if (priv->isolated) {
4397 DEBUG("%p: cannot add MAC address, "
4398 "device is in isolated mode", (void *)dev);
4402 DEBUG("%p: adding MAC address at index %" PRIu32,
4403 (void *)dev, index);
4404 /* Last array entry is reserved for broadcast. */
4405 if (index >= (elemof(priv->mac) - 1)) {
4409 re = priv_mac_addr_add(priv, index,
4410 (const uint8_t (*)[ETHER_ADDR_LEN])
4411 mac_addr->addr_bytes);
4418 * DPDK callback to set the primary MAC address.
4421 * Pointer to Ethernet device structure.
4423 * MAC address to register.
4426 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4428 DEBUG("%p: setting primary MAC address", (void *)dev);
4429 mlx4_mac_addr_remove(dev, 0);
4430 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4434 * DPDK callback to enable promiscuous mode.
4437 * Pointer to Ethernet device structure.
4440 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4442 struct priv *priv = dev->data->dev_private;
4447 if (priv->isolated) {
4448 DEBUG("%p: cannot enable promiscuous, "
4449 "device is in isolated mode", (void *)dev);
4453 if (priv->promisc) {
4457 /* If device isn't started, this is all we need to do. */
4461 ret = rxq_promiscuous_enable(LIST_FIRST(&priv->parents));
4468 for (i = 0; (i != priv->rxqs_n); ++i) {
4469 if ((*priv->rxqs)[i] == NULL)
4471 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4474 /* Failure, rollback. */
4476 if ((*priv->rxqs)[--i] != NULL)
4477 rxq_promiscuous_disable((*priv->rxqs)[i]);
4487 * DPDK callback to disable promiscuous mode.
4490 * Pointer to Ethernet device structure.
4493 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4495 struct priv *priv = dev->data->dev_private;
4499 if (!priv->promisc || priv->isolated) {
4504 rxq_promiscuous_disable(LIST_FIRST(&priv->parents));
4507 for (i = 0; (i != priv->rxqs_n); ++i)
4508 if ((*priv->rxqs)[i] != NULL)
4509 rxq_promiscuous_disable((*priv->rxqs)[i]);
4516 * DPDK callback to enable allmulti mode.
4519 * Pointer to Ethernet device structure.
4522 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4524 struct priv *priv = dev->data->dev_private;
4529 if (priv->isolated) {
4530 DEBUG("%p: cannot enable allmulticast, "
4531 "device is in isolated mode", (void *)dev);
4535 if (priv->allmulti) {
4539 /* If device isn't started, this is all we need to do. */
4543 ret = rxq_allmulticast_enable(LIST_FIRST(&priv->parents));
4550 for (i = 0; (i != priv->rxqs_n); ++i) {
4551 if ((*priv->rxqs)[i] == NULL)
4553 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4556 /* Failure, rollback. */
4558 if ((*priv->rxqs)[--i] != NULL)
4559 rxq_allmulticast_disable((*priv->rxqs)[i]);
4569 * DPDK callback to disable allmulti mode.
4572 * Pointer to Ethernet device structure.
4575 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4577 struct priv *priv = dev->data->dev_private;
4581 if (!priv->allmulti || priv->isolated) {
4586 rxq_allmulticast_disable(LIST_FIRST(&priv->parents));
4589 for (i = 0; (i != priv->rxqs_n); ++i)
4590 if ((*priv->rxqs)[i] != NULL)
4591 rxq_allmulticast_disable((*priv->rxqs)[i]);
4598 * DPDK callback to retrieve physical link information.
4601 * Pointer to Ethernet device structure.
4602 * @param wait_to_complete
4603 * Wait for request completion (ignored).
4606 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4608 const struct priv *priv = dev->data->dev_private;
4609 struct ethtool_cmd edata = {
4613 struct rte_eth_link dev_link;
4616 /* priv_lock() is not taken to allow concurrent calls. */
4620 (void)wait_to_complete;
4621 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4622 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4625 memset(&dev_link, 0, sizeof(dev_link));
4626 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4627 (ifr.ifr_flags & IFF_RUNNING));
4628 ifr.ifr_data = (void *)&edata;
4629 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4630 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4634 link_speed = ethtool_cmd_speed(&edata);
4635 if (link_speed == -1)
4636 dev_link.link_speed = 0;
4638 dev_link.link_speed = link_speed;
4639 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4640 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4641 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4642 ETH_LINK_SPEED_FIXED);
4643 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4644 /* Link status changed. */
4645 dev->data->dev_link = dev_link;
4648 /* Link status is still the same. */
4653 * DPDK callback to change the MTU.
4655 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4656 * received). Use this as a hint to enable/disable scattered packets support
4657 * and improve performance when not needed.
4658 * Since failure is not an option, reconfiguring queues on the fly is not
4662 * Pointer to Ethernet device structure.
4667 * 0 on success, negative errno value on failure.
4670 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4672 struct priv *priv = dev->data->dev_private;
4675 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4679 /* Set kernel interface MTU first. */
4680 if (priv_set_mtu(priv, mtu)) {
4682 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4686 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4688 /* Temporarily replace RX handler with a fake one, assuming it has not
4689 * been copied elsewhere. */
4690 dev->rx_pkt_burst = removed_rx_burst;
4691 /* Make sure everyone has left mlx4_rx_burst() and uses
4692 * removed_rx_burst() instead. */
4695 /* Reconfigure each RX queue. */
4696 for (i = 0; (i != priv->rxqs_n); ++i) {
4697 struct rxq *rxq = (*priv->rxqs)[i];
4698 unsigned int max_frame_len;
4702 /* Calculate new maximum frame length according to MTU. */
4703 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4704 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4705 /* Provide new values to rxq_setup(). */
4706 dev->data->dev_conf.rxmode.jumbo_frame =
4707 (max_frame_len > ETHER_MAX_LEN);
4708 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4709 ret = rxq_rehash(dev, rxq);
4711 /* Force SP RX if that queue requires it and abort. */
4713 rx_func = mlx4_rx_burst_sp;
4716 /* Reenable non-RSS queue attributes. No need to check
4717 * for errors at this stage. */
4718 if (!priv->rss && !priv->isolated) {
4719 rxq_mac_addrs_add(rxq);
4721 rxq_promiscuous_enable(rxq);
4723 rxq_allmulticast_enable(rxq);
4725 /* Scattered burst function takes priority. */
4727 rx_func = mlx4_rx_burst_sp;
4729 /* Burst functions can now be called again. */
4731 dev->rx_pkt_burst = rx_func;
4739 * DPDK callback to get flow control status.
4742 * Pointer to Ethernet device structure.
4743 * @param[out] fc_conf
4744 * Flow control output buffer.
4747 * 0 on success, negative errno value on failure.
4750 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4752 struct priv *priv = dev->data->dev_private;
4754 struct ethtool_pauseparam ethpause = {
4755 .cmd = ETHTOOL_GPAUSEPARAM
4759 ifr.ifr_data = (void *)ðpause;
4761 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4763 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4769 fc_conf->autoneg = ethpause.autoneg;
4770 if (ethpause.rx_pause && ethpause.tx_pause)
4771 fc_conf->mode = RTE_FC_FULL;
4772 else if (ethpause.rx_pause)
4773 fc_conf->mode = RTE_FC_RX_PAUSE;
4774 else if (ethpause.tx_pause)
4775 fc_conf->mode = RTE_FC_TX_PAUSE;
4777 fc_conf->mode = RTE_FC_NONE;
4787 * DPDK callback to modify flow control parameters.
4790 * Pointer to Ethernet device structure.
4791 * @param[in] fc_conf
4792 * Flow control parameters.
4795 * 0 on success, negative errno value on failure.
4798 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4800 struct priv *priv = dev->data->dev_private;
4802 struct ethtool_pauseparam ethpause = {
4803 .cmd = ETHTOOL_SPAUSEPARAM
4807 ifr.ifr_data = (void *)ðpause;
4808 ethpause.autoneg = fc_conf->autoneg;
4809 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4810 (fc_conf->mode & RTE_FC_RX_PAUSE))
4811 ethpause.rx_pause = 1;
4813 ethpause.rx_pause = 0;
4815 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4816 (fc_conf->mode & RTE_FC_TX_PAUSE))
4817 ethpause.tx_pause = 1;
4819 ethpause.tx_pause = 0;
4822 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4824 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4838 * Configure a VLAN filter.
4841 * Pointer to Ethernet device structure.
4843 * VLAN ID to filter.
4848 * 0 on success, errno value on failure.
4851 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4853 struct priv *priv = dev->data->dev_private;
4855 unsigned int j = -1;
4857 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4858 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4859 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4860 if (!priv->vlan_filter[i].enabled) {
4861 /* Unused index, remember it. */
4865 if (priv->vlan_filter[i].id != vlan_id)
4867 /* This VLAN ID is already known, use its index. */
4871 /* Check if there's room for another VLAN filter. */
4872 if (j == (unsigned int)-1)
4875 * VLAN filters apply to all configured MAC addresses, flow
4876 * specifications must be reconfigured accordingly.
4878 priv->vlan_filter[j].id = vlan_id;
4879 if ((on) && (!priv->vlan_filter[j].enabled)) {
4881 * Filter is disabled, enable it.
4882 * Rehashing flows in all RX queues is necessary.
4885 rxq_mac_addrs_del(LIST_FIRST(&priv->parents));
4887 for (i = 0; (i != priv->rxqs_n); ++i)
4888 if ((*priv->rxqs)[i] != NULL)
4889 rxq_mac_addrs_del((*priv->rxqs)[i]);
4890 priv->vlan_filter[j].enabled = 1;
4891 if (priv->started) {
4893 rxq_mac_addrs_add(LIST_FIRST(&priv->parents));
4895 for (i = 0; (i != priv->rxqs_n); ++i) {
4896 if ((*priv->rxqs)[i] == NULL)
4898 rxq_mac_addrs_add((*priv->rxqs)[i]);
4901 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
4903 * Filter is enabled, disable it.
4904 * Rehashing flows in all RX queues is necessary.
4907 rxq_mac_addrs_del(LIST_FIRST(&priv->parents));
4909 for (i = 0; (i != priv->rxqs_n); ++i)
4910 if ((*priv->rxqs)[i] != NULL)
4911 rxq_mac_addrs_del((*priv->rxqs)[i]);
4912 priv->vlan_filter[j].enabled = 0;
4913 if (priv->started) {
4915 rxq_mac_addrs_add(LIST_FIRST(&priv->parents));
4917 for (i = 0; (i != priv->rxqs_n); ++i) {
4918 if ((*priv->rxqs)[i] == NULL)
4920 rxq_mac_addrs_add((*priv->rxqs)[i]);
4928 * DPDK callback to configure a VLAN filter.
4931 * Pointer to Ethernet device structure.
4933 * VLAN ID to filter.
4938 * 0 on success, negative errno value on failure.
4941 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4943 struct priv *priv = dev->data->dev_private;
4947 if (priv->isolated) {
4948 DEBUG("%p: cannot set vlan filter, "
4949 "device is in isolated mode", (void *)dev);
4953 ret = vlan_filter_set(dev, vlan_id, on);
4959 const struct rte_flow_ops mlx4_flow_ops = {
4960 .validate = mlx4_flow_validate,
4961 .create = mlx4_flow_create,
4962 .destroy = mlx4_flow_destroy,
4963 .flush = mlx4_flow_flush,
4965 .isolate = mlx4_flow_isolate,
4969 * Manage filter operations.
4972 * Pointer to Ethernet device structure.
4973 * @param filter_type
4976 * Operation to perform.
4978 * Pointer to operation-specific structure.
4981 * 0 on success, negative errno value on failure.
4984 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
4985 enum rte_filter_type filter_type,
4986 enum rte_filter_op filter_op,
4991 switch (filter_type) {
4992 case RTE_ETH_FILTER_GENERIC:
4993 if (filter_op != RTE_ETH_FILTER_GET)
4995 *(const void **)arg = &mlx4_flow_ops;
4998 ERROR("%p: filter type (%d) not supported",
4999 (void *)dev, filter_type);
5005 static const struct eth_dev_ops mlx4_dev_ops = {
5006 .dev_configure = mlx4_dev_configure,
5007 .dev_start = mlx4_dev_start,
5008 .dev_stop = mlx4_dev_stop,
5009 .dev_set_link_down = mlx4_set_link_down,
5010 .dev_set_link_up = mlx4_set_link_up,
5011 .dev_close = mlx4_dev_close,
5012 .promiscuous_enable = mlx4_promiscuous_enable,
5013 .promiscuous_disable = mlx4_promiscuous_disable,
5014 .allmulticast_enable = mlx4_allmulticast_enable,
5015 .allmulticast_disable = mlx4_allmulticast_disable,
5016 .link_update = mlx4_link_update,
5017 .stats_get = mlx4_stats_get,
5018 .stats_reset = mlx4_stats_reset,
5019 .dev_infos_get = mlx4_dev_infos_get,
5020 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5021 .vlan_filter_set = mlx4_vlan_filter_set,
5022 .rx_queue_setup = mlx4_rx_queue_setup,
5023 .tx_queue_setup = mlx4_tx_queue_setup,
5024 .rx_queue_release = mlx4_rx_queue_release,
5025 .tx_queue_release = mlx4_tx_queue_release,
5026 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5027 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5028 .mac_addr_remove = mlx4_mac_addr_remove,
5029 .mac_addr_add = mlx4_mac_addr_add,
5030 .mac_addr_set = mlx4_mac_addr_set,
5031 .mtu_set = mlx4_dev_set_mtu,
5032 .filter_ctrl = mlx4_dev_filter_ctrl,
5033 .rx_queue_intr_enable = mlx4_rx_intr_enable,
5034 .rx_queue_intr_disable = mlx4_rx_intr_disable,
5038 * Get PCI information from struct ibv_device.
5041 * Pointer to Ethernet device structure.
5042 * @param[out] pci_addr
5043 * PCI bus address output buffer.
5046 * 0 on success, -1 on failure and errno is set.
5049 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5050 struct rte_pci_addr *pci_addr)
5054 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5056 file = fopen(path, "rb");
5059 while (fgets(line, sizeof(line), file) == line) {
5060 size_t len = strlen(line);
5063 /* Truncate long lines. */
5064 if (len == (sizeof(line) - 1))
5065 while (line[(len - 1)] != '\n') {
5069 line[(len - 1)] = ret;
5071 /* Extract information. */
5074 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5078 &pci_addr->function) == 4) {
5088 * Get MAC address by querying netdevice.
5091 * struct priv for the requested device.
5093 * MAC address output buffer.
5096 * 0 on success, -1 on failure and errno is set.
5099 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5101 struct ifreq request;
5103 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5105 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5110 * Retrieve integer value from environment variable.
5113 * Environment variable name.
5116 * Integer value, 0 if the variable is not set.
5119 mlx4_getenv_int(const char *name)
5121 const char *val = getenv(name);
5129 mlx4_dev_link_status_handler(void *);
5131 mlx4_dev_interrupt_handler(void *);
5134 * Link/device status handler.
5137 * Pointer to private structure.
5139 * Pointer to the rte_eth_dev structure.
5141 * Pointer to event flags holder.
5147 priv_dev_status_handler(struct priv *priv, struct rte_eth_dev *dev,
5150 struct ibv_async_event event;
5151 int port_change = 0;
5152 struct rte_eth_link *link = &dev->data->dev_link;
5156 /* Read all message and acknowledge them. */
5158 if (ibv_get_async_event(priv->ctx, &event))
5160 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
5161 event.event_type == IBV_EVENT_PORT_ERR) &&
5162 (priv->intr_conf.lsc == 1)) {
5165 } else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
5166 priv->intr_conf.rmv == 1) {
5167 *events |= (1 << RTE_ETH_EVENT_INTR_RMV);
5170 DEBUG("event type %d on port %d not handled",
5171 event.event_type, event.element.port_num);
5172 ibv_ack_async_event(&event);
5176 mlx4_link_update(dev, 0);
5177 if (((link->link_speed == 0) && link->link_status) ||
5178 ((link->link_speed != 0) && !link->link_status)) {
5179 if (!priv->pending_alarm) {
5180 /* Inconsistent status, check again later. */
5181 priv->pending_alarm = 1;
5182 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5183 mlx4_dev_link_status_handler,
5187 *events |= (1 << RTE_ETH_EVENT_INTR_LSC);
5193 * Handle delayed link status event.
5196 * Registered argument.
5199 mlx4_dev_link_status_handler(void *arg)
5201 struct rte_eth_dev *dev = arg;
5202 struct priv *priv = dev->data->dev_private;
5207 assert(priv->pending_alarm == 1);
5208 priv->pending_alarm = 0;
5209 ret = priv_dev_status_handler(priv, dev, &events);
5211 if (ret > 0 && events & (1 << RTE_ETH_EVENT_INTR_LSC))
5212 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
5217 * Handle interrupts from the NIC.
5219 * @param[in] intr_handle
5220 * Interrupt handler.
5222 * Callback argument.
5225 mlx4_dev_interrupt_handler(void *cb_arg)
5227 struct rte_eth_dev *dev = cb_arg;
5228 struct priv *priv = dev->data->dev_private;
5234 ret = priv_dev_status_handler(priv, dev, &ev);
5237 for (i = RTE_ETH_EVENT_UNKNOWN;
5238 i < RTE_ETH_EVENT_MAX;
5240 if (ev & (1 << i)) {
5242 _rte_eth_dev_callback_process(dev, i, NULL,
5248 WARN("%d event%s not processed", ret,
5249 (ret > 1 ? "s were" : " was"));
5254 * Uninstall interrupt handler.
5257 * Pointer to private structure.
5259 * Pointer to the rte_eth_dev structure.
5261 * 0 on success, negative errno value on failure.
5264 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5268 if (priv->intr_conf.lsc ||
5269 priv->intr_conf.rmv)
5271 ret = rte_intr_callback_unregister(&priv->intr_handle,
5272 mlx4_dev_interrupt_handler,
5275 ERROR("rte_intr_callback_unregister failed with %d"
5277 (errno ? " (errno: " : ""),
5278 (errno ? strerror(errno) : ""),
5279 (errno ? ")" : ""));
5281 priv->intr_handle.fd = 0;
5282 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
5287 * Install interrupt handler.
5290 * Pointer to private structure.
5292 * Pointer to the rte_eth_dev structure.
5294 * 0 on success, negative errno value on failure.
5297 priv_dev_interrupt_handler_install(struct priv *priv,
5298 struct rte_eth_dev *dev)
5303 /* Check whether the interrupt handler has already been installed
5304 * for either type of interrupt
5306 if (priv->intr_conf.lsc &&
5307 priv->intr_conf.rmv &&
5308 priv->intr_handle.fd)
5310 assert(priv->ctx->async_fd > 0);
5311 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5312 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5314 INFO("failed to change file descriptor async event queue");
5315 dev->data->dev_conf.intr_conf.lsc = 0;
5316 dev->data->dev_conf.intr_conf.rmv = 0;
5319 priv->intr_handle.fd = priv->ctx->async_fd;
5320 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5321 rc = rte_intr_callback_register(&priv->intr_handle,
5322 mlx4_dev_interrupt_handler,
5325 ERROR("rte_intr_callback_register failed "
5326 " (errno: %s)", strerror(errno));
5334 * Uninstall interrupt handler.
5337 * Pointer to private structure.
5339 * Pointer to the rte_eth_dev structure.
5341 * 0 on success, negative value on error.
5344 priv_dev_removal_interrupt_handler_uninstall(struct priv *priv,
5345 struct rte_eth_dev *dev)
5347 if (dev->data->dev_conf.intr_conf.rmv) {
5348 priv->intr_conf.rmv = 0;
5349 return priv_dev_interrupt_handler_uninstall(priv, dev);
5355 * Uninstall interrupt handler.
5358 * Pointer to private structure.
5360 * Pointer to the rte_eth_dev structure.
5362 * 0 on success, negative value on error,
5365 priv_dev_link_interrupt_handler_uninstall(struct priv *priv,
5366 struct rte_eth_dev *dev)
5370 if (dev->data->dev_conf.intr_conf.lsc) {
5371 priv->intr_conf.lsc = 0;
5372 ret = priv_dev_interrupt_handler_uninstall(priv, dev);
5376 if (priv->pending_alarm)
5377 if (rte_eal_alarm_cancel(mlx4_dev_link_status_handler,
5379 ERROR("rte_eal_alarm_cancel failed "
5380 " (errno: %s)", strerror(rte_errno));
5383 priv->pending_alarm = 0;
5388 * Install link interrupt handler.
5391 * Pointer to private structure.
5393 * Pointer to the rte_eth_dev structure.
5395 * 0 on success, negative value on error.
5398 priv_dev_link_interrupt_handler_install(struct priv *priv,
5399 struct rte_eth_dev *dev)
5403 if (dev->data->dev_conf.intr_conf.lsc) {
5404 ret = priv_dev_interrupt_handler_install(priv, dev);
5407 priv->intr_conf.lsc = 1;
5413 * Install removal interrupt handler.
5416 * Pointer to private structure.
5418 * Pointer to the rte_eth_dev structure.
5420 * 0 on success, negative value on error.
5423 priv_dev_removal_interrupt_handler_install(struct priv *priv,
5424 struct rte_eth_dev *dev)
5428 if (dev->data->dev_conf.intr_conf.rmv) {
5429 ret = priv_dev_interrupt_handler_install(priv, dev);
5432 priv->intr_conf.rmv = 1;
5438 * Allocate queue vector and fill epoll fd list for Rx interrupts.
5441 * Pointer to private structure.
5444 * 0 on success, negative on failure.
5447 priv_rx_intr_vec_enable(struct priv *priv)
5450 unsigned int rxqs_n = priv->rxqs_n;
5451 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
5452 unsigned int count = 0;
5453 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
5455 if (!priv->dev->data->dev_conf.intr_conf.rxq)
5457 priv_rx_intr_vec_disable(priv);
5458 intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
5459 if (intr_handle->intr_vec == NULL) {
5460 ERROR("failed to allocate memory for interrupt vector,"
5461 " Rx interrupts will not be supported");
5464 intr_handle->type = RTE_INTR_HANDLE_EXT;
5465 for (i = 0; i != n; ++i) {
5466 struct rxq *rxq = (*priv->rxqs)[i];
5471 /* Skip queues that cannot request interrupts. */
5472 if (!rxq || !rxq->channel) {
5473 /* Use invalid intr_vec[] index to disable entry. */
5474 intr_handle->intr_vec[i] =
5475 RTE_INTR_VEC_RXTX_OFFSET +
5476 RTE_MAX_RXTX_INTR_VEC_ID;
5479 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
5480 ERROR("too many Rx queues for interrupt vector size"
5481 " (%d), Rx interrupts cannot be enabled",
5482 RTE_MAX_RXTX_INTR_VEC_ID);
5483 priv_rx_intr_vec_disable(priv);
5486 fd = rxq->channel->fd;
5487 flags = fcntl(fd, F_GETFL);
5488 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
5490 ERROR("failed to make Rx interrupt file descriptor"
5491 " %d non-blocking for queue index %d", fd, i);
5492 priv_rx_intr_vec_disable(priv);
5495 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
5496 intr_handle->efds[count] = fd;
5500 priv_rx_intr_vec_disable(priv);
5502 intr_handle->nb_efd = count;
5507 * Clean up Rx interrupts handler.
5510 * Pointer to private structure.
5513 priv_rx_intr_vec_disable(struct priv *priv)
5515 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
5517 rte_intr_free_epoll_fd(intr_handle);
5518 free(intr_handle->intr_vec);
5519 intr_handle->nb_efd = 0;
5520 intr_handle->intr_vec = NULL;
5524 * DPDK callback for Rx queue interrupt enable.
5527 * Pointer to Ethernet device structure.
5532 * 0 on success, negative on failure.
5535 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)
5537 struct priv *priv = dev->data->dev_private;
5538 struct rxq *rxq = (*priv->rxqs)[idx];
5541 if (!rxq || !rxq->channel)
5544 ret = ibv_req_notify_cq(rxq->cq, 0);
5546 WARN("unable to arm interrupt on rx queue %d", idx);
5551 * DPDK callback for Rx queue interrupt disable.
5554 * Pointer to Ethernet device structure.
5559 * 0 on success, negative on failure.
5562 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)
5564 struct priv *priv = dev->data->dev_private;
5565 struct rxq *rxq = (*priv->rxqs)[idx];
5566 struct ibv_cq *ev_cq;
5570 if (!rxq || !rxq->channel) {
5573 ret = ibv_get_cq_event(rxq->cq->channel, &ev_cq, &ev_ctx);
5574 if (ret || ev_cq != rxq->cq)
5578 WARN("unable to disable interrupt on rx queue %d",
5581 ibv_ack_cq_events(rxq->cq, 1);
5586 * Verify and store value for device argument.
5589 * Key argument to verify.
5591 * Value associated with key.
5592 * @param[in, out] conf
5593 * Shared configuration data.
5596 * 0 on success, negative errno value on failure.
5599 mlx4_arg_parse(const char *key, const char *val, struct mlx4_conf *conf)
5604 tmp = strtoul(val, NULL, 0);
5606 WARN("%s: \"%s\" is not a valid integer", key, val);
5609 if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) {
5610 uint32_t ports = rte_log2_u32(conf->ports.present);
5613 ERROR("port index %lu outside range [0,%" PRIu32 ")",
5617 if (!(conf->ports.present & (1 << tmp))) {
5618 ERROR("invalid port index %lu", tmp);
5621 conf->ports.enabled |= 1 << tmp;
5623 WARN("%s: unknown parameter", key);
5630 * Parse device parameters.
5633 * Device arguments structure.
5636 * 0 on success, negative errno value on failure.
5639 mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)
5641 struct rte_kvargs *kvlist;
5642 unsigned int arg_count;
5646 if (devargs == NULL)
5648 kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params);
5649 if (kvlist == NULL) {
5650 ERROR("failed to parse kvargs");
5653 /* Process parameters. */
5654 for (i = 0; pmd_mlx4_init_params[i]; ++i) {
5655 arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);
5656 while (arg_count-- > 0) {
5657 ret = rte_kvargs_process(kvlist,
5658 MLX4_PMD_PORT_KVARG,
5659 (int (*)(const char *,
5669 rte_kvargs_free(kvlist);
5673 static struct rte_pci_driver mlx4_driver;
5676 * DPDK callback to register a PCI device.
5678 * This function creates an Ethernet device for each port of a given
5681 * @param[in] pci_drv
5682 * PCI driver structure (mlx4_driver).
5683 * @param[in] pci_dev
5684 * PCI device information.
5687 * 0 on success, negative errno value on failure.
5690 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5692 struct ibv_device **list;
5693 struct ibv_device *ibv_dev;
5695 struct ibv_context *attr_ctx = NULL;
5696 struct ibv_device_attr device_attr;
5697 struct mlx4_conf conf = {
5704 assert(pci_drv == &mlx4_driver);
5706 list = ibv_get_device_list(&i);
5709 if (errno == ENOSYS)
5710 ERROR("cannot list devices, is ib_uverbs loaded?");
5715 * For each listed device, check related sysfs entry against
5716 * the provided PCI ID.
5719 struct rte_pci_addr pci_addr;
5722 DEBUG("checking device \"%s\"", list[i]->name);
5723 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5725 if ((pci_dev->addr.domain != pci_addr.domain) ||
5726 (pci_dev->addr.bus != pci_addr.bus) ||
5727 (pci_dev->addr.devid != pci_addr.devid) ||
5728 (pci_dev->addr.function != pci_addr.function))
5730 vf = (pci_dev->id.device_id ==
5731 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5732 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5733 list[i]->name, (vf ? "true" : "false"));
5734 attr_ctx = ibv_open_device(list[i]);
5738 if (attr_ctx == NULL) {
5739 ibv_free_device_list(list);
5742 ERROR("cannot access device, is mlx4_ib loaded?");
5745 ERROR("cannot use device, are drivers up to date?");
5753 DEBUG("device opened");
5754 if (ibv_query_device(attr_ctx, &device_attr)) {
5758 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5760 conf.ports.present |= (UINT64_C(1) << device_attr.phys_port_cnt) - 1;
5761 if (mlx4_args(pci_dev->device.devargs, &conf)) {
5762 ERROR("failed to process device arguments");
5766 /* Use all ports when none are defined */
5767 if (!conf.ports.enabled)
5768 conf.ports.enabled = conf.ports.present;
5769 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5770 uint32_t port = i + 1; /* ports are indexed from one */
5771 struct ibv_context *ctx = NULL;
5772 struct ibv_port_attr port_attr;
5773 struct ibv_pd *pd = NULL;
5774 struct priv *priv = NULL;
5775 struct rte_eth_dev *eth_dev = NULL;
5776 struct ibv_exp_device_attr exp_device_attr;
5777 struct ether_addr mac;
5779 /* If port is not enabled, skip. */
5780 if (!(conf.ports.enabled & (1 << i)))
5782 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5783 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5785 DEBUG("using port %u", port);
5787 ctx = ibv_open_device(ibv_dev);
5793 /* Check port status. */
5794 err = ibv_query_port(ctx, port, &port_attr);
5796 ERROR("port query failed: %s", strerror(err));
5801 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5802 ERROR("port %d is not configured in Ethernet mode",
5808 if (port_attr.state != IBV_PORT_ACTIVE)
5809 DEBUG("port %d is not active: \"%s\" (%d)",
5810 port, ibv_port_state_str(port_attr.state),
5813 /* Allocate protection domain. */
5814 pd = ibv_alloc_pd(ctx);
5816 ERROR("PD allocation failure");
5821 /* from rte_ethdev.c */
5822 priv = rte_zmalloc("ethdev private structure",
5824 RTE_CACHE_LINE_SIZE);
5826 ERROR("priv allocation failure");
5832 priv->device_attr = device_attr;
5835 priv->mtu = ETHER_MTU;
5836 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5837 ERROR("ibv_exp_query_device() failed");
5841 if ((exp_device_attr.exp_device_cap_flags &
5842 IBV_EXP_DEVICE_QPG) &&
5843 (exp_device_attr.exp_device_cap_flags &
5844 IBV_EXP_DEVICE_UD_RSS) &&
5845 (exp_device_attr.comp_mask &
5846 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5847 (exp_device_attr.max_rss_tbl_sz > 0)) {
5850 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5854 priv->max_rss_tbl_sz = 0;
5856 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5857 IBV_EXP_DEVICE_UD_TSS);
5858 DEBUG("device flags: %s%s%s",
5859 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5860 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5861 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5863 DEBUG("maximum RSS indirection table size: %u",
5864 exp_device_attr.max_rss_tbl_sz);
5867 ((exp_device_attr.exp_device_cap_flags &
5868 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5869 (exp_device_attr.exp_device_cap_flags &
5870 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5871 DEBUG("checksum offloading is %ssupported",
5872 (priv->hw_csum ? "" : "not "));
5874 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5875 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5876 DEBUG("L2 tunnel checksum offloads are %ssupported",
5877 (priv->hw_csum_l2tun ? "" : "not "));
5879 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5881 if (priv->inl_recv_size) {
5882 exp_device_attr.comp_mask =
5883 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5884 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5885 INFO("Couldn't query device for inline-receive"
5887 priv->inl_recv_size = 0;
5889 if ((unsigned)exp_device_attr.inline_recv_sz <
5890 priv->inl_recv_size) {
5891 INFO("Max inline-receive (%d) <"
5892 " requested inline-receive (%u)",
5893 exp_device_attr.inline_recv_sz,
5894 priv->inl_recv_size);
5895 priv->inl_recv_size =
5896 exp_device_attr.inline_recv_sz;
5899 INFO("Set inline receive size to %u",
5900 priv->inl_recv_size);
5904 /* Configure the first MAC address by default. */
5905 if (priv_get_mac(priv, &mac.addr_bytes)) {
5906 ERROR("cannot get MAC address, is mlx4_en loaded?"
5907 " (errno: %s)", strerror(errno));
5911 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5913 mac.addr_bytes[0], mac.addr_bytes[1],
5914 mac.addr_bytes[2], mac.addr_bytes[3],
5915 mac.addr_bytes[4], mac.addr_bytes[5]);
5916 /* Register MAC and broadcast addresses. */
5917 claim_zero(priv_mac_addr_add(priv, 0,
5918 (const uint8_t (*)[ETHER_ADDR_LEN])
5920 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5921 &(const uint8_t [ETHER_ADDR_LEN])
5922 { "\xff\xff\xff\xff\xff\xff" }));
5925 char ifname[IF_NAMESIZE];
5927 if (priv_get_ifname(priv, &ifname) == 0)
5928 DEBUG("port %u ifname is \"%s\"",
5929 priv->port, ifname);
5931 DEBUG("port %u ifname is unknown", priv->port);
5934 /* Get actual MTU if possible. */
5935 priv_get_mtu(priv, &priv->mtu);
5936 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5938 /* from rte_ethdev.c */
5940 char name[RTE_ETH_NAME_MAX_LEN];
5942 snprintf(name, sizeof(name), "%s port %u",
5943 ibv_get_device_name(ibv_dev), port);
5944 eth_dev = rte_eth_dev_allocate(name);
5946 if (eth_dev == NULL) {
5947 ERROR("can not allocate rte ethdev");
5952 eth_dev->data->dev_private = priv;
5953 eth_dev->data->mac_addrs = priv->mac;
5954 eth_dev->device = &pci_dev->device;
5956 rte_eth_copy_pci_info(eth_dev, pci_dev);
5958 eth_dev->device->driver = &mlx4_driver.driver;
5961 * Copy and override interrupt handle to prevent it from
5962 * being shared between all ethdev instances of a given PCI
5963 * device. This is required to properly handle Rx interrupts
5966 priv->intr_handle_dev = *eth_dev->intr_handle;
5967 eth_dev->intr_handle = &priv->intr_handle_dev;
5969 priv->dev = eth_dev;
5970 eth_dev->dev_ops = &mlx4_dev_ops;
5971 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
5973 /* Bring Ethernet device up. */
5974 DEBUG("forcing Ethernet interface up");
5975 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5976 /* Update link status once if waiting for LSC. */
5977 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
5978 mlx4_link_update(eth_dev, 0);
5984 claim_zero(ibv_dealloc_pd(pd));
5986 claim_zero(ibv_close_device(ctx));
5988 rte_eth_dev_release_port(eth_dev);
5991 if (i == device_attr.phys_port_cnt)
5995 * XXX if something went wrong in the loop above, there is a resource
5996 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5997 * long as the dpdk does not provide a way to deallocate a ethdev and a
5998 * way to enumerate the registered ethdevs to free the previous ones.
6003 claim_zero(ibv_close_device(attr_ctx));
6005 ibv_free_device_list(list);
6010 static const struct rte_pci_id mlx4_pci_id_map[] = {
6012 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6013 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
6016 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6017 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
6020 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
6021 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
6028 static struct rte_pci_driver mlx4_driver = {
6030 .name = MLX4_DRIVER_NAME
6032 .id_table = mlx4_pci_id_map,
6033 .probe = mlx4_pci_probe,
6034 .drv_flags = RTE_PCI_DRV_INTR_LSC |
6035 RTE_PCI_DRV_INTR_RMV,
6039 * Driver initialization routine.
6041 RTE_INIT(rte_mlx4_pmd_init);
6043 rte_mlx4_pmd_init(void)
6045 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
6047 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
6048 * huge pages. Calling ibv_fork_init() during init allows
6049 * applications to use fork() safely for purposes other than
6050 * using this PMD, which is not supported in forked processes.
6052 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
6054 rte_pci_register(&mlx4_driver);
6057 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
6058 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
6059 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
6060 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");