4 * Copyright 2012-2015 6WIND S.A.
5 * Copyright 2012 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
58 #include <linux/ethtool.h>
59 #include <linux/sockios.h>
63 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
65 #pragma GCC diagnostic ignored "-pedantic"
67 #include <infiniband/verbs.h>
69 #pragma GCC diagnostic error "-pedantic"
72 /* DPDK headers don't like -pedantic. */
74 #pragma GCC diagnostic ignored "-pedantic"
76 #include <rte_ether.h>
77 #include <rte_ethdev.h>
80 #include <rte_errno.h>
81 #include <rte_mempool.h>
82 #include <rte_prefetch.h>
83 #include <rte_malloc.h>
84 #include <rte_spinlock.h>
85 #include <rte_atomic.h>
86 #include <rte_version.h>
88 #include <rte_alarm.h>
89 #include <rte_memory.h>
91 #pragma GCC diagnostic error "-pedantic"
94 /* Generated configuration header. */
95 #include "mlx4_autoconf.h"
100 /* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
101 * Intermediate LOG_*() macros add the required end-of-line characters. */
103 #define INFO(...) DEBUG(__VA_ARGS__)
104 #define WARN(...) DEBUG(__VA_ARGS__)
105 #define ERROR(...) DEBUG(__VA_ARGS__)
107 #define LOG__(level, m, ...) \
108 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
109 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
110 #define INFO(...) LOG_(INFO, __VA_ARGS__)
111 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
112 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
115 /* Convenience macros for accessing mbuf fields. */
116 #define NEXT(m) ((m)->next)
117 #define DATA_LEN(m) ((m)->data_len)
118 #define PKT_LEN(m) ((m)->pkt_len)
119 #define DATA_OFF(m) ((m)->data_off)
120 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
121 #define NB_SEGS(m) ((m)->nb_segs)
122 #define PORT(m) ((m)->port)
124 /* Work Request ID data type (64 bit). */
133 #define WR_ID(o) (((wr_id_t *)&(o))->data)
135 /* Transpose flags. Useful to convert IBV to DPDK flags. */
136 #define TRANSPOSE(val, from, to) \
137 (((from) >= (to)) ? \
138 (((val) & (from)) / ((from) / (to))) : \
139 (((val) & (from)) * ((to) / (from))))
141 struct mlx4_rxq_stats {
142 unsigned int idx; /**< Mapping index. */
143 #ifdef MLX4_PMD_SOFT_COUNTERS
144 uint64_t ipackets; /**< Total of successfully received packets. */
145 uint64_t ibytes; /**< Total of successfully received bytes. */
147 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
148 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
151 struct mlx4_txq_stats {
152 unsigned int idx; /**< Mapping index. */
153 #ifdef MLX4_PMD_SOFT_COUNTERS
154 uint64_t opackets; /**< Total of successfully sent packets. */
155 uint64_t obytes; /**< Total of successfully sent bytes. */
157 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
160 /* RX element (scattered packets). */
162 struct ibv_recv_wr wr; /* Work Request. */
163 struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
164 struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
169 struct ibv_recv_wr wr; /* Work Request. */
170 struct ibv_sge sge; /* Scatter/Gather Element. */
171 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
174 /* RX queue descriptor. */
176 struct priv *priv; /* Back pointer to private data. */
177 struct rte_mempool *mp; /* Memory Pool for allocations. */
178 struct ibv_mr *mr; /* Memory Region (for mp). */
179 struct ibv_cq *cq; /* Completion Queue. */
180 struct ibv_qp *qp; /* Queue Pair. */
181 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
182 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
184 * Each VLAN ID requires a separate flow steering rule.
186 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
187 struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
188 struct ibv_flow *promisc_flow; /* Promiscuous flow. */
189 struct ibv_flow *allmulti_flow; /* Multicast flow. */
190 unsigned int port_id; /* Port ID for incoming packets. */
191 unsigned int elts_n; /* (*elts)[] length. */
192 unsigned int elts_head; /* Current index in (*elts)[]. */
194 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
195 struct rxq_elt (*no_sp)[]; /* RX elements. */
197 unsigned int sp:1; /* Use scattered RX elements. */
198 unsigned int csum:1; /* Enable checksum offloading. */
199 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
200 uint32_t mb_len; /* Length of a mp-issued mbuf. */
201 struct mlx4_rxq_stats stats; /* RX queue counters. */
202 unsigned int socket; /* CPU socket ID for allocations. */
203 struct ibv_exp_res_domain *rd; /* Resource Domain. */
208 struct rte_mbuf *buf;
211 /* Linear buffer type. It is used when transmitting buffers with too many
212 * segments that do not fit the hardware queue (see max_send_sge).
213 * Extra segments are copied (linearized) in such buffers, replacing the
214 * last SGE during TX.
215 * The size is arbitrary but large enough to hold a jumbo frame with
216 * 8 segments considering mbuf.buf_len is about 2048 bytes. */
217 typedef uint8_t linear_t[16384];
219 /* TX queue descriptor. */
221 struct priv *priv; /* Back pointer to private data. */
223 const struct rte_mempool *mp; /* Cached Memory Pool. */
224 struct ibv_mr *mr; /* Memory Region (for mp). */
225 uint32_t lkey; /* mr->lkey */
226 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
227 struct ibv_cq *cq; /* Completion Queue. */
228 struct ibv_qp *qp; /* Queue Pair. */
229 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
230 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
231 #if MLX4_PMD_MAX_INLINE > 0
232 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
234 unsigned int elts_n; /* (*elts)[] length. */
235 struct txq_elt (*elts)[]; /* TX elements. */
236 unsigned int elts_head; /* Current index in (*elts)[]. */
237 unsigned int elts_tail; /* First element awaiting completion. */
238 unsigned int elts_comp; /* Number of completion requests. */
239 unsigned int elts_comp_cd; /* Countdown for next completion request. */
240 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
241 struct mlx4_txq_stats stats; /* TX queue counters. */
242 linear_t (*elts_linear)[]; /* Linearized buffers. */
243 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
244 unsigned int socket; /* CPU socket ID for allocations. */
245 struct ibv_exp_res_domain *rd; /* Resource Domain. */
249 struct rte_eth_dev *dev; /* Ethernet device. */
250 struct ibv_context *ctx; /* Verbs context. */
251 struct ibv_device_attr device_attr; /* Device properties. */
252 struct ibv_pd *pd; /* Protection Domain. */
254 * MAC addresses array and configuration bit-field.
255 * An extra entry that cannot be modified by the DPDK is reserved
256 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
258 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
259 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
262 unsigned int enabled:1; /* If enabled. */
263 unsigned int id:12; /* VLAN ID (0-4095). */
264 } vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
265 /* Device properties. */
266 uint16_t mtu; /* Configured MTU. */
267 uint8_t port; /* Physical port number. */
268 unsigned int started:1; /* Device started, flows enabled. */
269 unsigned int promisc:1; /* Device in promiscuous mode. */
270 unsigned int allmulti:1; /* Device receives all multicast packets. */
271 unsigned int hw_qpg:1; /* QP groups are supported. */
272 unsigned int hw_tss:1; /* TSS is supported. */
273 unsigned int hw_rss:1; /* RSS is supported. */
274 unsigned int hw_csum:1; /* Checksum offload is supported. */
275 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
276 unsigned int rss:1; /* RSS is enabled. */
277 unsigned int vf:1; /* This is a VF device. */
278 unsigned int pending_alarm:1; /* An alarm is pending. */
280 unsigned int inl_recv_size; /* Inline recv size */
282 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
284 struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
285 unsigned int rxqs_n; /* RX queues array size. */
286 unsigned int txqs_n; /* TX queues array size. */
287 struct rxq *(*rxqs)[]; /* RX queues. */
288 struct txq *(*txqs)[]; /* TX queues. */
289 struct rte_intr_handle intr_handle; /* Interrupt handler. */
290 rte_spinlock_t lock; /* Lock for control functions. */
293 /* Local storage for secondary process data. */
294 struct mlx4_secondary_data {
295 struct rte_eth_dev_data data; /* Local device data. */
296 struct priv *primary_priv; /* Private structure from primary. */
297 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
298 rte_spinlock_t lock; /* Port configuration lock. */
299 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
302 * Check if running as a secondary process.
305 * Nonzero if running as a secondary process.
308 mlx4_is_secondary(void)
310 return rte_eal_process_type() != RTE_PROC_PRIMARY;
314 * Return private structure associated with an Ethernet device.
317 * Pointer to Ethernet device structure.
320 * Pointer to private structure.
323 mlx4_get_priv(struct rte_eth_dev *dev)
325 struct mlx4_secondary_data *sd;
327 if (!mlx4_is_secondary())
328 return dev->data->dev_private;
329 sd = &mlx4_secondary_data[dev->data->port_id];
330 return sd->data.dev_private;
334 * Lock private structure to protect it from concurrent access in the
338 * Pointer to private structure.
341 priv_lock(struct priv *priv)
343 rte_spinlock_lock(&priv->lock);
347 * Unlock private structure.
350 * Pointer to private structure.
353 priv_unlock(struct priv *priv)
355 rte_spinlock_unlock(&priv->lock);
358 /* Allocate a buffer on the stack and fill it with a printf format string. */
359 #define MKSTR(name, ...) \
360 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
362 snprintf(name, sizeof(name), __VA_ARGS__)
365 * Get interface name from private structure.
368 * Pointer to private structure.
370 * Interface name output buffer.
373 * 0 on success, -1 on failure and errno is set.
376 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
380 unsigned int dev_type = 0;
381 unsigned int dev_port_prev = ~0u;
382 char match[IF_NAMESIZE] = "";
385 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
391 while ((dent = readdir(dir)) != NULL) {
392 char *name = dent->d_name;
394 unsigned int dev_port;
397 if ((name[0] == '.') &&
398 ((name[1] == '\0') ||
399 ((name[1] == '.') && (name[2] == '\0'))))
402 MKSTR(path, "%s/device/net/%s/%s",
403 priv->ctx->device->ibdev_path, name,
404 (dev_type ? "dev_id" : "dev_port"));
406 file = fopen(path, "rb");
411 * Switch to dev_id when dev_port does not exist as
412 * is the case with Linux kernel versions < 3.15.
423 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
428 * Switch to dev_id when dev_port returns the same value for
429 * all ports. May happen when using a MOFED release older than
430 * 3.0 with a Linux kernel >= 3.15.
432 if (dev_port == dev_port_prev)
434 dev_port_prev = dev_port;
435 if (dev_port == (priv->port - 1u))
436 snprintf(match, sizeof(match), "%s", name);
439 if (match[0] == '\0')
441 strncpy(*ifname, match, sizeof(*ifname));
446 * Read from sysfs entry.
449 * Pointer to private structure.
451 * Entry name relative to sysfs path.
453 * Data output buffer.
458 * 0 on success, -1 on failure and errno is set.
461 priv_sysfs_read(const struct priv *priv, const char *entry,
462 char *buf, size_t size)
464 char ifname[IF_NAMESIZE];
469 if (priv_get_ifname(priv, &ifname))
472 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
475 file = fopen(path, "rb");
478 ret = fread(buf, 1, size, file);
480 if (((size_t)ret < size) && (ferror(file)))
490 * Write to sysfs entry.
493 * Pointer to private structure.
495 * Entry name relative to sysfs path.
502 * 0 on success, -1 on failure and errno is set.
505 priv_sysfs_write(const struct priv *priv, const char *entry,
506 char *buf, size_t size)
508 char ifname[IF_NAMESIZE];
513 if (priv_get_ifname(priv, &ifname))
516 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
519 file = fopen(path, "wb");
522 ret = fwrite(buf, 1, size, file);
524 if (((size_t)ret < size) || (ferror(file)))
534 * Get unsigned long sysfs property.
537 * Pointer to private structure.
539 * Entry name relative to sysfs path.
541 * Value output buffer.
544 * 0 on success, -1 on failure and errno is set.
547 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
550 unsigned long value_ret;
553 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
555 DEBUG("cannot read %s value from sysfs: %s",
556 name, strerror(errno));
559 value_str[ret] = '\0';
561 value_ret = strtoul(value_str, NULL, 0);
563 DEBUG("invalid %s value `%s': %s", name, value_str,
572 * Set unsigned long sysfs property.
575 * Pointer to private structure.
577 * Entry name relative to sysfs path.
582 * 0 on success, -1 on failure and errno is set.
585 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
588 MKSTR(value_str, "%lu", value);
590 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
592 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
593 name, value_str, value, strerror(errno));
600 * Perform ifreq ioctl() on associated Ethernet device.
603 * Pointer to private structure.
605 * Request number to pass to ioctl().
607 * Interface request structure output buffer.
610 * 0 on success, -1 on failure and errno is set.
613 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
615 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
620 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
621 ret = ioctl(sock, req, ifr);
630 * Pointer to private structure.
632 * MTU value output buffer.
635 * 0 on success, -1 on failure and errno is set.
638 priv_get_mtu(struct priv *priv, uint16_t *mtu)
640 unsigned long ulong_mtu;
642 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
652 * Pointer to private structure.
657 * 0 on success, -1 on failure and errno is set.
660 priv_set_mtu(struct priv *priv, uint16_t mtu)
662 return priv_set_sysfs_ulong(priv, "mtu", mtu);
669 * Pointer to private structure.
671 * Bitmask for flags that must remain untouched.
673 * Bitmask for flags to modify.
676 * 0 on success, -1 on failure and errno is set.
679 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
683 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
687 return priv_set_sysfs_ulong(priv, "flags", tmp);
690 /* Device configuration. */
693 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
694 unsigned int socket, const struct rte_eth_txconf *conf);
697 txq_cleanup(struct txq *txq);
700 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
701 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
702 struct rte_mempool *mp);
705 rxq_cleanup(struct rxq *rxq);
708 * Ethernet device configuration.
710 * Prepare the driver for a given number of TX and RX queues.
711 * Allocate parent RSS queue when several RX queues are requested.
714 * Pointer to Ethernet device structure.
717 * 0 on success, errno value on failure.
720 dev_configure(struct rte_eth_dev *dev)
722 struct priv *priv = dev->data->dev_private;
723 unsigned int rxqs_n = dev->data->nb_rx_queues;
724 unsigned int txqs_n = dev->data->nb_tx_queues;
728 priv->rxqs = (void *)dev->data->rx_queues;
729 priv->txqs = (void *)dev->data->tx_queues;
730 if (txqs_n != priv->txqs_n) {
731 INFO("%p: TX queues number update: %u -> %u",
732 (void *)dev, priv->txqs_n, txqs_n);
733 priv->txqs_n = txqs_n;
735 if (rxqs_n == priv->rxqs_n)
737 if (!rte_is_power_of_2(rxqs_n)) {
740 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
741 WARN("%p: number of RX queues must be a power"
742 " of 2: %u queues among %u will be active",
743 (void *)dev, n_active, rxqs_n);
746 INFO("%p: RX queues number update: %u -> %u",
747 (void *)dev, priv->rxqs_n, rxqs_n);
748 /* If RSS is enabled, disable it first. */
752 /* Only if there are no remaining child RX queues. */
753 for (i = 0; (i != priv->rxqs_n); ++i)
754 if ((*priv->rxqs)[i] != NULL)
756 rxq_cleanup(&priv->rxq_parent);
761 /* Nothing else to do. */
762 priv->rxqs_n = rxqs_n;
765 /* Allocate a new RSS parent queue if supported by hardware. */
767 ERROR("%p: only a single RX queue can be configured when"
768 " hardware doesn't support RSS",
772 /* Fail if hardware doesn't support that many RSS queues. */
773 if (rxqs_n >= priv->max_rss_tbl_sz) {
774 ERROR("%p: only %u RX queues can be configured for RSS",
775 (void *)dev, priv->max_rss_tbl_sz);
780 priv->rxqs_n = rxqs_n;
781 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, 0, NULL, NULL);
784 /* Failure, rollback. */
792 * DPDK callback for Ethernet device configuration.
795 * Pointer to Ethernet device structure.
798 * 0 on success, negative errno value on failure.
801 mlx4_dev_configure(struct rte_eth_dev *dev)
803 struct priv *priv = dev->data->dev_private;
806 if (mlx4_is_secondary())
807 return -E_RTE_SECONDARY;
809 ret = dev_configure(dev);
815 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
816 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
819 * Configure secondary process queues from a private data pointer (primary
820 * or secondary) and update burst callbacks. Can take place only once.
822 * All queues must have been previously created by the primary process to
823 * avoid undefined behavior.
826 * Private data pointer from either primary or secondary process.
829 * Private data pointer from secondary process, NULL in case of error.
832 mlx4_secondary_data_setup(struct priv *priv)
834 unsigned int port_id = 0;
835 struct mlx4_secondary_data *sd;
838 unsigned int nb_tx_queues;
839 unsigned int nb_rx_queues;
842 /* priv must be valid at this point. */
843 assert(priv != NULL);
844 /* priv->dev must also be valid but may point to local memory from
845 * another process, possibly with the same address and must not
846 * be dereferenced yet. */
847 assert(priv->dev != NULL);
848 /* Determine port ID by finding out where priv comes from. */
850 sd = &mlx4_secondary_data[port_id];
851 rte_spinlock_lock(&sd->lock);
852 /* Primary process? */
853 if (sd->primary_priv == priv)
855 /* Secondary process? */
856 if (sd->data.dev_private == priv)
858 rte_spinlock_unlock(&sd->lock);
859 if (++port_id == RTE_DIM(mlx4_secondary_data))
862 /* Switch to secondary private structure. If private data has already
863 * been updated by another thread, there is nothing else to do. */
864 priv = sd->data.dev_private;
865 if (priv->dev->data == &sd->data)
867 /* Sanity checks. Secondary private structure is supposed to point
868 * to local eth_dev, itself still pointing to the shared device data
869 * structure allocated by the primary process. */
870 assert(sd->shared_dev_data != &sd->data);
871 assert(sd->data.nb_tx_queues == 0);
872 assert(sd->data.tx_queues == NULL);
873 assert(sd->data.nb_rx_queues == 0);
874 assert(sd->data.rx_queues == NULL);
875 assert(priv != sd->primary_priv);
876 assert(priv->dev->data == sd->shared_dev_data);
877 assert(priv->txqs_n == 0);
878 assert(priv->txqs == NULL);
879 assert(priv->rxqs_n == 0);
880 assert(priv->rxqs == NULL);
881 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
882 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
883 /* Allocate local storage for queues. */
884 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
885 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
886 RTE_CACHE_LINE_SIZE);
887 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
888 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
889 RTE_CACHE_LINE_SIZE);
890 if (tx_queues == NULL || rx_queues == NULL)
892 /* Lock to prevent control operations during setup. */
895 for (i = 0; i != nb_tx_queues; ++i) {
896 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
899 if (primary_txq == NULL)
901 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
902 primary_txq->socket);
904 if (txq_setup(priv->dev,
906 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
909 txq->stats.idx = primary_txq->stats.idx;
916 txq = tx_queues[--i];
923 for (i = 0; i != nb_rx_queues; ++i) {
924 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
926 if (primary_rxq == NULL)
928 /* Not supported yet. */
931 /* Update everything. */
932 priv->txqs = (void *)tx_queues;
933 priv->txqs_n = nb_tx_queues;
934 priv->rxqs = (void *)rx_queues;
935 priv->rxqs_n = nb_rx_queues;
936 sd->data.rx_queues = rx_queues;
937 sd->data.tx_queues = tx_queues;
938 sd->data.nb_rx_queues = nb_rx_queues;
939 sd->data.nb_tx_queues = nb_tx_queues;
940 sd->data.dev_link = sd->shared_dev_data->dev_link;
941 sd->data.mtu = sd->shared_dev_data->mtu;
942 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
943 sizeof(sd->data.rx_queue_state));
944 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
945 sizeof(sd->data.tx_queue_state));
946 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
947 /* Use local data from now on. */
949 priv->dev->data = &sd->data;
951 priv->dev->tx_pkt_burst = mlx4_tx_burst;
952 priv->dev->rx_pkt_burst = removed_rx_burst;
955 /* More sanity checks. */
956 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
957 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
958 assert(priv->dev->data == &sd->data);
959 rte_spinlock_unlock(&sd->lock);
965 rte_spinlock_unlock(&sd->lock);
969 /* TX queues handling. */
972 * Allocate TX queue elements.
975 * Pointer to TX queue structure.
977 * Number of elements to allocate.
980 * 0 on success, errno value on failure.
983 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
986 struct txq_elt (*elts)[elts_n] =
987 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
988 linear_t (*elts_linear)[elts_n] =
989 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
991 struct ibv_mr *mr_linear = NULL;
994 if ((elts == NULL) || (elts_linear == NULL)) {
995 ERROR("%p: can't allocate packets array", (void *)txq);
1000 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
1001 (IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE));
1002 if (mr_linear == NULL) {
1003 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
1008 for (i = 0; (i != elts_n); ++i) {
1009 struct txq_elt *elt = &(*elts)[i];
1013 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
1014 txq->elts_n = elts_n;
1019 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
1020 * at least 4 times per ring. */
1021 txq->elts_comp_cd_init =
1022 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
1023 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
1024 txq->elts_comp_cd = txq->elts_comp_cd_init;
1025 txq->elts_linear = elts_linear;
1026 txq->mr_linear = mr_linear;
1030 if (mr_linear != NULL)
1031 claim_zero(ibv_dereg_mr(mr_linear));
1033 rte_free(elts_linear);
1036 DEBUG("%p: failed, freed everything", (void *)txq);
1042 * Free TX queue elements.
1045 * Pointer to TX queue structure.
1048 txq_free_elts(struct txq *txq)
1050 unsigned int elts_n = txq->elts_n;
1051 unsigned int elts_head = txq->elts_head;
1052 unsigned int elts_tail = txq->elts_tail;
1053 struct txq_elt (*elts)[elts_n] = txq->elts;
1054 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
1055 struct ibv_mr *mr_linear = txq->mr_linear;
1057 DEBUG("%p: freeing WRs", (void *)txq);
1062 txq->elts_comp_cd = 0;
1063 txq->elts_comp_cd_init = 0;
1065 txq->elts_linear = NULL;
1066 txq->mr_linear = NULL;
1067 if (mr_linear != NULL)
1068 claim_zero(ibv_dereg_mr(mr_linear));
1070 rte_free(elts_linear);
1073 while (elts_tail != elts_head) {
1074 struct txq_elt *elt = &(*elts)[elts_tail];
1076 assert(elt->buf != NULL);
1077 rte_pktmbuf_free(elt->buf);
1080 memset(elt, 0x77, sizeof(*elt));
1082 if (++elts_tail == elts_n)
1090 * Clean up a TX queue.
1092 * Destroy objects, free allocated memory and reset the structure for reuse.
1095 * Pointer to TX queue structure.
1098 txq_cleanup(struct txq *txq)
1100 struct ibv_exp_release_intf_params params;
1103 DEBUG("cleaning up %p", (void *)txq);
1105 if (txq->if_qp != NULL) {
1106 assert(txq->priv != NULL);
1107 assert(txq->priv->ctx != NULL);
1108 assert(txq->qp != NULL);
1109 params = (struct ibv_exp_release_intf_params){
1112 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1116 if (txq->if_cq != NULL) {
1117 assert(txq->priv != NULL);
1118 assert(txq->priv->ctx != NULL);
1119 assert(txq->cq != NULL);
1120 params = (struct ibv_exp_release_intf_params){
1123 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1127 if (txq->qp != NULL)
1128 claim_zero(ibv_destroy_qp(txq->qp));
1129 if (txq->cq != NULL)
1130 claim_zero(ibv_destroy_cq(txq->cq));
1131 if (txq->rd != NULL) {
1132 struct ibv_exp_destroy_res_domain_attr attr = {
1136 assert(txq->priv != NULL);
1137 assert(txq->priv->ctx != NULL);
1138 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1142 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1143 if (txq->mp2mr[i].mp == NULL)
1145 assert(txq->mp2mr[i].mr != NULL);
1146 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1148 memset(txq, 0, sizeof(*txq));
1152 * Manage TX completions.
1154 * When sending a burst, mlx4_tx_burst() posts several WRs.
1155 * To improve performance, a completion event is only required once every
1156 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1157 * for other WRs, but this information would not be used anyway.
1160 * Pointer to TX queue structure.
1163 * 0 on success, -1 on failure.
1166 txq_complete(struct txq *txq)
1168 unsigned int elts_comp = txq->elts_comp;
1169 unsigned int elts_tail = txq->elts_tail;
1170 const unsigned int elts_n = txq->elts_n;
1173 if (unlikely(elts_comp == 0))
1176 DEBUG("%p: processing %u work requests completions",
1177 (void *)txq, elts_comp);
1179 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1180 if (unlikely(wcs_n == 0))
1182 if (unlikely(wcs_n < 0)) {
1183 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1184 (void *)txq, wcs_n);
1188 assert(elts_comp <= txq->elts_comp);
1190 * Assume WC status is successful as nothing can be done about it
1193 elts_tail += wcs_n * txq->elts_comp_cd_init;
1194 if (elts_tail >= elts_n)
1195 elts_tail -= elts_n;
1196 txq->elts_tail = elts_tail;
1197 txq->elts_comp = elts_comp;
1201 /* For best performance, this function should not be inlined. */
1202 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, const struct rte_mempool *)
1203 __attribute__((noinline));
1206 * Register mempool as a memory region.
1209 * Pointer to protection domain.
1211 * Pointer to memory pool.
1214 * Memory region pointer, NULL in case of error.
1216 static struct ibv_mr *
1217 mlx4_mp2mr(struct ibv_pd *pd, const struct rte_mempool *mp)
1219 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1220 uintptr_t start = mp->elt_va_start;
1221 uintptr_t end = mp->elt_va_end;
1224 DEBUG("mempool %p area start=%p end=%p size=%zu",
1225 (const void *)mp, (void *)start, (void *)end,
1226 (size_t)(end - start));
1227 /* Round start and end to page boundary if found in memory segments. */
1228 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1229 uintptr_t addr = (uintptr_t)ms[i].addr;
1230 size_t len = ms[i].len;
1231 unsigned int align = ms[i].hugepage_sz;
1233 if ((start > addr) && (start < addr + len))
1234 start = RTE_ALIGN_FLOOR(start, align);
1235 if ((end > addr) && (end < addr + len))
1236 end = RTE_ALIGN_CEIL(end, align);
1238 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1239 (const void *)mp, (void *)start, (void *)end,
1240 (size_t)(end - start));
1241 return ibv_reg_mr(pd,
1244 IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE);
1248 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1249 * the cloned mbuf is allocated is returned instead.
1255 * Memory pool where data is located for given mbuf.
1257 static struct rte_mempool *
1258 txq_mb2mp(struct rte_mbuf *buf)
1260 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1261 return rte_mbuf_from_indirect(buf)->pool;
1266 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1267 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1268 * remove an entry first.
1271 * Pointer to TX queue structure.
1273 * Memory Pool for which a Memory Region lkey must be returned.
1276 * mr->lkey on success, (uint32_t)-1 on failure.
1279 txq_mp2mr(struct txq *txq, const struct rte_mempool *mp)
1284 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1285 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1286 /* Unknown MP, add a new MR for it. */
1289 if (txq->mp2mr[i].mp == mp) {
1290 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1291 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1292 return txq->mp2mr[i].lkey;
1295 /* Add a new entry, register MR first. */
1296 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1297 (void *)txq, mp->name, (const void *)mp);
1298 mr = mlx4_mp2mr(txq->priv->pd, mp);
1299 if (unlikely(mr == NULL)) {
1300 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1302 return (uint32_t)-1;
1304 if (unlikely(i == elemof(txq->mp2mr))) {
1305 /* Table is full, remove oldest entry. */
1306 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1309 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1310 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1311 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1313 /* Store the new entry. */
1314 txq->mp2mr[i].mp = mp;
1315 txq->mp2mr[i].mr = mr;
1316 txq->mp2mr[i].lkey = mr->lkey;
1317 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1318 (void *)txq, mp->name, (const void *)mp, txq->mp2mr[i].lkey);
1319 return txq->mp2mr[i].lkey;
1322 struct txq_mp2mr_mbuf_check_data {
1327 * Callback function for rte_mempool_obj_iter() to check whether a given
1328 * mempool object looks like a mbuf.
1331 * The mempool pointer
1333 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1338 * Object index, unused.
1341 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1342 uint32_t index __rte_unused)
1344 struct txq_mp2mr_mbuf_check_data *data = arg;
1345 struct rte_mbuf *buf = obj;
1347 /* Check whether mbuf structure fits element size and whether mempool
1348 * pointer is valid. */
1349 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1354 * Iterator function for rte_mempool_walk() to register existing mempools and
1355 * fill the MP to MR cache of a TX queue.
1358 * Memory Pool to register.
1360 * Pointer to TX queue structure.
1363 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1365 struct txq *txq = arg;
1366 struct txq_mp2mr_mbuf_check_data data = {
1370 /* Register mempool only if the first element looks like a mbuf. */
1371 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1377 #if MLX4_PMD_SGE_WR_N > 1
1380 * Copy scattered mbuf contents to a single linear buffer.
1382 * @param[out] linear
1383 * Linear output buffer.
1385 * Scattered input buffer.
1388 * Number of bytes copied to the output buffer or 0 if not large enough.
1391 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1393 unsigned int size = 0;
1394 unsigned int offset;
1397 unsigned int len = DATA_LEN(buf);
1401 if (unlikely(size > sizeof(*linear)))
1403 memcpy(&(*linear)[offset],
1404 rte_pktmbuf_mtod(buf, uint8_t *),
1407 } while (buf != NULL);
1412 * Handle scattered buffers for mlx4_tx_burst().
1415 * TX queue structure.
1417 * Number of segments in buf.
1419 * TX queue element to fill.
1421 * Buffer to process.
1423 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1425 * Array filled with SGEs on success.
1428 * A structure containing the processed packet size in bytes and the
1429 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1432 static struct tx_burst_sg_ret {
1433 unsigned int length;
1436 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1437 struct rte_mbuf *buf, unsigned int elts_head,
1438 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1440 unsigned int sent_size = 0;
1444 /* When there are too many segments, extra segments are
1445 * linearized in the last SGE. */
1446 if (unlikely(segs > elemof(*sges))) {
1447 segs = (elemof(*sges) - 1);
1450 /* Update element. */
1452 /* Register segments as SGEs. */
1453 for (j = 0; (j != segs); ++j) {
1454 struct ibv_sge *sge = &(*sges)[j];
1457 /* Retrieve Memory Region key for this memory pool. */
1458 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1459 if (unlikely(lkey == (uint32_t)-1)) {
1460 /* MR does not exist. */
1461 DEBUG("%p: unable to get MP <-> MR association",
1463 /* Clean up TX element. */
1468 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1470 rte_prefetch0((volatile void *)
1471 (uintptr_t)sge->addr);
1472 sge->length = DATA_LEN(buf);
1474 sent_size += sge->length;
1477 /* If buf is not NULL here and is not going to be linearized,
1478 * nb_segs is not valid. */
1480 assert((buf == NULL) || (linearize));
1481 /* Linearize extra segments. */
1483 struct ibv_sge *sge = &(*sges)[segs];
1484 linear_t *linear = &(*txq->elts_linear)[elts_head];
1485 unsigned int size = linearize_mbuf(linear, buf);
1487 assert(segs == (elemof(*sges) - 1));
1489 /* Invalid packet. */
1490 DEBUG("%p: packet too large to be linearized.",
1492 /* Clean up TX element. */
1496 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1497 if (elemof(*sges) == 1) {
1499 struct rte_mbuf *next = NEXT(buf);
1501 rte_pktmbuf_free_seg(buf);
1503 } while (buf != NULL);
1507 sge->addr = (uintptr_t)&(*linear)[0];
1509 sge->lkey = txq->mr_linear->lkey;
1511 /* Include last segment. */
1514 return (struct tx_burst_sg_ret){
1515 .length = sent_size,
1519 return (struct tx_burst_sg_ret){
1525 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1528 * DPDK callback for TX.
1531 * Generic pointer to TX queue structure.
1533 * Packets to transmit.
1535 * Number of packets in array.
1538 * Number of packets successfully transmitted (<= pkts_n).
1541 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1543 struct txq *txq = (struct txq *)dpdk_txq;
1544 unsigned int elts_head = txq->elts_head;
1545 const unsigned int elts_n = txq->elts_n;
1546 unsigned int elts_comp_cd = txq->elts_comp_cd;
1547 unsigned int elts_comp = 0;
1552 assert(elts_comp_cd != 0);
1554 max = (elts_n - (elts_head - txq->elts_tail));
1558 assert(max <= elts_n);
1559 /* Always leave one free entry in the ring. */
1565 for (i = 0; (i != max); ++i) {
1566 struct rte_mbuf *buf = pkts[i];
1567 unsigned int elts_head_next =
1568 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1569 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1570 struct txq_elt *elt = &(*txq->elts)[elts_head];
1571 unsigned int segs = NB_SEGS(buf);
1572 #ifdef MLX4_PMD_SOFT_COUNTERS
1573 unsigned int sent_size = 0;
1575 uint32_t send_flags = 0;
1577 /* Clean up old buffer. */
1578 if (likely(elt->buf != NULL)) {
1579 struct rte_mbuf *tmp = elt->buf;
1583 memset(elt, 0x66, sizeof(*elt));
1585 /* Faster than rte_pktmbuf_free(). */
1587 struct rte_mbuf *next = NEXT(tmp);
1589 rte_pktmbuf_free_seg(tmp);
1591 } while (tmp != NULL);
1593 /* Request TX completion. */
1594 if (unlikely(--elts_comp_cd == 0)) {
1595 elts_comp_cd = txq->elts_comp_cd_init;
1597 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1599 /* Should we enable HW CKSUM offload */
1601 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1602 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1603 /* HW does not support checksum offloads at arbitrary
1604 * offsets but automatically recognizes the packet
1605 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1606 * tunnels are currently supported. */
1607 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1608 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1610 if (likely(segs == 1)) {
1615 /* Retrieve buffer information. */
1616 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1617 length = DATA_LEN(buf);
1618 /* Retrieve Memory Region key for this memory pool. */
1619 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1620 if (unlikely(lkey == (uint32_t)-1)) {
1621 /* MR does not exist. */
1622 DEBUG("%p: unable to get MP <-> MR"
1623 " association", (void *)txq);
1624 /* Clean up TX element. */
1628 /* Update element. */
1631 rte_prefetch0((volatile void *)
1633 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1634 /* Put packet into send queue. */
1635 #if MLX4_PMD_MAX_INLINE > 0
1636 if (length <= txq->max_inline)
1637 err = txq->if_qp->send_pending_inline
1644 err = txq->if_qp->send_pending
1652 #ifdef MLX4_PMD_SOFT_COUNTERS
1653 sent_size += length;
1656 #if MLX4_PMD_SGE_WR_N > 1
1657 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1658 struct tx_burst_sg_ret ret;
1660 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1662 if (ret.length == (unsigned int)-1)
1664 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1665 /* Put SG list into send queue. */
1666 err = txq->if_qp->send_pending_sg_list
1673 #ifdef MLX4_PMD_SOFT_COUNTERS
1674 sent_size += ret.length;
1676 #else /* MLX4_PMD_SGE_WR_N > 1 */
1677 DEBUG("%p: TX scattered buffers support not"
1678 " compiled in", (void *)txq);
1680 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1682 elts_head = elts_head_next;
1683 #ifdef MLX4_PMD_SOFT_COUNTERS
1684 /* Increment sent bytes counter. */
1685 txq->stats.obytes += sent_size;
1689 /* Take a shortcut if nothing must be sent. */
1690 if (unlikely(i == 0))
1692 #ifdef MLX4_PMD_SOFT_COUNTERS
1693 /* Increment sent packets counter. */
1694 txq->stats.opackets += i;
1696 /* Ring QP doorbell. */
1697 err = txq->if_qp->send_flush(txq->qp);
1698 if (unlikely(err)) {
1699 /* A nonzero value is not supposed to be returned.
1700 * Nothing can be done about it. */
1701 DEBUG("%p: send_flush() failed with error %d",
1704 txq->elts_head = elts_head;
1705 txq->elts_comp += elts_comp;
1706 txq->elts_comp_cd = elts_comp_cd;
1711 * DPDK callback for TX in secondary processes.
1713 * This function configures all queues from primary process information
1714 * if necessary before reverting to the normal TX burst callback.
1717 * Generic pointer to TX queue structure.
1719 * Packets to transmit.
1721 * Number of packets in array.
1724 * Number of packets successfully transmitted (<= pkts_n).
1727 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1730 struct txq *txq = dpdk_txq;
1731 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1732 struct priv *primary_priv;
1738 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1739 /* Look for queue index in both private structures. */
1740 for (index = 0; index != priv->txqs_n; ++index)
1741 if (((*primary_priv->txqs)[index] == txq) ||
1742 ((*priv->txqs)[index] == txq))
1744 if (index == priv->txqs_n)
1746 txq = (*priv->txqs)[index];
1747 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1751 * Configure a TX queue.
1754 * Pointer to Ethernet device structure.
1756 * Pointer to TX queue structure.
1758 * Number of descriptors to configure in queue.
1760 * NUMA socket on which memory must be allocated.
1762 * Thresholds parameters.
1765 * 0 on success, errno value on failure.
1768 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1769 unsigned int socket, const struct rte_eth_txconf *conf)
1771 struct priv *priv = mlx4_get_priv(dev);
1777 struct ibv_exp_query_intf_params params;
1778 struct ibv_exp_qp_init_attr init;
1779 struct ibv_exp_res_domain_init_attr rd;
1780 struct ibv_exp_cq_init_attr cq;
1781 struct ibv_exp_qp_attr mod;
1783 enum ibv_exp_query_intf_status status;
1786 (void)conf; /* Thresholds configuration (ignored). */
1789 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1790 ERROR("%p: invalid number of TX descriptors (must be a"
1791 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1794 desc /= MLX4_PMD_SGE_WR_N;
1795 /* MRs will be registered in mp2mr[] later. */
1796 attr.rd = (struct ibv_exp_res_domain_init_attr){
1797 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1798 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1799 .thread_model = IBV_EXP_THREAD_SINGLE,
1800 .msg_model = IBV_EXP_MSG_HIGH_BW,
1802 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1803 if (tmpl.rd == NULL) {
1805 ERROR("%p: RD creation failure: %s",
1806 (void *)dev, strerror(ret));
1809 attr.cq = (struct ibv_exp_cq_init_attr){
1810 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1811 .res_domain = tmpl.rd,
1813 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1814 if (tmpl.cq == NULL) {
1816 ERROR("%p: CQ creation failure: %s",
1817 (void *)dev, strerror(ret));
1820 DEBUG("priv->device_attr.max_qp_wr is %d",
1821 priv->device_attr.max_qp_wr);
1822 DEBUG("priv->device_attr.max_sge is %d",
1823 priv->device_attr.max_sge);
1824 attr.init = (struct ibv_exp_qp_init_attr){
1825 /* CQ to be associated with the send queue. */
1827 /* CQ to be associated with the receive queue. */
1830 /* Max number of outstanding WRs. */
1831 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1832 priv->device_attr.max_qp_wr :
1834 /* Max number of scatter/gather elements in a WR. */
1835 .max_send_sge = ((priv->device_attr.max_sge <
1836 MLX4_PMD_SGE_WR_N) ?
1837 priv->device_attr.max_sge :
1839 #if MLX4_PMD_MAX_INLINE > 0
1840 .max_inline_data = MLX4_PMD_MAX_INLINE,
1843 .qp_type = IBV_QPT_RAW_PACKET,
1844 /* Do *NOT* enable this, completions events are managed per
1848 .res_domain = tmpl.rd,
1849 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1850 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1852 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1853 if (tmpl.qp == NULL) {
1854 ret = (errno ? errno : EINVAL);
1855 ERROR("%p: QP creation failure: %s",
1856 (void *)dev, strerror(ret));
1859 #if MLX4_PMD_MAX_INLINE > 0
1860 /* ibv_create_qp() updates this value. */
1861 tmpl.max_inline = attr.init.cap.max_inline_data;
1863 attr.mod = (struct ibv_exp_qp_attr){
1864 /* Move the QP to this state. */
1865 .qp_state = IBV_QPS_INIT,
1866 /* Primary port number. */
1867 .port_num = priv->port
1869 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1870 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1872 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1873 (void *)dev, strerror(ret));
1876 ret = txq_alloc_elts(&tmpl, desc);
1878 ERROR("%p: TXQ allocation failed: %s",
1879 (void *)dev, strerror(ret));
1882 attr.mod = (struct ibv_exp_qp_attr){
1883 .qp_state = IBV_QPS_RTR
1885 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1887 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1888 (void *)dev, strerror(ret));
1891 attr.mod.qp_state = IBV_QPS_RTS;
1892 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1894 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1895 (void *)dev, strerror(ret));
1898 attr.params = (struct ibv_exp_query_intf_params){
1899 .intf_scope = IBV_EXP_INTF_GLOBAL,
1900 .intf = IBV_EXP_INTF_CQ,
1903 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1904 if (tmpl.if_cq == NULL) {
1905 ERROR("%p: CQ interface family query failed with status %d",
1906 (void *)dev, status);
1909 attr.params = (struct ibv_exp_query_intf_params){
1910 .intf_scope = IBV_EXP_INTF_GLOBAL,
1911 .intf = IBV_EXP_INTF_QP_BURST,
1913 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1914 /* MC loopback must be disabled when not using a VF. */
1917 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1921 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1922 if (tmpl.if_qp == NULL) {
1923 ERROR("%p: QP interface family query failed with status %d",
1924 (void *)dev, status);
1927 /* Clean up txq in case we're reinitializing it. */
1928 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1931 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1932 /* Pre-register known mempools. */
1933 rte_mempool_walk(txq_mp2mr_iter, txq);
1943 * DPDK callback to configure a TX queue.
1946 * Pointer to Ethernet device structure.
1950 * Number of descriptors to configure in queue.
1952 * NUMA socket on which memory must be allocated.
1954 * Thresholds parameters.
1957 * 0 on success, negative errno value on failure.
1960 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1961 unsigned int socket, const struct rte_eth_txconf *conf)
1963 struct priv *priv = dev->data->dev_private;
1964 struct txq *txq = (*priv->txqs)[idx];
1967 if (mlx4_is_secondary())
1968 return -E_RTE_SECONDARY;
1970 DEBUG("%p: configuring queue %u for %u descriptors",
1971 (void *)dev, idx, desc);
1972 if (idx >= priv->txqs_n) {
1973 ERROR("%p: queue index out of range (%u >= %u)",
1974 (void *)dev, idx, priv->txqs_n);
1979 DEBUG("%p: reusing already allocated queue index %u (%p)",
1980 (void *)dev, idx, (void *)txq);
1981 if (priv->started) {
1985 (*priv->txqs)[idx] = NULL;
1988 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1990 ERROR("%p: unable to allocate queue index %u",
1996 ret = txq_setup(dev, txq, desc, socket, conf);
2000 txq->stats.idx = idx;
2001 DEBUG("%p: adding TX queue %p to list",
2002 (void *)dev, (void *)txq);
2003 (*priv->txqs)[idx] = txq;
2004 /* Update send callback. */
2005 dev->tx_pkt_burst = mlx4_tx_burst;
2012 * DPDK callback to release a TX queue.
2015 * Generic TX queue pointer.
2018 mlx4_tx_queue_release(void *dpdk_txq)
2020 struct txq *txq = (struct txq *)dpdk_txq;
2024 if (mlx4_is_secondary())
2030 for (i = 0; (i != priv->txqs_n); ++i)
2031 if ((*priv->txqs)[i] == txq) {
2032 DEBUG("%p: removing TX queue %p from list",
2033 (void *)priv->dev, (void *)txq);
2034 (*priv->txqs)[i] = NULL;
2042 /* RX queues handling. */
2045 * Allocate RX queue elements with scattered packets support.
2048 * Pointer to RX queue structure.
2050 * Number of elements to allocate.
2052 * If not NULL, fetch buffers from this array instead of allocating them
2053 * with rte_pktmbuf_alloc().
2056 * 0 on success, errno value on failure.
2059 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2060 struct rte_mbuf **pool)
2063 struct rxq_elt_sp (*elts)[elts_n] =
2064 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2069 ERROR("%p: can't allocate packets array", (void *)rxq);
2073 /* For each WR (packet). */
2074 for (i = 0; (i != elts_n); ++i) {
2076 struct rxq_elt_sp *elt = &(*elts)[i];
2077 struct ibv_recv_wr *wr = &elt->wr;
2078 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2080 /* These two arrays must have the same size. */
2081 assert(elemof(elt->sges) == elemof(elt->bufs));
2084 wr->next = &(*elts)[(i + 1)].wr;
2085 wr->sg_list = &(*sges)[0];
2086 wr->num_sge = elemof(*sges);
2087 /* For each SGE (segment). */
2088 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2089 struct ibv_sge *sge = &(*sges)[j];
2090 struct rte_mbuf *buf;
2094 assert(buf != NULL);
2095 rte_pktmbuf_reset(buf);
2097 buf = rte_pktmbuf_alloc(rxq->mp);
2099 assert(pool == NULL);
2100 ERROR("%p: empty mbuf pool", (void *)rxq);
2105 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2106 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2107 /* Buffer is supposed to be empty. */
2108 assert(rte_pktmbuf_data_len(buf) == 0);
2109 assert(rte_pktmbuf_pkt_len(buf) == 0);
2110 /* sge->addr must be able to store a pointer. */
2111 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2113 /* The first SGE keeps its headroom. */
2114 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2115 sge->length = (buf->buf_len -
2116 RTE_PKTMBUF_HEADROOM);
2118 /* Subsequent SGEs lose theirs. */
2119 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2120 SET_DATA_OFF(buf, 0);
2121 sge->addr = (uintptr_t)buf->buf_addr;
2122 sge->length = buf->buf_len;
2124 sge->lkey = rxq->mr->lkey;
2125 /* Redundant check for tailroom. */
2126 assert(sge->length == rte_pktmbuf_tailroom(buf));
2129 /* The last WR pointer must be NULL. */
2130 (*elts)[(i - 1)].wr.next = NULL;
2131 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2132 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2133 rxq->elts_n = elts_n;
2135 rxq->elts.sp = elts;
2140 assert(pool == NULL);
2141 for (i = 0; (i != elemof(*elts)); ++i) {
2143 struct rxq_elt_sp *elt = &(*elts)[i];
2145 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2146 struct rte_mbuf *buf = elt->bufs[j];
2149 rte_pktmbuf_free_seg(buf);
2154 DEBUG("%p: failed, freed everything", (void *)rxq);
2160 * Free RX queue elements with scattered packets support.
2163 * Pointer to RX queue structure.
2166 rxq_free_elts_sp(struct rxq *rxq)
2169 unsigned int elts_n = rxq->elts_n;
2170 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2172 DEBUG("%p: freeing WRs", (void *)rxq);
2174 rxq->elts.sp = NULL;
2177 for (i = 0; (i != elemof(*elts)); ++i) {
2179 struct rxq_elt_sp *elt = &(*elts)[i];
2181 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2182 struct rte_mbuf *buf = elt->bufs[j];
2185 rte_pktmbuf_free_seg(buf);
2192 * Allocate RX queue elements.
2195 * Pointer to RX queue structure.
2197 * Number of elements to allocate.
2199 * If not NULL, fetch buffers from this array instead of allocating them
2200 * with rte_pktmbuf_alloc().
2203 * 0 on success, errno value on failure.
2206 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2209 struct rxq_elt (*elts)[elts_n] =
2210 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2215 ERROR("%p: can't allocate packets array", (void *)rxq);
2219 /* For each WR (packet). */
2220 for (i = 0; (i != elts_n); ++i) {
2221 struct rxq_elt *elt = &(*elts)[i];
2222 struct ibv_recv_wr *wr = &elt->wr;
2223 struct ibv_sge *sge = &(*elts)[i].sge;
2224 struct rte_mbuf *buf;
2228 assert(buf != NULL);
2229 rte_pktmbuf_reset(buf);
2231 buf = rte_pktmbuf_alloc(rxq->mp);
2233 assert(pool == NULL);
2234 ERROR("%p: empty mbuf pool", (void *)rxq);
2238 /* Configure WR. Work request ID contains its own index in
2239 * the elts array and the offset between SGE buffer header and
2241 WR_ID(wr->wr_id).id = i;
2242 WR_ID(wr->wr_id).offset =
2243 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2245 wr->next = &(*elts)[(i + 1)].wr;
2248 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2249 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2250 /* Buffer is supposed to be empty. */
2251 assert(rte_pktmbuf_data_len(buf) == 0);
2252 assert(rte_pktmbuf_pkt_len(buf) == 0);
2253 /* sge->addr must be able to store a pointer. */
2254 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2255 /* SGE keeps its headroom. */
2256 sge->addr = (uintptr_t)
2257 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2258 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2259 sge->lkey = rxq->mr->lkey;
2260 /* Redundant check for tailroom. */
2261 assert(sge->length == rte_pktmbuf_tailroom(buf));
2262 /* Make sure elts index and SGE mbuf pointer can be deduced
2264 if ((WR_ID(wr->wr_id).id != i) ||
2265 ((void *)((uintptr_t)sge->addr -
2266 WR_ID(wr->wr_id).offset) != buf)) {
2267 ERROR("%p: cannot store index and offset in WR ID",
2270 rte_pktmbuf_free(buf);
2275 /* The last WR pointer must be NULL. */
2276 (*elts)[(i - 1)].wr.next = NULL;
2277 DEBUG("%p: allocated and configured %u single-segment WRs",
2278 (void *)rxq, elts_n);
2279 rxq->elts_n = elts_n;
2281 rxq->elts.no_sp = elts;
2286 assert(pool == NULL);
2287 for (i = 0; (i != elemof(*elts)); ++i) {
2288 struct rxq_elt *elt = &(*elts)[i];
2289 struct rte_mbuf *buf;
2291 if (elt->sge.addr == 0)
2293 assert(WR_ID(elt->wr.wr_id).id == i);
2294 buf = (void *)((uintptr_t)elt->sge.addr -
2295 WR_ID(elt->wr.wr_id).offset);
2296 rte_pktmbuf_free_seg(buf);
2300 DEBUG("%p: failed, freed everything", (void *)rxq);
2306 * Free RX queue elements.
2309 * Pointer to RX queue structure.
2312 rxq_free_elts(struct rxq *rxq)
2315 unsigned int elts_n = rxq->elts_n;
2316 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2318 DEBUG("%p: freeing WRs", (void *)rxq);
2320 rxq->elts.no_sp = NULL;
2323 for (i = 0; (i != elemof(*elts)); ++i) {
2324 struct rxq_elt *elt = &(*elts)[i];
2325 struct rte_mbuf *buf;
2327 if (elt->sge.addr == 0)
2329 assert(WR_ID(elt->wr.wr_id).id == i);
2330 buf = (void *)((uintptr_t)elt->sge.addr -
2331 WR_ID(elt->wr.wr_id).offset);
2332 rte_pktmbuf_free_seg(buf);
2338 * Delete flow steering rule.
2341 * Pointer to RX queue structure.
2343 * MAC address index.
2348 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2351 struct priv *priv = rxq->priv;
2352 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2353 (const uint8_t (*)[ETHER_ADDR_LEN])
2354 priv->mac[mac_index].addr_bytes;
2356 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2357 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2358 " (VLAN ID %" PRIu16 ")",
2360 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2361 mac_index, priv->vlan_filter[vlan_index].id);
2362 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2363 rxq->mac_flow[mac_index][vlan_index] = NULL;
2367 * Unregister a MAC address from a RX queue.
2370 * Pointer to RX queue structure.
2372 * MAC address index.
2375 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2377 struct priv *priv = rxq->priv;
2379 unsigned int vlans = 0;
2381 assert(mac_index < elemof(priv->mac));
2382 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2384 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2385 if (!priv->vlan_filter[i].enabled)
2387 rxq_del_flow(rxq, mac_index, i);
2391 rxq_del_flow(rxq, mac_index, 0);
2393 BITFIELD_RESET(rxq->mac_configured, mac_index);
2397 * Unregister all MAC addresses from a RX queue.
2400 * Pointer to RX queue structure.
2403 rxq_mac_addrs_del(struct rxq *rxq)
2405 struct priv *priv = rxq->priv;
2408 for (i = 0; (i != elemof(priv->mac)); ++i)
2409 rxq_mac_addr_del(rxq, i);
2412 static int rxq_promiscuous_enable(struct rxq *);
2413 static void rxq_promiscuous_disable(struct rxq *);
2416 * Add single flow steering rule.
2419 * Pointer to RX queue structure.
2421 * MAC address index to register.
2423 * VLAN index. Use -1 for a flow without VLAN.
2426 * 0 on success, errno value on failure.
2429 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2431 struct ibv_flow *flow;
2432 struct priv *priv = rxq->priv;
2433 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2434 (const uint8_t (*)[ETHER_ADDR_LEN])
2435 priv->mac[mac_index].addr_bytes;
2437 /* Allocate flow specification on the stack. */
2438 struct __attribute__((packed)) {
2439 struct ibv_flow_attr attr;
2440 struct ibv_flow_spec_eth spec;
2442 struct ibv_flow_attr *attr = &data.attr;
2443 struct ibv_flow_spec_eth *spec = &data.spec;
2445 assert(mac_index < elemof(priv->mac));
2446 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2448 * No padding must be inserted by the compiler between attr and spec.
2449 * This layout is expected by libibverbs.
2451 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2452 *attr = (struct ibv_flow_attr){
2453 .type = IBV_FLOW_ATTR_NORMAL,
2458 *spec = (struct ibv_flow_spec_eth){
2459 .type = IBV_FLOW_SPEC_ETH,
2460 .size = sizeof(*spec),
2463 (*mac)[0], (*mac)[1], (*mac)[2],
2464 (*mac)[3], (*mac)[4], (*mac)[5]
2466 .vlan_tag = ((vlan_index != -1u) ?
2467 htons(priv->vlan_filter[vlan_index].id) :
2471 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2472 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2475 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2476 " (VLAN %s %" PRIu16 ")",
2478 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2480 ((vlan_index != -1u) ? "ID" : "index"),
2481 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2482 /* Create related flow. */
2484 flow = ibv_create_flow(rxq->qp, attr);
2486 /* It's not clear whether errno is always set in this case. */
2487 ERROR("%p: flow configuration failed, errno=%d: %s",
2489 (errno ? strerror(errno) : "Unknown error"));
2494 if (vlan_index == -1u)
2496 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2497 rxq->mac_flow[mac_index][vlan_index] = flow;
2502 * Register a MAC address in a RX queue.
2505 * Pointer to RX queue structure.
2507 * MAC address index to register.
2510 * 0 on success, errno value on failure.
2513 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2515 struct priv *priv = rxq->priv;
2517 unsigned int vlans = 0;
2520 assert(mac_index < elemof(priv->mac));
2521 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2522 rxq_mac_addr_del(rxq, mac_index);
2523 /* Fill VLAN specifications. */
2524 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2525 if (!priv->vlan_filter[i].enabled)
2527 /* Create related flow. */
2528 ret = rxq_add_flow(rxq, mac_index, i);
2533 /* Failure, rollback. */
2535 if (priv->vlan_filter[--i].enabled)
2536 rxq_del_flow(rxq, mac_index, i);
2540 /* In case there is no VLAN filter. */
2542 ret = rxq_add_flow(rxq, mac_index, -1);
2546 BITFIELD_SET(rxq->mac_configured, mac_index);
2551 * Register all MAC addresses in a RX queue.
2554 * Pointer to RX queue structure.
2557 * 0 on success, errno value on failure.
2560 rxq_mac_addrs_add(struct rxq *rxq)
2562 struct priv *priv = rxq->priv;
2566 for (i = 0; (i != elemof(priv->mac)); ++i) {
2567 if (!BITFIELD_ISSET(priv->mac_configured, i))
2569 ret = rxq_mac_addr_add(rxq, i);
2572 /* Failure, rollback. */
2574 rxq_mac_addr_del(rxq, --i);
2582 * Unregister a MAC address.
2584 * In RSS mode, the MAC address is unregistered from the parent queue,
2585 * otherwise it is unregistered from each queue directly.
2588 * Pointer to private structure.
2590 * MAC address index.
2593 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2597 assert(mac_index < elemof(priv->mac));
2598 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2601 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2604 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2605 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2607 BITFIELD_RESET(priv->mac_configured, mac_index);
2611 * Register a MAC address.
2613 * In RSS mode, the MAC address is registered in the parent queue,
2614 * otherwise it is registered in each queue directly.
2617 * Pointer to private structure.
2619 * MAC address index to use.
2621 * MAC address to register.
2624 * 0 on success, errno value on failure.
2627 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2628 const uint8_t (*mac)[ETHER_ADDR_LEN])
2633 assert(mac_index < elemof(priv->mac));
2634 /* First, make sure this address isn't already configured. */
2635 for (i = 0; (i != elemof(priv->mac)); ++i) {
2636 /* Skip this index, it's going to be reconfigured. */
2639 if (!BITFIELD_ISSET(priv->mac_configured, i))
2641 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2643 /* Address already configured elsewhere, return with error. */
2646 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2647 priv_mac_addr_del(priv, mac_index);
2648 priv->mac[mac_index] = (struct ether_addr){
2650 (*mac)[0], (*mac)[1], (*mac)[2],
2651 (*mac)[3], (*mac)[4], (*mac)[5]
2654 /* If device isn't started, this is all we need to do. */
2655 if (!priv->started) {
2657 /* Verify that all queues have this index disabled. */
2658 for (i = 0; (i != priv->rxqs_n); ++i) {
2659 if ((*priv->rxqs)[i] == NULL)
2661 assert(!BITFIELD_ISSET
2662 ((*priv->rxqs)[i]->mac_configured, mac_index));
2668 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2673 for (i = 0; (i != priv->rxqs_n); ++i) {
2674 if ((*priv->rxqs)[i] == NULL)
2676 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2679 /* Failure, rollback. */
2681 if ((*priv->rxqs)[(--i)] != NULL)
2682 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2686 BITFIELD_SET(priv->mac_configured, mac_index);
2691 * Enable allmulti mode in a RX queue.
2694 * Pointer to RX queue structure.
2697 * 0 on success, errno value on failure.
2700 rxq_allmulticast_enable(struct rxq *rxq)
2702 struct ibv_flow *flow;
2703 struct ibv_flow_attr attr = {
2704 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2706 .port = rxq->priv->port,
2710 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2711 if (rxq->allmulti_flow != NULL)
2714 flow = ibv_create_flow(rxq->qp, &attr);
2716 /* It's not clear whether errno is always set in this case. */
2717 ERROR("%p: flow configuration failed, errno=%d: %s",
2719 (errno ? strerror(errno) : "Unknown error"));
2724 rxq->allmulti_flow = flow;
2725 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2730 * Disable allmulti mode in a RX queue.
2733 * Pointer to RX queue structure.
2736 rxq_allmulticast_disable(struct rxq *rxq)
2738 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2739 if (rxq->allmulti_flow == NULL)
2741 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2742 rxq->allmulti_flow = NULL;
2743 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2747 * Enable promiscuous mode in a RX queue.
2750 * Pointer to RX queue structure.
2753 * 0 on success, errno value on failure.
2756 rxq_promiscuous_enable(struct rxq *rxq)
2758 struct ibv_flow *flow;
2759 struct ibv_flow_attr attr = {
2760 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2762 .port = rxq->priv->port,
2768 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2769 if (rxq->promisc_flow != NULL)
2772 flow = ibv_create_flow(rxq->qp, &attr);
2774 /* It's not clear whether errno is always set in this case. */
2775 ERROR("%p: flow configuration failed, errno=%d: %s",
2777 (errno ? strerror(errno) : "Unknown error"));
2782 rxq->promisc_flow = flow;
2783 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2788 * Disable promiscuous mode in a RX queue.
2791 * Pointer to RX queue structure.
2794 rxq_promiscuous_disable(struct rxq *rxq)
2798 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2799 if (rxq->promisc_flow == NULL)
2801 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2802 rxq->promisc_flow = NULL;
2803 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2807 * Clean up a RX queue.
2809 * Destroy objects, free allocated memory and reset the structure for reuse.
2812 * Pointer to RX queue structure.
2815 rxq_cleanup(struct rxq *rxq)
2817 struct ibv_exp_release_intf_params params;
2819 DEBUG("cleaning up %p", (void *)rxq);
2821 rxq_free_elts_sp(rxq);
2824 if (rxq->if_qp != NULL) {
2825 assert(rxq->priv != NULL);
2826 assert(rxq->priv->ctx != NULL);
2827 assert(rxq->qp != NULL);
2828 params = (struct ibv_exp_release_intf_params){
2831 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2835 if (rxq->if_cq != NULL) {
2836 assert(rxq->priv != NULL);
2837 assert(rxq->priv->ctx != NULL);
2838 assert(rxq->cq != NULL);
2839 params = (struct ibv_exp_release_intf_params){
2842 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2846 if (rxq->qp != NULL) {
2847 rxq_promiscuous_disable(rxq);
2848 rxq_allmulticast_disable(rxq);
2849 rxq_mac_addrs_del(rxq);
2850 claim_zero(ibv_destroy_qp(rxq->qp));
2852 if (rxq->cq != NULL)
2853 claim_zero(ibv_destroy_cq(rxq->cq));
2854 if (rxq->rd != NULL) {
2855 struct ibv_exp_destroy_res_domain_attr attr = {
2859 assert(rxq->priv != NULL);
2860 assert(rxq->priv->ctx != NULL);
2861 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2865 if (rxq->mr != NULL)
2866 claim_zero(ibv_dereg_mr(rxq->mr));
2867 memset(rxq, 0, sizeof(*rxq));
2871 * Translate RX completion flags to packet type.
2874 * RX completion flags returned by poll_length_flags().
2876 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2879 * Packet type for struct rte_mbuf.
2881 static inline uint32_t
2882 rxq_cq_to_pkt_type(uint32_t flags)
2886 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2889 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2891 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET, RTE_PTYPE_L3_IPV6) |
2893 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_INNER_L3_IPV4) |
2895 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_INNER_L3_IPV6);
2899 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2901 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_L3_IPV6);
2906 * Translate RX completion flags to offload flags.
2909 * Pointer to RX queue structure.
2911 * RX completion flags returned by poll_length_flags().
2914 * Offload flags (ol_flags) for struct rte_mbuf.
2916 static inline uint32_t
2917 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2919 uint32_t ol_flags = 0;
2924 IBV_EXP_CQ_RX_IP_CSUM_OK,
2925 PKT_RX_IP_CKSUM_BAD) |
2927 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2928 PKT_RX_L4_CKSUM_BAD);
2930 * PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD are used in place
2931 * of PKT_RX_EIP_CKSUM_BAD because the latter is not functional
2934 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2937 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2938 PKT_RX_IP_CKSUM_BAD) |
2940 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2941 PKT_RX_L4_CKSUM_BAD);
2946 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2949 * DPDK callback for RX with scattered packets support.
2952 * Generic pointer to RX queue structure.
2954 * Array to store received packets.
2956 * Maximum number of packets in array.
2959 * Number of packets successfully received (<= pkts_n).
2962 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2964 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2965 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2966 const unsigned int elts_n = rxq->elts_n;
2967 unsigned int elts_head = rxq->elts_head;
2968 struct ibv_recv_wr head;
2969 struct ibv_recv_wr **next = &head.next;
2970 struct ibv_recv_wr *bad_wr;
2972 unsigned int pkts_ret = 0;
2975 if (unlikely(!rxq->sp))
2976 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2977 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2979 for (i = 0; (i != pkts_n); ++i) {
2980 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2981 struct ibv_recv_wr *wr = &elt->wr;
2982 uint64_t wr_id = wr->wr_id;
2984 unsigned int pkt_buf_len;
2985 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2986 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2987 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2991 /* Sanity checks. */
2995 assert(wr_id < rxq->elts_n);
2996 assert(wr->sg_list == elt->sges);
2997 assert(wr->num_sge == elemof(elt->sges));
2998 assert(elts_head < rxq->elts_n);
2999 assert(rxq->elts_head < rxq->elts_n);
3000 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3002 if (unlikely(ret < 0)) {
3006 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3008 /* ibv_poll_cq() must be used in case of failure. */
3009 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3010 if (unlikely(wcs_n == 0))
3012 if (unlikely(wcs_n < 0)) {
3013 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3014 (void *)rxq, wcs_n);
3018 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3019 /* Whatever, just repost the offending WR. */
3020 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3021 " completion status (%d): %s",
3022 (void *)rxq, wc.wr_id, wc.status,
3023 ibv_wc_status_str(wc.status));
3024 #ifdef MLX4_PMD_SOFT_COUNTERS
3025 /* Increment dropped packets counter. */
3026 ++rxq->stats.idropped;
3028 /* Link completed WRs together for repost. */
3039 /* Link completed WRs together for repost. */
3043 * Replace spent segments with new ones, concatenate and
3044 * return them as pkt_buf.
3047 struct ibv_sge *sge = &elt->sges[j];
3048 struct rte_mbuf *seg = elt->bufs[j];
3049 struct rte_mbuf *rep;
3050 unsigned int seg_tailroom;
3053 * Fetch initial bytes of packet descriptor into a
3054 * cacheline while allocating rep.
3057 rep = rte_mbuf_raw_alloc(rxq->mp);
3058 if (unlikely(rep == NULL)) {
3060 * Unable to allocate a replacement mbuf,
3063 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3064 " can't allocate a new mbuf",
3065 (void *)rxq, wr_id);
3066 if (pkt_buf != NULL) {
3067 *pkt_buf_next = NULL;
3068 rte_pktmbuf_free(pkt_buf);
3070 /* Increase out of memory counters. */
3071 ++rxq->stats.rx_nombuf;
3072 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3076 /* Poison user-modifiable fields in rep. */
3077 NEXT(rep) = (void *)((uintptr_t)-1);
3078 SET_DATA_OFF(rep, 0xdead);
3079 DATA_LEN(rep) = 0xd00d;
3080 PKT_LEN(rep) = 0xdeadd00d;
3081 NB_SEGS(rep) = 0x2a;
3085 assert(rep->buf_len == seg->buf_len);
3086 assert(rep->buf_len == rxq->mb_len);
3087 /* Reconfigure sge to use rep instead of seg. */
3088 assert(sge->lkey == rxq->mr->lkey);
3089 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3092 /* Update pkt_buf if it's the first segment, or link
3093 * seg to the previous one and update pkt_buf_next. */
3094 *pkt_buf_next = seg;
3095 pkt_buf_next = &NEXT(seg);
3096 /* Update seg information. */
3097 seg_tailroom = (seg->buf_len - seg_headroom);
3098 assert(sge->length == seg_tailroom);
3099 SET_DATA_OFF(seg, seg_headroom);
3100 if (likely(len <= seg_tailroom)) {
3102 DATA_LEN(seg) = len;
3105 assert(rte_pktmbuf_headroom(seg) ==
3107 assert(rte_pktmbuf_tailroom(seg) ==
3108 (seg_tailroom - len));
3111 DATA_LEN(seg) = seg_tailroom;
3112 PKT_LEN(seg) = seg_tailroom;
3114 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3115 assert(rte_pktmbuf_tailroom(seg) == 0);
3116 /* Fix len and clear headroom for next segments. */
3117 len -= seg_tailroom;
3120 /* Update head and tail segments. */
3121 *pkt_buf_next = NULL;
3122 assert(pkt_buf != NULL);
3124 NB_SEGS(pkt_buf) = j;
3125 PORT(pkt_buf) = rxq->port_id;
3126 PKT_LEN(pkt_buf) = pkt_buf_len;
3127 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3128 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3130 /* Return packet. */
3131 *(pkts++) = pkt_buf;
3133 #ifdef MLX4_PMD_SOFT_COUNTERS
3134 /* Increase bytes counter. */
3135 rxq->stats.ibytes += pkt_buf_len;
3138 if (++elts_head >= elts_n)
3142 if (unlikely(i == 0))
3147 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3149 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3150 if (unlikely(ret)) {
3151 /* Inability to repost WRs is fatal. */
3152 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3158 rxq->elts_head = elts_head;
3159 #ifdef MLX4_PMD_SOFT_COUNTERS
3160 /* Increase packets counter. */
3161 rxq->stats.ipackets += pkts_ret;
3167 * DPDK callback for RX.
3169 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3170 * manage scattered packets. Improves performance when MRU is lower than the
3171 * size of the first segment.
3174 * Generic pointer to RX queue structure.
3176 * Array to store received packets.
3178 * Maximum number of packets in array.
3181 * Number of packets successfully received (<= pkts_n).
3184 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3186 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3187 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3188 const unsigned int elts_n = rxq->elts_n;
3189 unsigned int elts_head = rxq->elts_head;
3190 struct ibv_sge sges[pkts_n];
3192 unsigned int pkts_ret = 0;
3195 if (unlikely(rxq->sp))
3196 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3197 for (i = 0; (i != pkts_n); ++i) {
3198 struct rxq_elt *elt = &(*elts)[elts_head];
3199 struct ibv_recv_wr *wr = &elt->wr;
3200 uint64_t wr_id = wr->wr_id;
3202 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3203 WR_ID(wr_id).offset);
3204 struct rte_mbuf *rep;
3207 /* Sanity checks. */
3208 assert(WR_ID(wr_id).id < rxq->elts_n);
3209 assert(wr->sg_list == &elt->sge);
3210 assert(wr->num_sge == 1);
3211 assert(elts_head < rxq->elts_n);
3212 assert(rxq->elts_head < rxq->elts_n);
3214 * Fetch initial bytes of packet descriptor into a
3215 * cacheline while allocating rep.
3218 rte_prefetch0(&seg->cacheline1);
3219 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3221 if (unlikely(ret < 0)) {
3225 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3227 /* ibv_poll_cq() must be used in case of failure. */
3228 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3229 if (unlikely(wcs_n == 0))
3231 if (unlikely(wcs_n < 0)) {
3232 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3233 (void *)rxq, wcs_n);
3237 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3238 /* Whatever, just repost the offending WR. */
3239 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3240 " completion status (%d): %s",
3241 (void *)rxq, wc.wr_id, wc.status,
3242 ibv_wc_status_str(wc.status));
3243 #ifdef MLX4_PMD_SOFT_COUNTERS
3244 /* Increment dropped packets counter. */
3245 ++rxq->stats.idropped;
3247 /* Add SGE to array for repost. */
3256 rep = rte_mbuf_raw_alloc(rxq->mp);
3257 if (unlikely(rep == NULL)) {
3259 * Unable to allocate a replacement mbuf,
3262 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3263 " can't allocate a new mbuf",
3264 (void *)rxq, WR_ID(wr_id).id);
3265 /* Increase out of memory counters. */
3266 ++rxq->stats.rx_nombuf;
3267 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3271 /* Reconfigure sge to use rep instead of seg. */
3272 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3273 assert(elt->sge.lkey == rxq->mr->lkey);
3274 WR_ID(wr->wr_id).offset =
3275 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3277 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3279 /* Add SGE to array for repost. */
3282 /* Update seg information. */
3283 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3285 PORT(seg) = rxq->port_id;
3288 DATA_LEN(seg) = len;
3289 seg->packet_type = rxq_cq_to_pkt_type(flags);
3290 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3292 /* Return packet. */
3295 #ifdef MLX4_PMD_SOFT_COUNTERS
3296 /* Increase bytes counter. */
3297 rxq->stats.ibytes += len;
3300 if (++elts_head >= elts_n)
3304 if (unlikely(i == 0))
3308 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3310 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3311 if (unlikely(ret)) {
3312 /* Inability to repost WRs is fatal. */
3313 DEBUG("%p: recv_burst(): failed (ret=%d)",
3318 rxq->elts_head = elts_head;
3319 #ifdef MLX4_PMD_SOFT_COUNTERS
3320 /* Increase packets counter. */
3321 rxq->stats.ipackets += pkts_ret;
3327 * DPDK callback for RX in secondary processes.
3329 * This function configures all queues from primary process information
3330 * if necessary before reverting to the normal RX burst callback.
3333 * Generic pointer to RX queue structure.
3335 * Array to store received packets.
3337 * Maximum number of packets in array.
3340 * Number of packets successfully received (<= pkts_n).
3343 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3346 struct rxq *rxq = dpdk_rxq;
3347 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3348 struct priv *primary_priv;
3354 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3355 /* Look for queue index in both private structures. */
3356 for (index = 0; index != priv->rxqs_n; ++index)
3357 if (((*primary_priv->rxqs)[index] == rxq) ||
3358 ((*priv->rxqs)[index] == rxq))
3360 if (index == priv->rxqs_n)
3362 rxq = (*priv->rxqs)[index];
3363 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3367 * Allocate a Queue Pair.
3368 * Optionally setup inline receive if supported.
3371 * Pointer to private structure.
3373 * Completion queue to associate with QP.
3375 * Number of descriptors in QP (hint only).
3378 * QP pointer or NULL in case of error.
3380 static struct ibv_qp *
3381 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3382 struct ibv_exp_res_domain *rd)
3384 struct ibv_exp_qp_init_attr attr = {
3385 /* CQ to be associated with the send queue. */
3387 /* CQ to be associated with the receive queue. */
3390 /* Max number of outstanding WRs. */
3391 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3392 priv->device_attr.max_qp_wr :
3394 /* Max number of scatter/gather elements in a WR. */
3395 .max_recv_sge = ((priv->device_attr.max_sge <
3396 MLX4_PMD_SGE_WR_N) ?
3397 priv->device_attr.max_sge :
3400 .qp_type = IBV_QPT_RAW_PACKET,
3401 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3402 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3408 attr.max_inl_recv = priv->inl_recv_size;
3409 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3411 return ibv_exp_create_qp(priv->ctx, &attr);
3417 * Allocate a RSS Queue Pair.
3418 * Optionally setup inline receive if supported.
3421 * Pointer to private structure.
3423 * Completion queue to associate with QP.
3425 * Number of descriptors in QP (hint only).
3427 * If nonzero, create a parent QP, otherwise a child.
3430 * QP pointer or NULL in case of error.
3432 static struct ibv_qp *
3433 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3434 int parent, struct ibv_exp_res_domain *rd)
3436 struct ibv_exp_qp_init_attr attr = {
3437 /* CQ to be associated with the send queue. */
3439 /* CQ to be associated with the receive queue. */
3442 /* Max number of outstanding WRs. */
3443 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3444 priv->device_attr.max_qp_wr :
3446 /* Max number of scatter/gather elements in a WR. */
3447 .max_recv_sge = ((priv->device_attr.max_sge <
3448 MLX4_PMD_SGE_WR_N) ?
3449 priv->device_attr.max_sge :
3452 .qp_type = IBV_QPT_RAW_PACKET,
3453 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3454 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3455 IBV_EXP_QP_INIT_ATTR_QPG),
3461 attr.max_inl_recv = priv->inl_recv_size,
3462 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3465 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3466 /* TSS isn't necessary. */
3467 attr.qpg.parent_attrib.tss_child_count = 0;
3468 attr.qpg.parent_attrib.rss_child_count =
3469 rte_align32pow2(priv->rxqs_n + 1) >> 1;
3470 DEBUG("initializing parent RSS queue");
3472 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3473 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3474 DEBUG("initializing child RSS queue");
3476 return ibv_exp_create_qp(priv->ctx, &attr);
3479 #endif /* RSS_SUPPORT */
3482 * Reconfigure a RX queue with new parameters.
3484 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3485 * thread (such as a control thread), may corrupt the pool.
3486 * In case of failure, the queue is left untouched.
3489 * Pointer to Ethernet device structure.
3494 * 0 on success, errno value on failure.
3497 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3499 struct priv *priv = rxq->priv;
3500 struct rxq tmpl = *rxq;
3501 unsigned int mbuf_n;
3502 unsigned int desc_n;
3503 struct rte_mbuf **pool;
3505 struct ibv_exp_qp_attr mod;
3506 struct ibv_recv_wr *bad_wr;
3508 int parent = (rxq == &priv->rxq_parent);
3511 ERROR("%p: cannot rehash parent queue %p",
3512 (void *)dev, (void *)rxq);
3515 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3516 /* Number of descriptors and mbufs currently allocated. */
3517 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3519 /* Toggle RX checksum offload if hardware supports it. */
3520 if (priv->hw_csum) {
3521 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3522 rxq->csum = tmpl.csum;
3524 if (priv->hw_csum_l2tun) {
3525 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3526 rxq->csum_l2tun = tmpl.csum_l2tun;
3528 /* Enable scattered packets support for this queue if necessary. */
3529 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3530 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3531 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3533 desc_n /= MLX4_PMD_SGE_WR_N;
3536 DEBUG("%p: %s scattered packets support (%u WRs)",
3537 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3538 /* If scatter mode is the same as before, nothing to do. */
3539 if (tmpl.sp == rxq->sp) {
3540 DEBUG("%p: nothing to do", (void *)dev);
3543 /* Remove attached flows if RSS is disabled (no parent queue). */
3545 rxq_allmulticast_disable(&tmpl);
3546 rxq_promiscuous_disable(&tmpl);
3547 rxq_mac_addrs_del(&tmpl);
3548 /* Update original queue in case of failure. */
3549 rxq->allmulti_flow = tmpl.allmulti_flow;
3550 rxq->promisc_flow = tmpl.promisc_flow;
3551 memcpy(rxq->mac_configured, tmpl.mac_configured,
3552 sizeof(rxq->mac_configured));
3553 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3555 /* From now on, any failure will render the queue unusable.
3556 * Reinitialize QP. */
3557 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3558 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3560 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3564 err = ibv_resize_cq(tmpl.cq, desc_n);
3566 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3570 mod = (struct ibv_exp_qp_attr){
3571 /* Move the QP to this state. */
3572 .qp_state = IBV_QPS_INIT,
3573 /* Primary port number. */
3574 .port_num = priv->port
3576 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3579 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3580 #endif /* RSS_SUPPORT */
3583 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3584 (void *)dev, strerror(err));
3588 /* Reconfigure flows. Do not care for errors. */
3590 rxq_mac_addrs_add(&tmpl);
3592 rxq_promiscuous_enable(&tmpl);
3594 rxq_allmulticast_enable(&tmpl);
3595 /* Update original queue in case of failure. */
3596 rxq->allmulti_flow = tmpl.allmulti_flow;
3597 rxq->promisc_flow = tmpl.promisc_flow;
3598 memcpy(rxq->mac_configured, tmpl.mac_configured,
3599 sizeof(rxq->mac_configured));
3600 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3602 /* Allocate pool. */
3603 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3605 ERROR("%p: cannot allocate memory", (void *)dev);
3608 /* Snatch mbufs from original queue. */
3611 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3613 for (i = 0; (i != elemof(*elts)); ++i) {
3614 struct rxq_elt_sp *elt = &(*elts)[i];
3617 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3618 assert(elt->bufs[j] != NULL);
3619 pool[k++] = elt->bufs[j];
3623 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3625 for (i = 0; (i != elemof(*elts)); ++i) {
3626 struct rxq_elt *elt = &(*elts)[i];
3627 struct rte_mbuf *buf = (void *)
3628 ((uintptr_t)elt->sge.addr -
3629 WR_ID(elt->wr.wr_id).offset);
3631 assert(WR_ID(elt->wr.wr_id).id == i);
3635 assert(k == mbuf_n);
3637 tmpl.elts.sp = NULL;
3638 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3640 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3641 rxq_alloc_elts(&tmpl, desc_n, pool));
3643 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3648 assert(tmpl.elts_n == desc_n);
3649 assert(tmpl.elts.sp != NULL);
3651 /* Clean up original data. */
3653 rte_free(rxq->elts.sp);
3654 rxq->elts.sp = NULL;
3656 err = ibv_post_recv(tmpl.qp,
3658 &(*tmpl.elts.sp)[0].wr :
3659 &(*tmpl.elts.no_sp)[0].wr),
3662 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3668 mod = (struct ibv_exp_qp_attr){
3669 .qp_state = IBV_QPS_RTR
3671 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3673 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3674 (void *)dev, strerror(err));
3682 * Configure a RX queue.
3685 * Pointer to Ethernet device structure.
3687 * Pointer to RX queue structure.
3689 * Number of descriptors to configure in queue.
3691 * NUMA socket on which memory must be allocated.
3693 * If true, the queue is disabled because its index is higher or
3694 * equal to the real number of queues, which must be a power of 2.
3696 * Thresholds parameters.
3698 * Memory pool for buffer allocations.
3701 * 0 on success, errno value on failure.
3704 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3705 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
3706 struct rte_mempool *mp)
3708 struct priv *priv = dev->data->dev_private;
3714 struct ibv_exp_qp_attr mod;
3716 struct ibv_exp_query_intf_params params;
3717 struct ibv_exp_cq_init_attr cq;
3718 struct ibv_exp_res_domain_init_attr rd;
3720 enum ibv_exp_query_intf_status status;
3721 struct ibv_recv_wr *bad_wr;
3722 struct rte_mbuf *buf;
3724 int parent = (rxq == &priv->rxq_parent);
3726 (void)conf; /* Thresholds configuration (ignored). */
3728 * If this is a parent queue, hardware must support RSS and
3729 * RSS must be enabled.
3731 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3733 /* Even if unused, ibv_create_cq() requires at least one
3738 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3739 ERROR("%p: invalid number of RX descriptors (must be a"
3740 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3743 /* Get mbuf length. */
3744 buf = rte_pktmbuf_alloc(mp);
3746 ERROR("%p: unable to allocate mbuf", (void *)dev);
3749 tmpl.mb_len = buf->buf_len;
3750 assert((rte_pktmbuf_headroom(buf) +
3751 rte_pktmbuf_tailroom(buf)) == tmpl.mb_len);
3752 assert(rte_pktmbuf_headroom(buf) == RTE_PKTMBUF_HEADROOM);
3753 rte_pktmbuf_free(buf);
3754 /* Toggle RX checksum offload if hardware supports it. */
3756 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3757 if (priv->hw_csum_l2tun)
3758 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3759 /* Enable scattered packets support for this queue if necessary. */
3760 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3761 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3762 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3764 desc /= MLX4_PMD_SGE_WR_N;
3766 DEBUG("%p: %s scattered packets support (%u WRs)",
3767 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3768 /* Use the entire RX mempool as the memory region. */
3769 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3770 if (tmpl.mr == NULL) {
3772 ERROR("%p: MR creation failure: %s",
3773 (void *)dev, strerror(ret));
3777 attr.rd = (struct ibv_exp_res_domain_init_attr){
3778 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3779 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3780 .thread_model = IBV_EXP_THREAD_SINGLE,
3781 .msg_model = IBV_EXP_MSG_HIGH_BW,
3783 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3784 if (tmpl.rd == NULL) {
3786 ERROR("%p: RD creation failure: %s",
3787 (void *)dev, strerror(ret));
3790 attr.cq = (struct ibv_exp_cq_init_attr){
3791 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3792 .res_domain = tmpl.rd,
3794 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3795 if (tmpl.cq == NULL) {
3797 ERROR("%p: CQ creation failure: %s",
3798 (void *)dev, strerror(ret));
3801 DEBUG("priv->device_attr.max_qp_wr is %d",
3802 priv->device_attr.max_qp_wr);
3803 DEBUG("priv->device_attr.max_sge is %d",
3804 priv->device_attr.max_sge);
3806 if (priv->rss && !inactive)
3807 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3810 #endif /* RSS_SUPPORT */
3811 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3812 if (tmpl.qp == NULL) {
3813 ret = (errno ? errno : EINVAL);
3814 ERROR("%p: QP creation failure: %s",
3815 (void *)dev, strerror(ret));
3818 mod = (struct ibv_exp_qp_attr){
3819 /* Move the QP to this state. */
3820 .qp_state = IBV_QPS_INIT,
3821 /* Primary port number. */
3822 .port_num = priv->port
3824 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3827 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3828 #endif /* RSS_SUPPORT */
3831 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3832 (void *)dev, strerror(ret));
3835 if ((parent) || (!priv->rss)) {
3836 /* Configure MAC and broadcast addresses. */
3837 ret = rxq_mac_addrs_add(&tmpl);
3839 ERROR("%p: QP flow attachment failed: %s",
3840 (void *)dev, strerror(ret));
3844 /* Allocate descriptors for RX queues, except for the RSS parent. */
3848 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3850 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3852 ERROR("%p: RXQ allocation failed: %s",
3853 (void *)dev, strerror(ret));
3856 ret = ibv_post_recv(tmpl.qp,
3858 &(*tmpl.elts.sp)[0].wr :
3859 &(*tmpl.elts.no_sp)[0].wr),
3862 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3869 mod = (struct ibv_exp_qp_attr){
3870 .qp_state = IBV_QPS_RTR
3872 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3874 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3875 (void *)dev, strerror(ret));
3879 tmpl.port_id = dev->data->port_id;
3880 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3881 attr.params = (struct ibv_exp_query_intf_params){
3882 .intf_scope = IBV_EXP_INTF_GLOBAL,
3883 .intf = IBV_EXP_INTF_CQ,
3886 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3887 if (tmpl.if_cq == NULL) {
3888 ERROR("%p: CQ interface family query failed with status %d",
3889 (void *)dev, status);
3892 attr.params = (struct ibv_exp_query_intf_params){
3893 .intf_scope = IBV_EXP_INTF_GLOBAL,
3894 .intf = IBV_EXP_INTF_QP_BURST,
3897 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3898 if (tmpl.if_qp == NULL) {
3899 ERROR("%p: QP interface family query failed with status %d",
3900 (void *)dev, status);
3903 /* Clean up rxq in case we're reinitializing it. */
3904 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3907 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3917 * DPDK callback to configure a RX queue.
3920 * Pointer to Ethernet device structure.
3924 * Number of descriptors to configure in queue.
3926 * NUMA socket on which memory must be allocated.
3928 * Thresholds parameters.
3930 * Memory pool for buffer allocations.
3933 * 0 on success, negative errno value on failure.
3936 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3937 unsigned int socket, const struct rte_eth_rxconf *conf,
3938 struct rte_mempool *mp)
3940 struct priv *priv = dev->data->dev_private;
3941 struct rxq *rxq = (*priv->rxqs)[idx];
3945 if (mlx4_is_secondary())
3946 return -E_RTE_SECONDARY;
3948 DEBUG("%p: configuring queue %u for %u descriptors",
3949 (void *)dev, idx, desc);
3950 if (idx >= priv->rxqs_n) {
3951 ERROR("%p: queue index out of range (%u >= %u)",
3952 (void *)dev, idx, priv->rxqs_n);
3957 DEBUG("%p: reusing already allocated queue index %u (%p)",
3958 (void *)dev, idx, (void *)rxq);
3959 if (priv->started) {
3963 (*priv->rxqs)[idx] = NULL;
3966 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3968 ERROR("%p: unable to allocate queue index %u",
3974 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
3976 ret = rxq_setup(dev, rxq, desc, socket, inactive, conf, mp);
3980 rxq->stats.idx = idx;
3981 DEBUG("%p: adding RX queue %p to list",
3982 (void *)dev, (void *)rxq);
3983 (*priv->rxqs)[idx] = rxq;
3984 /* Update receive callback. */
3986 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3988 dev->rx_pkt_burst = mlx4_rx_burst;
3995 * DPDK callback to release a RX queue.
3998 * Generic RX queue pointer.
4001 mlx4_rx_queue_release(void *dpdk_rxq)
4003 struct rxq *rxq = (struct rxq *)dpdk_rxq;
4007 if (mlx4_is_secondary())
4013 assert(rxq != &priv->rxq_parent);
4014 for (i = 0; (i != priv->rxqs_n); ++i)
4015 if ((*priv->rxqs)[i] == rxq) {
4016 DEBUG("%p: removing RX queue %p from list",
4017 (void *)priv->dev, (void *)rxq);
4018 (*priv->rxqs)[i] = NULL;
4027 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4030 * DPDK callback to start the device.
4032 * Simulate device start by attaching all configured flows.
4035 * Pointer to Ethernet device structure.
4038 * 0 on success, negative errno value on failure.
4041 mlx4_dev_start(struct rte_eth_dev *dev)
4043 struct priv *priv = dev->data->dev_private;
4048 if (mlx4_is_secondary())
4049 return -E_RTE_SECONDARY;
4051 if (priv->started) {
4055 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4058 rxq = &priv->rxq_parent;
4061 rxq = (*priv->rxqs)[0];
4064 /* Iterate only once when RSS is enabled. */
4068 /* Ignore nonexistent RX queues. */
4071 ret = rxq_mac_addrs_add(rxq);
4072 if (!ret && priv->promisc)
4073 ret = rxq_promiscuous_enable(rxq);
4074 if (!ret && priv->allmulti)
4075 ret = rxq_allmulticast_enable(rxq);
4078 WARN("%p: QP flow attachment failed: %s",
4079 (void *)dev, strerror(ret));
4082 rxq = (*priv->rxqs)[--i];
4084 rxq_allmulticast_disable(rxq);
4085 rxq_promiscuous_disable(rxq);
4086 rxq_mac_addrs_del(rxq);
4092 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4093 priv_dev_interrupt_handler_install(priv, dev);
4099 * DPDK callback to stop the device.
4101 * Simulate device stop by detaching all configured flows.
4104 * Pointer to Ethernet device structure.
4107 mlx4_dev_stop(struct rte_eth_dev *dev)
4109 struct priv *priv = dev->data->dev_private;
4114 if (mlx4_is_secondary())
4117 if (!priv->started) {
4121 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4124 rxq = &priv->rxq_parent;
4127 rxq = (*priv->rxqs)[0];
4130 /* Iterate only once when RSS is enabled. */
4132 /* Ignore nonexistent RX queues. */
4135 rxq_allmulticast_disable(rxq);
4136 rxq_promiscuous_disable(rxq);
4137 rxq_mac_addrs_del(rxq);
4138 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4143 * Dummy DPDK callback for TX.
4145 * This function is used to temporarily replace the real callback during
4146 * unsafe control operations on the queue, or in case of error.
4149 * Generic pointer to TX queue structure.
4151 * Packets to transmit.
4153 * Number of packets in array.
4156 * Number of packets successfully transmitted (<= pkts_n).
4159 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4168 * Dummy DPDK callback for RX.
4170 * This function is used to temporarily replace the real callback during
4171 * unsafe control operations on the queue, or in case of error.
4174 * Generic pointer to RX queue structure.
4176 * Array to store received packets.
4178 * Maximum number of packets in array.
4181 * Number of packets successfully received (<= pkts_n).
4184 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4193 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4196 * DPDK callback to close the device.
4198 * Destroy all queues and objects, free memory.
4201 * Pointer to Ethernet device structure.
4204 mlx4_dev_close(struct rte_eth_dev *dev)
4206 struct priv *priv = mlx4_get_priv(dev);
4213 DEBUG("%p: closing device \"%s\"",
4215 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4216 /* Prevent crashes when queues are still in use. This is unfortunately
4217 * still required for DPDK 1.3 because some programs (such as testpmd)
4218 * never release them before closing the device. */
4219 dev->rx_pkt_burst = removed_rx_burst;
4220 dev->tx_pkt_burst = removed_tx_burst;
4221 if (priv->rxqs != NULL) {
4222 /* XXX race condition if mlx4_rx_burst() is still running. */
4224 for (i = 0; (i != priv->rxqs_n); ++i) {
4225 tmp = (*priv->rxqs)[i];
4228 (*priv->rxqs)[i] = NULL;
4235 if (priv->txqs != NULL) {
4236 /* XXX race condition if mlx4_tx_burst() is still running. */
4238 for (i = 0; (i != priv->txqs_n); ++i) {
4239 tmp = (*priv->txqs)[i];
4242 (*priv->txqs)[i] = NULL;
4250 rxq_cleanup(&priv->rxq_parent);
4251 if (priv->pd != NULL) {
4252 assert(priv->ctx != NULL);
4253 claim_zero(ibv_dealloc_pd(priv->pd));
4254 claim_zero(ibv_close_device(priv->ctx));
4256 assert(priv->ctx == NULL);
4257 priv_dev_interrupt_handler_uninstall(priv, dev);
4259 memset(priv, 0, sizeof(*priv));
4263 * DPDK callback to get information about the device.
4266 * Pointer to Ethernet device structure.
4268 * Info structure output buffer.
4271 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4273 struct priv *priv = mlx4_get_priv(dev);
4275 char ifname[IF_NAMESIZE];
4280 /* FIXME: we should ask the device for these values. */
4281 info->min_rx_bufsize = 32;
4282 info->max_rx_pktlen = 65536;
4284 * Since we need one CQ per QP, the limit is the minimum number
4285 * between the two values.
4287 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4288 priv->device_attr.max_qp : priv->device_attr.max_cq);
4289 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4292 info->max_rx_queues = max;
4293 info->max_tx_queues = max;
4294 /* Last array entry is reserved for broadcast. */
4295 info->max_mac_addrs = (elemof(priv->mac) - 1);
4296 info->rx_offload_capa =
4298 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4299 DEV_RX_OFFLOAD_UDP_CKSUM |
4300 DEV_RX_OFFLOAD_TCP_CKSUM) :
4302 info->tx_offload_capa =
4304 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4305 DEV_TX_OFFLOAD_UDP_CKSUM |
4306 DEV_TX_OFFLOAD_TCP_CKSUM) :
4308 if (priv_get_ifname(priv, &ifname) == 0)
4309 info->if_index = if_nametoindex(ifname);
4312 ETH_LINK_SPEED_10G |
4313 ETH_LINK_SPEED_20G |
4314 ETH_LINK_SPEED_40G |
4319 static const uint32_t *
4320 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4322 static const uint32_t ptypes[] = {
4323 /* refers to rxq_cq_to_pkt_type() */
4326 RTE_PTYPE_INNER_L3_IPV4,
4327 RTE_PTYPE_INNER_L3_IPV6,
4331 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4332 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4338 * DPDK callback to get device statistics.
4341 * Pointer to Ethernet device structure.
4343 * Stats structure output buffer.
4346 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4348 struct priv *priv = mlx4_get_priv(dev);
4349 struct rte_eth_stats tmp = {0};
4356 /* Add software counters. */
4357 for (i = 0; (i != priv->rxqs_n); ++i) {
4358 struct rxq *rxq = (*priv->rxqs)[i];
4362 idx = rxq->stats.idx;
4363 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4364 #ifdef MLX4_PMD_SOFT_COUNTERS
4365 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4366 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4368 tmp.q_errors[idx] += (rxq->stats.idropped +
4369 rxq->stats.rx_nombuf);
4371 #ifdef MLX4_PMD_SOFT_COUNTERS
4372 tmp.ipackets += rxq->stats.ipackets;
4373 tmp.ibytes += rxq->stats.ibytes;
4375 tmp.ierrors += rxq->stats.idropped;
4376 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4378 for (i = 0; (i != priv->txqs_n); ++i) {
4379 struct txq *txq = (*priv->txqs)[i];
4383 idx = txq->stats.idx;
4384 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4385 #ifdef MLX4_PMD_SOFT_COUNTERS
4386 tmp.q_opackets[idx] += txq->stats.opackets;
4387 tmp.q_obytes[idx] += txq->stats.obytes;
4389 tmp.q_errors[idx] += txq->stats.odropped;
4391 #ifdef MLX4_PMD_SOFT_COUNTERS
4392 tmp.opackets += txq->stats.opackets;
4393 tmp.obytes += txq->stats.obytes;
4395 tmp.oerrors += txq->stats.odropped;
4397 #ifndef MLX4_PMD_SOFT_COUNTERS
4398 /* FIXME: retrieve and add hardware counters. */
4405 * DPDK callback to clear device statistics.
4408 * Pointer to Ethernet device structure.
4411 mlx4_stats_reset(struct rte_eth_dev *dev)
4413 struct priv *priv = mlx4_get_priv(dev);
4420 for (i = 0; (i != priv->rxqs_n); ++i) {
4421 if ((*priv->rxqs)[i] == NULL)
4423 idx = (*priv->rxqs)[i]->stats.idx;
4424 (*priv->rxqs)[i]->stats =
4425 (struct mlx4_rxq_stats){ .idx = idx };
4427 for (i = 0; (i != priv->txqs_n); ++i) {
4428 if ((*priv->txqs)[i] == NULL)
4430 idx = (*priv->txqs)[i]->stats.idx;
4431 (*priv->txqs)[i]->stats =
4432 (struct mlx4_txq_stats){ .idx = idx };
4434 #ifndef MLX4_PMD_SOFT_COUNTERS
4435 /* FIXME: reset hardware counters. */
4441 * DPDK callback to remove a MAC address.
4444 * Pointer to Ethernet device structure.
4446 * MAC address index.
4449 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4451 struct priv *priv = dev->data->dev_private;
4453 if (mlx4_is_secondary())
4456 DEBUG("%p: removing MAC address from index %" PRIu32,
4457 (void *)dev, index);
4458 /* Last array entry is reserved for broadcast. */
4459 if (index >= (elemof(priv->mac) - 1))
4461 priv_mac_addr_del(priv, index);
4467 * DPDK callback to add a MAC address.
4470 * Pointer to Ethernet device structure.
4472 * MAC address to register.
4474 * MAC address index.
4476 * VMDq pool index to associate address with (ignored).
4479 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4480 uint32_t index, uint32_t vmdq)
4482 struct priv *priv = dev->data->dev_private;
4484 if (mlx4_is_secondary())
4488 DEBUG("%p: adding MAC address at index %" PRIu32,
4489 (void *)dev, index);
4490 /* Last array entry is reserved for broadcast. */
4491 if (index >= (elemof(priv->mac) - 1))
4493 priv_mac_addr_add(priv, index,
4494 (const uint8_t (*)[ETHER_ADDR_LEN])
4495 mac_addr->addr_bytes);
4501 * DPDK callback to set the primary MAC address.
4504 * Pointer to Ethernet device structure.
4506 * MAC address to register.
4509 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4511 DEBUG("%p: setting primary MAC address", (void *)dev);
4512 mlx4_mac_addr_remove(dev, 0);
4513 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4517 * DPDK callback to enable promiscuous mode.
4520 * Pointer to Ethernet device structure.
4523 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4525 struct priv *priv = dev->data->dev_private;
4529 if (mlx4_is_secondary())
4532 if (priv->promisc) {
4536 /* If device isn't started, this is all we need to do. */
4540 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4547 for (i = 0; (i != priv->rxqs_n); ++i) {
4548 if ((*priv->rxqs)[i] == NULL)
4550 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4553 /* Failure, rollback. */
4555 if ((*priv->rxqs)[--i] != NULL)
4556 rxq_promiscuous_disable((*priv->rxqs)[i]);
4566 * DPDK callback to disable promiscuous mode.
4569 * Pointer to Ethernet device structure.
4572 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4574 struct priv *priv = dev->data->dev_private;
4577 if (mlx4_is_secondary())
4580 if (!priv->promisc) {
4585 rxq_promiscuous_disable(&priv->rxq_parent);
4588 for (i = 0; (i != priv->rxqs_n); ++i)
4589 if ((*priv->rxqs)[i] != NULL)
4590 rxq_promiscuous_disable((*priv->rxqs)[i]);
4597 * DPDK callback to enable allmulti mode.
4600 * Pointer to Ethernet device structure.
4603 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4605 struct priv *priv = dev->data->dev_private;
4609 if (mlx4_is_secondary())
4612 if (priv->allmulti) {
4616 /* If device isn't started, this is all we need to do. */
4620 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4627 for (i = 0; (i != priv->rxqs_n); ++i) {
4628 if ((*priv->rxqs)[i] == NULL)
4630 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4633 /* Failure, rollback. */
4635 if ((*priv->rxqs)[--i] != NULL)
4636 rxq_allmulticast_disable((*priv->rxqs)[i]);
4646 * DPDK callback to disable allmulti mode.
4649 * Pointer to Ethernet device structure.
4652 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4654 struct priv *priv = dev->data->dev_private;
4657 if (mlx4_is_secondary())
4660 if (!priv->allmulti) {
4665 rxq_allmulticast_disable(&priv->rxq_parent);
4668 for (i = 0; (i != priv->rxqs_n); ++i)
4669 if ((*priv->rxqs)[i] != NULL)
4670 rxq_allmulticast_disable((*priv->rxqs)[i]);
4677 * DPDK callback to retrieve physical link information (unlocked version).
4680 * Pointer to Ethernet device structure.
4681 * @param wait_to_complete
4682 * Wait for request completion (ignored).
4685 mlx4_link_update_unlocked(struct rte_eth_dev *dev, int wait_to_complete)
4687 struct priv *priv = mlx4_get_priv(dev);
4688 struct ethtool_cmd edata = {
4692 struct rte_eth_link dev_link;
4697 (void)wait_to_complete;
4698 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4699 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4702 memset(&dev_link, 0, sizeof(dev_link));
4703 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4704 (ifr.ifr_flags & IFF_RUNNING));
4705 ifr.ifr_data = &edata;
4706 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4707 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4711 link_speed = ethtool_cmd_speed(&edata);
4712 if (link_speed == -1)
4713 dev_link.link_speed = 0;
4715 dev_link.link_speed = link_speed;
4716 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4717 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4718 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4719 ETH_LINK_SPEED_FIXED);
4720 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4721 /* Link status changed. */
4722 dev->data->dev_link = dev_link;
4725 /* Link status is still the same. */
4730 * DPDK callback to retrieve physical link information.
4733 * Pointer to Ethernet device structure.
4734 * @param wait_to_complete
4735 * Wait for request completion (ignored).
4738 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4740 struct priv *priv = mlx4_get_priv(dev);
4746 ret = mlx4_link_update_unlocked(dev, wait_to_complete);
4752 * DPDK callback to change the MTU.
4754 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4755 * received). Use this as a hint to enable/disable scattered packets support
4756 * and improve performance when not needed.
4757 * Since failure is not an option, reconfiguring queues on the fly is not
4761 * Pointer to Ethernet device structure.
4766 * 0 on success, negative errno value on failure.
4769 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4771 struct priv *priv = dev->data->dev_private;
4774 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4777 if (mlx4_is_secondary())
4778 return -E_RTE_SECONDARY;
4780 /* Set kernel interface MTU first. */
4781 if (priv_set_mtu(priv, mtu)) {
4783 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4787 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4789 /* Temporarily replace RX handler with a fake one, assuming it has not
4790 * been copied elsewhere. */
4791 dev->rx_pkt_burst = removed_rx_burst;
4792 /* Make sure everyone has left mlx4_rx_burst() and uses
4793 * removed_rx_burst() instead. */
4796 /* Reconfigure each RX queue. */
4797 for (i = 0; (i != priv->rxqs_n); ++i) {
4798 struct rxq *rxq = (*priv->rxqs)[i];
4799 unsigned int max_frame_len;
4804 /* Calculate new maximum frame length according to MTU and
4805 * toggle scattered support (sp) if necessary. */
4806 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4807 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4808 sp = (max_frame_len > (rxq->mb_len - RTE_PKTMBUF_HEADROOM));
4809 /* Provide new values to rxq_setup(). */
4810 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4811 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4812 ret = rxq_rehash(dev, rxq);
4814 /* Force SP RX if that queue requires it and abort. */
4816 rx_func = mlx4_rx_burst_sp;
4819 /* Reenable non-RSS queue attributes. No need to check
4820 * for errors at this stage. */
4822 rxq_mac_addrs_add(rxq);
4824 rxq_promiscuous_enable(rxq);
4826 rxq_allmulticast_enable(rxq);
4828 /* Scattered burst function takes priority. */
4830 rx_func = mlx4_rx_burst_sp;
4832 /* Burst functions can now be called again. */
4834 dev->rx_pkt_burst = rx_func;
4842 * DPDK callback to get flow control status.
4845 * Pointer to Ethernet device structure.
4846 * @param[out] fc_conf
4847 * Flow control output buffer.
4850 * 0 on success, negative errno value on failure.
4853 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4855 struct priv *priv = dev->data->dev_private;
4857 struct ethtool_pauseparam ethpause = {
4858 .cmd = ETHTOOL_GPAUSEPARAM
4862 if (mlx4_is_secondary())
4863 return -E_RTE_SECONDARY;
4864 ifr.ifr_data = ðpause;
4866 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4868 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4874 fc_conf->autoneg = ethpause.autoneg;
4875 if (ethpause.rx_pause && ethpause.tx_pause)
4876 fc_conf->mode = RTE_FC_FULL;
4877 else if (ethpause.rx_pause)
4878 fc_conf->mode = RTE_FC_RX_PAUSE;
4879 else if (ethpause.tx_pause)
4880 fc_conf->mode = RTE_FC_TX_PAUSE;
4882 fc_conf->mode = RTE_FC_NONE;
4892 * DPDK callback to modify flow control parameters.
4895 * Pointer to Ethernet device structure.
4896 * @param[in] fc_conf
4897 * Flow control parameters.
4900 * 0 on success, negative errno value on failure.
4903 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4905 struct priv *priv = dev->data->dev_private;
4907 struct ethtool_pauseparam ethpause = {
4908 .cmd = ETHTOOL_SPAUSEPARAM
4912 if (mlx4_is_secondary())
4913 return -E_RTE_SECONDARY;
4914 ifr.ifr_data = ðpause;
4915 ethpause.autoneg = fc_conf->autoneg;
4916 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4917 (fc_conf->mode & RTE_FC_RX_PAUSE))
4918 ethpause.rx_pause = 1;
4920 ethpause.rx_pause = 0;
4922 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4923 (fc_conf->mode & RTE_FC_TX_PAUSE))
4924 ethpause.tx_pause = 1;
4926 ethpause.tx_pause = 0;
4929 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4931 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4945 * Configure a VLAN filter.
4948 * Pointer to Ethernet device structure.
4950 * VLAN ID to filter.
4955 * 0 on success, errno value on failure.
4958 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4960 struct priv *priv = dev->data->dev_private;
4962 unsigned int j = -1;
4964 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4965 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4966 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4967 if (!priv->vlan_filter[i].enabled) {
4968 /* Unused index, remember it. */
4972 if (priv->vlan_filter[i].id != vlan_id)
4974 /* This VLAN ID is already known, use its index. */
4978 /* Check if there's room for another VLAN filter. */
4979 if (j == (unsigned int)-1)
4982 * VLAN filters apply to all configured MAC addresses, flow
4983 * specifications must be reconfigured accordingly.
4985 priv->vlan_filter[j].id = vlan_id;
4986 if ((on) && (!priv->vlan_filter[j].enabled)) {
4988 * Filter is disabled, enable it.
4989 * Rehashing flows in all RX queues is necessary.
4992 rxq_mac_addrs_del(&priv->rxq_parent);
4994 for (i = 0; (i != priv->rxqs_n); ++i)
4995 if ((*priv->rxqs)[i] != NULL)
4996 rxq_mac_addrs_del((*priv->rxqs)[i]);
4997 priv->vlan_filter[j].enabled = 1;
4998 if (priv->started) {
5000 rxq_mac_addrs_add(&priv->rxq_parent);
5002 for (i = 0; (i != priv->rxqs_n); ++i) {
5003 if ((*priv->rxqs)[i] == NULL)
5005 rxq_mac_addrs_add((*priv->rxqs)[i]);
5008 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
5010 * Filter is enabled, disable it.
5011 * Rehashing flows in all RX queues is necessary.
5014 rxq_mac_addrs_del(&priv->rxq_parent);
5016 for (i = 0; (i != priv->rxqs_n); ++i)
5017 if ((*priv->rxqs)[i] != NULL)
5018 rxq_mac_addrs_del((*priv->rxqs)[i]);
5019 priv->vlan_filter[j].enabled = 0;
5020 if (priv->started) {
5022 rxq_mac_addrs_add(&priv->rxq_parent);
5024 for (i = 0; (i != priv->rxqs_n); ++i) {
5025 if ((*priv->rxqs)[i] == NULL)
5027 rxq_mac_addrs_add((*priv->rxqs)[i]);
5035 * DPDK callback to configure a VLAN filter.
5038 * Pointer to Ethernet device structure.
5040 * VLAN ID to filter.
5045 * 0 on success, negative errno value on failure.
5048 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5050 struct priv *priv = dev->data->dev_private;
5053 if (mlx4_is_secondary())
5054 return -E_RTE_SECONDARY;
5056 ret = vlan_filter_set(dev, vlan_id, on);
5062 static const struct eth_dev_ops mlx4_dev_ops = {
5063 .dev_configure = mlx4_dev_configure,
5064 .dev_start = mlx4_dev_start,
5065 .dev_stop = mlx4_dev_stop,
5066 .dev_close = mlx4_dev_close,
5067 .promiscuous_enable = mlx4_promiscuous_enable,
5068 .promiscuous_disable = mlx4_promiscuous_disable,
5069 .allmulticast_enable = mlx4_allmulticast_enable,
5070 .allmulticast_disable = mlx4_allmulticast_disable,
5071 .link_update = mlx4_link_update,
5072 .stats_get = mlx4_stats_get,
5073 .stats_reset = mlx4_stats_reset,
5074 .queue_stats_mapping_set = NULL,
5075 .dev_infos_get = mlx4_dev_infos_get,
5076 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5077 .vlan_filter_set = mlx4_vlan_filter_set,
5078 .vlan_tpid_set = NULL,
5079 .vlan_strip_queue_set = NULL,
5080 .vlan_offload_set = NULL,
5081 .rx_queue_setup = mlx4_rx_queue_setup,
5082 .tx_queue_setup = mlx4_tx_queue_setup,
5083 .rx_queue_release = mlx4_rx_queue_release,
5084 .tx_queue_release = mlx4_tx_queue_release,
5086 .dev_led_off = NULL,
5087 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5088 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5089 .priority_flow_ctrl_set = NULL,
5090 .mac_addr_remove = mlx4_mac_addr_remove,
5091 .mac_addr_add = mlx4_mac_addr_add,
5092 .mac_addr_set = mlx4_mac_addr_set,
5093 .mtu_set = mlx4_dev_set_mtu,
5097 * Get PCI information from struct ibv_device.
5100 * Pointer to Ethernet device structure.
5101 * @param[out] pci_addr
5102 * PCI bus address output buffer.
5105 * 0 on success, -1 on failure and errno is set.
5108 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5109 struct rte_pci_addr *pci_addr)
5113 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5115 file = fopen(path, "rb");
5118 while (fgets(line, sizeof(line), file) == line) {
5119 size_t len = strlen(line);
5122 /* Truncate long lines. */
5123 if (len == (sizeof(line) - 1))
5124 while (line[(len - 1)] != '\n') {
5128 line[(len - 1)] = ret;
5130 /* Extract information. */
5133 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5137 &pci_addr->function) == 4) {
5147 * Get MAC address by querying netdevice.
5150 * struct priv for the requested device.
5152 * MAC address output buffer.
5155 * 0 on success, -1 on failure and errno is set.
5158 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5160 struct ifreq request;
5162 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5164 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5168 /* Support up to 32 adapters. */
5170 struct rte_pci_addr pci_addr; /* associated PCI address */
5171 uint32_t ports; /* physical ports bitfield. */
5175 * Get device index in mlx4_dev[] from PCI bus address.
5177 * @param[in] pci_addr
5178 * PCI bus address to look for.
5181 * mlx4_dev[] index on success, -1 on failure.
5184 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5189 assert(pci_addr != NULL);
5190 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5191 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5192 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5193 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5194 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5196 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5203 * Retrieve integer value from environment variable.
5206 * Environment variable name.
5209 * Integer value, 0 if the variable is not set.
5212 mlx4_getenv_int(const char *name)
5214 const char *val = getenv(name);
5222 mlx4_dev_link_status_handler(void *);
5224 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5227 * Link status handler.
5230 * Pointer to private structure.
5232 * Pointer to the rte_eth_dev structure.
5235 * Nonzero if the callback process can be called immediately.
5238 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5240 struct ibv_async_event event;
5241 int port_change = 0;
5244 /* Read all message and acknowledge them. */
5246 if (ibv_get_async_event(priv->ctx, &event))
5249 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5250 event.event_type == IBV_EVENT_PORT_ERR)
5253 DEBUG("event type %d on port %d not handled",
5254 event.event_type, event.element.port_num);
5255 ibv_ack_async_event(&event);
5258 if (port_change ^ priv->pending_alarm) {
5259 struct rte_eth_link *link = &dev->data->dev_link;
5261 priv->pending_alarm = 0;
5262 mlx4_link_update_unlocked(dev, 0);
5263 if (((link->link_speed == 0) && link->link_status) ||
5264 ((link->link_speed != 0) && !link->link_status)) {
5265 /* Inconsistent status, check again later. */
5266 priv->pending_alarm = 1;
5267 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5268 mlx4_dev_link_status_handler,
5277 * Handle delayed link status event.
5280 * Registered argument.
5283 mlx4_dev_link_status_handler(void *arg)
5285 struct rte_eth_dev *dev = arg;
5286 struct priv *priv = dev->data->dev_private;
5290 assert(priv->pending_alarm == 1);
5291 ret = priv_dev_link_status_handler(priv, dev);
5294 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5298 * Handle interrupts from the NIC.
5300 * @param[in] intr_handle
5301 * Interrupt handler.
5303 * Callback argument.
5306 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5308 struct rte_eth_dev *dev = cb_arg;
5309 struct priv *priv = dev->data->dev_private;
5314 ret = priv_dev_link_status_handler(priv, dev);
5317 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5321 * Uninstall interrupt handler.
5324 * Pointer to private structure.
5326 * Pointer to the rte_eth_dev structure.
5329 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5331 if (!dev->data->dev_conf.intr_conf.lsc)
5333 rte_intr_callback_unregister(&priv->intr_handle,
5334 mlx4_dev_interrupt_handler,
5336 if (priv->pending_alarm)
5337 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5338 priv->pending_alarm = 0;
5339 priv->intr_handle.fd = 0;
5340 priv->intr_handle.type = 0;
5344 * Install interrupt handler.
5347 * Pointer to private structure.
5349 * Pointer to the rte_eth_dev structure.
5352 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5356 if (!dev->data->dev_conf.intr_conf.lsc)
5358 assert(priv->ctx->async_fd > 0);
5359 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5360 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5362 INFO("failed to change file descriptor async event queue");
5363 dev->data->dev_conf.intr_conf.lsc = 0;
5365 priv->intr_handle.fd = priv->ctx->async_fd;
5366 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5367 rte_intr_callback_register(&priv->intr_handle,
5368 mlx4_dev_interrupt_handler,
5373 static struct eth_driver mlx4_driver;
5376 * DPDK callback to register a PCI device.
5378 * This function creates an Ethernet device for each port of a given
5381 * @param[in] pci_drv
5382 * PCI driver structure (mlx4_driver).
5383 * @param[in] pci_dev
5384 * PCI device information.
5387 * 0 on success, negative errno value on failure.
5390 mlx4_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5392 struct ibv_device **list;
5393 struct ibv_device *ibv_dev;
5395 struct ibv_context *attr_ctx = NULL;
5396 struct ibv_device_attr device_attr;
5402 assert(pci_drv == &mlx4_driver.pci_drv);
5403 /* Get mlx4_dev[] index. */
5404 idx = mlx4_dev_idx(&pci_dev->addr);
5406 ERROR("this driver cannot support any more adapters");
5409 DEBUG("using driver device index %d", idx);
5411 /* Save PCI address. */
5412 mlx4_dev[idx].pci_addr = pci_dev->addr;
5413 list = ibv_get_device_list(&i);
5416 if (errno == ENOSYS) {
5417 WARN("cannot list devices, is ib_uverbs loaded?");
5424 * For each listed device, check related sysfs entry against
5425 * the provided PCI ID.
5428 struct rte_pci_addr pci_addr;
5431 DEBUG("checking device \"%s\"", list[i]->name);
5432 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5434 if ((pci_dev->addr.domain != pci_addr.domain) ||
5435 (pci_dev->addr.bus != pci_addr.bus) ||
5436 (pci_dev->addr.devid != pci_addr.devid) ||
5437 (pci_dev->addr.function != pci_addr.function))
5439 vf = (pci_dev->id.device_id ==
5440 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5441 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5442 list[i]->name, (vf ? "true" : "false"));
5443 attr_ctx = ibv_open_device(list[i]);
5447 if (attr_ctx == NULL) {
5448 ibv_free_device_list(list);
5451 WARN("cannot access device, is mlx4_ib loaded?");
5454 WARN("cannot use device, are drivers up to date?");
5462 DEBUG("device opened");
5463 if (ibv_query_device(attr_ctx, &device_attr))
5465 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5467 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5468 uint32_t port = i + 1; /* ports are indexed from one */
5469 uint32_t test = (1 << i);
5470 struct ibv_context *ctx = NULL;
5471 struct ibv_port_attr port_attr;
5472 struct ibv_pd *pd = NULL;
5473 struct priv *priv = NULL;
5474 struct rte_eth_dev *eth_dev = NULL;
5475 #ifdef HAVE_EXP_QUERY_DEVICE
5476 struct ibv_exp_device_attr exp_device_attr;
5477 #endif /* HAVE_EXP_QUERY_DEVICE */
5478 struct ether_addr mac;
5480 #ifdef HAVE_EXP_QUERY_DEVICE
5481 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5483 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5484 #endif /* RSS_SUPPORT */
5485 #endif /* HAVE_EXP_QUERY_DEVICE */
5487 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5489 ctx = ibv_open_device(ibv_dev);
5493 /* Check port status. */
5494 err = ibv_query_port(ctx, port, &port_attr);
5496 ERROR("port query failed: %s", strerror(err));
5500 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5501 ERROR("port %d is not configured in Ethernet mode",
5506 if (port_attr.state != IBV_PORT_ACTIVE)
5507 DEBUG("port %d is not active: \"%s\" (%d)",
5508 port, ibv_port_state_str(port_attr.state),
5511 /* Allocate protection domain. */
5512 pd = ibv_alloc_pd(ctx);
5514 ERROR("PD allocation failure");
5519 mlx4_dev[idx].ports |= test;
5521 /* from rte_ethdev.c */
5522 priv = rte_zmalloc("ethdev private structure",
5524 RTE_CACHE_LINE_SIZE);
5526 ERROR("priv allocation failure");
5532 priv->device_attr = device_attr;
5535 priv->mtu = ETHER_MTU;
5536 #ifdef HAVE_EXP_QUERY_DEVICE
5537 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5538 ERROR("ibv_exp_query_device() failed");
5542 if ((exp_device_attr.exp_device_cap_flags &
5543 IBV_EXP_DEVICE_QPG) &&
5544 (exp_device_attr.exp_device_cap_flags &
5545 IBV_EXP_DEVICE_UD_RSS) &&
5546 (exp_device_attr.comp_mask &
5547 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5548 (exp_device_attr.max_rss_tbl_sz > 0)) {
5551 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5555 priv->max_rss_tbl_sz = 0;
5557 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5558 IBV_EXP_DEVICE_UD_TSS);
5559 DEBUG("device flags: %s%s%s",
5560 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5561 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5562 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5564 DEBUG("maximum RSS indirection table size: %u",
5565 exp_device_attr.max_rss_tbl_sz);
5566 #endif /* RSS_SUPPORT */
5569 ((exp_device_attr.exp_device_cap_flags &
5570 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5571 (exp_device_attr.exp_device_cap_flags &
5572 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5573 DEBUG("checksum offloading is %ssupported",
5574 (priv->hw_csum ? "" : "not "));
5576 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5577 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5578 DEBUG("L2 tunnel checksum offloads are %ssupported",
5579 (priv->hw_csum_l2tun ? "" : "not "));
5582 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5584 if (priv->inl_recv_size) {
5585 exp_device_attr.comp_mask =
5586 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5587 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5588 INFO("Couldn't query device for inline-receive"
5590 priv->inl_recv_size = 0;
5592 if ((unsigned)exp_device_attr.inline_recv_sz <
5593 priv->inl_recv_size) {
5594 INFO("Max inline-receive (%d) <"
5595 " requested inline-receive (%u)",
5596 exp_device_attr.inline_recv_sz,
5597 priv->inl_recv_size);
5598 priv->inl_recv_size =
5599 exp_device_attr.inline_recv_sz;
5602 INFO("Set inline receive size to %u",
5603 priv->inl_recv_size);
5605 #endif /* INLINE_RECV */
5606 #endif /* HAVE_EXP_QUERY_DEVICE */
5608 (void)mlx4_getenv_int;
5610 /* Configure the first MAC address by default. */
5611 if (priv_get_mac(priv, &mac.addr_bytes)) {
5612 ERROR("cannot get MAC address, is mlx4_en loaded?"
5613 " (errno: %s)", strerror(errno));
5616 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5618 mac.addr_bytes[0], mac.addr_bytes[1],
5619 mac.addr_bytes[2], mac.addr_bytes[3],
5620 mac.addr_bytes[4], mac.addr_bytes[5]);
5621 /* Register MAC and broadcast addresses. */
5622 claim_zero(priv_mac_addr_add(priv, 0,
5623 (const uint8_t (*)[ETHER_ADDR_LEN])
5625 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5626 &(const uint8_t [ETHER_ADDR_LEN])
5627 { "\xff\xff\xff\xff\xff\xff" }));
5630 char ifname[IF_NAMESIZE];
5632 if (priv_get_ifname(priv, &ifname) == 0)
5633 DEBUG("port %u ifname is \"%s\"",
5634 priv->port, ifname);
5636 DEBUG("port %u ifname is unknown", priv->port);
5639 /* Get actual MTU if possible. */
5640 priv_get_mtu(priv, &priv->mtu);
5641 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5643 /* from rte_ethdev.c */
5645 char name[RTE_ETH_NAME_MAX_LEN];
5647 snprintf(name, sizeof(name), "%s port %u",
5648 ibv_get_device_name(ibv_dev), port);
5649 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
5651 if (eth_dev == NULL) {
5652 ERROR("can not allocate rte ethdev");
5657 /* Secondary processes have to use local storage for their
5658 * private data as well as a copy of eth_dev->data, but this
5659 * pointer must not be modified before burst functions are
5660 * actually called. */
5661 if (mlx4_is_secondary()) {
5662 struct mlx4_secondary_data *sd =
5663 &mlx4_secondary_data[eth_dev->data->port_id];
5665 sd->primary_priv = eth_dev->data->dev_private;
5666 if (sd->primary_priv == NULL) {
5667 ERROR("no private data for port %u",
5668 eth_dev->data->port_id);
5672 sd->shared_dev_data = eth_dev->data;
5673 rte_spinlock_init(&sd->lock);
5674 memcpy(sd->data.name, sd->shared_dev_data->name,
5675 sizeof(sd->data.name));
5676 sd->data.dev_private = priv;
5677 sd->data.rx_mbuf_alloc_failed = 0;
5678 sd->data.mtu = ETHER_MTU;
5679 sd->data.port_id = sd->shared_dev_data->port_id;
5680 sd->data.mac_addrs = priv->mac;
5681 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5682 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5684 eth_dev->data->dev_private = priv;
5685 eth_dev->data->rx_mbuf_alloc_failed = 0;
5686 eth_dev->data->mtu = ETHER_MTU;
5687 eth_dev->data->mac_addrs = priv->mac;
5689 eth_dev->pci_dev = pci_dev;
5691 rte_eth_copy_pci_info(eth_dev, pci_dev);
5693 eth_dev->driver = &mlx4_driver;
5695 priv->dev = eth_dev;
5696 eth_dev->dev_ops = &mlx4_dev_ops;
5697 TAILQ_INIT(ð_dev->link_intr_cbs);
5699 /* Bring Ethernet device up. */
5700 DEBUG("forcing Ethernet interface up");
5701 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5707 claim_zero(ibv_dealloc_pd(pd));
5709 claim_zero(ibv_close_device(ctx));
5711 rte_eth_dev_release_port(eth_dev);
5716 * XXX if something went wrong in the loop above, there is a resource
5717 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5718 * long as the dpdk does not provide a way to deallocate a ethdev and a
5719 * way to enumerate the registered ethdevs to free the previous ones.
5722 /* no port found, complain */
5723 if (!mlx4_dev[idx].ports) {
5730 claim_zero(ibv_close_device(attr_ctx));
5732 ibv_free_device_list(list);
5737 static const struct rte_pci_id mlx4_pci_id_map[] = {
5739 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5740 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3,
5741 .subsystem_vendor_id = PCI_ANY_ID,
5742 .subsystem_device_id = PCI_ANY_ID
5745 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5746 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO,
5747 .subsystem_vendor_id = PCI_ANY_ID,
5748 .subsystem_device_id = PCI_ANY_ID
5751 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5752 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3VF,
5753 .subsystem_vendor_id = PCI_ANY_ID,
5754 .subsystem_device_id = PCI_ANY_ID
5761 static struct eth_driver mlx4_driver = {
5763 .name = MLX4_DRIVER_NAME,
5764 .id_table = mlx4_pci_id_map,
5765 .devinit = mlx4_pci_devinit,
5766 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5768 .dev_private_size = sizeof(struct priv)
5772 * Driver initialization routine.
5775 rte_mlx4_pmd_init(const char *name, const char *args)
5780 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5782 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5783 * huge pages. Calling ibv_fork_init() during init allows
5784 * applications to use fork() safely for purposes other than
5785 * using this PMD, which is not supported in forked processes.
5787 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5789 rte_eal_pci_register(&mlx4_driver.pci_drv);
5793 static struct rte_driver rte_mlx4_driver = {
5795 .name = MLX4_DRIVER_NAME,
5796 .init = rte_mlx4_pmd_init,
5799 PMD_REGISTER_DRIVER(rte_mlx4_driver)