4 * Copyright 2012-2015 6WIND S.A.
5 * Copyright 2012 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
58 #include <linux/ethtool.h>
59 #include <linux/sockios.h>
63 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
65 #pragma GCC diagnostic ignored "-pedantic"
67 #include <infiniband/verbs.h>
69 #pragma GCC diagnostic error "-pedantic"
72 /* DPDK headers don't like -pedantic. */
74 #pragma GCC diagnostic ignored "-pedantic"
76 #include <rte_ether.h>
77 #include <rte_ethdev.h>
80 #include <rte_errno.h>
81 #include <rte_mempool.h>
82 #include <rte_prefetch.h>
83 #include <rte_malloc.h>
84 #include <rte_spinlock.h>
85 #include <rte_atomic.h>
86 #include <rte_version.h>
88 #include <rte_alarm.h>
90 #pragma GCC diagnostic error "-pedantic"
93 /* Generated configuration header. */
94 #include "mlx4_autoconf.h"
99 /* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
100 * Intermediate LOG_*() macros add the required end-of-line characters. */
102 #define INFO(...) DEBUG(__VA_ARGS__)
103 #define WARN(...) DEBUG(__VA_ARGS__)
104 #define ERROR(...) DEBUG(__VA_ARGS__)
106 #define LOG__(level, m, ...) \
107 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
108 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
109 #define INFO(...) LOG_(INFO, __VA_ARGS__)
110 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
111 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
114 /* Convenience macros for accessing mbuf fields. */
115 #define NEXT(m) ((m)->next)
116 #define DATA_LEN(m) ((m)->data_len)
117 #define PKT_LEN(m) ((m)->pkt_len)
118 #define DATA_OFF(m) ((m)->data_off)
119 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
120 #define NB_SEGS(m) ((m)->nb_segs)
121 #define PORT(m) ((m)->port)
123 /* Work Request ID data type (64 bit). */
132 #define WR_ID(o) (((wr_id_t *)&(o))->data)
134 /* Transpose flags. Useful to convert IBV to DPDK flags. */
135 #define TRANSPOSE(val, from, to) \
136 (((from) >= (to)) ? \
137 (((val) & (from)) / ((from) / (to))) : \
138 (((val) & (from)) * ((to) / (from))))
140 struct mlx4_rxq_stats {
141 unsigned int idx; /**< Mapping index. */
142 #ifdef MLX4_PMD_SOFT_COUNTERS
143 uint64_t ipackets; /**< Total of successfully received packets. */
144 uint64_t ibytes; /**< Total of successfully received bytes. */
146 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
147 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
150 struct mlx4_txq_stats {
151 unsigned int idx; /**< Mapping index. */
152 #ifdef MLX4_PMD_SOFT_COUNTERS
153 uint64_t opackets; /**< Total of successfully sent packets. */
154 uint64_t obytes; /**< Total of successfully sent bytes. */
156 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
159 /* RX element (scattered packets). */
161 struct ibv_recv_wr wr; /* Work Request. */
162 struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
163 struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
168 struct ibv_recv_wr wr; /* Work Request. */
169 struct ibv_sge sge; /* Scatter/Gather Element. */
170 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
173 /* RX queue descriptor. */
175 struct priv *priv; /* Back pointer to private data. */
176 struct rte_mempool *mp; /* Memory Pool for allocations. */
177 struct ibv_mr *mr; /* Memory Region (for mp). */
178 struct ibv_cq *cq; /* Completion Queue. */
179 struct ibv_qp *qp; /* Queue Pair. */
180 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
181 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
183 * Each VLAN ID requires a separate flow steering rule.
185 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
186 struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
187 struct ibv_flow *promisc_flow; /* Promiscuous flow. */
188 struct ibv_flow *allmulti_flow; /* Multicast flow. */
189 unsigned int port_id; /* Port ID for incoming packets. */
190 unsigned int elts_n; /* (*elts)[] length. */
191 unsigned int elts_head; /* Current index in (*elts)[]. */
193 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
194 struct rxq_elt (*no_sp)[]; /* RX elements. */
196 unsigned int sp:1; /* Use scattered RX elements. */
197 unsigned int csum:1; /* Enable checksum offloading. */
198 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
199 uint32_t mb_len; /* Length of a mp-issued mbuf. */
200 struct mlx4_rxq_stats stats; /* RX queue counters. */
201 unsigned int socket; /* CPU socket ID for allocations. */
202 struct ibv_exp_res_domain *rd; /* Resource Domain. */
207 struct rte_mbuf *buf;
210 /* Linear buffer type. It is used when transmitting buffers with too many
211 * segments that do not fit the hardware queue (see max_send_sge).
212 * Extra segments are copied (linearized) in such buffers, replacing the
213 * last SGE during TX.
214 * The size is arbitrary but large enough to hold a jumbo frame with
215 * 8 segments considering mbuf.buf_len is about 2048 bytes. */
216 typedef uint8_t linear_t[16384];
218 /* TX queue descriptor. */
220 struct priv *priv; /* Back pointer to private data. */
222 const struct rte_mempool *mp; /* Cached Memory Pool. */
223 struct ibv_mr *mr; /* Memory Region (for mp). */
224 uint32_t lkey; /* mr->lkey */
225 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
226 struct ibv_cq *cq; /* Completion Queue. */
227 struct ibv_qp *qp; /* Queue Pair. */
228 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
229 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
230 #if MLX4_PMD_MAX_INLINE > 0
231 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
233 unsigned int elts_n; /* (*elts)[] length. */
234 struct txq_elt (*elts)[]; /* TX elements. */
235 unsigned int elts_head; /* Current index in (*elts)[]. */
236 unsigned int elts_tail; /* First element awaiting completion. */
237 unsigned int elts_comp; /* Number of completion requests. */
238 unsigned int elts_comp_cd; /* Countdown for next completion request. */
239 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
240 struct mlx4_txq_stats stats; /* TX queue counters. */
241 linear_t (*elts_linear)[]; /* Linearized buffers. */
242 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
243 unsigned int socket; /* CPU socket ID for allocations. */
244 struct ibv_exp_res_domain *rd; /* Resource Domain. */
248 struct rte_eth_dev *dev; /* Ethernet device. */
249 struct ibv_context *ctx; /* Verbs context. */
250 struct ibv_device_attr device_attr; /* Device properties. */
251 struct ibv_pd *pd; /* Protection Domain. */
253 * MAC addresses array and configuration bit-field.
254 * An extra entry that cannot be modified by the DPDK is reserved
255 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
257 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
258 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
261 unsigned int enabled:1; /* If enabled. */
262 unsigned int id:12; /* VLAN ID (0-4095). */
263 } vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
264 /* Device properties. */
265 uint16_t mtu; /* Configured MTU. */
266 uint8_t port; /* Physical port number. */
267 unsigned int started:1; /* Device started, flows enabled. */
268 unsigned int promisc:1; /* Device in promiscuous mode. */
269 unsigned int allmulti:1; /* Device receives all multicast packets. */
270 unsigned int hw_qpg:1; /* QP groups are supported. */
271 unsigned int hw_tss:1; /* TSS is supported. */
272 unsigned int hw_rss:1; /* RSS is supported. */
273 unsigned int hw_csum:1; /* Checksum offload is supported. */
274 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
275 unsigned int rss:1; /* RSS is enabled. */
276 unsigned int vf:1; /* This is a VF device. */
277 unsigned int pending_alarm:1; /* An alarm is pending. */
279 unsigned int inl_recv_size; /* Inline recv size */
281 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
283 struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
284 unsigned int rxqs_n; /* RX queues array size. */
285 unsigned int txqs_n; /* TX queues array size. */
286 struct rxq *(*rxqs)[]; /* RX queues. */
287 struct txq *(*txqs)[]; /* TX queues. */
288 struct rte_intr_handle intr_handle; /* Interrupt handler. */
289 rte_spinlock_t lock; /* Lock for control functions. */
292 /* Local storage for secondary process data. */
293 struct mlx4_secondary_data {
294 struct rte_eth_dev_data data; /* Local device data. */
295 struct priv *primary_priv; /* Private structure from primary. */
296 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
297 rte_spinlock_t lock; /* Port configuration lock. */
298 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
301 * Check if running as a secondary process.
304 * Nonzero if running as a secondary process.
307 mlx4_is_secondary(void)
309 return rte_eal_process_type() != RTE_PROC_PRIMARY;
313 * Return private structure associated with an Ethernet device.
316 * Pointer to Ethernet device structure.
319 * Pointer to private structure.
322 mlx4_get_priv(struct rte_eth_dev *dev)
324 struct mlx4_secondary_data *sd;
326 if (!mlx4_is_secondary())
327 return dev->data->dev_private;
328 sd = &mlx4_secondary_data[dev->data->port_id];
329 return sd->data.dev_private;
333 * Lock private structure to protect it from concurrent access in the
337 * Pointer to private structure.
340 priv_lock(struct priv *priv)
342 rte_spinlock_lock(&priv->lock);
346 * Unlock private structure.
349 * Pointer to private structure.
352 priv_unlock(struct priv *priv)
354 rte_spinlock_unlock(&priv->lock);
357 /* Allocate a buffer on the stack and fill it with a printf format string. */
358 #define MKSTR(name, ...) \
359 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
361 snprintf(name, sizeof(name), __VA_ARGS__)
364 * Get interface name from private structure.
367 * Pointer to private structure.
369 * Interface name output buffer.
372 * 0 on success, -1 on failure and errno is set.
375 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
379 unsigned int dev_type = 0;
380 unsigned int dev_port_prev = ~0u;
381 char match[IF_NAMESIZE] = "";
384 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
390 while ((dent = readdir(dir)) != NULL) {
391 char *name = dent->d_name;
393 unsigned int dev_port;
396 if ((name[0] == '.') &&
397 ((name[1] == '\0') ||
398 ((name[1] == '.') && (name[2] == '\0'))))
401 MKSTR(path, "%s/device/net/%s/%s",
402 priv->ctx->device->ibdev_path, name,
403 (dev_type ? "dev_id" : "dev_port"));
405 file = fopen(path, "rb");
410 * Switch to dev_id when dev_port does not exist as
411 * is the case with Linux kernel versions < 3.15.
422 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
427 * Switch to dev_id when dev_port returns the same value for
428 * all ports. May happen when using a MOFED release older than
429 * 3.0 with a Linux kernel >= 3.15.
431 if (dev_port == dev_port_prev)
433 dev_port_prev = dev_port;
434 if (dev_port == (priv->port - 1u))
435 snprintf(match, sizeof(match), "%s", name);
438 if (match[0] == '\0')
440 strncpy(*ifname, match, sizeof(*ifname));
445 * Read from sysfs entry.
448 * Pointer to private structure.
450 * Entry name relative to sysfs path.
452 * Data output buffer.
457 * 0 on success, -1 on failure and errno is set.
460 priv_sysfs_read(const struct priv *priv, const char *entry,
461 char *buf, size_t size)
463 char ifname[IF_NAMESIZE];
468 if (priv_get_ifname(priv, &ifname))
471 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
474 file = fopen(path, "rb");
477 ret = fread(buf, 1, size, file);
479 if (((size_t)ret < size) && (ferror(file)))
489 * Write to sysfs entry.
492 * Pointer to private structure.
494 * Entry name relative to sysfs path.
501 * 0 on success, -1 on failure and errno is set.
504 priv_sysfs_write(const struct priv *priv, const char *entry,
505 char *buf, size_t size)
507 char ifname[IF_NAMESIZE];
512 if (priv_get_ifname(priv, &ifname))
515 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
518 file = fopen(path, "wb");
521 ret = fwrite(buf, 1, size, file);
523 if (((size_t)ret < size) || (ferror(file)))
533 * Get unsigned long sysfs property.
536 * Pointer to private structure.
538 * Entry name relative to sysfs path.
540 * Value output buffer.
543 * 0 on success, -1 on failure and errno is set.
546 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
549 unsigned long value_ret;
552 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
554 DEBUG("cannot read %s value from sysfs: %s",
555 name, strerror(errno));
558 value_str[ret] = '\0';
560 value_ret = strtoul(value_str, NULL, 0);
562 DEBUG("invalid %s value `%s': %s", name, value_str,
571 * Set unsigned long sysfs property.
574 * Pointer to private structure.
576 * Entry name relative to sysfs path.
581 * 0 on success, -1 on failure and errno is set.
584 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
587 MKSTR(value_str, "%lu", value);
589 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
591 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
592 name, value_str, value, strerror(errno));
599 * Perform ifreq ioctl() on associated Ethernet device.
602 * Pointer to private structure.
604 * Request number to pass to ioctl().
606 * Interface request structure output buffer.
609 * 0 on success, -1 on failure and errno is set.
612 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
614 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
619 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
620 ret = ioctl(sock, req, ifr);
629 * Pointer to private structure.
631 * MTU value output buffer.
634 * 0 on success, -1 on failure and errno is set.
637 priv_get_mtu(struct priv *priv, uint16_t *mtu)
639 unsigned long ulong_mtu;
641 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
651 * Pointer to private structure.
656 * 0 on success, -1 on failure and errno is set.
659 priv_set_mtu(struct priv *priv, uint16_t mtu)
661 return priv_set_sysfs_ulong(priv, "mtu", mtu);
668 * Pointer to private structure.
670 * Bitmask for flags that must remain untouched.
672 * Bitmask for flags to modify.
675 * 0 on success, -1 on failure and errno is set.
678 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
682 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
686 return priv_set_sysfs_ulong(priv, "flags", tmp);
689 /* Device configuration. */
692 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
693 unsigned int socket, const struct rte_eth_txconf *conf);
696 txq_cleanup(struct txq *txq);
699 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
700 unsigned int socket, const struct rte_eth_rxconf *conf,
701 struct rte_mempool *mp);
704 rxq_cleanup(struct rxq *rxq);
707 * Ethernet device configuration.
709 * Prepare the driver for a given number of TX and RX queues.
710 * Allocate parent RSS queue when several RX queues are requested.
713 * Pointer to Ethernet device structure.
716 * 0 on success, errno value on failure.
719 dev_configure(struct rte_eth_dev *dev)
721 struct priv *priv = dev->data->dev_private;
722 unsigned int rxqs_n = dev->data->nb_rx_queues;
723 unsigned int txqs_n = dev->data->nb_tx_queues;
727 priv->rxqs = (void *)dev->data->rx_queues;
728 priv->txqs = (void *)dev->data->tx_queues;
729 if (txqs_n != priv->txqs_n) {
730 INFO("%p: TX queues number update: %u -> %u",
731 (void *)dev, priv->txqs_n, txqs_n);
732 priv->txqs_n = txqs_n;
734 if (rxqs_n == priv->rxqs_n)
736 INFO("%p: RX queues number update: %u -> %u",
737 (void *)dev, priv->rxqs_n, rxqs_n);
738 /* If RSS is enabled, disable it first. */
742 /* Only if there are no remaining child RX queues. */
743 for (i = 0; (i != priv->rxqs_n); ++i)
744 if ((*priv->rxqs)[i] != NULL)
746 rxq_cleanup(&priv->rxq_parent);
751 /* Nothing else to do. */
752 priv->rxqs_n = rxqs_n;
755 /* Allocate a new RSS parent queue if supported by hardware. */
757 ERROR("%p: only a single RX queue can be configured when"
758 " hardware doesn't support RSS",
762 /* Fail if hardware doesn't support that many RSS queues. */
763 if (rxqs_n >= priv->max_rss_tbl_sz) {
764 ERROR("%p: only %u RX queues can be configured for RSS",
765 (void *)dev, priv->max_rss_tbl_sz);
770 priv->rxqs_n = rxqs_n;
771 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, NULL, NULL);
774 /* Failure, rollback. */
782 * DPDK callback for Ethernet device configuration.
785 * Pointer to Ethernet device structure.
788 * 0 on success, negative errno value on failure.
791 mlx4_dev_configure(struct rte_eth_dev *dev)
793 struct priv *priv = dev->data->dev_private;
796 if (mlx4_is_secondary())
797 return -E_RTE_SECONDARY;
799 ret = dev_configure(dev);
805 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
806 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
809 * Configure secondary process queues from a private data pointer (primary
810 * or secondary) and update burst callbacks. Can take place only once.
812 * All queues must have been previously created by the primary process to
813 * avoid undefined behavior.
816 * Private data pointer from either primary or secondary process.
819 * Private data pointer from secondary process, NULL in case of error.
822 mlx4_secondary_data_setup(struct priv *priv)
824 unsigned int port_id = 0;
825 struct mlx4_secondary_data *sd;
828 unsigned int nb_tx_queues;
829 unsigned int nb_rx_queues;
832 /* priv must be valid at this point. */
833 assert(priv != NULL);
834 /* priv->dev must also be valid but may point to local memory from
835 * another process, possibly with the same address and must not
836 * be dereferenced yet. */
837 assert(priv->dev != NULL);
838 /* Determine port ID by finding out where priv comes from. */
840 sd = &mlx4_secondary_data[port_id];
841 rte_spinlock_lock(&sd->lock);
842 /* Primary process? */
843 if (sd->primary_priv == priv)
845 /* Secondary process? */
846 if (sd->data.dev_private == priv)
848 rte_spinlock_unlock(&sd->lock);
849 if (++port_id == RTE_DIM(mlx4_secondary_data))
852 /* Switch to secondary private structure. If private data has already
853 * been updated by another thread, there is nothing else to do. */
854 priv = sd->data.dev_private;
855 if (priv->dev->data == &sd->data)
857 /* Sanity checks. Secondary private structure is supposed to point
858 * to local eth_dev, itself still pointing to the shared device data
859 * structure allocated by the primary process. */
860 assert(sd->shared_dev_data != &sd->data);
861 assert(sd->data.nb_tx_queues == 0);
862 assert(sd->data.tx_queues == NULL);
863 assert(sd->data.nb_rx_queues == 0);
864 assert(sd->data.rx_queues == NULL);
865 assert(priv != sd->primary_priv);
866 assert(priv->dev->data == sd->shared_dev_data);
867 assert(priv->txqs_n == 0);
868 assert(priv->txqs == NULL);
869 assert(priv->rxqs_n == 0);
870 assert(priv->rxqs == NULL);
871 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
872 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
873 /* Allocate local storage for queues. */
874 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
875 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
876 RTE_CACHE_LINE_SIZE);
877 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
878 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
879 RTE_CACHE_LINE_SIZE);
880 if (tx_queues == NULL || rx_queues == NULL)
882 /* Lock to prevent control operations during setup. */
885 for (i = 0; i != nb_tx_queues; ++i) {
886 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
889 if (primary_txq == NULL)
891 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
892 primary_txq->socket);
894 if (txq_setup(priv->dev,
896 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
899 txq->stats.idx = primary_txq->stats.idx;
906 txq = tx_queues[--i];
913 for (i = 0; i != nb_rx_queues; ++i) {
914 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
916 if (primary_rxq == NULL)
918 /* Not supported yet. */
921 /* Update everything. */
922 priv->txqs = (void *)tx_queues;
923 priv->txqs_n = nb_tx_queues;
924 priv->rxqs = (void *)rx_queues;
925 priv->rxqs_n = nb_rx_queues;
926 sd->data.rx_queues = rx_queues;
927 sd->data.tx_queues = tx_queues;
928 sd->data.nb_rx_queues = nb_rx_queues;
929 sd->data.nb_tx_queues = nb_tx_queues;
930 sd->data.dev_link = sd->shared_dev_data->dev_link;
931 sd->data.mtu = sd->shared_dev_data->mtu;
932 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
933 sizeof(sd->data.rx_queue_state));
934 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
935 sizeof(sd->data.tx_queue_state));
936 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
937 /* Use local data from now on. */
939 priv->dev->data = &sd->data;
941 priv->dev->tx_pkt_burst = mlx4_tx_burst;
942 priv->dev->rx_pkt_burst = removed_rx_burst;
945 /* More sanity checks. */
946 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
947 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
948 assert(priv->dev->data == &sd->data);
949 rte_spinlock_unlock(&sd->lock);
955 rte_spinlock_unlock(&sd->lock);
959 /* TX queues handling. */
962 * Allocate TX queue elements.
965 * Pointer to TX queue structure.
967 * Number of elements to allocate.
970 * 0 on success, errno value on failure.
973 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
976 struct txq_elt (*elts)[elts_n] =
977 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
978 linear_t (*elts_linear)[elts_n] =
979 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
981 struct ibv_mr *mr_linear = NULL;
984 if ((elts == NULL) || (elts_linear == NULL)) {
985 ERROR("%p: can't allocate packets array", (void *)txq);
990 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
991 (IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE));
992 if (mr_linear == NULL) {
993 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
998 for (i = 0; (i != elts_n); ++i) {
999 struct txq_elt *elt = &(*elts)[i];
1003 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
1004 txq->elts_n = elts_n;
1009 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
1010 * at least 4 times per ring. */
1011 txq->elts_comp_cd_init =
1012 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
1013 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
1014 txq->elts_comp_cd = txq->elts_comp_cd_init;
1015 txq->elts_linear = elts_linear;
1016 txq->mr_linear = mr_linear;
1020 if (mr_linear != NULL)
1021 claim_zero(ibv_dereg_mr(mr_linear));
1023 rte_free(elts_linear);
1026 DEBUG("%p: failed, freed everything", (void *)txq);
1032 * Free TX queue elements.
1035 * Pointer to TX queue structure.
1038 txq_free_elts(struct txq *txq)
1041 unsigned int elts_n = txq->elts_n;
1042 struct txq_elt (*elts)[elts_n] = txq->elts;
1043 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
1044 struct ibv_mr *mr_linear = txq->mr_linear;
1046 DEBUG("%p: freeing WRs", (void *)txq);
1049 txq->elts_linear = NULL;
1050 txq->mr_linear = NULL;
1051 if (mr_linear != NULL)
1052 claim_zero(ibv_dereg_mr(mr_linear));
1054 rte_free(elts_linear);
1057 for (i = 0; (i != elemof(*elts)); ++i) {
1058 struct txq_elt *elt = &(*elts)[i];
1060 if (elt->buf == NULL)
1062 rte_pktmbuf_free(elt->buf);
1069 * Clean up a TX queue.
1071 * Destroy objects, free allocated memory and reset the structure for reuse.
1074 * Pointer to TX queue structure.
1077 txq_cleanup(struct txq *txq)
1079 struct ibv_exp_release_intf_params params;
1082 DEBUG("cleaning up %p", (void *)txq);
1084 if (txq->if_qp != NULL) {
1085 assert(txq->priv != NULL);
1086 assert(txq->priv->ctx != NULL);
1087 assert(txq->qp != NULL);
1088 params = (struct ibv_exp_release_intf_params){
1091 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1095 if (txq->if_cq != NULL) {
1096 assert(txq->priv != NULL);
1097 assert(txq->priv->ctx != NULL);
1098 assert(txq->cq != NULL);
1099 params = (struct ibv_exp_release_intf_params){
1102 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1106 if (txq->qp != NULL)
1107 claim_zero(ibv_destroy_qp(txq->qp));
1108 if (txq->cq != NULL)
1109 claim_zero(ibv_destroy_cq(txq->cq));
1110 if (txq->rd != NULL) {
1111 struct ibv_exp_destroy_res_domain_attr attr = {
1115 assert(txq->priv != NULL);
1116 assert(txq->priv->ctx != NULL);
1117 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1121 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1122 if (txq->mp2mr[i].mp == NULL)
1124 assert(txq->mp2mr[i].mr != NULL);
1125 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1127 memset(txq, 0, sizeof(*txq));
1131 * Manage TX completions.
1133 * When sending a burst, mlx4_tx_burst() posts several WRs.
1134 * To improve performance, a completion event is only required once every
1135 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1136 * for other WRs, but this information would not be used anyway.
1139 * Pointer to TX queue structure.
1142 * 0 on success, -1 on failure.
1145 txq_complete(struct txq *txq)
1147 unsigned int elts_comp = txq->elts_comp;
1148 unsigned int elts_tail = txq->elts_tail;
1149 const unsigned int elts_n = txq->elts_n;
1152 if (unlikely(elts_comp == 0))
1155 DEBUG("%p: processing %u work requests completions",
1156 (void *)txq, elts_comp);
1158 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1159 if (unlikely(wcs_n == 0))
1161 if (unlikely(wcs_n < 0)) {
1162 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1163 (void *)txq, wcs_n);
1167 assert(elts_comp <= txq->elts_comp);
1169 * Assume WC status is successful as nothing can be done about it
1172 elts_tail += wcs_n * txq->elts_comp_cd_init;
1173 if (elts_tail >= elts_n)
1174 elts_tail -= elts_n;
1175 txq->elts_tail = elts_tail;
1176 txq->elts_comp = elts_comp;
1181 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1182 * the cloned mbuf is allocated is returned instead.
1188 * Memory pool where data is located for given mbuf.
1190 static struct rte_mempool *
1191 txq_mb2mp(struct rte_mbuf *buf)
1193 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1194 return rte_mbuf_from_indirect(buf)->pool;
1199 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1200 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1201 * remove an entry first.
1204 * Pointer to TX queue structure.
1206 * Memory Pool for which a Memory Region lkey must be returned.
1209 * mr->lkey on success, (uint32_t)-1 on failure.
1212 txq_mp2mr(struct txq *txq, const struct rte_mempool *mp)
1217 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1218 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1219 /* Unknown MP, add a new MR for it. */
1222 if (txq->mp2mr[i].mp == mp) {
1223 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1224 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1225 return txq->mp2mr[i].lkey;
1228 /* Add a new entry, register MR first. */
1229 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1230 (void *)txq, mp->name, (const void *)mp);
1231 mr = ibv_reg_mr(txq->priv->pd,
1232 (void *)mp->elt_va_start,
1233 (mp->elt_va_end - mp->elt_va_start),
1234 (IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE));
1235 if (unlikely(mr == NULL)) {
1236 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1238 return (uint32_t)-1;
1240 if (unlikely(i == elemof(txq->mp2mr))) {
1241 /* Table is full, remove oldest entry. */
1242 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1245 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1246 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1247 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1249 /* Store the new entry. */
1250 txq->mp2mr[i].mp = mp;
1251 txq->mp2mr[i].mr = mr;
1252 txq->mp2mr[i].lkey = mr->lkey;
1253 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1254 (void *)txq, mp->name, (const void *)mp, txq->mp2mr[i].lkey);
1255 return txq->mp2mr[i].lkey;
1258 struct txq_mp2mr_mbuf_check_data {
1259 const struct rte_mempool *mp;
1264 * Callback function for rte_mempool_obj_iter() to check whether a given
1265 * mempool object looks like a mbuf.
1267 * @param[in, out] arg
1268 * Context data (struct txq_mp2mr_mbuf_check_data). Contains mempool pointer
1271 * Object start address.
1273 * Object end address.
1278 * Nonzero value when object is not a mbuf.
1281 txq_mp2mr_mbuf_check(void *arg, void *start, void *end,
1282 uint32_t index __rte_unused)
1284 struct txq_mp2mr_mbuf_check_data *data = arg;
1285 struct rte_mbuf *buf =
1286 (void *)((uintptr_t)start + data->mp->header_size);
1289 /* Check whether mbuf structure fits element size and whether mempool
1290 * pointer is valid. */
1291 if (((uintptr_t)end >= (uintptr_t)(buf + 1)) &&
1292 (buf->pool == data->mp))
1299 * Iterator function for rte_mempool_walk() to register existing mempools and
1300 * fill the MP to MR cache of a TX queue.
1303 * Memory Pool to register.
1305 * Pointer to TX queue structure.
1308 txq_mp2mr_iter(const struct rte_mempool *mp, void *arg)
1310 struct txq *txq = arg;
1311 struct txq_mp2mr_mbuf_check_data data = {
1316 /* Discard empty mempools. */
1319 /* Register mempool only if the first element looks like a mbuf. */
1320 rte_mempool_obj_iter((void *)mp->elt_va_start,
1322 mp->header_size + mp->elt_size + mp->trailer_size,
1327 txq_mp2mr_mbuf_check,
1334 #if MLX4_PMD_SGE_WR_N > 1
1337 * Copy scattered mbuf contents to a single linear buffer.
1339 * @param[out] linear
1340 * Linear output buffer.
1342 * Scattered input buffer.
1345 * Number of bytes copied to the output buffer or 0 if not large enough.
1348 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1350 unsigned int size = 0;
1351 unsigned int offset;
1354 unsigned int len = DATA_LEN(buf);
1358 if (unlikely(size > sizeof(*linear)))
1360 memcpy(&(*linear)[offset],
1361 rte_pktmbuf_mtod(buf, uint8_t *),
1364 } while (buf != NULL);
1369 * Handle scattered buffers for mlx4_tx_burst().
1372 * TX queue structure.
1374 * Number of segments in buf.
1376 * TX queue element to fill.
1378 * Buffer to process.
1380 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1382 * Array filled with SGEs on success.
1385 * A structure containing the processed packet size in bytes and the
1386 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1389 static struct tx_burst_sg_ret {
1390 unsigned int length;
1393 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1394 struct rte_mbuf *buf, unsigned int elts_head,
1395 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1397 unsigned int sent_size = 0;
1401 /* When there are too many segments, extra segments are
1402 * linearized in the last SGE. */
1403 if (unlikely(segs > elemof(*sges))) {
1404 segs = (elemof(*sges) - 1);
1407 /* Update element. */
1409 /* Register segments as SGEs. */
1410 for (j = 0; (j != segs); ++j) {
1411 struct ibv_sge *sge = &(*sges)[j];
1414 /* Retrieve Memory Region key for this memory pool. */
1415 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1416 if (unlikely(lkey == (uint32_t)-1)) {
1417 /* MR does not exist. */
1418 DEBUG("%p: unable to get MP <-> MR association",
1420 /* Clean up TX element. */
1425 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1427 rte_prefetch0((volatile void *)
1428 (uintptr_t)sge->addr);
1429 sge->length = DATA_LEN(buf);
1431 sent_size += sge->length;
1434 /* If buf is not NULL here and is not going to be linearized,
1435 * nb_segs is not valid. */
1437 assert((buf == NULL) || (linearize));
1438 /* Linearize extra segments. */
1440 struct ibv_sge *sge = &(*sges)[segs];
1441 linear_t *linear = &(*txq->elts_linear)[elts_head];
1442 unsigned int size = linearize_mbuf(linear, buf);
1444 assert(segs == (elemof(*sges) - 1));
1446 /* Invalid packet. */
1447 DEBUG("%p: packet too large to be linearized.",
1449 /* Clean up TX element. */
1453 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1454 if (elemof(*sges) == 1) {
1456 struct rte_mbuf *next = NEXT(buf);
1458 rte_pktmbuf_free_seg(buf);
1460 } while (buf != NULL);
1464 sge->addr = (uintptr_t)&(*linear)[0];
1466 sge->lkey = txq->mr_linear->lkey;
1468 /* Include last segment. */
1471 return (struct tx_burst_sg_ret){
1472 .length = sent_size,
1476 return (struct tx_burst_sg_ret){
1482 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1485 * DPDK callback for TX.
1488 * Generic pointer to TX queue structure.
1490 * Packets to transmit.
1492 * Number of packets in array.
1495 * Number of packets successfully transmitted (<= pkts_n).
1498 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1500 struct txq *txq = (struct txq *)dpdk_txq;
1501 unsigned int elts_head = txq->elts_head;
1502 const unsigned int elts_n = txq->elts_n;
1503 unsigned int elts_comp_cd = txq->elts_comp_cd;
1504 unsigned int elts_comp = 0;
1509 assert(elts_comp_cd != 0);
1511 max = (elts_n - (elts_head - txq->elts_tail));
1515 assert(max <= elts_n);
1516 /* Always leave one free entry in the ring. */
1522 for (i = 0; (i != max); ++i) {
1523 struct rte_mbuf *buf = pkts[i];
1524 unsigned int elts_head_next =
1525 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1526 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1527 struct txq_elt *elt = &(*txq->elts)[elts_head];
1528 unsigned int segs = NB_SEGS(buf);
1529 #ifdef MLX4_PMD_SOFT_COUNTERS
1530 unsigned int sent_size = 0;
1532 uint32_t send_flags = 0;
1534 /* Clean up old buffer. */
1535 if (likely(elt->buf != NULL)) {
1536 struct rte_mbuf *tmp = elt->buf;
1538 /* Faster than rte_pktmbuf_free(). */
1540 struct rte_mbuf *next = NEXT(tmp);
1542 rte_pktmbuf_free_seg(tmp);
1544 } while (tmp != NULL);
1546 /* Request TX completion. */
1547 if (unlikely(--elts_comp_cd == 0)) {
1548 elts_comp_cd = txq->elts_comp_cd_init;
1550 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1552 /* Should we enable HW CKSUM offload */
1554 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1555 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1556 /* HW does not support checksum offloads at arbitrary
1557 * offsets but automatically recognizes the packet
1558 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1559 * tunnels are currently supported. */
1560 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1561 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1563 if (likely(segs == 1)) {
1568 /* Retrieve buffer information. */
1569 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1570 length = DATA_LEN(buf);
1571 /* Retrieve Memory Region key for this memory pool. */
1572 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1573 if (unlikely(lkey == (uint32_t)-1)) {
1574 /* MR does not exist. */
1575 DEBUG("%p: unable to get MP <-> MR"
1576 " association", (void *)txq);
1577 /* Clean up TX element. */
1581 /* Update element. */
1584 rte_prefetch0((volatile void *)
1586 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1587 /* Put packet into send queue. */
1588 #if MLX4_PMD_MAX_INLINE > 0
1589 if (length <= txq->max_inline)
1590 err = txq->if_qp->send_pending_inline
1597 err = txq->if_qp->send_pending
1605 #ifdef MLX4_PMD_SOFT_COUNTERS
1606 sent_size += length;
1609 #if MLX4_PMD_SGE_WR_N > 1
1610 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1611 struct tx_burst_sg_ret ret;
1613 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1615 if (ret.length == (unsigned int)-1)
1617 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1618 /* Put SG list into send queue. */
1619 err = txq->if_qp->send_pending_sg_list
1626 #ifdef MLX4_PMD_SOFT_COUNTERS
1627 sent_size += ret.length;
1629 #else /* MLX4_PMD_SGE_WR_N > 1 */
1630 DEBUG("%p: TX scattered buffers support not"
1631 " compiled in", (void *)txq);
1633 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1635 elts_head = elts_head_next;
1636 #ifdef MLX4_PMD_SOFT_COUNTERS
1637 /* Increment sent bytes counter. */
1638 txq->stats.obytes += sent_size;
1642 /* Take a shortcut if nothing must be sent. */
1643 if (unlikely(i == 0))
1645 #ifdef MLX4_PMD_SOFT_COUNTERS
1646 /* Increment sent packets counter. */
1647 txq->stats.opackets += i;
1649 /* Ring QP doorbell. */
1650 err = txq->if_qp->send_flush(txq->qp);
1651 if (unlikely(err)) {
1652 /* A nonzero value is not supposed to be returned.
1653 * Nothing can be done about it. */
1654 DEBUG("%p: send_flush() failed with error %d",
1657 txq->elts_head = elts_head;
1658 txq->elts_comp += elts_comp;
1659 txq->elts_comp_cd = elts_comp_cd;
1664 * DPDK callback for TX in secondary processes.
1666 * This function configures all queues from primary process information
1667 * if necessary before reverting to the normal TX burst callback.
1670 * Generic pointer to TX queue structure.
1672 * Packets to transmit.
1674 * Number of packets in array.
1677 * Number of packets successfully transmitted (<= pkts_n).
1680 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1683 struct txq *txq = dpdk_txq;
1684 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1685 struct priv *primary_priv;
1691 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1692 /* Look for queue index in both private structures. */
1693 for (index = 0; index != priv->txqs_n; ++index)
1694 if (((*primary_priv->txqs)[index] == txq) ||
1695 ((*priv->txqs)[index] == txq))
1697 if (index == priv->txqs_n)
1699 txq = (*priv->txqs)[index];
1700 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1704 * Configure a TX queue.
1707 * Pointer to Ethernet device structure.
1709 * Pointer to TX queue structure.
1711 * Number of descriptors to configure in queue.
1713 * NUMA socket on which memory must be allocated.
1715 * Thresholds parameters.
1718 * 0 on success, errno value on failure.
1721 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1722 unsigned int socket, const struct rte_eth_txconf *conf)
1724 struct priv *priv = mlx4_get_priv(dev);
1730 struct ibv_exp_query_intf_params params;
1731 struct ibv_exp_qp_init_attr init;
1732 struct ibv_exp_res_domain_init_attr rd;
1733 struct ibv_exp_cq_init_attr cq;
1734 struct ibv_exp_qp_attr mod;
1736 enum ibv_exp_query_intf_status status;
1739 (void)conf; /* Thresholds configuration (ignored). */
1742 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1743 ERROR("%p: invalid number of TX descriptors (must be a"
1744 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1747 desc /= MLX4_PMD_SGE_WR_N;
1748 /* MRs will be registered in mp2mr[] later. */
1749 attr.rd = (struct ibv_exp_res_domain_init_attr){
1750 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1751 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1752 .thread_model = IBV_EXP_THREAD_SINGLE,
1753 .msg_model = IBV_EXP_MSG_HIGH_BW,
1755 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1756 if (tmpl.rd == NULL) {
1758 ERROR("%p: RD creation failure: %s",
1759 (void *)dev, strerror(ret));
1762 attr.cq = (struct ibv_exp_cq_init_attr){
1763 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1764 .res_domain = tmpl.rd,
1766 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1767 if (tmpl.cq == NULL) {
1769 ERROR("%p: CQ creation failure: %s",
1770 (void *)dev, strerror(ret));
1773 DEBUG("priv->device_attr.max_qp_wr is %d",
1774 priv->device_attr.max_qp_wr);
1775 DEBUG("priv->device_attr.max_sge is %d",
1776 priv->device_attr.max_sge);
1777 attr.init = (struct ibv_exp_qp_init_attr){
1778 /* CQ to be associated with the send queue. */
1780 /* CQ to be associated with the receive queue. */
1783 /* Max number of outstanding WRs. */
1784 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1785 priv->device_attr.max_qp_wr :
1787 /* Max number of scatter/gather elements in a WR. */
1788 .max_send_sge = ((priv->device_attr.max_sge <
1789 MLX4_PMD_SGE_WR_N) ?
1790 priv->device_attr.max_sge :
1792 #if MLX4_PMD_MAX_INLINE > 0
1793 .max_inline_data = MLX4_PMD_MAX_INLINE,
1796 .qp_type = IBV_QPT_RAW_PACKET,
1797 /* Do *NOT* enable this, completions events are managed per
1801 .res_domain = tmpl.rd,
1802 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1803 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1805 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1806 if (tmpl.qp == NULL) {
1807 ret = (errno ? errno : EINVAL);
1808 ERROR("%p: QP creation failure: %s",
1809 (void *)dev, strerror(ret));
1812 #if MLX4_PMD_MAX_INLINE > 0
1813 /* ibv_create_qp() updates this value. */
1814 tmpl.max_inline = attr.init.cap.max_inline_data;
1816 attr.mod = (struct ibv_exp_qp_attr){
1817 /* Move the QP to this state. */
1818 .qp_state = IBV_QPS_INIT,
1819 /* Primary port number. */
1820 .port_num = priv->port
1822 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1823 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1825 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1826 (void *)dev, strerror(ret));
1829 ret = txq_alloc_elts(&tmpl, desc);
1831 ERROR("%p: TXQ allocation failed: %s",
1832 (void *)dev, strerror(ret));
1835 attr.mod = (struct ibv_exp_qp_attr){
1836 .qp_state = IBV_QPS_RTR
1838 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1840 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1841 (void *)dev, strerror(ret));
1844 attr.mod.qp_state = IBV_QPS_RTS;
1845 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1847 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1848 (void *)dev, strerror(ret));
1851 attr.params = (struct ibv_exp_query_intf_params){
1852 .intf_scope = IBV_EXP_INTF_GLOBAL,
1853 .intf = IBV_EXP_INTF_CQ,
1856 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1857 if (tmpl.if_cq == NULL) {
1858 ERROR("%p: CQ interface family query failed with status %d",
1859 (void *)dev, status);
1862 attr.params = (struct ibv_exp_query_intf_params){
1863 .intf_scope = IBV_EXP_INTF_GLOBAL,
1864 .intf = IBV_EXP_INTF_QP_BURST,
1866 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1867 /* MC loopback must be disabled when not using a VF. */
1870 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1874 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1875 if (tmpl.if_qp == NULL) {
1876 ERROR("%p: QP interface family query failed with status %d",
1877 (void *)dev, status);
1880 /* Clean up txq in case we're reinitializing it. */
1881 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1884 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1885 /* Pre-register known mempools. */
1886 rte_mempool_walk(txq_mp2mr_iter, txq);
1896 * DPDK callback to configure a TX queue.
1899 * Pointer to Ethernet device structure.
1903 * Number of descriptors to configure in queue.
1905 * NUMA socket on which memory must be allocated.
1907 * Thresholds parameters.
1910 * 0 on success, negative errno value on failure.
1913 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1914 unsigned int socket, const struct rte_eth_txconf *conf)
1916 struct priv *priv = dev->data->dev_private;
1917 struct txq *txq = (*priv->txqs)[idx];
1920 if (mlx4_is_secondary())
1921 return -E_RTE_SECONDARY;
1923 DEBUG("%p: configuring queue %u for %u descriptors",
1924 (void *)dev, idx, desc);
1925 if (idx >= priv->txqs_n) {
1926 ERROR("%p: queue index out of range (%u >= %u)",
1927 (void *)dev, idx, priv->txqs_n);
1932 DEBUG("%p: reusing already allocated queue index %u (%p)",
1933 (void *)dev, idx, (void *)txq);
1934 if (priv->started) {
1938 (*priv->txqs)[idx] = NULL;
1941 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1943 ERROR("%p: unable to allocate queue index %u",
1949 ret = txq_setup(dev, txq, desc, socket, conf);
1953 txq->stats.idx = idx;
1954 DEBUG("%p: adding TX queue %p to list",
1955 (void *)dev, (void *)txq);
1956 (*priv->txqs)[idx] = txq;
1957 /* Update send callback. */
1958 dev->tx_pkt_burst = mlx4_tx_burst;
1965 * DPDK callback to release a TX queue.
1968 * Generic TX queue pointer.
1971 mlx4_tx_queue_release(void *dpdk_txq)
1973 struct txq *txq = (struct txq *)dpdk_txq;
1977 if (mlx4_is_secondary())
1983 for (i = 0; (i != priv->txqs_n); ++i)
1984 if ((*priv->txqs)[i] == txq) {
1985 DEBUG("%p: removing TX queue %p from list",
1986 (void *)priv->dev, (void *)txq);
1987 (*priv->txqs)[i] = NULL;
1995 /* RX queues handling. */
1998 * Allocate RX queue elements with scattered packets support.
2001 * Pointer to RX queue structure.
2003 * Number of elements to allocate.
2005 * If not NULL, fetch buffers from this array instead of allocating them
2006 * with rte_pktmbuf_alloc().
2009 * 0 on success, errno value on failure.
2012 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2013 struct rte_mbuf **pool)
2016 struct rxq_elt_sp (*elts)[elts_n] =
2017 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2022 ERROR("%p: can't allocate packets array", (void *)rxq);
2026 /* For each WR (packet). */
2027 for (i = 0; (i != elts_n); ++i) {
2029 struct rxq_elt_sp *elt = &(*elts)[i];
2030 struct ibv_recv_wr *wr = &elt->wr;
2031 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2033 /* These two arrays must have the same size. */
2034 assert(elemof(elt->sges) == elemof(elt->bufs));
2037 wr->next = &(*elts)[(i + 1)].wr;
2038 wr->sg_list = &(*sges)[0];
2039 wr->num_sge = elemof(*sges);
2040 /* For each SGE (segment). */
2041 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2042 struct ibv_sge *sge = &(*sges)[j];
2043 struct rte_mbuf *buf;
2047 assert(buf != NULL);
2048 rte_pktmbuf_reset(buf);
2050 buf = rte_pktmbuf_alloc(rxq->mp);
2052 assert(pool == NULL);
2053 ERROR("%p: empty mbuf pool", (void *)rxq);
2058 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2059 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2060 /* Buffer is supposed to be empty. */
2061 assert(rte_pktmbuf_data_len(buf) == 0);
2062 assert(rte_pktmbuf_pkt_len(buf) == 0);
2063 /* sge->addr must be able to store a pointer. */
2064 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2066 /* The first SGE keeps its headroom. */
2067 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2068 sge->length = (buf->buf_len -
2069 RTE_PKTMBUF_HEADROOM);
2071 /* Subsequent SGEs lose theirs. */
2072 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2073 SET_DATA_OFF(buf, 0);
2074 sge->addr = (uintptr_t)buf->buf_addr;
2075 sge->length = buf->buf_len;
2077 sge->lkey = rxq->mr->lkey;
2078 /* Redundant check for tailroom. */
2079 assert(sge->length == rte_pktmbuf_tailroom(buf));
2082 /* The last WR pointer must be NULL. */
2083 (*elts)[(i - 1)].wr.next = NULL;
2084 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2085 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2086 rxq->elts_n = elts_n;
2088 rxq->elts.sp = elts;
2093 assert(pool == NULL);
2094 for (i = 0; (i != elemof(*elts)); ++i) {
2096 struct rxq_elt_sp *elt = &(*elts)[i];
2098 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2099 struct rte_mbuf *buf = elt->bufs[j];
2102 rte_pktmbuf_free_seg(buf);
2107 DEBUG("%p: failed, freed everything", (void *)rxq);
2113 * Free RX queue elements with scattered packets support.
2116 * Pointer to RX queue structure.
2119 rxq_free_elts_sp(struct rxq *rxq)
2122 unsigned int elts_n = rxq->elts_n;
2123 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2125 DEBUG("%p: freeing WRs", (void *)rxq);
2127 rxq->elts.sp = NULL;
2130 for (i = 0; (i != elemof(*elts)); ++i) {
2132 struct rxq_elt_sp *elt = &(*elts)[i];
2134 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2135 struct rte_mbuf *buf = elt->bufs[j];
2138 rte_pktmbuf_free_seg(buf);
2145 * Allocate RX queue elements.
2148 * Pointer to RX queue structure.
2150 * Number of elements to allocate.
2152 * If not NULL, fetch buffers from this array instead of allocating them
2153 * with rte_pktmbuf_alloc().
2156 * 0 on success, errno value on failure.
2159 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2162 struct rxq_elt (*elts)[elts_n] =
2163 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2168 ERROR("%p: can't allocate packets array", (void *)rxq);
2172 /* For each WR (packet). */
2173 for (i = 0; (i != elts_n); ++i) {
2174 struct rxq_elt *elt = &(*elts)[i];
2175 struct ibv_recv_wr *wr = &elt->wr;
2176 struct ibv_sge *sge = &(*elts)[i].sge;
2177 struct rte_mbuf *buf;
2181 assert(buf != NULL);
2182 rte_pktmbuf_reset(buf);
2184 buf = rte_pktmbuf_alloc(rxq->mp);
2186 assert(pool == NULL);
2187 ERROR("%p: empty mbuf pool", (void *)rxq);
2191 /* Configure WR. Work request ID contains its own index in
2192 * the elts array and the offset between SGE buffer header and
2194 WR_ID(wr->wr_id).id = i;
2195 WR_ID(wr->wr_id).offset =
2196 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2198 wr->next = &(*elts)[(i + 1)].wr;
2201 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2202 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2203 /* Buffer is supposed to be empty. */
2204 assert(rte_pktmbuf_data_len(buf) == 0);
2205 assert(rte_pktmbuf_pkt_len(buf) == 0);
2206 /* sge->addr must be able to store a pointer. */
2207 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2208 /* SGE keeps its headroom. */
2209 sge->addr = (uintptr_t)
2210 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2211 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2212 sge->lkey = rxq->mr->lkey;
2213 /* Redundant check for tailroom. */
2214 assert(sge->length == rte_pktmbuf_tailroom(buf));
2215 /* Make sure elts index and SGE mbuf pointer can be deduced
2217 if ((WR_ID(wr->wr_id).id != i) ||
2218 ((void *)((uintptr_t)sge->addr -
2219 WR_ID(wr->wr_id).offset) != buf)) {
2220 ERROR("%p: cannot store index and offset in WR ID",
2223 rte_pktmbuf_free(buf);
2228 /* The last WR pointer must be NULL. */
2229 (*elts)[(i - 1)].wr.next = NULL;
2230 DEBUG("%p: allocated and configured %u single-segment WRs",
2231 (void *)rxq, elts_n);
2232 rxq->elts_n = elts_n;
2234 rxq->elts.no_sp = elts;
2239 assert(pool == NULL);
2240 for (i = 0; (i != elemof(*elts)); ++i) {
2241 struct rxq_elt *elt = &(*elts)[i];
2242 struct rte_mbuf *buf;
2244 if (elt->sge.addr == 0)
2246 assert(WR_ID(elt->wr.wr_id).id == i);
2247 buf = (void *)((uintptr_t)elt->sge.addr -
2248 WR_ID(elt->wr.wr_id).offset);
2249 rte_pktmbuf_free_seg(buf);
2253 DEBUG("%p: failed, freed everything", (void *)rxq);
2259 * Free RX queue elements.
2262 * Pointer to RX queue structure.
2265 rxq_free_elts(struct rxq *rxq)
2268 unsigned int elts_n = rxq->elts_n;
2269 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2271 DEBUG("%p: freeing WRs", (void *)rxq);
2273 rxq->elts.no_sp = NULL;
2276 for (i = 0; (i != elemof(*elts)); ++i) {
2277 struct rxq_elt *elt = &(*elts)[i];
2278 struct rte_mbuf *buf;
2280 if (elt->sge.addr == 0)
2282 assert(WR_ID(elt->wr.wr_id).id == i);
2283 buf = (void *)((uintptr_t)elt->sge.addr -
2284 WR_ID(elt->wr.wr_id).offset);
2285 rte_pktmbuf_free_seg(buf);
2291 * Delete flow steering rule.
2294 * Pointer to RX queue structure.
2296 * MAC address index.
2301 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2304 struct priv *priv = rxq->priv;
2305 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2306 (const uint8_t (*)[ETHER_ADDR_LEN])
2307 priv->mac[mac_index].addr_bytes;
2309 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2310 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2311 " (VLAN ID %" PRIu16 ")",
2313 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2314 mac_index, priv->vlan_filter[vlan_index].id);
2315 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2316 rxq->mac_flow[mac_index][vlan_index] = NULL;
2320 * Unregister a MAC address from a RX queue.
2323 * Pointer to RX queue structure.
2325 * MAC address index.
2328 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2330 struct priv *priv = rxq->priv;
2332 unsigned int vlans = 0;
2334 assert(mac_index < elemof(priv->mac));
2335 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2337 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2338 if (!priv->vlan_filter[i].enabled)
2340 rxq_del_flow(rxq, mac_index, i);
2344 rxq_del_flow(rxq, mac_index, 0);
2346 BITFIELD_RESET(rxq->mac_configured, mac_index);
2350 * Unregister all MAC addresses from a RX queue.
2353 * Pointer to RX queue structure.
2356 rxq_mac_addrs_del(struct rxq *rxq)
2358 struct priv *priv = rxq->priv;
2361 for (i = 0; (i != elemof(priv->mac)); ++i)
2362 rxq_mac_addr_del(rxq, i);
2365 static int rxq_promiscuous_enable(struct rxq *);
2366 static void rxq_promiscuous_disable(struct rxq *);
2369 * Add single flow steering rule.
2372 * Pointer to RX queue structure.
2374 * MAC address index to register.
2376 * VLAN index. Use -1 for a flow without VLAN.
2379 * 0 on success, errno value on failure.
2382 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2384 struct ibv_flow *flow;
2385 struct priv *priv = rxq->priv;
2386 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2387 (const uint8_t (*)[ETHER_ADDR_LEN])
2388 priv->mac[mac_index].addr_bytes;
2390 /* Allocate flow specification on the stack. */
2391 struct __attribute__((packed)) {
2392 struct ibv_flow_attr attr;
2393 struct ibv_flow_spec_eth spec;
2395 struct ibv_flow_attr *attr = &data.attr;
2396 struct ibv_flow_spec_eth *spec = &data.spec;
2398 assert(mac_index < elemof(priv->mac));
2399 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2401 * No padding must be inserted by the compiler between attr and spec.
2402 * This layout is expected by libibverbs.
2404 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2405 *attr = (struct ibv_flow_attr){
2406 .type = IBV_FLOW_ATTR_NORMAL,
2411 *spec = (struct ibv_flow_spec_eth){
2412 .type = IBV_FLOW_SPEC_ETH,
2413 .size = sizeof(*spec),
2416 (*mac)[0], (*mac)[1], (*mac)[2],
2417 (*mac)[3], (*mac)[4], (*mac)[5]
2419 .vlan_tag = ((vlan_index != -1u) ?
2420 htons(priv->vlan_filter[vlan_index].id) :
2424 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2425 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2428 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2429 " (VLAN %s %" PRIu16 ")",
2431 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2433 ((vlan_index != -1u) ? "ID" : "index"),
2434 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2435 /* Create related flow. */
2437 flow = ibv_create_flow(rxq->qp, attr);
2439 /* It's not clear whether errno is always set in this case. */
2440 ERROR("%p: flow configuration failed, errno=%d: %s",
2442 (errno ? strerror(errno) : "Unknown error"));
2447 if (vlan_index == -1u)
2449 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2450 rxq->mac_flow[mac_index][vlan_index] = flow;
2455 * Register a MAC address in a RX queue.
2458 * Pointer to RX queue structure.
2460 * MAC address index to register.
2463 * 0 on success, errno value on failure.
2466 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2468 struct priv *priv = rxq->priv;
2470 unsigned int vlans = 0;
2473 assert(mac_index < elemof(priv->mac));
2474 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2475 rxq_mac_addr_del(rxq, mac_index);
2476 /* Fill VLAN specifications. */
2477 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2478 if (!priv->vlan_filter[i].enabled)
2480 /* Create related flow. */
2481 ret = rxq_add_flow(rxq, mac_index, i);
2486 /* Failure, rollback. */
2488 if (priv->vlan_filter[--i].enabled)
2489 rxq_del_flow(rxq, mac_index, i);
2493 /* In case there is no VLAN filter. */
2495 ret = rxq_add_flow(rxq, mac_index, -1);
2499 BITFIELD_SET(rxq->mac_configured, mac_index);
2504 * Register all MAC addresses in a RX queue.
2507 * Pointer to RX queue structure.
2510 * 0 on success, errno value on failure.
2513 rxq_mac_addrs_add(struct rxq *rxq)
2515 struct priv *priv = rxq->priv;
2519 for (i = 0; (i != elemof(priv->mac)); ++i) {
2520 if (!BITFIELD_ISSET(priv->mac_configured, i))
2522 ret = rxq_mac_addr_add(rxq, i);
2525 /* Failure, rollback. */
2527 rxq_mac_addr_del(rxq, --i);
2535 * Unregister a MAC address.
2537 * In RSS mode, the MAC address is unregistered from the parent queue,
2538 * otherwise it is unregistered from each queue directly.
2541 * Pointer to private structure.
2543 * MAC address index.
2546 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2550 assert(mac_index < elemof(priv->mac));
2551 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2554 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2557 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2558 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2560 BITFIELD_RESET(priv->mac_configured, mac_index);
2564 * Register a MAC address.
2566 * In RSS mode, the MAC address is registered in the parent queue,
2567 * otherwise it is registered in each queue directly.
2570 * Pointer to private structure.
2572 * MAC address index to use.
2574 * MAC address to register.
2577 * 0 on success, errno value on failure.
2580 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2581 const uint8_t (*mac)[ETHER_ADDR_LEN])
2586 assert(mac_index < elemof(priv->mac));
2587 /* First, make sure this address isn't already configured. */
2588 for (i = 0; (i != elemof(priv->mac)); ++i) {
2589 /* Skip this index, it's going to be reconfigured. */
2592 if (!BITFIELD_ISSET(priv->mac_configured, i))
2594 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2596 /* Address already configured elsewhere, return with error. */
2599 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2600 priv_mac_addr_del(priv, mac_index);
2601 priv->mac[mac_index] = (struct ether_addr){
2603 (*mac)[0], (*mac)[1], (*mac)[2],
2604 (*mac)[3], (*mac)[4], (*mac)[5]
2607 /* If device isn't started, this is all we need to do. */
2608 if (!priv->started) {
2610 /* Verify that all queues have this index disabled. */
2611 for (i = 0; (i != priv->rxqs_n); ++i) {
2612 if ((*priv->rxqs)[i] == NULL)
2614 assert(!BITFIELD_ISSET
2615 ((*priv->rxqs)[i]->mac_configured, mac_index));
2621 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2626 for (i = 0; (i != priv->rxqs_n); ++i) {
2627 if ((*priv->rxqs)[i] == NULL)
2629 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2632 /* Failure, rollback. */
2634 if ((*priv->rxqs)[(--i)] != NULL)
2635 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2639 BITFIELD_SET(priv->mac_configured, mac_index);
2644 * Enable allmulti mode in a RX queue.
2647 * Pointer to RX queue structure.
2650 * 0 on success, errno value on failure.
2653 rxq_allmulticast_enable(struct rxq *rxq)
2655 struct ibv_flow *flow;
2656 struct ibv_flow_attr attr = {
2657 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2659 .port = rxq->priv->port,
2663 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2664 if (rxq->allmulti_flow != NULL)
2667 flow = ibv_create_flow(rxq->qp, &attr);
2669 /* It's not clear whether errno is always set in this case. */
2670 ERROR("%p: flow configuration failed, errno=%d: %s",
2672 (errno ? strerror(errno) : "Unknown error"));
2677 rxq->allmulti_flow = flow;
2678 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2683 * Disable allmulti mode in a RX queue.
2686 * Pointer to RX queue structure.
2689 rxq_allmulticast_disable(struct rxq *rxq)
2691 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2692 if (rxq->allmulti_flow == NULL)
2694 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2695 rxq->allmulti_flow = NULL;
2696 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2700 * Enable promiscuous mode in a RX queue.
2703 * Pointer to RX queue structure.
2706 * 0 on success, errno value on failure.
2709 rxq_promiscuous_enable(struct rxq *rxq)
2711 struct ibv_flow *flow;
2712 struct ibv_flow_attr attr = {
2713 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2715 .port = rxq->priv->port,
2721 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2722 if (rxq->promisc_flow != NULL)
2725 flow = ibv_create_flow(rxq->qp, &attr);
2727 /* It's not clear whether errno is always set in this case. */
2728 ERROR("%p: flow configuration failed, errno=%d: %s",
2730 (errno ? strerror(errno) : "Unknown error"));
2735 rxq->promisc_flow = flow;
2736 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2741 * Disable promiscuous mode in a RX queue.
2744 * Pointer to RX queue structure.
2747 rxq_promiscuous_disable(struct rxq *rxq)
2751 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2752 if (rxq->promisc_flow == NULL)
2754 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2755 rxq->promisc_flow = NULL;
2756 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2760 * Clean up a RX queue.
2762 * Destroy objects, free allocated memory and reset the structure for reuse.
2765 * Pointer to RX queue structure.
2768 rxq_cleanup(struct rxq *rxq)
2770 struct ibv_exp_release_intf_params params;
2772 DEBUG("cleaning up %p", (void *)rxq);
2774 rxq_free_elts_sp(rxq);
2777 if (rxq->if_qp != NULL) {
2778 assert(rxq->priv != NULL);
2779 assert(rxq->priv->ctx != NULL);
2780 assert(rxq->qp != NULL);
2781 params = (struct ibv_exp_release_intf_params){
2784 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2788 if (rxq->if_cq != NULL) {
2789 assert(rxq->priv != NULL);
2790 assert(rxq->priv->ctx != NULL);
2791 assert(rxq->cq != NULL);
2792 params = (struct ibv_exp_release_intf_params){
2795 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2799 if (rxq->qp != NULL) {
2800 rxq_promiscuous_disable(rxq);
2801 rxq_allmulticast_disable(rxq);
2802 rxq_mac_addrs_del(rxq);
2803 claim_zero(ibv_destroy_qp(rxq->qp));
2805 if (rxq->cq != NULL)
2806 claim_zero(ibv_destroy_cq(rxq->cq));
2807 if (rxq->rd != NULL) {
2808 struct ibv_exp_destroy_res_domain_attr attr = {
2812 assert(rxq->priv != NULL);
2813 assert(rxq->priv->ctx != NULL);
2814 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2818 if (rxq->mr != NULL)
2819 claim_zero(ibv_dereg_mr(rxq->mr));
2820 memset(rxq, 0, sizeof(*rxq));
2824 * Translate RX completion flags to packet type.
2827 * RX completion flags returned by poll_length_flags().
2830 * Packet type for struct rte_mbuf.
2832 static inline uint32_t
2833 rxq_cq_to_pkt_type(uint32_t flags)
2837 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2840 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2842 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET, RTE_PTYPE_L3_IPV6) |
2844 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_INNER_L3_IPV4) |
2846 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_INNER_L3_IPV6);
2850 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2852 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_L3_IPV6);
2857 * Translate RX completion flags to offload flags.
2860 * Pointer to RX queue structure.
2862 * RX completion flags returned by poll_length_flags().
2865 * Offload flags (ol_flags) for struct rte_mbuf.
2867 static inline uint32_t
2868 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2870 uint32_t ol_flags = 0;
2875 IBV_EXP_CQ_RX_IP_CSUM_OK,
2876 PKT_RX_IP_CKSUM_BAD) |
2878 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2879 PKT_RX_L4_CKSUM_BAD);
2881 * PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD are used in place
2882 * of PKT_RX_EIP_CKSUM_BAD because the latter is not functional
2885 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2888 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2889 PKT_RX_IP_CKSUM_BAD) |
2891 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2892 PKT_RX_L4_CKSUM_BAD);
2897 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2900 * DPDK callback for RX with scattered packets support.
2903 * Generic pointer to RX queue structure.
2905 * Array to store received packets.
2907 * Maximum number of packets in array.
2910 * Number of packets successfully received (<= pkts_n).
2913 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2915 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2916 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2917 const unsigned int elts_n = rxq->elts_n;
2918 unsigned int elts_head = rxq->elts_head;
2919 struct ibv_recv_wr head;
2920 struct ibv_recv_wr **next = &head.next;
2921 struct ibv_recv_wr *bad_wr;
2923 unsigned int pkts_ret = 0;
2926 if (unlikely(!rxq->sp))
2927 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2928 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2930 for (i = 0; (i != pkts_n); ++i) {
2931 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2932 struct ibv_recv_wr *wr = &elt->wr;
2933 uint64_t wr_id = wr->wr_id;
2935 unsigned int pkt_buf_len;
2936 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2937 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2938 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2942 /* Sanity checks. */
2946 assert(wr_id < rxq->elts_n);
2947 assert(wr->sg_list == elt->sges);
2948 assert(wr->num_sge == elemof(elt->sges));
2949 assert(elts_head < rxq->elts_n);
2950 assert(rxq->elts_head < rxq->elts_n);
2951 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2953 if (unlikely(ret < 0)) {
2957 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2959 /* ibv_poll_cq() must be used in case of failure. */
2960 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2961 if (unlikely(wcs_n == 0))
2963 if (unlikely(wcs_n < 0)) {
2964 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2965 (void *)rxq, wcs_n);
2969 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2970 /* Whatever, just repost the offending WR. */
2971 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2972 " completion status (%d): %s",
2973 (void *)rxq, wc.wr_id, wc.status,
2974 ibv_wc_status_str(wc.status));
2975 #ifdef MLX4_PMD_SOFT_COUNTERS
2976 /* Increment dropped packets counter. */
2977 ++rxq->stats.idropped;
2979 /* Link completed WRs together for repost. */
2990 /* Link completed WRs together for repost. */
2994 * Replace spent segments with new ones, concatenate and
2995 * return them as pkt_buf.
2998 struct ibv_sge *sge = &elt->sges[j];
2999 struct rte_mbuf *seg = elt->bufs[j];
3000 struct rte_mbuf *rep;
3001 unsigned int seg_tailroom;
3004 * Fetch initial bytes of packet descriptor into a
3005 * cacheline while allocating rep.
3008 rep = __rte_mbuf_raw_alloc(rxq->mp);
3009 if (unlikely(rep == NULL)) {
3011 * Unable to allocate a replacement mbuf,
3014 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3015 " can't allocate a new mbuf",
3016 (void *)rxq, wr_id);
3017 if (pkt_buf != NULL) {
3018 *pkt_buf_next = NULL;
3019 rte_pktmbuf_free(pkt_buf);
3021 /* Increase out of memory counters. */
3022 ++rxq->stats.rx_nombuf;
3023 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3027 /* Poison user-modifiable fields in rep. */
3028 NEXT(rep) = (void *)((uintptr_t)-1);
3029 SET_DATA_OFF(rep, 0xdead);
3030 DATA_LEN(rep) = 0xd00d;
3031 PKT_LEN(rep) = 0xdeadd00d;
3032 NB_SEGS(rep) = 0x2a;
3036 assert(rep->buf_len == seg->buf_len);
3037 assert(rep->buf_len == rxq->mb_len);
3038 /* Reconfigure sge to use rep instead of seg. */
3039 assert(sge->lkey == rxq->mr->lkey);
3040 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3043 /* Update pkt_buf if it's the first segment, or link
3044 * seg to the previous one and update pkt_buf_next. */
3045 *pkt_buf_next = seg;
3046 pkt_buf_next = &NEXT(seg);
3047 /* Update seg information. */
3048 seg_tailroom = (seg->buf_len - seg_headroom);
3049 assert(sge->length == seg_tailroom);
3050 SET_DATA_OFF(seg, seg_headroom);
3051 if (likely(len <= seg_tailroom)) {
3053 DATA_LEN(seg) = len;
3056 assert(rte_pktmbuf_headroom(seg) ==
3058 assert(rte_pktmbuf_tailroom(seg) ==
3059 (seg_tailroom - len));
3062 DATA_LEN(seg) = seg_tailroom;
3063 PKT_LEN(seg) = seg_tailroom;
3065 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3066 assert(rte_pktmbuf_tailroom(seg) == 0);
3067 /* Fix len and clear headroom for next segments. */
3068 len -= seg_tailroom;
3071 /* Update head and tail segments. */
3072 *pkt_buf_next = NULL;
3073 assert(pkt_buf != NULL);
3075 NB_SEGS(pkt_buf) = j;
3076 PORT(pkt_buf) = rxq->port_id;
3077 PKT_LEN(pkt_buf) = pkt_buf_len;
3078 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3079 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3081 /* Return packet. */
3082 *(pkts++) = pkt_buf;
3084 #ifdef MLX4_PMD_SOFT_COUNTERS
3085 /* Increase bytes counter. */
3086 rxq->stats.ibytes += pkt_buf_len;
3089 if (++elts_head >= elts_n)
3093 if (unlikely(i == 0))
3098 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3100 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3101 if (unlikely(ret)) {
3102 /* Inability to repost WRs is fatal. */
3103 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3109 rxq->elts_head = elts_head;
3110 #ifdef MLX4_PMD_SOFT_COUNTERS
3111 /* Increase packets counter. */
3112 rxq->stats.ipackets += pkts_ret;
3118 * DPDK callback for RX.
3120 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3121 * manage scattered packets. Improves performance when MRU is lower than the
3122 * size of the first segment.
3125 * Generic pointer to RX queue structure.
3127 * Array to store received packets.
3129 * Maximum number of packets in array.
3132 * Number of packets successfully received (<= pkts_n).
3135 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3137 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3138 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3139 const unsigned int elts_n = rxq->elts_n;
3140 unsigned int elts_head = rxq->elts_head;
3141 struct ibv_sge sges[pkts_n];
3143 unsigned int pkts_ret = 0;
3146 if (unlikely(rxq->sp))
3147 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3148 for (i = 0; (i != pkts_n); ++i) {
3149 struct rxq_elt *elt = &(*elts)[elts_head];
3150 struct ibv_recv_wr *wr = &elt->wr;
3151 uint64_t wr_id = wr->wr_id;
3153 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3154 WR_ID(wr_id).offset);
3155 struct rte_mbuf *rep;
3158 /* Sanity checks. */
3159 assert(WR_ID(wr_id).id < rxq->elts_n);
3160 assert(wr->sg_list == &elt->sge);
3161 assert(wr->num_sge == 1);
3162 assert(elts_head < rxq->elts_n);
3163 assert(rxq->elts_head < rxq->elts_n);
3165 * Fetch initial bytes of packet descriptor into a
3166 * cacheline while allocating rep.
3169 rte_prefetch0(&seg->cacheline1);
3170 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3172 if (unlikely(ret < 0)) {
3176 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3178 /* ibv_poll_cq() must be used in case of failure. */
3179 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3180 if (unlikely(wcs_n == 0))
3182 if (unlikely(wcs_n < 0)) {
3183 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3184 (void *)rxq, wcs_n);
3188 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3189 /* Whatever, just repost the offending WR. */
3190 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3191 " completion status (%d): %s",
3192 (void *)rxq, wc.wr_id, wc.status,
3193 ibv_wc_status_str(wc.status));
3194 #ifdef MLX4_PMD_SOFT_COUNTERS
3195 /* Increment dropped packets counter. */
3196 ++rxq->stats.idropped;
3198 /* Add SGE to array for repost. */
3207 rep = __rte_mbuf_raw_alloc(rxq->mp);
3208 if (unlikely(rep == NULL)) {
3210 * Unable to allocate a replacement mbuf,
3213 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3214 " can't allocate a new mbuf",
3215 (void *)rxq, WR_ID(wr_id).id);
3216 /* Increase out of memory counters. */
3217 ++rxq->stats.rx_nombuf;
3218 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3222 /* Reconfigure sge to use rep instead of seg. */
3223 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3224 assert(elt->sge.lkey == rxq->mr->lkey);
3225 WR_ID(wr->wr_id).offset =
3226 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3228 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3230 /* Add SGE to array for repost. */
3233 /* Update seg information. */
3234 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3236 PORT(seg) = rxq->port_id;
3239 DATA_LEN(seg) = len;
3240 seg->packet_type = rxq_cq_to_pkt_type(flags);
3241 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3243 /* Return packet. */
3246 #ifdef MLX4_PMD_SOFT_COUNTERS
3247 /* Increase bytes counter. */
3248 rxq->stats.ibytes += len;
3251 if (++elts_head >= elts_n)
3255 if (unlikely(i == 0))
3259 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3261 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3262 if (unlikely(ret)) {
3263 /* Inability to repost WRs is fatal. */
3264 DEBUG("%p: recv_burst(): failed (ret=%d)",
3269 rxq->elts_head = elts_head;
3270 #ifdef MLX4_PMD_SOFT_COUNTERS
3271 /* Increase packets counter. */
3272 rxq->stats.ipackets += pkts_ret;
3278 * DPDK callback for RX in secondary processes.
3280 * This function configures all queues from primary process information
3281 * if necessary before reverting to the normal RX burst callback.
3284 * Generic pointer to RX queue structure.
3286 * Array to store received packets.
3288 * Maximum number of packets in array.
3291 * Number of packets successfully received (<= pkts_n).
3294 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3297 struct rxq *rxq = dpdk_rxq;
3298 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3299 struct priv *primary_priv;
3305 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3306 /* Look for queue index in both private structures. */
3307 for (index = 0; index != priv->rxqs_n; ++index)
3308 if (((*primary_priv->rxqs)[index] == rxq) ||
3309 ((*priv->rxqs)[index] == rxq))
3311 if (index == priv->rxqs_n)
3313 rxq = (*priv->rxqs)[index];
3314 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3318 * Allocate a Queue Pair.
3319 * Optionally setup inline receive if supported.
3322 * Pointer to private structure.
3324 * Completion queue to associate with QP.
3326 * Number of descriptors in QP (hint only).
3329 * QP pointer or NULL in case of error.
3331 static struct ibv_qp *
3332 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3333 struct ibv_exp_res_domain *rd)
3335 struct ibv_exp_qp_init_attr attr = {
3336 /* CQ to be associated with the send queue. */
3338 /* CQ to be associated with the receive queue. */
3341 /* Max number of outstanding WRs. */
3342 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3343 priv->device_attr.max_qp_wr :
3345 /* Max number of scatter/gather elements in a WR. */
3346 .max_recv_sge = ((priv->device_attr.max_sge <
3347 MLX4_PMD_SGE_WR_N) ?
3348 priv->device_attr.max_sge :
3351 .qp_type = IBV_QPT_RAW_PACKET,
3352 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3353 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3359 attr.max_inl_recv = priv->inl_recv_size;
3360 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3362 return ibv_exp_create_qp(priv->ctx, &attr);
3368 * Allocate a RSS Queue Pair.
3369 * Optionally setup inline receive if supported.
3372 * Pointer to private structure.
3374 * Completion queue to associate with QP.
3376 * Number of descriptors in QP (hint only).
3378 * If nonzero, create a parent QP, otherwise a child.
3381 * QP pointer or NULL in case of error.
3383 static struct ibv_qp *
3384 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3385 int parent, struct ibv_exp_res_domain *rd)
3387 struct ibv_exp_qp_init_attr attr = {
3388 /* CQ to be associated with the send queue. */
3390 /* CQ to be associated with the receive queue. */
3393 /* Max number of outstanding WRs. */
3394 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3395 priv->device_attr.max_qp_wr :
3397 /* Max number of scatter/gather elements in a WR. */
3398 .max_recv_sge = ((priv->device_attr.max_sge <
3399 MLX4_PMD_SGE_WR_N) ?
3400 priv->device_attr.max_sge :
3403 .qp_type = IBV_QPT_RAW_PACKET,
3404 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3405 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3406 IBV_EXP_QP_INIT_ATTR_QPG),
3412 attr.max_inl_recv = priv->inl_recv_size,
3413 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3416 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3417 /* TSS isn't necessary. */
3418 attr.qpg.parent_attrib.tss_child_count = 0;
3419 attr.qpg.parent_attrib.rss_child_count = priv->rxqs_n;
3420 DEBUG("initializing parent RSS queue");
3422 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3423 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3424 DEBUG("initializing child RSS queue");
3426 return ibv_exp_create_qp(priv->ctx, &attr);
3429 #endif /* RSS_SUPPORT */
3432 * Reconfigure a RX queue with new parameters.
3434 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3435 * thread (such as a control thread), may corrupt the pool.
3436 * In case of failure, the queue is left untouched.
3439 * Pointer to Ethernet device structure.
3444 * 0 on success, errno value on failure.
3447 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3449 struct priv *priv = rxq->priv;
3450 struct rxq tmpl = *rxq;
3451 unsigned int mbuf_n;
3452 unsigned int desc_n;
3453 struct rte_mbuf **pool;
3455 struct ibv_exp_qp_attr mod;
3456 struct ibv_recv_wr *bad_wr;
3458 int parent = (rxq == &priv->rxq_parent);
3461 ERROR("%p: cannot rehash parent queue %p",
3462 (void *)dev, (void *)rxq);
3465 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3466 /* Number of descriptors and mbufs currently allocated. */
3467 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3469 /* Toggle RX checksum offload if hardware supports it. */
3470 if (priv->hw_csum) {
3471 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3472 rxq->csum = tmpl.csum;
3474 if (priv->hw_csum_l2tun) {
3475 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3476 rxq->csum_l2tun = tmpl.csum_l2tun;
3478 /* Enable scattered packets support for this queue if necessary. */
3479 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3480 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3481 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3483 desc_n /= MLX4_PMD_SGE_WR_N;
3486 DEBUG("%p: %s scattered packets support (%u WRs)",
3487 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3488 /* If scatter mode is the same as before, nothing to do. */
3489 if (tmpl.sp == rxq->sp) {
3490 DEBUG("%p: nothing to do", (void *)dev);
3493 /* Remove attached flows if RSS is disabled (no parent queue). */
3495 rxq_allmulticast_disable(&tmpl);
3496 rxq_promiscuous_disable(&tmpl);
3497 rxq_mac_addrs_del(&tmpl);
3498 /* Update original queue in case of failure. */
3499 rxq->allmulti_flow = tmpl.allmulti_flow;
3500 rxq->promisc_flow = tmpl.promisc_flow;
3501 memcpy(rxq->mac_configured, tmpl.mac_configured,
3502 sizeof(rxq->mac_configured));
3503 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3505 /* From now on, any failure will render the queue unusable.
3506 * Reinitialize QP. */
3507 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3508 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3510 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3514 err = ibv_resize_cq(tmpl.cq, desc_n);
3516 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3520 mod = (struct ibv_exp_qp_attr){
3521 /* Move the QP to this state. */
3522 .qp_state = IBV_QPS_INIT,
3523 /* Primary port number. */
3524 .port_num = priv->port
3526 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3529 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3530 #endif /* RSS_SUPPORT */
3533 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3534 (void *)dev, strerror(err));
3538 /* Reconfigure flows. Do not care for errors. */
3540 rxq_mac_addrs_add(&tmpl);
3542 rxq_promiscuous_enable(&tmpl);
3544 rxq_allmulticast_enable(&tmpl);
3545 /* Update original queue in case of failure. */
3546 rxq->allmulti_flow = tmpl.allmulti_flow;
3547 rxq->promisc_flow = tmpl.promisc_flow;
3548 memcpy(rxq->mac_configured, tmpl.mac_configured,
3549 sizeof(rxq->mac_configured));
3550 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3552 /* Allocate pool. */
3553 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3555 ERROR("%p: cannot allocate memory", (void *)dev);
3558 /* Snatch mbufs from original queue. */
3561 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3563 for (i = 0; (i != elemof(*elts)); ++i) {
3564 struct rxq_elt_sp *elt = &(*elts)[i];
3567 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3568 assert(elt->bufs[j] != NULL);
3569 pool[k++] = elt->bufs[j];
3573 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3575 for (i = 0; (i != elemof(*elts)); ++i) {
3576 struct rxq_elt *elt = &(*elts)[i];
3577 struct rte_mbuf *buf = (void *)
3578 ((uintptr_t)elt->sge.addr -
3579 WR_ID(elt->wr.wr_id).offset);
3581 assert(WR_ID(elt->wr.wr_id).id == i);
3585 assert(k == mbuf_n);
3587 tmpl.elts.sp = NULL;
3588 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3590 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3591 rxq_alloc_elts(&tmpl, desc_n, pool));
3593 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3598 assert(tmpl.elts_n == desc_n);
3599 assert(tmpl.elts.sp != NULL);
3601 /* Clean up original data. */
3603 rte_free(rxq->elts.sp);
3604 rxq->elts.sp = NULL;
3606 err = ibv_post_recv(tmpl.qp,
3608 &(*tmpl.elts.sp)[0].wr :
3609 &(*tmpl.elts.no_sp)[0].wr),
3612 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3618 mod = (struct ibv_exp_qp_attr){
3619 .qp_state = IBV_QPS_RTR
3621 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3623 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3624 (void *)dev, strerror(err));
3632 * Configure a RX queue.
3635 * Pointer to Ethernet device structure.
3637 * Pointer to RX queue structure.
3639 * Number of descriptors to configure in queue.
3641 * NUMA socket on which memory must be allocated.
3643 * Thresholds parameters.
3645 * Memory pool for buffer allocations.
3648 * 0 on success, errno value on failure.
3651 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3652 unsigned int socket, const struct rte_eth_rxconf *conf,
3653 struct rte_mempool *mp)
3655 struct priv *priv = dev->data->dev_private;
3661 struct ibv_exp_qp_attr mod;
3663 struct ibv_exp_query_intf_params params;
3664 struct ibv_exp_cq_init_attr cq;
3665 struct ibv_exp_res_domain_init_attr rd;
3667 enum ibv_exp_query_intf_status status;
3668 struct ibv_recv_wr *bad_wr;
3669 struct rte_mbuf *buf;
3671 int parent = (rxq == &priv->rxq_parent);
3673 (void)conf; /* Thresholds configuration (ignored). */
3675 * If this is a parent queue, hardware must support RSS and
3676 * RSS must be enabled.
3678 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3680 /* Even if unused, ibv_create_cq() requires at least one
3685 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3686 ERROR("%p: invalid number of RX descriptors (must be a"
3687 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3690 /* Get mbuf length. */
3691 buf = rte_pktmbuf_alloc(mp);
3693 ERROR("%p: unable to allocate mbuf", (void *)dev);
3696 tmpl.mb_len = buf->buf_len;
3697 assert((rte_pktmbuf_headroom(buf) +
3698 rte_pktmbuf_tailroom(buf)) == tmpl.mb_len);
3699 assert(rte_pktmbuf_headroom(buf) == RTE_PKTMBUF_HEADROOM);
3700 rte_pktmbuf_free(buf);
3701 /* Toggle RX checksum offload if hardware supports it. */
3703 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3704 if (priv->hw_csum_l2tun)
3705 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3706 /* Enable scattered packets support for this queue if necessary. */
3707 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3708 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3709 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3711 desc /= MLX4_PMD_SGE_WR_N;
3713 DEBUG("%p: %s scattered packets support (%u WRs)",
3714 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3715 /* Use the entire RX mempool as the memory region. */
3716 tmpl.mr = ibv_reg_mr(priv->pd,
3717 (void *)mp->elt_va_start,
3718 (mp->elt_va_end - mp->elt_va_start),
3719 (IBV_ACCESS_LOCAL_WRITE |
3720 IBV_ACCESS_REMOTE_WRITE));
3721 if (tmpl.mr == NULL) {
3723 ERROR("%p: MR creation failure: %s",
3724 (void *)dev, strerror(ret));
3728 attr.rd = (struct ibv_exp_res_domain_init_attr){
3729 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3730 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3731 .thread_model = IBV_EXP_THREAD_SINGLE,
3732 .msg_model = IBV_EXP_MSG_HIGH_BW,
3734 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3735 if (tmpl.rd == NULL) {
3737 ERROR("%p: RD creation failure: %s",
3738 (void *)dev, strerror(ret));
3741 attr.cq = (struct ibv_exp_cq_init_attr){
3742 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3743 .res_domain = tmpl.rd,
3745 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3746 if (tmpl.cq == NULL) {
3748 ERROR("%p: CQ creation failure: %s",
3749 (void *)dev, strerror(ret));
3752 DEBUG("priv->device_attr.max_qp_wr is %d",
3753 priv->device_attr.max_qp_wr);
3754 DEBUG("priv->device_attr.max_sge is %d",
3755 priv->device_attr.max_sge);
3758 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3761 #endif /* RSS_SUPPORT */
3762 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3763 if (tmpl.qp == NULL) {
3764 ret = (errno ? errno : EINVAL);
3765 ERROR("%p: QP creation failure: %s",
3766 (void *)dev, strerror(ret));
3769 mod = (struct ibv_exp_qp_attr){
3770 /* Move the QP to this state. */
3771 .qp_state = IBV_QPS_INIT,
3772 /* Primary port number. */
3773 .port_num = priv->port
3775 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3778 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3779 #endif /* RSS_SUPPORT */
3782 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3783 (void *)dev, strerror(ret));
3786 if ((parent) || (!priv->rss)) {
3787 /* Configure MAC and broadcast addresses. */
3788 ret = rxq_mac_addrs_add(&tmpl);
3790 ERROR("%p: QP flow attachment failed: %s",
3791 (void *)dev, strerror(ret));
3795 /* Allocate descriptors for RX queues, except for the RSS parent. */
3799 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3801 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3803 ERROR("%p: RXQ allocation failed: %s",
3804 (void *)dev, strerror(ret));
3807 ret = ibv_post_recv(tmpl.qp,
3809 &(*tmpl.elts.sp)[0].wr :
3810 &(*tmpl.elts.no_sp)[0].wr),
3813 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3820 mod = (struct ibv_exp_qp_attr){
3821 .qp_state = IBV_QPS_RTR
3823 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3825 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3826 (void *)dev, strerror(ret));
3830 tmpl.port_id = dev->data->port_id;
3831 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3832 attr.params = (struct ibv_exp_query_intf_params){
3833 .intf_scope = IBV_EXP_INTF_GLOBAL,
3834 .intf = IBV_EXP_INTF_CQ,
3837 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3838 if (tmpl.if_cq == NULL) {
3839 ERROR("%p: CQ interface family query failed with status %d",
3840 (void *)dev, status);
3843 attr.params = (struct ibv_exp_query_intf_params){
3844 .intf_scope = IBV_EXP_INTF_GLOBAL,
3845 .intf = IBV_EXP_INTF_QP_BURST,
3848 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3849 if (tmpl.if_qp == NULL) {
3850 ERROR("%p: QP interface family query failed with status %d",
3851 (void *)dev, status);
3854 /* Clean up rxq in case we're reinitializing it. */
3855 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3858 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3868 * DPDK callback to configure a RX queue.
3871 * Pointer to Ethernet device structure.
3875 * Number of descriptors to configure in queue.
3877 * NUMA socket on which memory must be allocated.
3879 * Thresholds parameters.
3881 * Memory pool for buffer allocations.
3884 * 0 on success, negative errno value on failure.
3887 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3888 unsigned int socket, const struct rte_eth_rxconf *conf,
3889 struct rte_mempool *mp)
3891 struct priv *priv = dev->data->dev_private;
3892 struct rxq *rxq = (*priv->rxqs)[idx];
3895 if (mlx4_is_secondary())
3896 return -E_RTE_SECONDARY;
3898 DEBUG("%p: configuring queue %u for %u descriptors",
3899 (void *)dev, idx, desc);
3900 if (idx >= priv->rxqs_n) {
3901 ERROR("%p: queue index out of range (%u >= %u)",
3902 (void *)dev, idx, priv->rxqs_n);
3907 DEBUG("%p: reusing already allocated queue index %u (%p)",
3908 (void *)dev, idx, (void *)rxq);
3909 if (priv->started) {
3913 (*priv->rxqs)[idx] = NULL;
3916 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3918 ERROR("%p: unable to allocate queue index %u",
3924 ret = rxq_setup(dev, rxq, desc, socket, conf, mp);
3928 rxq->stats.idx = idx;
3929 DEBUG("%p: adding RX queue %p to list",
3930 (void *)dev, (void *)rxq);
3931 (*priv->rxqs)[idx] = rxq;
3932 /* Update receive callback. */
3934 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3936 dev->rx_pkt_burst = mlx4_rx_burst;
3943 * DPDK callback to release a RX queue.
3946 * Generic RX queue pointer.
3949 mlx4_rx_queue_release(void *dpdk_rxq)
3951 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3955 if (mlx4_is_secondary())
3961 assert(rxq != &priv->rxq_parent);
3962 for (i = 0; (i != priv->rxqs_n); ++i)
3963 if ((*priv->rxqs)[i] == rxq) {
3964 DEBUG("%p: removing RX queue %p from list",
3965 (void *)priv->dev, (void *)rxq);
3966 (*priv->rxqs)[i] = NULL;
3975 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3978 * DPDK callback to start the device.
3980 * Simulate device start by attaching all configured flows.
3983 * Pointer to Ethernet device structure.
3986 * 0 on success, negative errno value on failure.
3989 mlx4_dev_start(struct rte_eth_dev *dev)
3991 struct priv *priv = dev->data->dev_private;
3996 if (mlx4_is_secondary())
3997 return -E_RTE_SECONDARY;
3999 if (priv->started) {
4003 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4006 rxq = &priv->rxq_parent;
4009 rxq = (*priv->rxqs)[0];
4012 /* Iterate only once when RSS is enabled. */
4016 /* Ignore nonexistent RX queues. */
4019 ret = rxq_mac_addrs_add(rxq);
4020 if (!ret && priv->promisc)
4021 ret = rxq_promiscuous_enable(rxq);
4022 if (!ret && priv->allmulti)
4023 ret = rxq_allmulticast_enable(rxq);
4026 WARN("%p: QP flow attachment failed: %s",
4027 (void *)dev, strerror(ret));
4030 rxq = (*priv->rxqs)[--i];
4032 rxq_allmulticast_disable(rxq);
4033 rxq_promiscuous_disable(rxq);
4034 rxq_mac_addrs_del(rxq);
4040 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4041 priv_dev_interrupt_handler_install(priv, dev);
4047 * DPDK callback to stop the device.
4049 * Simulate device stop by detaching all configured flows.
4052 * Pointer to Ethernet device structure.
4055 mlx4_dev_stop(struct rte_eth_dev *dev)
4057 struct priv *priv = dev->data->dev_private;
4062 if (mlx4_is_secondary())
4065 if (!priv->started) {
4069 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4072 rxq = &priv->rxq_parent;
4075 rxq = (*priv->rxqs)[0];
4078 /* Iterate only once when RSS is enabled. */
4080 /* Ignore nonexistent RX queues. */
4083 rxq_allmulticast_disable(rxq);
4084 rxq_promiscuous_disable(rxq);
4085 rxq_mac_addrs_del(rxq);
4086 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4091 * Dummy DPDK callback for TX.
4093 * This function is used to temporarily replace the real callback during
4094 * unsafe control operations on the queue, or in case of error.
4097 * Generic pointer to TX queue structure.
4099 * Packets to transmit.
4101 * Number of packets in array.
4104 * Number of packets successfully transmitted (<= pkts_n).
4107 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4116 * Dummy DPDK callback for RX.
4118 * This function is used to temporarily replace the real callback during
4119 * unsafe control operations on the queue, or in case of error.
4122 * Generic pointer to RX queue structure.
4124 * Array to store received packets.
4126 * Maximum number of packets in array.
4129 * Number of packets successfully received (<= pkts_n).
4132 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4141 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4144 * DPDK callback to close the device.
4146 * Destroy all queues and objects, free memory.
4149 * Pointer to Ethernet device structure.
4152 mlx4_dev_close(struct rte_eth_dev *dev)
4154 struct priv *priv = mlx4_get_priv(dev);
4161 DEBUG("%p: closing device \"%s\"",
4163 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4164 /* Prevent crashes when queues are still in use. This is unfortunately
4165 * still required for DPDK 1.3 because some programs (such as testpmd)
4166 * never release them before closing the device. */
4167 dev->rx_pkt_burst = removed_rx_burst;
4168 dev->tx_pkt_burst = removed_tx_burst;
4169 if (priv->rxqs != NULL) {
4170 /* XXX race condition if mlx4_rx_burst() is still running. */
4172 for (i = 0; (i != priv->rxqs_n); ++i) {
4173 tmp = (*priv->rxqs)[i];
4176 (*priv->rxqs)[i] = NULL;
4183 if (priv->txqs != NULL) {
4184 /* XXX race condition if mlx4_tx_burst() is still running. */
4186 for (i = 0; (i != priv->txqs_n); ++i) {
4187 tmp = (*priv->txqs)[i];
4190 (*priv->txqs)[i] = NULL;
4198 rxq_cleanup(&priv->rxq_parent);
4199 if (priv->pd != NULL) {
4200 assert(priv->ctx != NULL);
4201 claim_zero(ibv_dealloc_pd(priv->pd));
4202 claim_zero(ibv_close_device(priv->ctx));
4204 assert(priv->ctx == NULL);
4205 priv_dev_interrupt_handler_uninstall(priv, dev);
4207 memset(priv, 0, sizeof(*priv));
4211 * DPDK callback to get information about the device.
4214 * Pointer to Ethernet device structure.
4216 * Info structure output buffer.
4219 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4221 struct priv *priv = mlx4_get_priv(dev);
4223 char ifname[IF_NAMESIZE];
4228 /* FIXME: we should ask the device for these values. */
4229 info->min_rx_bufsize = 32;
4230 info->max_rx_pktlen = 65536;
4232 * Since we need one CQ per QP, the limit is the minimum number
4233 * between the two values.
4235 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4236 priv->device_attr.max_qp : priv->device_attr.max_cq);
4237 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4240 info->max_rx_queues = max;
4241 info->max_tx_queues = max;
4242 /* Last array entry is reserved for broadcast. */
4243 info->max_mac_addrs = (elemof(priv->mac) - 1);
4244 info->rx_offload_capa =
4246 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4247 DEV_RX_OFFLOAD_UDP_CKSUM |
4248 DEV_RX_OFFLOAD_TCP_CKSUM) :
4250 info->tx_offload_capa =
4252 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4253 DEV_TX_OFFLOAD_UDP_CKSUM |
4254 DEV_TX_OFFLOAD_TCP_CKSUM) :
4256 if (priv_get_ifname(priv, &ifname) == 0)
4257 info->if_index = if_nametoindex(ifname);
4262 * DPDK callback to get device statistics.
4265 * Pointer to Ethernet device structure.
4267 * Stats structure output buffer.
4270 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4272 struct priv *priv = mlx4_get_priv(dev);
4273 struct rte_eth_stats tmp = {0};
4280 /* Add software counters. */
4281 for (i = 0; (i != priv->rxqs_n); ++i) {
4282 struct rxq *rxq = (*priv->rxqs)[i];
4286 idx = rxq->stats.idx;
4287 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4288 #ifdef MLX4_PMD_SOFT_COUNTERS
4289 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4290 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4292 tmp.q_errors[idx] += (rxq->stats.idropped +
4293 rxq->stats.rx_nombuf);
4295 #ifdef MLX4_PMD_SOFT_COUNTERS
4296 tmp.ipackets += rxq->stats.ipackets;
4297 tmp.ibytes += rxq->stats.ibytes;
4299 tmp.ierrors += rxq->stats.idropped;
4300 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4302 for (i = 0; (i != priv->txqs_n); ++i) {
4303 struct txq *txq = (*priv->txqs)[i];
4307 idx = txq->stats.idx;
4308 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4309 #ifdef MLX4_PMD_SOFT_COUNTERS
4310 tmp.q_opackets[idx] += txq->stats.opackets;
4311 tmp.q_obytes[idx] += txq->stats.obytes;
4313 tmp.q_errors[idx] += txq->stats.odropped;
4315 #ifdef MLX4_PMD_SOFT_COUNTERS
4316 tmp.opackets += txq->stats.opackets;
4317 tmp.obytes += txq->stats.obytes;
4319 tmp.oerrors += txq->stats.odropped;
4321 #ifndef MLX4_PMD_SOFT_COUNTERS
4322 /* FIXME: retrieve and add hardware counters. */
4329 * DPDK callback to clear device statistics.
4332 * Pointer to Ethernet device structure.
4335 mlx4_stats_reset(struct rte_eth_dev *dev)
4337 struct priv *priv = mlx4_get_priv(dev);
4344 for (i = 0; (i != priv->rxqs_n); ++i) {
4345 if ((*priv->rxqs)[i] == NULL)
4347 idx = (*priv->rxqs)[i]->stats.idx;
4348 (*priv->rxqs)[i]->stats =
4349 (struct mlx4_rxq_stats){ .idx = idx };
4351 for (i = 0; (i != priv->txqs_n); ++i) {
4352 if ((*priv->txqs)[i] == NULL)
4354 idx = (*priv->txqs)[i]->stats.idx;
4355 (*priv->txqs)[i]->stats =
4356 (struct mlx4_txq_stats){ .idx = idx };
4358 #ifndef MLX4_PMD_SOFT_COUNTERS
4359 /* FIXME: reset hardware counters. */
4365 * DPDK callback to remove a MAC address.
4368 * Pointer to Ethernet device structure.
4370 * MAC address index.
4373 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4375 struct priv *priv = dev->data->dev_private;
4377 if (mlx4_is_secondary())
4380 DEBUG("%p: removing MAC address from index %" PRIu32,
4381 (void *)dev, index);
4382 /* Last array entry is reserved for broadcast. */
4383 if (index >= (elemof(priv->mac) - 1))
4385 priv_mac_addr_del(priv, index);
4391 * DPDK callback to add a MAC address.
4394 * Pointer to Ethernet device structure.
4396 * MAC address to register.
4398 * MAC address index.
4400 * VMDq pool index to associate address with (ignored).
4403 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4404 uint32_t index, uint32_t vmdq)
4406 struct priv *priv = dev->data->dev_private;
4408 if (mlx4_is_secondary())
4412 DEBUG("%p: adding MAC address at index %" PRIu32,
4413 (void *)dev, index);
4414 /* Last array entry is reserved for broadcast. */
4415 if (index >= (elemof(priv->mac) - 1))
4417 priv_mac_addr_add(priv, index,
4418 (const uint8_t (*)[ETHER_ADDR_LEN])
4419 mac_addr->addr_bytes);
4425 * DPDK callback to enable promiscuous mode.
4428 * Pointer to Ethernet device structure.
4431 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4433 struct priv *priv = dev->data->dev_private;
4437 if (mlx4_is_secondary())
4440 if (priv->promisc) {
4444 /* If device isn't started, this is all we need to do. */
4448 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4455 for (i = 0; (i != priv->rxqs_n); ++i) {
4456 if ((*priv->rxqs)[i] == NULL)
4458 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4461 /* Failure, rollback. */
4463 if ((*priv->rxqs)[--i] != NULL)
4464 rxq_promiscuous_disable((*priv->rxqs)[i]);
4474 * DPDK callback to disable promiscuous mode.
4477 * Pointer to Ethernet device structure.
4480 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4482 struct priv *priv = dev->data->dev_private;
4485 if (mlx4_is_secondary())
4488 if (!priv->promisc) {
4493 rxq_promiscuous_disable(&priv->rxq_parent);
4496 for (i = 0; (i != priv->rxqs_n); ++i)
4497 if ((*priv->rxqs)[i] != NULL)
4498 rxq_promiscuous_disable((*priv->rxqs)[i]);
4505 * DPDK callback to enable allmulti mode.
4508 * Pointer to Ethernet device structure.
4511 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4513 struct priv *priv = dev->data->dev_private;
4517 if (mlx4_is_secondary())
4520 if (priv->allmulti) {
4524 /* If device isn't started, this is all we need to do. */
4528 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4535 for (i = 0; (i != priv->rxqs_n); ++i) {
4536 if ((*priv->rxqs)[i] == NULL)
4538 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4541 /* Failure, rollback. */
4543 if ((*priv->rxqs)[--i] != NULL)
4544 rxq_allmulticast_disable((*priv->rxqs)[i]);
4554 * DPDK callback to disable allmulti mode.
4557 * Pointer to Ethernet device structure.
4560 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4562 struct priv *priv = dev->data->dev_private;
4565 if (mlx4_is_secondary())
4568 if (!priv->allmulti) {
4573 rxq_allmulticast_disable(&priv->rxq_parent);
4576 for (i = 0; (i != priv->rxqs_n); ++i)
4577 if ((*priv->rxqs)[i] != NULL)
4578 rxq_allmulticast_disable((*priv->rxqs)[i]);
4585 * DPDK callback to retrieve physical link information (unlocked version).
4588 * Pointer to Ethernet device structure.
4589 * @param wait_to_complete
4590 * Wait for request completion (ignored).
4593 mlx4_link_update_unlocked(struct rte_eth_dev *dev, int wait_to_complete)
4595 struct priv *priv = mlx4_get_priv(dev);
4596 struct ethtool_cmd edata = {
4600 struct rte_eth_link dev_link;
4605 (void)wait_to_complete;
4606 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4607 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4610 memset(&dev_link, 0, sizeof(dev_link));
4611 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4612 (ifr.ifr_flags & IFF_RUNNING));
4613 ifr.ifr_data = &edata;
4614 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4615 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4619 link_speed = ethtool_cmd_speed(&edata);
4620 if (link_speed == -1)
4621 dev_link.link_speed = 0;
4623 dev_link.link_speed = link_speed;
4624 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4625 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4626 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4627 /* Link status changed. */
4628 dev->data->dev_link = dev_link;
4631 /* Link status is still the same. */
4636 * DPDK callback to retrieve physical link information.
4639 * Pointer to Ethernet device structure.
4640 * @param wait_to_complete
4641 * Wait for request completion (ignored).
4644 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4646 struct priv *priv = mlx4_get_priv(dev);
4652 ret = mlx4_link_update_unlocked(dev, wait_to_complete);
4658 * DPDK callback to change the MTU.
4660 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4661 * received). Use this as a hint to enable/disable scattered packets support
4662 * and improve performance when not needed.
4663 * Since failure is not an option, reconfiguring queues on the fly is not
4667 * Pointer to Ethernet device structure.
4672 * 0 on success, negative errno value on failure.
4675 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4677 struct priv *priv = dev->data->dev_private;
4680 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4683 if (mlx4_is_secondary())
4684 return -E_RTE_SECONDARY;
4686 /* Set kernel interface MTU first. */
4687 if (priv_set_mtu(priv, mtu)) {
4689 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4693 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4695 /* Temporarily replace RX handler with a fake one, assuming it has not
4696 * been copied elsewhere. */
4697 dev->rx_pkt_burst = removed_rx_burst;
4698 /* Make sure everyone has left mlx4_rx_burst() and uses
4699 * removed_rx_burst() instead. */
4702 /* Reconfigure each RX queue. */
4703 for (i = 0; (i != priv->rxqs_n); ++i) {
4704 struct rxq *rxq = (*priv->rxqs)[i];
4705 unsigned int max_frame_len;
4710 /* Calculate new maximum frame length according to MTU and
4711 * toggle scattered support (sp) if necessary. */
4712 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4713 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4714 sp = (max_frame_len > (rxq->mb_len - RTE_PKTMBUF_HEADROOM));
4715 /* Provide new values to rxq_setup(). */
4716 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4717 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4718 ret = rxq_rehash(dev, rxq);
4720 /* Force SP RX if that queue requires it and abort. */
4722 rx_func = mlx4_rx_burst_sp;
4725 /* Reenable non-RSS queue attributes. No need to check
4726 * for errors at this stage. */
4728 rxq_mac_addrs_add(rxq);
4730 rxq_promiscuous_enable(rxq);
4732 rxq_allmulticast_enable(rxq);
4734 /* Scattered burst function takes priority. */
4736 rx_func = mlx4_rx_burst_sp;
4738 /* Burst functions can now be called again. */
4740 dev->rx_pkt_burst = rx_func;
4748 * DPDK callback to get flow control status.
4751 * Pointer to Ethernet device structure.
4752 * @param[out] fc_conf
4753 * Flow control output buffer.
4756 * 0 on success, negative errno value on failure.
4759 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4761 struct priv *priv = dev->data->dev_private;
4763 struct ethtool_pauseparam ethpause = {
4764 .cmd = ETHTOOL_GPAUSEPARAM
4768 if (mlx4_is_secondary())
4769 return -E_RTE_SECONDARY;
4770 ifr.ifr_data = ðpause;
4772 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4774 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4780 fc_conf->autoneg = ethpause.autoneg;
4781 if (ethpause.rx_pause && ethpause.tx_pause)
4782 fc_conf->mode = RTE_FC_FULL;
4783 else if (ethpause.rx_pause)
4784 fc_conf->mode = RTE_FC_RX_PAUSE;
4785 else if (ethpause.tx_pause)
4786 fc_conf->mode = RTE_FC_TX_PAUSE;
4788 fc_conf->mode = RTE_FC_NONE;
4798 * DPDK callback to modify flow control parameters.
4801 * Pointer to Ethernet device structure.
4802 * @param[in] fc_conf
4803 * Flow control parameters.
4806 * 0 on success, negative errno value on failure.
4809 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4811 struct priv *priv = dev->data->dev_private;
4813 struct ethtool_pauseparam ethpause = {
4814 .cmd = ETHTOOL_SPAUSEPARAM
4818 if (mlx4_is_secondary())
4819 return -E_RTE_SECONDARY;
4820 ifr.ifr_data = ðpause;
4821 ethpause.autoneg = fc_conf->autoneg;
4822 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4823 (fc_conf->mode & RTE_FC_RX_PAUSE))
4824 ethpause.rx_pause = 1;
4826 ethpause.rx_pause = 0;
4828 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4829 (fc_conf->mode & RTE_FC_TX_PAUSE))
4830 ethpause.tx_pause = 1;
4832 ethpause.tx_pause = 0;
4835 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4837 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4851 * Configure a VLAN filter.
4854 * Pointer to Ethernet device structure.
4856 * VLAN ID to filter.
4861 * 0 on success, errno value on failure.
4864 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4866 struct priv *priv = dev->data->dev_private;
4868 unsigned int j = -1;
4870 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4871 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4872 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4873 if (!priv->vlan_filter[i].enabled) {
4874 /* Unused index, remember it. */
4878 if (priv->vlan_filter[i].id != vlan_id)
4880 /* This VLAN ID is already known, use its index. */
4884 /* Check if there's room for another VLAN filter. */
4885 if (j == (unsigned int)-1)
4888 * VLAN filters apply to all configured MAC addresses, flow
4889 * specifications must be reconfigured accordingly.
4891 priv->vlan_filter[j].id = vlan_id;
4892 if ((on) && (!priv->vlan_filter[j].enabled)) {
4894 * Filter is disabled, enable it.
4895 * Rehashing flows in all RX queues is necessary.
4898 rxq_mac_addrs_del(&priv->rxq_parent);
4900 for (i = 0; (i != priv->rxqs_n); ++i)
4901 if ((*priv->rxqs)[i] != NULL)
4902 rxq_mac_addrs_del((*priv->rxqs)[i]);
4903 priv->vlan_filter[j].enabled = 1;
4904 if (priv->started) {
4906 rxq_mac_addrs_add(&priv->rxq_parent);
4908 for (i = 0; (i != priv->rxqs_n); ++i) {
4909 if ((*priv->rxqs)[i] == NULL)
4911 rxq_mac_addrs_add((*priv->rxqs)[i]);
4914 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
4916 * Filter is enabled, disable it.
4917 * Rehashing flows in all RX queues is necessary.
4920 rxq_mac_addrs_del(&priv->rxq_parent);
4922 for (i = 0; (i != priv->rxqs_n); ++i)
4923 if ((*priv->rxqs)[i] != NULL)
4924 rxq_mac_addrs_del((*priv->rxqs)[i]);
4925 priv->vlan_filter[j].enabled = 0;
4926 if (priv->started) {
4928 rxq_mac_addrs_add(&priv->rxq_parent);
4930 for (i = 0; (i != priv->rxqs_n); ++i) {
4931 if ((*priv->rxqs)[i] == NULL)
4933 rxq_mac_addrs_add((*priv->rxqs)[i]);
4941 * DPDK callback to configure a VLAN filter.
4944 * Pointer to Ethernet device structure.
4946 * VLAN ID to filter.
4951 * 0 on success, negative errno value on failure.
4954 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4956 struct priv *priv = dev->data->dev_private;
4959 if (mlx4_is_secondary())
4960 return -E_RTE_SECONDARY;
4962 ret = vlan_filter_set(dev, vlan_id, on);
4968 static const struct eth_dev_ops mlx4_dev_ops = {
4969 .dev_configure = mlx4_dev_configure,
4970 .dev_start = mlx4_dev_start,
4971 .dev_stop = mlx4_dev_stop,
4972 .dev_close = mlx4_dev_close,
4973 .promiscuous_enable = mlx4_promiscuous_enable,
4974 .promiscuous_disable = mlx4_promiscuous_disable,
4975 .allmulticast_enable = mlx4_allmulticast_enable,
4976 .allmulticast_disable = mlx4_allmulticast_disable,
4977 .link_update = mlx4_link_update,
4978 .stats_get = mlx4_stats_get,
4979 .stats_reset = mlx4_stats_reset,
4980 .queue_stats_mapping_set = NULL,
4981 .dev_infos_get = mlx4_dev_infos_get,
4982 .vlan_filter_set = mlx4_vlan_filter_set,
4983 .vlan_tpid_set = NULL,
4984 .vlan_strip_queue_set = NULL,
4985 .vlan_offload_set = NULL,
4986 .rx_queue_setup = mlx4_rx_queue_setup,
4987 .tx_queue_setup = mlx4_tx_queue_setup,
4988 .rx_queue_release = mlx4_rx_queue_release,
4989 .tx_queue_release = mlx4_tx_queue_release,
4991 .dev_led_off = NULL,
4992 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
4993 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
4994 .priority_flow_ctrl_set = NULL,
4995 .mac_addr_remove = mlx4_mac_addr_remove,
4996 .mac_addr_add = mlx4_mac_addr_add,
4997 .mtu_set = mlx4_dev_set_mtu,
5001 * Get PCI information from struct ibv_device.
5004 * Pointer to Ethernet device structure.
5005 * @param[out] pci_addr
5006 * PCI bus address output buffer.
5009 * 0 on success, -1 on failure and errno is set.
5012 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5013 struct rte_pci_addr *pci_addr)
5017 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5019 file = fopen(path, "rb");
5022 while (fgets(line, sizeof(line), file) == line) {
5023 size_t len = strlen(line);
5026 /* Truncate long lines. */
5027 if (len == (sizeof(line) - 1))
5028 while (line[(len - 1)] != '\n') {
5032 line[(len - 1)] = ret;
5034 /* Extract information. */
5037 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5041 &pci_addr->function) == 4) {
5051 * Get MAC address by querying netdevice.
5054 * struct priv for the requested device.
5056 * MAC address output buffer.
5059 * 0 on success, -1 on failure and errno is set.
5062 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5064 struct ifreq request;
5066 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5068 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5072 /* Support up to 32 adapters. */
5074 struct rte_pci_addr pci_addr; /* associated PCI address */
5075 uint32_t ports; /* physical ports bitfield. */
5079 * Get device index in mlx4_dev[] from PCI bus address.
5081 * @param[in] pci_addr
5082 * PCI bus address to look for.
5085 * mlx4_dev[] index on success, -1 on failure.
5088 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5093 assert(pci_addr != NULL);
5094 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5095 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5096 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5097 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5098 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5100 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5107 * Retrieve integer value from environment variable.
5110 * Environment variable name.
5113 * Integer value, 0 if the variable is not set.
5116 mlx4_getenv_int(const char *name)
5118 const char *val = getenv(name);
5126 mlx4_dev_link_status_handler(void *);
5128 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5131 * Link status handler.
5134 * Pointer to private structure.
5136 * Pointer to the rte_eth_dev structure.
5139 * Nonzero if the callback process can be called immediately.
5142 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5144 struct ibv_async_event event;
5145 int port_change = 0;
5148 /* Read all message and acknowledge them. */
5150 if (ibv_get_async_event(priv->ctx, &event))
5153 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5154 event.event_type == IBV_EVENT_PORT_ERR)
5157 DEBUG("event type %d on port %d not handled",
5158 event.event_type, event.element.port_num);
5159 ibv_ack_async_event(&event);
5162 if (port_change ^ priv->pending_alarm) {
5163 struct rte_eth_link *link = &dev->data->dev_link;
5165 priv->pending_alarm = 0;
5166 mlx4_link_update_unlocked(dev, 0);
5167 if (((link->link_speed == 0) && link->link_status) ||
5168 ((link->link_speed != 0) && !link->link_status)) {
5169 /* Inconsistent status, check again later. */
5170 priv->pending_alarm = 1;
5171 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5172 mlx4_dev_link_status_handler,
5181 * Handle delayed link status event.
5184 * Registered argument.
5187 mlx4_dev_link_status_handler(void *arg)
5189 struct rte_eth_dev *dev = arg;
5190 struct priv *priv = dev->data->dev_private;
5194 assert(priv->pending_alarm == 1);
5195 ret = priv_dev_link_status_handler(priv, dev);
5198 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5202 * Handle interrupts from the NIC.
5204 * @param[in] intr_handle
5205 * Interrupt handler.
5207 * Callback argument.
5210 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5212 struct rte_eth_dev *dev = cb_arg;
5213 struct priv *priv = dev->data->dev_private;
5218 ret = priv_dev_link_status_handler(priv, dev);
5221 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5225 * Uninstall interrupt handler.
5228 * Pointer to private structure.
5230 * Pointer to the rte_eth_dev structure.
5233 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5235 if (!dev->data->dev_conf.intr_conf.lsc)
5237 rte_intr_callback_unregister(&priv->intr_handle,
5238 mlx4_dev_interrupt_handler,
5240 if (priv->pending_alarm)
5241 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5242 priv->pending_alarm = 0;
5243 priv->intr_handle.fd = 0;
5244 priv->intr_handle.type = 0;
5248 * Install interrupt handler.
5251 * Pointer to private structure.
5253 * Pointer to the rte_eth_dev structure.
5256 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5260 if (!dev->data->dev_conf.intr_conf.lsc)
5262 assert(priv->ctx->async_fd > 0);
5263 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5264 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5266 INFO("failed to change file descriptor async event queue");
5267 dev->data->dev_conf.intr_conf.lsc = 0;
5269 priv->intr_handle.fd = priv->ctx->async_fd;
5270 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5271 rte_intr_callback_register(&priv->intr_handle,
5272 mlx4_dev_interrupt_handler,
5277 static struct eth_driver mlx4_driver;
5280 * DPDK callback to register a PCI device.
5282 * This function creates an Ethernet device for each port of a given
5285 * @param[in] pci_drv
5286 * PCI driver structure (mlx4_driver).
5287 * @param[in] pci_dev
5288 * PCI device information.
5291 * 0 on success, negative errno value on failure.
5294 mlx4_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5296 struct ibv_device **list;
5297 struct ibv_device *ibv_dev;
5299 struct ibv_context *attr_ctx = NULL;
5300 struct ibv_device_attr device_attr;
5306 assert(pci_drv == &mlx4_driver.pci_drv);
5307 /* Get mlx4_dev[] index. */
5308 idx = mlx4_dev_idx(&pci_dev->addr);
5310 ERROR("this driver cannot support any more adapters");
5313 DEBUG("using driver device index %d", idx);
5315 /* Save PCI address. */
5316 mlx4_dev[idx].pci_addr = pci_dev->addr;
5317 list = ibv_get_device_list(&i);
5320 if (errno == ENOSYS) {
5321 WARN("cannot list devices, is ib_uverbs loaded?");
5328 * For each listed device, check related sysfs entry against
5329 * the provided PCI ID.
5332 struct rte_pci_addr pci_addr;
5335 DEBUG("checking device \"%s\"", list[i]->name);
5336 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5338 if ((pci_dev->addr.domain != pci_addr.domain) ||
5339 (pci_dev->addr.bus != pci_addr.bus) ||
5340 (pci_dev->addr.devid != pci_addr.devid) ||
5341 (pci_dev->addr.function != pci_addr.function))
5343 vf = (pci_dev->id.device_id ==
5344 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5345 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5346 list[i]->name, (vf ? "true" : "false"));
5347 attr_ctx = ibv_open_device(list[i]);
5351 if (attr_ctx == NULL) {
5352 ibv_free_device_list(list);
5355 WARN("cannot access device, is mlx4_ib loaded?");
5358 WARN("cannot use device, are drivers up to date?");
5366 DEBUG("device opened");
5367 if (ibv_query_device(attr_ctx, &device_attr))
5369 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5371 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5372 uint32_t port = i + 1; /* ports are indexed from one */
5373 uint32_t test = (1 << i);
5374 struct ibv_context *ctx = NULL;
5375 struct ibv_port_attr port_attr;
5376 struct ibv_pd *pd = NULL;
5377 struct priv *priv = NULL;
5378 struct rte_eth_dev *eth_dev = NULL;
5379 #ifdef HAVE_EXP_QUERY_DEVICE
5380 struct ibv_exp_device_attr exp_device_attr;
5381 #endif /* HAVE_EXP_QUERY_DEVICE */
5382 struct ether_addr mac;
5384 #ifdef HAVE_EXP_QUERY_DEVICE
5385 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5387 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5388 #endif /* RSS_SUPPORT */
5389 #endif /* HAVE_EXP_QUERY_DEVICE */
5391 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5393 ctx = ibv_open_device(ibv_dev);
5397 /* Check port status. */
5398 err = ibv_query_port(ctx, port, &port_attr);
5400 ERROR("port query failed: %s", strerror(err));
5403 if (port_attr.state != IBV_PORT_ACTIVE)
5404 DEBUG("port %d is not active: \"%s\" (%d)",
5405 port, ibv_port_state_str(port_attr.state),
5408 /* Allocate protection domain. */
5409 pd = ibv_alloc_pd(ctx);
5411 ERROR("PD allocation failure");
5416 mlx4_dev[idx].ports |= test;
5418 /* from rte_ethdev.c */
5419 priv = rte_zmalloc("ethdev private structure",
5421 RTE_CACHE_LINE_SIZE);
5423 ERROR("priv allocation failure");
5429 priv->device_attr = device_attr;
5432 priv->mtu = ETHER_MTU;
5433 #ifdef HAVE_EXP_QUERY_DEVICE
5434 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5435 ERROR("ibv_exp_query_device() failed");
5439 if ((exp_device_attr.exp_device_cap_flags &
5440 IBV_EXP_DEVICE_QPG) &&
5441 (exp_device_attr.exp_device_cap_flags &
5442 IBV_EXP_DEVICE_UD_RSS) &&
5443 (exp_device_attr.comp_mask &
5444 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5445 (exp_device_attr.max_rss_tbl_sz > 0)) {
5448 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5452 priv->max_rss_tbl_sz = 0;
5454 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5455 IBV_EXP_DEVICE_UD_TSS);
5456 DEBUG("device flags: %s%s%s",
5457 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5458 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5459 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5461 DEBUG("maximum RSS indirection table size: %u",
5462 exp_device_attr.max_rss_tbl_sz);
5463 #endif /* RSS_SUPPORT */
5466 ((exp_device_attr.exp_device_cap_flags &
5467 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5468 (exp_device_attr.exp_device_cap_flags &
5469 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5470 DEBUG("checksum offloading is %ssupported",
5471 (priv->hw_csum ? "" : "not "));
5473 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5474 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5475 DEBUG("L2 tunnel checksum offloads are %ssupported",
5476 (priv->hw_csum_l2tun ? "" : "not "));
5479 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5481 if (priv->inl_recv_size) {
5482 exp_device_attr.comp_mask =
5483 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5484 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5485 INFO("Couldn't query device for inline-receive"
5487 priv->inl_recv_size = 0;
5489 if ((unsigned)exp_device_attr.inline_recv_sz <
5490 priv->inl_recv_size) {
5491 INFO("Max inline-receive (%d) <"
5492 " requested inline-receive (%u)",
5493 exp_device_attr.inline_recv_sz,
5494 priv->inl_recv_size);
5495 priv->inl_recv_size =
5496 exp_device_attr.inline_recv_sz;
5499 INFO("Set inline receive size to %u",
5500 priv->inl_recv_size);
5502 #endif /* INLINE_RECV */
5503 #endif /* HAVE_EXP_QUERY_DEVICE */
5505 (void)mlx4_getenv_int;
5507 /* Configure the first MAC address by default. */
5508 if (priv_get_mac(priv, &mac.addr_bytes)) {
5509 ERROR("cannot get MAC address, is mlx4_en loaded?"
5510 " (errno: %s)", strerror(errno));
5513 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5515 mac.addr_bytes[0], mac.addr_bytes[1],
5516 mac.addr_bytes[2], mac.addr_bytes[3],
5517 mac.addr_bytes[4], mac.addr_bytes[5]);
5518 /* Register MAC and broadcast addresses. */
5519 claim_zero(priv_mac_addr_add(priv, 0,
5520 (const uint8_t (*)[ETHER_ADDR_LEN])
5522 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5523 &(const uint8_t [ETHER_ADDR_LEN])
5524 { "\xff\xff\xff\xff\xff\xff" }));
5527 char ifname[IF_NAMESIZE];
5529 if (priv_get_ifname(priv, &ifname) == 0)
5530 DEBUG("port %u ifname is \"%s\"",
5531 priv->port, ifname);
5533 DEBUG("port %u ifname is unknown", priv->port);
5536 /* Get actual MTU if possible. */
5537 priv_get_mtu(priv, &priv->mtu);
5538 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5540 /* from rte_ethdev.c */
5542 char name[RTE_ETH_NAME_MAX_LEN];
5544 snprintf(name, sizeof(name), "%s port %u",
5545 ibv_get_device_name(ibv_dev), port);
5546 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
5548 if (eth_dev == NULL) {
5549 ERROR("can not allocate rte ethdev");
5554 /* Secondary processes have to use local storage for their
5555 * private data as well as a copy of eth_dev->data, but this
5556 * pointer must not be modified before burst functions are
5557 * actually called. */
5558 if (mlx4_is_secondary()) {
5559 struct mlx4_secondary_data *sd =
5560 &mlx4_secondary_data[eth_dev->data->port_id];
5562 sd->primary_priv = eth_dev->data->dev_private;
5563 if (sd->primary_priv == NULL) {
5564 ERROR("no private data for port %u",
5565 eth_dev->data->port_id);
5569 sd->shared_dev_data = eth_dev->data;
5570 rte_spinlock_init(&sd->lock);
5571 memcpy(sd->data.name, sd->shared_dev_data->name,
5572 sizeof(sd->data.name));
5573 sd->data.dev_private = priv;
5574 sd->data.rx_mbuf_alloc_failed = 0;
5575 sd->data.mtu = ETHER_MTU;
5576 sd->data.port_id = sd->shared_dev_data->port_id;
5577 sd->data.mac_addrs = priv->mac;
5578 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5579 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5581 eth_dev->data->dev_private = priv;
5582 eth_dev->data->rx_mbuf_alloc_failed = 0;
5583 eth_dev->data->mtu = ETHER_MTU;
5584 eth_dev->data->mac_addrs = priv->mac;
5586 eth_dev->pci_dev = pci_dev;
5588 rte_eth_copy_pci_info(eth_dev, pci_dev);
5590 eth_dev->driver = &mlx4_driver;
5592 priv->dev = eth_dev;
5593 eth_dev->dev_ops = &mlx4_dev_ops;
5594 TAILQ_INIT(ð_dev->link_intr_cbs);
5596 /* Bring Ethernet device up. */
5597 DEBUG("forcing Ethernet interface up");
5598 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5604 claim_zero(ibv_dealloc_pd(pd));
5606 claim_zero(ibv_close_device(ctx));
5608 rte_eth_dev_release_port(eth_dev);
5613 * XXX if something went wrong in the loop above, there is a resource
5614 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5615 * long as the dpdk does not provide a way to deallocate a ethdev and a
5616 * way to enumerate the registered ethdevs to free the previous ones.
5619 /* no port found, complain */
5620 if (!mlx4_dev[idx].ports) {
5627 claim_zero(ibv_close_device(attr_ctx));
5629 ibv_free_device_list(list);
5634 static const struct rte_pci_id mlx4_pci_id_map[] = {
5636 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5637 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3,
5638 .subsystem_vendor_id = PCI_ANY_ID,
5639 .subsystem_device_id = PCI_ANY_ID
5642 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5643 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO,
5644 .subsystem_vendor_id = PCI_ANY_ID,
5645 .subsystem_device_id = PCI_ANY_ID
5648 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5649 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3VF,
5650 .subsystem_vendor_id = PCI_ANY_ID,
5651 .subsystem_device_id = PCI_ANY_ID
5658 static struct eth_driver mlx4_driver = {
5660 .name = MLX4_DRIVER_NAME,
5661 .id_table = mlx4_pci_id_map,
5662 .devinit = mlx4_pci_devinit,
5663 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5665 .dev_private_size = sizeof(struct priv)
5669 * Driver initialization routine.
5672 rte_mlx4_pmd_init(const char *name, const char *args)
5677 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5679 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5680 * huge pages. Calling ibv_fork_init() during init allows
5681 * applications to use fork() safely for purposes other than
5682 * using this PMD, which is not supported in forked processes.
5684 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5686 rte_eal_pci_register(&mlx4_driver.pci_drv);
5690 static struct rte_driver rte_mlx4_driver = {
5692 .name = MLX4_DRIVER_NAME,
5693 .init = rte_mlx4_pmd_init,
5696 PMD_REGISTER_DRIVER(rte_mlx4_driver)