4 * Copyright 2012-2015 6WIND S.A.
5 * Copyright 2012 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
58 #include <linux/ethtool.h>
59 #include <linux/sockios.h>
63 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
65 #pragma GCC diagnostic ignored "-pedantic"
67 #include <infiniband/verbs.h>
69 #pragma GCC diagnostic error "-pedantic"
72 /* DPDK headers don't like -pedantic. */
74 #pragma GCC diagnostic ignored "-pedantic"
76 #include <rte_ether.h>
77 #include <rte_ethdev.h>
80 #include <rte_errno.h>
81 #include <rte_mempool.h>
82 #include <rte_prefetch.h>
83 #include <rte_malloc.h>
84 #include <rte_spinlock.h>
85 #include <rte_atomic.h>
86 #include <rte_version.h>
88 #include <rte_alarm.h>
89 #include <rte_memory.h>
91 #pragma GCC diagnostic error "-pedantic"
94 /* Generated configuration header. */
95 #include "mlx4_autoconf.h"
100 /* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
101 * Intermediate LOG_*() macros add the required end-of-line characters. */
103 #define INFO(...) DEBUG(__VA_ARGS__)
104 #define WARN(...) DEBUG(__VA_ARGS__)
105 #define ERROR(...) DEBUG(__VA_ARGS__)
107 #define LOG__(level, m, ...) \
108 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
109 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
110 #define INFO(...) LOG_(INFO, __VA_ARGS__)
111 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
112 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
115 /* Convenience macros for accessing mbuf fields. */
116 #define NEXT(m) ((m)->next)
117 #define DATA_LEN(m) ((m)->data_len)
118 #define PKT_LEN(m) ((m)->pkt_len)
119 #define DATA_OFF(m) ((m)->data_off)
120 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
121 #define NB_SEGS(m) ((m)->nb_segs)
122 #define PORT(m) ((m)->port)
124 /* Work Request ID data type (64 bit). */
133 #define WR_ID(o) (((wr_id_t *)&(o))->data)
135 /* Transpose flags. Useful to convert IBV to DPDK flags. */
136 #define TRANSPOSE(val, from, to) \
137 (((from) >= (to)) ? \
138 (((val) & (from)) / ((from) / (to))) : \
139 (((val) & (from)) * ((to) / (from))))
141 struct mlx4_rxq_stats {
142 unsigned int idx; /**< Mapping index. */
143 #ifdef MLX4_PMD_SOFT_COUNTERS
144 uint64_t ipackets; /**< Total of successfully received packets. */
145 uint64_t ibytes; /**< Total of successfully received bytes. */
147 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
148 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
151 struct mlx4_txq_stats {
152 unsigned int idx; /**< Mapping index. */
153 #ifdef MLX4_PMD_SOFT_COUNTERS
154 uint64_t opackets; /**< Total of successfully sent packets. */
155 uint64_t obytes; /**< Total of successfully sent bytes. */
157 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
160 /* RX element (scattered packets). */
162 struct ibv_recv_wr wr; /* Work Request. */
163 struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
164 struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
169 struct ibv_recv_wr wr; /* Work Request. */
170 struct ibv_sge sge; /* Scatter/Gather Element. */
171 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
174 /* RX queue descriptor. */
176 struct priv *priv; /* Back pointer to private data. */
177 struct rte_mempool *mp; /* Memory Pool for allocations. */
178 struct ibv_mr *mr; /* Memory Region (for mp). */
179 struct ibv_cq *cq; /* Completion Queue. */
180 struct ibv_qp *qp; /* Queue Pair. */
181 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
182 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
184 * Each VLAN ID requires a separate flow steering rule.
186 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
187 struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
188 struct ibv_flow *promisc_flow; /* Promiscuous flow. */
189 struct ibv_flow *allmulti_flow; /* Multicast flow. */
190 unsigned int port_id; /* Port ID for incoming packets. */
191 unsigned int elts_n; /* (*elts)[] length. */
192 unsigned int elts_head; /* Current index in (*elts)[]. */
194 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
195 struct rxq_elt (*no_sp)[]; /* RX elements. */
197 unsigned int sp:1; /* Use scattered RX elements. */
198 unsigned int csum:1; /* Enable checksum offloading. */
199 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
200 uint32_t mb_len; /* Length of a mp-issued mbuf. */
201 struct mlx4_rxq_stats stats; /* RX queue counters. */
202 unsigned int socket; /* CPU socket ID for allocations. */
203 struct ibv_exp_res_domain *rd; /* Resource Domain. */
208 struct rte_mbuf *buf;
211 /* Linear buffer type. It is used when transmitting buffers with too many
212 * segments that do not fit the hardware queue (see max_send_sge).
213 * Extra segments are copied (linearized) in such buffers, replacing the
214 * last SGE during TX.
215 * The size is arbitrary but large enough to hold a jumbo frame with
216 * 8 segments considering mbuf.buf_len is about 2048 bytes. */
217 typedef uint8_t linear_t[16384];
219 /* TX queue descriptor. */
221 struct priv *priv; /* Back pointer to private data. */
223 const struct rte_mempool *mp; /* Cached Memory Pool. */
224 struct ibv_mr *mr; /* Memory Region (for mp). */
225 uint32_t lkey; /* mr->lkey */
226 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
227 struct ibv_cq *cq; /* Completion Queue. */
228 struct ibv_qp *qp; /* Queue Pair. */
229 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
230 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
231 #if MLX4_PMD_MAX_INLINE > 0
232 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
234 unsigned int elts_n; /* (*elts)[] length. */
235 struct txq_elt (*elts)[]; /* TX elements. */
236 unsigned int elts_head; /* Current index in (*elts)[]. */
237 unsigned int elts_tail; /* First element awaiting completion. */
238 unsigned int elts_comp; /* Number of completion requests. */
239 unsigned int elts_comp_cd; /* Countdown for next completion request. */
240 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
241 struct mlx4_txq_stats stats; /* TX queue counters. */
242 linear_t (*elts_linear)[]; /* Linearized buffers. */
243 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
244 unsigned int socket; /* CPU socket ID for allocations. */
245 struct ibv_exp_res_domain *rd; /* Resource Domain. */
249 struct rte_eth_dev *dev; /* Ethernet device. */
250 struct ibv_context *ctx; /* Verbs context. */
251 struct ibv_device_attr device_attr; /* Device properties. */
252 struct ibv_pd *pd; /* Protection Domain. */
254 * MAC addresses array and configuration bit-field.
255 * An extra entry that cannot be modified by the DPDK is reserved
256 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
258 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
259 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
262 unsigned int enabled:1; /* If enabled. */
263 unsigned int id:12; /* VLAN ID (0-4095). */
264 } vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
265 /* Device properties. */
266 uint16_t mtu; /* Configured MTU. */
267 uint8_t port; /* Physical port number. */
268 unsigned int started:1; /* Device started, flows enabled. */
269 unsigned int promisc:1; /* Device in promiscuous mode. */
270 unsigned int allmulti:1; /* Device receives all multicast packets. */
271 unsigned int hw_qpg:1; /* QP groups are supported. */
272 unsigned int hw_tss:1; /* TSS is supported. */
273 unsigned int hw_rss:1; /* RSS is supported. */
274 unsigned int hw_csum:1; /* Checksum offload is supported. */
275 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
276 unsigned int rss:1; /* RSS is enabled. */
277 unsigned int vf:1; /* This is a VF device. */
278 unsigned int pending_alarm:1; /* An alarm is pending. */
280 unsigned int inl_recv_size; /* Inline recv size */
282 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
284 struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
285 unsigned int rxqs_n; /* RX queues array size. */
286 unsigned int txqs_n; /* TX queues array size. */
287 struct rxq *(*rxqs)[]; /* RX queues. */
288 struct txq *(*txqs)[]; /* TX queues. */
289 struct rte_intr_handle intr_handle; /* Interrupt handler. */
290 rte_spinlock_t lock; /* Lock for control functions. */
293 /* Local storage for secondary process data. */
294 struct mlx4_secondary_data {
295 struct rte_eth_dev_data data; /* Local device data. */
296 struct priv *primary_priv; /* Private structure from primary. */
297 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
298 rte_spinlock_t lock; /* Port configuration lock. */
299 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
302 * Check if running as a secondary process.
305 * Nonzero if running as a secondary process.
308 mlx4_is_secondary(void)
310 return rte_eal_process_type() != RTE_PROC_PRIMARY;
314 * Return private structure associated with an Ethernet device.
317 * Pointer to Ethernet device structure.
320 * Pointer to private structure.
323 mlx4_get_priv(struct rte_eth_dev *dev)
325 struct mlx4_secondary_data *sd;
327 if (!mlx4_is_secondary())
328 return dev->data->dev_private;
329 sd = &mlx4_secondary_data[dev->data->port_id];
330 return sd->data.dev_private;
334 * Lock private structure to protect it from concurrent access in the
338 * Pointer to private structure.
341 priv_lock(struct priv *priv)
343 rte_spinlock_lock(&priv->lock);
347 * Unlock private structure.
350 * Pointer to private structure.
353 priv_unlock(struct priv *priv)
355 rte_spinlock_unlock(&priv->lock);
358 /* Allocate a buffer on the stack and fill it with a printf format string. */
359 #define MKSTR(name, ...) \
360 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
362 snprintf(name, sizeof(name), __VA_ARGS__)
365 * Get interface name from private structure.
368 * Pointer to private structure.
370 * Interface name output buffer.
373 * 0 on success, -1 on failure and errno is set.
376 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
380 unsigned int dev_type = 0;
381 unsigned int dev_port_prev = ~0u;
382 char match[IF_NAMESIZE] = "";
385 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
391 while ((dent = readdir(dir)) != NULL) {
392 char *name = dent->d_name;
394 unsigned int dev_port;
397 if ((name[0] == '.') &&
398 ((name[1] == '\0') ||
399 ((name[1] == '.') && (name[2] == '\0'))))
402 MKSTR(path, "%s/device/net/%s/%s",
403 priv->ctx->device->ibdev_path, name,
404 (dev_type ? "dev_id" : "dev_port"));
406 file = fopen(path, "rb");
411 * Switch to dev_id when dev_port does not exist as
412 * is the case with Linux kernel versions < 3.15.
423 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
428 * Switch to dev_id when dev_port returns the same value for
429 * all ports. May happen when using a MOFED release older than
430 * 3.0 with a Linux kernel >= 3.15.
432 if (dev_port == dev_port_prev)
434 dev_port_prev = dev_port;
435 if (dev_port == (priv->port - 1u))
436 snprintf(match, sizeof(match), "%s", name);
439 if (match[0] == '\0')
441 strncpy(*ifname, match, sizeof(*ifname));
446 * Read from sysfs entry.
449 * Pointer to private structure.
451 * Entry name relative to sysfs path.
453 * Data output buffer.
458 * 0 on success, -1 on failure and errno is set.
461 priv_sysfs_read(const struct priv *priv, const char *entry,
462 char *buf, size_t size)
464 char ifname[IF_NAMESIZE];
469 if (priv_get_ifname(priv, &ifname))
472 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
475 file = fopen(path, "rb");
478 ret = fread(buf, 1, size, file);
480 if (((size_t)ret < size) && (ferror(file)))
490 * Write to sysfs entry.
493 * Pointer to private structure.
495 * Entry name relative to sysfs path.
502 * 0 on success, -1 on failure and errno is set.
505 priv_sysfs_write(const struct priv *priv, const char *entry,
506 char *buf, size_t size)
508 char ifname[IF_NAMESIZE];
513 if (priv_get_ifname(priv, &ifname))
516 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
519 file = fopen(path, "wb");
522 ret = fwrite(buf, 1, size, file);
524 if (((size_t)ret < size) || (ferror(file)))
534 * Get unsigned long sysfs property.
537 * Pointer to private structure.
539 * Entry name relative to sysfs path.
541 * Value output buffer.
544 * 0 on success, -1 on failure and errno is set.
547 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
550 unsigned long value_ret;
553 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
555 DEBUG("cannot read %s value from sysfs: %s",
556 name, strerror(errno));
559 value_str[ret] = '\0';
561 value_ret = strtoul(value_str, NULL, 0);
563 DEBUG("invalid %s value `%s': %s", name, value_str,
572 * Set unsigned long sysfs property.
575 * Pointer to private structure.
577 * Entry name relative to sysfs path.
582 * 0 on success, -1 on failure and errno is set.
585 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
588 MKSTR(value_str, "%lu", value);
590 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
592 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
593 name, value_str, value, strerror(errno));
600 * Perform ifreq ioctl() on associated Ethernet device.
603 * Pointer to private structure.
605 * Request number to pass to ioctl().
607 * Interface request structure output buffer.
610 * 0 on success, -1 on failure and errno is set.
613 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
615 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
620 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
621 ret = ioctl(sock, req, ifr);
630 * Pointer to private structure.
632 * MTU value output buffer.
635 * 0 on success, -1 on failure and errno is set.
638 priv_get_mtu(struct priv *priv, uint16_t *mtu)
640 unsigned long ulong_mtu;
642 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
652 * Pointer to private structure.
657 * 0 on success, -1 on failure and errno is set.
660 priv_set_mtu(struct priv *priv, uint16_t mtu)
662 return priv_set_sysfs_ulong(priv, "mtu", mtu);
669 * Pointer to private structure.
671 * Bitmask for flags that must remain untouched.
673 * Bitmask for flags to modify.
676 * 0 on success, -1 on failure and errno is set.
679 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
683 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
687 return priv_set_sysfs_ulong(priv, "flags", tmp);
690 /* Device configuration. */
693 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
694 unsigned int socket, const struct rte_eth_txconf *conf);
697 txq_cleanup(struct txq *txq);
700 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
701 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
702 struct rte_mempool *mp);
705 rxq_cleanup(struct rxq *rxq);
708 * Ethernet device configuration.
710 * Prepare the driver for a given number of TX and RX queues.
711 * Allocate parent RSS queue when several RX queues are requested.
714 * Pointer to Ethernet device structure.
717 * 0 on success, errno value on failure.
720 dev_configure(struct rte_eth_dev *dev)
722 struct priv *priv = dev->data->dev_private;
723 unsigned int rxqs_n = dev->data->nb_rx_queues;
724 unsigned int txqs_n = dev->data->nb_tx_queues;
728 priv->rxqs = (void *)dev->data->rx_queues;
729 priv->txqs = (void *)dev->data->tx_queues;
730 if (txqs_n != priv->txqs_n) {
731 INFO("%p: TX queues number update: %u -> %u",
732 (void *)dev, priv->txqs_n, txqs_n);
733 priv->txqs_n = txqs_n;
735 if (rxqs_n == priv->rxqs_n)
737 if (!rte_is_power_of_2(rxqs_n)) {
740 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
741 WARN("%p: number of RX queues must be a power"
742 " of 2: %u queues among %u will be active",
743 (void *)dev, n_active, rxqs_n);
746 INFO("%p: RX queues number update: %u -> %u",
747 (void *)dev, priv->rxqs_n, rxqs_n);
748 /* If RSS is enabled, disable it first. */
752 /* Only if there are no remaining child RX queues. */
753 for (i = 0; (i != priv->rxqs_n); ++i)
754 if ((*priv->rxqs)[i] != NULL)
756 rxq_cleanup(&priv->rxq_parent);
761 /* Nothing else to do. */
762 priv->rxqs_n = rxqs_n;
765 /* Allocate a new RSS parent queue if supported by hardware. */
767 ERROR("%p: only a single RX queue can be configured when"
768 " hardware doesn't support RSS",
772 /* Fail if hardware doesn't support that many RSS queues. */
773 if (rxqs_n >= priv->max_rss_tbl_sz) {
774 ERROR("%p: only %u RX queues can be configured for RSS",
775 (void *)dev, priv->max_rss_tbl_sz);
780 priv->rxqs_n = rxqs_n;
781 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, 0, NULL, NULL);
784 /* Failure, rollback. */
792 * DPDK callback for Ethernet device configuration.
795 * Pointer to Ethernet device structure.
798 * 0 on success, negative errno value on failure.
801 mlx4_dev_configure(struct rte_eth_dev *dev)
803 struct priv *priv = dev->data->dev_private;
806 if (mlx4_is_secondary())
807 return -E_RTE_SECONDARY;
809 ret = dev_configure(dev);
815 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
816 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
819 * Configure secondary process queues from a private data pointer (primary
820 * or secondary) and update burst callbacks. Can take place only once.
822 * All queues must have been previously created by the primary process to
823 * avoid undefined behavior.
826 * Private data pointer from either primary or secondary process.
829 * Private data pointer from secondary process, NULL in case of error.
832 mlx4_secondary_data_setup(struct priv *priv)
834 unsigned int port_id = 0;
835 struct mlx4_secondary_data *sd;
838 unsigned int nb_tx_queues;
839 unsigned int nb_rx_queues;
842 /* priv must be valid at this point. */
843 assert(priv != NULL);
844 /* priv->dev must also be valid but may point to local memory from
845 * another process, possibly with the same address and must not
846 * be dereferenced yet. */
847 assert(priv->dev != NULL);
848 /* Determine port ID by finding out where priv comes from. */
850 sd = &mlx4_secondary_data[port_id];
851 rte_spinlock_lock(&sd->lock);
852 /* Primary process? */
853 if (sd->primary_priv == priv)
855 /* Secondary process? */
856 if (sd->data.dev_private == priv)
858 rte_spinlock_unlock(&sd->lock);
859 if (++port_id == RTE_DIM(mlx4_secondary_data))
862 /* Switch to secondary private structure. If private data has already
863 * been updated by another thread, there is nothing else to do. */
864 priv = sd->data.dev_private;
865 if (priv->dev->data == &sd->data)
867 /* Sanity checks. Secondary private structure is supposed to point
868 * to local eth_dev, itself still pointing to the shared device data
869 * structure allocated by the primary process. */
870 assert(sd->shared_dev_data != &sd->data);
871 assert(sd->data.nb_tx_queues == 0);
872 assert(sd->data.tx_queues == NULL);
873 assert(sd->data.nb_rx_queues == 0);
874 assert(sd->data.rx_queues == NULL);
875 assert(priv != sd->primary_priv);
876 assert(priv->dev->data == sd->shared_dev_data);
877 assert(priv->txqs_n == 0);
878 assert(priv->txqs == NULL);
879 assert(priv->rxqs_n == 0);
880 assert(priv->rxqs == NULL);
881 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
882 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
883 /* Allocate local storage for queues. */
884 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
885 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
886 RTE_CACHE_LINE_SIZE);
887 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
888 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
889 RTE_CACHE_LINE_SIZE);
890 if (tx_queues == NULL || rx_queues == NULL)
892 /* Lock to prevent control operations during setup. */
895 for (i = 0; i != nb_tx_queues; ++i) {
896 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
899 if (primary_txq == NULL)
901 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
902 primary_txq->socket);
904 if (txq_setup(priv->dev,
906 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
909 txq->stats.idx = primary_txq->stats.idx;
916 txq = tx_queues[--i];
923 for (i = 0; i != nb_rx_queues; ++i) {
924 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
926 if (primary_rxq == NULL)
928 /* Not supported yet. */
931 /* Update everything. */
932 priv->txqs = (void *)tx_queues;
933 priv->txqs_n = nb_tx_queues;
934 priv->rxqs = (void *)rx_queues;
935 priv->rxqs_n = nb_rx_queues;
936 sd->data.rx_queues = rx_queues;
937 sd->data.tx_queues = tx_queues;
938 sd->data.nb_rx_queues = nb_rx_queues;
939 sd->data.nb_tx_queues = nb_tx_queues;
940 sd->data.dev_link = sd->shared_dev_data->dev_link;
941 sd->data.mtu = sd->shared_dev_data->mtu;
942 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
943 sizeof(sd->data.rx_queue_state));
944 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
945 sizeof(sd->data.tx_queue_state));
946 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
947 /* Use local data from now on. */
949 priv->dev->data = &sd->data;
951 priv->dev->tx_pkt_burst = mlx4_tx_burst;
952 priv->dev->rx_pkt_burst = removed_rx_burst;
955 /* More sanity checks. */
956 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
957 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
958 assert(priv->dev->data == &sd->data);
959 rte_spinlock_unlock(&sd->lock);
965 rte_spinlock_unlock(&sd->lock);
969 /* TX queues handling. */
972 * Allocate TX queue elements.
975 * Pointer to TX queue structure.
977 * Number of elements to allocate.
980 * 0 on success, errno value on failure.
983 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
986 struct txq_elt (*elts)[elts_n] =
987 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
988 linear_t (*elts_linear)[elts_n] =
989 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
991 struct ibv_mr *mr_linear = NULL;
994 if ((elts == NULL) || (elts_linear == NULL)) {
995 ERROR("%p: can't allocate packets array", (void *)txq);
1000 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
1001 (IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE));
1002 if (mr_linear == NULL) {
1003 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
1008 for (i = 0; (i != elts_n); ++i) {
1009 struct txq_elt *elt = &(*elts)[i];
1013 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
1014 txq->elts_n = elts_n;
1019 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
1020 * at least 4 times per ring. */
1021 txq->elts_comp_cd_init =
1022 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
1023 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
1024 txq->elts_comp_cd = txq->elts_comp_cd_init;
1025 txq->elts_linear = elts_linear;
1026 txq->mr_linear = mr_linear;
1030 if (mr_linear != NULL)
1031 claim_zero(ibv_dereg_mr(mr_linear));
1033 rte_free(elts_linear);
1036 DEBUG("%p: failed, freed everything", (void *)txq);
1042 * Free TX queue elements.
1045 * Pointer to TX queue structure.
1048 txq_free_elts(struct txq *txq)
1050 unsigned int elts_n = txq->elts_n;
1051 unsigned int elts_head = txq->elts_head;
1052 unsigned int elts_tail = txq->elts_tail;
1053 struct txq_elt (*elts)[elts_n] = txq->elts;
1054 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
1055 struct ibv_mr *mr_linear = txq->mr_linear;
1057 DEBUG("%p: freeing WRs", (void *)txq);
1062 txq->elts_comp_cd = 0;
1063 txq->elts_comp_cd_init = 0;
1065 txq->elts_linear = NULL;
1066 txq->mr_linear = NULL;
1067 if (mr_linear != NULL)
1068 claim_zero(ibv_dereg_mr(mr_linear));
1070 rte_free(elts_linear);
1073 while (elts_tail != elts_head) {
1074 struct txq_elt *elt = &(*elts)[elts_tail];
1076 assert(elt->buf != NULL);
1077 rte_pktmbuf_free(elt->buf);
1080 memset(elt, 0x77, sizeof(*elt));
1082 if (++elts_tail == elts_n)
1090 * Clean up a TX queue.
1092 * Destroy objects, free allocated memory and reset the structure for reuse.
1095 * Pointer to TX queue structure.
1098 txq_cleanup(struct txq *txq)
1100 struct ibv_exp_release_intf_params params;
1103 DEBUG("cleaning up %p", (void *)txq);
1105 if (txq->if_qp != NULL) {
1106 assert(txq->priv != NULL);
1107 assert(txq->priv->ctx != NULL);
1108 assert(txq->qp != NULL);
1109 params = (struct ibv_exp_release_intf_params){
1112 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1116 if (txq->if_cq != NULL) {
1117 assert(txq->priv != NULL);
1118 assert(txq->priv->ctx != NULL);
1119 assert(txq->cq != NULL);
1120 params = (struct ibv_exp_release_intf_params){
1123 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1127 if (txq->qp != NULL)
1128 claim_zero(ibv_destroy_qp(txq->qp));
1129 if (txq->cq != NULL)
1130 claim_zero(ibv_destroy_cq(txq->cq));
1131 if (txq->rd != NULL) {
1132 struct ibv_exp_destroy_res_domain_attr attr = {
1136 assert(txq->priv != NULL);
1137 assert(txq->priv->ctx != NULL);
1138 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1142 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1143 if (txq->mp2mr[i].mp == NULL)
1145 assert(txq->mp2mr[i].mr != NULL);
1146 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1148 memset(txq, 0, sizeof(*txq));
1152 * Manage TX completions.
1154 * When sending a burst, mlx4_tx_burst() posts several WRs.
1155 * To improve performance, a completion event is only required once every
1156 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1157 * for other WRs, but this information would not be used anyway.
1160 * Pointer to TX queue structure.
1163 * 0 on success, -1 on failure.
1166 txq_complete(struct txq *txq)
1168 unsigned int elts_comp = txq->elts_comp;
1169 unsigned int elts_tail = txq->elts_tail;
1170 const unsigned int elts_n = txq->elts_n;
1173 if (unlikely(elts_comp == 0))
1176 DEBUG("%p: processing %u work requests completions",
1177 (void *)txq, elts_comp);
1179 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1180 if (unlikely(wcs_n == 0))
1182 if (unlikely(wcs_n < 0)) {
1183 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1184 (void *)txq, wcs_n);
1188 assert(elts_comp <= txq->elts_comp);
1190 * Assume WC status is successful as nothing can be done about it
1193 elts_tail += wcs_n * txq->elts_comp_cd_init;
1194 if (elts_tail >= elts_n)
1195 elts_tail -= elts_n;
1196 txq->elts_tail = elts_tail;
1197 txq->elts_comp = elts_comp;
1201 /* For best performance, this function should not be inlined. */
1202 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, const struct rte_mempool *)
1203 __attribute__((noinline));
1206 * Register mempool as a memory region.
1209 * Pointer to protection domain.
1211 * Pointer to memory pool.
1214 * Memory region pointer, NULL in case of error.
1216 static struct ibv_mr *
1217 mlx4_mp2mr(struct ibv_pd *pd, const struct rte_mempool *mp)
1219 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1220 uintptr_t start = mp->elt_va_start;
1221 uintptr_t end = mp->elt_va_end;
1224 DEBUG("mempool %p area start=%p end=%p size=%zu",
1225 (const void *)mp, (void *)start, (void *)end,
1226 (size_t)(end - start));
1227 /* Round start and end to page boundary if found in memory segments. */
1228 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1229 uintptr_t addr = (uintptr_t)ms[i].addr;
1230 size_t len = ms[i].len;
1231 unsigned int align = ms[i].hugepage_sz;
1233 if ((start > addr) && (start < addr + len))
1234 start = RTE_ALIGN_FLOOR(start, align);
1235 if ((end > addr) && (end < addr + len))
1236 end = RTE_ALIGN_CEIL(end, align);
1238 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1239 (const void *)mp, (void *)start, (void *)end,
1240 (size_t)(end - start));
1241 return ibv_reg_mr(pd,
1244 IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE);
1248 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1249 * the cloned mbuf is allocated is returned instead.
1255 * Memory pool where data is located for given mbuf.
1257 static struct rte_mempool *
1258 txq_mb2mp(struct rte_mbuf *buf)
1260 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1261 return rte_mbuf_from_indirect(buf)->pool;
1266 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1267 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1268 * remove an entry first.
1271 * Pointer to TX queue structure.
1273 * Memory Pool for which a Memory Region lkey must be returned.
1276 * mr->lkey on success, (uint32_t)-1 on failure.
1279 txq_mp2mr(struct txq *txq, const struct rte_mempool *mp)
1284 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1285 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1286 /* Unknown MP, add a new MR for it. */
1289 if (txq->mp2mr[i].mp == mp) {
1290 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1291 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1292 return txq->mp2mr[i].lkey;
1295 /* Add a new entry, register MR first. */
1296 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1297 (void *)txq, mp->name, (const void *)mp);
1298 mr = mlx4_mp2mr(txq->priv->pd, mp);
1299 if (unlikely(mr == NULL)) {
1300 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1302 return (uint32_t)-1;
1304 if (unlikely(i == elemof(txq->mp2mr))) {
1305 /* Table is full, remove oldest entry. */
1306 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1309 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1310 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1311 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1313 /* Store the new entry. */
1314 txq->mp2mr[i].mp = mp;
1315 txq->mp2mr[i].mr = mr;
1316 txq->mp2mr[i].lkey = mr->lkey;
1317 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1318 (void *)txq, mp->name, (const void *)mp, txq->mp2mr[i].lkey);
1319 return txq->mp2mr[i].lkey;
1322 struct txq_mp2mr_mbuf_check_data {
1323 const struct rte_mempool *mp;
1328 * Callback function for rte_mempool_obj_iter() to check whether a given
1329 * mempool object looks like a mbuf.
1331 * @param[in, out] arg
1332 * Context data (struct txq_mp2mr_mbuf_check_data). Contains mempool pointer
1335 * Object start address.
1337 * Object end address.
1342 * Nonzero value when object is not a mbuf.
1345 txq_mp2mr_mbuf_check(void *arg, void *start, void *end,
1346 uint32_t index __rte_unused)
1348 struct txq_mp2mr_mbuf_check_data *data = arg;
1349 struct rte_mbuf *buf =
1350 (void *)((uintptr_t)start + data->mp->header_size);
1353 /* Check whether mbuf structure fits element size and whether mempool
1354 * pointer is valid. */
1355 if (((uintptr_t)end >= (uintptr_t)(buf + 1)) &&
1356 (buf->pool == data->mp))
1363 * Iterator function for rte_mempool_walk() to register existing mempools and
1364 * fill the MP to MR cache of a TX queue.
1367 * Memory Pool to register.
1369 * Pointer to TX queue structure.
1372 txq_mp2mr_iter(const struct rte_mempool *mp, void *arg)
1374 struct txq *txq = arg;
1375 struct txq_mp2mr_mbuf_check_data data = {
1380 /* Discard empty mempools. */
1383 /* Register mempool only if the first element looks like a mbuf. */
1384 rte_mempool_obj_iter((void *)mp->elt_va_start,
1386 mp->header_size + mp->elt_size + mp->trailer_size,
1391 txq_mp2mr_mbuf_check,
1398 #if MLX4_PMD_SGE_WR_N > 1
1401 * Copy scattered mbuf contents to a single linear buffer.
1403 * @param[out] linear
1404 * Linear output buffer.
1406 * Scattered input buffer.
1409 * Number of bytes copied to the output buffer or 0 if not large enough.
1412 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1414 unsigned int size = 0;
1415 unsigned int offset;
1418 unsigned int len = DATA_LEN(buf);
1422 if (unlikely(size > sizeof(*linear)))
1424 memcpy(&(*linear)[offset],
1425 rte_pktmbuf_mtod(buf, uint8_t *),
1428 } while (buf != NULL);
1433 * Handle scattered buffers for mlx4_tx_burst().
1436 * TX queue structure.
1438 * Number of segments in buf.
1440 * TX queue element to fill.
1442 * Buffer to process.
1444 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1446 * Array filled with SGEs on success.
1449 * A structure containing the processed packet size in bytes and the
1450 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1453 static struct tx_burst_sg_ret {
1454 unsigned int length;
1457 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1458 struct rte_mbuf *buf, unsigned int elts_head,
1459 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1461 unsigned int sent_size = 0;
1465 /* When there are too many segments, extra segments are
1466 * linearized in the last SGE. */
1467 if (unlikely(segs > elemof(*sges))) {
1468 segs = (elemof(*sges) - 1);
1471 /* Update element. */
1473 /* Register segments as SGEs. */
1474 for (j = 0; (j != segs); ++j) {
1475 struct ibv_sge *sge = &(*sges)[j];
1478 /* Retrieve Memory Region key for this memory pool. */
1479 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1480 if (unlikely(lkey == (uint32_t)-1)) {
1481 /* MR does not exist. */
1482 DEBUG("%p: unable to get MP <-> MR association",
1484 /* Clean up TX element. */
1489 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1491 rte_prefetch0((volatile void *)
1492 (uintptr_t)sge->addr);
1493 sge->length = DATA_LEN(buf);
1495 sent_size += sge->length;
1498 /* If buf is not NULL here and is not going to be linearized,
1499 * nb_segs is not valid. */
1501 assert((buf == NULL) || (linearize));
1502 /* Linearize extra segments. */
1504 struct ibv_sge *sge = &(*sges)[segs];
1505 linear_t *linear = &(*txq->elts_linear)[elts_head];
1506 unsigned int size = linearize_mbuf(linear, buf);
1508 assert(segs == (elemof(*sges) - 1));
1510 /* Invalid packet. */
1511 DEBUG("%p: packet too large to be linearized.",
1513 /* Clean up TX element. */
1517 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1518 if (elemof(*sges) == 1) {
1520 struct rte_mbuf *next = NEXT(buf);
1522 rte_pktmbuf_free_seg(buf);
1524 } while (buf != NULL);
1528 sge->addr = (uintptr_t)&(*linear)[0];
1530 sge->lkey = txq->mr_linear->lkey;
1532 /* Include last segment. */
1535 return (struct tx_burst_sg_ret){
1536 .length = sent_size,
1540 return (struct tx_burst_sg_ret){
1546 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1549 * DPDK callback for TX.
1552 * Generic pointer to TX queue structure.
1554 * Packets to transmit.
1556 * Number of packets in array.
1559 * Number of packets successfully transmitted (<= pkts_n).
1562 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1564 struct txq *txq = (struct txq *)dpdk_txq;
1565 unsigned int elts_head = txq->elts_head;
1566 const unsigned int elts_n = txq->elts_n;
1567 unsigned int elts_comp_cd = txq->elts_comp_cd;
1568 unsigned int elts_comp = 0;
1573 assert(elts_comp_cd != 0);
1575 max = (elts_n - (elts_head - txq->elts_tail));
1579 assert(max <= elts_n);
1580 /* Always leave one free entry in the ring. */
1586 for (i = 0; (i != max); ++i) {
1587 struct rte_mbuf *buf = pkts[i];
1588 unsigned int elts_head_next =
1589 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1590 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1591 struct txq_elt *elt = &(*txq->elts)[elts_head];
1592 unsigned int segs = NB_SEGS(buf);
1593 #ifdef MLX4_PMD_SOFT_COUNTERS
1594 unsigned int sent_size = 0;
1596 uint32_t send_flags = 0;
1598 /* Clean up old buffer. */
1599 if (likely(elt->buf != NULL)) {
1600 struct rte_mbuf *tmp = elt->buf;
1604 memset(elt, 0x66, sizeof(*elt));
1606 /* Faster than rte_pktmbuf_free(). */
1608 struct rte_mbuf *next = NEXT(tmp);
1610 rte_pktmbuf_free_seg(tmp);
1612 } while (tmp != NULL);
1614 /* Request TX completion. */
1615 if (unlikely(--elts_comp_cd == 0)) {
1616 elts_comp_cd = txq->elts_comp_cd_init;
1618 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1620 /* Should we enable HW CKSUM offload */
1622 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1623 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1624 /* HW does not support checksum offloads at arbitrary
1625 * offsets but automatically recognizes the packet
1626 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1627 * tunnels are currently supported. */
1628 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1629 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1631 if (likely(segs == 1)) {
1636 /* Retrieve buffer information. */
1637 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1638 length = DATA_LEN(buf);
1639 /* Retrieve Memory Region key for this memory pool. */
1640 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1641 if (unlikely(lkey == (uint32_t)-1)) {
1642 /* MR does not exist. */
1643 DEBUG("%p: unable to get MP <-> MR"
1644 " association", (void *)txq);
1645 /* Clean up TX element. */
1649 /* Update element. */
1652 rte_prefetch0((volatile void *)
1654 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1655 /* Put packet into send queue. */
1656 #if MLX4_PMD_MAX_INLINE > 0
1657 if (length <= txq->max_inline)
1658 err = txq->if_qp->send_pending_inline
1665 err = txq->if_qp->send_pending
1673 #ifdef MLX4_PMD_SOFT_COUNTERS
1674 sent_size += length;
1677 #if MLX4_PMD_SGE_WR_N > 1
1678 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1679 struct tx_burst_sg_ret ret;
1681 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1683 if (ret.length == (unsigned int)-1)
1685 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1686 /* Put SG list into send queue. */
1687 err = txq->if_qp->send_pending_sg_list
1694 #ifdef MLX4_PMD_SOFT_COUNTERS
1695 sent_size += ret.length;
1697 #else /* MLX4_PMD_SGE_WR_N > 1 */
1698 DEBUG("%p: TX scattered buffers support not"
1699 " compiled in", (void *)txq);
1701 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1703 elts_head = elts_head_next;
1704 #ifdef MLX4_PMD_SOFT_COUNTERS
1705 /* Increment sent bytes counter. */
1706 txq->stats.obytes += sent_size;
1710 /* Take a shortcut if nothing must be sent. */
1711 if (unlikely(i == 0))
1713 #ifdef MLX4_PMD_SOFT_COUNTERS
1714 /* Increment sent packets counter. */
1715 txq->stats.opackets += i;
1717 /* Ring QP doorbell. */
1718 err = txq->if_qp->send_flush(txq->qp);
1719 if (unlikely(err)) {
1720 /* A nonzero value is not supposed to be returned.
1721 * Nothing can be done about it. */
1722 DEBUG("%p: send_flush() failed with error %d",
1725 txq->elts_head = elts_head;
1726 txq->elts_comp += elts_comp;
1727 txq->elts_comp_cd = elts_comp_cd;
1732 * DPDK callback for TX in secondary processes.
1734 * This function configures all queues from primary process information
1735 * if necessary before reverting to the normal TX burst callback.
1738 * Generic pointer to TX queue structure.
1740 * Packets to transmit.
1742 * Number of packets in array.
1745 * Number of packets successfully transmitted (<= pkts_n).
1748 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1751 struct txq *txq = dpdk_txq;
1752 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1753 struct priv *primary_priv;
1759 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1760 /* Look for queue index in both private structures. */
1761 for (index = 0; index != priv->txqs_n; ++index)
1762 if (((*primary_priv->txqs)[index] == txq) ||
1763 ((*priv->txqs)[index] == txq))
1765 if (index == priv->txqs_n)
1767 txq = (*priv->txqs)[index];
1768 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1772 * Configure a TX queue.
1775 * Pointer to Ethernet device structure.
1777 * Pointer to TX queue structure.
1779 * Number of descriptors to configure in queue.
1781 * NUMA socket on which memory must be allocated.
1783 * Thresholds parameters.
1786 * 0 on success, errno value on failure.
1789 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1790 unsigned int socket, const struct rte_eth_txconf *conf)
1792 struct priv *priv = mlx4_get_priv(dev);
1798 struct ibv_exp_query_intf_params params;
1799 struct ibv_exp_qp_init_attr init;
1800 struct ibv_exp_res_domain_init_attr rd;
1801 struct ibv_exp_cq_init_attr cq;
1802 struct ibv_exp_qp_attr mod;
1804 enum ibv_exp_query_intf_status status;
1807 (void)conf; /* Thresholds configuration (ignored). */
1810 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1811 ERROR("%p: invalid number of TX descriptors (must be a"
1812 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1815 desc /= MLX4_PMD_SGE_WR_N;
1816 /* MRs will be registered in mp2mr[] later. */
1817 attr.rd = (struct ibv_exp_res_domain_init_attr){
1818 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1819 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1820 .thread_model = IBV_EXP_THREAD_SINGLE,
1821 .msg_model = IBV_EXP_MSG_HIGH_BW,
1823 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1824 if (tmpl.rd == NULL) {
1826 ERROR("%p: RD creation failure: %s",
1827 (void *)dev, strerror(ret));
1830 attr.cq = (struct ibv_exp_cq_init_attr){
1831 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1832 .res_domain = tmpl.rd,
1834 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1835 if (tmpl.cq == NULL) {
1837 ERROR("%p: CQ creation failure: %s",
1838 (void *)dev, strerror(ret));
1841 DEBUG("priv->device_attr.max_qp_wr is %d",
1842 priv->device_attr.max_qp_wr);
1843 DEBUG("priv->device_attr.max_sge is %d",
1844 priv->device_attr.max_sge);
1845 attr.init = (struct ibv_exp_qp_init_attr){
1846 /* CQ to be associated with the send queue. */
1848 /* CQ to be associated with the receive queue. */
1851 /* Max number of outstanding WRs. */
1852 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1853 priv->device_attr.max_qp_wr :
1855 /* Max number of scatter/gather elements in a WR. */
1856 .max_send_sge = ((priv->device_attr.max_sge <
1857 MLX4_PMD_SGE_WR_N) ?
1858 priv->device_attr.max_sge :
1860 #if MLX4_PMD_MAX_INLINE > 0
1861 .max_inline_data = MLX4_PMD_MAX_INLINE,
1864 .qp_type = IBV_QPT_RAW_PACKET,
1865 /* Do *NOT* enable this, completions events are managed per
1869 .res_domain = tmpl.rd,
1870 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1871 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1873 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1874 if (tmpl.qp == NULL) {
1875 ret = (errno ? errno : EINVAL);
1876 ERROR("%p: QP creation failure: %s",
1877 (void *)dev, strerror(ret));
1880 #if MLX4_PMD_MAX_INLINE > 0
1881 /* ibv_create_qp() updates this value. */
1882 tmpl.max_inline = attr.init.cap.max_inline_data;
1884 attr.mod = (struct ibv_exp_qp_attr){
1885 /* Move the QP to this state. */
1886 .qp_state = IBV_QPS_INIT,
1887 /* Primary port number. */
1888 .port_num = priv->port
1890 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1891 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1893 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1894 (void *)dev, strerror(ret));
1897 ret = txq_alloc_elts(&tmpl, desc);
1899 ERROR("%p: TXQ allocation failed: %s",
1900 (void *)dev, strerror(ret));
1903 attr.mod = (struct ibv_exp_qp_attr){
1904 .qp_state = IBV_QPS_RTR
1906 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1908 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1909 (void *)dev, strerror(ret));
1912 attr.mod.qp_state = IBV_QPS_RTS;
1913 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1915 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1916 (void *)dev, strerror(ret));
1919 attr.params = (struct ibv_exp_query_intf_params){
1920 .intf_scope = IBV_EXP_INTF_GLOBAL,
1921 .intf = IBV_EXP_INTF_CQ,
1924 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1925 if (tmpl.if_cq == NULL) {
1926 ERROR("%p: CQ interface family query failed with status %d",
1927 (void *)dev, status);
1930 attr.params = (struct ibv_exp_query_intf_params){
1931 .intf_scope = IBV_EXP_INTF_GLOBAL,
1932 .intf = IBV_EXP_INTF_QP_BURST,
1934 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1935 /* MC loopback must be disabled when not using a VF. */
1938 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1942 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1943 if (tmpl.if_qp == NULL) {
1944 ERROR("%p: QP interface family query failed with status %d",
1945 (void *)dev, status);
1948 /* Clean up txq in case we're reinitializing it. */
1949 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1952 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1953 /* Pre-register known mempools. */
1954 rte_mempool_walk(txq_mp2mr_iter, txq);
1964 * DPDK callback to configure a TX queue.
1967 * Pointer to Ethernet device structure.
1971 * Number of descriptors to configure in queue.
1973 * NUMA socket on which memory must be allocated.
1975 * Thresholds parameters.
1978 * 0 on success, negative errno value on failure.
1981 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1982 unsigned int socket, const struct rte_eth_txconf *conf)
1984 struct priv *priv = dev->data->dev_private;
1985 struct txq *txq = (*priv->txqs)[idx];
1988 if (mlx4_is_secondary())
1989 return -E_RTE_SECONDARY;
1991 DEBUG("%p: configuring queue %u for %u descriptors",
1992 (void *)dev, idx, desc);
1993 if (idx >= priv->txqs_n) {
1994 ERROR("%p: queue index out of range (%u >= %u)",
1995 (void *)dev, idx, priv->txqs_n);
2000 DEBUG("%p: reusing already allocated queue index %u (%p)",
2001 (void *)dev, idx, (void *)txq);
2002 if (priv->started) {
2006 (*priv->txqs)[idx] = NULL;
2009 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
2011 ERROR("%p: unable to allocate queue index %u",
2017 ret = txq_setup(dev, txq, desc, socket, conf);
2021 txq->stats.idx = idx;
2022 DEBUG("%p: adding TX queue %p to list",
2023 (void *)dev, (void *)txq);
2024 (*priv->txqs)[idx] = txq;
2025 /* Update send callback. */
2026 dev->tx_pkt_burst = mlx4_tx_burst;
2033 * DPDK callback to release a TX queue.
2036 * Generic TX queue pointer.
2039 mlx4_tx_queue_release(void *dpdk_txq)
2041 struct txq *txq = (struct txq *)dpdk_txq;
2045 if (mlx4_is_secondary())
2051 for (i = 0; (i != priv->txqs_n); ++i)
2052 if ((*priv->txqs)[i] == txq) {
2053 DEBUG("%p: removing TX queue %p from list",
2054 (void *)priv->dev, (void *)txq);
2055 (*priv->txqs)[i] = NULL;
2063 /* RX queues handling. */
2066 * Allocate RX queue elements with scattered packets support.
2069 * Pointer to RX queue structure.
2071 * Number of elements to allocate.
2073 * If not NULL, fetch buffers from this array instead of allocating them
2074 * with rte_pktmbuf_alloc().
2077 * 0 on success, errno value on failure.
2080 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2081 struct rte_mbuf **pool)
2084 struct rxq_elt_sp (*elts)[elts_n] =
2085 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2090 ERROR("%p: can't allocate packets array", (void *)rxq);
2094 /* For each WR (packet). */
2095 for (i = 0; (i != elts_n); ++i) {
2097 struct rxq_elt_sp *elt = &(*elts)[i];
2098 struct ibv_recv_wr *wr = &elt->wr;
2099 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2101 /* These two arrays must have the same size. */
2102 assert(elemof(elt->sges) == elemof(elt->bufs));
2105 wr->next = &(*elts)[(i + 1)].wr;
2106 wr->sg_list = &(*sges)[0];
2107 wr->num_sge = elemof(*sges);
2108 /* For each SGE (segment). */
2109 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2110 struct ibv_sge *sge = &(*sges)[j];
2111 struct rte_mbuf *buf;
2115 assert(buf != NULL);
2116 rte_pktmbuf_reset(buf);
2118 buf = rte_pktmbuf_alloc(rxq->mp);
2120 assert(pool == NULL);
2121 ERROR("%p: empty mbuf pool", (void *)rxq);
2126 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2127 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2128 /* Buffer is supposed to be empty. */
2129 assert(rte_pktmbuf_data_len(buf) == 0);
2130 assert(rte_pktmbuf_pkt_len(buf) == 0);
2131 /* sge->addr must be able to store a pointer. */
2132 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2134 /* The first SGE keeps its headroom. */
2135 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2136 sge->length = (buf->buf_len -
2137 RTE_PKTMBUF_HEADROOM);
2139 /* Subsequent SGEs lose theirs. */
2140 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2141 SET_DATA_OFF(buf, 0);
2142 sge->addr = (uintptr_t)buf->buf_addr;
2143 sge->length = buf->buf_len;
2145 sge->lkey = rxq->mr->lkey;
2146 /* Redundant check for tailroom. */
2147 assert(sge->length == rte_pktmbuf_tailroom(buf));
2150 /* The last WR pointer must be NULL. */
2151 (*elts)[(i - 1)].wr.next = NULL;
2152 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2153 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2154 rxq->elts_n = elts_n;
2156 rxq->elts.sp = elts;
2161 assert(pool == NULL);
2162 for (i = 0; (i != elemof(*elts)); ++i) {
2164 struct rxq_elt_sp *elt = &(*elts)[i];
2166 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2167 struct rte_mbuf *buf = elt->bufs[j];
2170 rte_pktmbuf_free_seg(buf);
2175 DEBUG("%p: failed, freed everything", (void *)rxq);
2181 * Free RX queue elements with scattered packets support.
2184 * Pointer to RX queue structure.
2187 rxq_free_elts_sp(struct rxq *rxq)
2190 unsigned int elts_n = rxq->elts_n;
2191 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2193 DEBUG("%p: freeing WRs", (void *)rxq);
2195 rxq->elts.sp = NULL;
2198 for (i = 0; (i != elemof(*elts)); ++i) {
2200 struct rxq_elt_sp *elt = &(*elts)[i];
2202 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2203 struct rte_mbuf *buf = elt->bufs[j];
2206 rte_pktmbuf_free_seg(buf);
2213 * Allocate RX queue elements.
2216 * Pointer to RX queue structure.
2218 * Number of elements to allocate.
2220 * If not NULL, fetch buffers from this array instead of allocating them
2221 * with rte_pktmbuf_alloc().
2224 * 0 on success, errno value on failure.
2227 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2230 struct rxq_elt (*elts)[elts_n] =
2231 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2236 ERROR("%p: can't allocate packets array", (void *)rxq);
2240 /* For each WR (packet). */
2241 for (i = 0; (i != elts_n); ++i) {
2242 struct rxq_elt *elt = &(*elts)[i];
2243 struct ibv_recv_wr *wr = &elt->wr;
2244 struct ibv_sge *sge = &(*elts)[i].sge;
2245 struct rte_mbuf *buf;
2249 assert(buf != NULL);
2250 rte_pktmbuf_reset(buf);
2252 buf = rte_pktmbuf_alloc(rxq->mp);
2254 assert(pool == NULL);
2255 ERROR("%p: empty mbuf pool", (void *)rxq);
2259 /* Configure WR. Work request ID contains its own index in
2260 * the elts array and the offset between SGE buffer header and
2262 WR_ID(wr->wr_id).id = i;
2263 WR_ID(wr->wr_id).offset =
2264 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2266 wr->next = &(*elts)[(i + 1)].wr;
2269 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2270 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2271 /* Buffer is supposed to be empty. */
2272 assert(rte_pktmbuf_data_len(buf) == 0);
2273 assert(rte_pktmbuf_pkt_len(buf) == 0);
2274 /* sge->addr must be able to store a pointer. */
2275 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2276 /* SGE keeps its headroom. */
2277 sge->addr = (uintptr_t)
2278 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2279 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2280 sge->lkey = rxq->mr->lkey;
2281 /* Redundant check for tailroom. */
2282 assert(sge->length == rte_pktmbuf_tailroom(buf));
2283 /* Make sure elts index and SGE mbuf pointer can be deduced
2285 if ((WR_ID(wr->wr_id).id != i) ||
2286 ((void *)((uintptr_t)sge->addr -
2287 WR_ID(wr->wr_id).offset) != buf)) {
2288 ERROR("%p: cannot store index and offset in WR ID",
2291 rte_pktmbuf_free(buf);
2296 /* The last WR pointer must be NULL. */
2297 (*elts)[(i - 1)].wr.next = NULL;
2298 DEBUG("%p: allocated and configured %u single-segment WRs",
2299 (void *)rxq, elts_n);
2300 rxq->elts_n = elts_n;
2302 rxq->elts.no_sp = elts;
2307 assert(pool == NULL);
2308 for (i = 0; (i != elemof(*elts)); ++i) {
2309 struct rxq_elt *elt = &(*elts)[i];
2310 struct rte_mbuf *buf;
2312 if (elt->sge.addr == 0)
2314 assert(WR_ID(elt->wr.wr_id).id == i);
2315 buf = (void *)((uintptr_t)elt->sge.addr -
2316 WR_ID(elt->wr.wr_id).offset);
2317 rte_pktmbuf_free_seg(buf);
2321 DEBUG("%p: failed, freed everything", (void *)rxq);
2327 * Free RX queue elements.
2330 * Pointer to RX queue structure.
2333 rxq_free_elts(struct rxq *rxq)
2336 unsigned int elts_n = rxq->elts_n;
2337 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2339 DEBUG("%p: freeing WRs", (void *)rxq);
2341 rxq->elts.no_sp = NULL;
2344 for (i = 0; (i != elemof(*elts)); ++i) {
2345 struct rxq_elt *elt = &(*elts)[i];
2346 struct rte_mbuf *buf;
2348 if (elt->sge.addr == 0)
2350 assert(WR_ID(elt->wr.wr_id).id == i);
2351 buf = (void *)((uintptr_t)elt->sge.addr -
2352 WR_ID(elt->wr.wr_id).offset);
2353 rte_pktmbuf_free_seg(buf);
2359 * Delete flow steering rule.
2362 * Pointer to RX queue structure.
2364 * MAC address index.
2369 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2372 struct priv *priv = rxq->priv;
2373 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2374 (const uint8_t (*)[ETHER_ADDR_LEN])
2375 priv->mac[mac_index].addr_bytes;
2377 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2378 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2379 " (VLAN ID %" PRIu16 ")",
2381 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2382 mac_index, priv->vlan_filter[vlan_index].id);
2383 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2384 rxq->mac_flow[mac_index][vlan_index] = NULL;
2388 * Unregister a MAC address from a RX queue.
2391 * Pointer to RX queue structure.
2393 * MAC address index.
2396 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2398 struct priv *priv = rxq->priv;
2400 unsigned int vlans = 0;
2402 assert(mac_index < elemof(priv->mac));
2403 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2405 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2406 if (!priv->vlan_filter[i].enabled)
2408 rxq_del_flow(rxq, mac_index, i);
2412 rxq_del_flow(rxq, mac_index, 0);
2414 BITFIELD_RESET(rxq->mac_configured, mac_index);
2418 * Unregister all MAC addresses from a RX queue.
2421 * Pointer to RX queue structure.
2424 rxq_mac_addrs_del(struct rxq *rxq)
2426 struct priv *priv = rxq->priv;
2429 for (i = 0; (i != elemof(priv->mac)); ++i)
2430 rxq_mac_addr_del(rxq, i);
2433 static int rxq_promiscuous_enable(struct rxq *);
2434 static void rxq_promiscuous_disable(struct rxq *);
2437 * Add single flow steering rule.
2440 * Pointer to RX queue structure.
2442 * MAC address index to register.
2444 * VLAN index. Use -1 for a flow without VLAN.
2447 * 0 on success, errno value on failure.
2450 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2452 struct ibv_flow *flow;
2453 struct priv *priv = rxq->priv;
2454 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2455 (const uint8_t (*)[ETHER_ADDR_LEN])
2456 priv->mac[mac_index].addr_bytes;
2458 /* Allocate flow specification on the stack. */
2459 struct __attribute__((packed)) {
2460 struct ibv_flow_attr attr;
2461 struct ibv_flow_spec_eth spec;
2463 struct ibv_flow_attr *attr = &data.attr;
2464 struct ibv_flow_spec_eth *spec = &data.spec;
2466 assert(mac_index < elemof(priv->mac));
2467 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2469 * No padding must be inserted by the compiler between attr and spec.
2470 * This layout is expected by libibverbs.
2472 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2473 *attr = (struct ibv_flow_attr){
2474 .type = IBV_FLOW_ATTR_NORMAL,
2479 *spec = (struct ibv_flow_spec_eth){
2480 .type = IBV_FLOW_SPEC_ETH,
2481 .size = sizeof(*spec),
2484 (*mac)[0], (*mac)[1], (*mac)[2],
2485 (*mac)[3], (*mac)[4], (*mac)[5]
2487 .vlan_tag = ((vlan_index != -1u) ?
2488 htons(priv->vlan_filter[vlan_index].id) :
2492 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2493 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2496 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2497 " (VLAN %s %" PRIu16 ")",
2499 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2501 ((vlan_index != -1u) ? "ID" : "index"),
2502 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2503 /* Create related flow. */
2505 flow = ibv_create_flow(rxq->qp, attr);
2507 /* It's not clear whether errno is always set in this case. */
2508 ERROR("%p: flow configuration failed, errno=%d: %s",
2510 (errno ? strerror(errno) : "Unknown error"));
2515 if (vlan_index == -1u)
2517 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2518 rxq->mac_flow[mac_index][vlan_index] = flow;
2523 * Register a MAC address in a RX queue.
2526 * Pointer to RX queue structure.
2528 * MAC address index to register.
2531 * 0 on success, errno value on failure.
2534 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2536 struct priv *priv = rxq->priv;
2538 unsigned int vlans = 0;
2541 assert(mac_index < elemof(priv->mac));
2542 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2543 rxq_mac_addr_del(rxq, mac_index);
2544 /* Fill VLAN specifications. */
2545 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2546 if (!priv->vlan_filter[i].enabled)
2548 /* Create related flow. */
2549 ret = rxq_add_flow(rxq, mac_index, i);
2554 /* Failure, rollback. */
2556 if (priv->vlan_filter[--i].enabled)
2557 rxq_del_flow(rxq, mac_index, i);
2561 /* In case there is no VLAN filter. */
2563 ret = rxq_add_flow(rxq, mac_index, -1);
2567 BITFIELD_SET(rxq->mac_configured, mac_index);
2572 * Register all MAC addresses in a RX queue.
2575 * Pointer to RX queue structure.
2578 * 0 on success, errno value on failure.
2581 rxq_mac_addrs_add(struct rxq *rxq)
2583 struct priv *priv = rxq->priv;
2587 for (i = 0; (i != elemof(priv->mac)); ++i) {
2588 if (!BITFIELD_ISSET(priv->mac_configured, i))
2590 ret = rxq_mac_addr_add(rxq, i);
2593 /* Failure, rollback. */
2595 rxq_mac_addr_del(rxq, --i);
2603 * Unregister a MAC address.
2605 * In RSS mode, the MAC address is unregistered from the parent queue,
2606 * otherwise it is unregistered from each queue directly.
2609 * Pointer to private structure.
2611 * MAC address index.
2614 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2618 assert(mac_index < elemof(priv->mac));
2619 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2622 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2625 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2626 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2628 BITFIELD_RESET(priv->mac_configured, mac_index);
2632 * Register a MAC address.
2634 * In RSS mode, the MAC address is registered in the parent queue,
2635 * otherwise it is registered in each queue directly.
2638 * Pointer to private structure.
2640 * MAC address index to use.
2642 * MAC address to register.
2645 * 0 on success, errno value on failure.
2648 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2649 const uint8_t (*mac)[ETHER_ADDR_LEN])
2654 assert(mac_index < elemof(priv->mac));
2655 /* First, make sure this address isn't already configured. */
2656 for (i = 0; (i != elemof(priv->mac)); ++i) {
2657 /* Skip this index, it's going to be reconfigured. */
2660 if (!BITFIELD_ISSET(priv->mac_configured, i))
2662 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2664 /* Address already configured elsewhere, return with error. */
2667 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2668 priv_mac_addr_del(priv, mac_index);
2669 priv->mac[mac_index] = (struct ether_addr){
2671 (*mac)[0], (*mac)[1], (*mac)[2],
2672 (*mac)[3], (*mac)[4], (*mac)[5]
2675 /* If device isn't started, this is all we need to do. */
2676 if (!priv->started) {
2678 /* Verify that all queues have this index disabled. */
2679 for (i = 0; (i != priv->rxqs_n); ++i) {
2680 if ((*priv->rxqs)[i] == NULL)
2682 assert(!BITFIELD_ISSET
2683 ((*priv->rxqs)[i]->mac_configured, mac_index));
2689 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2694 for (i = 0; (i != priv->rxqs_n); ++i) {
2695 if ((*priv->rxqs)[i] == NULL)
2697 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2700 /* Failure, rollback. */
2702 if ((*priv->rxqs)[(--i)] != NULL)
2703 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2707 BITFIELD_SET(priv->mac_configured, mac_index);
2712 * Enable allmulti mode in a RX queue.
2715 * Pointer to RX queue structure.
2718 * 0 on success, errno value on failure.
2721 rxq_allmulticast_enable(struct rxq *rxq)
2723 struct ibv_flow *flow;
2724 struct ibv_flow_attr attr = {
2725 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2727 .port = rxq->priv->port,
2731 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2732 if (rxq->allmulti_flow != NULL)
2735 flow = ibv_create_flow(rxq->qp, &attr);
2737 /* It's not clear whether errno is always set in this case. */
2738 ERROR("%p: flow configuration failed, errno=%d: %s",
2740 (errno ? strerror(errno) : "Unknown error"));
2745 rxq->allmulti_flow = flow;
2746 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2751 * Disable allmulti mode in a RX queue.
2754 * Pointer to RX queue structure.
2757 rxq_allmulticast_disable(struct rxq *rxq)
2759 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2760 if (rxq->allmulti_flow == NULL)
2762 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2763 rxq->allmulti_flow = NULL;
2764 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2768 * Enable promiscuous mode in a RX queue.
2771 * Pointer to RX queue structure.
2774 * 0 on success, errno value on failure.
2777 rxq_promiscuous_enable(struct rxq *rxq)
2779 struct ibv_flow *flow;
2780 struct ibv_flow_attr attr = {
2781 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2783 .port = rxq->priv->port,
2789 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2790 if (rxq->promisc_flow != NULL)
2793 flow = ibv_create_flow(rxq->qp, &attr);
2795 /* It's not clear whether errno is always set in this case. */
2796 ERROR("%p: flow configuration failed, errno=%d: %s",
2798 (errno ? strerror(errno) : "Unknown error"));
2803 rxq->promisc_flow = flow;
2804 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2809 * Disable promiscuous mode in a RX queue.
2812 * Pointer to RX queue structure.
2815 rxq_promiscuous_disable(struct rxq *rxq)
2819 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2820 if (rxq->promisc_flow == NULL)
2822 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2823 rxq->promisc_flow = NULL;
2824 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2828 * Clean up a RX queue.
2830 * Destroy objects, free allocated memory and reset the structure for reuse.
2833 * Pointer to RX queue structure.
2836 rxq_cleanup(struct rxq *rxq)
2838 struct ibv_exp_release_intf_params params;
2840 DEBUG("cleaning up %p", (void *)rxq);
2842 rxq_free_elts_sp(rxq);
2845 if (rxq->if_qp != NULL) {
2846 assert(rxq->priv != NULL);
2847 assert(rxq->priv->ctx != NULL);
2848 assert(rxq->qp != NULL);
2849 params = (struct ibv_exp_release_intf_params){
2852 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2856 if (rxq->if_cq != NULL) {
2857 assert(rxq->priv != NULL);
2858 assert(rxq->priv->ctx != NULL);
2859 assert(rxq->cq != NULL);
2860 params = (struct ibv_exp_release_intf_params){
2863 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2867 if (rxq->qp != NULL) {
2868 rxq_promiscuous_disable(rxq);
2869 rxq_allmulticast_disable(rxq);
2870 rxq_mac_addrs_del(rxq);
2871 claim_zero(ibv_destroy_qp(rxq->qp));
2873 if (rxq->cq != NULL)
2874 claim_zero(ibv_destroy_cq(rxq->cq));
2875 if (rxq->rd != NULL) {
2876 struct ibv_exp_destroy_res_domain_attr attr = {
2880 assert(rxq->priv != NULL);
2881 assert(rxq->priv->ctx != NULL);
2882 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2886 if (rxq->mr != NULL)
2887 claim_zero(ibv_dereg_mr(rxq->mr));
2888 memset(rxq, 0, sizeof(*rxq));
2892 * Translate RX completion flags to packet type.
2895 * RX completion flags returned by poll_length_flags().
2897 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2900 * Packet type for struct rte_mbuf.
2902 static inline uint32_t
2903 rxq_cq_to_pkt_type(uint32_t flags)
2907 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2910 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2912 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET, RTE_PTYPE_L3_IPV6) |
2914 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_INNER_L3_IPV4) |
2916 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_INNER_L3_IPV6);
2920 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2922 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_L3_IPV6);
2927 * Translate RX completion flags to offload flags.
2930 * Pointer to RX queue structure.
2932 * RX completion flags returned by poll_length_flags().
2935 * Offload flags (ol_flags) for struct rte_mbuf.
2937 static inline uint32_t
2938 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2940 uint32_t ol_flags = 0;
2945 IBV_EXP_CQ_RX_IP_CSUM_OK,
2946 PKT_RX_IP_CKSUM_BAD) |
2948 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2949 PKT_RX_L4_CKSUM_BAD);
2951 * PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD are used in place
2952 * of PKT_RX_EIP_CKSUM_BAD because the latter is not functional
2955 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2958 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2959 PKT_RX_IP_CKSUM_BAD) |
2961 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2962 PKT_RX_L4_CKSUM_BAD);
2967 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2970 * DPDK callback for RX with scattered packets support.
2973 * Generic pointer to RX queue structure.
2975 * Array to store received packets.
2977 * Maximum number of packets in array.
2980 * Number of packets successfully received (<= pkts_n).
2983 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2985 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2986 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2987 const unsigned int elts_n = rxq->elts_n;
2988 unsigned int elts_head = rxq->elts_head;
2989 struct ibv_recv_wr head;
2990 struct ibv_recv_wr **next = &head.next;
2991 struct ibv_recv_wr *bad_wr;
2993 unsigned int pkts_ret = 0;
2996 if (unlikely(!rxq->sp))
2997 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2998 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
3000 for (i = 0; (i != pkts_n); ++i) {
3001 struct rxq_elt_sp *elt = &(*elts)[elts_head];
3002 struct ibv_recv_wr *wr = &elt->wr;
3003 uint64_t wr_id = wr->wr_id;
3005 unsigned int pkt_buf_len;
3006 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
3007 struct rte_mbuf **pkt_buf_next = &pkt_buf;
3008 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
3012 /* Sanity checks. */
3016 assert(wr_id < rxq->elts_n);
3017 assert(wr->sg_list == elt->sges);
3018 assert(wr->num_sge == elemof(elt->sges));
3019 assert(elts_head < rxq->elts_n);
3020 assert(rxq->elts_head < rxq->elts_n);
3021 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3023 if (unlikely(ret < 0)) {
3027 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3029 /* ibv_poll_cq() must be used in case of failure. */
3030 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3031 if (unlikely(wcs_n == 0))
3033 if (unlikely(wcs_n < 0)) {
3034 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3035 (void *)rxq, wcs_n);
3039 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3040 /* Whatever, just repost the offending WR. */
3041 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3042 " completion status (%d): %s",
3043 (void *)rxq, wc.wr_id, wc.status,
3044 ibv_wc_status_str(wc.status));
3045 #ifdef MLX4_PMD_SOFT_COUNTERS
3046 /* Increment dropped packets counter. */
3047 ++rxq->stats.idropped;
3049 /* Link completed WRs together for repost. */
3060 /* Link completed WRs together for repost. */
3064 * Replace spent segments with new ones, concatenate and
3065 * return them as pkt_buf.
3068 struct ibv_sge *sge = &elt->sges[j];
3069 struct rte_mbuf *seg = elt->bufs[j];
3070 struct rte_mbuf *rep;
3071 unsigned int seg_tailroom;
3074 * Fetch initial bytes of packet descriptor into a
3075 * cacheline while allocating rep.
3078 rep = __rte_mbuf_raw_alloc(rxq->mp);
3079 if (unlikely(rep == NULL)) {
3081 * Unable to allocate a replacement mbuf,
3084 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3085 " can't allocate a new mbuf",
3086 (void *)rxq, wr_id);
3087 if (pkt_buf != NULL) {
3088 *pkt_buf_next = NULL;
3089 rte_pktmbuf_free(pkt_buf);
3091 /* Increase out of memory counters. */
3092 ++rxq->stats.rx_nombuf;
3093 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3097 /* Poison user-modifiable fields in rep. */
3098 NEXT(rep) = (void *)((uintptr_t)-1);
3099 SET_DATA_OFF(rep, 0xdead);
3100 DATA_LEN(rep) = 0xd00d;
3101 PKT_LEN(rep) = 0xdeadd00d;
3102 NB_SEGS(rep) = 0x2a;
3106 assert(rep->buf_len == seg->buf_len);
3107 assert(rep->buf_len == rxq->mb_len);
3108 /* Reconfigure sge to use rep instead of seg. */
3109 assert(sge->lkey == rxq->mr->lkey);
3110 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3113 /* Update pkt_buf if it's the first segment, or link
3114 * seg to the previous one and update pkt_buf_next. */
3115 *pkt_buf_next = seg;
3116 pkt_buf_next = &NEXT(seg);
3117 /* Update seg information. */
3118 seg_tailroom = (seg->buf_len - seg_headroom);
3119 assert(sge->length == seg_tailroom);
3120 SET_DATA_OFF(seg, seg_headroom);
3121 if (likely(len <= seg_tailroom)) {
3123 DATA_LEN(seg) = len;
3126 assert(rte_pktmbuf_headroom(seg) ==
3128 assert(rte_pktmbuf_tailroom(seg) ==
3129 (seg_tailroom - len));
3132 DATA_LEN(seg) = seg_tailroom;
3133 PKT_LEN(seg) = seg_tailroom;
3135 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3136 assert(rte_pktmbuf_tailroom(seg) == 0);
3137 /* Fix len and clear headroom for next segments. */
3138 len -= seg_tailroom;
3141 /* Update head and tail segments. */
3142 *pkt_buf_next = NULL;
3143 assert(pkt_buf != NULL);
3145 NB_SEGS(pkt_buf) = j;
3146 PORT(pkt_buf) = rxq->port_id;
3147 PKT_LEN(pkt_buf) = pkt_buf_len;
3148 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3149 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3151 /* Return packet. */
3152 *(pkts++) = pkt_buf;
3154 #ifdef MLX4_PMD_SOFT_COUNTERS
3155 /* Increase bytes counter. */
3156 rxq->stats.ibytes += pkt_buf_len;
3159 if (++elts_head >= elts_n)
3163 if (unlikely(i == 0))
3168 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3170 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3171 if (unlikely(ret)) {
3172 /* Inability to repost WRs is fatal. */
3173 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3179 rxq->elts_head = elts_head;
3180 #ifdef MLX4_PMD_SOFT_COUNTERS
3181 /* Increase packets counter. */
3182 rxq->stats.ipackets += pkts_ret;
3188 * DPDK callback for RX.
3190 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3191 * manage scattered packets. Improves performance when MRU is lower than the
3192 * size of the first segment.
3195 * Generic pointer to RX queue structure.
3197 * Array to store received packets.
3199 * Maximum number of packets in array.
3202 * Number of packets successfully received (<= pkts_n).
3205 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3207 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3208 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3209 const unsigned int elts_n = rxq->elts_n;
3210 unsigned int elts_head = rxq->elts_head;
3211 struct ibv_sge sges[pkts_n];
3213 unsigned int pkts_ret = 0;
3216 if (unlikely(rxq->sp))
3217 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3218 for (i = 0; (i != pkts_n); ++i) {
3219 struct rxq_elt *elt = &(*elts)[elts_head];
3220 struct ibv_recv_wr *wr = &elt->wr;
3221 uint64_t wr_id = wr->wr_id;
3223 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3224 WR_ID(wr_id).offset);
3225 struct rte_mbuf *rep;
3228 /* Sanity checks. */
3229 assert(WR_ID(wr_id).id < rxq->elts_n);
3230 assert(wr->sg_list == &elt->sge);
3231 assert(wr->num_sge == 1);
3232 assert(elts_head < rxq->elts_n);
3233 assert(rxq->elts_head < rxq->elts_n);
3235 * Fetch initial bytes of packet descriptor into a
3236 * cacheline while allocating rep.
3239 rte_prefetch0(&seg->cacheline1);
3240 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3242 if (unlikely(ret < 0)) {
3246 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3248 /* ibv_poll_cq() must be used in case of failure. */
3249 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3250 if (unlikely(wcs_n == 0))
3252 if (unlikely(wcs_n < 0)) {
3253 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3254 (void *)rxq, wcs_n);
3258 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3259 /* Whatever, just repost the offending WR. */
3260 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3261 " completion status (%d): %s",
3262 (void *)rxq, wc.wr_id, wc.status,
3263 ibv_wc_status_str(wc.status));
3264 #ifdef MLX4_PMD_SOFT_COUNTERS
3265 /* Increment dropped packets counter. */
3266 ++rxq->stats.idropped;
3268 /* Add SGE to array for repost. */
3277 rep = __rte_mbuf_raw_alloc(rxq->mp);
3278 if (unlikely(rep == NULL)) {
3280 * Unable to allocate a replacement mbuf,
3283 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3284 " can't allocate a new mbuf",
3285 (void *)rxq, WR_ID(wr_id).id);
3286 /* Increase out of memory counters. */
3287 ++rxq->stats.rx_nombuf;
3288 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3292 /* Reconfigure sge to use rep instead of seg. */
3293 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3294 assert(elt->sge.lkey == rxq->mr->lkey);
3295 WR_ID(wr->wr_id).offset =
3296 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3298 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3300 /* Add SGE to array for repost. */
3303 /* Update seg information. */
3304 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3306 PORT(seg) = rxq->port_id;
3309 DATA_LEN(seg) = len;
3310 seg->packet_type = rxq_cq_to_pkt_type(flags);
3311 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3313 /* Return packet. */
3316 #ifdef MLX4_PMD_SOFT_COUNTERS
3317 /* Increase bytes counter. */
3318 rxq->stats.ibytes += len;
3321 if (++elts_head >= elts_n)
3325 if (unlikely(i == 0))
3329 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3331 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3332 if (unlikely(ret)) {
3333 /* Inability to repost WRs is fatal. */
3334 DEBUG("%p: recv_burst(): failed (ret=%d)",
3339 rxq->elts_head = elts_head;
3340 #ifdef MLX4_PMD_SOFT_COUNTERS
3341 /* Increase packets counter. */
3342 rxq->stats.ipackets += pkts_ret;
3348 * DPDK callback for RX in secondary processes.
3350 * This function configures all queues from primary process information
3351 * if necessary before reverting to the normal RX burst callback.
3354 * Generic pointer to RX queue structure.
3356 * Array to store received packets.
3358 * Maximum number of packets in array.
3361 * Number of packets successfully received (<= pkts_n).
3364 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3367 struct rxq *rxq = dpdk_rxq;
3368 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3369 struct priv *primary_priv;
3375 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3376 /* Look for queue index in both private structures. */
3377 for (index = 0; index != priv->rxqs_n; ++index)
3378 if (((*primary_priv->rxqs)[index] == rxq) ||
3379 ((*priv->rxqs)[index] == rxq))
3381 if (index == priv->rxqs_n)
3383 rxq = (*priv->rxqs)[index];
3384 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3388 * Allocate a Queue Pair.
3389 * Optionally setup inline receive if supported.
3392 * Pointer to private structure.
3394 * Completion queue to associate with QP.
3396 * Number of descriptors in QP (hint only).
3399 * QP pointer or NULL in case of error.
3401 static struct ibv_qp *
3402 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3403 struct ibv_exp_res_domain *rd)
3405 struct ibv_exp_qp_init_attr attr = {
3406 /* CQ to be associated with the send queue. */
3408 /* CQ to be associated with the receive queue. */
3411 /* Max number of outstanding WRs. */
3412 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3413 priv->device_attr.max_qp_wr :
3415 /* Max number of scatter/gather elements in a WR. */
3416 .max_recv_sge = ((priv->device_attr.max_sge <
3417 MLX4_PMD_SGE_WR_N) ?
3418 priv->device_attr.max_sge :
3421 .qp_type = IBV_QPT_RAW_PACKET,
3422 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3423 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3429 attr.max_inl_recv = priv->inl_recv_size;
3430 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3432 return ibv_exp_create_qp(priv->ctx, &attr);
3438 * Allocate a RSS Queue Pair.
3439 * Optionally setup inline receive if supported.
3442 * Pointer to private structure.
3444 * Completion queue to associate with QP.
3446 * Number of descriptors in QP (hint only).
3448 * If nonzero, create a parent QP, otherwise a child.
3451 * QP pointer or NULL in case of error.
3453 static struct ibv_qp *
3454 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3455 int parent, struct ibv_exp_res_domain *rd)
3457 struct ibv_exp_qp_init_attr attr = {
3458 /* CQ to be associated with the send queue. */
3460 /* CQ to be associated with the receive queue. */
3463 /* Max number of outstanding WRs. */
3464 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3465 priv->device_attr.max_qp_wr :
3467 /* Max number of scatter/gather elements in a WR. */
3468 .max_recv_sge = ((priv->device_attr.max_sge <
3469 MLX4_PMD_SGE_WR_N) ?
3470 priv->device_attr.max_sge :
3473 .qp_type = IBV_QPT_RAW_PACKET,
3474 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3475 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3476 IBV_EXP_QP_INIT_ATTR_QPG),
3482 attr.max_inl_recv = priv->inl_recv_size,
3483 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3486 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3487 /* TSS isn't necessary. */
3488 attr.qpg.parent_attrib.tss_child_count = 0;
3489 attr.qpg.parent_attrib.rss_child_count =
3490 rte_align32pow2(priv->rxqs_n + 1) >> 1;
3491 DEBUG("initializing parent RSS queue");
3493 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3494 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3495 DEBUG("initializing child RSS queue");
3497 return ibv_exp_create_qp(priv->ctx, &attr);
3500 #endif /* RSS_SUPPORT */
3503 * Reconfigure a RX queue with new parameters.
3505 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3506 * thread (such as a control thread), may corrupt the pool.
3507 * In case of failure, the queue is left untouched.
3510 * Pointer to Ethernet device structure.
3515 * 0 on success, errno value on failure.
3518 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3520 struct priv *priv = rxq->priv;
3521 struct rxq tmpl = *rxq;
3522 unsigned int mbuf_n;
3523 unsigned int desc_n;
3524 struct rte_mbuf **pool;
3526 struct ibv_exp_qp_attr mod;
3527 struct ibv_recv_wr *bad_wr;
3529 int parent = (rxq == &priv->rxq_parent);
3532 ERROR("%p: cannot rehash parent queue %p",
3533 (void *)dev, (void *)rxq);
3536 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3537 /* Number of descriptors and mbufs currently allocated. */
3538 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3540 /* Toggle RX checksum offload if hardware supports it. */
3541 if (priv->hw_csum) {
3542 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3543 rxq->csum = tmpl.csum;
3545 if (priv->hw_csum_l2tun) {
3546 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3547 rxq->csum_l2tun = tmpl.csum_l2tun;
3549 /* Enable scattered packets support for this queue if necessary. */
3550 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3551 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3552 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3554 desc_n /= MLX4_PMD_SGE_WR_N;
3557 DEBUG("%p: %s scattered packets support (%u WRs)",
3558 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3559 /* If scatter mode is the same as before, nothing to do. */
3560 if (tmpl.sp == rxq->sp) {
3561 DEBUG("%p: nothing to do", (void *)dev);
3564 /* Remove attached flows if RSS is disabled (no parent queue). */
3566 rxq_allmulticast_disable(&tmpl);
3567 rxq_promiscuous_disable(&tmpl);
3568 rxq_mac_addrs_del(&tmpl);
3569 /* Update original queue in case of failure. */
3570 rxq->allmulti_flow = tmpl.allmulti_flow;
3571 rxq->promisc_flow = tmpl.promisc_flow;
3572 memcpy(rxq->mac_configured, tmpl.mac_configured,
3573 sizeof(rxq->mac_configured));
3574 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3576 /* From now on, any failure will render the queue unusable.
3577 * Reinitialize QP. */
3578 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3579 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3581 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3585 err = ibv_resize_cq(tmpl.cq, desc_n);
3587 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3591 mod = (struct ibv_exp_qp_attr){
3592 /* Move the QP to this state. */
3593 .qp_state = IBV_QPS_INIT,
3594 /* Primary port number. */
3595 .port_num = priv->port
3597 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3600 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3601 #endif /* RSS_SUPPORT */
3604 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3605 (void *)dev, strerror(err));
3609 /* Reconfigure flows. Do not care for errors. */
3611 rxq_mac_addrs_add(&tmpl);
3613 rxq_promiscuous_enable(&tmpl);
3615 rxq_allmulticast_enable(&tmpl);
3616 /* Update original queue in case of failure. */
3617 rxq->allmulti_flow = tmpl.allmulti_flow;
3618 rxq->promisc_flow = tmpl.promisc_flow;
3619 memcpy(rxq->mac_configured, tmpl.mac_configured,
3620 sizeof(rxq->mac_configured));
3621 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3623 /* Allocate pool. */
3624 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3626 ERROR("%p: cannot allocate memory", (void *)dev);
3629 /* Snatch mbufs from original queue. */
3632 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3634 for (i = 0; (i != elemof(*elts)); ++i) {
3635 struct rxq_elt_sp *elt = &(*elts)[i];
3638 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3639 assert(elt->bufs[j] != NULL);
3640 pool[k++] = elt->bufs[j];
3644 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3646 for (i = 0; (i != elemof(*elts)); ++i) {
3647 struct rxq_elt *elt = &(*elts)[i];
3648 struct rte_mbuf *buf = (void *)
3649 ((uintptr_t)elt->sge.addr -
3650 WR_ID(elt->wr.wr_id).offset);
3652 assert(WR_ID(elt->wr.wr_id).id == i);
3656 assert(k == mbuf_n);
3658 tmpl.elts.sp = NULL;
3659 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3661 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3662 rxq_alloc_elts(&tmpl, desc_n, pool));
3664 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3669 assert(tmpl.elts_n == desc_n);
3670 assert(tmpl.elts.sp != NULL);
3672 /* Clean up original data. */
3674 rte_free(rxq->elts.sp);
3675 rxq->elts.sp = NULL;
3677 err = ibv_post_recv(tmpl.qp,
3679 &(*tmpl.elts.sp)[0].wr :
3680 &(*tmpl.elts.no_sp)[0].wr),
3683 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3689 mod = (struct ibv_exp_qp_attr){
3690 .qp_state = IBV_QPS_RTR
3692 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3694 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3695 (void *)dev, strerror(err));
3703 * Configure a RX queue.
3706 * Pointer to Ethernet device structure.
3708 * Pointer to RX queue structure.
3710 * Number of descriptors to configure in queue.
3712 * NUMA socket on which memory must be allocated.
3714 * If true, the queue is disabled because its index is higher or
3715 * equal to the real number of queues, which must be a power of 2.
3717 * Thresholds parameters.
3719 * Memory pool for buffer allocations.
3722 * 0 on success, errno value on failure.
3725 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3726 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
3727 struct rte_mempool *mp)
3729 struct priv *priv = dev->data->dev_private;
3735 struct ibv_exp_qp_attr mod;
3737 struct ibv_exp_query_intf_params params;
3738 struct ibv_exp_cq_init_attr cq;
3739 struct ibv_exp_res_domain_init_attr rd;
3741 enum ibv_exp_query_intf_status status;
3742 struct ibv_recv_wr *bad_wr;
3743 struct rte_mbuf *buf;
3745 int parent = (rxq == &priv->rxq_parent);
3747 (void)conf; /* Thresholds configuration (ignored). */
3749 * If this is a parent queue, hardware must support RSS and
3750 * RSS must be enabled.
3752 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3754 /* Even if unused, ibv_create_cq() requires at least one
3759 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3760 ERROR("%p: invalid number of RX descriptors (must be a"
3761 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3764 /* Get mbuf length. */
3765 buf = rte_pktmbuf_alloc(mp);
3767 ERROR("%p: unable to allocate mbuf", (void *)dev);
3770 tmpl.mb_len = buf->buf_len;
3771 assert((rte_pktmbuf_headroom(buf) +
3772 rte_pktmbuf_tailroom(buf)) == tmpl.mb_len);
3773 assert(rte_pktmbuf_headroom(buf) == RTE_PKTMBUF_HEADROOM);
3774 rte_pktmbuf_free(buf);
3775 /* Toggle RX checksum offload if hardware supports it. */
3777 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3778 if (priv->hw_csum_l2tun)
3779 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3780 /* Enable scattered packets support for this queue if necessary. */
3781 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3782 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3783 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3785 desc /= MLX4_PMD_SGE_WR_N;
3787 DEBUG("%p: %s scattered packets support (%u WRs)",
3788 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3789 /* Use the entire RX mempool as the memory region. */
3790 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3791 if (tmpl.mr == NULL) {
3793 ERROR("%p: MR creation failure: %s",
3794 (void *)dev, strerror(ret));
3798 attr.rd = (struct ibv_exp_res_domain_init_attr){
3799 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3800 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3801 .thread_model = IBV_EXP_THREAD_SINGLE,
3802 .msg_model = IBV_EXP_MSG_HIGH_BW,
3804 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3805 if (tmpl.rd == NULL) {
3807 ERROR("%p: RD creation failure: %s",
3808 (void *)dev, strerror(ret));
3811 attr.cq = (struct ibv_exp_cq_init_attr){
3812 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3813 .res_domain = tmpl.rd,
3815 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3816 if (tmpl.cq == NULL) {
3818 ERROR("%p: CQ creation failure: %s",
3819 (void *)dev, strerror(ret));
3822 DEBUG("priv->device_attr.max_qp_wr is %d",
3823 priv->device_attr.max_qp_wr);
3824 DEBUG("priv->device_attr.max_sge is %d",
3825 priv->device_attr.max_sge);
3827 if (priv->rss && !inactive)
3828 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3831 #endif /* RSS_SUPPORT */
3832 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3833 if (tmpl.qp == NULL) {
3834 ret = (errno ? errno : EINVAL);
3835 ERROR("%p: QP creation failure: %s",
3836 (void *)dev, strerror(ret));
3839 mod = (struct ibv_exp_qp_attr){
3840 /* Move the QP to this state. */
3841 .qp_state = IBV_QPS_INIT,
3842 /* Primary port number. */
3843 .port_num = priv->port
3845 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3848 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3849 #endif /* RSS_SUPPORT */
3852 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3853 (void *)dev, strerror(ret));
3856 if ((parent) || (!priv->rss)) {
3857 /* Configure MAC and broadcast addresses. */
3858 ret = rxq_mac_addrs_add(&tmpl);
3860 ERROR("%p: QP flow attachment failed: %s",
3861 (void *)dev, strerror(ret));
3865 /* Allocate descriptors for RX queues, except for the RSS parent. */
3869 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3871 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3873 ERROR("%p: RXQ allocation failed: %s",
3874 (void *)dev, strerror(ret));
3877 ret = ibv_post_recv(tmpl.qp,
3879 &(*tmpl.elts.sp)[0].wr :
3880 &(*tmpl.elts.no_sp)[0].wr),
3883 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3890 mod = (struct ibv_exp_qp_attr){
3891 .qp_state = IBV_QPS_RTR
3893 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3895 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3896 (void *)dev, strerror(ret));
3900 tmpl.port_id = dev->data->port_id;
3901 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3902 attr.params = (struct ibv_exp_query_intf_params){
3903 .intf_scope = IBV_EXP_INTF_GLOBAL,
3904 .intf = IBV_EXP_INTF_CQ,
3907 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3908 if (tmpl.if_cq == NULL) {
3909 ERROR("%p: CQ interface family query failed with status %d",
3910 (void *)dev, status);
3913 attr.params = (struct ibv_exp_query_intf_params){
3914 .intf_scope = IBV_EXP_INTF_GLOBAL,
3915 .intf = IBV_EXP_INTF_QP_BURST,
3918 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3919 if (tmpl.if_qp == NULL) {
3920 ERROR("%p: QP interface family query failed with status %d",
3921 (void *)dev, status);
3924 /* Clean up rxq in case we're reinitializing it. */
3925 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3928 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3938 * DPDK callback to configure a RX queue.
3941 * Pointer to Ethernet device structure.
3945 * Number of descriptors to configure in queue.
3947 * NUMA socket on which memory must be allocated.
3949 * Thresholds parameters.
3951 * Memory pool for buffer allocations.
3954 * 0 on success, negative errno value on failure.
3957 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3958 unsigned int socket, const struct rte_eth_rxconf *conf,
3959 struct rte_mempool *mp)
3961 struct priv *priv = dev->data->dev_private;
3962 struct rxq *rxq = (*priv->rxqs)[idx];
3966 if (mlx4_is_secondary())
3967 return -E_RTE_SECONDARY;
3969 DEBUG("%p: configuring queue %u for %u descriptors",
3970 (void *)dev, idx, desc);
3971 if (idx >= priv->rxqs_n) {
3972 ERROR("%p: queue index out of range (%u >= %u)",
3973 (void *)dev, idx, priv->rxqs_n);
3978 DEBUG("%p: reusing already allocated queue index %u (%p)",
3979 (void *)dev, idx, (void *)rxq);
3980 if (priv->started) {
3984 (*priv->rxqs)[idx] = NULL;
3987 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3989 ERROR("%p: unable to allocate queue index %u",
3995 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
3997 ret = rxq_setup(dev, rxq, desc, socket, inactive, conf, mp);
4001 rxq->stats.idx = idx;
4002 DEBUG("%p: adding RX queue %p to list",
4003 (void *)dev, (void *)rxq);
4004 (*priv->rxqs)[idx] = rxq;
4005 /* Update receive callback. */
4007 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4009 dev->rx_pkt_burst = mlx4_rx_burst;
4016 * DPDK callback to release a RX queue.
4019 * Generic RX queue pointer.
4022 mlx4_rx_queue_release(void *dpdk_rxq)
4024 struct rxq *rxq = (struct rxq *)dpdk_rxq;
4028 if (mlx4_is_secondary())
4034 assert(rxq != &priv->rxq_parent);
4035 for (i = 0; (i != priv->rxqs_n); ++i)
4036 if ((*priv->rxqs)[i] == rxq) {
4037 DEBUG("%p: removing RX queue %p from list",
4038 (void *)priv->dev, (void *)rxq);
4039 (*priv->rxqs)[i] = NULL;
4048 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
4051 * DPDK callback to start the device.
4053 * Simulate device start by attaching all configured flows.
4056 * Pointer to Ethernet device structure.
4059 * 0 on success, negative errno value on failure.
4062 mlx4_dev_start(struct rte_eth_dev *dev)
4064 struct priv *priv = dev->data->dev_private;
4069 if (mlx4_is_secondary())
4070 return -E_RTE_SECONDARY;
4072 if (priv->started) {
4076 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4079 rxq = &priv->rxq_parent;
4082 rxq = (*priv->rxqs)[0];
4085 /* Iterate only once when RSS is enabled. */
4089 /* Ignore nonexistent RX queues. */
4092 ret = rxq_mac_addrs_add(rxq);
4093 if (!ret && priv->promisc)
4094 ret = rxq_promiscuous_enable(rxq);
4095 if (!ret && priv->allmulti)
4096 ret = rxq_allmulticast_enable(rxq);
4099 WARN("%p: QP flow attachment failed: %s",
4100 (void *)dev, strerror(ret));
4103 rxq = (*priv->rxqs)[--i];
4105 rxq_allmulticast_disable(rxq);
4106 rxq_promiscuous_disable(rxq);
4107 rxq_mac_addrs_del(rxq);
4113 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4114 priv_dev_interrupt_handler_install(priv, dev);
4120 * DPDK callback to stop the device.
4122 * Simulate device stop by detaching all configured flows.
4125 * Pointer to Ethernet device structure.
4128 mlx4_dev_stop(struct rte_eth_dev *dev)
4130 struct priv *priv = dev->data->dev_private;
4135 if (mlx4_is_secondary())
4138 if (!priv->started) {
4142 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4145 rxq = &priv->rxq_parent;
4148 rxq = (*priv->rxqs)[0];
4151 /* Iterate only once when RSS is enabled. */
4153 /* Ignore nonexistent RX queues. */
4156 rxq_allmulticast_disable(rxq);
4157 rxq_promiscuous_disable(rxq);
4158 rxq_mac_addrs_del(rxq);
4159 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4164 * Dummy DPDK callback for TX.
4166 * This function is used to temporarily replace the real callback during
4167 * unsafe control operations on the queue, or in case of error.
4170 * Generic pointer to TX queue structure.
4172 * Packets to transmit.
4174 * Number of packets in array.
4177 * Number of packets successfully transmitted (<= pkts_n).
4180 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4189 * Dummy DPDK callback for RX.
4191 * This function is used to temporarily replace the real callback during
4192 * unsafe control operations on the queue, or in case of error.
4195 * Generic pointer to RX queue structure.
4197 * Array to store received packets.
4199 * Maximum number of packets in array.
4202 * Number of packets successfully received (<= pkts_n).
4205 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4214 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4217 * DPDK callback to close the device.
4219 * Destroy all queues and objects, free memory.
4222 * Pointer to Ethernet device structure.
4225 mlx4_dev_close(struct rte_eth_dev *dev)
4227 struct priv *priv = mlx4_get_priv(dev);
4234 DEBUG("%p: closing device \"%s\"",
4236 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4237 /* Prevent crashes when queues are still in use. This is unfortunately
4238 * still required for DPDK 1.3 because some programs (such as testpmd)
4239 * never release them before closing the device. */
4240 dev->rx_pkt_burst = removed_rx_burst;
4241 dev->tx_pkt_burst = removed_tx_burst;
4242 if (priv->rxqs != NULL) {
4243 /* XXX race condition if mlx4_rx_burst() is still running. */
4245 for (i = 0; (i != priv->rxqs_n); ++i) {
4246 tmp = (*priv->rxqs)[i];
4249 (*priv->rxqs)[i] = NULL;
4256 if (priv->txqs != NULL) {
4257 /* XXX race condition if mlx4_tx_burst() is still running. */
4259 for (i = 0; (i != priv->txqs_n); ++i) {
4260 tmp = (*priv->txqs)[i];
4263 (*priv->txqs)[i] = NULL;
4271 rxq_cleanup(&priv->rxq_parent);
4272 if (priv->pd != NULL) {
4273 assert(priv->ctx != NULL);
4274 claim_zero(ibv_dealloc_pd(priv->pd));
4275 claim_zero(ibv_close_device(priv->ctx));
4277 assert(priv->ctx == NULL);
4278 priv_dev_interrupt_handler_uninstall(priv, dev);
4280 memset(priv, 0, sizeof(*priv));
4284 * DPDK callback to get information about the device.
4287 * Pointer to Ethernet device structure.
4289 * Info structure output buffer.
4292 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4294 struct priv *priv = mlx4_get_priv(dev);
4296 char ifname[IF_NAMESIZE];
4301 /* FIXME: we should ask the device for these values. */
4302 info->min_rx_bufsize = 32;
4303 info->max_rx_pktlen = 65536;
4305 * Since we need one CQ per QP, the limit is the minimum number
4306 * between the two values.
4308 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4309 priv->device_attr.max_qp : priv->device_attr.max_cq);
4310 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4313 info->max_rx_queues = max;
4314 info->max_tx_queues = max;
4315 /* Last array entry is reserved for broadcast. */
4316 info->max_mac_addrs = (elemof(priv->mac) - 1);
4317 info->rx_offload_capa =
4319 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4320 DEV_RX_OFFLOAD_UDP_CKSUM |
4321 DEV_RX_OFFLOAD_TCP_CKSUM) :
4323 info->tx_offload_capa =
4325 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4326 DEV_TX_OFFLOAD_UDP_CKSUM |
4327 DEV_TX_OFFLOAD_TCP_CKSUM) :
4329 if (priv_get_ifname(priv, &ifname) == 0)
4330 info->if_index = if_nametoindex(ifname);
4333 ETH_LINK_SPEED_10G |
4334 ETH_LINK_SPEED_20G |
4335 ETH_LINK_SPEED_40G |
4340 static const uint32_t *
4341 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4343 static const uint32_t ptypes[] = {
4344 /* refers to rxq_cq_to_pkt_type() */
4347 RTE_PTYPE_INNER_L3_IPV4,
4348 RTE_PTYPE_INNER_L3_IPV6,
4352 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4353 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4359 * DPDK callback to get device statistics.
4362 * Pointer to Ethernet device structure.
4364 * Stats structure output buffer.
4367 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4369 struct priv *priv = mlx4_get_priv(dev);
4370 struct rte_eth_stats tmp = {0};
4377 /* Add software counters. */
4378 for (i = 0; (i != priv->rxqs_n); ++i) {
4379 struct rxq *rxq = (*priv->rxqs)[i];
4383 idx = rxq->stats.idx;
4384 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4385 #ifdef MLX4_PMD_SOFT_COUNTERS
4386 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4387 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4389 tmp.q_errors[idx] += (rxq->stats.idropped +
4390 rxq->stats.rx_nombuf);
4392 #ifdef MLX4_PMD_SOFT_COUNTERS
4393 tmp.ipackets += rxq->stats.ipackets;
4394 tmp.ibytes += rxq->stats.ibytes;
4396 tmp.ierrors += rxq->stats.idropped;
4397 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4399 for (i = 0; (i != priv->txqs_n); ++i) {
4400 struct txq *txq = (*priv->txqs)[i];
4404 idx = txq->stats.idx;
4405 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4406 #ifdef MLX4_PMD_SOFT_COUNTERS
4407 tmp.q_opackets[idx] += txq->stats.opackets;
4408 tmp.q_obytes[idx] += txq->stats.obytes;
4410 tmp.q_errors[idx] += txq->stats.odropped;
4412 #ifdef MLX4_PMD_SOFT_COUNTERS
4413 tmp.opackets += txq->stats.opackets;
4414 tmp.obytes += txq->stats.obytes;
4416 tmp.oerrors += txq->stats.odropped;
4418 #ifndef MLX4_PMD_SOFT_COUNTERS
4419 /* FIXME: retrieve and add hardware counters. */
4426 * DPDK callback to clear device statistics.
4429 * Pointer to Ethernet device structure.
4432 mlx4_stats_reset(struct rte_eth_dev *dev)
4434 struct priv *priv = mlx4_get_priv(dev);
4441 for (i = 0; (i != priv->rxqs_n); ++i) {
4442 if ((*priv->rxqs)[i] == NULL)
4444 idx = (*priv->rxqs)[i]->stats.idx;
4445 (*priv->rxqs)[i]->stats =
4446 (struct mlx4_rxq_stats){ .idx = idx };
4448 for (i = 0; (i != priv->txqs_n); ++i) {
4449 if ((*priv->txqs)[i] == NULL)
4451 idx = (*priv->txqs)[i]->stats.idx;
4452 (*priv->txqs)[i]->stats =
4453 (struct mlx4_txq_stats){ .idx = idx };
4455 #ifndef MLX4_PMD_SOFT_COUNTERS
4456 /* FIXME: reset hardware counters. */
4462 * DPDK callback to remove a MAC address.
4465 * Pointer to Ethernet device structure.
4467 * MAC address index.
4470 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4472 struct priv *priv = dev->data->dev_private;
4474 if (mlx4_is_secondary())
4477 DEBUG("%p: removing MAC address from index %" PRIu32,
4478 (void *)dev, index);
4479 /* Last array entry is reserved for broadcast. */
4480 if (index >= (elemof(priv->mac) - 1))
4482 priv_mac_addr_del(priv, index);
4488 * DPDK callback to add a MAC address.
4491 * Pointer to Ethernet device structure.
4493 * MAC address to register.
4495 * MAC address index.
4497 * VMDq pool index to associate address with (ignored).
4500 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4501 uint32_t index, uint32_t vmdq)
4503 struct priv *priv = dev->data->dev_private;
4505 if (mlx4_is_secondary())
4509 DEBUG("%p: adding MAC address at index %" PRIu32,
4510 (void *)dev, index);
4511 /* Last array entry is reserved for broadcast. */
4512 if (index >= (elemof(priv->mac) - 1))
4514 priv_mac_addr_add(priv, index,
4515 (const uint8_t (*)[ETHER_ADDR_LEN])
4516 mac_addr->addr_bytes);
4522 * DPDK callback to set the primary MAC address.
4525 * Pointer to Ethernet device structure.
4527 * MAC address to register.
4530 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4532 DEBUG("%p: setting primary MAC address", (void *)dev);
4533 mlx4_mac_addr_remove(dev, 0);
4534 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4538 * DPDK callback to enable promiscuous mode.
4541 * Pointer to Ethernet device structure.
4544 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4546 struct priv *priv = dev->data->dev_private;
4550 if (mlx4_is_secondary())
4553 if (priv->promisc) {
4557 /* If device isn't started, this is all we need to do. */
4561 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4568 for (i = 0; (i != priv->rxqs_n); ++i) {
4569 if ((*priv->rxqs)[i] == NULL)
4571 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4574 /* Failure, rollback. */
4576 if ((*priv->rxqs)[--i] != NULL)
4577 rxq_promiscuous_disable((*priv->rxqs)[i]);
4587 * DPDK callback to disable promiscuous mode.
4590 * Pointer to Ethernet device structure.
4593 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4595 struct priv *priv = dev->data->dev_private;
4598 if (mlx4_is_secondary())
4601 if (!priv->promisc) {
4606 rxq_promiscuous_disable(&priv->rxq_parent);
4609 for (i = 0; (i != priv->rxqs_n); ++i)
4610 if ((*priv->rxqs)[i] != NULL)
4611 rxq_promiscuous_disable((*priv->rxqs)[i]);
4618 * DPDK callback to enable allmulti mode.
4621 * Pointer to Ethernet device structure.
4624 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4626 struct priv *priv = dev->data->dev_private;
4630 if (mlx4_is_secondary())
4633 if (priv->allmulti) {
4637 /* If device isn't started, this is all we need to do. */
4641 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4648 for (i = 0; (i != priv->rxqs_n); ++i) {
4649 if ((*priv->rxqs)[i] == NULL)
4651 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4654 /* Failure, rollback. */
4656 if ((*priv->rxqs)[--i] != NULL)
4657 rxq_allmulticast_disable((*priv->rxqs)[i]);
4667 * DPDK callback to disable allmulti mode.
4670 * Pointer to Ethernet device structure.
4673 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4675 struct priv *priv = dev->data->dev_private;
4678 if (mlx4_is_secondary())
4681 if (!priv->allmulti) {
4686 rxq_allmulticast_disable(&priv->rxq_parent);
4689 for (i = 0; (i != priv->rxqs_n); ++i)
4690 if ((*priv->rxqs)[i] != NULL)
4691 rxq_allmulticast_disable((*priv->rxqs)[i]);
4698 * DPDK callback to retrieve physical link information (unlocked version).
4701 * Pointer to Ethernet device structure.
4702 * @param wait_to_complete
4703 * Wait for request completion (ignored).
4706 mlx4_link_update_unlocked(struct rte_eth_dev *dev, int wait_to_complete)
4708 struct priv *priv = mlx4_get_priv(dev);
4709 struct ethtool_cmd edata = {
4713 struct rte_eth_link dev_link;
4718 (void)wait_to_complete;
4719 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4720 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4723 memset(&dev_link, 0, sizeof(dev_link));
4724 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4725 (ifr.ifr_flags & IFF_RUNNING));
4726 ifr.ifr_data = &edata;
4727 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4728 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4732 link_speed = ethtool_cmd_speed(&edata);
4733 if (link_speed == -1)
4734 dev_link.link_speed = 0;
4736 dev_link.link_speed = link_speed;
4737 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4738 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4739 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4740 /* Link status changed. */
4741 dev->data->dev_link = dev_link;
4744 /* Link status is still the same. */
4749 * DPDK callback to retrieve physical link information.
4752 * Pointer to Ethernet device structure.
4753 * @param wait_to_complete
4754 * Wait for request completion (ignored).
4757 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4759 struct priv *priv = mlx4_get_priv(dev);
4765 ret = mlx4_link_update_unlocked(dev, wait_to_complete);
4771 * DPDK callback to change the MTU.
4773 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4774 * received). Use this as a hint to enable/disable scattered packets support
4775 * and improve performance when not needed.
4776 * Since failure is not an option, reconfiguring queues on the fly is not
4780 * Pointer to Ethernet device structure.
4785 * 0 on success, negative errno value on failure.
4788 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4790 struct priv *priv = dev->data->dev_private;
4793 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4796 if (mlx4_is_secondary())
4797 return -E_RTE_SECONDARY;
4799 /* Set kernel interface MTU first. */
4800 if (priv_set_mtu(priv, mtu)) {
4802 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4806 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4808 /* Temporarily replace RX handler with a fake one, assuming it has not
4809 * been copied elsewhere. */
4810 dev->rx_pkt_burst = removed_rx_burst;
4811 /* Make sure everyone has left mlx4_rx_burst() and uses
4812 * removed_rx_burst() instead. */
4815 /* Reconfigure each RX queue. */
4816 for (i = 0; (i != priv->rxqs_n); ++i) {
4817 struct rxq *rxq = (*priv->rxqs)[i];
4818 unsigned int max_frame_len;
4823 /* Calculate new maximum frame length according to MTU and
4824 * toggle scattered support (sp) if necessary. */
4825 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4826 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4827 sp = (max_frame_len > (rxq->mb_len - RTE_PKTMBUF_HEADROOM));
4828 /* Provide new values to rxq_setup(). */
4829 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4830 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4831 ret = rxq_rehash(dev, rxq);
4833 /* Force SP RX if that queue requires it and abort. */
4835 rx_func = mlx4_rx_burst_sp;
4838 /* Reenable non-RSS queue attributes. No need to check
4839 * for errors at this stage. */
4841 rxq_mac_addrs_add(rxq);
4843 rxq_promiscuous_enable(rxq);
4845 rxq_allmulticast_enable(rxq);
4847 /* Scattered burst function takes priority. */
4849 rx_func = mlx4_rx_burst_sp;
4851 /* Burst functions can now be called again. */
4853 dev->rx_pkt_burst = rx_func;
4861 * DPDK callback to get flow control status.
4864 * Pointer to Ethernet device structure.
4865 * @param[out] fc_conf
4866 * Flow control output buffer.
4869 * 0 on success, negative errno value on failure.
4872 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4874 struct priv *priv = dev->data->dev_private;
4876 struct ethtool_pauseparam ethpause = {
4877 .cmd = ETHTOOL_GPAUSEPARAM
4881 if (mlx4_is_secondary())
4882 return -E_RTE_SECONDARY;
4883 ifr.ifr_data = ðpause;
4885 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4887 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4893 fc_conf->autoneg = ethpause.autoneg;
4894 if (ethpause.rx_pause && ethpause.tx_pause)
4895 fc_conf->mode = RTE_FC_FULL;
4896 else if (ethpause.rx_pause)
4897 fc_conf->mode = RTE_FC_RX_PAUSE;
4898 else if (ethpause.tx_pause)
4899 fc_conf->mode = RTE_FC_TX_PAUSE;
4901 fc_conf->mode = RTE_FC_NONE;
4911 * DPDK callback to modify flow control parameters.
4914 * Pointer to Ethernet device structure.
4915 * @param[in] fc_conf
4916 * Flow control parameters.
4919 * 0 on success, negative errno value on failure.
4922 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4924 struct priv *priv = dev->data->dev_private;
4926 struct ethtool_pauseparam ethpause = {
4927 .cmd = ETHTOOL_SPAUSEPARAM
4931 if (mlx4_is_secondary())
4932 return -E_RTE_SECONDARY;
4933 ifr.ifr_data = ðpause;
4934 ethpause.autoneg = fc_conf->autoneg;
4935 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4936 (fc_conf->mode & RTE_FC_RX_PAUSE))
4937 ethpause.rx_pause = 1;
4939 ethpause.rx_pause = 0;
4941 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4942 (fc_conf->mode & RTE_FC_TX_PAUSE))
4943 ethpause.tx_pause = 1;
4945 ethpause.tx_pause = 0;
4948 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4950 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4964 * Configure a VLAN filter.
4967 * Pointer to Ethernet device structure.
4969 * VLAN ID to filter.
4974 * 0 on success, errno value on failure.
4977 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4979 struct priv *priv = dev->data->dev_private;
4981 unsigned int j = -1;
4983 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4984 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4985 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4986 if (!priv->vlan_filter[i].enabled) {
4987 /* Unused index, remember it. */
4991 if (priv->vlan_filter[i].id != vlan_id)
4993 /* This VLAN ID is already known, use its index. */
4997 /* Check if there's room for another VLAN filter. */
4998 if (j == (unsigned int)-1)
5001 * VLAN filters apply to all configured MAC addresses, flow
5002 * specifications must be reconfigured accordingly.
5004 priv->vlan_filter[j].id = vlan_id;
5005 if ((on) && (!priv->vlan_filter[j].enabled)) {
5007 * Filter is disabled, enable it.
5008 * Rehashing flows in all RX queues is necessary.
5011 rxq_mac_addrs_del(&priv->rxq_parent);
5013 for (i = 0; (i != priv->rxqs_n); ++i)
5014 if ((*priv->rxqs)[i] != NULL)
5015 rxq_mac_addrs_del((*priv->rxqs)[i]);
5016 priv->vlan_filter[j].enabled = 1;
5017 if (priv->started) {
5019 rxq_mac_addrs_add(&priv->rxq_parent);
5021 for (i = 0; (i != priv->rxqs_n); ++i) {
5022 if ((*priv->rxqs)[i] == NULL)
5024 rxq_mac_addrs_add((*priv->rxqs)[i]);
5027 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
5029 * Filter is enabled, disable it.
5030 * Rehashing flows in all RX queues is necessary.
5033 rxq_mac_addrs_del(&priv->rxq_parent);
5035 for (i = 0; (i != priv->rxqs_n); ++i)
5036 if ((*priv->rxqs)[i] != NULL)
5037 rxq_mac_addrs_del((*priv->rxqs)[i]);
5038 priv->vlan_filter[j].enabled = 0;
5039 if (priv->started) {
5041 rxq_mac_addrs_add(&priv->rxq_parent);
5043 for (i = 0; (i != priv->rxqs_n); ++i) {
5044 if ((*priv->rxqs)[i] == NULL)
5046 rxq_mac_addrs_add((*priv->rxqs)[i]);
5054 * DPDK callback to configure a VLAN filter.
5057 * Pointer to Ethernet device structure.
5059 * VLAN ID to filter.
5064 * 0 on success, negative errno value on failure.
5067 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5069 struct priv *priv = dev->data->dev_private;
5072 if (mlx4_is_secondary())
5073 return -E_RTE_SECONDARY;
5075 ret = vlan_filter_set(dev, vlan_id, on);
5081 static const struct eth_dev_ops mlx4_dev_ops = {
5082 .dev_configure = mlx4_dev_configure,
5083 .dev_start = mlx4_dev_start,
5084 .dev_stop = mlx4_dev_stop,
5085 .dev_close = mlx4_dev_close,
5086 .promiscuous_enable = mlx4_promiscuous_enable,
5087 .promiscuous_disable = mlx4_promiscuous_disable,
5088 .allmulticast_enable = mlx4_allmulticast_enable,
5089 .allmulticast_disable = mlx4_allmulticast_disable,
5090 .link_update = mlx4_link_update,
5091 .stats_get = mlx4_stats_get,
5092 .stats_reset = mlx4_stats_reset,
5093 .queue_stats_mapping_set = NULL,
5094 .dev_infos_get = mlx4_dev_infos_get,
5095 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5096 .vlan_filter_set = mlx4_vlan_filter_set,
5097 .vlan_tpid_set = NULL,
5098 .vlan_strip_queue_set = NULL,
5099 .vlan_offload_set = NULL,
5100 .rx_queue_setup = mlx4_rx_queue_setup,
5101 .tx_queue_setup = mlx4_tx_queue_setup,
5102 .rx_queue_release = mlx4_rx_queue_release,
5103 .tx_queue_release = mlx4_tx_queue_release,
5105 .dev_led_off = NULL,
5106 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5107 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5108 .priority_flow_ctrl_set = NULL,
5109 .mac_addr_remove = mlx4_mac_addr_remove,
5110 .mac_addr_add = mlx4_mac_addr_add,
5111 .mac_addr_set = mlx4_mac_addr_set,
5112 .mtu_set = mlx4_dev_set_mtu,
5116 * Get PCI information from struct ibv_device.
5119 * Pointer to Ethernet device structure.
5120 * @param[out] pci_addr
5121 * PCI bus address output buffer.
5124 * 0 on success, -1 on failure and errno is set.
5127 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5128 struct rte_pci_addr *pci_addr)
5132 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5134 file = fopen(path, "rb");
5137 while (fgets(line, sizeof(line), file) == line) {
5138 size_t len = strlen(line);
5141 /* Truncate long lines. */
5142 if (len == (sizeof(line) - 1))
5143 while (line[(len - 1)] != '\n') {
5147 line[(len - 1)] = ret;
5149 /* Extract information. */
5152 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5156 &pci_addr->function) == 4) {
5166 * Get MAC address by querying netdevice.
5169 * struct priv for the requested device.
5171 * MAC address output buffer.
5174 * 0 on success, -1 on failure and errno is set.
5177 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5179 struct ifreq request;
5181 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5183 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5187 /* Support up to 32 adapters. */
5189 struct rte_pci_addr pci_addr; /* associated PCI address */
5190 uint32_t ports; /* physical ports bitfield. */
5194 * Get device index in mlx4_dev[] from PCI bus address.
5196 * @param[in] pci_addr
5197 * PCI bus address to look for.
5200 * mlx4_dev[] index on success, -1 on failure.
5203 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5208 assert(pci_addr != NULL);
5209 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5210 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5211 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5212 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5213 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5215 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5222 * Retrieve integer value from environment variable.
5225 * Environment variable name.
5228 * Integer value, 0 if the variable is not set.
5231 mlx4_getenv_int(const char *name)
5233 const char *val = getenv(name);
5241 mlx4_dev_link_status_handler(void *);
5243 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5246 * Link status handler.
5249 * Pointer to private structure.
5251 * Pointer to the rte_eth_dev structure.
5254 * Nonzero if the callback process can be called immediately.
5257 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5259 struct ibv_async_event event;
5260 int port_change = 0;
5263 /* Read all message and acknowledge them. */
5265 if (ibv_get_async_event(priv->ctx, &event))
5268 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5269 event.event_type == IBV_EVENT_PORT_ERR)
5272 DEBUG("event type %d on port %d not handled",
5273 event.event_type, event.element.port_num);
5274 ibv_ack_async_event(&event);
5277 if (port_change ^ priv->pending_alarm) {
5278 struct rte_eth_link *link = &dev->data->dev_link;
5280 priv->pending_alarm = 0;
5281 mlx4_link_update_unlocked(dev, 0);
5282 if (((link->link_speed == 0) && link->link_status) ||
5283 ((link->link_speed != 0) && !link->link_status)) {
5284 /* Inconsistent status, check again later. */
5285 priv->pending_alarm = 1;
5286 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5287 mlx4_dev_link_status_handler,
5296 * Handle delayed link status event.
5299 * Registered argument.
5302 mlx4_dev_link_status_handler(void *arg)
5304 struct rte_eth_dev *dev = arg;
5305 struct priv *priv = dev->data->dev_private;
5309 assert(priv->pending_alarm == 1);
5310 ret = priv_dev_link_status_handler(priv, dev);
5313 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5317 * Handle interrupts from the NIC.
5319 * @param[in] intr_handle
5320 * Interrupt handler.
5322 * Callback argument.
5325 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5327 struct rte_eth_dev *dev = cb_arg;
5328 struct priv *priv = dev->data->dev_private;
5333 ret = priv_dev_link_status_handler(priv, dev);
5336 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5340 * Uninstall interrupt handler.
5343 * Pointer to private structure.
5345 * Pointer to the rte_eth_dev structure.
5348 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5350 if (!dev->data->dev_conf.intr_conf.lsc)
5352 rte_intr_callback_unregister(&priv->intr_handle,
5353 mlx4_dev_interrupt_handler,
5355 if (priv->pending_alarm)
5356 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5357 priv->pending_alarm = 0;
5358 priv->intr_handle.fd = 0;
5359 priv->intr_handle.type = 0;
5363 * Install interrupt handler.
5366 * Pointer to private structure.
5368 * Pointer to the rte_eth_dev structure.
5371 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5375 if (!dev->data->dev_conf.intr_conf.lsc)
5377 assert(priv->ctx->async_fd > 0);
5378 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5379 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5381 INFO("failed to change file descriptor async event queue");
5382 dev->data->dev_conf.intr_conf.lsc = 0;
5384 priv->intr_handle.fd = priv->ctx->async_fd;
5385 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5386 rte_intr_callback_register(&priv->intr_handle,
5387 mlx4_dev_interrupt_handler,
5392 static struct eth_driver mlx4_driver;
5395 * DPDK callback to register a PCI device.
5397 * This function creates an Ethernet device for each port of a given
5400 * @param[in] pci_drv
5401 * PCI driver structure (mlx4_driver).
5402 * @param[in] pci_dev
5403 * PCI device information.
5406 * 0 on success, negative errno value on failure.
5409 mlx4_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5411 struct ibv_device **list;
5412 struct ibv_device *ibv_dev;
5414 struct ibv_context *attr_ctx = NULL;
5415 struct ibv_device_attr device_attr;
5421 assert(pci_drv == &mlx4_driver.pci_drv);
5422 /* Get mlx4_dev[] index. */
5423 idx = mlx4_dev_idx(&pci_dev->addr);
5425 ERROR("this driver cannot support any more adapters");
5428 DEBUG("using driver device index %d", idx);
5430 /* Save PCI address. */
5431 mlx4_dev[idx].pci_addr = pci_dev->addr;
5432 list = ibv_get_device_list(&i);
5435 if (errno == ENOSYS) {
5436 WARN("cannot list devices, is ib_uverbs loaded?");
5443 * For each listed device, check related sysfs entry against
5444 * the provided PCI ID.
5447 struct rte_pci_addr pci_addr;
5450 DEBUG("checking device \"%s\"", list[i]->name);
5451 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5453 if ((pci_dev->addr.domain != pci_addr.domain) ||
5454 (pci_dev->addr.bus != pci_addr.bus) ||
5455 (pci_dev->addr.devid != pci_addr.devid) ||
5456 (pci_dev->addr.function != pci_addr.function))
5458 vf = (pci_dev->id.device_id ==
5459 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5460 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5461 list[i]->name, (vf ? "true" : "false"));
5462 attr_ctx = ibv_open_device(list[i]);
5466 if (attr_ctx == NULL) {
5467 ibv_free_device_list(list);
5470 WARN("cannot access device, is mlx4_ib loaded?");
5473 WARN("cannot use device, are drivers up to date?");
5481 DEBUG("device opened");
5482 if (ibv_query_device(attr_ctx, &device_attr))
5484 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5486 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5487 uint32_t port = i + 1; /* ports are indexed from one */
5488 uint32_t test = (1 << i);
5489 struct ibv_context *ctx = NULL;
5490 struct ibv_port_attr port_attr;
5491 struct ibv_pd *pd = NULL;
5492 struct priv *priv = NULL;
5493 struct rte_eth_dev *eth_dev = NULL;
5494 #ifdef HAVE_EXP_QUERY_DEVICE
5495 struct ibv_exp_device_attr exp_device_attr;
5496 #endif /* HAVE_EXP_QUERY_DEVICE */
5497 struct ether_addr mac;
5499 #ifdef HAVE_EXP_QUERY_DEVICE
5500 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5502 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5503 #endif /* RSS_SUPPORT */
5504 #endif /* HAVE_EXP_QUERY_DEVICE */
5506 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5508 ctx = ibv_open_device(ibv_dev);
5512 /* Check port status. */
5513 err = ibv_query_port(ctx, port, &port_attr);
5515 ERROR("port query failed: %s", strerror(err));
5519 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5520 ERROR("port %d is not configured in Ethernet mode",
5525 if (port_attr.state != IBV_PORT_ACTIVE)
5526 DEBUG("port %d is not active: \"%s\" (%d)",
5527 port, ibv_port_state_str(port_attr.state),
5530 /* Allocate protection domain. */
5531 pd = ibv_alloc_pd(ctx);
5533 ERROR("PD allocation failure");
5538 mlx4_dev[idx].ports |= test;
5540 /* from rte_ethdev.c */
5541 priv = rte_zmalloc("ethdev private structure",
5543 RTE_CACHE_LINE_SIZE);
5545 ERROR("priv allocation failure");
5551 priv->device_attr = device_attr;
5554 priv->mtu = ETHER_MTU;
5555 #ifdef HAVE_EXP_QUERY_DEVICE
5556 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5557 ERROR("ibv_exp_query_device() failed");
5561 if ((exp_device_attr.exp_device_cap_flags &
5562 IBV_EXP_DEVICE_QPG) &&
5563 (exp_device_attr.exp_device_cap_flags &
5564 IBV_EXP_DEVICE_UD_RSS) &&
5565 (exp_device_attr.comp_mask &
5566 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5567 (exp_device_attr.max_rss_tbl_sz > 0)) {
5570 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5574 priv->max_rss_tbl_sz = 0;
5576 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5577 IBV_EXP_DEVICE_UD_TSS);
5578 DEBUG("device flags: %s%s%s",
5579 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5580 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5581 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5583 DEBUG("maximum RSS indirection table size: %u",
5584 exp_device_attr.max_rss_tbl_sz);
5585 #endif /* RSS_SUPPORT */
5588 ((exp_device_attr.exp_device_cap_flags &
5589 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5590 (exp_device_attr.exp_device_cap_flags &
5591 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5592 DEBUG("checksum offloading is %ssupported",
5593 (priv->hw_csum ? "" : "not "));
5595 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5596 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5597 DEBUG("L2 tunnel checksum offloads are %ssupported",
5598 (priv->hw_csum_l2tun ? "" : "not "));
5601 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5603 if (priv->inl_recv_size) {
5604 exp_device_attr.comp_mask =
5605 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5606 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5607 INFO("Couldn't query device for inline-receive"
5609 priv->inl_recv_size = 0;
5611 if ((unsigned)exp_device_attr.inline_recv_sz <
5612 priv->inl_recv_size) {
5613 INFO("Max inline-receive (%d) <"
5614 " requested inline-receive (%u)",
5615 exp_device_attr.inline_recv_sz,
5616 priv->inl_recv_size);
5617 priv->inl_recv_size =
5618 exp_device_attr.inline_recv_sz;
5621 INFO("Set inline receive size to %u",
5622 priv->inl_recv_size);
5624 #endif /* INLINE_RECV */
5625 #endif /* HAVE_EXP_QUERY_DEVICE */
5627 (void)mlx4_getenv_int;
5629 /* Configure the first MAC address by default. */
5630 if (priv_get_mac(priv, &mac.addr_bytes)) {
5631 ERROR("cannot get MAC address, is mlx4_en loaded?"
5632 " (errno: %s)", strerror(errno));
5635 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5637 mac.addr_bytes[0], mac.addr_bytes[1],
5638 mac.addr_bytes[2], mac.addr_bytes[3],
5639 mac.addr_bytes[4], mac.addr_bytes[5]);
5640 /* Register MAC and broadcast addresses. */
5641 claim_zero(priv_mac_addr_add(priv, 0,
5642 (const uint8_t (*)[ETHER_ADDR_LEN])
5644 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5645 &(const uint8_t [ETHER_ADDR_LEN])
5646 { "\xff\xff\xff\xff\xff\xff" }));
5649 char ifname[IF_NAMESIZE];
5651 if (priv_get_ifname(priv, &ifname) == 0)
5652 DEBUG("port %u ifname is \"%s\"",
5653 priv->port, ifname);
5655 DEBUG("port %u ifname is unknown", priv->port);
5658 /* Get actual MTU if possible. */
5659 priv_get_mtu(priv, &priv->mtu);
5660 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5662 /* from rte_ethdev.c */
5664 char name[RTE_ETH_NAME_MAX_LEN];
5666 snprintf(name, sizeof(name), "%s port %u",
5667 ibv_get_device_name(ibv_dev), port);
5668 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
5670 if (eth_dev == NULL) {
5671 ERROR("can not allocate rte ethdev");
5676 /* Secondary processes have to use local storage for their
5677 * private data as well as a copy of eth_dev->data, but this
5678 * pointer must not be modified before burst functions are
5679 * actually called. */
5680 if (mlx4_is_secondary()) {
5681 struct mlx4_secondary_data *sd =
5682 &mlx4_secondary_data[eth_dev->data->port_id];
5684 sd->primary_priv = eth_dev->data->dev_private;
5685 if (sd->primary_priv == NULL) {
5686 ERROR("no private data for port %u",
5687 eth_dev->data->port_id);
5691 sd->shared_dev_data = eth_dev->data;
5692 rte_spinlock_init(&sd->lock);
5693 memcpy(sd->data.name, sd->shared_dev_data->name,
5694 sizeof(sd->data.name));
5695 sd->data.dev_private = priv;
5696 sd->data.rx_mbuf_alloc_failed = 0;
5697 sd->data.mtu = ETHER_MTU;
5698 sd->data.port_id = sd->shared_dev_data->port_id;
5699 sd->data.mac_addrs = priv->mac;
5700 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5701 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5703 eth_dev->data->dev_private = priv;
5704 eth_dev->data->rx_mbuf_alloc_failed = 0;
5705 eth_dev->data->mtu = ETHER_MTU;
5706 eth_dev->data->mac_addrs = priv->mac;
5708 eth_dev->pci_dev = pci_dev;
5710 rte_eth_copy_pci_info(eth_dev, pci_dev);
5712 eth_dev->driver = &mlx4_driver;
5714 priv->dev = eth_dev;
5715 eth_dev->dev_ops = &mlx4_dev_ops;
5716 TAILQ_INIT(ð_dev->link_intr_cbs);
5718 /* Bring Ethernet device up. */
5719 DEBUG("forcing Ethernet interface up");
5720 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5726 claim_zero(ibv_dealloc_pd(pd));
5728 claim_zero(ibv_close_device(ctx));
5730 rte_eth_dev_release_port(eth_dev);
5735 * XXX if something went wrong in the loop above, there is a resource
5736 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5737 * long as the dpdk does not provide a way to deallocate a ethdev and a
5738 * way to enumerate the registered ethdevs to free the previous ones.
5741 /* no port found, complain */
5742 if (!mlx4_dev[idx].ports) {
5749 claim_zero(ibv_close_device(attr_ctx));
5751 ibv_free_device_list(list);
5756 static const struct rte_pci_id mlx4_pci_id_map[] = {
5758 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5759 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3,
5760 .subsystem_vendor_id = PCI_ANY_ID,
5761 .subsystem_device_id = PCI_ANY_ID
5764 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5765 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO,
5766 .subsystem_vendor_id = PCI_ANY_ID,
5767 .subsystem_device_id = PCI_ANY_ID
5770 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5771 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3VF,
5772 .subsystem_vendor_id = PCI_ANY_ID,
5773 .subsystem_device_id = PCI_ANY_ID
5780 static struct eth_driver mlx4_driver = {
5782 .name = MLX4_DRIVER_NAME,
5783 .id_table = mlx4_pci_id_map,
5784 .devinit = mlx4_pci_devinit,
5785 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5787 .dev_private_size = sizeof(struct priv)
5791 * Driver initialization routine.
5794 rte_mlx4_pmd_init(const char *name, const char *args)
5799 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5801 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5802 * huge pages. Calling ibv_fork_init() during init allows
5803 * applications to use fork() safely for purposes other than
5804 * using this PMD, which is not supported in forked processes.
5806 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5808 rte_eal_pci_register(&mlx4_driver.pci_drv);
5812 static struct rte_driver rte_mlx4_driver = {
5814 .name = MLX4_DRIVER_NAME,
5815 .init = rte_mlx4_pmd_init,
5818 PMD_REGISTER_DRIVER(rte_mlx4_driver)