4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
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34 #ifndef RTE_PMD_MLX4_H_
35 #define RTE_PMD_MLX4_H_
40 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
42 #pragma GCC diagnostic ignored "-Wpedantic"
44 #include <infiniband/verbs.h>
46 #pragma GCC diagnostic error "-Wpedantic"
49 #include <rte_ethdev.h>
50 #include <rte_ether.h>
51 #include <rte_interrupts.h>
53 /* Request send completion once in every 64 sends, might be less. */
54 #define MLX4_PMD_TX_PER_COMP_REQ 64
56 /* Maximum size for inline data. */
57 #define MLX4_PMD_MAX_INLINE 0
60 * Maximum number of cached Memory Pools (MPs) per TX queue. Each RTE MP
61 * from which buffers are to be transmitted will have to be mapped by this
62 * driver to their own Memory Region (MR). This is a slow operation.
64 * This value is always 1 for RX queues.
66 #ifndef MLX4_PMD_TX_MP_CACHE
67 #define MLX4_PMD_TX_MP_CACHE 8
70 /* Interrupt alarm timeout value in microseconds. */
71 #define MLX4_INTR_ALARM_TIMEOUT 100000
74 #define MLX4_PMD_PORT_KVARG "port"
77 PCI_VENDOR_ID_MELLANOX = 0x15b3,
81 PCI_DEVICE_ID_MELLANOX_CONNECTX3 = 0x1003,
82 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF = 0x1004,
83 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO = 0x1007,
86 #define MLX4_DRIVER_NAME "net_mlx4"
88 struct mlx4_rxq_stats {
89 unsigned int idx; /**< Mapping index. */
90 uint64_t ipackets; /**< Total of successfully received packets. */
91 uint64_t ibytes; /**< Total of successfully received bytes. */
92 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
93 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
98 struct ibv_recv_wr wr; /* Work Request. */
99 struct ibv_sge sge; /* Scatter/Gather Element. */
100 struct rte_mbuf *buf; /**< Buffer. */
103 /* RX queue descriptor. */
105 struct priv *priv; /* Back pointer to private data. */
106 struct rte_mempool *mp; /* Memory Pool for allocations. */
107 struct ibv_mr *mr; /* Memory Region (for mp). */
108 struct ibv_cq *cq; /* Completion Queue. */
109 struct ibv_qp *qp; /* Queue Pair. */
110 struct ibv_comp_channel *channel;
111 unsigned int port_id; /* Port ID for incoming packets. */
112 unsigned int elts_n; /* (*elts)[] length. */
113 unsigned int elts_head; /* Current index in (*elts)[]. */
114 struct rxq_elt (*elts)[]; /* Rx elements. */
115 struct mlx4_rxq_stats stats; /* RX queue counters. */
116 unsigned int socket; /* CPU socket ID for allocations. */
121 struct ibv_send_wr wr; /* Work request. */
122 struct ibv_sge sge; /* Scatter/gather element. */
123 struct rte_mbuf *buf;
126 struct mlx4_txq_stats {
127 unsigned int idx; /**< Mapping index. */
128 uint64_t opackets; /**< Total of successfully sent packets. */
129 uint64_t obytes; /**< Total of successfully sent bytes. */
130 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
133 /* TX queue descriptor. */
135 struct priv *priv; /* Back pointer to private data. */
137 const struct rte_mempool *mp; /* Cached Memory Pool. */
138 struct ibv_mr *mr; /* Memory Region (for mp). */
139 uint32_t lkey; /* mr->lkey */
140 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
141 struct ibv_cq *cq; /* Completion Queue. */
142 struct ibv_qp *qp; /* Queue Pair. */
143 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
144 unsigned int elts_n; /* (*elts)[] length. */
145 struct txq_elt (*elts)[]; /* TX elements. */
146 unsigned int elts_head; /* Current index in (*elts)[]. */
147 unsigned int elts_tail; /* First element awaiting completion. */
148 unsigned int elts_comp; /* Number of completion requests. */
149 unsigned int elts_comp_cd; /* Countdown for next completion request. */
150 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
151 struct mlx4_txq_stats stats; /* TX queue counters. */
152 unsigned int socket; /* CPU socket ID for allocations. */
158 struct rte_eth_dev *dev; /* Ethernet device. */
159 struct ibv_context *ctx; /* Verbs context. */
160 struct ibv_device_attr device_attr; /* Device properties. */
161 struct ibv_pd *pd; /* Protection Domain. */
162 struct ether_addr mac; /* MAC address. */
163 struct ibv_flow *mac_flow; /* Flow associated with MAC address. */
164 /* Device properties. */
165 uint16_t mtu; /* Configured MTU. */
166 uint8_t port; /* Physical port number. */
167 unsigned int started:1; /* Device started, flows enabled. */
168 unsigned int vf:1; /* This is a VF device. */
169 unsigned int intr_alarm:1; /* An interrupt alarm is scheduled. */
170 unsigned int isolated:1; /* Toggle isolated mode. */
172 unsigned int rxqs_n; /* RX queues array size. */
173 unsigned int txqs_n; /* TX queues array size. */
174 struct rxq *(*rxqs)[]; /* RX queues. */
175 struct txq *(*txqs)[]; /* TX queues. */
176 struct rte_intr_handle intr_handle; /* Port interrupt handle. */
177 struct rte_flow_drop *flow_drop_queue; /* Flow drop queue. */
178 LIST_HEAD(mlx4_flows, rte_flow) flows;
181 #endif /* RTE_PMD_MLX4_H_ */