4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #ifndef RTE_PMD_MLX4_H_
35 #define RTE_PMD_MLX4_H_
40 * Runtime logging through RTE_LOG() is enabled when not in debugging mode.
41 * Intermediate LOG_*() macros add the required end-of-line characters.
44 #define INFO(...) DEBUG(__VA_ARGS__)
45 #define WARN(...) DEBUG(__VA_ARGS__)
46 #define ERROR(...) DEBUG(__VA_ARGS__)
48 #define LOG__(level, m, ...) \
49 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
50 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
51 #define INFO(...) LOG_(INFO, __VA_ARGS__)
52 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
53 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
57 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
59 #pragma GCC diagnostic ignored "-Wpedantic"
61 #include <infiniband/verbs.h>
63 #pragma GCC diagnostic error "-Wpedantic"
66 /* Request send completion once in every 64 sends, might be less. */
67 #define MLX4_PMD_TX_PER_COMP_REQ 64
69 /* Maximum number of Scatter/Gather Elements per Work Request. */
70 #define MLX4_PMD_SGE_WR_N 4
72 /* Maximum size for inline data. */
73 #define MLX4_PMD_MAX_INLINE 0
76 * Maximum number of cached Memory Pools (MPs) per TX queue. Each RTE MP
77 * from which buffers are to be transmitted will have to be mapped by this
78 * driver to their own Memory Region (MR). This is a slow operation.
80 * This value is always 1 for RX queues.
82 #ifndef MLX4_PMD_TX_MP_CACHE
83 #define MLX4_PMD_TX_MP_CACHE 8
87 #define MLX4_ALARM_TIMEOUT_US 100000
90 #define MLX4_PMD_PORT_KVARG "port"
93 PCI_VENDOR_ID_MELLANOX = 0x15b3,
97 PCI_DEVICE_ID_MELLANOX_CONNECTX3 = 0x1003,
98 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF = 0x1004,
99 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO = 0x1007,
102 #define MLX4_DRIVER_NAME "net_mlx4"
104 /* Number of elements in array. */
105 #define elemof(a) (sizeof(a) / sizeof((a)[0]))
110 #define DEBUG__(m, ...) \
111 (fprintf(stderr, "%s:%d: %s(): " m "%c", \
112 __FILE__, __LINE__, __func__, __VA_ARGS__), \
116 * Save/restore errno around DEBUG__().
117 * XXX somewhat undefined behavior, but works.
119 #define DEBUG_(...) \
120 (errno = ((int []){ \
121 *(volatile int *)&errno, \
122 (DEBUG__(__VA_ARGS__), 0) \
124 #define DEBUG(...) DEBUG_(__VA_ARGS__, '\n')
125 #ifndef MLX4_PMD_DEBUG_BROKEN_VERBS
126 #define claim_zero(...) assert((__VA_ARGS__) == 0)
127 #else /* MLX4_PMD_DEBUG_BROKEN_VERBS */
128 #define claim_zero(...) \
129 (void)(((__VA_ARGS__) == 0) || \
130 DEBUG("Assertion `(" # __VA_ARGS__ ") == 0' failed (IGNORED)."))
131 #endif /* MLX4_PMD_DEBUG_BROKEN_VERBS */
132 #define claim_nonzero(...) assert((__VA_ARGS__) != 0)
133 #define claim_positive(...) assert((__VA_ARGS__) >= 0)
136 #define DEBUG(...) (void)0
137 #define claim_zero(...) (__VA_ARGS__)
138 #define claim_nonzero(...) (__VA_ARGS__)
139 #define claim_positive(...) (__VA_ARGS__)
142 struct mlx4_rxq_stats {
143 unsigned int idx; /**< Mapping index. */
144 uint64_t ipackets; /**< Total of successfully received packets. */
145 uint64_t ibytes; /**< Total of successfully received bytes. */
146 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
147 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
150 /* RX element (scattered packets). */
152 struct ibv_recv_wr wr; /* Work Request. */
153 struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
154 struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
159 struct ibv_recv_wr wr; /* Work Request. */
160 struct ibv_sge sge; /* Scatter/Gather Element. */
161 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
164 /* RX queue descriptor. */
166 struct priv *priv; /* Back pointer to private data. */
167 struct rte_mempool *mp; /* Memory Pool for allocations. */
168 struct ibv_mr *mr; /* Memory Region (for mp). */
169 struct ibv_cq *cq; /* Completion Queue. */
170 struct ibv_qp *qp; /* Queue Pair. */
171 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
172 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
173 struct ibv_comp_channel *channel;
174 unsigned int port_id; /* Port ID for incoming packets. */
175 unsigned int elts_n; /* (*elts)[] length. */
176 unsigned int elts_head; /* Current index in (*elts)[]. */
178 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
179 struct rxq_elt (*no_sp)[]; /* RX elements. */
181 unsigned int sp:1; /* Use scattered RX elements. */
182 unsigned int csum:1; /* Enable checksum offloading. */
183 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
184 struct mlx4_rxq_stats stats; /* RX queue counters. */
185 unsigned int socket; /* CPU socket ID for allocations. */
186 struct ibv_exp_res_domain *rd; /* Resource Domain. */
191 struct rte_mbuf *buf;
194 struct mlx4_txq_stats {
195 unsigned int idx; /**< Mapping index. */
196 uint64_t opackets; /**< Total of successfully sent packets. */
197 uint64_t obytes; /**< Total of successfully sent bytes. */
198 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
202 * Linear buffer type. It is used when transmitting buffers with too many
203 * segments that do not fit the hardware queue (see max_send_sge).
204 * Extra segments are copied (linearized) in such buffers, replacing the
205 * last SGE during TX.
206 * The size is arbitrary but large enough to hold a jumbo frame with
207 * 8 segments considering mbuf.buf_len is about 2048 bytes.
209 typedef uint8_t linear_t[16384];
211 /* TX queue descriptor. */
213 struct priv *priv; /* Back pointer to private data. */
215 const struct rte_mempool *mp; /* Cached Memory Pool. */
216 struct ibv_mr *mr; /* Memory Region (for mp). */
217 uint32_t lkey; /* mr->lkey */
218 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
219 struct ibv_cq *cq; /* Completion Queue. */
220 struct ibv_qp *qp; /* Queue Pair. */
221 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
222 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
223 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
224 unsigned int elts_n; /* (*elts)[] length. */
225 struct txq_elt (*elts)[]; /* TX elements. */
226 unsigned int elts_head; /* Current index in (*elts)[]. */
227 unsigned int elts_tail; /* First element awaiting completion. */
228 unsigned int elts_comp; /* Number of completion requests. */
229 unsigned int elts_comp_cd; /* Countdown for next completion request. */
230 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
231 struct mlx4_txq_stats stats; /* TX queue counters. */
232 linear_t (*elts_linear)[]; /* Linearized buffers. */
233 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
234 unsigned int socket; /* CPU socket ID for allocations. */
235 struct ibv_exp_res_domain *rd; /* Resource Domain. */
241 struct rte_eth_dev *dev; /* Ethernet device. */
242 struct ibv_context *ctx; /* Verbs context. */
243 struct ibv_device_attr device_attr; /* Device properties. */
244 struct ibv_pd *pd; /* Protection Domain. */
245 struct ether_addr mac; /* MAC address. */
246 struct ibv_flow *mac_flow; /* Flow associated with MAC address. */
247 /* Device properties. */
248 uint16_t mtu; /* Configured MTU. */
249 uint8_t port; /* Physical port number. */
250 unsigned int started:1; /* Device started, flows enabled. */
251 unsigned int hw_qpg:1; /* QP groups are supported. */
252 unsigned int hw_tss:1; /* TSS is supported. */
253 unsigned int hw_rss:1; /* RSS is supported. */
254 unsigned int hw_csum:1; /* Checksum offload is supported. */
255 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
256 unsigned int rss:1; /* RSS is enabled. */
257 unsigned int vf:1; /* This is a VF device. */
258 unsigned int pending_alarm:1; /* An alarm is pending. */
259 unsigned int isolated:1; /* Toggle isolated mode. */
260 unsigned int inl_recv_size; /* Inline recv size */
261 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
263 struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
264 unsigned int rxqs_n; /* RX queues array size. */
265 unsigned int txqs_n; /* TX queues array size. */
266 struct rxq *(*rxqs)[]; /* RX queues. */
267 struct txq *(*txqs)[]; /* TX queues. */
268 struct rte_intr_handle intr_handle_dev; /* Device interrupt handler. */
269 struct rte_intr_handle intr_handle; /* Interrupt handler. */
270 struct rte_flow_drop *flow_drop_queue; /* Flow drop queue. */
271 LIST_HEAD(mlx4_flows, rte_flow) flows;
272 struct rte_intr_conf intr_conf; /* Active interrupt configuration. */
273 rte_spinlock_t lock; /* Lock for control functions. */
276 void priv_lock(struct priv *priv);
277 void priv_unlock(struct priv *priv);
279 #endif /* RTE_PMD_MLX4_H_ */