4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
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34 #ifndef RTE_PMD_MLX4_H_
35 #define RTE_PMD_MLX4_H_
39 #include <sys/queue.h>
41 /* Verbs headers do not support -pedantic. */
43 #pragma GCC diagnostic ignored "-Wpedantic"
45 #include <infiniband/verbs.h>
47 #pragma GCC diagnostic error "-Wpedantic"
50 #include <rte_ethdev.h>
51 #include <rte_ether.h>
52 #include <rte_interrupts.h>
53 #include <rte_mempool.h>
55 /** Maximum number of simultaneous MAC addresses. This value is arbitrary. */
56 #define MLX4_MAX_MAC_ADDRESSES 128
58 /** Request send completion once in every 64 sends, might be less. */
59 #define MLX4_PMD_TX_PER_COMP_REQ 64
61 /** Maximum size for inline data. */
62 #define MLX4_PMD_MAX_INLINE 0
65 * Maximum number of cached Memory Pools (MPs) per TX queue. Each RTE MP
66 * from which buffers are to be transmitted will have to be mapped by this
67 * driver to their own Memory Region (MR). This is a slow operation.
69 * This value is always 1 for RX queues.
71 #ifndef MLX4_PMD_TX_MP_CACHE
72 #define MLX4_PMD_TX_MP_CACHE 8
75 /** Interrupt alarm timeout value in microseconds. */
76 #define MLX4_INTR_ALARM_TIMEOUT 100000
78 /** Port parameter. */
79 #define MLX4_PMD_PORT_KVARG "port"
82 PCI_VENDOR_ID_MELLANOX = 0x15b3,
86 PCI_DEVICE_ID_MELLANOX_CONNECTX3 = 0x1003,
87 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF = 0x1004,
88 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO = 0x1007,
91 /** Driver name reported to lower layers and used in log output. */
92 #define MLX4_DRIVER_NAME "net_mlx4"
99 /** Private data structure. */
101 struct rte_eth_dev *dev; /**< Ethernet device. */
102 struct ibv_context *ctx; /**< Verbs context. */
103 struct ibv_device_attr device_attr; /**< Device properties. */
104 struct ibv_pd *pd; /**< Protection Domain. */
105 /* Device properties. */
106 uint16_t mtu; /**< Configured MTU. */
107 uint8_t port; /**< Physical port number. */
108 uint32_t started:1; /**< Device started, flows enabled. */
109 uint32_t vf:1; /**< This is a VF device. */
110 uint32_t intr_alarm:1; /**< An interrupt alarm is scheduled. */
111 uint32_t isolated:1; /**< Toggle isolated mode. */
112 struct rte_intr_handle intr_handle; /**< Port interrupt handle. */
113 struct mlx4_drop *drop; /**< Shared resources for drop flow rules. */
114 LIST_HEAD(, rte_flow) flows; /**< Configured flow rule handles. */
115 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
116 /**< Configured MAC addresses. Unused entries are zeroed. */
121 int mlx4_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE]);
122 int mlx4_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN]);
123 int mlx4_mtu_get(struct priv *priv, uint16_t *mtu);
124 int mlx4_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
125 int mlx4_dev_set_link_down(struct rte_eth_dev *dev);
126 int mlx4_dev_set_link_up(struct rte_eth_dev *dev);
127 void mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index);
128 int mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
129 uint32_t index, uint32_t vmdq);
130 void mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr);
131 int mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
132 int mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats);
133 void mlx4_stats_reset(struct rte_eth_dev *dev);
134 void mlx4_dev_infos_get(struct rte_eth_dev *dev,
135 struct rte_eth_dev_info *info);
136 int mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete);
137 int mlx4_flow_ctrl_get(struct rte_eth_dev *dev,
138 struct rte_eth_fc_conf *fc_conf);
139 int mlx4_flow_ctrl_set(struct rte_eth_dev *dev,
140 struct rte_eth_fc_conf *fc_conf);
144 int mlx4_intr_uninstall(struct priv *priv);
145 int mlx4_intr_install(struct priv *priv);
146 int mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
147 int mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
151 struct ibv_mr *mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp);
153 #endif /* RTE_PMD_MLX4_H_ */