4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
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8 * modification, are permitted provided that the following conditions
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34 #ifndef RTE_PMD_MLX4_H_
35 #define RTE_PMD_MLX4_H_
40 * Runtime logging through RTE_LOG() is enabled when not in debugging mode.
41 * Intermediate LOG_*() macros add the required end-of-line characters.
44 #define INFO(...) DEBUG(__VA_ARGS__)
45 #define WARN(...) DEBUG(__VA_ARGS__)
46 #define ERROR(...) DEBUG(__VA_ARGS__)
48 #define LOG__(level, m, ...) \
49 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
50 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
51 #define INFO(...) LOG_(INFO, __VA_ARGS__)
52 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
53 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
57 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
59 #pragma GCC diagnostic ignored "-Wpedantic"
61 #include <infiniband/verbs.h>
63 #pragma GCC diagnostic error "-Wpedantic"
66 /* Request send completion once in every 64 sends, might be less. */
67 #define MLX4_PMD_TX_PER_COMP_REQ 64
69 /* Maximum size for inline data. */
70 #define MLX4_PMD_MAX_INLINE 0
73 * Maximum number of cached Memory Pools (MPs) per TX queue. Each RTE MP
74 * from which buffers are to be transmitted will have to be mapped by this
75 * driver to their own Memory Region (MR). This is a slow operation.
77 * This value is always 1 for RX queues.
79 #ifndef MLX4_PMD_TX_MP_CACHE
80 #define MLX4_PMD_TX_MP_CACHE 8
84 #define MLX4_ALARM_TIMEOUT_US 100000
87 #define MLX4_PMD_PORT_KVARG "port"
90 PCI_VENDOR_ID_MELLANOX = 0x15b3,
94 PCI_DEVICE_ID_MELLANOX_CONNECTX3 = 0x1003,
95 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF = 0x1004,
96 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO = 0x1007,
99 #define MLX4_DRIVER_NAME "net_mlx4"
101 /* Number of elements in array. */
102 #define elemof(a) (sizeof(a) / sizeof((a)[0]))
107 #define DEBUG__(m, ...) \
108 (fprintf(stderr, "%s:%d: %s(): " m "%c", \
109 __FILE__, __LINE__, __func__, __VA_ARGS__), \
113 * Save/restore errno around DEBUG__().
114 * XXX somewhat undefined behavior, but works.
116 #define DEBUG_(...) \
117 (errno = ((int []){ \
118 *(volatile int *)&errno, \
119 (DEBUG__(__VA_ARGS__), 0) \
121 #define DEBUG(...) DEBUG_(__VA_ARGS__, '\n')
122 #ifndef MLX4_PMD_DEBUG_BROKEN_VERBS
123 #define claim_zero(...) assert((__VA_ARGS__) == 0)
124 #else /* MLX4_PMD_DEBUG_BROKEN_VERBS */
125 #define claim_zero(...) \
126 (void)(((__VA_ARGS__) == 0) || \
127 DEBUG("Assertion `(" # __VA_ARGS__ ") == 0' failed (IGNORED)."))
128 #endif /* MLX4_PMD_DEBUG_BROKEN_VERBS */
129 #define claim_nonzero(...) assert((__VA_ARGS__) != 0)
130 #define claim_positive(...) assert((__VA_ARGS__) >= 0)
133 #define DEBUG(...) (void)0
134 #define claim_zero(...) (__VA_ARGS__)
135 #define claim_nonzero(...) (__VA_ARGS__)
136 #define claim_positive(...) (__VA_ARGS__)
139 struct mlx4_rxq_stats {
140 unsigned int idx; /**< Mapping index. */
141 uint64_t ipackets; /**< Total of successfully received packets. */
142 uint64_t ibytes; /**< Total of successfully received bytes. */
143 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
144 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
149 struct ibv_recv_wr wr; /* Work Request. */
150 struct ibv_sge sge; /* Scatter/Gather Element. */
151 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
154 /* RX queue descriptor. */
156 struct priv *priv; /* Back pointer to private data. */
157 struct rte_mempool *mp; /* Memory Pool for allocations. */
158 struct ibv_mr *mr; /* Memory Region (for mp). */
159 struct ibv_cq *cq; /* Completion Queue. */
160 struct ibv_qp *qp; /* Queue Pair. */
161 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
162 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
163 struct ibv_comp_channel *channel;
164 unsigned int port_id; /* Port ID for incoming packets. */
165 unsigned int elts_n; /* (*elts)[] length. */
166 unsigned int elts_head; /* Current index in (*elts)[]. */
167 struct rxq_elt (*elts)[]; /* Rx elements. */
168 struct mlx4_rxq_stats stats; /* RX queue counters. */
169 unsigned int socket; /* CPU socket ID for allocations. */
174 struct rte_mbuf *buf;
177 struct mlx4_txq_stats {
178 unsigned int idx; /**< Mapping index. */
179 uint64_t opackets; /**< Total of successfully sent packets. */
180 uint64_t obytes; /**< Total of successfully sent bytes. */
181 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
184 /* TX queue descriptor. */
186 struct priv *priv; /* Back pointer to private data. */
188 const struct rte_mempool *mp; /* Cached Memory Pool. */
189 struct ibv_mr *mr; /* Memory Region (for mp). */
190 uint32_t lkey; /* mr->lkey */
191 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
192 struct ibv_cq *cq; /* Completion Queue. */
193 struct ibv_qp *qp; /* Queue Pair. */
194 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
195 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
196 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
197 unsigned int elts_n; /* (*elts)[] length. */
198 struct txq_elt (*elts)[]; /* TX elements. */
199 unsigned int elts_head; /* Current index in (*elts)[]. */
200 unsigned int elts_tail; /* First element awaiting completion. */
201 unsigned int elts_comp; /* Number of completion requests. */
202 unsigned int elts_comp_cd; /* Countdown for next completion request. */
203 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
204 struct mlx4_txq_stats stats; /* TX queue counters. */
205 unsigned int socket; /* CPU socket ID for allocations. */
211 struct rte_eth_dev *dev; /* Ethernet device. */
212 struct ibv_context *ctx; /* Verbs context. */
213 struct ibv_device_attr device_attr; /* Device properties. */
214 struct ibv_pd *pd; /* Protection Domain. */
215 struct ether_addr mac; /* MAC address. */
216 struct ibv_flow *mac_flow; /* Flow associated with MAC address. */
217 /* Device properties. */
218 uint16_t mtu; /* Configured MTU. */
219 uint8_t port; /* Physical port number. */
220 unsigned int started:1; /* Device started, flows enabled. */
221 unsigned int vf:1; /* This is a VF device. */
222 unsigned int pending_alarm:1; /* An alarm is pending. */
223 unsigned int isolated:1; /* Toggle isolated mode. */
225 unsigned int rxqs_n; /* RX queues array size. */
226 unsigned int txqs_n; /* TX queues array size. */
227 struct rxq *(*rxqs)[]; /* RX queues. */
228 struct txq *(*txqs)[]; /* TX queues. */
229 struct rte_intr_handle intr_handle_dev; /* Device interrupt handler. */
230 struct rte_intr_handle intr_handle; /* Interrupt handler. */
231 struct rte_flow_drop *flow_drop_queue; /* Flow drop queue. */
232 LIST_HEAD(mlx4_flows, rte_flow) flows;
233 struct rte_intr_conf intr_conf; /* Active interrupt configuration. */
234 rte_spinlock_t lock; /* Lock for control functions. */
237 void priv_lock(struct priv *priv);
238 void priv_unlock(struct priv *priv);
240 #endif /* RTE_PMD_MLX4_H_ */