1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2012 6WIND S.A.
3 * Copyright 2012 Mellanox Technologies, Ltd
6 #ifndef RTE_PMD_MLX4_H_
7 #define RTE_PMD_MLX4_H_
11 #include <sys/queue.h>
13 /* Verbs headers do not support -pedantic. */
15 #pragma GCC diagnostic ignored "-Wpedantic"
17 #include <infiniband/verbs.h>
19 #pragma GCC diagnostic error "-Wpedantic"
22 #include <rte_ethdev_driver.h>
23 #include <rte_ether.h>
24 #include <rte_interrupts.h>
25 #include <rte_mempool.h>
27 #ifndef IBV_RX_HASH_INNER
28 /** This is not necessarily defined by supported RDMA core versions. */
29 #define IBV_RX_HASH_INNER (1ull << 31)
30 #endif /* IBV_RX_HASH_INNER */
32 /** Maximum number of simultaneous MAC addresses. This value is arbitrary. */
33 #define MLX4_MAX_MAC_ADDRESSES 128
35 /** Request send completion once in every 64 sends, might be less. */
36 #define MLX4_PMD_TX_PER_COMP_REQ 64
38 /** Maximum size for inline data. */
39 #define MLX4_PMD_MAX_INLINE 0
41 /** Fixed RSS hash key size in bytes. Cannot be modified. */
42 #define MLX4_RSS_HASH_KEY_SIZE 40
44 /** Interrupt alarm timeout value in microseconds. */
45 #define MLX4_INTR_ALARM_TIMEOUT 100000
47 /** Port parameter. */
48 #define MLX4_PMD_PORT_KVARG "port"
51 PCI_VENDOR_ID_MELLANOX = 0x15b3,
55 PCI_DEVICE_ID_MELLANOX_CONNECTX3 = 0x1003,
56 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF = 0x1004,
57 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO = 0x1007,
60 /** Driver name reported to lower layers and used in log output. */
61 #define MLX4_DRIVER_NAME "net_mlx4"
69 /** Private data structure. */
71 struct rte_eth_dev *dev; /**< Ethernet device. */
72 struct ibv_context *ctx; /**< Verbs context. */
73 struct ibv_device_attr device_attr; /**< Device properties. */
74 struct ibv_pd *pd; /**< Protection Domain. */
75 /* Device properties. */
76 uint16_t mtu; /**< Configured MTU. */
77 uint8_t port; /**< Physical port number. */
78 uint32_t started:1; /**< Device started, flows enabled. */
79 uint32_t vf:1; /**< This is a VF device. */
80 uint32_t intr_alarm:1; /**< An interrupt alarm is scheduled. */
81 uint32_t isolated:1; /**< Toggle isolated mode. */
82 uint32_t rss_init:1; /**< Common RSS context is initialized. */
83 uint32_t hw_csum:1; /**< Checksum offload is supported. */
84 uint32_t hw_csum_l2tun:1; /**< Checksum support for L2 tunnels. */
85 uint32_t hw_fcs_strip:1; /**< FCS stripping toggling is supported. */
86 uint64_t hw_rss_sup; /**< Supported RSS hash fields (Verbs format). */
87 struct rte_intr_handle intr_handle; /**< Port interrupt handle. */
88 struct mlx4_drop *drop; /**< Shared resources for drop flow rules. */
89 LIST_HEAD(, mlx4_rss) rss; /**< Shared targets for Rx flow rules. */
90 LIST_HEAD(, rte_flow) flows; /**< Configured flow rule handles. */
91 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
92 /**< Configured MAC addresses. Unused entries are zeroed. */
97 int mlx4_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE]);
98 int mlx4_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN]);
99 int mlx4_mtu_get(struct priv *priv, uint16_t *mtu);
100 int mlx4_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
101 int mlx4_dev_set_link_down(struct rte_eth_dev *dev);
102 int mlx4_dev_set_link_up(struct rte_eth_dev *dev);
103 void mlx4_promiscuous_enable(struct rte_eth_dev *dev);
104 void mlx4_promiscuous_disable(struct rte_eth_dev *dev);
105 void mlx4_allmulticast_enable(struct rte_eth_dev *dev);
106 void mlx4_allmulticast_disable(struct rte_eth_dev *dev);
107 void mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index);
108 int mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
109 uint32_t index, uint32_t vmdq);
110 int mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr);
111 int mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
112 int mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats);
113 void mlx4_stats_reset(struct rte_eth_dev *dev);
114 void mlx4_dev_infos_get(struct rte_eth_dev *dev,
115 struct rte_eth_dev_info *info);
116 int mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete);
117 int mlx4_flow_ctrl_get(struct rte_eth_dev *dev,
118 struct rte_eth_fc_conf *fc_conf);
119 int mlx4_flow_ctrl_set(struct rte_eth_dev *dev,
120 struct rte_eth_fc_conf *fc_conf);
121 const uint32_t *mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev);
122 int mlx4_is_removed(struct rte_eth_dev *dev);
126 int mlx4_intr_uninstall(struct priv *priv);
127 int mlx4_intr_install(struct priv *priv);
128 int mlx4_rxq_intr_enable(struct priv *priv);
129 void mlx4_rxq_intr_disable(struct priv *priv);
130 int mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
131 int mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
133 #endif /* RTE_PMD_MLX4_H_ */