1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2017 6WIND S.A.
3 * Copyright 2017 Mellanox Technologies, Ltd
8 * Interrupts handling for mlx4 driver.
15 /* Verbs headers do not support -pedantic. */
17 #pragma GCC diagnostic ignored "-Wpedantic"
19 #include <infiniband/verbs.h>
21 #pragma GCC diagnostic error "-Wpedantic"
24 #include <rte_alarm.h>
25 #include <rte_errno.h>
26 #include <ethdev_driver.h>
28 #include <rte_interrupts.h>
31 #include "mlx4_glue.h"
32 #include "mlx4_rxtx.h"
33 #include "mlx4_utils.h"
35 static int mlx4_link_status_check(struct mlx4_priv *priv);
38 * Clean up Rx interrupts handler.
41 * Pointer to private structure.
44 mlx4_rx_intr_vec_disable(struct mlx4_priv *priv)
46 struct rte_intr_handle *intr_handle = priv->intr_handle;
48 rte_intr_free_epoll_fd(intr_handle);
49 rte_intr_vec_list_free(intr_handle);
51 rte_intr_nb_efd_set(intr_handle, 0);
55 * Allocate queue vector and fill epoll fd list for Rx interrupts.
58 * Pointer to private structure.
61 * 0 on success, negative errno value otherwise and rte_errno is set.
64 mlx4_rx_intr_vec_enable(struct mlx4_priv *priv)
67 unsigned int rxqs_n = ETH_DEV(priv)->data->nb_rx_queues;
68 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
69 unsigned int count = 0;
70 struct rte_intr_handle *intr_handle = priv->intr_handle;
72 mlx4_rx_intr_vec_disable(priv);
73 if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
75 ERROR("failed to allocate memory for interrupt vector,"
76 " Rx interrupts will not be supported");
79 for (i = 0; i != n; ++i) {
80 struct rxq *rxq = ETH_DEV(priv)->data->rx_queues[i];
82 /* Skip queues that cannot request interrupts. */
83 if (!rxq || !rxq->channel) {
84 /* Use invalid intr_vec[] index to disable entry. */
85 if (rte_intr_vec_list_index_set(intr_handle, i,
86 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
90 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
92 ERROR("too many Rx queues for interrupt vector size"
93 " (%d), Rx interrupts cannot be enabled",
94 RTE_MAX_RXTX_INTR_VEC_ID);
95 mlx4_rx_intr_vec_disable(priv);
99 if (rte_intr_vec_list_index_set(intr_handle, i,
100 RTE_INTR_VEC_RXTX_OFFSET + count))
103 if (rte_intr_efds_index_set(intr_handle, i,
110 mlx4_rx_intr_vec_disable(priv);
111 else if (rte_intr_nb_efd_set(intr_handle, count))
117 * Process scheduled link status check.
119 * If LSC interrupts are requested, process related callback.
122 * Pointer to private structure.
125 mlx4_link_status_alarm(struct mlx4_priv *priv)
127 const struct rte_eth_intr_conf *const intr_conf =
128 Ð_DEV(priv)->data->dev_conf.intr_conf;
130 MLX4_ASSERT(priv->intr_alarm == 1);
131 priv->intr_alarm = 0;
132 if (intr_conf->lsc && !mlx4_link_status_check(priv))
133 rte_eth_dev_callback_process(ETH_DEV(priv),
134 RTE_ETH_EVENT_INTR_LSC,
141 * In case of inconsistency, another check is scheduled.
144 * Pointer to private structure.
147 * 0 on success (link status is consistent), negative errno value
148 * otherwise and rte_errno is set.
151 mlx4_link_status_check(struct mlx4_priv *priv)
153 struct rte_eth_link *link = Ð_DEV(priv)->data->dev_link;
154 int ret = mlx4_link_update(ETH_DEV(priv), 0);
158 if ((!link->link_speed && link->link_status) ||
159 (link->link_speed && !link->link_status)) {
160 if (!priv->intr_alarm) {
161 /* Inconsistent status, check again later. */
162 ret = rte_eal_alarm_set(MLX4_INTR_ALARM_TIMEOUT,
164 mlx4_link_status_alarm,
168 priv->intr_alarm = 1;
170 rte_errno = EINPROGRESS;
177 * Handle interrupts from the NIC.
180 * Pointer to private structure.
183 mlx4_interrupt_handler(struct mlx4_priv *priv)
186 static const enum rte_eth_event_type type[] = {
187 [LSC] = RTE_ETH_EVENT_INTR_LSC,
188 [RMV] = RTE_ETH_EVENT_INTR_RMV,
190 uint32_t caught[RTE_DIM(type)] = { 0 };
191 struct ibv_async_event event;
192 const struct rte_eth_intr_conf *const intr_conf =
193 Ð_DEV(priv)->data->dev_conf.intr_conf;
196 /* Read all message and acknowledge them. */
197 while (!mlx4_glue->get_async_event(priv->ctx, &event)) {
198 switch (event.event_type) {
199 case IBV_EVENT_PORT_ACTIVE:
200 case IBV_EVENT_PORT_ERR:
201 if (intr_conf->lsc && !mlx4_link_status_check(priv))
204 case IBV_EVENT_DEVICE_FATAL:
209 DEBUG("event type %d on physical port %d not handled",
210 event.event_type, event.element.port_num);
212 mlx4_glue->ack_async_event(&event);
214 for (i = 0; i != RTE_DIM(caught); ++i)
216 rte_eth_dev_callback_process(ETH_DEV(priv), type[i],
221 * MLX4 CQ notification .
224 * Pointer to receive queue structure.
226 * Is request solicited or not.
229 mlx4_arm_cq(struct rxq *rxq, int solicited)
231 struct mlx4_cq *cq = &rxq->mcq;
233 uint32_t sn = cq->arm_sn & MLX4_CQ_DB_GEQ_N_MASK;
234 uint32_t ci = cq->cons_index & MLX4_CQ_DB_CI_MASK;
235 uint32_t cmd = solicited ? MLX4_CQ_DB_REQ_NOT_SOL : MLX4_CQ_DB_REQ_NOT;
237 *cq->arm_db = rte_cpu_to_be_32(sn << 28 | cmd | ci);
239 * Make sure that the doorbell record in host memory is
240 * written before ringing the doorbell via PCI MMIO.
243 doorbell = sn << 28 | cmd | cq->cqn;
246 rte_write64(rte_cpu_to_be_64(doorbell), cq->cq_db_reg);
250 * Uninstall interrupt handler.
253 * Pointer to private structure.
256 * 0 on success, negative errno value otherwise and rte_errno is set.
259 mlx4_intr_uninstall(struct mlx4_priv *priv)
261 int err = rte_errno; /* Make sure rte_errno remains unchanged. */
263 if (rte_intr_fd_get(priv->intr_handle) != -1) {
264 rte_intr_callback_unregister(priv->intr_handle,
266 mlx4_interrupt_handler,
268 if (rte_intr_fd_set(priv->intr_handle, -1))
271 rte_eal_alarm_cancel((void (*)(void *))mlx4_link_status_alarm, priv);
272 priv->intr_alarm = 0;
273 mlx4_rxq_intr_disable(priv);
279 * Install interrupt handler.
282 * Pointer to private structure.
285 * 0 on success, negative errno value otherwise and rte_errno is set.
288 mlx4_intr_install(struct mlx4_priv *priv)
290 const struct rte_eth_intr_conf *const intr_conf =
291 Ð_DEV(priv)->data->dev_conf.intr_conf;
294 mlx4_intr_uninstall(priv);
295 if (intr_conf->lsc | intr_conf->rmv) {
296 if (rte_intr_fd_set(priv->intr_handle, priv->ctx->async_fd))
299 rc = rte_intr_callback_register(priv->intr_handle,
301 mlx4_interrupt_handler,
310 mlx4_intr_uninstall(priv);
315 * DPDK callback for Rx queue interrupt disable.
318 * Pointer to Ethernet device structure.
323 * 0 on success, negative errno value otherwise and rte_errno is set.
326 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)
328 struct rxq *rxq = dev->data->rx_queues[idx];
329 struct ibv_cq *ev_cq;
333 if (!rxq || !rxq->channel) {
336 ret = mlx4_glue->get_cq_event(rxq->cq->channel, &ev_cq,
338 /** For non-zero ret save the errno (may be EAGAIN
339 * which means the get_cq_event function was called before
344 else if (ev_cq != rxq->cq)
350 WARN("unable to disable interrupt on rx queue %d",
354 mlx4_glue->ack_cq_events(rxq->cq, 1);
360 * DPDK callback for Rx queue interrupt enable.
363 * Pointer to Ethernet device structure.
368 * 0 on success, negative errno value otherwise and rte_errno is set.
371 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)
373 struct rxq *rxq = dev->data->rx_queues[idx];
376 if (!rxq || !rxq->channel) {
379 WARN("unable to arm interrupt on rx queue %d", idx);
387 * Enable datapath interrupts.
390 * Pointer to private structure.
393 * 0 on success, negative errno value otherwise and rte_errno is set.
396 mlx4_rxq_intr_enable(struct mlx4_priv *priv)
398 const struct rte_eth_intr_conf *const intr_conf =
399 Ð_DEV(priv)->data->dev_conf.intr_conf;
401 if (intr_conf->rxq && mlx4_rx_intr_vec_enable(priv) < 0)
409 * Disable datapath interrupts, keeping other interrupts intact.
412 * Pointer to private structure.
415 mlx4_rxq_intr_disable(struct mlx4_priv *priv)
417 int err = rte_errno; /* Make sure rte_errno remains unchanged. */
419 mlx4_rx_intr_vec_disable(priv);