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5 * Copyright 2017 Mellanox
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36 * Rx queues configuration for mlx4 driver.
45 /* Verbs headers do not support -pedantic. */
47 #pragma GCC diagnostic ignored "-Wpedantic"
49 #include <infiniband/verbs.h>
51 #pragma GCC diagnostic error "-Wpedantic"
54 #include <rte_byteorder.h>
55 #include <rte_common.h>
56 #include <rte_errno.h>
57 #include <rte_ethdev.h>
59 #include <rte_malloc.h>
61 #include <rte_mempool.h>
64 #include "mlx4_flow.h"
65 #include "mlx4_rxtx.h"
66 #include "mlx4_utils.h"
69 * Historical RSS hash key.
71 * This used to be the default for mlx4 in Linux before v3.19 switched to
72 * generating random hash keys through netdev_rss_key_fill().
74 * It is used in this PMD for consistency with past DPDK releases but can
75 * now be overridden through user configuration.
77 * Note: this is not const to work around API quirks.
80 mlx4_rss_hash_key_default[MLX4_RSS_HASH_KEY_SIZE] = {
81 0x2c, 0xc6, 0x81, 0xd1,
82 0x5b, 0xdb, 0xf4, 0xf7,
83 0xfc, 0xa2, 0x83, 0x19,
84 0xdb, 0x1a, 0x3e, 0x94,
85 0x6b, 0x9e, 0x38, 0xd9,
86 0x2c, 0x9c, 0x03, 0xd1,
87 0xad, 0x99, 0x44, 0xa7,
88 0xd9, 0x56, 0x3d, 0x59,
89 0x06, 0x3c, 0x25, 0xf3,
90 0xfc, 0x1f, 0xdc, 0x2a,
94 * Obtain a RSS context with specified properties.
96 * Used when creating a flow rule targeting one or several Rx queues.
98 * If a matching RSS context already exists, it is returned with its
99 * reference count incremented.
102 * Pointer to private structure.
104 * Fields for RSS processing (Verbs format).
106 * Hash key to use (whose size is exactly MLX4_RSS_HASH_KEY_SIZE).
108 * Number of target queues.
109 * @param[in] queue_id
113 * Pointer to RSS context on success, NULL otherwise and rte_errno is set.
116 mlx4_rss_get(struct priv *priv, uint64_t fields,
117 uint8_t key[MLX4_RSS_HASH_KEY_SIZE],
118 uint16_t queues, const uint16_t queue_id[])
120 struct mlx4_rss *rss;
121 size_t queue_id_size = sizeof(queue_id[0]) * queues;
123 LIST_FOREACH(rss, &priv->rss, next)
124 if (fields == rss->fields &&
125 queues == rss->queues &&
126 !memcmp(key, rss->key, MLX4_RSS_HASH_KEY_SIZE) &&
127 !memcmp(queue_id, rss->queue_id, queue_id_size)) {
131 rss = rte_malloc(__func__, offsetof(struct mlx4_rss, queue_id) +
135 *rss = (struct mlx4_rss){
144 memcpy(rss->key, key, MLX4_RSS_HASH_KEY_SIZE);
145 memcpy(rss->queue_id, queue_id, queue_id_size);
146 LIST_INSERT_HEAD(&priv->rss, rss, next);
154 * Release a RSS context instance.
156 * Used when destroying a flow rule targeting one or several Rx queues.
158 * This function decrements the reference count of the context and destroys
159 * it after reaching 0. The context must have no users at this point; all
160 * prior calls to mlx4_rss_attach() must have been followed by matching
161 * calls to mlx4_rss_detach().
164 * RSS context to release.
166 void mlx4_rss_put(struct mlx4_rss *rss)
171 assert(!rss->usecnt);
174 LIST_REMOVE(rss, next);
179 * Attach a user to a RSS context instance.
181 * Used when the RSS QP and indirection table objects must be instantiated,
182 * that is, when a flow rule must be enabled.
184 * This function increments the usage count of the context.
187 * RSS context to attach to.
190 * 0 on success, a negative errno value otherwise and rte_errno is set.
192 int mlx4_rss_attach(struct mlx4_rss *rss)
201 struct ibv_wq *ind_tbl[rss->queues];
202 struct priv *priv = rss->priv;
207 if (!rte_is_power_of_2(RTE_DIM(ind_tbl))) {
209 msg = "number of RSS queues must be a power of two";
212 for (i = 0; i != RTE_DIM(ind_tbl); ++i) {
213 uint16_t id = rss->queue_id[i];
214 struct rxq *rxq = NULL;
216 if (id < priv->dev->data->nb_rx_queues)
217 rxq = priv->dev->data->rx_queues[id];
220 msg = "RSS target queue is not configured";
223 ind_tbl[i] = rxq->wq;
225 rss->ind = ibv_create_rwq_ind_table
227 &(struct ibv_rwq_ind_table_init_attr){
228 .log_ind_tbl_size = rte_log2_u32(RTE_DIM(ind_tbl)),
233 ret = errno ? errno : EINVAL;
234 msg = "RSS indirection table creation failure";
237 rss->qp = ibv_create_qp_ex
239 &(struct ibv_qp_init_attr_ex){
240 .comp_mask = (IBV_QP_INIT_ATTR_PD |
241 IBV_QP_INIT_ATTR_RX_HASH |
242 IBV_QP_INIT_ATTR_IND_TABLE),
243 .qp_type = IBV_QPT_RAW_PACKET,
245 .rwq_ind_tbl = rss->ind,
247 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
248 .rx_hash_key_len = MLX4_RSS_HASH_KEY_SIZE,
249 .rx_hash_key = rss->key,
250 .rx_hash_fields_mask = rss->fields,
254 ret = errno ? errno : EINVAL;
255 msg = "RSS hash QP creation failure";
260 &(struct ibv_qp_attr){
261 .qp_state = IBV_QPS_INIT,
262 .port_num = priv->port,
264 IBV_QP_STATE | IBV_QP_PORT);
266 msg = "failed to switch RSS hash QP to INIT state";
271 &(struct ibv_qp_attr){
272 .qp_state = IBV_QPS_RTR,
276 msg = "failed to switch RSS hash QP to RTR state";
282 claim_zero(ibv_destroy_qp(rss->qp));
286 claim_zero(ibv_destroy_rwq_ind_table(rss->ind));
289 ERROR("mlx4: %s", msg);
296 * Detach a user from a RSS context instance.
298 * Used when disabling (not destroying) a flow rule.
300 * This function decrements the usage count of the context and destroys
301 * usage resources after reaching 0.
304 * RSS context to detach from.
306 void mlx4_rss_detach(struct mlx4_rss *rss)
313 claim_zero(ibv_destroy_qp(rss->qp));
315 claim_zero(ibv_destroy_rwq_ind_table(rss->ind));
320 * Allocate Rx queue elements.
323 * Pointer to Rx queue structure.
326 * 0 on success, negative errno value otherwise and rte_errno is set.
329 mlx4_rxq_alloc_elts(struct rxq *rxq)
331 const uint32_t elts_n = 1 << rxq->elts_n;
332 const uint32_t sges_n = 1 << rxq->sges_n;
333 struct rte_mbuf *(*elts)[elts_n] = rxq->elts;
336 assert(rte_is_power_of_2(elts_n));
337 for (i = 0; i != RTE_DIM(*elts); ++i) {
338 volatile struct mlx4_wqe_data_seg *scat = &(*rxq->wqes)[i];
339 struct rte_mbuf *buf = rte_pktmbuf_alloc(rxq->mp);
343 rte_pktmbuf_free_seg((*elts)[i]);
349 /* Headroom is reserved by rte_pktmbuf_alloc(). */
350 assert(buf->data_off == RTE_PKTMBUF_HEADROOM);
351 /* Buffer is supposed to be empty. */
352 assert(rte_pktmbuf_data_len(buf) == 0);
353 assert(rte_pktmbuf_pkt_len(buf) == 0);
354 /* Only the first segment keeps headroom. */
357 buf->port = rxq->port_id;
358 buf->data_len = rte_pktmbuf_tailroom(buf);
359 buf->pkt_len = rte_pktmbuf_tailroom(buf);
361 *scat = (struct mlx4_wqe_data_seg){
362 .addr = rte_cpu_to_be_64(rte_pktmbuf_mtod(buf,
364 .byte_count = rte_cpu_to_be_32(buf->data_len),
365 .lkey = rte_cpu_to_be_32(rxq->mr->lkey),
369 DEBUG("%p: allocated and configured %u segments (max %u packets)",
370 (void *)rxq, elts_n, elts_n / sges_n);
375 * Free Rx queue elements.
378 * Pointer to Rx queue structure.
381 mlx4_rxq_free_elts(struct rxq *rxq)
384 struct rte_mbuf *(*elts)[1 << rxq->elts_n] = rxq->elts;
386 DEBUG("%p: freeing Rx queue elements", (void *)rxq);
387 for (i = 0; (i != RTE_DIM(*elts)); ++i) {
390 rte_pktmbuf_free_seg((*elts)[i]);
396 * DPDK callback to configure a Rx queue.
399 * Pointer to Ethernet device structure.
403 * Number of descriptors to configure in queue.
405 * NUMA socket on which memory must be allocated.
407 * Thresholds parameters.
409 * Memory pool for buffer allocations.
412 * 0 on success, negative errno value otherwise and rte_errno is set.
415 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
416 unsigned int socket, const struct rte_eth_rxconf *conf,
417 struct rte_mempool *mp)
419 struct priv *priv = dev->data->dev_private;
420 struct mlx4dv_obj mlxdv;
421 struct mlx4dv_rwq dv_rwq;
422 struct mlx4dv_cq dv_cq;
423 uint32_t mb_len = rte_pktmbuf_data_room_size(mp);
424 struct rte_mbuf *(*elts)[rte_align32pow2(desc)];
426 struct mlx4_malloc_vec vec[] = {
428 .align = RTE_CACHE_LINE_SIZE,
429 .size = sizeof(*rxq),
430 .addr = (void **)&rxq,
433 .align = RTE_CACHE_LINE_SIZE,
434 .size = sizeof(*elts),
435 .addr = (void **)&elts,
440 (void)conf; /* Thresholds configuration (ignored). */
441 DEBUG("%p: configuring queue %u for %u descriptors",
442 (void *)dev, idx, desc);
443 if (idx >= dev->data->nb_rx_queues) {
444 rte_errno = EOVERFLOW;
445 ERROR("%p: queue index out of range (%u >= %u)",
446 (void *)dev, idx, dev->data->nb_rx_queues);
449 rxq = dev->data->rx_queues[idx];
452 ERROR("%p: Rx queue %u already configured, release it first",
458 ERROR("%p: invalid number of Rx descriptors", (void *)dev);
461 if (desc != RTE_DIM(*elts)) {
462 desc = RTE_DIM(*elts);
463 WARN("%p: increased number of descriptors in Rx queue %u"
464 " to the next power of two (%u)",
465 (void *)dev, idx, desc);
467 /* Allocate and initialize Rx queue. */
468 mlx4_zmallocv_socket("RXQ", vec, RTE_DIM(vec), socket);
470 ERROR("%p: unable to allocate queue index %u",
477 .port_id = dev->data->port_id,
479 .elts_n = rte_log2_u32(desc),
481 /* Toggle Rx checksum offload if hardware supports it. */
482 .csum = (priv->hw_csum &&
483 dev->data->dev_conf.rxmode.hw_ip_checksum),
484 .csum_l2tun = (priv->hw_csum_l2tun &&
485 dev->data->dev_conf.rxmode.hw_ip_checksum),
491 /* Enable scattered packets support for this queue if necessary. */
492 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
493 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
494 (mb_len - RTE_PKTMBUF_HEADROOM)) {
496 } else if (dev->data->dev_conf.rxmode.enable_scatter) {
498 RTE_PKTMBUF_HEADROOM +
499 dev->data->dev_conf.rxmode.max_rx_pkt_len;
503 * Determine the number of SGEs needed for a full packet
504 * and round it to the next power of two.
506 sges_n = rte_log2_u32((size / mb_len) + !!(size % mb_len));
507 rxq->sges_n = sges_n;
508 /* Make sure sges_n did not overflow. */
509 size = mb_len * (1 << rxq->sges_n);
510 size -= RTE_PKTMBUF_HEADROOM;
511 if (size < dev->data->dev_conf.rxmode.max_rx_pkt_len) {
512 rte_errno = EOVERFLOW;
513 ERROR("%p: too many SGEs (%u) needed to handle"
514 " requested maximum packet size %u",
517 dev->data->dev_conf.rxmode.max_rx_pkt_len);
521 WARN("%p: the requested maximum Rx packet size (%u) is"
522 " larger than a single mbuf (%u) and scattered"
523 " mode has not been requested",
525 dev->data->dev_conf.rxmode.max_rx_pkt_len,
526 mb_len - RTE_PKTMBUF_HEADROOM);
528 DEBUG("%p: maximum number of segments per packet: %u",
529 (void *)dev, 1 << rxq->sges_n);
530 if (desc % (1 << rxq->sges_n)) {
532 ERROR("%p: number of Rx queue descriptors (%u) is not a"
533 " multiple of maximum segments per packet (%u)",
539 /* Use the entire Rx mempool as the memory region. */
540 rxq->mr = mlx4_mp2mr(priv->pd, mp);
543 ERROR("%p: MR creation failure: %s",
544 (void *)dev, strerror(rte_errno));
547 if (dev->data->dev_conf.intr_conf.rxq) {
548 rxq->channel = ibv_create_comp_channel(priv->ctx);
549 if (rxq->channel == NULL) {
551 ERROR("%p: Rx interrupt completion channel creation"
553 (void *)dev, strerror(rte_errno));
556 if (mlx4_fd_set_non_blocking(rxq->channel->fd) < 0) {
557 ERROR("%p: unable to make Rx interrupt completion"
558 " channel non-blocking: %s",
559 (void *)dev, strerror(rte_errno));
563 rxq->cq = ibv_create_cq(priv->ctx, desc >> rxq->sges_n, NULL,
567 ERROR("%p: CQ creation failure: %s",
568 (void *)dev, strerror(rte_errno));
571 rxq->wq = ibv_create_wq
573 &(struct ibv_wq_init_attr){
574 .wq_type = IBV_WQT_RQ,
575 .max_wr = desc >> rxq->sges_n,
576 .max_sge = 1 << rxq->sges_n,
581 rte_errno = errno ? errno : EINVAL;
582 ERROR("%p: WQ creation failure: %s",
583 (void *)dev, strerror(rte_errno));
588 &(struct ibv_wq_attr){
589 .attr_mask = IBV_WQ_ATTR_STATE,
590 .wq_state = IBV_WQS_RDY,
594 ERROR("%p: WQ state to IBV_WPS_RDY failed: %s",
595 (void *)dev, strerror(rte_errno));
598 /* Retrieve device queue information. */
599 mlxdv.cq.in = rxq->cq;
600 mlxdv.cq.out = &dv_cq;
601 mlxdv.rwq.in = rxq->wq;
602 mlxdv.rwq.out = &dv_rwq;
603 ret = mlx4dv_init_obj(&mlxdv, MLX4DV_OBJ_RWQ | MLX4DV_OBJ_CQ);
606 ERROR("%p: failed to obtain device information", (void *)dev);
610 (volatile struct mlx4_wqe_data_seg (*)[])
611 ((uintptr_t)dv_rwq.buf.buf + dv_rwq.rq.offset);
612 rxq->rq_db = dv_rwq.rdb;
614 rxq->mcq.buf = dv_cq.buf.buf;
615 rxq->mcq.cqe_cnt = dv_cq.cqe_cnt;
616 rxq->mcq.set_ci_db = dv_cq.set_ci_db;
617 rxq->mcq.cqe_64 = (dv_cq.cqe_size & 64) ? 1 : 0;
618 ret = mlx4_rxq_alloc_elts(rxq);
620 ERROR("%p: RXQ allocation failed: %s",
621 (void *)dev, strerror(rte_errno));
624 DEBUG("%p: adding Rx queue %p to list", (void *)dev, (void *)rxq);
625 dev->data->rx_queues[idx] = rxq;
626 /* Update doorbell counter. */
627 rxq->rq_ci = desc >> rxq->sges_n;
629 *rxq->rq_db = rte_cpu_to_be_32(rxq->rq_ci);
632 dev->data->rx_queues[idx] = NULL;
634 mlx4_rx_queue_release(rxq);
636 assert(rte_errno > 0);
641 * DPDK callback to release a Rx queue.
644 * Generic Rx queue pointer.
647 mlx4_rx_queue_release(void *dpdk_rxq)
649 struct rxq *rxq = (struct rxq *)dpdk_rxq;
656 for (i = 0; i != priv->dev->data->nb_rx_queues; ++i)
657 if (priv->dev->data->rx_queues[i] == rxq) {
658 DEBUG("%p: removing Rx queue %p from list",
659 (void *)priv->dev, (void *)rxq);
660 priv->dev->data->rx_queues[i] = NULL;
663 mlx4_rxq_free_elts(rxq);
665 claim_zero(ibv_destroy_wq(rxq->wq));
667 claim_zero(ibv_destroy_cq(rxq->cq));
669 claim_zero(ibv_destroy_comp_channel(rxq->channel));
671 claim_zero(ibv_dereg_mr(rxq->mr));