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5 * Copyright 2017 Mellanox
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38 #include <sys/queue.h>
40 /* Verbs headers do not support -pedantic. */
42 #pragma GCC diagnostic ignored "-Wpedantic"
44 #include <infiniband/mlx4dv.h>
45 #include <infiniband/verbs.h>
47 #pragma GCC diagnostic error "-Wpedantic"
50 #include <rte_ethdev.h>
52 #include <rte_mempool.h>
57 /** Rx queue counters. */
58 struct mlx4_rxq_stats {
59 unsigned int idx; /**< Mapping index. */
60 uint64_t ipackets; /**< Total of successfully received packets. */
61 uint64_t ibytes; /**< Total of successfully received bytes. */
62 uint64_t idropped; /**< Total of packets dropped when Rx ring full. */
63 uint64_t rx_nombuf; /**< Total of Rx mbuf allocation failures. */
66 /** Rx queue descriptor. */
68 struct priv *priv; /**< Back pointer to private data. */
69 struct rte_mempool *mp; /**< Memory pool for allocations. */
70 struct mlx4_mr *mr; /**< Memory region. */
71 struct ibv_cq *cq; /**< Completion queue. */
72 struct ibv_wq *wq; /**< Work queue. */
73 struct ibv_comp_channel *channel; /**< Rx completion channel. */
74 uint16_t rq_ci; /**< Saved RQ consumer index. */
75 uint16_t port_id; /**< Port ID for incoming packets. */
76 uint16_t sges_n; /**< Number of segments per packet (log2 value). */
77 uint16_t elts_n; /**< Mbuf queue size (log2 value). */
78 struct rte_mbuf *(*elts)[]; /**< Rx elements. */
79 volatile struct mlx4_wqe_data_seg (*wqes)[]; /**< HW queue entries. */
80 volatile uint32_t *rq_db; /**< RQ doorbell record. */
81 uint32_t csum:1; /**< Enable checksum offloading. */
82 uint32_t csum_l2tun:1; /**< Same for L2 tunnels. */
83 uint32_t l2tun_offload:1; /**< L2 tunnel offload is enabled. */
84 struct mlx4_cq mcq; /**< Info for directly manipulating the CQ. */
85 struct mlx4_rxq_stats stats; /**< Rx queue counters. */
86 unsigned int socket; /**< CPU socket ID for allocations. */
87 uint32_t usecnt; /**< Number of users relying on queue resources. */
88 uint8_t data[]; /**< Remaining queue resources. */
91 /** Shared flow target for Rx queues. */
93 LIST_ENTRY(mlx4_rss) next; /**< Next entry in list. */
94 struct priv *priv; /**< Back pointer to private data. */
95 uint32_t refcnt; /**< Reference count for this object. */
96 uint32_t usecnt; /**< Number of users relying on @p qp and @p ind. */
97 struct ibv_qp *qp; /**< Queue pair. */
98 struct ibv_rwq_ind_table *ind; /**< Indirection table. */
99 uint64_t fields; /**< Fields for RSS processing (Verbs format). */
100 uint8_t key[MLX4_RSS_HASH_KEY_SIZE]; /**< Hash key to use. */
101 uint16_t queues; /**< Number of target queues. */
102 uint16_t queue_id[]; /**< Target queues. */
107 struct rte_mbuf *buf; /**< Buffer. */
109 volatile struct mlx4_wqe_ctrl_seg *wqe; /**< SQ WQE. */
110 volatile uint32_t *eocb; /**< End of completion burst. */
114 /** Rx queue counters. */
115 struct mlx4_txq_stats {
116 unsigned int idx; /**< Mapping index. */
117 uint64_t opackets; /**< Total of successfully sent packets. */
118 uint64_t obytes; /**< Total of successfully sent bytes. */
119 uint64_t odropped; /**< Total of packets not sent when Tx ring full. */
122 /** Tx queue descriptor. */
124 struct mlx4_sq msq; /**< Info for directly manipulating the SQ. */
125 struct mlx4_cq mcq; /**< Info for directly manipulating the CQ. */
126 unsigned int elts_head; /**< Current index in (*elts)[]. */
127 unsigned int elts_tail; /**< First element awaiting completion. */
128 int elts_comp_cd; /**< Countdown for next completion. */
129 unsigned int elts_comp_cd_init; /**< Initial value for countdown. */
130 unsigned int elts_n; /**< (*elts)[] length. */
131 struct txq_elt (*elts)[]; /**< Tx elements. */
132 struct mlx4_txq_stats stats; /**< Tx queue counters. */
133 uint32_t max_inline; /**< Max inline send size. */
134 uint32_t csum:1; /**< Enable checksum offloading. */
135 uint32_t csum_l2tun:1; /**< Same for L2 tunnels. */
136 uint32_t lb:1; /**< Whether packets should be looped back by eSwitch. */
138 /**< Memory used for storing the first DWORD of data TXBBs. */
140 const struct rte_mempool *mp; /**< Cached memory pool. */
141 struct mlx4_mr *mr; /**< Memory region (for mp). */
142 uint32_t lkey; /**< mr->lkey copy. */
143 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /**< MP to MR translation table. */
144 struct priv *priv; /**< Back pointer to private data. */
145 unsigned int socket; /**< CPU socket ID for allocations. */
146 struct ibv_cq *cq; /**< Completion queue. */
147 struct ibv_qp *qp; /**< Queue pair. */
148 uint8_t data[]; /**< Remaining queue resources. */
153 uint8_t mlx4_rss_hash_key_default[MLX4_RSS_HASH_KEY_SIZE];
154 int mlx4_rss_init(struct priv *priv);
155 void mlx4_rss_deinit(struct priv *priv);
156 struct mlx4_rss *mlx4_rss_get(struct priv *priv, uint64_t fields,
157 uint8_t key[MLX4_RSS_HASH_KEY_SIZE],
158 uint16_t queues, const uint16_t queue_id[]);
159 void mlx4_rss_put(struct mlx4_rss *rss);
160 int mlx4_rss_attach(struct mlx4_rss *rss);
161 void mlx4_rss_detach(struct mlx4_rss *rss);
162 int mlx4_rxq_attach(struct rxq *rxq);
163 void mlx4_rxq_detach(struct rxq *rxq);
164 int mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
165 uint16_t desc, unsigned int socket,
166 const struct rte_eth_rxconf *conf,
167 struct rte_mempool *mp);
168 void mlx4_rx_queue_release(void *dpdk_rxq);
172 uint16_t mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts,
174 uint16_t mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts,
176 uint16_t mlx4_tx_burst_removed(void *dpdk_txq, struct rte_mbuf **pkts,
178 uint16_t mlx4_rx_burst_removed(void *dpdk_rxq, struct rte_mbuf **pkts,
183 int mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
184 uint16_t desc, unsigned int socket,
185 const struct rte_eth_txconf *conf);
186 void mlx4_tx_queue_release(void *dpdk_txq);
189 * Get memory region (MR) <-> memory pool (MP) association from txq->mp2mr[].
190 * Call mlx4_txq_add_mr() if MP is not registered yet.
193 * Pointer to Tx queue structure.
195 * Memory pool for which a memory region lkey must be returned.
198 * mr->lkey on success, (uint32_t)-1 on failure.
200 static inline uint32_t
201 mlx4_txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
205 for (i = 0; (i != RTE_DIM(txq->mp2mr)); ++i) {
206 if (unlikely(txq->mp2mr[i].mp == NULL)) {
207 /* Unknown MP, add a new MR for it. */
210 if (txq->mp2mr[i].mp == mp) {
212 return txq->mp2mr[i].lkey;
215 return mlx4_txq_add_mr(txq, mp, i);
218 #endif /* MLX4_RXTX_H_ */