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5 * Copyright 2017 Mellanox
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38 #include <sys/queue.h>
40 /* Verbs headers do not support -pedantic. */
42 #pragma GCC diagnostic ignored "-Wpedantic"
44 #include <infiniband/mlx4dv.h>
45 #include <infiniband/verbs.h>
47 #pragma GCC diagnostic error "-Wpedantic"
50 #include <rte_ethdev.h>
52 #include <rte_mempool.h>
57 /** Rx queue counters. */
58 struct mlx4_rxq_stats {
59 unsigned int idx; /**< Mapping index. */
60 uint64_t ipackets; /**< Total of successfully received packets. */
61 uint64_t ibytes; /**< Total of successfully received bytes. */
62 uint64_t idropped; /**< Total of packets dropped when Rx ring full. */
63 uint64_t rx_nombuf; /**< Total of Rx mbuf allocation failures. */
66 /** Rx queue descriptor. */
68 struct priv *priv; /**< Back pointer to private data. */
69 struct rte_mempool *mp; /**< Memory pool for allocations. */
70 struct mlx4_mr *mr; /**< Memory region. */
71 struct ibv_cq *cq; /**< Completion queue. */
72 struct ibv_wq *wq; /**< Work queue. */
73 struct ibv_comp_channel *channel; /**< Rx completion channel. */
74 uint16_t rq_ci; /**< Saved RQ consumer index. */
75 uint16_t port_id; /**< Port ID for incoming packets. */
76 uint16_t sges_n; /**< Number of segments per packet (log2 value). */
77 uint16_t elts_n; /**< Mbuf queue size (log2 value). */
78 struct rte_mbuf *(*elts)[]; /**< Rx elements. */
79 volatile struct mlx4_wqe_data_seg (*wqes)[]; /**< HW queue entries. */
80 volatile uint32_t *rq_db; /**< RQ doorbell record. */
81 uint32_t csum:1; /**< Enable checksum offloading. */
82 uint32_t csum_l2tun:1; /**< Same for L2 tunnels. */
83 struct mlx4_cq mcq; /**< Info for directly manipulating the CQ. */
84 struct mlx4_rxq_stats stats; /**< Rx queue counters. */
85 unsigned int socket; /**< CPU socket ID for allocations. */
86 uint32_t usecnt; /**< Number of users relying on queue resources. */
87 uint8_t data[]; /**< Remaining queue resources. */
90 /** Shared flow target for Rx queues. */
92 LIST_ENTRY(mlx4_rss) next; /**< Next entry in list. */
93 struct priv *priv; /**< Back pointer to private data. */
94 uint32_t refcnt; /**< Reference count for this object. */
95 uint32_t usecnt; /**< Number of users relying on @p qp and @p ind. */
96 struct ibv_qp *qp; /**< Queue pair. */
97 struct ibv_rwq_ind_table *ind; /**< Indirection table. */
98 uint64_t fields; /**< Fields for RSS processing (Verbs format). */
99 uint8_t key[MLX4_RSS_HASH_KEY_SIZE]; /**< Hash key to use. */
100 uint16_t queues; /**< Number of target queues. */
101 uint16_t queue_id[]; /**< Target queues. */
106 struct rte_mbuf *buf; /**< Buffer. */
109 /** Rx queue counters. */
110 struct mlx4_txq_stats {
111 unsigned int idx; /**< Mapping index. */
112 uint64_t opackets; /**< Total of successfully sent packets. */
113 uint64_t obytes; /**< Total of successfully sent bytes. */
114 uint64_t odropped; /**< Total of packets not sent when Tx ring full. */
117 /** Tx queue descriptor. */
119 struct mlx4_sq msq; /**< Info for directly manipulating the SQ. */
120 struct mlx4_cq mcq; /**< Info for directly manipulating the CQ. */
121 unsigned int elts_head; /**< Current index in (*elts)[]. */
122 unsigned int elts_tail; /**< First element awaiting completion. */
123 unsigned int elts_comp; /**< Number of packets awaiting completion. */
124 int elts_comp_cd; /**< Countdown for next completion. */
125 unsigned int elts_comp_cd_init; /**< Initial value for countdown. */
126 unsigned int elts_n; /**< (*elts)[] length. */
127 struct txq_elt (*elts)[]; /**< Tx elements. */
128 struct mlx4_txq_stats stats; /**< Tx queue counters. */
129 uint32_t max_inline; /**< Max inline send size. */
130 uint32_t csum:1; /**< Enable checksum offloading. */
131 uint32_t csum_l2tun:1; /**< Same for L2 tunnels. */
132 uint32_t lb:1; /**< Whether packets should be looped back by eSwitch. */
134 /**< Memory used for storing the first DWORD of data TXBBs. */
136 const struct rte_mempool *mp; /**< Cached memory pool. */
137 struct mlx4_mr *mr; /**< Memory region (for mp). */
138 uint32_t lkey; /**< mr->lkey copy. */
139 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /**< MP to MR translation table. */
140 struct priv *priv; /**< Back pointer to private data. */
141 unsigned int socket; /**< CPU socket ID for allocations. */
142 struct ibv_cq *cq; /**< Completion queue. */
143 struct ibv_qp *qp; /**< Queue pair. */
144 uint8_t data[]; /**< Remaining queue resources. */
149 uint8_t mlx4_rss_hash_key_default[MLX4_RSS_HASH_KEY_SIZE];
150 int mlx4_rss_init(struct priv *priv);
151 void mlx4_rss_deinit(struct priv *priv);
152 struct mlx4_rss *mlx4_rss_get(struct priv *priv, uint64_t fields,
153 uint8_t key[MLX4_RSS_HASH_KEY_SIZE],
154 uint16_t queues, const uint16_t queue_id[]);
155 void mlx4_rss_put(struct mlx4_rss *rss);
156 int mlx4_rss_attach(struct mlx4_rss *rss);
157 void mlx4_rss_detach(struct mlx4_rss *rss);
158 int mlx4_rxq_attach(struct rxq *rxq);
159 void mlx4_rxq_detach(struct rxq *rxq);
160 int mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
161 uint16_t desc, unsigned int socket,
162 const struct rte_eth_rxconf *conf,
163 struct rte_mempool *mp);
164 void mlx4_rx_queue_release(void *dpdk_rxq);
168 uint16_t mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts,
170 uint16_t mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts,
172 uint16_t mlx4_tx_burst_removed(void *dpdk_txq, struct rte_mbuf **pkts,
174 uint16_t mlx4_rx_burst_removed(void *dpdk_rxq, struct rte_mbuf **pkts,
179 int mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
180 uint16_t desc, unsigned int socket,
181 const struct rte_eth_txconf *conf);
182 void mlx4_tx_queue_release(void *dpdk_txq);
185 * Get memory region (MR) <-> memory pool (MP) association from txq->mp2mr[].
186 * Call mlx4_txq_add_mr() if MP is not registered yet.
189 * Pointer to Tx queue structure.
191 * Memory pool for which a memory region lkey must be returned.
194 * mr->lkey on success, (uint32_t)-1 on failure.
196 static inline uint32_t
197 mlx4_txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
201 for (i = 0; (i != RTE_DIM(txq->mp2mr)); ++i) {
202 if (unlikely(txq->mp2mr[i].mp == NULL)) {
203 /* Unknown MP, add a new MR for it. */
206 if (txq->mp2mr[i].mp == mp) {
208 return txq->mp2mr[i].lkey;
211 return mlx4_txq_add_mr(txq, mp, i);
214 #endif /* MLX4_RXTX_H_ */