drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the interrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param cdev
 135  *   Pointer to mlx5 device.
 136  *
 137  * @param device_attr
 138  *   Pointer to mlx5 device attributes.
 139  *
 140  * @return
 141  *   0 on success, a negative errno value otherwise and rte_errno is set.
 142  */
 143 int
 144 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
 145                      struct mlx5_dev_attr *device_attr)
 146 {
 147         int err;
 148         struct ibv_context *ctx = cdev->ctx;
 149         struct ibv_device_attr_ex attr_ex;
 150
 151         memset(device_attr, 0, sizeof(*device_attr));
 152         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 153         if (err) {
 154                 rte_errno = errno;
 155                 return -rte_errno;
 156         }
 157         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 158         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 159         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 160         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 161         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 162         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 163         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 164         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 165         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 166         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 167         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 168         device_attr->max_rwq_indirection_table_size =
 169                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 170         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 171         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 172
 173         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 174 #ifdef HAVE_IBV_MLX5_MOD_SWP
 175         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 176 #endif
 177 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 178         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 179 #endif
 180 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 181         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 182 #endif
 183         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 184         if (err) {
 185                 rte_errno = errno;
 186                 return -rte_errno;
 187         }
 188
 189         device_attr->flags = dv_attr.flags;
 190         device_attr->comp_mask = dv_attr.comp_mask;
 191 #ifdef HAVE_IBV_MLX5_MOD_SWP
 192         device_attr->sw_parsing_offloads =
 193                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 194 #endif
 195 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 196         device_attr->min_single_stride_log_num_of_bytes =
 197                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 198         device_attr->max_single_stride_log_num_of_bytes =
 199                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 200         device_attr->min_single_wqe_log_num_of_strides =
 201                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 202         device_attr->max_single_wqe_log_num_of_strides =
 203                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 204         device_attr->stride_supported_qpts =
 205                 dv_attr.striding_rq_caps.supported_qpts;
 206 #endif
 207 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 208         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 209 #endif
 210         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 211                 sizeof(device_attr->fw_ver));
 212
 213         return 0;
 214 }
 215
 216 /**
 217  * Detect misc5 support or not
 218  *
 219  * @param[in] priv
 220  *   Device private data pointer
 221  */
 222 #ifdef HAVE_MLX5DV_DR
 223 static void
 224 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 225 {
 226 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 227         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 228          * Case: IPv4--->UDP--->VxLAN--->vni
 229          */
 230         void *tbl;
 231         struct mlx5_flow_dv_match_params matcher_mask;
 232         void *match_m;
 233         void *matcher;
 234         void *headers_m;
 235         void *misc5_m;
 236         uint32_t *tunnel_header_m;
 237         struct mlx5dv_flow_matcher_attr dv_attr;
 238
 239         memset(&matcher_mask, 0, sizeof(matcher_mask));
 240         matcher_mask.size = sizeof(matcher_mask.buf);
 241         match_m = matcher_mask.buf;
 242         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 243         misc5_m = MLX5_ADDR_OF(fte_match_param,
 244                                match_m, misc_parameters_5);
 245         tunnel_header_m = (uint32_t *)
 246                                 MLX5_ADDR_OF(fte_match_set_misc5,
 247                                 misc5_m, tunnel_header_1);
 248         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 249         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 250         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 251         *tunnel_header_m = 0xffffff;
 252
 253         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 254         if (!tbl) {
 255                 DRV_LOG(INFO, "No SW steering support");
 256                 return;
 257         }
 258         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 259         dv_attr.match_mask = (void *)&matcher_mask,
 260         dv_attr.match_criteria_enable =
 261                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 262                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 263         dv_attr.priority = 3;
 264 #ifdef HAVE_MLX5DV_DR_ESWITCH
 265         void *misc2_m;
 266         if (priv->config.dv_esw_en) {
 267                 /* FDB enabled reg_c_0 */
 268                 dv_attr.match_criteria_enable |=
 269                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 270                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 271                                        match_m, misc_parameters_2);
 272                 MLX5_SET(fte_match_set_misc2, misc2_m,
 273                          metadata_reg_c_0, 0xffff);
 274         }
 275 #endif
 276         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 277                                                     &dv_attr, tbl);
 278         if (matcher) {
 279                 priv->sh->misc5_cap = 1;
 280                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 281         }
 282         mlx5_glue->dr_destroy_flow_tbl(tbl);
 283 #else
 284         RTE_SET_USED(priv);
 285 #endif
 286 }
 287 #endif
 288
 289 /**
 290  * Initialize DR related data within private structure.
 291  * Routine checks the reference counter and does actual
 292  * resources creation/initialization only if counter is zero.
 293  *
 294  * @param[in] priv
 295  *   Pointer to the private device data structure.
 296  *
 297  * @return
 298  *   Zero on success, positive error code otherwise.
 299  */
 300 static int
 301 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 302 {
 303         struct mlx5_dev_ctx_shared *sh = priv->sh;
 304         char s[MLX5_NAME_SIZE] __rte_unused;
 305         int err;
 306
 307         MLX5_ASSERT(sh && sh->refcnt);
 308         if (sh->refcnt > 1)
 309                 return 0;
 310         err = mlx5_alloc_table_hash_list(priv);
 311         if (err)
 312                 goto error;
 313         /* The resources below are only valid with DV support. */
 314 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 315         /* Init port id action list. */
 316         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 317         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 318                                                    flow_dv_port_id_create_cb,
 319                                                    flow_dv_port_id_match_cb,
 320                                                    flow_dv_port_id_remove_cb,
 321                                                    flow_dv_port_id_clone_cb,
 322                                                  flow_dv_port_id_clone_free_cb);
 323         if (!sh->port_id_action_list)
 324                 goto error;
 325         /* Init push vlan action list. */
 326         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 327         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 328                                                     flow_dv_push_vlan_create_cb,
 329                                                     flow_dv_push_vlan_match_cb,
 330                                                     flow_dv_push_vlan_remove_cb,
 331                                                     flow_dv_push_vlan_clone_cb,
 332                                                flow_dv_push_vlan_clone_free_cb);
 333         if (!sh->push_vlan_action_list)
 334                 goto error;
 335         /* Init sample action list. */
 336         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 337         sh->sample_action_list = mlx5_list_create(s, sh, true,
 338                                                   flow_dv_sample_create_cb,
 339                                                   flow_dv_sample_match_cb,
 340                                                   flow_dv_sample_remove_cb,
 341                                                   flow_dv_sample_clone_cb,
 342                                                   flow_dv_sample_clone_free_cb);
 343         if (!sh->sample_action_list)
 344                 goto error;
 345         /* Init dest array action list. */
 346         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 347         sh->dest_array_list = mlx5_list_create(s, sh, true,
 348                                                flow_dv_dest_array_create_cb,
 349                                                flow_dv_dest_array_match_cb,
 350                                                flow_dv_dest_array_remove_cb,
 351                                                flow_dv_dest_array_clone_cb,
 352                                               flow_dv_dest_array_clone_free_cb);
 353         if (!sh->dest_array_list)
 354                 goto error;
 355         /* Init shared flex parsers list, no need lcore_share */
 356         snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
 357         sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
 358                                                mlx5_flex_parser_create_cb,
 359                                                mlx5_flex_parser_match_cb,
 360                                                mlx5_flex_parser_remove_cb,
 361                                                mlx5_flex_parser_clone_cb,
 362                                                mlx5_flex_parser_clone_free_cb);
 363         if (!sh->flex_parsers_dv)
 364                 goto error;
 365 #endif
 366 #ifdef HAVE_MLX5DV_DR
 367         void *domain;
 368
 369         /* Reference counter is zero, we should initialize structures. */
 370         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 371                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 372         if (!domain) {
 373                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 374                 err = errno;
 375                 goto error;
 376         }
 377         sh->rx_domain = domain;
 378         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 379                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 380         if (!domain) {
 381                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 382                 err = errno;
 383                 goto error;
 384         }
 385         sh->tx_domain = domain;
 386 #ifdef HAVE_MLX5DV_DR_ESWITCH
 387         if (priv->config.dv_esw_en) {
 388                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 389                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 390                 if (!domain) {
 391                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 392                         err = errno;
 393                         goto error;
 394                 }
 395                 sh->fdb_domain = domain;
 396         }
 397         /*
 398          * The drop action is just some dummy placeholder in rdma-core. It
 399          * does not belong to domains and has no any attributes, and, can be
 400          * shared by the entire device.
 401          */
 402         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 403         if (!sh->dr_drop_action) {
 404                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 405                 err = errno;
 406                 goto error;
 407         }
 408 #endif
 409         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 410                 err = mlx5_alloc_tunnel_hub(sh);
 411         if (err) {
 412                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 413                 goto error;
 414         }
 415         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 416                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 417                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 418                 if (sh->fdb_domain)
 419                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 420         }
 421         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 422         if (!priv->config.allow_duplicate_pattern) {
 423 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 424                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 425 #endif
 426                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 427                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 428                 if (sh->fdb_domain)
 429                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 430         }
 431
 432         __mlx5_discovery_misc5_cap(priv);
 433 #endif /* HAVE_MLX5DV_DR */
 434         sh->default_miss_action =
 435                         mlx5_glue->dr_create_flow_action_default_miss();
 436         if (!sh->default_miss_action)
 437                 DRV_LOG(WARNING, "Default miss action is not supported.");
 438         LIST_INIT(&sh->shared_rxqs);
 439         return 0;
 440 error:
 441         /* Rollback the created objects. */
 442         if (sh->rx_domain) {
 443                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 444                 sh->rx_domain = NULL;
 445         }
 446         if (sh->tx_domain) {
 447                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 448                 sh->tx_domain = NULL;
 449         }
 450         if (sh->fdb_domain) {
 451                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 452                 sh->fdb_domain = NULL;
 453         }
 454         if (sh->dr_drop_action) {
 455                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 456                 sh->dr_drop_action = NULL;
 457         }
 458         if (sh->pop_vlan_action) {
 459                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 460                 sh->pop_vlan_action = NULL;
 461         }
 462         if (sh->encaps_decaps) {
 463                 mlx5_hlist_destroy(sh->encaps_decaps);
 464                 sh->encaps_decaps = NULL;
 465         }
 466         if (sh->modify_cmds) {
 467                 mlx5_hlist_destroy(sh->modify_cmds);
 468                 sh->modify_cmds = NULL;
 469         }
 470         if (sh->tag_table) {
 471                 /* tags should be destroyed with flow before. */
 472                 mlx5_hlist_destroy(sh->tag_table);
 473                 sh->tag_table = NULL;
 474         }
 475         if (sh->tunnel_hub) {
 476                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 477                 sh->tunnel_hub = NULL;
 478         }
 479         mlx5_free_table_hash_list(priv);
 480         if (sh->port_id_action_list) {
 481                 mlx5_list_destroy(sh->port_id_action_list);
 482                 sh->port_id_action_list = NULL;
 483         }
 484         if (sh->push_vlan_action_list) {
 485                 mlx5_list_destroy(sh->push_vlan_action_list);
 486                 sh->push_vlan_action_list = NULL;
 487         }
 488         if (sh->sample_action_list) {
 489                 mlx5_list_destroy(sh->sample_action_list);
 490                 sh->sample_action_list = NULL;
 491         }
 492         if (sh->dest_array_list) {
 493                 mlx5_list_destroy(sh->dest_array_list);
 494                 sh->dest_array_list = NULL;
 495         }
 496         return err;
 497 }
 498
 499 /**
 500  * Destroy DR related data within private structure.
 501  *
 502  * @param[in] priv
 503  *   Pointer to the private device data structure.
 504  */
 505 void
 506 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 507 {
 508         struct mlx5_dev_ctx_shared *sh = priv->sh;
 509
 510         MLX5_ASSERT(sh && sh->refcnt);
 511         if (sh->refcnt > 1)
 512                 return;
 513         MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
 514 #ifdef HAVE_MLX5DV_DR
 515         if (sh->rx_domain) {
 516                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 517                 sh->rx_domain = NULL;
 518         }
 519         if (sh->tx_domain) {
 520                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 521                 sh->tx_domain = NULL;
 522         }
 523 #ifdef HAVE_MLX5DV_DR_ESWITCH
 524         if (sh->fdb_domain) {
 525                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 526                 sh->fdb_domain = NULL;
 527         }
 528         if (sh->dr_drop_action) {
 529                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 530                 sh->dr_drop_action = NULL;
 531         }
 532 #endif
 533         if (sh->pop_vlan_action) {
 534                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 535                 sh->pop_vlan_action = NULL;
 536         }
 537 #endif /* HAVE_MLX5DV_DR */
 538         if (sh->default_miss_action)
 539                 mlx5_glue->destroy_flow_action
 540                                 (sh->default_miss_action);
 541         if (sh->encaps_decaps) {
 542                 mlx5_hlist_destroy(sh->encaps_decaps);
 543                 sh->encaps_decaps = NULL;
 544         }
 545         if (sh->modify_cmds) {
 546                 mlx5_hlist_destroy(sh->modify_cmds);
 547                 sh->modify_cmds = NULL;
 548         }
 549         if (sh->tag_table) {
 550                 /* tags should be destroyed with flow before. */
 551                 mlx5_hlist_destroy(sh->tag_table);
 552                 sh->tag_table = NULL;
 553         }
 554         if (sh->tunnel_hub) {
 555                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 556                 sh->tunnel_hub = NULL;
 557         }
 558         mlx5_free_table_hash_list(priv);
 559         if (sh->port_id_action_list) {
 560                 mlx5_list_destroy(sh->port_id_action_list);
 561                 sh->port_id_action_list = NULL;
 562         }
 563         if (sh->push_vlan_action_list) {
 564                 mlx5_list_destroy(sh->push_vlan_action_list);
 565                 sh->push_vlan_action_list = NULL;
 566         }
 567         if (sh->sample_action_list) {
 568                 mlx5_list_destroy(sh->sample_action_list);
 569                 sh->sample_action_list = NULL;
 570         }
 571         if (sh->dest_array_list) {
 572                 mlx5_list_destroy(sh->dest_array_list);
 573                 sh->dest_array_list = NULL;
 574         }
 575 }
 576
 577 /**
 578  * Initialize shared data between primary and secondary process.
 579  *
 580  * A memzone is reserved by primary process and secondary processes attach to
 581  * the memzone.
 582  *
 583  * @return
 584  *   0 on success, a negative errno value otherwise and rte_errno is set.
 585  */
 586 static int
 587 mlx5_init_shared_data(void)
 588 {
 589         const struct rte_memzone *mz;
 590         int ret = 0;
 591
 592         rte_spinlock_lock(&mlx5_shared_data_lock);
 593         if (mlx5_shared_data == NULL) {
 594                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 595                         /* Allocate shared memory. */
 596                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 597                                                  sizeof(*mlx5_shared_data),
 598                                                  SOCKET_ID_ANY, 0);
 599                         if (mz == NULL) {
 600                                 DRV_LOG(ERR,
 601                                         "Cannot allocate mlx5 shared data");
 602                                 ret = -rte_errno;
 603                                 goto error;
 604                         }
 605                         mlx5_shared_data = mz->addr;
 606                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 607                         rte_spinlock_init(&mlx5_shared_data->lock);
 608                 } else {
 609                         /* Lookup allocated shared memory. */
 610                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 611                         if (mz == NULL) {
 612                                 DRV_LOG(ERR,
 613                                         "Cannot attach mlx5 shared data");
 614                                 ret = -rte_errno;
 615                                 goto error;
 616                         }
 617                         mlx5_shared_data = mz->addr;
 618                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 619                 }
 620         }
 621 error:
 622         rte_spinlock_unlock(&mlx5_shared_data_lock);
 623         return ret;
 624 }
 625
 626 /**
 627  * PMD global initialization.
 628  *
 629  * Independent from individual device, this function initializes global
 630  * per-PMD data structures distinguishing primary and secondary processes.
 631  * Hence, each initialization is called once per a process.
 632  *
 633  * @return
 634  *   0 on success, a negative errno value otherwise and rte_errno is set.
 635  */
 636 static int
 637 mlx5_init_once(void)
 638 {
 639         struct mlx5_shared_data *sd;
 640         struct mlx5_local_data *ld = &mlx5_local_data;
 641         int ret = 0;
 642
 643         if (mlx5_init_shared_data())
 644                 return -rte_errno;
 645         sd = mlx5_shared_data;
 646         MLX5_ASSERT(sd);
 647         rte_spinlock_lock(&sd->lock);
 648         switch (rte_eal_process_type()) {
 649         case RTE_PROC_PRIMARY:
 650                 if (sd->init_done)
 651                         break;
 652                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 653                                            mlx5_mp_os_primary_handle);
 654                 if (ret)
 655                         goto out;
 656                 sd->init_done = true;
 657                 break;
 658         case RTE_PROC_SECONDARY:
 659                 if (ld->init_done)
 660                         break;
 661                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 662                                              mlx5_mp_os_secondary_handle);
 663                 if (ret)
 664                         goto out;
 665                 ++sd->secondary_cnt;
 666                 ld->init_done = true;
 667                 break;
 668         default:
 669                 break;
 670         }
 671 out:
 672         rte_spinlock_unlock(&sd->lock);
 673         return ret;
 674 }
 675
 676 /**
 677  * DR flow drop action support detect.
 678  *
 679  * @param dev
 680  *   Pointer to rte_eth_dev structure.
 681  *
 682  */
 683 static void
 684 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 685 {
 686 #ifdef HAVE_MLX5DV_DR
 687         struct mlx5_priv *priv = dev->data->dev_private;
 688
 689         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 690                 return;
 691         /**
 692          * DR supports drop action placeholder when it is supported;
 693          * otherwise, use the queue drop action.
 694          */
 695         if (!priv->sh->drop_action_check_flag) {
 696                 if (!mlx5_flow_discover_dr_action_support(dev))
 697                         priv->sh->dr_drop_action_en = 1;
 698                 priv->sh->drop_action_check_flag = 1;
 699         }
 700         if (priv->sh->dr_drop_action_en)
 701                 priv->root_drop_action = priv->sh->dr_drop_action;
 702         else
 703                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 704 #endif
 705 }
 706
 707 static void
 708 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 709 {
 710         struct mlx5_priv *priv = dev->data->dev_private;
 711         void *ctx = priv->sh->cdev->ctx;
 712
 713         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 714         if (!priv->q_counters) {
 715                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 716                 struct ibv_wq *wq;
 717
 718                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 719                         "by DevX - fall-back to use the kernel driver global "
 720                         "queue counter.", dev->data->port_id);
 721                 /* Create WQ by kernel and query its queue counter ID. */
 722                 if (cq) {
 723                         wq = mlx5_glue->create_wq(ctx,
 724                                                   &(struct ibv_wq_init_attr){
 725                                                     .wq_type = IBV_WQT_RQ,
 726                                                     .max_wr = 1,
 727                                                     .max_sge = 1,
 728                                                     .pd = priv->sh->cdev->pd,
 729                                                     .cq = cq,
 730                                                 });
 731                         if (wq) {
 732                                 /* Counter is assigned only on RDY state. */
 733                                 int ret = mlx5_glue->modify_wq(wq,
 734                                                  &(struct ibv_wq_attr){
 735                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 736                                                  .wq_state = IBV_WQS_RDY,
 737                                                 });
 738
 739                                 if (ret == 0)
 740                                         mlx5_devx_cmd_wq_query(wq,
 741                                                          &priv->counter_set_id);
 742                                 claim_zero(mlx5_glue->destroy_wq(wq));
 743                         }
 744                         claim_zero(mlx5_glue->destroy_cq(cq));
 745                 }
 746         } else {
 747                 priv->counter_set_id = priv->q_counters->id;
 748         }
 749         if (priv->counter_set_id == 0)
 750                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 751                         "available.", dev->data->port_id);
 752 }
 753
 754 /**
 755  * Check if representor spawn info match devargs.
 756  *
 757  * @param spawn
 758  *   Verbs device parameters (name, port, switch_info) to spawn.
 759  * @param eth_da
 760  *   Device devargs to probe.
 761  *
 762  * @return
 763  *   Match result.
 764  */
 765 static bool
 766 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 767                        struct rte_eth_devargs *eth_da)
 768 {
 769         struct mlx5_switch_info *switch_info = &spawn->info;
 770         unsigned int p, f;
 771         uint16_t id;
 772         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 773                                                       eth_da->type);
 774
 775         switch (eth_da->type) {
 776         case RTE_ETH_REPRESENTOR_SF:
 777                 if (!(spawn->info.port_name == -1 &&
 778                       switch_info->name_type ==
 779                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 780                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 781                         rte_errno = EBUSY;
 782                         return false;
 783                 }
 784                 break;
 785         case RTE_ETH_REPRESENTOR_VF:
 786                 /* Allows HPF representor index -1 as exception. */
 787                 if (!(spawn->info.port_name == -1 &&
 788                       switch_info->name_type ==
 789                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 790                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 791                         rte_errno = EBUSY;
 792                         return false;
 793                 }
 794                 break;
 795         case RTE_ETH_REPRESENTOR_NONE:
 796                 rte_errno = EBUSY;
 797                 return false;
 798         default:
 799                 rte_errno = ENOTSUP;
 800                 DRV_LOG(ERR, "unsupported representor type");
 801                 return false;
 802         }
 803         /* Check representor ID: */
 804         for (p = 0; p < eth_da->nb_ports; ++p) {
 805                 if (spawn->pf_bond < 0) {
 806                         /* For non-LAG mode, allow and ignore pf. */
 807                         switch_info->pf_num = eth_da->ports[p];
 808                         repr_id = mlx5_representor_id_encode(switch_info,
 809                                                              eth_da->type);
 810                 }
 811                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 812                         id = MLX5_REPRESENTOR_ID
 813                                 (eth_da->ports[p], eth_da->type,
 814                                  eth_da->representor_ports[f]);
 815                         if (repr_id == id)
 816                                 return true;
 817                 }
 818         }
 819         rte_errno = EBUSY;
 820         return false;
 821 }
 822
 823 /**
 824  * Spawn an Ethernet device from Verbs information.
 825  *
 826  * @param dpdk_dev
 827  *   Backing DPDK device.
 828  * @param spawn
 829  *   Verbs device parameters (name, port, switch_info) to spawn.
 830  * @param config
 831  *   Device configuration parameters.
 832  * @param eth_da
 833  *   Device arguments.
 834  *
 835  * @return
 836  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 837  *   is set. The following errors are defined:
 838  *
 839  *   EBUSY: device is not supposed to be spawned.
 840  *   EEXIST: device is already spawned
 841  */
 842 static struct rte_eth_dev *
 843 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 844                struct mlx5_dev_spawn_data *spawn,
 845                struct mlx5_dev_config *config,
 846                struct rte_eth_devargs *eth_da)
 847 {
 848         const struct mlx5_switch_info *switch_info = &spawn->info;
 849         struct mlx5_dev_ctx_shared *sh = NULL;
 850         struct mlx5_hca_attr *hca_attr = &spawn->cdev->config.hca_attr;
 851         struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 852         struct rte_eth_dev *eth_dev = NULL;
 853         struct mlx5_priv *priv = NULL;
 854         int err = 0;
 855         unsigned int hw_padding = 0;
 856         unsigned int mps;
 857         unsigned int mpls_en = 0;
 858         unsigned int swp = 0;
 859         unsigned int mprq = 0;
 860         struct rte_ether_addr mac;
 861         char name[RTE_ETH_NAME_MAX_LEN];
 862         int own_domain_id = 0;
 863         uint16_t port_id;
 864         struct mlx5_port_info vport_info = { .query_flags = 0 };
 865         int nl_rdma = -1;
 866         int i;
 867
 868         /* Determine if this port representor is supposed to be spawned. */
 869         if (switch_info->representor && dpdk_dev->devargs &&
 870             !mlx5_representor_match(spawn, eth_da))
 871                 return NULL;
 872         /* Build device name. */
 873         if (spawn->pf_bond < 0) {
 874                 /* Single device. */
 875                 if (!switch_info->representor)
 876                         strlcpy(name, dpdk_dev->name, sizeof(name));
 877                 else
 878                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 879                                  dpdk_dev->name,
 880                                  switch_info->name_type ==
 881                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 882                                  switch_info->port_name);
 883         } else {
 884                 /* Bonding device. */
 885                 if (!switch_info->representor) {
 886                         err = snprintf(name, sizeof(name), "%s_%s",
 887                                        dpdk_dev->name, spawn->phys_dev_name);
 888                 } else {
 889                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 890                                 dpdk_dev->name, spawn->phys_dev_name,
 891                                 switch_info->ctrl_num,
 892                                 switch_info->pf_num,
 893                                 switch_info->name_type ==
 894                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 895                                 switch_info->port_name);
 896                 }
 897         }
 898         if (err >= (int)sizeof(name))
 899                 DRV_LOG(WARNING, "device name overflow %s", name);
 900         /* check if the device is already spawned */
 901         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 902                 rte_errno = EEXIST;
 903                 return NULL;
 904         }
 905         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 906         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 907                 struct mlx5_mp_id mp_id;
 908
 909                 eth_dev = rte_eth_dev_attach_secondary(name);
 910                 if (eth_dev == NULL) {
 911                         DRV_LOG(ERR, "can not attach rte ethdev");
 912                         rte_errno = ENOMEM;
 913                         return NULL;
 914                 }
 915                 eth_dev->device = dpdk_dev;
 916                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 917                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 918                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 919                 err = mlx5_proc_priv_init(eth_dev);
 920                 if (err)
 921                         return NULL;
 922                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 923                 /* Receive command fd from primary process */
 924                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 925                 if (err < 0)
 926                         goto err_secondary;
 927                 /* Remap UAR for Tx queues. */
 928                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 929                 if (err)
 930                         goto err_secondary;
 931                 /*
 932                  * Ethdev pointer is still required as input since
 933                  * the primary device is not accessible from the
 934                  * secondary process.
 935                  */
 936                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 937                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 938                 return eth_dev;
 939 err_secondary:
 940                 mlx5_dev_close(eth_dev);
 941                 return NULL;
 942         }
 943         /* Process parameters. */
 944         err = mlx5_args(config, dpdk_dev->devargs);
 945         if (err) {
 946                 DRV_LOG(ERR, "failed to process device arguments: %s",
 947                         strerror(rte_errno));
 948                 return NULL;
 949         }
 950         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 951         if (!sh)
 952                 return NULL;
 953         /* Update final values for devargs before check sibling config. */
 954         if (config->dv_miss_info) {
 955                 if (switch_info->master || switch_info->representor)
 956                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 957         }
 958 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 959         if (config->dv_flow_en) {
 960                 DRV_LOG(WARNING, "DV flow is not supported.");
 961                 config->dv_flow_en = 0;
 962         }
 963 #endif
 964 #ifdef HAVE_MLX5DV_DR_ESWITCH
 965         if (!(hca_attr->eswitch_manager && config->dv_flow_en &&
 966               (switch_info->representor || switch_info->master)))
 967                 config->dv_esw_en = 0;
 968 #else
 969         config->dv_esw_en = 0;
 970 #endif
 971         if (!config->dv_esw_en &&
 972             config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
 973                 DRV_LOG(WARNING,
 974                         "Metadata mode %u is not supported (no E-Switch).",
 975                         config->dv_xmeta_en);
 976                 config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
 977         }
 978         /* Check sibling device configurations. */
 979         err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);
 980         if (err)
 981                 goto error;
 982 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 983         config->dest_tir = 1;
 984 #endif
 985         /*
 986          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 987          * as all ConnectX-5 devices.
 988          */
 989         if (sh->device_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 990                 if (sh->device_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 991                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 992                         mps = MLX5_MPW_ENHANCED;
 993                 } else {
 994                         DRV_LOG(DEBUG, "MPW is supported");
 995                         mps = MLX5_MPW;
 996                 }
 997         } else {
 998                 DRV_LOG(DEBUG, "MPW isn't supported");
 999                 mps = MLX5_MPW_DISABLED;
1000         }
1001 #ifdef HAVE_IBV_MLX5_MOD_SWP
1002         if (sh->device_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1003                 swp = sh->device_attr.sw_parsing_offloads;
1004         DRV_LOG(DEBUG, "SWP support: %u", swp);
1005 #endif
1006         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1007                 MLX5_SW_PARSING_TSO_CAP);
1008 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1009         if (sh->device_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1010                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1011                         sh->device_attr.min_single_stride_log_num_of_bytes);
1012                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1013                         sh->device_attr.max_single_stride_log_num_of_bytes);
1014                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1015                         sh->device_attr.min_single_wqe_log_num_of_strides);
1016                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1017                         sh->device_attr.max_single_wqe_log_num_of_strides);
1018                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1019                         sh->device_attr.stride_supported_qpts);
1020                 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %d",
1021                         config->mprq.log_min_stride_wqe_size);
1022                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1023                 mprq = 1;
1024                 config->mprq.log_min_stride_size =
1025                         sh->device_attr.min_single_stride_log_num_of_bytes;
1026                 config->mprq.log_max_stride_size =
1027                         sh->device_attr.max_single_stride_log_num_of_bytes;
1028                 config->mprq.log_min_stride_num =
1029                         sh->device_attr.min_single_wqe_log_num_of_strides;
1030                 config->mprq.log_max_stride_num =
1031                         sh->device_attr.max_single_wqe_log_num_of_strides;
1032         }
1033 #endif
1034 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1035         if (sh->device_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1036                 config->tunnel_en = sh->device_attr.tunnel_offloads_caps &
1037                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1038                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1039                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1040         }
1041         if (config->tunnel_en) {
1042                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1043                 config->tunnel_en &
1044                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1045                 config->tunnel_en &
1046                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1047                 config->tunnel_en &
1048                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1049                 );
1050         } else {
1051                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1052         }
1053 #else
1054         DRV_LOG(WARNING,
1055                 "tunnel offloading disabled due to old OFED/rdma-core version");
1056 #endif
1057 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1058         mpls_en = ((sh->device_attr.tunnel_offloads_caps &
1059                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1060                    (sh->device_attr.tunnel_offloads_caps &
1061                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1062         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1063                 mpls_en ? "" : "not ");
1064 #else
1065         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1066                 " old OFED/rdma-core version or firmware configuration");
1067 #endif
1068         config->mpls_en = mpls_en;
1069         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1070         /* Check port status. */
1071         if (spawn->phys_port <= UINT8_MAX) {
1072                 /* Legacy Verbs api only support u8 port number. */
1073                 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1074                                             &port_attr);
1075                 if (err) {
1076                         DRV_LOG(ERR, "port query failed: %s", strerror(err));
1077                         goto error;
1078                 }
1079                 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1080                         DRV_LOG(ERR, "port is not configured in Ethernet mode");
1081                         err = EINVAL;
1082                         goto error;
1083                 }
1084         } else if (nl_rdma >= 0) {
1085                 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1086                 err = mlx5_nl_port_state(nl_rdma,
1087                         spawn->phys_dev_name,
1088                         spawn->phys_port);
1089                 if (err < 0) {
1090                         DRV_LOG(INFO, "Failed to get netlink port state: %s",
1091                                 strerror(rte_errno));
1092                         err = -rte_errno;
1093                         goto error;
1094                 }
1095                 port_attr.state = (enum ibv_port_state)err;
1096         }
1097         if (port_attr.state != IBV_PORT_ACTIVE)
1098                 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1099                         mlx5_glue->port_state_str(port_attr.state),
1100                         port_attr.state);
1101         /* Allocate private eth device data. */
1102         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1103                            sizeof(*priv),
1104                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1105         if (priv == NULL) {
1106                 DRV_LOG(ERR, "priv allocation failure");
1107                 err = ENOMEM;
1108                 goto error;
1109         }
1110         priv->sh = sh;
1111         priv->dev_port = spawn->phys_port;
1112         priv->pci_dev = spawn->pci_dev;
1113         priv->mtu = RTE_ETHER_MTU;
1114         /* Some internal functions rely on Netlink sockets, open them now. */
1115         priv->nl_socket_rdma = nl_rdma;
1116         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1117         priv->representor = !!switch_info->representor;
1118         priv->master = !!switch_info->master;
1119         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1120         priv->vport_meta_tag = 0;
1121         priv->vport_meta_mask = 0;
1122         priv->pf_bond = spawn->pf_bond;
1123
1124         DRV_LOG(DEBUG,
1125                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1126                 priv->dev_port, dpdk_dev->bus->name,
1127                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1128                 priv->master, priv->representor, priv->pf_bond);
1129
1130         /*
1131          * If we have E-Switch we should determine the vport attributes.
1132          * E-Switch may use either source vport field or reg_c[0] metadata
1133          * register to match on vport index. The engaged part of metadata
1134          * register is defined by mask.
1135          */
1136         if (switch_info->representor || switch_info->master) {
1137                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1138                                                  spawn->phys_port,
1139                                                  &vport_info);
1140                 if (err) {
1141                         DRV_LOG(WARNING,
1142                                 "Cannot query devx port %d on device %s",
1143                                 spawn->phys_port, spawn->phys_dev_name);
1144                         vport_info.query_flags = 0;
1145                 }
1146         }
1147         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1148                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1149                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1150                 if (!priv->vport_meta_mask) {
1151                         DRV_LOG(ERR,
1152                                 "vport zero mask for port %d on bonding device %s",
1153                                 spawn->phys_port, spawn->phys_dev_name);
1154                         err = ENOTSUP;
1155                         goto error;
1156                 }
1157                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1158                         DRV_LOG(ERR,
1159                                 "Invalid vport tag for port %d on bonding device %s",
1160                                 spawn->phys_port, spawn->phys_dev_name);
1161                         err = ENOTSUP;
1162                         goto error;
1163                 }
1164         }
1165         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1166                 priv->vport_id = vport_info.vport_id;
1167         } else if (spawn->pf_bond >= 0 &&
1168                    (switch_info->representor || switch_info->master)) {
1169                 DRV_LOG(ERR,
1170                         "Cannot deduce vport index for port %d on bonding device %s",
1171                         spawn->phys_port, spawn->phys_dev_name);
1172                 err = ENOTSUP;
1173                 goto error;
1174         } else {
1175                 /*
1176                  * Suppose vport index in compatible way. Kernel/rdma_core
1177                  * support single E-Switch per PF configurations only and
1178                  * vport_id field contains the vport index for associated VF,
1179                  * which is deduced from representor port name.
1180                  * For example, let's have the IB device port 10, it has
1181                  * attached network device eth0, which has port name attribute
1182                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1183                  * as 3 (2+1). This assigning schema should be changed if the
1184                  * multiple E-Switch instances per PF configurations or/and PCI
1185                  * subfunctions are added.
1186                  */
1187                 priv->vport_id = switch_info->representor ?
1188                                  switch_info->port_name + 1 : -1;
1189         }
1190         priv->representor_id = mlx5_representor_id_encode(switch_info,
1191                                                           eth_da->type);
1192         /*
1193          * Look for sibling devices in order to reuse their switch domain
1194          * if any, otherwise allocate one.
1195          */
1196         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1197                 const struct mlx5_priv *opriv =
1198                         rte_eth_devices[port_id].data->dev_private;
1199
1200                 if (!opriv ||
1201                     opriv->sh != priv->sh ||
1202                         opriv->domain_id ==
1203                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1204                         continue;
1205                 priv->domain_id = opriv->domain_id;
1206                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1207                         priv->dev_port, priv->domain_id);
1208                 break;
1209         }
1210         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1211                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1212                 if (err) {
1213                         err = rte_errno;
1214                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1215                                 strerror(rte_errno));
1216                         goto error;
1217                 }
1218                 own_domain_id = 1;
1219                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1220                         priv->dev_port, priv->domain_id);
1221         }
1222         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1223                             IBV_DEVICE_RAW_IP_CSUM);
1224         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1225                 (config->hw_csum ? "" : "not "));
1226 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1227         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1228         DRV_LOG(DEBUG, "counters are not supported");
1229 #endif
1230         config->ind_table_max_size =
1231                 sh->device_attr.max_rwq_indirection_table_size;
1232         /*
1233          * Remove this check once DPDK supports larger/variable
1234          * indirection tables.
1235          */
1236         if (config->ind_table_max_size > (unsigned int)RTE_ETH_RSS_RETA_SIZE_512)
1237                 config->ind_table_max_size = RTE_ETH_RSS_RETA_SIZE_512;
1238         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1239                 config->ind_table_max_size);
1240         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1241                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1242         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1243                 (config->hw_vlan_strip ? "" : "not "));
1244         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1245                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1246 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1247         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1248 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1249         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1250                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1251 #endif
1252         if (config->hw_padding && !hw_padding) {
1253                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1254                 config->hw_padding = 0;
1255         } else if (config->hw_padding) {
1256                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1257         }
1258         config->tso = (sh->device_attr.max_tso > 0 &&
1259                       (sh->device_attr.tso_supported_qpts &
1260                        (1 << IBV_QPT_RAW_PACKET)));
1261         if (config->tso)
1262                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1263         /*
1264          * MPW is disabled by default, while the Enhanced MPW is enabled
1265          * by default.
1266          */
1267         if (config->mps == MLX5_ARG_UNSET)
1268                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1269                                                           MLX5_MPW_DISABLED;
1270         else
1271                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1272         DRV_LOG(INFO, "%sMPS is %s",
1273                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1274                 config->mps == MLX5_MPW ? "legacy " : "",
1275                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1276         if (sh->cdev->config.devx) {
1277                 sh->steering_format_version = hca_attr->steering_format_version;
1278                 /* Check for LRO support. */
1279                 if (config->dest_tir && hca_attr->lro_cap &&
1280                     config->dv_flow_en) {
1281                         /* TBD check tunnel lro caps. */
1282                         config->lro.supported = hca_attr->lro_cap;
1283                         DRV_LOG(DEBUG, "Device supports LRO");
1284                         /*
1285                          * If LRO timeout is not configured by application,
1286                          * use the minimal supported value.
1287                          */
1288                         if (!config->lro.timeout)
1289                                 config->lro.timeout =
1290                                        hca_attr->lro_timer_supported_periods[0];
1291                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1292                                 config->lro.timeout);
1293                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1294                                 "required for coalescing is %d bytes",
1295                                 hca_attr->lro_min_mss_size);
1296                 }
1297 #if defined(HAVE_MLX5DV_DR) && \
1298         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1299          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1300                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1301                     config->dv_flow_en) {
1302                         uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
1303                         /*
1304                          * Meter needs two REG_C's for color match and pre-sfx
1305                          * flow match. Here get the REG_C for color match.
1306                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1307                          */
1308                         reg_c_mask &= 0xfc;
1309                         if (__builtin_popcount(reg_c_mask) < 1) {
1310                                 priv->mtr_en = 0;
1311                                 DRV_LOG(WARNING, "No available register for"
1312                                         " meter.");
1313                         } else {
1314                                 /*
1315                                  * The meter color register is used by the
1316                                  * flow-hit feature as well.
1317                                  * The flow-hit feature must use REG_C_3
1318                                  * Prefer REG_C_3 if it is available.
1319                                  */
1320                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1321                                         priv->mtr_color_reg = REG_C_3;
1322                                 else
1323                                         priv->mtr_color_reg = ffs(reg_c_mask)
1324                                                               - 1 + REG_C_0;
1325                                 priv->mtr_en = 1;
1326                                 priv->mtr_reg_share = hca_attr->qos.flow_meter;
1327                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1328                                         priv->mtr_color_reg);
1329                         }
1330                 }
1331                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1332                         uint32_t log_obj_size =
1333                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1334                         if (log_obj_size >=
1335                             hca_attr->qos.log_meter_aso_granularity &&
1336                             log_obj_size <=
1337                             hca_attr->qos.log_meter_aso_max_alloc)
1338                                 sh->meter_aso_en = 1;
1339                 }
1340                 if (priv->mtr_en) {
1341                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1342                         if (err) {
1343                                 err = -err;
1344                                 goto error;
1345                         }
1346                 }
1347                 if (hca_attr->flow.tunnel_header_0_1)
1348                         sh->tunnel_header_0_1 = 1;
1349 #endif
1350 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1351                 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
1352                         sh->flow_hit_aso_en = 1;
1353                         err = mlx5_flow_aso_age_mng_init(sh);
1354                         if (err) {
1355                                 err = -err;
1356                                 goto error;
1357                         }
1358                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1359                 }
1360 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1361 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1362         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1363                 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
1364                         err = mlx5_flow_aso_ct_mng_init(sh);
1365                         if (err) {
1366                                 err = -err;
1367                                 goto error;
1368                         }
1369                         DRV_LOG(DEBUG, "CT ASO is supported.");
1370                         sh->ct_aso_en = 1;
1371                 }
1372 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1373 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1374                 if (hca_attr->log_max_ft_sampler_num > 0  &&
1375                     config->dv_flow_en) {
1376                         priv->sampler_en = 1;
1377                         DRV_LOG(DEBUG, "Sampler enabled!");
1378                 } else {
1379                         priv->sampler_en = 0;
1380                         if (!hca_attr->log_max_ft_sampler_num)
1381                                 DRV_LOG(WARNING,
1382                                         "No available register for sampler.");
1383                         else
1384                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1385                 }
1386 #endif
1387         }
1388         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1389             !(sh->device_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1390                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1391                 config->cqe_comp = 0;
1392         }
1393         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1394             (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_flow_tag)) {
1395                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1396                                  " format isn't supported.");
1397                 config->cqe_comp = 0;
1398         }
1399         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1400             (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_l3_l4_tag)) {
1401                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1402                                  " format isn't supported.");
1403                 config->cqe_comp = 0;
1404         }
1405         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1406                         config->cqe_comp ? "" : "not ");
1407         if (config->tx_pp) {
1408                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1409                         hca_attr->dev_freq_khz);
1410                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1411                         hca_attr->qos.packet_pacing ? "" : "not ");
1412                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1413                         hca_attr->cross_channel ? "" : "not ");
1414                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1415                         hca_attr->wqe_index_ignore ? "" : "not ");
1416                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1417                         hca_attr->non_wire_sq ? "" : "not ");
1418                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1419                         hca_attr->log_max_static_sq_wq ? "" : "not ",
1420                         hca_attr->log_max_static_sq_wq);
1421                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1422                         hca_attr->qos.wqe_rate_pp ? "" : "not ");
1423                 if (!sh->cdev->config.devx) {
1424                         DRV_LOG(ERR, "DevX is required for packet pacing");
1425                         err = ENODEV;
1426                         goto error;
1427                 }
1428                 if (!hca_attr->qos.packet_pacing) {
1429                         DRV_LOG(ERR, "Packet pacing is not supported");
1430                         err = ENODEV;
1431                         goto error;
1432                 }
1433                 if (!hca_attr->cross_channel) {
1434                         DRV_LOG(ERR, "Cross channel operations are"
1435                                      " required for packet pacing");
1436                         err = ENODEV;
1437                         goto error;
1438                 }
1439                 if (!hca_attr->wqe_index_ignore) {
1440                         DRV_LOG(ERR, "WQE index ignore feature is"
1441                                      " required for packet pacing");
1442                         err = ENODEV;
1443                         goto error;
1444                 }
1445                 if (!hca_attr->non_wire_sq) {
1446                         DRV_LOG(ERR, "Non-wire SQ feature is"
1447                                      " required for packet pacing");
1448                         err = ENODEV;
1449                         goto error;
1450                 }
1451                 if (!hca_attr->log_max_static_sq_wq) {
1452                         DRV_LOG(ERR, "Static WQE SQ feature is"
1453                                      " required for packet pacing");
1454                         err = ENODEV;
1455                         goto error;
1456                 }
1457                 if (!hca_attr->qos.wqe_rate_pp) {
1458                         DRV_LOG(ERR, "WQE rate mode is required"
1459                                      " for packet pacing");
1460                         err = ENODEV;
1461                         goto error;
1462                 }
1463 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1464                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1465                              " can't create queues for packet pacing");
1466                 err = ENODEV;
1467                 goto error;
1468 #endif
1469         }
1470         if (config->std_delay_drop || config->hp_delay_drop) {
1471                 if (!hca_attr->rq_delay_drop) {
1472                         config->std_delay_drop = 0;
1473                         config->hp_delay_drop = 0;
1474                         DRV_LOG(WARNING,
1475                                 "dev_port-%u: Rxq delay drop is not supported",
1476                                 priv->dev_port);
1477                 }
1478         }
1479         if (sh->cdev->config.devx)
1480                 mlx5_rt_timestamp_config(sh, config, hca_attr);
1481         /*
1482          * If HW has bug working with tunnel packet decapsulation and
1483          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1484          * bit. Then RTE_ETH_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1485          */
1486         if (hca_attr->scatter_fcs_w_decap_disable && config->decap_en)
1487                 config->hw_fcs_strip = 0;
1488         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1489                 (config->hw_fcs_strip ? "" : "not "));
1490         if (config->mprq.enabled && !mprq) {
1491                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1492                 config->mprq.enabled = 0;
1493         }
1494         if (config->max_dump_files_num == 0)
1495                 config->max_dump_files_num = 128;
1496         eth_dev = rte_eth_dev_allocate(name);
1497         if (eth_dev == NULL) {
1498                 DRV_LOG(ERR, "can not allocate rte ethdev");
1499                 err = ENOMEM;
1500                 goto error;
1501         }
1502         if (priv->representor) {
1503                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1504                 eth_dev->data->representor_id = priv->representor_id;
1505                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1506                         struct mlx5_priv *opriv =
1507                                 rte_eth_devices[port_id].data->dev_private;
1508                         if (opriv &&
1509                             opriv->master &&
1510                             opriv->domain_id == priv->domain_id &&
1511                             opriv->sh == priv->sh) {
1512                                 eth_dev->data->backer_port_id = port_id;
1513                                 break;
1514                         }
1515                 }
1516                 if (port_id >= RTE_MAX_ETHPORTS)
1517                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1518         }
1519         priv->mp_id.port_id = eth_dev->data->port_id;
1520         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1521         /*
1522          * Store associated network device interface index. This index
1523          * is permanent throughout the lifetime of device. So, we may store
1524          * the ifindex here and use the cached value further.
1525          */
1526         MLX5_ASSERT(spawn->ifindex);
1527         priv->if_index = spawn->ifindex;
1528         priv->lag_affinity_idx = sh->refcnt - 1;
1529         eth_dev->data->dev_private = priv;
1530         priv->dev_data = eth_dev->data;
1531         eth_dev->data->mac_addrs = priv->mac;
1532         eth_dev->device = dpdk_dev;
1533         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1534         /* Configure the first MAC address by default. */
1535         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1536                 DRV_LOG(ERR,
1537                         "port %u cannot get MAC address, is mlx5_en"
1538                         " loaded? (errno: %s)",
1539                         eth_dev->data->port_id, strerror(rte_errno));
1540                 err = ENODEV;
1541                 goto error;
1542         }
1543         DRV_LOG(INFO,
1544                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1545                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1546 #ifdef RTE_LIBRTE_MLX5_DEBUG
1547         {
1548                 char ifname[MLX5_NAMESIZE];
1549
1550                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1551                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1552                                 eth_dev->data->port_id, ifname);
1553                 else
1554                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1555                                 eth_dev->data->port_id);
1556         }
1557 #endif
1558         /* Get actual MTU if possible. */
1559         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1560         if (err) {
1561                 err = rte_errno;
1562                 goto error;
1563         }
1564         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1565                 priv->mtu);
1566         /* Initialize burst functions to prevent crashes before link-up. */
1567         eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1568         eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1569         eth_dev->dev_ops = &mlx5_dev_ops;
1570         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1571         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1572         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1573         /* Register MAC address. */
1574         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1575         if (config->vf && config->vf_nl_en)
1576                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1577                                       mlx5_ifindex(eth_dev),
1578                                       eth_dev->data->mac_addrs,
1579                                       MLX5_MAX_MAC_ADDRESSES);
1580         priv->ctrl_flows = 0;
1581         rte_spinlock_init(&priv->flow_list_lock);
1582         TAILQ_INIT(&priv->flow_meters);
1583         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1584         if (!priv->mtr_profile_tbl)
1585                 goto error;
1586         /* Bring Ethernet device up. */
1587         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1588                 eth_dev->data->port_id);
1589         mlx5_set_link_up(eth_dev);
1590         /*
1591          * Even though the interrupt handler is not installed yet,
1592          * interrupts will still trigger on the async_fd from
1593          * Verbs context returned by ibv_open_device().
1594          */
1595         mlx5_link_update(eth_dev, 0);
1596         /* Detect minimal data bytes to inline. */
1597         mlx5_set_min_inline(spawn, config);
1598         /* Store device configuration on private structure. */
1599         priv->config = *config;
1600         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1601                 icfg[i].release_mem_en = !!config->reclaim_mode;
1602                 if (config->reclaim_mode)
1603                         icfg[i].per_core_cache = 0;
1604                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1605                 if (!priv->flows[i])
1606                         goto error;
1607         }
1608         /* Create context for virtual machine VLAN workaround. */
1609         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1610         if (config->dv_flow_en) {
1611                 err = mlx5_alloc_shared_dr(priv);
1612                 if (err)
1613                         goto error;
1614                 if (mlx5_flex_item_port_init(eth_dev) < 0)
1615                         goto error;
1616         }
1617         if (sh->cdev->config.devx && config->dv_flow_en && config->dest_tir) {
1618                 priv->obj_ops = devx_obj_ops;
1619                 mlx5_queue_counter_id_prepare(eth_dev);
1620                 priv->obj_ops.lb_dummy_queue_create =
1621                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1622                 priv->obj_ops.lb_dummy_queue_release =
1623                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1624         } else if (spawn->max_port > UINT8_MAX) {
1625                 /* Verbs can't support ports larger than 255 by design. */
1626                 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1627                 err = ENOTSUP;
1628                 goto error;
1629         } else {
1630                 priv->obj_ops = ibv_obj_ops;
1631         }
1632         if (config->tx_pp &&
1633             priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1634                 /*
1635                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1636                  * packet pacing and already checked above.
1637                  * Hence, we should only make sure the SQs will be created
1638                  * with DevX, not with Verbs.
1639                  * Verbs allocates the SQ UAR on its own and it can't be shared
1640                  * with Clock Queue UAR as required for Tx scheduling.
1641                  */
1642                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1643                 err = ENODEV;
1644                 goto error;
1645         }
1646         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1647         if (!priv->drop_queue.hrxq)
1648                 goto error;
1649         /* Port representor shares the same max priority with pf port. */
1650         if (!priv->sh->flow_priority_check_flag) {
1651                 /* Supported Verbs flow priority number detection. */
1652                 err = mlx5_flow_discover_priorities(eth_dev);
1653                 priv->sh->flow_max_priority = err;
1654                 priv->sh->flow_priority_check_flag = 1;
1655         } else {
1656                 err = priv->sh->flow_max_priority;
1657         }
1658         if (err < 0) {
1659                 err = -err;
1660                 goto error;
1661         }
1662         mlx5_set_metadata_mask(eth_dev);
1663         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1664             !priv->sh->dv_regc0_mask) {
1665                 DRV_LOG(ERR, "metadata mode %u is not supported "
1666                              "(no metadata reg_c[0] is available)",
1667                              priv->config.dv_xmeta_en);
1668                         err = ENOTSUP;
1669                         goto error;
1670         }
1671         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1672                                        mlx5_hrxq_create_cb,
1673                                        mlx5_hrxq_match_cb,
1674                                        mlx5_hrxq_remove_cb,
1675                                        mlx5_hrxq_clone_cb,
1676                                        mlx5_hrxq_clone_free_cb);
1677         if (!priv->hrxqs)
1678                 goto error;
1679         rte_rwlock_init(&priv->ind_tbls_lock);
1680         /* Query availability of metadata reg_c's. */
1681         if (!priv->sh->metadata_regc_check_flag) {
1682                 err = mlx5_flow_discover_mreg_c(eth_dev);
1683                 if (err < 0) {
1684                         err = -err;
1685                         goto error;
1686                 }
1687         }
1688         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1689                 DRV_LOG(DEBUG,
1690                         "port %u extensive metadata register is not supported",
1691                         eth_dev->data->port_id);
1692                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1693                         DRV_LOG(ERR, "metadata mode %u is not supported "
1694                                      "(no metadata registers available)",
1695                                      priv->config.dv_xmeta_en);
1696                         err = ENOTSUP;
1697                         goto error;
1698                 }
1699         }
1700         if (priv->config.dv_flow_en &&
1701             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1702             mlx5_flow_ext_mreg_supported(eth_dev) &&
1703             priv->sh->dv_regc0_mask) {
1704                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1705                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1706                                                       false, true, eth_dev,
1707                                                       flow_dv_mreg_create_cb,
1708                                                       flow_dv_mreg_match_cb,
1709                                                       flow_dv_mreg_remove_cb,
1710                                                       flow_dv_mreg_clone_cb,
1711                                                     flow_dv_mreg_clone_free_cb);
1712                 if (!priv->mreg_cp_tbl) {
1713                         err = ENOMEM;
1714                         goto error;
1715                 }
1716         }
1717         rte_spinlock_init(&priv->shared_act_sl);
1718         mlx5_flow_counter_mode_config(eth_dev);
1719         mlx5_flow_drop_action_config(eth_dev);
1720         if (priv->config.dv_flow_en)
1721                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1722         return eth_dev;
1723 error:
1724         if (priv) {
1725                 if (priv->mreg_cp_tbl)
1726                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1727                 if (priv->sh)
1728                         mlx5_os_free_shared_dr(priv);
1729                 if (priv->nl_socket_route >= 0)
1730                         close(priv->nl_socket_route);
1731                 if (priv->vmwa_context)
1732                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1733                 if (eth_dev && priv->drop_queue.hrxq)
1734                         mlx5_drop_action_destroy(eth_dev);
1735                 if (priv->mtr_profile_tbl)
1736                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1737                 if (own_domain_id)
1738                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1739                 if (priv->hrxqs)
1740                         mlx5_list_destroy(priv->hrxqs);
1741                 if (eth_dev && priv->flex_item_map)
1742                         mlx5_flex_item_port_cleanup(eth_dev);
1743                 mlx5_free(priv);
1744                 if (eth_dev != NULL)
1745                         eth_dev->data->dev_private = NULL;
1746         }
1747         if (eth_dev != NULL) {
1748                 /* mac_addrs must not be freed alone because part of
1749                  * dev_private
1750                  **/
1751                 eth_dev->data->mac_addrs = NULL;
1752                 rte_eth_dev_release_port(eth_dev);
1753         }
1754         if (sh)
1755                 mlx5_free_shared_dev_ctx(sh);
1756         if (nl_rdma >= 0)
1757                 close(nl_rdma);
1758         MLX5_ASSERT(err > 0);
1759         rte_errno = err;
1760         return NULL;
1761 }
1762
1763 /**
1764  * Comparison callback to sort device data.
1765  *
1766  * This is meant to be used with qsort().
1767  *
1768  * @param a[in]
1769  *   Pointer to pointer to first data object.
1770  * @param b[in]
1771  *   Pointer to pointer to second data object.
1772  *
1773  * @return
1774  *   0 if both objects are equal, less than 0 if the first argument is less
1775  *   than the second, greater than 0 otherwise.
1776  */
1777 static int
1778 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1779 {
1780         const struct mlx5_switch_info *si_a =
1781                 &((const struct mlx5_dev_spawn_data *)a)->info;
1782         const struct mlx5_switch_info *si_b =
1783                 &((const struct mlx5_dev_spawn_data *)b)->info;
1784         int ret;
1785
1786         /* Master device first. */
1787         ret = si_b->master - si_a->master;
1788         if (ret)
1789                 return ret;
1790         /* Then representor devices. */
1791         ret = si_b->representor - si_a->representor;
1792         if (ret)
1793                 return ret;
1794         /* Unidentified devices come last in no specific order. */
1795         if (!si_a->representor)
1796                 return 0;
1797         /* Order representors by name. */
1798         return si_a->port_name - si_b->port_name;
1799 }
1800
1801 /**
1802  * Match PCI information for possible slaves of bonding device.
1803  *
1804  * @param[in] ibdev_name
1805  *   Name of Infiniband device.
1806  * @param[in] pci_dev
1807  *   Pointer to primary PCI address structure to match.
1808  * @param[in] nl_rdma
1809  *   Netlink RDMA group socket handle.
1810  * @param[in] owner
1811  *   Representor owner PF index.
1812  * @param[out] bond_info
1813  *   Pointer to bonding information.
1814  *
1815  * @return
1816  *   negative value if no bonding device found, otherwise
1817  *   positive index of slave PF in bonding.
1818  */
1819 static int
1820 mlx5_device_bond_pci_match(const char *ibdev_name,
1821                            const struct rte_pci_addr *pci_dev,
1822                            int nl_rdma, uint16_t owner,
1823                            struct mlx5_bond_info *bond_info)
1824 {
1825         char ifname[IF_NAMESIZE + 1];
1826         unsigned int ifindex;
1827         unsigned int np, i;
1828         FILE *bond_file = NULL, *file;
1829         int pf = -1;
1830         int ret;
1831         uint8_t cur_guid[32] = {0};
1832         uint8_t guid[32] = {0};
1833
1834         /*
1835          * Try to get master device name. If something goes wrong suppose
1836          * the lack of kernel support and no bonding devices.
1837          */
1838         memset(bond_info, 0, sizeof(*bond_info));
1839         if (nl_rdma < 0)
1840                 return -1;
1841         if (!strstr(ibdev_name, "bond"))
1842                 return -1;
1843         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1844         if (!np)
1845                 return -1;
1846         if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
1847                 return -1;
1848         /*
1849          * The master device might not be on the predefined port(not on port
1850          * index 1, it is not guaranteed), we have to scan all Infiniband
1851          * device ports and find master.
1852          */
1853         for (i = 1; i <= np; ++i) {
1854                 /* Check whether Infiniband port is populated. */
1855                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1856                 if (!ifindex)
1857                         continue;
1858                 if (!if_indextoname(ifindex, ifname))
1859                         continue;
1860                 /* Try to read bonding slave names from sysfs. */
1861                 MKSTR(slaves,
1862                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1863                 bond_file = fopen(slaves, "r");
1864                 if (bond_file)
1865                         break;
1866         }
1867         if (!bond_file)
1868                 return -1;
1869         /* Use safe format to check maximal buffer length. */
1870         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1871         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1872                 char tmp_str[IF_NAMESIZE + 32];
1873                 struct rte_pci_addr pci_addr;
1874                 struct mlx5_switch_info info;
1875                 int ret;
1876
1877                 /* Process slave interface names in the loop. */
1878                 snprintf(tmp_str, sizeof(tmp_str),
1879                          "/sys/class/net/%s", ifname);
1880                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1881                         DRV_LOG(WARNING,
1882                                 "Cannot get PCI address for netdev \"%s\".",
1883                                 ifname);
1884                         continue;
1885                 }
1886                 /* Slave interface PCI address match found. */
1887                 snprintf(tmp_str, sizeof(tmp_str),
1888                          "/sys/class/net/%s/phys_port_name", ifname);
1889                 file = fopen(tmp_str, "rb");
1890                 if (!file)
1891                         break;
1892                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1893                 if (fscanf(file, "%32s", tmp_str) == 1)
1894                         mlx5_translate_port_name(tmp_str, &info);
1895                 fclose(file);
1896                 /* Only process PF ports. */
1897                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1898                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1899                         continue;
1900                 /* Check max bonding member. */
1901                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1902                         DRV_LOG(WARNING, "bonding index out of range, "
1903                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1904                                 tmp_str);
1905                         break;
1906                 }
1907                 /* Get ifindex. */
1908                 snprintf(tmp_str, sizeof(tmp_str),
1909                          "/sys/class/net/%s/ifindex", ifname);
1910                 file = fopen(tmp_str, "rb");
1911                 if (!file)
1912                         break;
1913                 ret = fscanf(file, "%u", &ifindex);
1914                 fclose(file);
1915                 if (ret != 1)
1916                         break;
1917                 /* Save bonding info. */
1918                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1919                         sizeof(bond_info->ports[0].ifname));
1920                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1921                 bond_info->ports[info.port_name].ifindex = ifindex;
1922                 bond_info->n_port++;
1923                 /*
1924                  * Under socket direct mode, bonding will use
1925                  * system_image_guid as identification.
1926                  * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
1927                  * All bonding members should have the same guid even if driver
1928                  * is using PCIe BDF.
1929                  */
1930                 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
1931                 if (ret < 0)
1932                         break;
1933                 else if (ret > 0) {
1934                         if (!memcmp(guid, cur_guid, sizeof(guid)) &&
1935                             owner == info.port_name &&
1936                             (owner != 0 || (owner == 0 &&
1937                             !rte_pci_addr_cmp(pci_dev, &pci_addr))))
1938                                 pf = info.port_name;
1939                 } else if (pci_dev->domain == pci_addr.domain &&
1940                     pci_dev->bus == pci_addr.bus &&
1941                     pci_dev->devid == pci_addr.devid &&
1942                     ((pci_dev->function == 0 &&
1943                       pci_dev->function + owner == pci_addr.function) ||
1944                      (pci_dev->function == owner &&
1945                       pci_addr.function == owner)))
1946                         pf = info.port_name;
1947         }
1948         if (pf >= 0) {
1949                 /* Get bond interface info */
1950                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1951                                            bond_info->ifname);
1952                 if (ret)
1953                         DRV_LOG(ERR, "unable to get bond info: %s",
1954                                 strerror(rte_errno));
1955                 else
1956                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1957                                 ifindex, bond_info->ifindex, bond_info->ifname);
1958         }
1959         if (owner == 0 && pf != 0) {
1960                 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner",
1961                                 pci_dev->domain, pci_dev->bus, pci_dev->devid,
1962                                 pci_dev->function);
1963         }
1964         return pf;
1965 }
1966
1967 static void
1968 mlx5_os_config_default(struct mlx5_dev_config *config,
1969                        struct mlx5_common_dev_config *cconf)
1970 {
1971         memset(config, 0, sizeof(*config));
1972         config->mps = MLX5_ARG_UNSET;
1973         config->cqe_comp = 1;
1974         config->rx_vec_en = 1;
1975         config->txq_inline_max = MLX5_ARG_UNSET;
1976         config->txq_inline_min = MLX5_ARG_UNSET;
1977         config->txq_inline_mpw = MLX5_ARG_UNSET;
1978         config->txqs_inline = MLX5_ARG_UNSET;
1979         config->vf_nl_en = 1;
1980         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1981         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1982         config->mprq.log_min_stride_wqe_size = cconf->devx ?
1983                                         cconf->hca_attr.log_min_stride_wqe_sz :
1984                                         MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
1985         config->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
1986         config->dv_esw_en = 1;
1987         config->dv_flow_en = 1;
1988         config->decap_en = 1;
1989         config->log_hp_size = MLX5_ARG_UNSET;
1990         config->allow_duplicate_pattern = 1;
1991         config->std_delay_drop = 0;
1992         config->hp_delay_drop = 0;
1993 }
1994
1995 /**
1996  * Register a PCI device within bonding.
1997  *
1998  * This function spawns Ethernet devices out of a given PCI device and
1999  * bonding owner PF index.
2000  *
2001  * @param[in] cdev
2002  *   Pointer to common mlx5 device structure.
2003  * @param[in] req_eth_da
2004  *   Requested ethdev device argument.
2005  * @param[in] owner_id
2006  *   Requested owner PF port ID within bonding device, default to 0.
2007  *
2008  * @return
2009  *   0 on success, a negative errno value otherwise and rte_errno is set.
2010  */
2011 static int
2012 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2013                      struct rte_eth_devargs *req_eth_da,
2014                      uint16_t owner_id)
2015 {
2016         struct ibv_device **ibv_list;
2017         /*
2018          * Number of found IB Devices matching with requested PCI BDF.
2019          * nd != 1 means there are multiple IB devices over the same
2020          * PCI device and we have representors and master.
2021          */
2022         unsigned int nd = 0;
2023         /*
2024          * Number of found IB device Ports. nd = 1 and np = 1..n means
2025          * we have the single multiport IB device, and there may be
2026          * representors attached to some of found ports.
2027          */
2028         unsigned int np = 0;
2029         /*
2030          * Number of DPDK ethernet devices to Spawn - either over
2031          * multiple IB devices or multiple ports of single IB device.
2032          * Actually this is the number of iterations to spawn.
2033          */
2034         unsigned int ns = 0;
2035         /*
2036          * Bonding device
2037          *   < 0 - no bonding device (single one)
2038          *  >= 0 - bonding device (value is slave PF index)
2039          */
2040         int bd = -1;
2041         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2042         struct mlx5_dev_spawn_data *list = NULL;
2043         struct mlx5_dev_config dev_config;
2044         struct rte_eth_devargs eth_da = *req_eth_da;
2045         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2046         struct mlx5_bond_info bond_info;
2047         int ret = -1;
2048
2049         errno = 0;
2050         ibv_list = mlx5_glue->get_device_list(&ret);
2051         if (!ibv_list) {
2052                 rte_errno = errno ? errno : ENOSYS;
2053                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2054                 return -rte_errno;
2055         }
2056         /*
2057          * First scan the list of all Infiniband devices to find
2058          * matching ones, gathering into the list.
2059          */
2060         struct ibv_device *ibv_match[ret + 1];
2061         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2062         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2063         unsigned int i;
2064
2065         while (ret-- > 0) {
2066                 struct rte_pci_addr pci_addr;
2067
2068                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2069                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2070                                                 nl_rdma, owner_id, &bond_info);
2071                 if (bd >= 0) {
2072                         /*
2073                          * Bonding device detected. Only one match is allowed,
2074                          * the bonding is supported over multi-port IB device,
2075                          * there should be no matches on representor PCI
2076                          * functions or non VF LAG bonding devices with
2077                          * specified address.
2078                          */
2079                         if (nd) {
2080                                 DRV_LOG(ERR,
2081                                         "multiple PCI match on bonding device"
2082                                         "\"%s\" found", ibv_list[ret]->name);
2083                                 rte_errno = ENOENT;
2084                                 ret = -rte_errno;
2085                                 goto exit;
2086                         }
2087                         /* Amend owner pci address if owner PF ID specified. */
2088                         if (eth_da.nb_representor_ports)
2089                                 owner_pci.function += owner_id;
2090                         DRV_LOG(INFO,
2091                                 "PCI information matches for slave %d bonding device \"%s\"",
2092                                 bd, ibv_list[ret]->name);
2093                         ibv_match[nd++] = ibv_list[ret];
2094                         break;
2095                 } else {
2096                         /* Bonding device not found. */
2097                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2098                                               &pci_addr))
2099                                 continue;
2100                         if (owner_pci.domain != pci_addr.domain ||
2101                             owner_pci.bus != pci_addr.bus ||
2102                             owner_pci.devid != pci_addr.devid ||
2103                             owner_pci.function != pci_addr.function)
2104                                 continue;
2105                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2106                                 ibv_list[ret]->name);
2107                         ibv_match[nd++] = ibv_list[ret];
2108                 }
2109         }
2110         ibv_match[nd] = NULL;
2111         if (!nd) {
2112                 /* No device matches, just complain and bail out. */
2113                 DRV_LOG(WARNING,
2114                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2115                         " are kernel drivers loaded?",
2116                         owner_pci.domain, owner_pci.bus,
2117                         owner_pci.devid, owner_pci.function);
2118                 rte_errno = ENOENT;
2119                 ret = -rte_errno;
2120                 goto exit;
2121         }
2122         if (nd == 1) {
2123                 /*
2124                  * Found single matching device may have multiple ports.
2125                  * Each port may be representor, we have to check the port
2126                  * number and check the representors existence.
2127                  */
2128                 if (nl_rdma >= 0)
2129                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2130                 if (!np)
2131                         DRV_LOG(WARNING,
2132                                 "Cannot get IB device \"%s\" ports number.",
2133                                 ibv_match[0]->name);
2134                 if (bd >= 0 && !np) {
2135                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2136                         rte_errno = ENOENT;
2137                         ret = -rte_errno;
2138                         goto exit;
2139                 }
2140         }
2141         /* Now we can determine the maximal amount of devices to be spawned. */
2142         list = mlx5_malloc(MLX5_MEM_ZERO,
2143                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2144                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2145         if (!list) {
2146                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2147                 rte_errno = ENOMEM;
2148                 ret = -rte_errno;
2149                 goto exit;
2150         }
2151         if (bd >= 0 || np > 1) {
2152                 /*
2153                  * Single IB device with multiple ports found,
2154                  * it may be E-Switch master device and representors.
2155                  * We have to perform identification through the ports.
2156                  */
2157                 MLX5_ASSERT(nl_rdma >= 0);
2158                 MLX5_ASSERT(ns == 0);
2159                 MLX5_ASSERT(nd == 1);
2160                 MLX5_ASSERT(np);
2161                 for (i = 1; i <= np; ++i) {
2162                         list[ns].bond_info = &bond_info;
2163                         list[ns].max_port = np;
2164                         list[ns].phys_port = i;
2165                         list[ns].phys_dev_name = ibv_match[0]->name;
2166                         list[ns].eth_dev = NULL;
2167                         list[ns].pci_dev = pci_dev;
2168                         list[ns].cdev = cdev;
2169                         list[ns].pf_bond = bd;
2170                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2171                                                            ibv_match[0]->name,
2172                                                            i);
2173                         if (!list[ns].ifindex) {
2174                                 /*
2175                                  * No network interface index found for the
2176                                  * specified port, it means there is no
2177                                  * representor on this port. It's OK,
2178                                  * there can be disabled ports, for example
2179                                  * if sriov_numvfs < sriov_totalvfs.
2180                                  */
2181                                 continue;
2182                         }
2183                         ret = -1;
2184                         if (nl_route >= 0)
2185                                 ret = mlx5_nl_switch_info(nl_route,
2186                                                           list[ns].ifindex,
2187                                                           &list[ns].info);
2188                         if (ret || (!list[ns].info.representor &&
2189                                     !list[ns].info.master)) {
2190                                 /*
2191                                  * We failed to recognize representors with
2192                                  * Netlink, let's try to perform the task
2193                                  * with sysfs.
2194                                  */
2195                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2196                                                              &list[ns].info);
2197                         }
2198                         if (!ret && bd >= 0) {
2199                                 switch (list[ns].info.name_type) {
2200                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2201                                         if (np == 1) {
2202                                                 /*
2203                                                  * Force standalone bonding
2204                                                  * device for ROCE LAG
2205                                                  * configurations.
2206                                                  */
2207                                                 list[ns].info.master = 0;
2208                                                 list[ns].info.representor = 0;
2209                                         }
2210                                         if (list[ns].info.port_name == bd)
2211                                                 ns++;
2212                                         break;
2213                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2214                                         /* Fallthrough */
2215                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2216                                         /* Fallthrough */
2217                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2218                                         if (list[ns].info.pf_num == bd)
2219                                                 ns++;
2220                                         break;
2221                                 default:
2222                                         break;
2223                                 }
2224                                 continue;
2225                         }
2226                         if (!ret && (list[ns].info.representor ^
2227                                      list[ns].info.master))
2228                                 ns++;
2229                 }
2230                 if (!ns) {
2231                         DRV_LOG(ERR,
2232                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2233                         rte_errno = ENOENT;
2234                         ret = -rte_errno;
2235                         goto exit;
2236                 }
2237         } else {
2238                 /*
2239                  * The existence of several matching entries (nd > 1) means
2240                  * port representors have been instantiated. No existing Verbs
2241                  * call nor sysfs entries can tell them apart, this can only
2242                  * be done through Netlink calls assuming kernel drivers are
2243                  * recent enough to support them.
2244                  *
2245                  * In the event of identification failure through Netlink,
2246                  * try again through sysfs, then:
2247                  *
2248                  * 1. A single IB device matches (nd == 1) with single
2249                  *    port (np=0/1) and is not a representor, assume
2250                  *    no switch support.
2251                  *
2252                  * 2. Otherwise no safe assumptions can be made;
2253                  *    complain louder and bail out.
2254                  */
2255                 for (i = 0; i != nd; ++i) {
2256                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2257                         list[ns].bond_info = NULL;
2258                         list[ns].max_port = 1;
2259                         list[ns].phys_port = 1;
2260                         list[ns].phys_dev_name = ibv_match[i]->name;
2261                         list[ns].eth_dev = NULL;
2262                         list[ns].pci_dev = pci_dev;
2263                         list[ns].cdev = cdev;
2264                         list[ns].pf_bond = -1;
2265                         list[ns].ifindex = 0;
2266                         if (nl_rdma >= 0)
2267                                 list[ns].ifindex = mlx5_nl_ifindex
2268                                                             (nl_rdma,
2269                                                              ibv_match[i]->name,
2270                                                              1);
2271                         if (!list[ns].ifindex) {
2272                                 char ifname[IF_NAMESIZE];
2273
2274                                 /*
2275                                  * Netlink failed, it may happen with old
2276                                  * ib_core kernel driver (before 4.16).
2277                                  * We can assume there is old driver because
2278                                  * here we are processing single ports IB
2279                                  * devices. Let's try sysfs to retrieve
2280                                  * the ifindex. The method works for
2281                                  * master device only.
2282                                  */
2283                                 if (nd > 1) {
2284                                         /*
2285                                          * Multiple devices found, assume
2286                                          * representors, can not distinguish
2287                                          * master/representor and retrieve
2288                                          * ifindex via sysfs.
2289                                          */
2290                                         continue;
2291                                 }
2292                                 ret = mlx5_get_ifname_sysfs
2293                                         (ibv_match[i]->ibdev_path, ifname);
2294                                 if (!ret)
2295                                         list[ns].ifindex =
2296                                                 if_nametoindex(ifname);
2297                                 if (!list[ns].ifindex) {
2298                                         /*
2299                                          * No network interface index found
2300                                          * for the specified device, it means
2301                                          * there it is neither representor
2302                                          * nor master.
2303                                          */
2304                                         continue;
2305                                 }
2306                         }
2307                         ret = -1;
2308                         if (nl_route >= 0)
2309                                 ret = mlx5_nl_switch_info(nl_route,
2310                                                           list[ns].ifindex,
2311                                                           &list[ns].info);
2312                         if (ret || (!list[ns].info.representor &&
2313                                     !list[ns].info.master)) {
2314                                 /*
2315                                  * We failed to recognize representors with
2316                                  * Netlink, let's try to perform the task
2317                                  * with sysfs.
2318                                  */
2319                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2320                                                              &list[ns].info);
2321                         }
2322                         if (!ret && (list[ns].info.representor ^
2323                                      list[ns].info.master)) {
2324                                 ns++;
2325                         } else if ((nd == 1) &&
2326                                    !list[ns].info.representor &&
2327                                    !list[ns].info.master) {
2328                                 /*
2329                                  * Single IB device with one physical port and
2330                                  * attached network device.
2331                                  * May be SRIOV is not enabled or there is no
2332                                  * representors.
2333                                  */
2334                                 DRV_LOG(INFO, "No E-Switch support detected.");
2335                                 ns++;
2336                                 break;
2337                         }
2338                 }
2339                 if (!ns) {
2340                         DRV_LOG(ERR,
2341                                 "Unable to recognize master/representors on the multiple IB devices.");
2342                         rte_errno = ENOENT;
2343                         ret = -rte_errno;
2344                         goto exit;
2345                 }
2346                 /*
2347                  * New kernels may add the switch_id attribute for the case
2348                  * there is no E-Switch and we wrongly recognized the only
2349                  * device as master. Override this if there is the single
2350                  * device with single port and new device name format present.
2351                  */
2352                 if (nd == 1 &&
2353                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2354                         list[0].info.master = 0;
2355                         list[0].info.representor = 0;
2356                 }
2357         }
2358         MLX5_ASSERT(ns);
2359         /*
2360          * Sort list to probe devices in natural order for users convenience
2361          * (i.e. master first, then representors from lowest to highest ID).
2362          */
2363         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2364         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2365                 /* Set devargs default values. */
2366                 if (eth_da.nb_mh_controllers == 0) {
2367                         eth_da.nb_mh_controllers = 1;
2368                         eth_da.mh_controllers[0] = 0;
2369                 }
2370                 if (eth_da.nb_ports == 0 && ns > 0) {
2371                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2372                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2373                                         pci_dev->device.devargs->args);
2374                         eth_da.nb_ports = 1;
2375                         eth_da.ports[0] = list[0].info.pf_num;
2376                 }
2377                 if (eth_da.nb_representor_ports == 0) {
2378                         eth_da.nb_representor_ports = 1;
2379                         eth_da.representor_ports[0] = 0;
2380                 }
2381         }
2382         for (i = 0; i != ns; ++i) {
2383                 uint32_t restore;
2384
2385                 /* Default configuration. */
2386                 mlx5_os_config_default(&dev_config, &cdev->config);
2387                 dev_config.vf = mlx5_dev_is_vf_pci(pci_dev);
2388                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2389                                                  &dev_config, &eth_da);
2390                 if (!list[i].eth_dev) {
2391                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2392                                 break;
2393                         /* Device is disabled or already spawned. Ignore it. */
2394                         continue;
2395                 }
2396                 restore = list[i].eth_dev->data->dev_flags;
2397                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2398                 /**
2399                  * Each representor has a dedicated interrupts vector.
2400                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2401                  * representor eth_dev object because representor and PF
2402                  * share the same PCI address.
2403                  * Override representor device with a dedicated
2404                  * interrupts handle here.
2405                  * Representor interrupts handle is released in mlx5_dev_stop().
2406                  */
2407                 if (list[i].info.representor) {
2408                         struct rte_intr_handle *intr_handle =
2409                                 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2410                         if (intr_handle == NULL) {
2411                                 DRV_LOG(ERR,
2412                                         "port %u failed to allocate memory for interrupt handler "
2413                                         "Rx interrupts will not be supported",
2414                                         i);
2415                                 rte_errno = ENOMEM;
2416                                 ret = -rte_errno;
2417                                 goto exit;
2418                         }
2419                         list[i].eth_dev->intr_handle = intr_handle;
2420                 }
2421                 /* Restore non-PCI flags cleared by the above call. */
2422                 list[i].eth_dev->data->dev_flags |= restore;
2423                 rte_eth_dev_probing_finish(list[i].eth_dev);
2424         }
2425         if (i != ns) {
2426                 DRV_LOG(ERR,
2427                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2428                         " encountering an error: %s",
2429                         owner_pci.domain, owner_pci.bus,
2430                         owner_pci.devid, owner_pci.function,
2431                         strerror(rte_errno));
2432                 ret = -rte_errno;
2433                 /* Roll back. */
2434                 while (i--) {
2435                         if (!list[i].eth_dev)
2436                                 continue;
2437                         mlx5_dev_close(list[i].eth_dev);
2438                         /* mac_addrs must not be freed because in dev_private */
2439                         list[i].eth_dev->data->mac_addrs = NULL;
2440                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2441                 }
2442                 /* Restore original error. */
2443                 rte_errno = -ret;
2444         } else {
2445                 ret = 0;
2446         }
2447 exit:
2448         /*
2449          * Do the routine cleanup:
2450          * - close opened Netlink sockets
2451          * - free allocated spawn data array
2452          * - free the Infiniband device list
2453          */
2454         if (nl_rdma >= 0)
2455                 close(nl_rdma);
2456         if (nl_route >= 0)
2457                 close(nl_route);
2458         if (list)
2459                 mlx5_free(list);
2460         MLX5_ASSERT(ibv_list);
2461         mlx5_glue->free_device_list(ibv_list);
2462         return ret;
2463 }
2464
2465 static int
2466 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2467                           struct rte_eth_devargs *eth_da)
2468 {
2469         int ret = 0;
2470
2471         if (dev->devargs == NULL)
2472                 return 0;
2473         memset(eth_da, 0, sizeof(*eth_da));
2474         /* Parse representor information first from class argument. */
2475         if (dev->devargs->cls_str)
2476                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2477         if (ret != 0) {
2478                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2479                         dev->devargs->cls_str);
2480                 return -rte_errno;
2481         }
2482         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2483                 /* Parse legacy device argument */
2484                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2485                 if (ret) {
2486                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2487                                 dev->devargs->args);
2488                         return -rte_errno;
2489                 }
2490         }
2491         return 0;
2492 }
2493
2494 /**
2495  * Callback to register a PCI device.
2496  *
2497  * This function spawns Ethernet devices out of a given PCI device.
2498  *
2499  * @param[in] cdev
2500  *   Pointer to common mlx5 device structure.
2501  *
2502  * @return
2503  *   0 on success, a negative errno value otherwise and rte_errno is set.
2504  */
2505 static int
2506 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2507 {
2508         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2509         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2510         int ret = 0;
2511         uint16_t p;
2512
2513         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2514         if (ret != 0)
2515                 return ret;
2516
2517         if (eth_da.nb_ports > 0) {
2518                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2519                 for (p = 0; p < eth_da.nb_ports; p++) {
2520                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2521                                                    eth_da.ports[p]);
2522                         if (ret)
2523                                 break;
2524                 }
2525                 if (ret) {
2526                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2527                                 "aborted due to prodding failure of PF %u",
2528                                 pci_dev->addr.domain, pci_dev->addr.bus,
2529                                 pci_dev->addr.devid, pci_dev->addr.function,
2530                                 eth_da.ports[p]);
2531                         mlx5_net_remove(cdev);
2532                 }
2533         } else {
2534                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2535         }
2536         return ret;
2537 }
2538
2539 /* Probe a single SF device on auxiliary bus, no representor support. */
2540 static int
2541 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2542 {
2543         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2544         struct mlx5_dev_config config;
2545         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2546         struct rte_device *dev = cdev->dev;
2547         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2548         struct rte_eth_dev *eth_dev;
2549         int ret = 0;
2550
2551         /* Parse ethdev devargs. */
2552         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2553         if (ret != 0)
2554                 return ret;
2555         /* Set default config data. */
2556         mlx5_os_config_default(&config, &cdev->config);
2557         config.sf = 1;
2558         /* Init spawn data. */
2559         spawn.max_port = 1;
2560         spawn.phys_port = 1;
2561         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2562         ret = mlx5_auxiliary_get_ifindex(dev->name);
2563         if (ret < 0) {
2564                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2565                 return ret;
2566         }
2567         spawn.ifindex = ret;
2568         spawn.cdev = cdev;
2569         /* Spawn device. */
2570         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2571         if (eth_dev == NULL)
2572                 return -rte_errno;
2573         /* Post create. */
2574         eth_dev->intr_handle = adev->intr_handle;
2575         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2576                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2577                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2578                 eth_dev->data->numa_node = dev->numa_node;
2579         }
2580         rte_eth_dev_probing_finish(eth_dev);
2581         return 0;
2582 }
2583
2584 /**
2585  * Net class driver callback to probe a device.
2586  *
2587  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2588  *
2589  * @param[in] cdev
2590  *   Pointer to the common mlx5 device.
2591  *
2592  * @return
2593  *   0 on success, a negative errno value otherwise and rte_errno is set.
2594  */
2595 int
2596 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2597 {
2598         int ret;
2599
2600         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2601                 mlx5_pmd_socket_init();
2602         ret = mlx5_init_once();
2603         if (ret) {
2604                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2605                         strerror(rte_errno));
2606                 return -rte_errno;
2607         }
2608         if (mlx5_dev_is_pci(cdev->dev))
2609                 return mlx5_os_pci_probe(cdev);
2610         else
2611                 return mlx5_os_auxiliary_probe(cdev);
2612 }
2613
2614 /**
2615  * Cleanup resources when the last device is closed.
2616  */
2617 void
2618 mlx5_os_net_cleanup(void)
2619 {
2620         mlx5_pmd_socket_uninit();
2621 }
2622
2623 /**
2624  * Install shared asynchronous device events handler.
2625  * This function is implemented to support event sharing
2626  * between multiple ports of single IB device.
2627  *
2628  * @param sh
2629  *   Pointer to mlx5_dev_ctx_shared object.
2630  */
2631 void
2632 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2633 {
2634         int ret;
2635         int flags;
2636         struct ibv_context *ctx = sh->cdev->ctx;
2637
2638         sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2639         if (sh->intr_handle == NULL) {
2640                 DRV_LOG(ERR, "Fail to allocate intr_handle");
2641                 rte_errno = ENOMEM;
2642                 return;
2643         }
2644         rte_intr_fd_set(sh->intr_handle, -1);
2645
2646         flags = fcntl(ctx->async_fd, F_GETFL);
2647         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2648         if (ret) {
2649                 DRV_LOG(INFO, "failed to change file descriptor async event"
2650                         " queue");
2651         } else {
2652                 rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
2653                 rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
2654                 if (rte_intr_callback_register(sh->intr_handle,
2655                                         mlx5_dev_interrupt_handler, sh)) {
2656                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2657                         rte_intr_fd_set(sh->intr_handle, -1);
2658                 }
2659         }
2660         if (sh->cdev->config.devx) {
2661 #ifdef HAVE_IBV_DEVX_ASYNC
2662                 sh->intr_handle_devx =
2663                         rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2664                 if (!sh->intr_handle_devx) {
2665                         DRV_LOG(ERR, "Fail to allocate intr_handle");
2666                         rte_errno = ENOMEM;
2667                         return;
2668                 }
2669                 rte_intr_fd_set(sh->intr_handle_devx, -1);
2670                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2671                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2672                 if (!devx_comp) {
2673                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2674                         return;
2675                 }
2676                 flags = fcntl(devx_comp->fd, F_GETFL);
2677                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2678                 if (ret) {
2679                         DRV_LOG(INFO, "failed to change file descriptor"
2680                                 " devx comp");
2681                         return;
2682                 }
2683                 rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
2684                 rte_intr_type_set(sh->intr_handle_devx,
2685                                          RTE_INTR_HANDLE_EXT);
2686                 if (rte_intr_callback_register(sh->intr_handle_devx,
2687                                         mlx5_dev_interrupt_handler_devx, sh)) {
2688                         DRV_LOG(INFO, "Fail to install the devx shared"
2689                                 " interrupt.");
2690                         rte_intr_fd_set(sh->intr_handle_devx, -1);
2691                 }
2692 #endif /* HAVE_IBV_DEVX_ASYNC */
2693         }
2694 }
2695
2696 /**
2697  * Uninstall shared asynchronous device events handler.
2698  * This function is implemented to support event sharing
2699  * between multiple ports of single IB device.
2700  *
2701  * @param dev
2702  *   Pointer to mlx5_dev_ctx_shared object.
2703  */
2704 void
2705 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2706 {
2707         if (rte_intr_fd_get(sh->intr_handle) >= 0)
2708                 mlx5_intr_callback_unregister(sh->intr_handle,
2709                                               mlx5_dev_interrupt_handler, sh);
2710         rte_intr_instance_free(sh->intr_handle);
2711 #ifdef HAVE_IBV_DEVX_ASYNC
2712         if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
2713                 rte_intr_callback_unregister(sh->intr_handle_devx,
2714                                   mlx5_dev_interrupt_handler_devx, sh);
2715         rte_intr_instance_free(sh->intr_handle_devx);
2716         if (sh->devx_comp)
2717                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2718 #endif
2719 }
2720
2721 /**
2722  * Read statistics by a named counter.
2723  *
2724  * @param[in] priv
2725  *   Pointer to the private device data structure.
2726  * @param[in] ctr_name
2727  *   Pointer to the name of the statistic counter to read
2728  * @param[out] stat
2729  *   Pointer to read statistic value.
2730  * @return
2731  *   0 on success and stat is valud, 1 if failed to read the value
2732  *   rte_errno is set.
2733  *
2734  */
2735 int
2736 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2737                       uint64_t *stat)
2738 {
2739         int fd;
2740
2741         if (priv->sh) {
2742                 if (priv->q_counters != NULL &&
2743                     strcmp(ctr_name, "out_of_buffer") == 0)
2744                         return mlx5_devx_cmd_queue_counter_query
2745                                         (priv->q_counters, 0, (uint32_t *)stat);
2746                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2747                       priv->sh->ibdev_path,
2748                       priv->dev_port,
2749                       ctr_name);
2750                 fd = open(path, O_RDONLY);
2751                 /*
2752                  * in switchdev the file location is not per port
2753                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2754                  */
2755                 if (fd == -1) {
2756                         MKSTR(path1, "%s/hw_counters/%s",
2757                               priv->sh->ibdev_path,
2758                               ctr_name);
2759                         fd = open(path1, O_RDONLY);
2760                 }
2761                 if (fd != -1) {
2762                         char buf[21] = {'\0'};
2763                         ssize_t n = read(fd, buf, sizeof(buf));
2764
2765                         close(fd);
2766                         if (n != -1) {
2767                                 *stat = strtoull(buf, NULL, 10);
2768                                 return 0;
2769                         }
2770                 }
2771         }
2772         *stat = 0;
2773         return 1;
2774 }
2775
2776 /**
2777  * Remove a MAC address from device
2778  *
2779  * @param dev
2780  *   Pointer to Ethernet device structure.
2781  * @param index
2782  *   MAC address index.
2783  */
2784 void
2785 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2786 {
2787         struct mlx5_priv *priv = dev->data->dev_private;
2788         const int vf = priv->config.vf;
2789
2790         if (vf)
2791                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2792                                         mlx5_ifindex(dev), priv->mac_own,
2793                                         &dev->data->mac_addrs[index], index);
2794 }
2795
2796 /**
2797  * Adds a MAC address to the device
2798  *
2799  * @param dev
2800  *   Pointer to Ethernet device structure.
2801  * @param mac_addr
2802  *   MAC address to register.
2803  * @param index
2804  *   MAC address index.
2805  *
2806  * @return
2807  *   0 on success, a negative errno value otherwise
2808  */
2809 int
2810 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2811                      uint32_t index)
2812 {
2813         struct mlx5_priv *priv = dev->data->dev_private;
2814         const int vf = priv->config.vf;
2815         int ret = 0;
2816
2817         if (vf)
2818                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2819                                            mlx5_ifindex(dev), priv->mac_own,
2820                                            mac, index);
2821         return ret;
2822 }
2823
2824 /**
2825  * Modify a VF MAC address
2826  *
2827  * @param priv
2828  *   Pointer to device private data.
2829  * @param mac_addr
2830  *   MAC address to modify into.
2831  * @param iface_idx
2832  *   Net device interface index
2833  * @param vf_index
2834  *   VF index
2835  *
2836  * @return
2837  *   0 on success, a negative errno value otherwise
2838  */
2839 int
2840 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2841                            unsigned int iface_idx,
2842                            struct rte_ether_addr *mac_addr,
2843                            int vf_index)
2844 {
2845         return mlx5_nl_vf_mac_addr_modify
2846                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2847 }
2848
2849 /**
2850  * Set device promiscuous mode
2851  *
2852  * @param dev
2853  *   Pointer to Ethernet device structure.
2854  * @param enable
2855  *   0 - promiscuous is disabled, otherwise - enabled
2856  *
2857  * @return
2858  *   0 on success, a negative error value otherwise
2859  */
2860 int
2861 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2862 {
2863         struct mlx5_priv *priv = dev->data->dev_private;
2864
2865         return mlx5_nl_promisc(priv->nl_socket_route,
2866                                mlx5_ifindex(dev), !!enable);
2867 }
2868
2869 /**
2870  * Set device promiscuous mode
2871  *
2872  * @param dev
2873  *   Pointer to Ethernet device structure.
2874  * @param enable
2875  *   0 - all multicase is disabled, otherwise - enabled
2876  *
2877  * @return
2878  *   0 on success, a negative error value otherwise
2879  */
2880 int
2881 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2882 {
2883         struct mlx5_priv *priv = dev->data->dev_private;
2884
2885         return mlx5_nl_allmulti(priv->nl_socket_route,
2886                                 mlx5_ifindex(dev), !!enable);
2887 }
2888
2889 /**
2890  * Flush device MAC addresses
2891  *
2892  * @param dev
2893  *   Pointer to Ethernet device structure.
2894  *
2895  */
2896 void
2897 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2898 {
2899         struct mlx5_priv *priv = dev->data->dev_private;
2900
2901         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2902                                dev->data->mac_addrs,
2903                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2904 }