1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <ethdev_driver.h>
20 #include <ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_bus_auxiliary.h>
24 #include <rte_common.h>
25 #include <rte_kvargs.h>
26 #include <rte_rwlock.h>
27 #include <rte_spinlock.h>
28 #include <rte_string_fns.h>
29 #include <rte_alarm.h>
30 #include <rte_eal_paging.h>
32 #include <mlx5_glue.h>
33 #include <mlx5_devx_cmds.h>
34 #include <mlx5_common.h>
35 #include <mlx5_common_mp.h>
36 #include <mlx5_common_mr.h>
37 #include <mlx5_malloc.h>
39 #include "mlx5_defs.h"
41 #include "mlx5_common_os.h"
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
46 #include "mlx5_autoconf.h"
48 #include "mlx5_flow.h"
49 #include "rte_pmd_mlx5.h"
50 #include "mlx5_verbs.h"
52 #include "mlx5_devx.h"
54 #ifndef HAVE_IBV_MLX5_MOD_MPW
55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
65 /* Spinlock for mlx5_shared_data allocation. */
66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
68 /* Process local data for secondary processes. */
69 static struct mlx5_local_data mlx5_local_data;
71 /* rte flow indexed pool configuration. */
72 static struct mlx5_indexed_pool_config icfg[] = {
74 .size = sizeof(struct rte_flow),
78 .malloc = mlx5_malloc,
81 .type = "ctl_flow_ipool",
84 .size = sizeof(struct rte_flow),
90 .malloc = mlx5_malloc,
92 .per_core_cache = 1 << 14,
93 .type = "rte_flow_ipool",
96 .size = sizeof(struct rte_flow),
102 .malloc = mlx5_malloc,
105 .type = "mcp_flow_ipool",
110 * Set the completion channel file descriptor interrupt as non-blocking.
113 * Pointer to RQ channel object, which includes the channel fd
116 * The file descriptor (representing the intetrrupt) used in this channel.
119 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
122 mlx5_os_set_nonblock_channel_fd(int fd)
126 flags = fcntl(fd, F_GETFL);
127 return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
131 * Get mlx5 device attributes. The glue function query_device_ex() is called
132 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
133 * device attributes from the glue out parameter.
136 * Pointer to ibv context.
139 * Pointer to mlx5 device attributes.
142 * 0 on success, non zero error number otherwise
145 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
148 struct ibv_device_attr_ex attr_ex;
149 memset(device_attr, 0, sizeof(*device_attr));
150 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
154 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
155 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
156 device_attr->max_sge = attr_ex.orig_attr.max_sge;
157 device_attr->max_cq = attr_ex.orig_attr.max_cq;
158 device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
159 device_attr->max_mr = attr_ex.orig_attr.max_mr;
160 device_attr->max_pd = attr_ex.orig_attr.max_pd;
161 device_attr->max_qp = attr_ex.orig_attr.max_qp;
162 device_attr->max_srq = attr_ex.orig_attr.max_srq;
163 device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
164 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
165 device_attr->max_rwq_indirection_table_size =
166 attr_ex.rss_caps.max_rwq_indirection_table_size;
167 device_attr->max_tso = attr_ex.tso_caps.max_tso;
168 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
170 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
171 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
175 device_attr->flags = dv_attr.flags;
176 device_attr->comp_mask = dv_attr.comp_mask;
177 #ifdef HAVE_IBV_MLX5_MOD_SWP
178 device_attr->sw_parsing_offloads =
179 dv_attr.sw_parsing_caps.sw_parsing_offloads;
181 device_attr->min_single_stride_log_num_of_bytes =
182 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
183 device_attr->max_single_stride_log_num_of_bytes =
184 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
185 device_attr->min_single_wqe_log_num_of_strides =
186 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
187 device_attr->max_single_wqe_log_num_of_strides =
188 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
189 device_attr->stride_supported_qpts =
190 dv_attr.striding_rq_caps.supported_qpts;
191 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
192 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
194 strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
195 sizeof(device_attr->fw_ver));
201 * Verbs callback to allocate a memory. This function should allocate the space
202 * according to the size provided residing inside a huge page.
203 * Please note that all allocation must respect the alignment from libmlx5
204 * (i.e. currently rte_mem_page_size()).
207 * The size in bytes of the memory to allocate.
209 * A pointer to the callback data.
212 * Allocated buffer, NULL otherwise and rte_errno is set.
215 mlx5_alloc_verbs_buf(size_t size, void *data)
217 struct mlx5_dev_ctx_shared *sh = data;
219 size_t alignment = rte_mem_page_size();
220 if (alignment == (size_t)-1) {
221 DRV_LOG(ERR, "Failed to get mem page size");
226 MLX5_ASSERT(data != NULL);
227 ret = mlx5_malloc(0, size, alignment, sh->numa_node);
234 * Detect misc5 support or not
237 * Device private data pointer
239 #ifdef HAVE_MLX5DV_DR
241 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
243 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
244 /* Dummy VxLAN matcher to detect rdma-core misc5 cap
245 * Case: IPv4--->UDP--->VxLAN--->vni
248 struct mlx5_flow_dv_match_params matcher_mask;
253 uint32_t *tunnel_header_m;
254 struct mlx5dv_flow_matcher_attr dv_attr;
256 memset(&matcher_mask, 0, sizeof(matcher_mask));
257 matcher_mask.size = sizeof(matcher_mask.buf);
258 match_m = matcher_mask.buf;
259 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
260 misc5_m = MLX5_ADDR_OF(fte_match_param,
261 match_m, misc_parameters_5);
262 tunnel_header_m = (uint32_t *)
263 MLX5_ADDR_OF(fte_match_set_misc5,
264 misc5_m, tunnel_header_1);
265 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
266 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
267 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
268 *tunnel_header_m = 0xffffff;
270 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
272 DRV_LOG(INFO, "No SW steering support");
275 dv_attr.type = IBV_FLOW_ATTR_NORMAL,
276 dv_attr.match_mask = (void *)&matcher_mask,
277 dv_attr.match_criteria_enable =
278 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
279 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
280 dv_attr.priority = 3;
281 #ifdef HAVE_MLX5DV_DR_ESWITCH
283 if (priv->config.dv_esw_en) {
284 /* FDB enabled reg_c_0 */
285 dv_attr.match_criteria_enable |=
286 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
287 misc2_m = MLX5_ADDR_OF(fte_match_param,
288 match_m, misc_parameters_2);
289 MLX5_SET(fte_match_set_misc2, misc2_m,
290 metadata_reg_c_0, 0xffff);
293 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->ctx,
296 priv->sh->misc5_cap = 1;
297 mlx5_glue->dv_destroy_flow_matcher(matcher);
299 mlx5_glue->dr_destroy_flow_tbl(tbl);
307 * Verbs callback to free a memory.
310 * A pointer to the memory to free.
312 * A pointer to the callback data.
315 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
317 MLX5_ASSERT(data != NULL);
322 * Initialize DR related data within private structure.
323 * Routine checks the reference counter and does actual
324 * resources creation/initialization only if counter is zero.
327 * Pointer to the private device data structure.
330 * Zero on success, positive error code otherwise.
333 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
335 struct mlx5_dev_ctx_shared *sh = priv->sh;
336 char s[MLX5_NAME_SIZE] __rte_unused;
339 MLX5_ASSERT(sh && sh->refcnt);
342 err = mlx5_alloc_table_hash_list(priv);
345 /* The resources below are only valid with DV support. */
346 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
347 /* Init port id action list. */
348 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
349 sh->port_id_action_list = mlx5_list_create(s, sh, true,
350 flow_dv_port_id_create_cb,
351 flow_dv_port_id_match_cb,
352 flow_dv_port_id_remove_cb,
353 flow_dv_port_id_clone_cb,
354 flow_dv_port_id_clone_free_cb);
355 if (!sh->port_id_action_list)
357 /* Init push vlan action list. */
358 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
359 sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
360 flow_dv_push_vlan_create_cb,
361 flow_dv_push_vlan_match_cb,
362 flow_dv_push_vlan_remove_cb,
363 flow_dv_push_vlan_clone_cb,
364 flow_dv_push_vlan_clone_free_cb);
365 if (!sh->push_vlan_action_list)
367 /* Init sample action list. */
368 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
369 sh->sample_action_list = mlx5_list_create(s, sh, true,
370 flow_dv_sample_create_cb,
371 flow_dv_sample_match_cb,
372 flow_dv_sample_remove_cb,
373 flow_dv_sample_clone_cb,
374 flow_dv_sample_clone_free_cb);
375 if (!sh->sample_action_list)
377 /* Init dest array action list. */
378 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
379 sh->dest_array_list = mlx5_list_create(s, sh, true,
380 flow_dv_dest_array_create_cb,
381 flow_dv_dest_array_match_cb,
382 flow_dv_dest_array_remove_cb,
383 flow_dv_dest_array_clone_cb,
384 flow_dv_dest_array_clone_free_cb);
385 if (!sh->dest_array_list)
388 #ifdef HAVE_MLX5DV_DR
391 /* Reference counter is zero, we should initialize structures. */
392 domain = mlx5_glue->dr_create_domain(sh->ctx,
393 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
395 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
399 sh->rx_domain = domain;
400 domain = mlx5_glue->dr_create_domain(sh->ctx,
401 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
403 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
407 sh->tx_domain = domain;
408 #ifdef HAVE_MLX5DV_DR_ESWITCH
409 if (priv->config.dv_esw_en) {
410 domain = mlx5_glue->dr_create_domain
411 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
413 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
417 sh->fdb_domain = domain;
420 * The drop action is just some dummy placeholder in rdma-core. It
421 * does not belong to domains and has no any attributes, and, can be
422 * shared by the entire device.
424 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
425 if (!sh->dr_drop_action) {
426 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
431 if (!sh->tunnel_hub && priv->config.dv_miss_info)
432 err = mlx5_alloc_tunnel_hub(sh);
434 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
437 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
438 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
439 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
441 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
443 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
444 if (!priv->config.allow_duplicate_pattern) {
445 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
446 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
448 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
449 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
451 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
454 __mlx5_discovery_misc5_cap(priv);
455 #endif /* HAVE_MLX5DV_DR */
456 sh->default_miss_action =
457 mlx5_glue->dr_create_flow_action_default_miss();
458 if (!sh->default_miss_action)
459 DRV_LOG(WARNING, "Default miss action is not supported.");
462 /* Rollback the created objects. */
464 mlx5_glue->dr_destroy_domain(sh->rx_domain);
465 sh->rx_domain = NULL;
468 mlx5_glue->dr_destroy_domain(sh->tx_domain);
469 sh->tx_domain = NULL;
471 if (sh->fdb_domain) {
472 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
473 sh->fdb_domain = NULL;
475 if (sh->dr_drop_action) {
476 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
477 sh->dr_drop_action = NULL;
479 if (sh->pop_vlan_action) {
480 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
481 sh->pop_vlan_action = NULL;
483 if (sh->encaps_decaps) {
484 mlx5_hlist_destroy(sh->encaps_decaps);
485 sh->encaps_decaps = NULL;
487 if (sh->modify_cmds) {
488 mlx5_hlist_destroy(sh->modify_cmds);
489 sh->modify_cmds = NULL;
492 /* tags should be destroyed with flow before. */
493 mlx5_hlist_destroy(sh->tag_table);
494 sh->tag_table = NULL;
496 if (sh->tunnel_hub) {
497 mlx5_release_tunnel_hub(sh, priv->dev_port);
498 sh->tunnel_hub = NULL;
500 mlx5_free_table_hash_list(priv);
501 if (sh->port_id_action_list) {
502 mlx5_list_destroy(sh->port_id_action_list);
503 sh->port_id_action_list = NULL;
505 if (sh->push_vlan_action_list) {
506 mlx5_list_destroy(sh->push_vlan_action_list);
507 sh->push_vlan_action_list = NULL;
509 if (sh->sample_action_list) {
510 mlx5_list_destroy(sh->sample_action_list);
511 sh->sample_action_list = NULL;
513 if (sh->dest_array_list) {
514 mlx5_list_destroy(sh->dest_array_list);
515 sh->dest_array_list = NULL;
521 * Destroy DR related data within private structure.
524 * Pointer to the private device data structure.
527 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
529 struct mlx5_dev_ctx_shared *sh = priv->sh;
531 MLX5_ASSERT(sh && sh->refcnt);
534 #ifdef HAVE_MLX5DV_DR
536 mlx5_glue->dr_destroy_domain(sh->rx_domain);
537 sh->rx_domain = NULL;
540 mlx5_glue->dr_destroy_domain(sh->tx_domain);
541 sh->tx_domain = NULL;
543 #ifdef HAVE_MLX5DV_DR_ESWITCH
544 if (sh->fdb_domain) {
545 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
546 sh->fdb_domain = NULL;
548 if (sh->dr_drop_action) {
549 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
550 sh->dr_drop_action = NULL;
553 if (sh->pop_vlan_action) {
554 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
555 sh->pop_vlan_action = NULL;
557 #endif /* HAVE_MLX5DV_DR */
558 if (sh->default_miss_action)
559 mlx5_glue->destroy_flow_action
560 (sh->default_miss_action);
561 if (sh->encaps_decaps) {
562 mlx5_hlist_destroy(sh->encaps_decaps);
563 sh->encaps_decaps = NULL;
565 if (sh->modify_cmds) {
566 mlx5_hlist_destroy(sh->modify_cmds);
567 sh->modify_cmds = NULL;
570 /* tags should be destroyed with flow before. */
571 mlx5_hlist_destroy(sh->tag_table);
572 sh->tag_table = NULL;
574 if (sh->tunnel_hub) {
575 mlx5_release_tunnel_hub(sh, priv->dev_port);
576 sh->tunnel_hub = NULL;
578 mlx5_free_table_hash_list(priv);
579 if (sh->port_id_action_list) {
580 mlx5_list_destroy(sh->port_id_action_list);
581 sh->port_id_action_list = NULL;
583 if (sh->push_vlan_action_list) {
584 mlx5_list_destroy(sh->push_vlan_action_list);
585 sh->push_vlan_action_list = NULL;
587 if (sh->sample_action_list) {
588 mlx5_list_destroy(sh->sample_action_list);
589 sh->sample_action_list = NULL;
591 if (sh->dest_array_list) {
592 mlx5_list_destroy(sh->dest_array_list);
593 sh->dest_array_list = NULL;
598 * Initialize shared data between primary and secondary process.
600 * A memzone is reserved by primary process and secondary processes attach to
604 * 0 on success, a negative errno value otherwise and rte_errno is set.
607 mlx5_init_shared_data(void)
609 const struct rte_memzone *mz;
612 rte_spinlock_lock(&mlx5_shared_data_lock);
613 if (mlx5_shared_data == NULL) {
614 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
615 /* Allocate shared memory. */
616 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
617 sizeof(*mlx5_shared_data),
621 "Cannot allocate mlx5 shared data");
625 mlx5_shared_data = mz->addr;
626 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
627 rte_spinlock_init(&mlx5_shared_data->lock);
629 /* Lookup allocated shared memory. */
630 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
633 "Cannot attach mlx5 shared data");
637 mlx5_shared_data = mz->addr;
638 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
642 rte_spinlock_unlock(&mlx5_shared_data_lock);
647 * PMD global initialization.
649 * Independent from individual device, this function initializes global
650 * per-PMD data structures distinguishing primary and secondary processes.
651 * Hence, each initialization is called once per a process.
654 * 0 on success, a negative errno value otherwise and rte_errno is set.
659 struct mlx5_shared_data *sd;
660 struct mlx5_local_data *ld = &mlx5_local_data;
663 if (mlx5_init_shared_data())
665 sd = mlx5_shared_data;
667 rte_spinlock_lock(&sd->lock);
668 switch (rte_eal_process_type()) {
669 case RTE_PROC_PRIMARY:
672 LIST_INIT(&sd->mem_event_cb_list);
673 rte_rwlock_init(&sd->mem_event_rwlock);
674 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
675 mlx5_mr_mem_event_cb, NULL);
676 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
677 mlx5_mp_os_primary_handle);
680 sd->init_done = true;
682 case RTE_PROC_SECONDARY:
685 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
686 mlx5_mp_os_secondary_handle);
690 ld->init_done = true;
696 rte_spinlock_unlock(&sd->lock);
701 * Create the Tx queue DevX/Verbs object.
704 * Pointer to Ethernet device.
706 * Queue index in DPDK Tx queue array.
709 * 0 on success, a negative errno value otherwise and rte_errno is set.
712 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
714 struct mlx5_priv *priv = dev->data->dev_private;
715 struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
716 struct mlx5_txq_ctrl *txq_ctrl =
717 container_of(txq_data, struct mlx5_txq_ctrl, txq);
719 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
720 return mlx5_txq_devx_obj_new(dev, idx);
721 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
722 if (!priv->config.dv_esw_en)
723 return mlx5_txq_devx_obj_new(dev, idx);
725 return mlx5_txq_ibv_obj_new(dev, idx);
729 * Release an Tx DevX/verbs queue object.
732 * DevX/Verbs Tx queue object.
735 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
737 if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
738 mlx5_txq_devx_obj_release(txq_obj);
741 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
742 if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
743 mlx5_txq_devx_obj_release(txq_obj);
747 mlx5_txq_ibv_obj_release(txq_obj);
751 * DV flow counter mode detect and config.
754 * Pointer to rte_eth_dev structure.
758 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
760 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
761 struct mlx5_priv *priv = dev->data->dev_private;
762 struct mlx5_dev_ctx_shared *sh = priv->sh;
765 #ifndef HAVE_IBV_DEVX_ASYNC
769 if (!priv->config.devx || !priv->config.dv_flow_en ||
770 !priv->config.hca_attr.flow_counters_dump ||
771 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
772 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
776 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
777 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
778 priv->config.hca_attr.flow_counters_dump,
779 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
780 /* Initialize fallback mode only on the port initializes sh. */
782 sh->cmng.counter_fallback = fallback;
783 else if (fallback != sh->cmng.counter_fallback)
784 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
785 "with others:%d.", PORT_ID(priv), fallback);
790 * DR flow drop action support detect.
793 * Pointer to rte_eth_dev structure.
797 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
799 #ifdef HAVE_MLX5DV_DR
800 struct mlx5_priv *priv = dev->data->dev_private;
802 if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
805 * DR supports drop action placeholder when it is supported;
806 * otherwise, use the queue drop action.
808 if (mlx5_flow_discover_dr_action_support(dev))
809 priv->root_drop_action = priv->drop_queue.hrxq->action;
811 priv->root_drop_action = priv->sh->dr_drop_action;
816 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
818 struct mlx5_priv *priv = dev->data->dev_private;
819 void *ctx = priv->sh->ctx;
821 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
822 if (!priv->q_counters) {
823 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
826 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
827 "by DevX - fall-back to use the kernel driver global "
828 "queue counter.", dev->data->port_id);
829 /* Create WQ by kernel and query its queue counter ID. */
831 wq = mlx5_glue->create_wq(ctx,
832 &(struct ibv_wq_init_attr){
833 .wq_type = IBV_WQT_RQ,
840 /* Counter is assigned only on RDY state. */
841 int ret = mlx5_glue->modify_wq(wq,
842 &(struct ibv_wq_attr){
843 .attr_mask = IBV_WQ_ATTR_STATE,
844 .wq_state = IBV_WQS_RDY,
848 mlx5_devx_cmd_wq_query(wq,
849 &priv->counter_set_id);
850 claim_zero(mlx5_glue->destroy_wq(wq));
852 claim_zero(mlx5_glue->destroy_cq(cq));
855 priv->counter_set_id = priv->q_counters->id;
857 if (priv->counter_set_id == 0)
858 DRV_LOG(INFO, "Part of the port %d statistics will not be "
859 "available.", dev->data->port_id);
863 * Check if representor spawn info match devargs.
866 * Verbs device parameters (name, port, switch_info) to spawn.
868 * Device devargs to probe.
874 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
875 struct rte_eth_devargs *eth_da)
877 struct mlx5_switch_info *switch_info = &spawn->info;
880 uint16_t repr_id = mlx5_representor_id_encode(switch_info,
883 switch (eth_da->type) {
884 case RTE_ETH_REPRESENTOR_SF:
885 if (!(spawn->info.port_name == -1 &&
886 switch_info->name_type ==
887 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
888 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
893 case RTE_ETH_REPRESENTOR_VF:
894 /* Allows HPF representor index -1 as exception. */
895 if (!(spawn->info.port_name == -1 &&
896 switch_info->name_type ==
897 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
898 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
903 case RTE_ETH_REPRESENTOR_NONE:
908 DRV_LOG(ERR, "unsupported representor type");
911 /* Check representor ID: */
912 for (p = 0; p < eth_da->nb_ports; ++p) {
913 if (spawn->pf_bond < 0) {
914 /* For non-LAG mode, allow and ignore pf. */
915 switch_info->pf_num = eth_da->ports[p];
916 repr_id = mlx5_representor_id_encode(switch_info,
919 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
920 id = MLX5_REPRESENTOR_ID
921 (eth_da->ports[p], eth_da->type,
922 eth_da->representor_ports[f]);
933 * Spawn an Ethernet device from Verbs information.
936 * Backing DPDK device.
938 * Verbs device parameters (name, port, switch_info) to spawn.
940 * Device configuration parameters.
945 * A valid Ethernet device object on success, NULL otherwise and rte_errno
946 * is set. The following errors are defined:
948 * EBUSY: device is not supposed to be spawned.
949 * EEXIST: device is already spawned
951 static struct rte_eth_dev *
952 mlx5_dev_spawn(struct rte_device *dpdk_dev,
953 struct mlx5_dev_spawn_data *spawn,
954 struct mlx5_dev_config *config,
955 struct rte_eth_devargs *eth_da)
957 const struct mlx5_switch_info *switch_info = &spawn->info;
958 struct mlx5_dev_ctx_shared *sh = NULL;
959 struct ibv_port_attr port_attr;
960 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
961 struct rte_eth_dev *eth_dev = NULL;
962 struct mlx5_priv *priv = NULL;
964 unsigned int hw_padding = 0;
966 unsigned int mpls_en = 0;
967 unsigned int swp = 0;
968 unsigned int mprq = 0;
969 unsigned int mprq_min_stride_size_n = 0;
970 unsigned int mprq_max_stride_size_n = 0;
971 unsigned int mprq_min_stride_num_n = 0;
972 unsigned int mprq_max_stride_num_n = 0;
973 struct rte_ether_addr mac;
974 char name[RTE_ETH_NAME_MAX_LEN];
975 int own_domain_id = 0;
977 struct mlx5_port_info vport_info = { .query_flags = 0 };
980 /* Determine if this port representor is supposed to be spawned. */
981 if (switch_info->representor && dpdk_dev->devargs &&
982 !mlx5_representor_match(spawn, eth_da))
984 /* Build device name. */
985 if (spawn->pf_bond < 0) {
987 if (!switch_info->representor)
988 strlcpy(name, dpdk_dev->name, sizeof(name));
990 err = snprintf(name, sizeof(name), "%s_representor_%s%u",
992 switch_info->name_type ==
993 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
994 switch_info->port_name);
996 /* Bonding device. */
997 if (!switch_info->representor) {
998 err = snprintf(name, sizeof(name), "%s_%s",
1000 mlx5_os_get_dev_device_name(spawn->phys_dev));
1002 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
1004 mlx5_os_get_dev_device_name(spawn->phys_dev),
1005 switch_info->ctrl_num,
1006 switch_info->pf_num,
1007 switch_info->name_type ==
1008 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1009 switch_info->port_name);
1012 if (err >= (int)sizeof(name))
1013 DRV_LOG(WARNING, "device name overflow %s", name);
1014 /* check if the device is already spawned */
1015 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1019 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1020 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1021 struct mlx5_mp_id mp_id;
1023 eth_dev = rte_eth_dev_attach_secondary(name);
1024 if (eth_dev == NULL) {
1025 DRV_LOG(ERR, "can not attach rte ethdev");
1029 eth_dev->device = dpdk_dev;
1030 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1031 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1032 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1033 err = mlx5_proc_priv_init(eth_dev);
1036 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
1037 /* Receive command fd from primary process */
1038 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1041 /* Remap UAR for Tx queues. */
1042 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1046 * Ethdev pointer is still required as input since
1047 * the primary device is not accessible from the
1048 * secondary process.
1050 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1051 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1054 mlx5_dev_close(eth_dev);
1058 * Some parameters ("tx_db_nc" in particularly) are needed in
1059 * advance to create dv/verbs device context. We proceed the
1060 * devargs here to get ones, and later proceed devargs again
1061 * to override some hardware settings.
1063 err = mlx5_args(config, dpdk_dev->devargs);
1066 DRV_LOG(ERR, "failed to process device arguments: %s",
1067 strerror(rte_errno));
1070 if (config->dv_miss_info) {
1071 if (switch_info->master || switch_info->representor)
1072 config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
1074 mlx5_malloc_mem_select(config->sys_mem_en);
1075 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
1078 config->devx = sh->devx;
1079 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1080 config->dest_tir = 1;
1082 #ifdef HAVE_IBV_MLX5_MOD_SWP
1083 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1086 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1087 * as all ConnectX-5 devices.
1089 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1090 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1092 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1093 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1095 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1096 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1097 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1098 DRV_LOG(DEBUG, "enhanced MPW is supported");
1099 mps = MLX5_MPW_ENHANCED;
1101 DRV_LOG(DEBUG, "MPW is supported");
1105 DRV_LOG(DEBUG, "MPW isn't supported");
1106 mps = MLX5_MPW_DISABLED;
1108 #ifdef HAVE_IBV_MLX5_MOD_SWP
1109 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1110 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1111 DRV_LOG(DEBUG, "SWP support: %u", swp);
1113 config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1114 MLX5_SW_PARSING_TSO_CAP);
1115 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1116 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1117 struct mlx5dv_striding_rq_caps mprq_caps =
1118 dv_attr.striding_rq_caps;
1120 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1121 mprq_caps.min_single_stride_log_num_of_bytes);
1122 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1123 mprq_caps.max_single_stride_log_num_of_bytes);
1124 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1125 mprq_caps.min_single_wqe_log_num_of_strides);
1126 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1127 mprq_caps.max_single_wqe_log_num_of_strides);
1128 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1129 mprq_caps.supported_qpts);
1130 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1132 mprq_min_stride_size_n =
1133 mprq_caps.min_single_stride_log_num_of_bytes;
1134 mprq_max_stride_size_n =
1135 mprq_caps.max_single_stride_log_num_of_bytes;
1136 mprq_min_stride_num_n =
1137 mprq_caps.min_single_wqe_log_num_of_strides;
1138 mprq_max_stride_num_n =
1139 mprq_caps.max_single_wqe_log_num_of_strides;
1142 /* Rx CQE compression is enabled by default. */
1143 config->cqe_comp = 1;
1144 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1145 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1146 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1147 (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1148 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1149 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1151 if (config->tunnel_en) {
1152 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1154 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1156 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1158 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1161 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1165 "tunnel offloading disabled due to old OFED/rdma-core version");
1167 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1168 mpls_en = ((dv_attr.tunnel_offloads_caps &
1169 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1170 (dv_attr.tunnel_offloads_caps &
1171 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1172 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1173 mpls_en ? "" : "not ");
1175 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1176 " old OFED/rdma-core version or firmware configuration");
1178 config->mpls_en = mpls_en;
1179 /* Check port status. */
1180 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
1182 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1185 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1186 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1190 if (port_attr.state != IBV_PORT_ACTIVE)
1191 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1192 mlx5_glue->port_state_str(port_attr.state),
1194 /* Allocate private eth device data. */
1195 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1197 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1199 DRV_LOG(ERR, "priv allocation failure");
1204 priv->dev_port = spawn->phys_port;
1205 priv->pci_dev = spawn->pci_dev;
1206 priv->mtu = RTE_ETHER_MTU;
1207 /* Some internal functions rely on Netlink sockets, open them now. */
1208 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1209 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1210 priv->representor = !!switch_info->representor;
1211 priv->master = !!switch_info->master;
1212 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1213 priv->vport_meta_tag = 0;
1214 priv->vport_meta_mask = 0;
1215 priv->pf_bond = spawn->pf_bond;
1218 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1219 priv->dev_port, dpdk_dev->bus->name,
1220 priv->pci_dev ? priv->pci_dev->name : "NONE",
1221 priv->master, priv->representor, priv->pf_bond);
1224 * If we have E-Switch we should determine the vport attributes.
1225 * E-Switch may use either source vport field or reg_c[0] metadata
1226 * register to match on vport index. The engaged part of metadata
1227 * register is defined by mask.
1229 if (switch_info->representor || switch_info->master) {
1230 err = mlx5_glue->devx_port_query(sh->ctx,
1235 "can't query devx port %d on device %s",
1237 mlx5_os_get_dev_device_name(spawn->phys_dev));
1238 vport_info.query_flags = 0;
1241 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1242 priv->vport_meta_tag = vport_info.vport_meta_tag;
1243 priv->vport_meta_mask = vport_info.vport_meta_mask;
1244 if (!priv->vport_meta_mask) {
1245 DRV_LOG(ERR, "vport zero mask for port %d"
1246 " on bonding device %s",
1248 mlx5_os_get_dev_device_name
1253 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1254 DRV_LOG(ERR, "invalid vport tag for port %d"
1255 " on bonding device %s",
1257 mlx5_os_get_dev_device_name
1263 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1264 priv->vport_id = vport_info.vport_id;
1265 } else if (spawn->pf_bond >= 0 &&
1266 (switch_info->representor || switch_info->master)) {
1267 DRV_LOG(ERR, "can't deduce vport index for port %d"
1268 " on bonding device %s",
1270 mlx5_os_get_dev_device_name(spawn->phys_dev));
1275 * Suppose vport index in compatible way. Kernel/rdma_core
1276 * support single E-Switch per PF configurations only and
1277 * vport_id field contains the vport index for associated VF,
1278 * which is deduced from representor port name.
1279 * For example, let's have the IB device port 10, it has
1280 * attached network device eth0, which has port name attribute
1281 * pf0vf2, we can deduce the VF number as 2, and set vport index
1282 * as 3 (2+1). This assigning schema should be changed if the
1283 * multiple E-Switch instances per PF configurations or/and PCI
1284 * subfunctions are added.
1286 priv->vport_id = switch_info->representor ?
1287 switch_info->port_name + 1 : -1;
1289 priv->representor_id = mlx5_representor_id_encode(switch_info,
1292 * Look for sibling devices in order to reuse their switch domain
1293 * if any, otherwise allocate one.
1295 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1296 const struct mlx5_priv *opriv =
1297 rte_eth_devices[port_id].data->dev_private;
1300 opriv->sh != priv->sh ||
1302 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1304 priv->domain_id = opriv->domain_id;
1305 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1306 priv->dev_port, priv->domain_id);
1309 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1310 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1313 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1314 strerror(rte_errno));
1318 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1319 priv->dev_port, priv->domain_id);
1321 /* Override some values set by hardware configuration. */
1322 mlx5_args(config, dpdk_dev->devargs);
1323 err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
1326 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1327 IBV_DEVICE_RAW_IP_CSUM);
1328 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1329 (config->hw_csum ? "" : "not "));
1330 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1331 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1332 DRV_LOG(DEBUG, "counters are not supported");
1334 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1335 if (config->dv_flow_en) {
1336 DRV_LOG(WARNING, "DV flow is not supported");
1337 config->dv_flow_en = 0;
1340 if (spawn->max_port > UINT8_MAX) {
1341 /* Verbs can't support ports larger than 255 by design. */
1342 DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
1346 config->ind_table_max_size =
1347 sh->device_attr.max_rwq_indirection_table_size;
1349 * Remove this check once DPDK supports larger/variable
1350 * indirection tables.
1352 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1353 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1354 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1355 config->ind_table_max_size);
1356 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1357 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1358 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1359 (config->hw_vlan_strip ? "" : "not "));
1360 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1361 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1362 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1363 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1364 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1365 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1366 IBV_DEVICE_PCI_WRITE_END_PADDING);
1368 if (config->hw_padding && !hw_padding) {
1369 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1370 config->hw_padding = 0;
1371 } else if (config->hw_padding) {
1372 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1374 config->tso = (sh->device_attr.max_tso > 0 &&
1375 (sh->device_attr.tso_supported_qpts &
1376 (1 << IBV_QPT_RAW_PACKET)));
1378 config->tso_max_payload_sz = sh->device_attr.max_tso;
1380 * MPW is disabled by default, while the Enhanced MPW is enabled
1383 if (config->mps == MLX5_ARG_UNSET)
1384 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1387 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1388 DRV_LOG(INFO, "%sMPS is %s",
1389 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1390 config->mps == MLX5_MPW ? "legacy " : "",
1391 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1393 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1398 /* Check relax ordering support. */
1399 if (!haswell_broadwell_cpu) {
1400 sh->cmng.relaxed_ordering_write =
1401 config->hca_attr.relaxed_ordering_write;
1402 sh->cmng.relaxed_ordering_read =
1403 config->hca_attr.relaxed_ordering_read;
1405 sh->cmng.relaxed_ordering_read = 0;
1406 sh->cmng.relaxed_ordering_write = 0;
1408 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1409 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1410 sh->steering_format_version =
1411 config->hca_attr.steering_format_version;
1412 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1413 /* Check for LRO support. */
1414 if (config->dest_tir && config->hca_attr.lro_cap &&
1415 config->dv_flow_en) {
1416 /* TBD check tunnel lro caps. */
1417 config->lro.supported = config->hca_attr.lro_cap;
1418 DRV_LOG(DEBUG, "Device supports LRO");
1420 * If LRO timeout is not configured by application,
1421 * use the minimal supported value.
1423 if (!config->lro.timeout)
1424 config->lro.timeout =
1425 config->hca_attr.lro_timer_supported_periods[0];
1426 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1427 config->lro.timeout);
1428 DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1429 "required for coalescing is %d bytes",
1430 config->hca_attr.lro_min_mss_size);
1432 #if defined(HAVE_MLX5DV_DR) && \
1433 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1434 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1435 if (config->hca_attr.qos.sup &&
1436 config->hca_attr.qos.flow_meter_old &&
1437 config->dv_flow_en) {
1438 uint8_t reg_c_mask =
1439 config->hca_attr.qos.flow_meter_reg_c_ids;
1441 * Meter needs two REG_C's for color match and pre-sfx
1442 * flow match. Here get the REG_C for color match.
1443 * REG_C_0 and REG_C_1 is reserved for metadata feature.
1446 if (__builtin_popcount(reg_c_mask) < 1) {
1448 DRV_LOG(WARNING, "No available register for"
1452 * The meter color register is used by the
1453 * flow-hit feature as well.
1454 * The flow-hit feature must use REG_C_3
1455 * Prefer REG_C_3 if it is available.
1457 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1458 priv->mtr_color_reg = REG_C_3;
1460 priv->mtr_color_reg = ffs(reg_c_mask)
1463 priv->mtr_reg_share =
1464 config->hca_attr.qos.flow_meter;
1465 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1466 priv->mtr_color_reg);
1469 if (config->hca_attr.qos.sup &&
1470 config->hca_attr.qos.flow_meter_aso_sup) {
1471 uint32_t log_obj_size =
1472 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1474 config->hca_attr.qos.log_meter_aso_granularity &&
1476 config->hca_attr.qos.log_meter_aso_max_alloc)
1477 sh->meter_aso_en = 1;
1480 err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1486 if (config->hca_attr.flow.tunnel_header_0_1)
1487 sh->tunnel_header_0_1 = 1;
1489 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1490 if (config->hca_attr.flow_hit_aso &&
1491 priv->mtr_color_reg == REG_C_3) {
1492 sh->flow_hit_aso_en = 1;
1493 err = mlx5_flow_aso_age_mng_init(sh);
1498 DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1500 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1501 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1502 defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1503 if (config->hca_attr.ct_offload &&
1504 priv->mtr_color_reg == REG_C_3) {
1505 err = mlx5_flow_aso_ct_mng_init(sh);
1510 DRV_LOG(DEBUG, "CT ASO is supported.");
1513 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1514 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1515 if (config->hca_attr.log_max_ft_sampler_num > 0 &&
1516 config->dv_flow_en) {
1517 priv->sampler_en = 1;
1518 DRV_LOG(DEBUG, "Sampler enabled!");
1520 priv->sampler_en = 0;
1521 if (!config->hca_attr.log_max_ft_sampler_num)
1523 "No available register for sampler.");
1525 DRV_LOG(DEBUG, "DV flow is not supported!");
1529 if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1530 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1531 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1532 config->cqe_comp = 0;
1534 if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1535 (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1536 DRV_LOG(WARNING, "Flow Tag CQE compression"
1537 " format isn't supported.");
1538 config->cqe_comp = 0;
1540 if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1541 (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1542 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1543 " format isn't supported.");
1544 config->cqe_comp = 0;
1546 DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1547 config->cqe_comp ? "" : "not ");
1548 if (config->tx_pp) {
1549 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1550 config->hca_attr.dev_freq_khz);
1551 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1552 config->hca_attr.qos.packet_pacing ? "" : "not ");
1553 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1554 config->hca_attr.cross_channel ? "" : "not ");
1555 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1556 config->hca_attr.wqe_index_ignore ? "" : "not ");
1557 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1558 config->hca_attr.non_wire_sq ? "" : "not ");
1559 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1560 config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1561 config->hca_attr.log_max_static_sq_wq);
1562 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1563 config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1564 if (!config->devx) {
1565 DRV_LOG(ERR, "DevX is required for packet pacing");
1569 if (!config->hca_attr.qos.packet_pacing) {
1570 DRV_LOG(ERR, "Packet pacing is not supported");
1574 if (!config->hca_attr.cross_channel) {
1575 DRV_LOG(ERR, "Cross channel operations are"
1576 " required for packet pacing");
1580 if (!config->hca_attr.wqe_index_ignore) {
1581 DRV_LOG(ERR, "WQE index ignore feature is"
1582 " required for packet pacing");
1586 if (!config->hca_attr.non_wire_sq) {
1587 DRV_LOG(ERR, "Non-wire SQ feature is"
1588 " required for packet pacing");
1592 if (!config->hca_attr.log_max_static_sq_wq) {
1593 DRV_LOG(ERR, "Static WQE SQ feature is"
1594 " required for packet pacing");
1598 if (!config->hca_attr.qos.wqe_rate_pp) {
1599 DRV_LOG(ERR, "WQE rate mode is required"
1600 " for packet pacing");
1604 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1605 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1606 " can't create queues for packet pacing");
1612 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1614 err = config->hca_attr.access_register_user ?
1615 mlx5_devx_cmd_register_read
1616 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1617 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1621 /* MTUTC register is read successfully. */
1622 ts_mode = MLX5_GET(register_mtutc, reg,
1624 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1625 config->rt_timestamp = 1;
1627 /* Kernel does not support register reading. */
1628 if (config->hca_attr.dev_freq_khz ==
1629 (NS_PER_S / MS_PER_S))
1630 config->rt_timestamp = 1;
1634 * If HW has bug working with tunnel packet decapsulation and
1635 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1636 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1638 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1639 config->hw_fcs_strip = 0;
1640 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1641 (config->hw_fcs_strip ? "" : "not "));
1642 if (config->mprq.enabled && mprq) {
1643 if (config->mprq.stride_num_n &&
1644 (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1645 config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1646 config->mprq.stride_num_n =
1647 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1648 mprq_min_stride_num_n),
1649 mprq_max_stride_num_n);
1651 "the number of strides"
1652 " for Multi-Packet RQ is out of range,"
1653 " setting default value (%u)",
1654 1 << config->mprq.stride_num_n);
1656 if (config->mprq.stride_size_n &&
1657 (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1658 config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1659 config->mprq.stride_size_n =
1660 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1661 mprq_min_stride_size_n),
1662 mprq_max_stride_size_n);
1664 "the size of a stride"
1665 " for Multi-Packet RQ is out of range,"
1666 " setting default value (%u)",
1667 1 << config->mprq.stride_size_n);
1669 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1670 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1671 } else if (config->mprq.enabled && !mprq) {
1672 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1673 config->mprq.enabled = 0;
1675 if (config->max_dump_files_num == 0)
1676 config->max_dump_files_num = 128;
1677 eth_dev = rte_eth_dev_allocate(name);
1678 if (eth_dev == NULL) {
1679 DRV_LOG(ERR, "can not allocate rte ethdev");
1683 if (priv->representor) {
1684 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1685 eth_dev->data->representor_id = priv->representor_id;
1686 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1687 struct mlx5_priv *opriv =
1688 rte_eth_devices[port_id].data->dev_private;
1691 opriv->domain_id == priv->domain_id &&
1692 opriv->sh == priv->sh) {
1693 eth_dev->data->backer_port_id = port_id;
1697 if (port_id >= RTE_MAX_ETHPORTS)
1698 eth_dev->data->backer_port_id = eth_dev->data->port_id;
1700 priv->mp_id.port_id = eth_dev->data->port_id;
1701 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1703 * Store associated network device interface index. This index
1704 * is permanent throughout the lifetime of device. So, we may store
1705 * the ifindex here and use the cached value further.
1707 MLX5_ASSERT(spawn->ifindex);
1708 priv->if_index = spawn->ifindex;
1709 eth_dev->data->dev_private = priv;
1710 priv->dev_data = eth_dev->data;
1711 eth_dev->data->mac_addrs = priv->mac;
1712 eth_dev->device = dpdk_dev;
1713 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1714 /* Configure the first MAC address by default. */
1715 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1717 "port %u cannot get MAC address, is mlx5_en"
1718 " loaded? (errno: %s)",
1719 eth_dev->data->port_id, strerror(rte_errno));
1724 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1725 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1726 #ifdef RTE_LIBRTE_MLX5_DEBUG
1728 char ifname[MLX5_NAMESIZE];
1730 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1731 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1732 eth_dev->data->port_id, ifname);
1734 DRV_LOG(DEBUG, "port %u ifname is unknown",
1735 eth_dev->data->port_id);
1738 /* Get actual MTU if possible. */
1739 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1744 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1746 /* Initialize burst functions to prevent crashes before link-up. */
1747 eth_dev->rx_pkt_burst = removed_rx_burst;
1748 eth_dev->tx_pkt_burst = removed_tx_burst;
1749 eth_dev->dev_ops = &mlx5_dev_ops;
1750 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1751 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1752 eth_dev->rx_queue_count = mlx5_rx_queue_count;
1753 /* Register MAC address. */
1754 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1755 if (config->vf && config->vf_nl_en)
1756 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1757 mlx5_ifindex(eth_dev),
1758 eth_dev->data->mac_addrs,
1759 MLX5_MAX_MAC_ADDRESSES);
1760 priv->ctrl_flows = 0;
1761 rte_spinlock_init(&priv->flow_list_lock);
1762 TAILQ_INIT(&priv->flow_meters);
1763 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1764 if (!priv->mtr_profile_tbl)
1766 /* Hint libmlx5 to use PMD allocator for data plane resources */
1767 mlx5_glue->dv_set_context_attr(sh->ctx,
1768 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1769 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1770 .alloc = &mlx5_alloc_verbs_buf,
1771 .free = &mlx5_free_verbs_buf,
1774 /* Bring Ethernet device up. */
1775 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1776 eth_dev->data->port_id);
1777 mlx5_set_link_up(eth_dev);
1779 * Even though the interrupt handler is not installed yet,
1780 * interrupts will still trigger on the async_fd from
1781 * Verbs context returned by ibv_open_device().
1783 mlx5_link_update(eth_dev, 0);
1784 #ifdef HAVE_MLX5DV_DR_ESWITCH
1785 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1786 (switch_info->representor || switch_info->master)))
1787 config->dv_esw_en = 0;
1789 config->dv_esw_en = 0;
1791 /* Detect minimal data bytes to inline. */
1792 mlx5_set_min_inline(spawn, config);
1793 /* Store device configuration on private structure. */
1794 priv->config = *config;
1795 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1796 icfg[i].release_mem_en = !!config->reclaim_mode;
1797 if (config->reclaim_mode)
1798 icfg[i].per_core_cache = 0;
1799 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1800 if (!priv->flows[i])
1803 /* Create context for virtual machine VLAN workaround. */
1804 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1805 if (config->dv_flow_en) {
1806 err = mlx5_alloc_shared_dr(priv);
1810 if (config->devx && config->dv_flow_en && config->dest_tir) {
1811 priv->obj_ops = devx_obj_ops;
1812 priv->obj_ops.drop_action_create =
1813 ibv_obj_ops.drop_action_create;
1814 priv->obj_ops.drop_action_destroy =
1815 ibv_obj_ops.drop_action_destroy;
1816 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1817 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1819 if (config->dv_esw_en)
1820 priv->obj_ops.txq_obj_modify =
1821 ibv_obj_ops.txq_obj_modify;
1823 /* Use specific wrappers for Tx object. */
1824 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1825 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1826 mlx5_queue_counter_id_prepare(eth_dev);
1827 priv->obj_ops.lb_dummy_queue_create =
1828 mlx5_rxq_ibv_obj_dummy_lb_create;
1829 priv->obj_ops.lb_dummy_queue_release =
1830 mlx5_rxq_ibv_obj_dummy_lb_release;
1832 priv->obj_ops = ibv_obj_ops;
1834 if (config->tx_pp &&
1835 (priv->config.dv_esw_en ||
1836 priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
1838 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1839 * packet pacing and already checked above.
1840 * Hence, we should only make sure the SQs will be created
1841 * with DevX, not with Verbs.
1842 * Verbs allocates the SQ UAR on its own and it can't be shared
1843 * with Clock Queue UAR as required for Tx scheduling.
1845 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1849 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1850 if (!priv->drop_queue.hrxq)
1852 /* Supported Verbs flow priority number detection. */
1853 err = mlx5_flow_discover_priorities(eth_dev);
1858 priv->config.flow_prio = err;
1859 if (!priv->config.dv_esw_en &&
1860 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1861 DRV_LOG(WARNING, "metadata mode %u is not supported "
1862 "(no E-Switch)", priv->config.dv_xmeta_en);
1863 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1865 mlx5_set_metadata_mask(eth_dev);
1866 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1867 !priv->sh->dv_regc0_mask) {
1868 DRV_LOG(ERR, "metadata mode %u is not supported "
1869 "(no metadata reg_c[0] is available)",
1870 priv->config.dv_xmeta_en);
1874 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1875 mlx5_hrxq_create_cb,
1877 mlx5_hrxq_remove_cb,
1879 mlx5_hrxq_clone_free_cb);
1882 rte_rwlock_init(&priv->ind_tbls_lock);
1883 /* Query availability of metadata reg_c's. */
1884 err = mlx5_flow_discover_mreg_c(eth_dev);
1889 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1891 "port %u extensive metadata register is not supported",
1892 eth_dev->data->port_id);
1893 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1894 DRV_LOG(ERR, "metadata mode %u is not supported "
1895 "(no metadata registers available)",
1896 priv->config.dv_xmeta_en);
1901 if (priv->config.dv_flow_en &&
1902 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1903 mlx5_flow_ext_mreg_supported(eth_dev) &&
1904 priv->sh->dv_regc0_mask) {
1905 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1906 MLX5_FLOW_MREG_HTABLE_SZ,
1907 false, true, eth_dev,
1908 flow_dv_mreg_create_cb,
1909 flow_dv_mreg_match_cb,
1910 flow_dv_mreg_remove_cb,
1911 flow_dv_mreg_clone_cb,
1912 flow_dv_mreg_clone_free_cb);
1913 if (!priv->mreg_cp_tbl) {
1918 rte_spinlock_init(&priv->shared_act_sl);
1919 mlx5_flow_counter_mode_config(eth_dev);
1920 mlx5_flow_drop_action_config(eth_dev);
1921 if (priv->config.dv_flow_en)
1922 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1926 if (priv->mreg_cp_tbl)
1927 mlx5_hlist_destroy(priv->mreg_cp_tbl);
1929 mlx5_os_free_shared_dr(priv);
1930 if (priv->nl_socket_route >= 0)
1931 close(priv->nl_socket_route);
1932 if (priv->nl_socket_rdma >= 0)
1933 close(priv->nl_socket_rdma);
1934 if (priv->vmwa_context)
1935 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1936 if (eth_dev && priv->drop_queue.hrxq)
1937 mlx5_drop_action_destroy(eth_dev);
1938 if (priv->mtr_profile_tbl)
1939 mlx5_l3t_destroy(priv->mtr_profile_tbl);
1941 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1943 mlx5_list_destroy(priv->hrxqs);
1945 if (eth_dev != NULL)
1946 eth_dev->data->dev_private = NULL;
1948 if (eth_dev != NULL) {
1949 /* mac_addrs must not be freed alone because part of
1952 eth_dev->data->mac_addrs = NULL;
1953 rte_eth_dev_release_port(eth_dev);
1956 mlx5_free_shared_dev_ctx(sh);
1957 MLX5_ASSERT(err > 0);
1963 * Comparison callback to sort device data.
1965 * This is meant to be used with qsort().
1968 * Pointer to pointer to first data object.
1970 * Pointer to pointer to second data object.
1973 * 0 if both objects are equal, less than 0 if the first argument is less
1974 * than the second, greater than 0 otherwise.
1977 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1979 const struct mlx5_switch_info *si_a =
1980 &((const struct mlx5_dev_spawn_data *)a)->info;
1981 const struct mlx5_switch_info *si_b =
1982 &((const struct mlx5_dev_spawn_data *)b)->info;
1985 /* Master device first. */
1986 ret = si_b->master - si_a->master;
1989 /* Then representor devices. */
1990 ret = si_b->representor - si_a->representor;
1993 /* Unidentified devices come last in no specific order. */
1994 if (!si_a->representor)
1996 /* Order representors by name. */
1997 return si_a->port_name - si_b->port_name;
2001 * Match PCI information for possible slaves of bonding device.
2003 * @param[in] ibv_dev
2004 * Pointer to Infiniband device structure.
2005 * @param[in] pci_dev
2006 * Pointer to primary PCI address structure to match.
2007 * @param[in] nl_rdma
2008 * Netlink RDMA group socket handle.
2010 * Rerepsentor owner PF index.
2011 * @param[out] bond_info
2012 * Pointer to bonding information.
2015 * negative value if no bonding device found, otherwise
2016 * positive index of slave PF in bonding.
2019 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2020 const struct rte_pci_addr *pci_dev,
2021 int nl_rdma, uint16_t owner,
2022 struct mlx5_bond_info *bond_info)
2024 char ifname[IF_NAMESIZE + 1];
2025 unsigned int ifindex;
2027 FILE *bond_file = NULL, *file;
2032 * Try to get master device name. If something goes
2033 * wrong suppose the lack of kernel support and no
2036 memset(bond_info, 0, sizeof(*bond_info));
2039 if (!strstr(ibv_dev->name, "bond"))
2041 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2045 * The Master device might not be on the predefined
2046 * port (not on port index 1, it is not garanted),
2047 * we have to scan all Infiniband device port and
2050 for (i = 1; i <= np; ++i) {
2051 /* Check whether Infiniband port is populated. */
2052 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2055 if (!if_indextoname(ifindex, ifname))
2057 /* Try to read bonding slave names from sysfs. */
2059 "/sys/class/net/%s/master/bonding/slaves", ifname);
2060 bond_file = fopen(slaves, "r");
2066 /* Use safe format to check maximal buffer length. */
2067 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2068 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2069 char tmp_str[IF_NAMESIZE + 32];
2070 struct rte_pci_addr pci_addr;
2071 struct mlx5_switch_info info;
2073 /* Process slave interface names in the loop. */
2074 snprintf(tmp_str, sizeof(tmp_str),
2075 "/sys/class/net/%s", ifname);
2076 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
2077 DRV_LOG(WARNING, "can not get PCI address"
2078 " for netdev \"%s\"", ifname);
2081 /* Slave interface PCI address match found. */
2082 snprintf(tmp_str, sizeof(tmp_str),
2083 "/sys/class/net/%s/phys_port_name", ifname);
2084 file = fopen(tmp_str, "rb");
2087 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2088 if (fscanf(file, "%32s", tmp_str) == 1)
2089 mlx5_translate_port_name(tmp_str, &info);
2091 /* Only process PF ports. */
2092 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2093 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2095 /* Check max bonding member. */
2096 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2097 DRV_LOG(WARNING, "bonding index out of range, "
2098 "please increase MLX5_BOND_MAX_PORTS: %s",
2102 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
2103 if (pci_dev->domain == pci_addr.domain &&
2104 pci_dev->bus == pci_addr.bus &&
2105 pci_dev->devid == pci_addr.devid &&
2106 ((pci_dev->function == 0 &&
2107 pci_dev->function + owner == pci_addr.function) ||
2108 (pci_dev->function == owner &&
2109 pci_addr.function == owner)))
2110 pf = info.port_name;
2112 snprintf(tmp_str, sizeof(tmp_str),
2113 "/sys/class/net/%s/ifindex", ifname);
2114 file = fopen(tmp_str, "rb");
2117 ret = fscanf(file, "%u", &ifindex);
2121 /* Save bonding info. */
2122 strncpy(bond_info->ports[info.port_name].ifname, ifname,
2123 sizeof(bond_info->ports[0].ifname));
2124 bond_info->ports[info.port_name].pci_addr = pci_addr;
2125 bond_info->ports[info.port_name].ifindex = ifindex;
2126 bond_info->n_port++;
2129 /* Get bond interface info */
2130 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2133 DRV_LOG(ERR, "unable to get bond info: %s",
2134 strerror(rte_errno));
2136 DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2137 ifindex, bond_info->ifindex, bond_info->ifname);
2143 mlx5_os_config_default(struct mlx5_dev_config *config)
2145 memset(config, 0, sizeof(*config));
2146 config->mps = MLX5_ARG_UNSET;
2147 config->dbnc = MLX5_ARG_UNSET;
2148 config->rx_vec_en = 1;
2149 config->txq_inline_max = MLX5_ARG_UNSET;
2150 config->txq_inline_min = MLX5_ARG_UNSET;
2151 config->txq_inline_mpw = MLX5_ARG_UNSET;
2152 config->txqs_inline = MLX5_ARG_UNSET;
2153 config->vf_nl_en = 1;
2154 config->mr_ext_memseg_en = 1;
2155 config->mr_mempool_reg_en = 1;
2156 config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2157 config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2158 config->dv_esw_en = 1;
2159 config->dv_flow_en = 1;
2160 config->decap_en = 1;
2161 config->log_hp_size = MLX5_ARG_UNSET;
2162 config->allow_duplicate_pattern = 1;
2166 * Register a PCI device within bonding.
2168 * This function spawns Ethernet devices out of a given PCI device and
2169 * bonding owner PF index.
2171 * @param[in] pci_dev
2172 * PCI device information.
2173 * @param[in] req_eth_da
2174 * Requested ethdev device argument.
2175 * @param[in] owner_id
2176 * Requested owner PF port ID within bonding device, default to 0.
2179 * 0 on success, a negative errno value otherwise and rte_errno is set.
2182 mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
2183 struct rte_eth_devargs *req_eth_da,
2186 struct ibv_device **ibv_list;
2188 * Number of found IB Devices matching with requested PCI BDF.
2189 * nd != 1 means there are multiple IB devices over the same
2190 * PCI device and we have representors and master.
2192 unsigned int nd = 0;
2194 * Number of found IB device Ports. nd = 1 and np = 1..n means
2195 * we have the single multiport IB device, and there may be
2196 * representors attached to some of found ports.
2198 unsigned int np = 0;
2200 * Number of DPDK ethernet devices to Spawn - either over
2201 * multiple IB devices or multiple ports of single IB device.
2202 * Actually this is the number of iterations to spawn.
2204 unsigned int ns = 0;
2207 * < 0 - no bonding device (single one)
2208 * >= 0 - bonding device (value is slave PF index)
2211 struct mlx5_dev_spawn_data *list = NULL;
2212 struct mlx5_dev_config dev_config;
2213 unsigned int dev_config_vf;
2214 struct rte_eth_devargs eth_da = *req_eth_da;
2215 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2216 struct mlx5_bond_info bond_info;
2220 ibv_list = mlx5_glue->get_device_list(&ret);
2222 rte_errno = errno ? errno : ENOSYS;
2223 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2227 * First scan the list of all Infiniband devices to find
2228 * matching ones, gathering into the list.
2230 struct ibv_device *ibv_match[ret + 1];
2231 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2232 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2236 struct rte_pci_addr pci_addr;
2238 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2239 bd = mlx5_device_bond_pci_match
2240 (ibv_list[ret], &owner_pci, nl_rdma, owner_id,
2244 * Bonding device detected. Only one match is allowed,
2245 * the bonding is supported over multi-port IB device,
2246 * there should be no matches on representor PCI
2247 * functions or non VF LAG bonding devices with
2248 * specified address.
2252 "multiple PCI match on bonding device"
2253 "\"%s\" found", ibv_list[ret]->name);
2258 /* Amend owner pci address if owner PF ID specified. */
2259 if (eth_da.nb_representor_ports)
2260 owner_pci.function += owner_id;
2261 DRV_LOG(INFO, "PCI information matches for"
2262 " slave %d bonding device \"%s\"",
2263 bd, ibv_list[ret]->name);
2264 ibv_match[nd++] = ibv_list[ret];
2267 /* Bonding device not found. */
2268 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2271 if (owner_pci.domain != pci_addr.domain ||
2272 owner_pci.bus != pci_addr.bus ||
2273 owner_pci.devid != pci_addr.devid ||
2274 owner_pci.function != pci_addr.function)
2276 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2277 ibv_list[ret]->name);
2278 ibv_match[nd++] = ibv_list[ret];
2281 ibv_match[nd] = NULL;
2283 /* No device matches, just complain and bail out. */
2285 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2286 " are kernel drivers loaded?",
2287 owner_pci.domain, owner_pci.bus,
2288 owner_pci.devid, owner_pci.function);
2295 * Found single matching device may have multiple ports.
2296 * Each port may be representor, we have to check the port
2297 * number and check the representors existence.
2300 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2302 DRV_LOG(WARNING, "can not get IB device \"%s\""
2303 " ports number", ibv_match[0]->name);
2304 if (bd >= 0 && !np) {
2305 DRV_LOG(ERR, "can not get ports"
2306 " for bonding device");
2313 * Now we can determine the maximal
2314 * amount of devices to be spawned.
2316 list = mlx5_malloc(MLX5_MEM_ZERO,
2317 sizeof(struct mlx5_dev_spawn_data) *
2319 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2321 DRV_LOG(ERR, "spawn data array allocation failure");
2326 if (bd >= 0 || np > 1) {
2328 * Single IB device with multiple ports found,
2329 * it may be E-Switch master device and representors.
2330 * We have to perform identification through the ports.
2332 MLX5_ASSERT(nl_rdma >= 0);
2333 MLX5_ASSERT(ns == 0);
2334 MLX5_ASSERT(nd == 1);
2336 for (i = 1; i <= np; ++i) {
2337 list[ns].bond_info = &bond_info;
2338 list[ns].max_port = np;
2339 list[ns].phys_port = i;
2340 list[ns].phys_dev = ibv_match[0];
2341 list[ns].eth_dev = NULL;
2342 list[ns].pci_dev = pci_dev;
2343 list[ns].pf_bond = bd;
2344 list[ns].ifindex = mlx5_nl_ifindex
2346 mlx5_os_get_dev_device_name
2347 (list[ns].phys_dev), i);
2348 if (!list[ns].ifindex) {
2350 * No network interface index found for the
2351 * specified port, it means there is no
2352 * representor on this port. It's OK,
2353 * there can be disabled ports, for example
2354 * if sriov_numvfs < sriov_totalvfs.
2360 ret = mlx5_nl_switch_info
2364 if (ret || (!list[ns].info.representor &&
2365 !list[ns].info.master)) {
2367 * We failed to recognize representors with
2368 * Netlink, let's try to perform the task
2371 ret = mlx5_sysfs_switch_info
2375 if (!ret && bd >= 0) {
2376 switch (list[ns].info.name_type) {
2377 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2380 * Force standalone bonding
2381 * device for ROCE LAG
2384 list[ns].info.master = 0;
2385 list[ns].info.representor = 0;
2387 if (list[ns].info.port_name == bd)
2390 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2392 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2394 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2395 if (list[ns].info.pf_num == bd)
2403 if (!ret && (list[ns].info.representor ^
2404 list[ns].info.master))
2409 "unable to recognize master/representors"
2410 " on the IB device with multiple ports");
2417 * The existence of several matching entries (nd > 1) means
2418 * port representors have been instantiated. No existing Verbs
2419 * call nor sysfs entries can tell them apart, this can only
2420 * be done through Netlink calls assuming kernel drivers are
2421 * recent enough to support them.
2423 * In the event of identification failure through Netlink,
2424 * try again through sysfs, then:
2426 * 1. A single IB device matches (nd == 1) with single
2427 * port (np=0/1) and is not a representor, assume
2428 * no switch support.
2430 * 2. Otherwise no safe assumptions can be made;
2431 * complain louder and bail out.
2433 for (i = 0; i != nd; ++i) {
2434 memset(&list[ns].info, 0, sizeof(list[ns].info));
2435 list[ns].bond_info = NULL;
2436 list[ns].max_port = 1;
2437 list[ns].phys_port = 1;
2438 list[ns].phys_dev = ibv_match[i];
2439 list[ns].eth_dev = NULL;
2440 list[ns].pci_dev = pci_dev;
2441 list[ns].pf_bond = -1;
2442 list[ns].ifindex = 0;
2444 list[ns].ifindex = mlx5_nl_ifindex
2446 mlx5_os_get_dev_device_name
2447 (list[ns].phys_dev), 1);
2448 if (!list[ns].ifindex) {
2449 char ifname[IF_NAMESIZE];
2452 * Netlink failed, it may happen with old
2453 * ib_core kernel driver (before 4.16).
2454 * We can assume there is old driver because
2455 * here we are processing single ports IB
2456 * devices. Let's try sysfs to retrieve
2457 * the ifindex. The method works for
2458 * master device only.
2462 * Multiple devices found, assume
2463 * representors, can not distinguish
2464 * master/representor and retrieve
2465 * ifindex via sysfs.
2469 ret = mlx5_get_ifname_sysfs
2470 (ibv_match[i]->ibdev_path, ifname);
2473 if_nametoindex(ifname);
2474 if (!list[ns].ifindex) {
2476 * No network interface index found
2477 * for the specified device, it means
2478 * there it is neither representor
2486 ret = mlx5_nl_switch_info
2490 if (ret || (!list[ns].info.representor &&
2491 !list[ns].info.master)) {
2493 * We failed to recognize representors with
2494 * Netlink, let's try to perform the task
2497 ret = mlx5_sysfs_switch_info
2501 if (!ret && (list[ns].info.representor ^
2502 list[ns].info.master)) {
2504 } else if ((nd == 1) &&
2505 !list[ns].info.representor &&
2506 !list[ns].info.master) {
2508 * Single IB device with
2509 * one physical port and
2510 * attached network device.
2511 * May be SRIOV is not enabled
2512 * or there is no representors.
2514 DRV_LOG(INFO, "no E-Switch support detected");
2521 "unable to recognize master/representors"
2522 " on the multiple IB devices");
2528 * New kernels may add the switch_id attribute for the case
2529 * there is no E-Switch and we wrongly recognized the
2530 * only device as master. Override this if there is the
2531 * single device with single port and new device name
2535 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2536 list[0].info.master = 0;
2537 list[0].info.representor = 0;
2542 * Sort list to probe devices in natural order for users convenience
2543 * (i.e. master first, then representors from lowest to highest ID).
2545 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2546 /* Device specific configuration. */
2547 switch (pci_dev->id.device_id) {
2548 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2549 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2550 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2551 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2552 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2553 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2554 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2561 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2562 /* Set devargs default values. */
2563 if (eth_da.nb_mh_controllers == 0) {
2564 eth_da.nb_mh_controllers = 1;
2565 eth_da.mh_controllers[0] = 0;
2567 if (eth_da.nb_ports == 0 && ns > 0) {
2568 if (list[0].pf_bond >= 0 && list[0].info.representor)
2569 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2570 pci_dev->device.devargs->args);
2571 eth_da.nb_ports = 1;
2572 eth_da.ports[0] = list[0].info.pf_num;
2574 if (eth_da.nb_representor_ports == 0) {
2575 eth_da.nb_representor_ports = 1;
2576 eth_da.representor_ports[0] = 0;
2579 for (i = 0; i != ns; ++i) {
2582 /* Default configuration. */
2583 mlx5_os_config_default(&dev_config);
2584 dev_config.vf = dev_config_vf;
2585 list[i].numa_node = pci_dev->device.numa_node;
2586 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2590 if (!list[i].eth_dev) {
2591 if (rte_errno != EBUSY && rte_errno != EEXIST)
2593 /* Device is disabled or already spawned. Ignore it. */
2596 restore = list[i].eth_dev->data->dev_flags;
2597 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2599 * Each representor has a dedicated interrupts vector.
2600 * rte_eth_copy_pci_info() assigns PF interrupts handle to
2601 * representor eth_dev object because representor and PF
2602 * share the same PCI address.
2603 * Override representor device with a dedicated
2604 * interrupts handle here.
2605 * Representor interrupts handle is released in mlx5_dev_stop().
2607 if (list[i].info.representor) {
2608 struct rte_intr_handle *intr_handle;
2609 intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
2610 sizeof(*intr_handle), 0,
2614 "port %u failed to allocate memory for interrupt handler "
2615 "Rx interrupts will not be supported",
2621 list[i].eth_dev->intr_handle = intr_handle;
2623 /* Restore non-PCI flags cleared by the above call. */
2624 list[i].eth_dev->data->dev_flags |= restore;
2625 rte_eth_dev_probing_finish(list[i].eth_dev);
2629 "probe of PCI device " PCI_PRI_FMT " aborted after"
2630 " encountering an error: %s",
2631 owner_pci.domain, owner_pci.bus,
2632 owner_pci.devid, owner_pci.function,
2633 strerror(rte_errno));
2637 if (!list[i].eth_dev)
2639 mlx5_dev_close(list[i].eth_dev);
2640 /* mac_addrs must not be freed because in dev_private */
2641 list[i].eth_dev->data->mac_addrs = NULL;
2642 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2644 /* Restore original error. */
2651 * Do the routine cleanup:
2652 * - close opened Netlink sockets
2653 * - free allocated spawn data array
2654 * - free the Infiniband device list
2662 MLX5_ASSERT(ibv_list);
2663 mlx5_glue->free_device_list(ibv_list);
2668 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2669 struct rte_eth_devargs *eth_da)
2673 if (dev->devargs == NULL)
2675 memset(eth_da, 0, sizeof(*eth_da));
2676 /* Parse representor information first from class argument. */
2677 if (dev->devargs->cls_str)
2678 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2680 DRV_LOG(ERR, "failed to parse device arguments: %s",
2681 dev->devargs->cls_str);
2684 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2685 /* Parse legacy device argument */
2686 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2688 DRV_LOG(ERR, "failed to parse device arguments: %s",
2689 dev->devargs->args);
2697 * Callback to register a PCI device.
2699 * This function spawns Ethernet devices out of a given PCI device.
2701 * @param[in] pci_dev
2702 * PCI device information.
2705 * 0 on success, a negative errno value otherwise and rte_errno is set.
2708 mlx5_os_pci_probe(struct rte_pci_device *pci_dev)
2710 struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2714 ret = mlx5_os_parse_eth_devargs(&pci_dev->device, ð_da);
2718 if (eth_da.nb_ports > 0) {
2719 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2720 for (p = 0; p < eth_da.nb_ports; p++) {
2721 ret = mlx5_os_pci_probe_pf(pci_dev, ð_da,
2727 DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2728 "aborted due to proding failure of PF %u",
2729 pci_dev->addr.domain, pci_dev->addr.bus,
2730 pci_dev->addr.devid, pci_dev->addr.function,
2732 mlx5_net_remove(&pci_dev->device);
2735 ret = mlx5_os_pci_probe_pf(pci_dev, ð_da, 0);
2740 /* Probe a single SF device on auxiliary bus, no representor support. */
2742 mlx5_os_auxiliary_probe(struct rte_device *dev)
2744 struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2745 struct mlx5_dev_config config;
2746 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2747 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2748 struct rte_eth_dev *eth_dev;
2751 /* Parse ethdev devargs. */
2752 ret = mlx5_os_parse_eth_devargs(dev, ð_da);
2755 /* Set default config data. */
2756 mlx5_os_config_default(&config);
2758 /* Init spawn data. */
2760 spawn.phys_port = 1;
2761 spawn.phys_dev = mlx5_os_get_ibv_dev(dev);
2762 if (spawn.phys_dev == NULL)
2764 ret = mlx5_auxiliary_get_ifindex(dev->name);
2766 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2769 spawn.ifindex = ret;
2770 spawn.numa_node = dev->numa_node;
2772 eth_dev = mlx5_dev_spawn(dev, &spawn, &config, ð_da);
2773 if (eth_dev == NULL)
2776 eth_dev->intr_handle = &adev->intr_handle;
2777 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2778 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2779 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2780 eth_dev->data->numa_node = dev->numa_node;
2782 rte_eth_dev_probing_finish(eth_dev);
2787 * Net class driver callback to probe a device.
2789 * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2792 * Pointer to the generic device.
2795 * 0 on success, the function cannot fail.
2798 mlx5_os_net_probe(struct rte_device *dev)
2802 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2803 mlx5_pmd_socket_init();
2804 ret = mlx5_init_once();
2806 DRV_LOG(ERR, "unable to init PMD global data: %s",
2807 strerror(rte_errno));
2810 if (mlx5_dev_is_pci(dev))
2811 return mlx5_os_pci_probe(RTE_DEV_TO_PCI(dev));
2813 return mlx5_os_auxiliary_probe(dev);
2817 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2822 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2823 /* Get environment variable to store. */
2824 env = getenv(MLX5_SHUT_UP_BF);
2825 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2826 if (config->dbnc == MLX5_ARG_UNSET)
2827 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2829 setenv(MLX5_SHUT_UP_BF,
2830 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2835 mlx5_restore_doorbell_mapping_env(int value)
2837 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2838 /* Restore the original environment variable state. */
2839 if (value == MLX5_ARG_UNSET)
2840 unsetenv(MLX5_SHUT_UP_BF);
2842 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2846 * Extract pdn of PD object using DV API.
2849 * Pointer to the verbs PD object.
2851 * Pointer to the PD object number variable.
2854 * 0 on success, error value otherwise.
2857 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2859 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2860 struct mlx5dv_obj obj;
2861 struct mlx5dv_pd pd_info;
2865 obj.pd.out = &pd_info;
2866 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2868 DRV_LOG(DEBUG, "Fail to get PD object info");
2877 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2881 * Function API to open IB device.
2883 * This function calls the Linux glue APIs to open a device.
2886 * Pointer to the IB device attributes (name, port, etc).
2887 * @param[out] config
2888 * Pointer to device configuration structure.
2890 * Pointer to shared context structure.
2893 * 0 on success, a positive error value otherwise.
2896 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2897 const struct mlx5_dev_config *config,
2898 struct mlx5_dev_ctx_shared *sh)
2903 pthread_mutex_init(&sh->txpp.mutex, NULL);
2905 * Configure environment variable "MLX5_BF_SHUT_UP"
2906 * before the device creation. The rdma_core library
2907 * checks the variable at device creation and
2908 * stores the result internally.
2910 dbmap_env = mlx5_config_doorbell_mapping_env(config);
2911 /* Try to open IB device with DV first, then usual Verbs. */
2913 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2916 DRV_LOG(DEBUG, "DevX is supported");
2917 /* The device is created, no need for environment. */
2918 mlx5_restore_doorbell_mapping_env(dbmap_env);
2920 /* The environment variable is still configured. */
2921 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2922 err = errno ? errno : ENODEV;
2924 * The environment variable is not needed anymore,
2925 * all device creation attempts are completed.
2927 mlx5_restore_doorbell_mapping_env(dbmap_env);
2930 DRV_LOG(DEBUG, "DevX is NOT supported");
2933 if (!err && sh->ctx) {
2934 /* Hint libmlx5 to use PMD allocator for data plane resources */
2935 mlx5_glue->dv_set_context_attr(sh->ctx,
2936 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2937 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2938 .alloc = &mlx5_alloc_verbs_buf,
2939 .free = &mlx5_free_verbs_buf,
2947 * Install shared asynchronous device events handler.
2948 * This function is implemented to support event sharing
2949 * between multiple ports of single IB device.
2952 * Pointer to mlx5_dev_ctx_shared object.
2955 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2960 sh->intr_handle.fd = -1;
2961 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2962 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2963 F_SETFL, flags | O_NONBLOCK);
2965 DRV_LOG(INFO, "failed to change file descriptor async event"
2968 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2969 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2970 if (rte_intr_callback_register(&sh->intr_handle,
2971 mlx5_dev_interrupt_handler, sh)) {
2972 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2973 sh->intr_handle.fd = -1;
2977 #ifdef HAVE_IBV_DEVX_ASYNC
2978 sh->intr_handle_devx.fd = -1;
2980 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2981 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2983 DRV_LOG(INFO, "failed to allocate devx_comp.");
2986 flags = fcntl(devx_comp->fd, F_GETFL);
2987 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2989 DRV_LOG(INFO, "failed to change file descriptor"
2993 sh->intr_handle_devx.fd = devx_comp->fd;
2994 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2995 if (rte_intr_callback_register(&sh->intr_handle_devx,
2996 mlx5_dev_interrupt_handler_devx, sh)) {
2997 DRV_LOG(INFO, "Fail to install the devx shared"
2999 sh->intr_handle_devx.fd = -1;
3001 #endif /* HAVE_IBV_DEVX_ASYNC */
3006 * Uninstall shared asynchronous device events handler.
3007 * This function is implemented to support event sharing
3008 * between multiple ports of single IB device.
3011 * Pointer to mlx5_dev_ctx_shared object.
3014 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
3016 if (sh->intr_handle.fd >= 0)
3017 mlx5_intr_callback_unregister(&sh->intr_handle,
3018 mlx5_dev_interrupt_handler, sh);
3019 #ifdef HAVE_IBV_DEVX_ASYNC
3020 if (sh->intr_handle_devx.fd >= 0)
3021 rte_intr_callback_unregister(&sh->intr_handle_devx,
3022 mlx5_dev_interrupt_handler_devx, sh);
3024 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
3029 * Read statistics by a named counter.
3032 * Pointer to the private device data structure.
3033 * @param[in] ctr_name
3034 * Pointer to the name of the statistic counter to read
3036 * Pointer to read statistic value.
3038 * 0 on success and stat is valud, 1 if failed to read the value
3043 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
3049 if (priv->q_counters != NULL &&
3050 strcmp(ctr_name, "out_of_buffer") == 0)
3051 return mlx5_devx_cmd_queue_counter_query
3052 (priv->q_counters, 0, (uint32_t *)stat);
3053 MKSTR(path, "%s/ports/%d/hw_counters/%s",
3054 priv->sh->ibdev_path,
3057 fd = open(path, O_RDONLY);
3059 * in switchdev the file location is not per port
3060 * but rather in <ibdev_path>/hw_counters/<file_name>.
3063 MKSTR(path1, "%s/hw_counters/%s",
3064 priv->sh->ibdev_path,
3066 fd = open(path1, O_RDONLY);
3069 char buf[21] = {'\0'};
3070 ssize_t n = read(fd, buf, sizeof(buf));
3074 *stat = strtoull(buf, NULL, 10);
3084 * Set the reg_mr and dereg_mr call backs
3086 * @param reg_mr_cb[out]
3087 * Pointer to reg_mr func
3088 * @param dereg_mr_cb[out]
3089 * Pointer to dereg_mr func
3093 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
3094 mlx5_dereg_mr_t *dereg_mr_cb)
3096 *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
3097 *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
3101 * Remove a MAC address from device
3104 * Pointer to Ethernet device structure.
3106 * MAC address index.
3109 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
3111 struct mlx5_priv *priv = dev->data->dev_private;
3112 const int vf = priv->config.vf;
3115 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
3116 mlx5_ifindex(dev), priv->mac_own,
3117 &dev->data->mac_addrs[index], index);
3121 * Adds a MAC address to the device
3124 * Pointer to Ethernet device structure.
3126 * MAC address to register.
3128 * MAC address index.
3131 * 0 on success, a negative errno value otherwise
3134 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
3137 struct mlx5_priv *priv = dev->data->dev_private;
3138 const int vf = priv->config.vf;
3142 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
3143 mlx5_ifindex(dev), priv->mac_own,
3149 * Modify a VF MAC address
3152 * Pointer to device private data.
3154 * MAC address to modify into.
3156 * Net device interface index
3161 * 0 on success, a negative errno value otherwise
3164 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
3165 unsigned int iface_idx,
3166 struct rte_ether_addr *mac_addr,
3169 return mlx5_nl_vf_mac_addr_modify
3170 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
3174 * Set device promiscuous mode
3177 * Pointer to Ethernet device structure.
3179 * 0 - promiscuous is disabled, otherwise - enabled
3182 * 0 on success, a negative error value otherwise
3185 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
3187 struct mlx5_priv *priv = dev->data->dev_private;
3189 return mlx5_nl_promisc(priv->nl_socket_route,
3190 mlx5_ifindex(dev), !!enable);
3194 * Set device promiscuous mode
3197 * Pointer to Ethernet device structure.
3199 * 0 - all multicase is disabled, otherwise - enabled
3202 * 0 on success, a negative error value otherwise
3205 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
3207 struct mlx5_priv *priv = dev->data->dev_private;
3209 return mlx5_nl_allmulti(priv->nl_socket_route,
3210 mlx5_ifindex(dev), !!enable);
3214 * Flush device MAC addresses
3217 * Pointer to Ethernet device structure.
3221 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3223 struct mlx5_priv *priv = dev->data->dev_private;
3225 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3226 dev->data->mac_addrs,
3227 MLX5_MAX_MAC_ADDRESSES, priv->mac_own);