drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE];
 229         int err;
 230
 231         MLX5_ASSERT(sh && sh->refcnt);
 232         if (sh->refcnt > 1)
 233                 return 0;
 234         err = mlx5_alloc_table_hash_list(priv);
 235         if (err)
 236                 return err;
 237         /* Create tags hash list table. */
 238         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 239         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 240         if (!sh->tag_table) {
 241                 DRV_LOG(ERR, "tags with hash creation failed.");
 242                 err = ENOMEM;
 243                 goto error;
 244         }
 245         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 246         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
 247         if (!sh->modify_cmds) {
 248                 DRV_LOG(ERR, "hdr modify hash creation failed");
 249                 err = ENOMEM;
 250                 goto error;
 251         }
 252         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 253         sh->encaps_decaps = mlx5_hlist_create(s,
 254                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ);
 255         if (!sh->encaps_decaps) {
 256                 DRV_LOG(ERR, "encap decap hash creation failed");
 257                 err = ENOMEM;
 258                 goto error;
 259         }
 260 #ifdef HAVE_MLX5DV_DR
 261         void *domain;
 262
 263         /* Reference counter is zero, we should initialize structures. */
 264         domain = mlx5_glue->dr_create_domain(sh->ctx,
 265                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 266         if (!domain) {
 267                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 268                 err = errno;
 269                 goto error;
 270         }
 271         sh->rx_domain = domain;
 272         domain = mlx5_glue->dr_create_domain(sh->ctx,
 273                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 274         if (!domain) {
 275                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 276                 err = errno;
 277                 goto error;
 278         }
 279         pthread_mutex_init(&sh->dv_mutex, NULL);
 280         sh->tx_domain = domain;
 281 #ifdef HAVE_MLX5DV_DR_ESWITCH
 282         if (priv->config.dv_esw_en) {
 283                 domain  = mlx5_glue->dr_create_domain
 284                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 285                 if (!domain) {
 286                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 287                         err = errno;
 288                         goto error;
 289                 }
 290                 sh->fdb_domain = domain;
 291                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 292         }
 293 #endif
 294         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 295                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 296                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 297                 if (sh->fdb_domain)
 298                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 299         }
 300         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 301 #endif /* HAVE_MLX5DV_DR */
 302         return 0;
 303 error:
 304         /* Rollback the created objects. */
 305         if (sh->rx_domain) {
 306                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 307                 sh->rx_domain = NULL;
 308         }
 309         if (sh->tx_domain) {
 310                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 311                 sh->tx_domain = NULL;
 312         }
 313         if (sh->fdb_domain) {
 314                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 315                 sh->fdb_domain = NULL;
 316         }
 317         if (sh->esw_drop_action) {
 318                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 319                 sh->esw_drop_action = NULL;
 320         }
 321         if (sh->pop_vlan_action) {
 322                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 323                 sh->pop_vlan_action = NULL;
 324         }
 325         if (sh->encaps_decaps) {
 326                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
 327                 sh->encaps_decaps = NULL;
 328         }
 329         if (sh->modify_cmds) {
 330                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 331                 sh->modify_cmds = NULL;
 332         }
 333         if (sh->tag_table) {
 334                 /* tags should be destroyed with flow before. */
 335                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 336                 sh->tag_table = NULL;
 337         }
 338         mlx5_free_table_hash_list(priv);
 339         return err;
 340 }
 341
 342 /**
 343  * Destroy DR related data within private structure.
 344  *
 345  * @param[in] priv
 346  *   Pointer to the private device data structure.
 347  */
 348 void
 349 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 350 {
 351         struct mlx5_dev_ctx_shared *sh = priv->sh;
 352
 353         MLX5_ASSERT(sh && sh->refcnt);
 354         if (sh->refcnt > 1)
 355                 return;
 356 #ifdef HAVE_MLX5DV_DR
 357         if (sh->rx_domain) {
 358                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 359                 sh->rx_domain = NULL;
 360         }
 361         if (sh->tx_domain) {
 362                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 363                 sh->tx_domain = NULL;
 364         }
 365 #ifdef HAVE_MLX5DV_DR_ESWITCH
 366         if (sh->fdb_domain) {
 367                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 368                 sh->fdb_domain = NULL;
 369         }
 370         if (sh->esw_drop_action) {
 371                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 372                 sh->esw_drop_action = NULL;
 373         }
 374 #endif
 375         if (sh->pop_vlan_action) {
 376                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 377                 sh->pop_vlan_action = NULL;
 378         }
 379         pthread_mutex_destroy(&sh->dv_mutex);
 380 #endif /* HAVE_MLX5DV_DR */
 381         if (sh->encaps_decaps) {
 382                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
 383                 sh->encaps_decaps = NULL;
 384         }
 385         if (sh->modify_cmds) {
 386                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 387                 sh->modify_cmds = NULL;
 388         }
 389         if (sh->tag_table) {
 390                 /* tags should be destroyed with flow before. */
 391                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 392                 sh->tag_table = NULL;
 393         }
 394         mlx5_free_table_hash_list(priv);
 395 }
 396
 397 /**
 398  * Initialize shared data between primary and secondary process.
 399  *
 400  * A memzone is reserved by primary process and secondary processes attach to
 401  * the memzone.
 402  *
 403  * @return
 404  *   0 on success, a negative errno value otherwise and rte_errno is set.
 405  */
 406 static int
 407 mlx5_init_shared_data(void)
 408 {
 409         const struct rte_memzone *mz;
 410         int ret = 0;
 411
 412         rte_spinlock_lock(&mlx5_shared_data_lock);
 413         if (mlx5_shared_data == NULL) {
 414                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 415                         /* Allocate shared memory. */
 416                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 417                                                  sizeof(*mlx5_shared_data),
 418                                                  SOCKET_ID_ANY, 0);
 419                         if (mz == NULL) {
 420                                 DRV_LOG(ERR,
 421                                         "Cannot allocate mlx5 shared data");
 422                                 ret = -rte_errno;
 423                                 goto error;
 424                         }
 425                         mlx5_shared_data = mz->addr;
 426                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 427                         rte_spinlock_init(&mlx5_shared_data->lock);
 428                 } else {
 429                         /* Lookup allocated shared memory. */
 430                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 431                         if (mz == NULL) {
 432                                 DRV_LOG(ERR,
 433                                         "Cannot attach mlx5 shared data");
 434                                 ret = -rte_errno;
 435                                 goto error;
 436                         }
 437                         mlx5_shared_data = mz->addr;
 438                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 439                 }
 440         }
 441 error:
 442         rte_spinlock_unlock(&mlx5_shared_data_lock);
 443         return ret;
 444 }
 445
 446 /**
 447  * PMD global initialization.
 448  *
 449  * Independent from individual device, this function initializes global
 450  * per-PMD data structures distinguishing primary and secondary processes.
 451  * Hence, each initialization is called once per a process.
 452  *
 453  * @return
 454  *   0 on success, a negative errno value otherwise and rte_errno is set.
 455  */
 456 static int
 457 mlx5_init_once(void)
 458 {
 459         struct mlx5_shared_data *sd;
 460         struct mlx5_local_data *ld = &mlx5_local_data;
 461         int ret = 0;
 462
 463         if (mlx5_init_shared_data())
 464                 return -rte_errno;
 465         sd = mlx5_shared_data;
 466         MLX5_ASSERT(sd);
 467         rte_spinlock_lock(&sd->lock);
 468         switch (rte_eal_process_type()) {
 469         case RTE_PROC_PRIMARY:
 470                 if (sd->init_done)
 471                         break;
 472                 LIST_INIT(&sd->mem_event_cb_list);
 473                 rte_rwlock_init(&sd->mem_event_rwlock);
 474                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 475                                                 mlx5_mr_mem_event_cb, NULL);
 476                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 477                                            mlx5_mp_os_primary_handle);
 478                 if (ret)
 479                         goto out;
 480                 sd->init_done = true;
 481                 break;
 482         case RTE_PROC_SECONDARY:
 483                 if (ld->init_done)
 484                         break;
 485                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 486                                              mlx5_mp_os_secondary_handle);
 487                 if (ret)
 488                         goto out;
 489                 ++sd->secondary_cnt;
 490                 ld->init_done = true;
 491                 break;
 492         default:
 493                 break;
 494         }
 495 out:
 496         rte_spinlock_unlock(&sd->lock);
 497         return ret;
 498 }
 499
 500 /**
 501  * Create the Tx queue DevX/Verbs object.
 502  *
 503  * @param dev
 504  *   Pointer to Ethernet device.
 505  * @param idx
 506  *   Queue index in DPDK Tx queue array.
 507  *
 508  * @return
 509  *   0 on success, a negative errno value otherwise and rte_errno is set.
 510  */
 511 static int
 512 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 513 {
 514         struct mlx5_priv *priv = dev->data->dev_private;
 515         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 516         struct mlx5_txq_ctrl *txq_ctrl =
 517                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 518
 519         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 520                 return mlx5_txq_devx_obj_new(dev, idx);
 521 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 522         if (!priv->config.dv_esw_en)
 523                 return mlx5_txq_devx_obj_new(dev, idx);
 524 #endif
 525         return mlx5_txq_ibv_obj_new(dev, idx);
 526 }
 527
 528 /**
 529  * Release an Tx DevX/verbs queue object.
 530  *
 531  * @param txq_obj
 532  *   DevX/Verbs Tx queue object.
 533  */
 534 static void
 535 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 536 {
 537         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 538                 mlx5_txq_devx_obj_release(txq_obj);
 539                 return;
 540         }
 541 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 542         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 543                 mlx5_txq_devx_obj_release(txq_obj);
 544                 return;
 545         }
 546 #endif
 547         mlx5_txq_ibv_obj_release(txq_obj);
 548 }
 549
 550 /**
 551  * DV flow counter mode detect and config.
 552  *
 553  * @param dev
 554  *   Pointer to rte_eth_dev structure.
 555  *
 556  */
 557 static void
 558 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 559 {
 560 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 561         struct mlx5_priv *priv = dev->data->dev_private;
 562         struct mlx5_dev_ctx_shared *sh = priv->sh;
 563         bool fallback;
 564
 565 #ifndef HAVE_IBV_DEVX_ASYNC
 566         fallback = true;
 567 #else
 568         fallback = false;
 569         if (!priv->config.devx || !priv->config.dv_flow_en ||
 570             !priv->config.hca_attr.flow_counters_dump ||
 571             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 572             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 573                 fallback = true;
 574 #endif
 575         if (fallback)
 576                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 577                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 578                         priv->config.hca_attr.flow_counters_dump,
 579                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 580         /* Initialize fallback mode only on the port initializes sh. */
 581         if (sh->refcnt == 1)
 582                 sh->cmng.counter_fallback = fallback;
 583         else if (fallback != sh->cmng.counter_fallback)
 584                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 585                         "with others:%d.", PORT_ID(priv), fallback);
 586 #endif
 587 }
 588
 589 /**
 590  * Spawn an Ethernet device from Verbs information.
 591  *
 592  * @param dpdk_dev
 593  *   Backing DPDK device.
 594  * @param spawn
 595  *   Verbs device parameters (name, port, switch_info) to spawn.
 596  * @param config
 597  *   Device configuration parameters.
 598  *
 599  * @return
 600  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 601  *   is set. The following errors are defined:
 602  *
 603  *   EBUSY: device is not supposed to be spawned.
 604  *   EEXIST: device is already spawned
 605  */
 606 static struct rte_eth_dev *
 607 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 608                struct mlx5_dev_spawn_data *spawn,
 609                struct mlx5_dev_config *config)
 610 {
 611         const struct mlx5_switch_info *switch_info = &spawn->info;
 612         struct mlx5_dev_ctx_shared *sh = NULL;
 613         struct ibv_port_attr port_attr;
 614         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 615         struct rte_eth_dev *eth_dev = NULL;
 616         struct mlx5_priv *priv = NULL;
 617         int err = 0;
 618         unsigned int hw_padding = 0;
 619         unsigned int mps;
 620         unsigned int cqe_comp;
 621         unsigned int cqe_pad = 0;
 622         unsigned int tunnel_en = 0;
 623         unsigned int mpls_en = 0;
 624         unsigned int swp = 0;
 625         unsigned int mprq = 0;
 626         unsigned int mprq_min_stride_size_n = 0;
 627         unsigned int mprq_max_stride_size_n = 0;
 628         unsigned int mprq_min_stride_num_n = 0;
 629         unsigned int mprq_max_stride_num_n = 0;
 630         struct rte_ether_addr mac;
 631         char name[RTE_ETH_NAME_MAX_LEN];
 632         int own_domain_id = 0;
 633         uint16_t port_id;
 634         unsigned int i;
 635 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 636         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 637 #endif
 638
 639         /* Determine if this port representor is supposed to be spawned. */
 640         if (switch_info->representor && dpdk_dev->devargs) {
 641                 struct rte_eth_devargs eth_da;
 642
 643                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 644                 if (err) {
 645                         rte_errno = -err;
 646                         DRV_LOG(ERR, "failed to process device arguments: %s",
 647                                 strerror(rte_errno));
 648                         return NULL;
 649                 }
 650                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 651                         if (eth_da.representor_ports[i] ==
 652                             (uint16_t)switch_info->port_name)
 653                                 break;
 654                 if (i == eth_da.nb_representor_ports) {
 655                         rte_errno = EBUSY;
 656                         return NULL;
 657                 }
 658         }
 659         /* Build device name. */
 660         if (spawn->pf_bond <  0) {
 661                 /* Single device. */
 662                 if (!switch_info->representor)
 663                         strlcpy(name, dpdk_dev->name, sizeof(name));
 664                 else
 665                         snprintf(name, sizeof(name), "%s_representor_%u",
 666                                  dpdk_dev->name, switch_info->port_name);
 667         } else {
 668                 /* Bonding device. */
 669                 if (!switch_info->representor)
 670                         snprintf(name, sizeof(name), "%s_%s",
 671                                  dpdk_dev->name,
 672                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 673                 else
 674                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 675                                  dpdk_dev->name,
 676                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 677                                  switch_info->port_name);
 678         }
 679         /* check if the device is already spawned */
 680         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 681                 rte_errno = EEXIST;
 682                 return NULL;
 683         }
 684         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 685         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 686                 struct mlx5_mp_id mp_id;
 687
 688                 eth_dev = rte_eth_dev_attach_secondary(name);
 689                 if (eth_dev == NULL) {
 690                         DRV_LOG(ERR, "can not attach rte ethdev");
 691                         rte_errno = ENOMEM;
 692                         return NULL;
 693                 }
 694                 eth_dev->device = dpdk_dev;
 695                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 696                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 697                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 698                 err = mlx5_proc_priv_init(eth_dev);
 699                 if (err)
 700                         return NULL;
 701                 mp_id.port_id = eth_dev->data->port_id;
 702                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 703                 /* Receive command fd from primary process */
 704                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 705                 if (err < 0)
 706                         goto err_secondary;
 707                 /* Remap UAR for Tx queues. */
 708                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 709                 if (err)
 710                         goto err_secondary;
 711                 /*
 712                  * Ethdev pointer is still required as input since
 713                  * the primary device is not accessible from the
 714                  * secondary process.
 715                  */
 716                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 717                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 718                 return eth_dev;
 719 err_secondary:
 720                 mlx5_dev_close(eth_dev);
 721                 return NULL;
 722         }
 723         /*
 724          * Some parameters ("tx_db_nc" in particularly) are needed in
 725          * advance to create dv/verbs device context. We proceed the
 726          * devargs here to get ones, and later proceed devargs again
 727          * to override some hardware settings.
 728          */
 729         err = mlx5_args(config, dpdk_dev->devargs);
 730         if (err) {
 731                 err = rte_errno;
 732                 DRV_LOG(ERR, "failed to process device arguments: %s",
 733                         strerror(rte_errno));
 734                 goto error;
 735         }
 736         mlx5_malloc_mem_select(config->sys_mem_en);
 737         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 738         if (!sh)
 739                 return NULL;
 740         config->devx = sh->devx;
 741 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 742         config->dest_tir = 1;
 743 #endif
 744 #ifdef HAVE_IBV_MLX5_MOD_SWP
 745         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 746 #endif
 747         /*
 748          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 749          * as all ConnectX-5 devices.
 750          */
 751 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 752         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 753 #endif
 754 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 755         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 756 #endif
 757         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 758         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 759                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 760                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 761                         mps = MLX5_MPW_ENHANCED;
 762                 } else {
 763                         DRV_LOG(DEBUG, "MPW is supported");
 764                         mps = MLX5_MPW;
 765                 }
 766         } else {
 767                 DRV_LOG(DEBUG, "MPW isn't supported");
 768                 mps = MLX5_MPW_DISABLED;
 769         }
 770 #ifdef HAVE_IBV_MLX5_MOD_SWP
 771         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 772                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 773         DRV_LOG(DEBUG, "SWP support: %u", swp);
 774 #endif
 775         config->swp = !!swp;
 776 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 777         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 778                 struct mlx5dv_striding_rq_caps mprq_caps =
 779                         dv_attr.striding_rq_caps;
 780
 781                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 782                         mprq_caps.min_single_stride_log_num_of_bytes);
 783                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 784                         mprq_caps.max_single_stride_log_num_of_bytes);
 785                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 786                         mprq_caps.min_single_wqe_log_num_of_strides);
 787                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 788                         mprq_caps.max_single_wqe_log_num_of_strides);
 789                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 790                         mprq_caps.supported_qpts);
 791                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 792                 mprq = 1;
 793                 mprq_min_stride_size_n =
 794                         mprq_caps.min_single_stride_log_num_of_bytes;
 795                 mprq_max_stride_size_n =
 796                         mprq_caps.max_single_stride_log_num_of_bytes;
 797                 mprq_min_stride_num_n =
 798                         mprq_caps.min_single_wqe_log_num_of_strides;
 799                 mprq_max_stride_num_n =
 800                         mprq_caps.max_single_wqe_log_num_of_strides;
 801         }
 802 #endif
 803         if (RTE_CACHE_LINE_SIZE == 128 &&
 804             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 805                 cqe_comp = 0;
 806         else
 807                 cqe_comp = 1;
 808         config->cqe_comp = cqe_comp;
 809 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 810         /* Whether device supports 128B Rx CQE padding. */
 811         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 812                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 813 #endif
 814 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 815         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 816                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 817                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 818                              (dv_attr.tunnel_offloads_caps &
 819                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 820                              (dv_attr.tunnel_offloads_caps &
 821                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 822         }
 823         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 824                 tunnel_en ? "" : "not ");
 825 #else
 826         DRV_LOG(WARNING,
 827                 "tunnel offloading disabled due to old OFED/rdma-core version");
 828 #endif
 829         config->tunnel_en = tunnel_en;
 830 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 831         mpls_en = ((dv_attr.tunnel_offloads_caps &
 832                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 833                    (dv_attr.tunnel_offloads_caps &
 834                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 835         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 836                 mpls_en ? "" : "not ");
 837 #else
 838         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 839                 " old OFED/rdma-core version or firmware configuration");
 840 #endif
 841         config->mpls_en = mpls_en;
 842         /* Check port status. */
 843         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 844         if (err) {
 845                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 846                 goto error;
 847         }
 848         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 849                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 850                 err = EINVAL;
 851                 goto error;
 852         }
 853         if (port_attr.state != IBV_PORT_ACTIVE)
 854                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 855                         mlx5_glue->port_state_str(port_attr.state),
 856                         port_attr.state);
 857         /* Allocate private eth device data. */
 858         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 859                            sizeof(*priv),
 860                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 861         if (priv == NULL) {
 862                 DRV_LOG(ERR, "priv allocation failure");
 863                 err = ENOMEM;
 864                 goto error;
 865         }
 866         priv->sh = sh;
 867         priv->dev_port = spawn->phys_port;
 868         priv->pci_dev = spawn->pci_dev;
 869         priv->mtu = RTE_ETHER_MTU;
 870         priv->mp_id.port_id = port_id;
 871         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 872         /* Some internal functions rely on Netlink sockets, open them now. */
 873         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 874         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 875         priv->representor = !!switch_info->representor;
 876         priv->master = !!switch_info->master;
 877         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 878         priv->vport_meta_tag = 0;
 879         priv->vport_meta_mask = 0;
 880         priv->pf_bond = spawn->pf_bond;
 881 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 882         /*
 883          * The DevX port query API is implemented. E-Switch may use
 884          * either vport or reg_c[0] metadata register to match on
 885          * vport index. The engaged part of metadata register is
 886          * defined by mask.
 887          */
 888         if (switch_info->representor || switch_info->master) {
 889                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 890                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 891                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 892                                                  &devx_port);
 893                 if (err) {
 894                         DRV_LOG(WARNING,
 895                                 "can't query devx port %d on device %s",
 896                                 spawn->phys_port,
 897                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 898                         devx_port.comp_mask = 0;
 899                 }
 900         }
 901         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 902                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 903                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 904                 if (!priv->vport_meta_mask) {
 905                         DRV_LOG(ERR, "vport zero mask for port %d"
 906                                      " on bonding device %s",
 907                                      spawn->phys_port,
 908                                      mlx5_os_get_dev_device_name
 909                                                         (spawn->phys_dev));
 910                         err = ENOTSUP;
 911                         goto error;
 912                 }
 913                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 914                         DRV_LOG(ERR, "invalid vport tag for port %d"
 915                                      " on bonding device %s",
 916                                      spawn->phys_port,
 917                                      mlx5_os_get_dev_device_name
 918                                                         (spawn->phys_dev));
 919                         err = ENOTSUP;
 920                         goto error;
 921                 }
 922         }
 923         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 924                 priv->vport_id = devx_port.vport_num;
 925         } else if (spawn->pf_bond >= 0) {
 926                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 927                              " on bonding device %s",
 928                              spawn->phys_port,
 929                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 930                 err = ENOTSUP;
 931                 goto error;
 932         } else {
 933                 /* Suppose vport index in compatible way. */
 934                 priv->vport_id = switch_info->representor ?
 935                                  switch_info->port_name + 1 : -1;
 936         }
 937 #else
 938         /*
 939          * Kernel/rdma_core support single E-Switch per PF configurations
 940          * only and vport_id field contains the vport index for
 941          * associated VF, which is deduced from representor port name.
 942          * For example, let's have the IB device port 10, it has
 943          * attached network device eth0, which has port name attribute
 944          * pf0vf2, we can deduce the VF number as 2, and set vport index
 945          * as 3 (2+1). This assigning schema should be changed if the
 946          * multiple E-Switch instances per PF configurations or/and PCI
 947          * subfunctions are added.
 948          */
 949         priv->vport_id = switch_info->representor ?
 950                          switch_info->port_name + 1 : -1;
 951 #endif
 952         /* representor_id field keeps the unmodified VF index. */
 953         priv->representor_id = switch_info->representor ?
 954                                switch_info->port_name : -1;
 955         /*
 956          * Look for sibling devices in order to reuse their switch domain
 957          * if any, otherwise allocate one.
 958          */
 959         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 960                 const struct mlx5_priv *opriv =
 961                         rte_eth_devices[port_id].data->dev_private;
 962
 963                 if (!opriv ||
 964                     opriv->sh != priv->sh ||
 965                         opriv->domain_id ==
 966                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 967                         continue;
 968                 priv->domain_id = opriv->domain_id;
 969                 break;
 970         }
 971         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 972                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 973                 if (err) {
 974                         err = rte_errno;
 975                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 976                                 strerror(rte_errno));
 977                         goto error;
 978                 }
 979                 own_domain_id = 1;
 980         }
 981         /* Override some values set by hardware configuration. */
 982         mlx5_args(config, dpdk_dev->devargs);
 983         err = mlx5_dev_check_sibling_config(priv, config);
 984         if (err)
 985                 goto error;
 986         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
 987                             IBV_DEVICE_RAW_IP_CSUM);
 988         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 989                 (config->hw_csum ? "" : "not "));
 990 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 991         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
 992         DRV_LOG(DEBUG, "counters are not supported");
 993 #endif
 994 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 995         if (config->dv_flow_en) {
 996                 DRV_LOG(WARNING, "DV flow is not supported");
 997                 config->dv_flow_en = 0;
 998         }
 999 #endif
1000         config->ind_table_max_size =
1001                 sh->device_attr.max_rwq_indirection_table_size;
1002         /*
1003          * Remove this check once DPDK supports larger/variable
1004          * indirection tables.
1005          */
1006         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1007                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1008         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1009                 config->ind_table_max_size);
1010         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1011                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1012         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1013                 (config->hw_vlan_strip ? "" : "not "));
1014         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1015                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1016 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1017         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1018 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1019         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1020                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1021 #endif
1022         if (config->hw_padding && !hw_padding) {
1023                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1024                 config->hw_padding = 0;
1025         } else if (config->hw_padding) {
1026                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1027         }
1028         config->tso = (sh->device_attr.max_tso > 0 &&
1029                       (sh->device_attr.tso_supported_qpts &
1030                        (1 << IBV_QPT_RAW_PACKET)));
1031         if (config->tso)
1032                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1033         /*
1034          * MPW is disabled by default, while the Enhanced MPW is enabled
1035          * by default.
1036          */
1037         if (config->mps == MLX5_ARG_UNSET)
1038                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1039                                                           MLX5_MPW_DISABLED;
1040         else
1041                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1042         DRV_LOG(INFO, "%sMPS is %s",
1043                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1044                 config->mps == MLX5_MPW ? "legacy " : "",
1045                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1046         if (config->cqe_comp && !cqe_comp) {
1047                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1048                 config->cqe_comp = 0;
1049         }
1050         if (config->cqe_pad && !cqe_pad) {
1051                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1052                 config->cqe_pad = 0;
1053         } else if (config->cqe_pad) {
1054                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1055         }
1056         if (config->devx) {
1057                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1058                 if (err) {
1059                         err = -err;
1060                         goto error;
1061                 }
1062                 /* Check relax ordering support. */
1063                 if (config->hca_attr.relaxed_ordering_write &&
1064                     config->hca_attr.relaxed_ordering_read  &&
1065                     !haswell_broadwell_cpu)
1066                         sh->cmng.relaxed_ordering = 1;
1067                 /* Check for LRO support. */
1068                 if (config->dest_tir && config->hca_attr.lro_cap &&
1069                     config->dv_flow_en) {
1070                         /* TBD check tunnel lro caps. */
1071                         config->lro.supported = config->hca_attr.lro_cap;
1072                         DRV_LOG(DEBUG, "Device supports LRO");
1073                         /*
1074                          * If LRO timeout is not configured by application,
1075                          * use the minimal supported value.
1076                          */
1077                         if (!config->lro.timeout)
1078                                 config->lro.timeout =
1079                                 config->hca_attr.lro_timer_supported_periods[0];
1080                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1081                                 config->lro.timeout);
1082                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1083                                 "required for coalescing is %d bytes",
1084                                 config->hca_attr.lro_min_mss_size);
1085                 }
1086 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1087                 if (config->hca_attr.qos.sup &&
1088                     config->hca_attr.qos.srtcm_sup &&
1089                     config->dv_flow_en) {
1090                         uint8_t reg_c_mask =
1091                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1092                         /*
1093                          * Meter needs two REG_C's for color match and pre-sfx
1094                          * flow match. Here get the REG_C for color match.
1095                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1096                          */
1097                         reg_c_mask &= 0xfc;
1098                         if (__builtin_popcount(reg_c_mask) < 1) {
1099                                 priv->mtr_en = 0;
1100                                 DRV_LOG(WARNING, "No available register for"
1101                                         " meter.");
1102                         } else {
1103                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1104                                                       REG_C_0;
1105                                 priv->mtr_en = 1;
1106                                 priv->mtr_reg_share =
1107                                       config->hca_attr.qos.flow_meter_reg_share;
1108                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1109                                         priv->mtr_color_reg);
1110                         }
1111                 }
1112 #endif
1113 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1114                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1115                     config->dv_flow_en) {
1116                         priv->sampler_en = 1;
1117                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1118                 } else {
1119                         priv->sampler_en = 0;
1120                         if (!config->hca_attr.log_max_ft_sampler_num)
1121                                 DRV_LOG(WARNING, "No available register for"
1122                                                 " Sampler.");
1123                         else
1124                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1125                 }
1126 #endif
1127         }
1128         if (config->tx_pp) {
1129                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1130                         config->hca_attr.dev_freq_khz);
1131                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1132                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1133                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1134                         config->hca_attr.cross_channel ? "" : "not ");
1135                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1136                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1137                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1138                         config->hca_attr.non_wire_sq ? "" : "not ");
1139                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1140                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1141                         config->hca_attr.log_max_static_sq_wq);
1142                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1143                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1144                 if (!config->devx) {
1145                         DRV_LOG(ERR, "DevX is required for packet pacing");
1146                         err = ENODEV;
1147                         goto error;
1148                 }
1149                 if (!config->hca_attr.qos.packet_pacing) {
1150                         DRV_LOG(ERR, "Packet pacing is not supported");
1151                         err = ENODEV;
1152                         goto error;
1153                 }
1154                 if (!config->hca_attr.cross_channel) {
1155                         DRV_LOG(ERR, "Cross channel operations are"
1156                                      " required for packet pacing");
1157                         err = ENODEV;
1158                         goto error;
1159                 }
1160                 if (!config->hca_attr.wqe_index_ignore) {
1161                         DRV_LOG(ERR, "WQE index ignore feature is"
1162                                      " required for packet pacing");
1163                         err = ENODEV;
1164                         goto error;
1165                 }
1166                 if (!config->hca_attr.non_wire_sq) {
1167                         DRV_LOG(ERR, "Non-wire SQ feature is"
1168                                      " required for packet pacing");
1169                         err = ENODEV;
1170                         goto error;
1171                 }
1172                 if (!config->hca_attr.log_max_static_sq_wq) {
1173                         DRV_LOG(ERR, "Static WQE SQ feature is"
1174                                      " required for packet pacing");
1175                         err = ENODEV;
1176                         goto error;
1177                 }
1178                 if (!config->hca_attr.qos.wqe_rate_pp) {
1179                         DRV_LOG(ERR, "WQE rate mode is required"
1180                                      " for packet pacing");
1181                         err = ENODEV;
1182                         goto error;
1183                 }
1184 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1185                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1186                              " can't create queues for packet pacing");
1187                 err = ENODEV;
1188                 goto error;
1189 #endif
1190         }
1191         if (config->devx) {
1192                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1193
1194                 err = config->hca_attr.access_register_user ?
1195                         mlx5_devx_cmd_register_read
1196                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1197                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1198                 if (!err) {
1199                         uint32_t ts_mode;
1200
1201                         /* MTUTC register is read successfully. */
1202                         ts_mode = MLX5_GET(register_mtutc, reg,
1203                                            time_stamp_mode);
1204                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1205                                 config->rt_timestamp = 1;
1206                 } else {
1207                         /* Kernel does not support register reading. */
1208                         if (config->hca_attr.dev_freq_khz ==
1209                                                  (NS_PER_S / MS_PER_S))
1210                                 config->rt_timestamp = 1;
1211                 }
1212         }
1213         /*
1214          * If HW has bug working with tunnel packet decapsulation and
1215          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1216          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1217          */
1218         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1219                 config->hw_fcs_strip = 0;
1220         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1221                 (config->hw_fcs_strip ? "" : "not "));
1222         if (config->mprq.enabled && mprq) {
1223                 if (config->mprq.stride_num_n &&
1224                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1225                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1226                         config->mprq.stride_num_n =
1227                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1228                                                 mprq_min_stride_num_n),
1229                                         mprq_max_stride_num_n);
1230                         DRV_LOG(WARNING,
1231                                 "the number of strides"
1232                                 " for Multi-Packet RQ is out of range,"
1233                                 " setting default value (%u)",
1234                                 1 << config->mprq.stride_num_n);
1235                 }
1236                 if (config->mprq.stride_size_n &&
1237                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1238                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1239                         config->mprq.stride_size_n =
1240                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1241                                                 mprq_min_stride_size_n),
1242                                         mprq_max_stride_size_n);
1243                         DRV_LOG(WARNING,
1244                                 "the size of a stride"
1245                                 " for Multi-Packet RQ is out of range,"
1246                                 " setting default value (%u)",
1247                                 1 << config->mprq.stride_size_n);
1248                 }
1249                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1250                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1251         } else if (config->mprq.enabled && !mprq) {
1252                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1253                 config->mprq.enabled = 0;
1254         }
1255         if (config->max_dump_files_num == 0)
1256                 config->max_dump_files_num = 128;
1257         eth_dev = rte_eth_dev_allocate(name);
1258         if (eth_dev == NULL) {
1259                 DRV_LOG(ERR, "can not allocate rte ethdev");
1260                 err = ENOMEM;
1261                 goto error;
1262         }
1263         if (priv->representor) {
1264                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1265                 eth_dev->data->representor_id = priv->representor_id;
1266         }
1267         /*
1268          * Store associated network device interface index. This index
1269          * is permanent throughout the lifetime of device. So, we may store
1270          * the ifindex here and use the cached value further.
1271          */
1272         MLX5_ASSERT(spawn->ifindex);
1273         priv->if_index = spawn->ifindex;
1274         if (priv->pf_bond >= 0 && priv->master) {
1275                 /* Get bond interface info */
1276                 err = mlx5_sysfs_bond_info(priv->if_index,
1277                                      &priv->bond_ifindex,
1278                                      priv->bond_name);
1279                 if (err)
1280                         DRV_LOG(ERR, "unable to get bond info: %s",
1281                                 strerror(rte_errno));
1282                 else
1283                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1284                                 priv->if_index, priv->bond_ifindex,
1285                                 priv->bond_name);
1286         }
1287         eth_dev->data->dev_private = priv;
1288         priv->dev_data = eth_dev->data;
1289         eth_dev->data->mac_addrs = priv->mac;
1290         eth_dev->device = dpdk_dev;
1291         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1292         /* Configure the first MAC address by default. */
1293         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1294                 DRV_LOG(ERR,
1295                         "port %u cannot get MAC address, is mlx5_en"
1296                         " loaded? (errno: %s)",
1297                         eth_dev->data->port_id, strerror(rte_errno));
1298                 err = ENODEV;
1299                 goto error;
1300         }
1301         DRV_LOG(INFO,
1302                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1303                 eth_dev->data->port_id,
1304                 mac.addr_bytes[0], mac.addr_bytes[1],
1305                 mac.addr_bytes[2], mac.addr_bytes[3],
1306                 mac.addr_bytes[4], mac.addr_bytes[5]);
1307 #ifdef RTE_LIBRTE_MLX5_DEBUG
1308         {
1309                 char ifname[IF_NAMESIZE];
1310
1311                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1312                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1313                                 eth_dev->data->port_id, ifname);
1314                 else
1315                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1316                                 eth_dev->data->port_id);
1317         }
1318 #endif
1319         /* Get actual MTU if possible. */
1320         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1321         if (err) {
1322                 err = rte_errno;
1323                 goto error;
1324         }
1325         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1326                 priv->mtu);
1327         /* Initialize burst functions to prevent crashes before link-up. */
1328         eth_dev->rx_pkt_burst = removed_rx_burst;
1329         eth_dev->tx_pkt_burst = removed_tx_burst;
1330         eth_dev->dev_ops = &mlx5_os_dev_ops;
1331         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1332         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1333         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1334         /* Register MAC address. */
1335         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1336         if (config->vf && config->vf_nl_en)
1337                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1338                                       mlx5_ifindex(eth_dev),
1339                                       eth_dev->data->mac_addrs,
1340                                       MLX5_MAX_MAC_ADDRESSES);
1341         priv->flows = 0;
1342         priv->ctrl_flows = 0;
1343         TAILQ_INIT(&priv->flow_meters);
1344         TAILQ_INIT(&priv->flow_meter_profiles);
1345         /* Hint libmlx5 to use PMD allocator for data plane resources */
1346         mlx5_glue->dv_set_context_attr(sh->ctx,
1347                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1348                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1349                                 .alloc = &mlx5_alloc_verbs_buf,
1350                                 .free = &mlx5_free_verbs_buf,
1351                                 .data = priv,
1352                         }));
1353         /* Bring Ethernet device up. */
1354         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1355                 eth_dev->data->port_id);
1356         mlx5_set_link_up(eth_dev);
1357         /*
1358          * Even though the interrupt handler is not installed yet,
1359          * interrupts will still trigger on the async_fd from
1360          * Verbs context returned by ibv_open_device().
1361          */
1362         mlx5_link_update(eth_dev, 0);
1363 #ifdef HAVE_MLX5DV_DR_ESWITCH
1364         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1365               (switch_info->representor || switch_info->master)))
1366                 config->dv_esw_en = 0;
1367 #else
1368         config->dv_esw_en = 0;
1369 #endif
1370         /* Detect minimal data bytes to inline. */
1371         mlx5_set_min_inline(spawn, config);
1372         /* Store device configuration on private structure. */
1373         priv->config = *config;
1374         /* Create context for virtual machine VLAN workaround. */
1375         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1376         if (config->dv_flow_en) {
1377                 err = mlx5_alloc_shared_dr(priv);
1378                 if (err)
1379                         goto error;
1380                 /*
1381                  * RSS id is shared with meter flow id. Meter flow id can only
1382                  * use the 24 MSB of the register.
1383                  */
1384                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1385                                      MLX5_MTR_COLOR_BITS);
1386                 if (!priv->qrss_id_pool) {
1387                         DRV_LOG(ERR, "can't create flow id pool");
1388                         err = ENOMEM;
1389                         goto error;
1390                 }
1391         }
1392         if (config->devx && config->dv_flow_en && config->dest_tir) {
1393                 priv->obj_ops = devx_obj_ops;
1394                 priv->obj_ops.drop_action_create =
1395                                                 ibv_obj_ops.drop_action_create;
1396                 priv->obj_ops.drop_action_destroy =
1397                                                 ibv_obj_ops.drop_action_destroy;
1398 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1399                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1400 #else
1401                 if (config->dv_esw_en)
1402                         priv->obj_ops.txq_obj_modify =
1403                                                 ibv_obj_ops.txq_obj_modify;
1404 #endif
1405                 /* Use specific wrappers for Tx object. */
1406                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1407                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1408
1409         } else {
1410                 priv->obj_ops = ibv_obj_ops;
1411         }
1412         /* Supported Verbs flow priority number detection. */
1413         err = mlx5_flow_discover_priorities(eth_dev);
1414         if (err < 0) {
1415                 err = -err;
1416                 goto error;
1417         }
1418         priv->config.flow_prio = err;
1419         if (!priv->config.dv_esw_en &&
1420             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1421                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1422                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1423                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1424         }
1425         mlx5_set_metadata_mask(eth_dev);
1426         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1427             !priv->sh->dv_regc0_mask) {
1428                 DRV_LOG(ERR, "metadata mode %u is not supported "
1429                              "(no metadata reg_c[0] is available)",
1430                              priv->config.dv_xmeta_en);
1431                         err = ENOTSUP;
1432                         goto error;
1433         }
1434         /*
1435          * Allocate the buffer for flow creating, just once.
1436          * The allocation must be done before any flow creating.
1437          */
1438         mlx5_flow_alloc_intermediate(eth_dev);
1439         /* Query availability of metadata reg_c's. */
1440         err = mlx5_flow_discover_mreg_c(eth_dev);
1441         if (err < 0) {
1442                 err = -err;
1443                 goto error;
1444         }
1445         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1446                 DRV_LOG(DEBUG,
1447                         "port %u extensive metadata register is not supported",
1448                         eth_dev->data->port_id);
1449                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1450                         DRV_LOG(ERR, "metadata mode %u is not supported "
1451                                      "(no metadata registers available)",
1452                                      priv->config.dv_xmeta_en);
1453                         err = ENOTSUP;
1454                         goto error;
1455                 }
1456         }
1457         if (priv->config.dv_flow_en &&
1458             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1459             mlx5_flow_ext_mreg_supported(eth_dev) &&
1460             priv->sh->dv_regc0_mask) {
1461                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1462                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1463                 if (!priv->mreg_cp_tbl) {
1464                         err = ENOMEM;
1465                         goto error;
1466                 }
1467         }
1468         mlx5_flow_counter_mode_config(eth_dev);
1469         return eth_dev;
1470 error:
1471         if (priv) {
1472                 if (priv->mreg_cp_tbl)
1473                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1474                 if (priv->sh)
1475                         mlx5_os_free_shared_dr(priv);
1476                 if (priv->nl_socket_route >= 0)
1477                         close(priv->nl_socket_route);
1478                 if (priv->nl_socket_rdma >= 0)
1479                         close(priv->nl_socket_rdma);
1480                 if (priv->vmwa_context)
1481                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1482                 if (priv->qrss_id_pool)
1483                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1484                 if (own_domain_id)
1485                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1486                 mlx5_free(priv);
1487                 if (eth_dev != NULL)
1488                         eth_dev->data->dev_private = NULL;
1489         }
1490         if (eth_dev != NULL) {
1491                 /* mac_addrs must not be freed alone because part of
1492                  * dev_private
1493                  **/
1494                 eth_dev->data->mac_addrs = NULL;
1495                 rte_eth_dev_release_port(eth_dev);
1496         }
1497         if (sh)
1498                 mlx5_free_shared_dev_ctx(sh);
1499         MLX5_ASSERT(err > 0);
1500         rte_errno = err;
1501         return NULL;
1502 }
1503
1504 /**
1505  * Comparison callback to sort device data.
1506  *
1507  * This is meant to be used with qsort().
1508  *
1509  * @param a[in]
1510  *   Pointer to pointer to first data object.
1511  * @param b[in]
1512  *   Pointer to pointer to second data object.
1513  *
1514  * @return
1515  *   0 if both objects are equal, less than 0 if the first argument is less
1516  *   than the second, greater than 0 otherwise.
1517  */
1518 static int
1519 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1520 {
1521         const struct mlx5_switch_info *si_a =
1522                 &((const struct mlx5_dev_spawn_data *)a)->info;
1523         const struct mlx5_switch_info *si_b =
1524                 &((const struct mlx5_dev_spawn_data *)b)->info;
1525         int ret;
1526
1527         /* Master device first. */
1528         ret = si_b->master - si_a->master;
1529         if (ret)
1530                 return ret;
1531         /* Then representor devices. */
1532         ret = si_b->representor - si_a->representor;
1533         if (ret)
1534                 return ret;
1535         /* Unidentified devices come last in no specific order. */
1536         if (!si_a->representor)
1537                 return 0;
1538         /* Order representors by name. */
1539         return si_a->port_name - si_b->port_name;
1540 }
1541
1542 /**
1543  * Match PCI information for possible slaves of bonding device.
1544  *
1545  * @param[in] ibv_dev
1546  *   Pointer to Infiniband device structure.
1547  * @param[in] pci_dev
1548  *   Pointer to PCI device structure to match PCI address.
1549  * @param[in] nl_rdma
1550  *   Netlink RDMA group socket handle.
1551  *
1552  * @return
1553  *   negative value if no bonding device found, otherwise
1554  *   positive index of slave PF in bonding.
1555  */
1556 static int
1557 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1558                            const struct rte_pci_device *pci_dev,
1559                            int nl_rdma)
1560 {
1561         char ifname[IF_NAMESIZE + 1];
1562         unsigned int ifindex;
1563         unsigned int np, i;
1564         FILE *file = NULL;
1565         int pf = -1;
1566
1567         /*
1568          * Try to get master device name. If something goes
1569          * wrong suppose the lack of kernel support and no
1570          * bonding devices.
1571          */
1572         if (nl_rdma < 0)
1573                 return -1;
1574         if (!strstr(ibv_dev->name, "bond"))
1575                 return -1;
1576         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1577         if (!np)
1578                 return -1;
1579         /*
1580          * The Master device might not be on the predefined
1581          * port (not on port index 1, it is not garanted),
1582          * we have to scan all Infiniband device port and
1583          * find master.
1584          */
1585         for (i = 1; i <= np; ++i) {
1586                 /* Check whether Infiniband port is populated. */
1587                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1588                 if (!ifindex)
1589                         continue;
1590                 if (!if_indextoname(ifindex, ifname))
1591                         continue;
1592                 /* Try to read bonding slave names from sysfs. */
1593                 MKSTR(slaves,
1594                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1595                 file = fopen(slaves, "r");
1596                 if (file)
1597                         break;
1598         }
1599         if (!file)
1600                 return -1;
1601         /* Use safe format to check maximal buffer length. */
1602         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1603         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1604                 char tmp_str[IF_NAMESIZE + 32];
1605                 struct rte_pci_addr pci_addr;
1606                 struct mlx5_switch_info info;
1607
1608                 /* Process slave interface names in the loop. */
1609                 snprintf(tmp_str, sizeof(tmp_str),
1610                          "/sys/class/net/%s", ifname);
1611                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1612                         DRV_LOG(WARNING, "can not get PCI address"
1613                                          " for netdev \"%s\"", ifname);
1614                         continue;
1615                 }
1616                 if (pci_dev->addr.domain != pci_addr.domain ||
1617                     pci_dev->addr.bus != pci_addr.bus ||
1618                     pci_dev->addr.devid != pci_addr.devid ||
1619                     pci_dev->addr.function != pci_addr.function)
1620                         continue;
1621                 /* Slave interface PCI address match found. */
1622                 fclose(file);
1623                 snprintf(tmp_str, sizeof(tmp_str),
1624                          "/sys/class/net/%s/phys_port_name", ifname);
1625                 file = fopen(tmp_str, "rb");
1626                 if (!file)
1627                         break;
1628                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1629                 if (fscanf(file, "%32s", tmp_str) == 1)
1630                         mlx5_translate_port_name(tmp_str, &info);
1631                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1632                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1633                         pf = info.port_name;
1634                 break;
1635         }
1636         if (file)
1637                 fclose(file);
1638         return pf;
1639 }
1640
1641 /**
1642  * DPDK callback to register a PCI device.
1643  *
1644  * This function spawns Ethernet devices out of a given PCI device.
1645  *
1646  * @param[in] pci_drv
1647  *   PCI driver structure (mlx5_driver).
1648  * @param[in] pci_dev
1649  *   PCI device information.
1650  *
1651  * @return
1652  *   0 on success, a negative errno value otherwise and rte_errno is set.
1653  */
1654 int
1655 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1656                   struct rte_pci_device *pci_dev)
1657 {
1658         struct ibv_device **ibv_list;
1659         /*
1660          * Number of found IB Devices matching with requested PCI BDF.
1661          * nd != 1 means there are multiple IB devices over the same
1662          * PCI device and we have representors and master.
1663          */
1664         unsigned int nd = 0;
1665         /*
1666          * Number of found IB device Ports. nd = 1 and np = 1..n means
1667          * we have the single multiport IB device, and there may be
1668          * representors attached to some of found ports.
1669          */
1670         unsigned int np = 0;
1671         /*
1672          * Number of DPDK ethernet devices to Spawn - either over
1673          * multiple IB devices or multiple ports of single IB device.
1674          * Actually this is the number of iterations to spawn.
1675          */
1676         unsigned int ns = 0;
1677         /*
1678          * Bonding device
1679          *   < 0 - no bonding device (single one)
1680          *  >= 0 - bonding device (value is slave PF index)
1681          */
1682         int bd = -1;
1683         struct mlx5_dev_spawn_data *list = NULL;
1684         struct mlx5_dev_config dev_config;
1685         unsigned int dev_config_vf;
1686         int ret;
1687
1688         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1689                 mlx5_pmd_socket_init();
1690         ret = mlx5_init_once();
1691         if (ret) {
1692                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1693                         strerror(rte_errno));
1694                 return -rte_errno;
1695         }
1696         errno = 0;
1697         ibv_list = mlx5_glue->get_device_list(&ret);
1698         if (!ibv_list) {
1699                 rte_errno = errno ? errno : ENOSYS;
1700                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1701                 return -rte_errno;
1702         }
1703         /*
1704          * First scan the list of all Infiniband devices to find
1705          * matching ones, gathering into the list.
1706          */
1707         struct ibv_device *ibv_match[ret + 1];
1708         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1709         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1710         unsigned int i;
1711
1712         while (ret-- > 0) {
1713                 struct rte_pci_addr pci_addr;
1714
1715                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1716                 bd = mlx5_device_bond_pci_match
1717                                 (ibv_list[ret], pci_dev, nl_rdma);
1718                 if (bd >= 0) {
1719                         /*
1720                          * Bonding device detected. Only one match is allowed,
1721                          * the bonding is supported over multi-port IB device,
1722                          * there should be no matches on representor PCI
1723                          * functions or non VF LAG bonding devices with
1724                          * specified address.
1725                          */
1726                         if (nd) {
1727                                 DRV_LOG(ERR,
1728                                         "multiple PCI match on bonding device"
1729                                         "\"%s\" found", ibv_list[ret]->name);
1730                                 rte_errno = ENOENT;
1731                                 ret = -rte_errno;
1732                                 goto exit;
1733                         }
1734                         DRV_LOG(INFO, "PCI information matches for"
1735                                       " slave %d bonding device \"%s\"",
1736                                       bd, ibv_list[ret]->name);
1737                         ibv_match[nd++] = ibv_list[ret];
1738                         break;
1739                 }
1740                 if (mlx5_dev_to_pci_addr
1741                         (ibv_list[ret]->ibdev_path, &pci_addr))
1742                         continue;
1743                 if (pci_dev->addr.domain != pci_addr.domain ||
1744                     pci_dev->addr.bus != pci_addr.bus ||
1745                     pci_dev->addr.devid != pci_addr.devid ||
1746                     pci_dev->addr.function != pci_addr.function)
1747                         continue;
1748                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1749                         ibv_list[ret]->name);
1750                 ibv_match[nd++] = ibv_list[ret];
1751         }
1752         ibv_match[nd] = NULL;
1753         if (!nd) {
1754                 /* No device matches, just complain and bail out. */
1755                 DRV_LOG(WARNING,
1756                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1757                         " are kernel drivers loaded?",
1758                         pci_dev->addr.domain, pci_dev->addr.bus,
1759                         pci_dev->addr.devid, pci_dev->addr.function);
1760                 rte_errno = ENOENT;
1761                 ret = -rte_errno;
1762                 goto exit;
1763         }
1764         if (nd == 1) {
1765                 /*
1766                  * Found single matching device may have multiple ports.
1767                  * Each port may be representor, we have to check the port
1768                  * number and check the representors existence.
1769                  */
1770                 if (nl_rdma >= 0)
1771                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1772                 if (!np)
1773                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1774                                          " ports number", ibv_match[0]->name);
1775                 if (bd >= 0 && !np) {
1776                         DRV_LOG(ERR, "can not get ports"
1777                                      " for bonding device");
1778                         rte_errno = ENOENT;
1779                         ret = -rte_errno;
1780                         goto exit;
1781                 }
1782         }
1783 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1784         if (bd >= 0) {
1785                 /*
1786                  * This may happen if there is VF LAG kernel support and
1787                  * application is compiled with older rdma_core library.
1788                  */
1789                 DRV_LOG(ERR,
1790                         "No kernel/verbs support for VF LAG bonding found.");
1791                 rte_errno = ENOTSUP;
1792                 ret = -rte_errno;
1793                 goto exit;
1794         }
1795 #endif
1796         /*
1797          * Now we can determine the maximal
1798          * amount of devices to be spawned.
1799          */
1800         list = mlx5_malloc(MLX5_MEM_ZERO,
1801                            sizeof(struct mlx5_dev_spawn_data) *
1802                            (np ? np : nd),
1803                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1804         if (!list) {
1805                 DRV_LOG(ERR, "spawn data array allocation failure");
1806                 rte_errno = ENOMEM;
1807                 ret = -rte_errno;
1808                 goto exit;
1809         }
1810         if (bd >= 0 || np > 1) {
1811                 /*
1812                  * Single IB device with multiple ports found,
1813                  * it may be E-Switch master device and representors.
1814                  * We have to perform identification through the ports.
1815                  */
1816                 MLX5_ASSERT(nl_rdma >= 0);
1817                 MLX5_ASSERT(ns == 0);
1818                 MLX5_ASSERT(nd == 1);
1819                 MLX5_ASSERT(np);
1820                 for (i = 1; i <= np; ++i) {
1821                         list[ns].max_port = np;
1822                         list[ns].phys_port = i;
1823                         list[ns].phys_dev = ibv_match[0];
1824                         list[ns].eth_dev = NULL;
1825                         list[ns].pci_dev = pci_dev;
1826                         list[ns].pf_bond = bd;
1827                         list[ns].ifindex = mlx5_nl_ifindex
1828                                 (nl_rdma,
1829                                 mlx5_os_get_dev_device_name
1830                                                 (list[ns].phys_dev), i);
1831                         if (!list[ns].ifindex) {
1832                                 /*
1833                                  * No network interface index found for the
1834                                  * specified port, it means there is no
1835                                  * representor on this port. It's OK,
1836                                  * there can be disabled ports, for example
1837                                  * if sriov_numvfs < sriov_totalvfs.
1838                                  */
1839                                 continue;
1840                         }
1841                         ret = -1;
1842                         if (nl_route >= 0)
1843                                 ret = mlx5_nl_switch_info
1844                                                (nl_route,
1845                                                 list[ns].ifindex,
1846                                                 &list[ns].info);
1847                         if (ret || (!list[ns].info.representor &&
1848                                     !list[ns].info.master)) {
1849                                 /*
1850                                  * We failed to recognize representors with
1851                                  * Netlink, let's try to perform the task
1852                                  * with sysfs.
1853                                  */
1854                                 ret =  mlx5_sysfs_switch_info
1855                                                 (list[ns].ifindex,
1856                                                  &list[ns].info);
1857                         }
1858                         if (!ret && bd >= 0) {
1859                                 switch (list[ns].info.name_type) {
1860                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1861                                         if (list[ns].info.port_name == bd)
1862                                                 ns++;
1863                                         break;
1864                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1865                                         /* Fallthrough */
1866                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1867                                         if (list[ns].info.pf_num == bd)
1868                                                 ns++;
1869                                         break;
1870                                 default:
1871                                         break;
1872                                 }
1873                                 continue;
1874                         }
1875                         if (!ret && (list[ns].info.representor ^
1876                                      list[ns].info.master))
1877                                 ns++;
1878                 }
1879                 if (!ns) {
1880                         DRV_LOG(ERR,
1881                                 "unable to recognize master/representors"
1882                                 " on the IB device with multiple ports");
1883                         rte_errno = ENOENT;
1884                         ret = -rte_errno;
1885                         goto exit;
1886                 }
1887         } else {
1888                 /*
1889                  * The existence of several matching entries (nd > 1) means
1890                  * port representors have been instantiated. No existing Verbs
1891                  * call nor sysfs entries can tell them apart, this can only
1892                  * be done through Netlink calls assuming kernel drivers are
1893                  * recent enough to support them.
1894                  *
1895                  * In the event of identification failure through Netlink,
1896                  * try again through sysfs, then:
1897                  *
1898                  * 1. A single IB device matches (nd == 1) with single
1899                  *    port (np=0/1) and is not a representor, assume
1900                  *    no switch support.
1901                  *
1902                  * 2. Otherwise no safe assumptions can be made;
1903                  *    complain louder and bail out.
1904                  */
1905                 for (i = 0; i != nd; ++i) {
1906                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1907                         list[ns].max_port = 1;
1908                         list[ns].phys_port = 1;
1909                         list[ns].phys_dev = ibv_match[i];
1910                         list[ns].eth_dev = NULL;
1911                         list[ns].pci_dev = pci_dev;
1912                         list[ns].pf_bond = -1;
1913                         list[ns].ifindex = 0;
1914                         if (nl_rdma >= 0)
1915                                 list[ns].ifindex = mlx5_nl_ifindex
1916                                 (nl_rdma,
1917                                 mlx5_os_get_dev_device_name
1918                                                 (list[ns].phys_dev), 1);
1919                         if (!list[ns].ifindex) {
1920                                 char ifname[IF_NAMESIZE];
1921
1922                                 /*
1923                                  * Netlink failed, it may happen with old
1924                                  * ib_core kernel driver (before 4.16).
1925                                  * We can assume there is old driver because
1926                                  * here we are processing single ports IB
1927                                  * devices. Let's try sysfs to retrieve
1928                                  * the ifindex. The method works for
1929                                  * master device only.
1930                                  */
1931                                 if (nd > 1) {
1932                                         /*
1933                                          * Multiple devices found, assume
1934                                          * representors, can not distinguish
1935                                          * master/representor and retrieve
1936                                          * ifindex via sysfs.
1937                                          */
1938                                         continue;
1939                                 }
1940                                 ret = mlx5_get_ifname_sysfs
1941                                         (ibv_match[i]->ibdev_path, ifname);
1942                                 if (!ret)
1943                                         list[ns].ifindex =
1944                                                 if_nametoindex(ifname);
1945                                 if (!list[ns].ifindex) {
1946                                         /*
1947                                          * No network interface index found
1948                                          * for the specified device, it means
1949                                          * there it is neither representor
1950                                          * nor master.
1951                                          */
1952                                         continue;
1953                                 }
1954                         }
1955                         ret = -1;
1956                         if (nl_route >= 0)
1957                                 ret = mlx5_nl_switch_info
1958                                                (nl_route,
1959                                                 list[ns].ifindex,
1960                                                 &list[ns].info);
1961                         if (ret || (!list[ns].info.representor &&
1962                                     !list[ns].info.master)) {
1963                                 /*
1964                                  * We failed to recognize representors with
1965                                  * Netlink, let's try to perform the task
1966                                  * with sysfs.
1967                                  */
1968                                 ret =  mlx5_sysfs_switch_info
1969                                                 (list[ns].ifindex,
1970                                                  &list[ns].info);
1971                         }
1972                         if (!ret && (list[ns].info.representor ^
1973                                      list[ns].info.master)) {
1974                                 ns++;
1975                         } else if ((nd == 1) &&
1976                                    !list[ns].info.representor &&
1977                                    !list[ns].info.master) {
1978                                 /*
1979                                  * Single IB device with
1980                                  * one physical port and
1981                                  * attached network device.
1982                                  * May be SRIOV is not enabled
1983                                  * or there is no representors.
1984                                  */
1985                                 DRV_LOG(INFO, "no E-Switch support detected");
1986                                 ns++;
1987                                 break;
1988                         }
1989                 }
1990                 if (!ns) {
1991                         DRV_LOG(ERR,
1992                                 "unable to recognize master/representors"
1993                                 " on the multiple IB devices");
1994                         rte_errno = ENOENT;
1995                         ret = -rte_errno;
1996                         goto exit;
1997                 }
1998         }
1999         MLX5_ASSERT(ns);
2000         /*
2001          * Sort list to probe devices in natural order for users convenience
2002          * (i.e. master first, then representors from lowest to highest ID).
2003          */
2004         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2005         /* Device specific configuration. */
2006         switch (pci_dev->id.device_id) {
2007         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2008         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2009         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2010         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2011         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2012         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2013         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2014                 dev_config_vf = 1;
2015                 break;
2016         default:
2017                 dev_config_vf = 0;
2018                 break;
2019         }
2020         for (i = 0; i != ns; ++i) {
2021                 uint32_t restore;
2022
2023                 /* Default configuration. */
2024                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2025                 dev_config.vf = dev_config_vf;
2026                 dev_config.mps = MLX5_ARG_UNSET;
2027                 dev_config.dbnc = MLX5_ARG_UNSET;
2028                 dev_config.rx_vec_en = 1;
2029                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2030                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2031                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2032                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2033                 dev_config.vf_nl_en = 1;
2034                 dev_config.mr_ext_memseg_en = 1;
2035                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2036                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2037                 dev_config.dv_esw_en = 1;
2038                 dev_config.dv_flow_en = 1;
2039                 dev_config.decap_en = 1;
2040                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2041                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2042                                                  &list[i],
2043                                                  &dev_config);
2044                 if (!list[i].eth_dev) {
2045                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2046                                 break;
2047                         /* Device is disabled or already spawned. Ignore it. */
2048                         continue;
2049                 }
2050                 restore = list[i].eth_dev->data->dev_flags;
2051                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2052                 /* Restore non-PCI flags cleared by the above call. */
2053                 list[i].eth_dev->data->dev_flags |= restore;
2054                 rte_eth_dev_probing_finish(list[i].eth_dev);
2055         }
2056         if (i != ns) {
2057                 DRV_LOG(ERR,
2058                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2059                         " encountering an error: %s",
2060                         pci_dev->addr.domain, pci_dev->addr.bus,
2061                         pci_dev->addr.devid, pci_dev->addr.function,
2062                         strerror(rte_errno));
2063                 ret = -rte_errno;
2064                 /* Roll back. */
2065                 while (i--) {
2066                         if (!list[i].eth_dev)
2067                                 continue;
2068                         mlx5_dev_close(list[i].eth_dev);
2069                         /* mac_addrs must not be freed because in dev_private */
2070                         list[i].eth_dev->data->mac_addrs = NULL;
2071                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2072                 }
2073                 /* Restore original error. */
2074                 rte_errno = -ret;
2075         } else {
2076                 ret = 0;
2077         }
2078 exit:
2079         /*
2080          * Do the routine cleanup:
2081          * - close opened Netlink sockets
2082          * - free allocated spawn data array
2083          * - free the Infiniband device list
2084          */
2085         if (nl_rdma >= 0)
2086                 close(nl_rdma);
2087         if (nl_route >= 0)
2088                 close(nl_route);
2089         if (list)
2090                 mlx5_free(list);
2091         MLX5_ASSERT(ibv_list);
2092         mlx5_glue->free_device_list(ibv_list);
2093         return ret;
2094 }
2095
2096 static int
2097 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2098 {
2099         char *env;
2100         int value;
2101
2102         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2103         /* Get environment variable to store. */
2104         env = getenv(MLX5_SHUT_UP_BF);
2105         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2106         if (config->dbnc == MLX5_ARG_UNSET)
2107                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2108         else
2109                 setenv(MLX5_SHUT_UP_BF,
2110                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2111         return value;
2112 }
2113
2114 static void
2115 mlx5_restore_doorbell_mapping_env(int value)
2116 {
2117         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2118         /* Restore the original environment variable state. */
2119         if (value == MLX5_ARG_UNSET)
2120                 unsetenv(MLX5_SHUT_UP_BF);
2121         else
2122                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2123 }
2124
2125 /**
2126  * Extract pdn of PD object using DV API.
2127  *
2128  * @param[in] pd
2129  *   Pointer to the verbs PD object.
2130  * @param[out] pdn
2131  *   Pointer to the PD object number variable.
2132  *
2133  * @return
2134  *   0 on success, error value otherwise.
2135  */
2136 int
2137 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2138 {
2139 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2140         struct mlx5dv_obj obj;
2141         struct mlx5dv_pd pd_info;
2142         int ret = 0;
2143
2144         obj.pd.in = pd;
2145         obj.pd.out = &pd_info;
2146         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2147         if (ret) {
2148                 DRV_LOG(DEBUG, "Fail to get PD object info");
2149                 return ret;
2150         }
2151         *pdn = pd_info.pdn;
2152         return 0;
2153 #else
2154         (void)pd;
2155         (void)pdn;
2156         return -ENOTSUP;
2157 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2158 }
2159
2160 /**
2161  * Function API to open IB device.
2162  *
2163  * This function calls the Linux glue APIs to open a device.
2164  *
2165  * @param[in] spawn
2166  *   Pointer to the IB device attributes (name, port, etc).
2167  * @param[out] config
2168  *   Pointer to device configuration structure.
2169  * @param[out] sh
2170  *   Pointer to shared context structure.
2171  *
2172  * @return
2173  *   0 on success, a positive error value otherwise.
2174  */
2175 int
2176 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2177                      const struct mlx5_dev_config *config,
2178                      struct mlx5_dev_ctx_shared *sh)
2179 {
2180         int dbmap_env;
2181         int err = 0;
2182
2183         sh->numa_node = spawn->pci_dev->device.numa_node;
2184         pthread_mutex_init(&sh->txpp.mutex, NULL);
2185         /*
2186          * Configure environment variable "MLX5_BF_SHUT_UP"
2187          * before the device creation. The rdma_core library
2188          * checks the variable at device creation and
2189          * stores the result internally.
2190          */
2191         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2192         /* Try to open IB device with DV first, then usual Verbs. */
2193         errno = 0;
2194         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2195         if (sh->ctx) {
2196                 sh->devx = 1;
2197                 DRV_LOG(DEBUG, "DevX is supported");
2198                 /* The device is created, no need for environment. */
2199                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2200         } else {
2201                 /* The environment variable is still configured. */
2202                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2203                 err = errno ? errno : ENODEV;
2204                 /*
2205                  * The environment variable is not needed anymore,
2206                  * all device creation attempts are completed.
2207                  */
2208                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2209                 if (!sh->ctx)
2210                         return err;
2211                 DRV_LOG(DEBUG, "DevX is NOT supported");
2212                 err = 0;
2213         }
2214         return err;
2215 }
2216
2217 /**
2218  * Install shared asynchronous device events handler.
2219  * This function is implemented to support event sharing
2220  * between multiple ports of single IB device.
2221  *
2222  * @param sh
2223  *   Pointer to mlx5_dev_ctx_shared object.
2224  */
2225 void
2226 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2227 {
2228         int ret;
2229         int flags;
2230
2231         sh->intr_handle.fd = -1;
2232         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2233         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2234                     F_SETFL, flags | O_NONBLOCK);
2235         if (ret) {
2236                 DRV_LOG(INFO, "failed to change file descriptor async event"
2237                         " queue");
2238         } else {
2239                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2240                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2241                 if (rte_intr_callback_register(&sh->intr_handle,
2242                                         mlx5_dev_interrupt_handler, sh)) {
2243                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2244                         sh->intr_handle.fd = -1;
2245                 }
2246         }
2247         if (sh->devx) {
2248 #ifdef HAVE_IBV_DEVX_ASYNC
2249                 sh->intr_handle_devx.fd = -1;
2250                 sh->devx_comp =
2251                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2252                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2253                 if (!devx_comp) {
2254                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2255                         return;
2256                 }
2257                 flags = fcntl(devx_comp->fd, F_GETFL);
2258                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2259                 if (ret) {
2260                         DRV_LOG(INFO, "failed to change file descriptor"
2261                                 " devx comp");
2262                         return;
2263                 }
2264                 sh->intr_handle_devx.fd = devx_comp->fd;
2265                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2266                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2267                                         mlx5_dev_interrupt_handler_devx, sh)) {
2268                         DRV_LOG(INFO, "Fail to install the devx shared"
2269                                 " interrupt.");
2270                         sh->intr_handle_devx.fd = -1;
2271                 }
2272 #endif /* HAVE_IBV_DEVX_ASYNC */
2273         }
2274 }
2275
2276 /**
2277  * Uninstall shared asynchronous device events handler.
2278  * This function is implemented to support event sharing
2279  * between multiple ports of single IB device.
2280  *
2281  * @param dev
2282  *   Pointer to mlx5_dev_ctx_shared object.
2283  */
2284 void
2285 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2286 {
2287         if (sh->intr_handle.fd >= 0)
2288                 mlx5_intr_callback_unregister(&sh->intr_handle,
2289                                               mlx5_dev_interrupt_handler, sh);
2290 #ifdef HAVE_IBV_DEVX_ASYNC
2291         if (sh->intr_handle_devx.fd >= 0)
2292                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2293                                   mlx5_dev_interrupt_handler_devx, sh);
2294         if (sh->devx_comp)
2295                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2296 #endif
2297 }
2298
2299 /**
2300  * Read statistics by a named counter.
2301  *
2302  * @param[in] priv
2303  *   Pointer to the private device data structure.
2304  * @param[in] ctr_name
2305  *   Pointer to the name of the statistic counter to read
2306  * @param[out] stat
2307  *   Pointer to read statistic value.
2308  * @return
2309  *   0 on success and stat is valud, 1 if failed to read the value
2310  *   rte_errno is set.
2311  *
2312  */
2313 int
2314 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2315                       uint64_t *stat)
2316 {
2317         int fd;
2318
2319         if (priv->sh) {
2320                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2321                       priv->sh->ibdev_path,
2322                       priv->dev_port,
2323                       ctr_name);
2324                 fd = open(path, O_RDONLY);
2325                 /*
2326                  * in switchdev the file location is not per port
2327                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2328                  */
2329                 if (fd == -1) {
2330                         MKSTR(path1, "%s/hw_counters/%s",
2331                               priv->sh->ibdev_path,
2332                               ctr_name);
2333                         fd = open(path1, O_RDONLY);
2334                 }
2335                 if (fd != -1) {
2336                         char buf[21] = {'\0'};
2337                         ssize_t n = read(fd, buf, sizeof(buf));
2338
2339                         close(fd);
2340                         if (n != -1) {
2341                                 *stat = strtoull(buf, NULL, 10);
2342                                 return 0;
2343                         }
2344                 }
2345         }
2346         *stat = 0;
2347         return 1;
2348 }
2349
2350 /**
2351  * Set the reg_mr and dereg_mr call backs
2352  *
2353  * @param reg_mr_cb[out]
2354  *   Pointer to reg_mr func
2355  * @param dereg_mr_cb[out]
2356  *   Pointer to dereg_mr func
2357  *
2358  */
2359 void
2360 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2361                       mlx5_dereg_mr_t *dereg_mr_cb)
2362 {
2363         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2364         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2365 }
2366
2367 /**
2368  * Remove a MAC address from device
2369  *
2370  * @param dev
2371  *   Pointer to Ethernet device structure.
2372  * @param index
2373  *   MAC address index.
2374  */
2375 void
2376 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2377 {
2378         struct mlx5_priv *priv = dev->data->dev_private;
2379         const int vf = priv->config.vf;
2380
2381         if (vf)
2382                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2383                                         mlx5_ifindex(dev), priv->mac_own,
2384                                         &dev->data->mac_addrs[index], index);
2385 }
2386
2387 /**
2388  * Adds a MAC address to the device
2389  *
2390  * @param dev
2391  *   Pointer to Ethernet device structure.
2392  * @param mac_addr
2393  *   MAC address to register.
2394  * @param index
2395  *   MAC address index.
2396  *
2397  * @return
2398  *   0 on success, a negative errno value otherwise
2399  */
2400 int
2401 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2402                      uint32_t index)
2403 {
2404         struct mlx5_priv *priv = dev->data->dev_private;
2405         const int vf = priv->config.vf;
2406         int ret = 0;
2407
2408         if (vf)
2409                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2410                                            mlx5_ifindex(dev), priv->mac_own,
2411                                            mac, index);
2412         return ret;
2413 }
2414
2415 /**
2416  * Modify a VF MAC address
2417  *
2418  * @param priv
2419  *   Pointer to device private data.
2420  * @param mac_addr
2421  *   MAC address to modify into.
2422  * @param iface_idx
2423  *   Net device interface index
2424  * @param vf_index
2425  *   VF index
2426  *
2427  * @return
2428  *   0 on success, a negative errno value otherwise
2429  */
2430 int
2431 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2432                            unsigned int iface_idx,
2433                            struct rte_ether_addr *mac_addr,
2434                            int vf_index)
2435 {
2436         return mlx5_nl_vf_mac_addr_modify
2437                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2438 }
2439
2440 /**
2441  * Set device promiscuous mode
2442  *
2443  * @param dev
2444  *   Pointer to Ethernet device structure.
2445  * @param enable
2446  *   0 - promiscuous is disabled, otherwise - enabled
2447  *
2448  * @return
2449  *   0 on success, a negative error value otherwise
2450  */
2451 int
2452 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2453 {
2454         struct mlx5_priv *priv = dev->data->dev_private;
2455
2456         return mlx5_nl_promisc(priv->nl_socket_route,
2457                                mlx5_ifindex(dev), !!enable);
2458 }
2459
2460 /**
2461  * Set device promiscuous mode
2462  *
2463  * @param dev
2464  *   Pointer to Ethernet device structure.
2465  * @param enable
2466  *   0 - all multicase is disabled, otherwise - enabled
2467  *
2468  * @return
2469  *   0 on success, a negative error value otherwise
2470  */
2471 int
2472 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2473 {
2474         struct mlx5_priv *priv = dev->data->dev_private;
2475
2476         return mlx5_nl_allmulti(priv->nl_socket_route,
2477                                 mlx5_ifindex(dev), !!enable);
2478 }
2479
2480 /**
2481  * Flush device MAC addresses
2482  *
2483  * @param dev
2484  *   Pointer to Ethernet device structure.
2485  *
2486  */
2487 void
2488 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2489 {
2490         struct mlx5_priv *priv = dev->data->dev_private;
2491
2492         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2493                                dev->data->mac_addrs,
2494                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2495 }
2496
2497 const struct eth_dev_ops mlx5_os_dev_ops = {
2498         .dev_configure = mlx5_dev_configure,
2499         .dev_start = mlx5_dev_start,
2500         .dev_stop = mlx5_dev_stop,
2501         .dev_set_link_down = mlx5_set_link_down,
2502         .dev_set_link_up = mlx5_set_link_up,
2503         .dev_close = mlx5_dev_close,
2504         .promiscuous_enable = mlx5_promiscuous_enable,
2505         .promiscuous_disable = mlx5_promiscuous_disable,
2506         .allmulticast_enable = mlx5_allmulticast_enable,
2507         .allmulticast_disable = mlx5_allmulticast_disable,
2508         .link_update = mlx5_link_update,
2509         .stats_get = mlx5_stats_get,
2510         .stats_reset = mlx5_stats_reset,
2511         .xstats_get = mlx5_xstats_get,
2512         .xstats_reset = mlx5_xstats_reset,
2513         .xstats_get_names = mlx5_xstats_get_names,
2514         .fw_version_get = mlx5_fw_version_get,
2515         .dev_infos_get = mlx5_dev_infos_get,
2516         .read_clock = mlx5_txpp_read_clock,
2517         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2518         .vlan_filter_set = mlx5_vlan_filter_set,
2519         .rx_queue_setup = mlx5_rx_queue_setup,
2520         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2521         .tx_queue_setup = mlx5_tx_queue_setup,
2522         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2523         .rx_queue_release = mlx5_rx_queue_release,
2524         .tx_queue_release = mlx5_tx_queue_release,
2525         .rx_queue_start = mlx5_rx_queue_start,
2526         .rx_queue_stop = mlx5_rx_queue_stop,
2527         .tx_queue_start = mlx5_tx_queue_start,
2528         .tx_queue_stop = mlx5_tx_queue_stop,
2529         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2530         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2531         .mac_addr_remove = mlx5_mac_addr_remove,
2532         .mac_addr_add = mlx5_mac_addr_add,
2533         .mac_addr_set = mlx5_mac_addr_set,
2534         .set_mc_addr_list = mlx5_set_mc_addr_list,
2535         .mtu_set = mlx5_dev_set_mtu,
2536         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2537         .vlan_offload_set = mlx5_vlan_offload_set,
2538         .reta_update = mlx5_dev_rss_reta_update,
2539         .reta_query = mlx5_dev_rss_reta_query,
2540         .rss_hash_update = mlx5_rss_hash_update,
2541         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2542         .filter_ctrl = mlx5_dev_filter_ctrl,
2543         .rxq_info_get = mlx5_rxq_info_get,
2544         .txq_info_get = mlx5_txq_info_get,
2545         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2546         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2547         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2548         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2549         .is_removed = mlx5_is_removed,
2550         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2551         .get_module_info = mlx5_get_module_info,
2552         .get_module_eeprom = mlx5_get_module_eeprom,
2553         .hairpin_cap_get = mlx5_hairpin_cap_get,
2554         .mtr_ops_get = mlx5_flow_meter_ops_get,
2555 };
2556
2557 /* Available operations from secondary process. */
2558 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2559         .stats_get = mlx5_stats_get,
2560         .stats_reset = mlx5_stats_reset,
2561         .xstats_get = mlx5_xstats_get,
2562         .xstats_reset = mlx5_xstats_reset,
2563         .xstats_get_names = mlx5_xstats_get_names,
2564         .fw_version_get = mlx5_fw_version_get,
2565         .dev_infos_get = mlx5_dev_infos_get,
2566         .read_clock = mlx5_txpp_read_clock,
2567         .rx_queue_start = mlx5_rx_queue_start,
2568         .rx_queue_stop = mlx5_rx_queue_stop,
2569         .tx_queue_start = mlx5_tx_queue_start,
2570         .tx_queue_stop = mlx5_tx_queue_stop,
2571         .rxq_info_get = mlx5_rxq_info_get,
2572         .txq_info_get = mlx5_txq_info_get,
2573         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2574         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2575         .get_module_info = mlx5_get_module_info,
2576         .get_module_eeprom = mlx5_get_module_eeprom,
2577 };
2578
2579 /* Available operations in flow isolated mode. */
2580 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2581         .dev_configure = mlx5_dev_configure,
2582         .dev_start = mlx5_dev_start,
2583         .dev_stop = mlx5_dev_stop,
2584         .dev_set_link_down = mlx5_set_link_down,
2585         .dev_set_link_up = mlx5_set_link_up,
2586         .dev_close = mlx5_dev_close,
2587         .promiscuous_enable = mlx5_promiscuous_enable,
2588         .promiscuous_disable = mlx5_promiscuous_disable,
2589         .allmulticast_enable = mlx5_allmulticast_enable,
2590         .allmulticast_disable = mlx5_allmulticast_disable,
2591         .link_update = mlx5_link_update,
2592         .stats_get = mlx5_stats_get,
2593         .stats_reset = mlx5_stats_reset,
2594         .xstats_get = mlx5_xstats_get,
2595         .xstats_reset = mlx5_xstats_reset,
2596         .xstats_get_names = mlx5_xstats_get_names,
2597         .fw_version_get = mlx5_fw_version_get,
2598         .dev_infos_get = mlx5_dev_infos_get,
2599         .read_clock = mlx5_txpp_read_clock,
2600         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2601         .vlan_filter_set = mlx5_vlan_filter_set,
2602         .rx_queue_setup = mlx5_rx_queue_setup,
2603         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2604         .tx_queue_setup = mlx5_tx_queue_setup,
2605         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2606         .rx_queue_release = mlx5_rx_queue_release,
2607         .tx_queue_release = mlx5_tx_queue_release,
2608         .rx_queue_start = mlx5_rx_queue_start,
2609         .rx_queue_stop = mlx5_rx_queue_stop,
2610         .tx_queue_start = mlx5_tx_queue_start,
2611         .tx_queue_stop = mlx5_tx_queue_stop,
2612         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2613         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2614         .mac_addr_remove = mlx5_mac_addr_remove,
2615         .mac_addr_add = mlx5_mac_addr_add,
2616         .mac_addr_set = mlx5_mac_addr_set,
2617         .set_mc_addr_list = mlx5_set_mc_addr_list,
2618         .mtu_set = mlx5_dev_set_mtu,
2619         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2620         .vlan_offload_set = mlx5_vlan_offload_set,
2621         .filter_ctrl = mlx5_dev_filter_ctrl,
2622         .rxq_info_get = mlx5_rxq_info_get,
2623         .txq_info_get = mlx5_txq_info_get,
2624         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2625         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2626         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2627         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2628         .is_removed = mlx5_is_removed,
2629         .get_module_info = mlx5_get_module_info,
2630         .get_module_eeprom = mlx5_get_module_eeprom,
2631         .hairpin_cap_get = mlx5_hairpin_cap_get,
2632         .mtr_ops_get = mlx5_flow_meter_ops_get,
2633 };