drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the interrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param sh
 135  *   Pointer to shared device context.
 136  *
 137  * @return
 138  *   0 on success, a negative errno value otherwise and rte_errno is set.
 139  */
 140 int
 141 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
 142 {
 143         int err;
 144         struct mlx5_common_device *cdev = sh->cdev;
 145         struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
 146         struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
 147         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 148
 149         err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex);
 150         if (err) {
 151                 rte_errno = errno;
 152                 return -rte_errno;
 153         }
 154 #ifdef HAVE_IBV_MLX5_MOD_SWP
 155         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 156 #endif
 157 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 158         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 159 #endif
 160 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 161         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 162 #endif
 163         err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr);
 164         if (err) {
 165                 rte_errno = errno;
 166                 return -rte_errno;
 167         }
 168         memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
 169         if (mlx5_dev_is_pci(cdev->dev))
 170                 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev));
 171         else
 172                 sh->dev_cap.sf = 1;
 173         sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 174         sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
 175         sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
 176         sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
 177 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 178         sh->dev_cap.dest_tir = 1;
 179 #endif
 180 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR)
 181         DRV_LOG(DEBUG, "DV flow is supported.");
 182         sh->dev_cap.dv_flow_en = 1;
 183 #endif
 184 #ifdef HAVE_MLX5DV_DR_ESWITCH
 185         if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)
 186                 sh->dev_cap.dv_esw_en = 1;
 187 #endif
 188         /*
 189          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 190          * as all ConnectX-5 devices.
 191          */
 192         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 193                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 194                         DRV_LOG(DEBUG, "Enhanced MPW is supported.");
 195                         sh->dev_cap.mps = MLX5_MPW_ENHANCED;
 196                 } else {
 197                         DRV_LOG(DEBUG, "MPW is supported.");
 198                         sh->dev_cap.mps = MLX5_MPW;
 199                 }
 200         } else {
 201                 DRV_LOG(DEBUG, "MPW isn't supported.");
 202                 sh->dev_cap.mps = MLX5_MPW_DISABLED;
 203         }
 204 #if (RTE_CACHE_LINE_SIZE == 128)
 205         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
 206                 sh->dev_cap.cqe_comp = 1;
 207         DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.",
 208                 sh->dev_cap.cqe_comp ? "" : "not ");
 209 #else
 210         sh->dev_cap.cqe_comp = 1;
 211 #endif
 212 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 213         sh->dev_cap.mpls_en =
 214                 ((dv_attr.tunnel_offloads_caps &
 215                   MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 216                  (dv_attr.tunnel_offloads_caps &
 217                   MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 218         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.",
 219                 sh->dev_cap.mpls_en ? "" : "not ");
 220 #else
 221         DRV_LOG(WARNING,
 222                 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration");
 223 #endif
 224 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 225         sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;
 226 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 227         sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &
 228                                     IBV_DEVICE_PCI_WRITE_END_PADDING);
 229 #endif
 230         sh->dev_cap.hw_csum =
 231                 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
 232         DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
 233                 sh->dev_cap.hw_csum ? "" : "not ");
 234         sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &
 235                                        IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
 236         DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
 237                 (sh->dev_cap.hw_vlan_strip ? "" : "not "));
 238         sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &
 239                                       IBV_RAW_PACKET_CAP_SCATTER_FCS);
 240 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 241         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
 242         DRV_LOG(DEBUG, "Counters are not supported.");
 243 #endif
 244         /*
 245          * DPDK doesn't support larger/variable indirection tables.
 246          * Once DPDK supports it, take max size from device attr.
 247          */
 248         sh->dev_cap.ind_table_max_size =
 249                         RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size,
 250                                 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
 251         DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
 252                 sh->dev_cap.ind_table_max_size);
 253         sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&
 254                            (attr_ex.tso_caps.supported_qpts &
 255                             (1 << IBV_QPT_RAW_PACKET)));
 256         if (sh->dev_cap.tso)
 257                 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;
 258         strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
 259                 sizeof(sh->dev_cap.fw_ver));
 260 #ifdef HAVE_IBV_MLX5_MOD_SWP
 261         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 262                 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &
 263                                   (MLX5_SW_PARSING_CAP |
 264                                    MLX5_SW_PARSING_CSUM_CAP |
 265                                    MLX5_SW_PARSING_TSO_CAP);
 266         DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);
 267 #endif
 268 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 269         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 270                 struct mlx5dv_striding_rq_caps *strd_rq_caps =
 271                                 &dv_attr.striding_rq_caps;
 272
 273                 sh->dev_cap.mprq.enabled = 1;
 274                 sh->dev_cap.mprq.log_min_stride_size =
 275                         strd_rq_caps->min_single_stride_log_num_of_bytes;
 276                 sh->dev_cap.mprq.log_max_stride_size =
 277                         strd_rq_caps->max_single_stride_log_num_of_bytes;
 278                 sh->dev_cap.mprq.log_min_stride_num =
 279                         strd_rq_caps->min_single_wqe_log_num_of_strides;
 280                 sh->dev_cap.mprq.log_max_stride_num =
 281                         strd_rq_caps->max_single_wqe_log_num_of_strides;
 282                 sh->dev_cap.mprq.log_min_stride_wqe_size =
 283                                         cdev->config.devx ?
 284                                         hca_attr->log_min_stride_wqe_sz :
 285                                         MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
 286                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u",
 287                         sh->dev_cap.mprq.log_min_stride_size);
 288                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u",
 289                         sh->dev_cap.mprq.log_max_stride_size);
 290                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u",
 291                         sh->dev_cap.mprq.log_min_stride_num);
 292                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u",
 293                         sh->dev_cap.mprq.log_max_stride_num);
 294                 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u",
 295                         sh->dev_cap.mprq.log_min_stride_wqe_size);
 296                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 297                         strd_rq_caps->supported_qpts);
 298                 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ.");
 299         }
 300 #endif
 301 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 302         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 303                 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &
 304                                         (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
 305                                          MLX5_TUNNELED_OFFLOADS_GRE_CAP |
 306                                          MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
 307         }
 308         if (sh->dev_cap.tunnel_en) {
 309                 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
 310                         sh->dev_cap.tunnel_en &
 311                         MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
 312                         sh->dev_cap.tunnel_en &
 313                         MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
 314                         sh->dev_cap.tunnel_en &
 315                         MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
 316         } else {
 317                 DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
 318         }
 319 #else
 320         DRV_LOG(WARNING,
 321                 "Tunnel offloading disabled due to old OFED/rdma-core version");
 322 #endif
 323         if (!sh->cdev->config.devx)
 324                 return 0;
 325         /* Check capabilities for Packet Pacing. */
 326         DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.",
 327                 hca_attr->dev_freq_khz);
 328         DRV_LOG(DEBUG, "Packet pacing is %ssupported.",
 329                 hca_attr->qos.packet_pacing ? "" : "not ");
 330         DRV_LOG(DEBUG, "Cross channel ops are %ssupported.",
 331                 hca_attr->cross_channel ? "" : "not ");
 332         DRV_LOG(DEBUG, "WQE index ignore is %ssupported.",
 333                 hca_attr->wqe_index_ignore ? "" : "not ");
 334         DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.",
 335                 hca_attr->non_wire_sq ? "" : "not ");
 336         DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
 337                 hca_attr->log_max_static_sq_wq ? "" : "not ",
 338                 hca_attr->log_max_static_sq_wq);
 339         DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.",
 340                 hca_attr->qos.wqe_rate_pp ? "" : "not ");
 341         sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;
 342         if (!hca_attr->cross_channel) {
 343                 DRV_LOG(DEBUG,
 344                         "Cross channel operations are required for packet pacing.");
 345                 sh->dev_cap.txpp_en = 0;
 346         }
 347         if (!hca_attr->wqe_index_ignore) {
 348                 DRV_LOG(DEBUG,
 349                         "WQE index ignore feature is required for packet pacing.");
 350                 sh->dev_cap.txpp_en = 0;
 351         }
 352         if (!hca_attr->non_wire_sq) {
 353                 DRV_LOG(DEBUG,
 354                         "Non-wire SQ feature is required for packet pacing.");
 355                 sh->dev_cap.txpp_en = 0;
 356         }
 357         if (!hca_attr->log_max_static_sq_wq) {
 358                 DRV_LOG(DEBUG,
 359                         "Static WQE SQ feature is required for packet pacing.");
 360                 sh->dev_cap.txpp_en = 0;
 361         }
 362         if (!hca_attr->qos.wqe_rate_pp) {
 363                 DRV_LOG(DEBUG,
 364                         "WQE rate mode is required for packet pacing.");
 365                 sh->dev_cap.txpp_en = 0;
 366         }
 367 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
 368         DRV_LOG(DEBUG,
 369                 "DevX does not provide UAR offset, can't create queues for packet pacing.");
 370         sh->dev_cap.txpp_en = 0;
 371 #endif
 372         /* Check for LRO support. */
 373         if (sh->dev_cap.dest_tir && sh->dev_cap.dv_flow_en &&
 374             hca_attr->lro_cap) {
 375                 /* TBD check tunnel lro caps. */
 376                 sh->dev_cap.lro_supported = 1;
 377                 DRV_LOG(DEBUG, "Device supports LRO.");
 378                 DRV_LOG(DEBUG,
 379                         "LRO minimal size of TCP segment required for coalescing is %d bytes.",
 380                         hca_attr->lro_min_mss_size);
 381         }
 382         sh->dev_cap.scatter_fcs_w_decap_disable =
 383                                         hca_attr->scatter_fcs_w_decap_disable;
 384         sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;
 385         mlx5_rt_timestamp_config(sh, hca_attr);
 386         return 0;
 387 }
 388
 389 /**
 390  * Detect misc5 support or not
 391  *
 392  * @param[in] priv
 393  *   Device private data pointer
 394  */
 395 #ifdef HAVE_MLX5DV_DR
 396 static void
 397 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 398 {
 399 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 400         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 401          * Case: IPv4--->UDP--->VxLAN--->vni
 402          */
 403         void *tbl;
 404         struct mlx5_flow_dv_match_params matcher_mask;
 405         void *match_m;
 406         void *matcher;
 407         void *headers_m;
 408         void *misc5_m;
 409         uint32_t *tunnel_header_m;
 410         struct mlx5dv_flow_matcher_attr dv_attr;
 411
 412         memset(&matcher_mask, 0, sizeof(matcher_mask));
 413         matcher_mask.size = sizeof(matcher_mask.buf);
 414         match_m = matcher_mask.buf;
 415         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 416         misc5_m = MLX5_ADDR_OF(fte_match_param,
 417                                match_m, misc_parameters_5);
 418         tunnel_header_m = (uint32_t *)
 419                                 MLX5_ADDR_OF(fte_match_set_misc5,
 420                                 misc5_m, tunnel_header_1);
 421         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 422         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 423         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 424         *tunnel_header_m = 0xffffff;
 425
 426         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 427         if (!tbl) {
 428                 DRV_LOG(INFO, "No SW steering support");
 429                 return;
 430         }
 431         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 432         dv_attr.match_mask = (void *)&matcher_mask,
 433         dv_attr.match_criteria_enable =
 434                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 435                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 436         dv_attr.priority = 3;
 437 #ifdef HAVE_MLX5DV_DR_ESWITCH
 438         void *misc2_m;
 439         if (priv->config.dv_esw_en) {
 440                 /* FDB enabled reg_c_0 */
 441                 dv_attr.match_criteria_enable |=
 442                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 443                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 444                                        match_m, misc_parameters_2);
 445                 MLX5_SET(fte_match_set_misc2, misc2_m,
 446                          metadata_reg_c_0, 0xffff);
 447         }
 448 #endif
 449         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 450                                                     &dv_attr, tbl);
 451         if (matcher) {
 452                 priv->sh->misc5_cap = 1;
 453                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 454         }
 455         mlx5_glue->dr_destroy_flow_tbl(tbl);
 456 #else
 457         RTE_SET_USED(priv);
 458 #endif
 459 }
 460 #endif
 461
 462 /**
 463  * Initialize DR related data within private structure.
 464  * Routine checks the reference counter and does actual
 465  * resources creation/initialization only if counter is zero.
 466  *
 467  * @param[in] priv
 468  *   Pointer to the private device data structure.
 469  *
 470  * @return
 471  *   Zero on success, positive error code otherwise.
 472  */
 473 static int
 474 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 475 {
 476         struct mlx5_dev_ctx_shared *sh = priv->sh;
 477         char s[MLX5_NAME_SIZE] __rte_unused;
 478         int err;
 479
 480         MLX5_ASSERT(sh && sh->refcnt);
 481         if (sh->refcnt > 1)
 482                 return 0;
 483         err = mlx5_alloc_table_hash_list(priv);
 484         if (err)
 485                 goto error;
 486         /* The resources below are only valid with DV support. */
 487 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 488         /* Init port id action list. */
 489         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 490         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 491                                                    flow_dv_port_id_create_cb,
 492                                                    flow_dv_port_id_match_cb,
 493                                                    flow_dv_port_id_remove_cb,
 494                                                    flow_dv_port_id_clone_cb,
 495                                                  flow_dv_port_id_clone_free_cb);
 496         if (!sh->port_id_action_list)
 497                 goto error;
 498         /* Init push vlan action list. */
 499         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 500         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 501                                                     flow_dv_push_vlan_create_cb,
 502                                                     flow_dv_push_vlan_match_cb,
 503                                                     flow_dv_push_vlan_remove_cb,
 504                                                     flow_dv_push_vlan_clone_cb,
 505                                                flow_dv_push_vlan_clone_free_cb);
 506         if (!sh->push_vlan_action_list)
 507                 goto error;
 508         /* Init sample action list. */
 509         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 510         sh->sample_action_list = mlx5_list_create(s, sh, true,
 511                                                   flow_dv_sample_create_cb,
 512                                                   flow_dv_sample_match_cb,
 513                                                   flow_dv_sample_remove_cb,
 514                                                   flow_dv_sample_clone_cb,
 515                                                   flow_dv_sample_clone_free_cb);
 516         if (!sh->sample_action_list)
 517                 goto error;
 518         /* Init dest array action list. */
 519         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 520         sh->dest_array_list = mlx5_list_create(s, sh, true,
 521                                                flow_dv_dest_array_create_cb,
 522                                                flow_dv_dest_array_match_cb,
 523                                                flow_dv_dest_array_remove_cb,
 524                                                flow_dv_dest_array_clone_cb,
 525                                               flow_dv_dest_array_clone_free_cb);
 526         if (!sh->dest_array_list)
 527                 goto error;
 528         /* Init shared flex parsers list, no need lcore_share */
 529         snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
 530         sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
 531                                                mlx5_flex_parser_create_cb,
 532                                                mlx5_flex_parser_match_cb,
 533                                                mlx5_flex_parser_remove_cb,
 534                                                mlx5_flex_parser_clone_cb,
 535                                                mlx5_flex_parser_clone_free_cb);
 536         if (!sh->flex_parsers_dv)
 537                 goto error;
 538 #endif
 539 #ifdef HAVE_MLX5DV_DR
 540         void *domain;
 541
 542         /* Reference counter is zero, we should initialize structures. */
 543         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 544                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 545         if (!domain) {
 546                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 547                 err = errno;
 548                 goto error;
 549         }
 550         sh->rx_domain = domain;
 551         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 552                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 553         if (!domain) {
 554                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 555                 err = errno;
 556                 goto error;
 557         }
 558         sh->tx_domain = domain;
 559 #ifdef HAVE_MLX5DV_DR_ESWITCH
 560         if (priv->config.dv_esw_en) {
 561                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 562                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 563                 if (!domain) {
 564                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 565                         err = errno;
 566                         goto error;
 567                 }
 568                 sh->fdb_domain = domain;
 569         }
 570         /*
 571          * The drop action is just some dummy placeholder in rdma-core. It
 572          * does not belong to domains and has no any attributes, and, can be
 573          * shared by the entire device.
 574          */
 575         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 576         if (!sh->dr_drop_action) {
 577                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 578                 err = errno;
 579                 goto error;
 580         }
 581 #endif
 582         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 583                 err = mlx5_alloc_tunnel_hub(sh);
 584         if (err) {
 585                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 586                 goto error;
 587         }
 588         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 589                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 590                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 591                 if (sh->fdb_domain)
 592                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 593         }
 594         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 595         if (!priv->config.allow_duplicate_pattern) {
 596 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 597                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 598 #endif
 599                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 600                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 601                 if (sh->fdb_domain)
 602                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 603         }
 604
 605         __mlx5_discovery_misc5_cap(priv);
 606 #endif /* HAVE_MLX5DV_DR */
 607         sh->default_miss_action =
 608                         mlx5_glue->dr_create_flow_action_default_miss();
 609         if (!sh->default_miss_action)
 610                 DRV_LOG(WARNING, "Default miss action is not supported.");
 611         LIST_INIT(&sh->shared_rxqs);
 612         return 0;
 613 error:
 614         /* Rollback the created objects. */
 615         if (sh->rx_domain) {
 616                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 617                 sh->rx_domain = NULL;
 618         }
 619         if (sh->tx_domain) {
 620                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 621                 sh->tx_domain = NULL;
 622         }
 623         if (sh->fdb_domain) {
 624                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 625                 sh->fdb_domain = NULL;
 626         }
 627         if (sh->dr_drop_action) {
 628                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 629                 sh->dr_drop_action = NULL;
 630         }
 631         if (sh->pop_vlan_action) {
 632                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 633                 sh->pop_vlan_action = NULL;
 634         }
 635         if (sh->encaps_decaps) {
 636                 mlx5_hlist_destroy(sh->encaps_decaps);
 637                 sh->encaps_decaps = NULL;
 638         }
 639         if (sh->modify_cmds) {
 640                 mlx5_hlist_destroy(sh->modify_cmds);
 641                 sh->modify_cmds = NULL;
 642         }
 643         if (sh->tag_table) {
 644                 /* tags should be destroyed with flow before. */
 645                 mlx5_hlist_destroy(sh->tag_table);
 646                 sh->tag_table = NULL;
 647         }
 648         if (sh->tunnel_hub) {
 649                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 650                 sh->tunnel_hub = NULL;
 651         }
 652         mlx5_free_table_hash_list(priv);
 653         if (sh->port_id_action_list) {
 654                 mlx5_list_destroy(sh->port_id_action_list);
 655                 sh->port_id_action_list = NULL;
 656         }
 657         if (sh->push_vlan_action_list) {
 658                 mlx5_list_destroy(sh->push_vlan_action_list);
 659                 sh->push_vlan_action_list = NULL;
 660         }
 661         if (sh->sample_action_list) {
 662                 mlx5_list_destroy(sh->sample_action_list);
 663                 sh->sample_action_list = NULL;
 664         }
 665         if (sh->dest_array_list) {
 666                 mlx5_list_destroy(sh->dest_array_list);
 667                 sh->dest_array_list = NULL;
 668         }
 669         return err;
 670 }
 671
 672 /**
 673  * Destroy DR related data within private structure.
 674  *
 675  * @param[in] priv
 676  *   Pointer to the private device data structure.
 677  */
 678 void
 679 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 680 {
 681         struct mlx5_dev_ctx_shared *sh = priv->sh;
 682
 683         MLX5_ASSERT(sh && sh->refcnt);
 684         if (sh->refcnt > 1)
 685                 return;
 686         MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
 687 #ifdef HAVE_MLX5DV_DR
 688         if (sh->rx_domain) {
 689                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 690                 sh->rx_domain = NULL;
 691         }
 692         if (sh->tx_domain) {
 693                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 694                 sh->tx_domain = NULL;
 695         }
 696 #ifdef HAVE_MLX5DV_DR_ESWITCH
 697         if (sh->fdb_domain) {
 698                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 699                 sh->fdb_domain = NULL;
 700         }
 701         if (sh->dr_drop_action) {
 702                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 703                 sh->dr_drop_action = NULL;
 704         }
 705 #endif
 706         if (sh->pop_vlan_action) {
 707                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 708                 sh->pop_vlan_action = NULL;
 709         }
 710 #endif /* HAVE_MLX5DV_DR */
 711         if (sh->default_miss_action)
 712                 mlx5_glue->destroy_flow_action
 713                                 (sh->default_miss_action);
 714         if (sh->encaps_decaps) {
 715                 mlx5_hlist_destroy(sh->encaps_decaps);
 716                 sh->encaps_decaps = NULL;
 717         }
 718         if (sh->modify_cmds) {
 719                 mlx5_hlist_destroy(sh->modify_cmds);
 720                 sh->modify_cmds = NULL;
 721         }
 722         if (sh->tag_table) {
 723                 /* tags should be destroyed with flow before. */
 724                 mlx5_hlist_destroy(sh->tag_table);
 725                 sh->tag_table = NULL;
 726         }
 727         if (sh->tunnel_hub) {
 728                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 729                 sh->tunnel_hub = NULL;
 730         }
 731         mlx5_free_table_hash_list(priv);
 732         if (sh->port_id_action_list) {
 733                 mlx5_list_destroy(sh->port_id_action_list);
 734                 sh->port_id_action_list = NULL;
 735         }
 736         if (sh->push_vlan_action_list) {
 737                 mlx5_list_destroy(sh->push_vlan_action_list);
 738                 sh->push_vlan_action_list = NULL;
 739         }
 740         if (sh->sample_action_list) {
 741                 mlx5_list_destroy(sh->sample_action_list);
 742                 sh->sample_action_list = NULL;
 743         }
 744         if (sh->dest_array_list) {
 745                 mlx5_list_destroy(sh->dest_array_list);
 746                 sh->dest_array_list = NULL;
 747         }
 748 }
 749
 750 /**
 751  * Initialize shared data between primary and secondary process.
 752  *
 753  * A memzone is reserved by primary process and secondary processes attach to
 754  * the memzone.
 755  *
 756  * @return
 757  *   0 on success, a negative errno value otherwise and rte_errno is set.
 758  */
 759 static int
 760 mlx5_init_shared_data(void)
 761 {
 762         const struct rte_memzone *mz;
 763         int ret = 0;
 764
 765         rte_spinlock_lock(&mlx5_shared_data_lock);
 766         if (mlx5_shared_data == NULL) {
 767                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 768                         /* Allocate shared memory. */
 769                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 770                                                  sizeof(*mlx5_shared_data),
 771                                                  SOCKET_ID_ANY, 0);
 772                         if (mz == NULL) {
 773                                 DRV_LOG(ERR,
 774                                         "Cannot allocate mlx5 shared data");
 775                                 ret = -rte_errno;
 776                                 goto error;
 777                         }
 778                         mlx5_shared_data = mz->addr;
 779                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 780                         rte_spinlock_init(&mlx5_shared_data->lock);
 781                 } else {
 782                         /* Lookup allocated shared memory. */
 783                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 784                         if (mz == NULL) {
 785                                 DRV_LOG(ERR,
 786                                         "Cannot attach mlx5 shared data");
 787                                 ret = -rte_errno;
 788                                 goto error;
 789                         }
 790                         mlx5_shared_data = mz->addr;
 791                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 792                 }
 793         }
 794 error:
 795         rte_spinlock_unlock(&mlx5_shared_data_lock);
 796         return ret;
 797 }
 798
 799 /**
 800  * PMD global initialization.
 801  *
 802  * Independent from individual device, this function initializes global
 803  * per-PMD data structures distinguishing primary and secondary processes.
 804  * Hence, each initialization is called once per a process.
 805  *
 806  * @return
 807  *   0 on success, a negative errno value otherwise and rte_errno is set.
 808  */
 809 static int
 810 mlx5_init_once(void)
 811 {
 812         struct mlx5_shared_data *sd;
 813         struct mlx5_local_data *ld = &mlx5_local_data;
 814         int ret = 0;
 815
 816         if (mlx5_init_shared_data())
 817                 return -rte_errno;
 818         sd = mlx5_shared_data;
 819         MLX5_ASSERT(sd);
 820         rte_spinlock_lock(&sd->lock);
 821         switch (rte_eal_process_type()) {
 822         case RTE_PROC_PRIMARY:
 823                 if (sd->init_done)
 824                         break;
 825                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 826                                            mlx5_mp_os_primary_handle);
 827                 if (ret)
 828                         goto out;
 829                 sd->init_done = true;
 830                 break;
 831         case RTE_PROC_SECONDARY:
 832                 if (ld->init_done)
 833                         break;
 834                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 835                                              mlx5_mp_os_secondary_handle);
 836                 if (ret)
 837                         goto out;
 838                 ++sd->secondary_cnt;
 839                 ld->init_done = true;
 840                 break;
 841         default:
 842                 break;
 843         }
 844 out:
 845         rte_spinlock_unlock(&sd->lock);
 846         return ret;
 847 }
 848
 849 /**
 850  * DR flow drop action support detect.
 851  *
 852  * @param dev
 853  *   Pointer to rte_eth_dev structure.
 854  *
 855  */
 856 static void
 857 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 858 {
 859 #ifdef HAVE_MLX5DV_DR
 860         struct mlx5_priv *priv = dev->data->dev_private;
 861
 862         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 863                 return;
 864         /**
 865          * DR supports drop action placeholder when it is supported;
 866          * otherwise, use the queue drop action.
 867          */
 868         if (!priv->sh->drop_action_check_flag) {
 869                 if (!mlx5_flow_discover_dr_action_support(dev))
 870                         priv->sh->dr_drop_action_en = 1;
 871                 priv->sh->drop_action_check_flag = 1;
 872         }
 873         if (priv->sh->dr_drop_action_en)
 874                 priv->root_drop_action = priv->sh->dr_drop_action;
 875         else
 876                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 877 #endif
 878 }
 879
 880 static void
 881 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 882 {
 883         struct mlx5_priv *priv = dev->data->dev_private;
 884         void *ctx = priv->sh->cdev->ctx;
 885
 886         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 887         if (!priv->q_counters) {
 888                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 889                 struct ibv_wq *wq;
 890
 891                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 892                         "by DevX - fall-back to use the kernel driver global "
 893                         "queue counter.", dev->data->port_id);
 894                 /* Create WQ by kernel and query its queue counter ID. */
 895                 if (cq) {
 896                         wq = mlx5_glue->create_wq(ctx,
 897                                                   &(struct ibv_wq_init_attr){
 898                                                     .wq_type = IBV_WQT_RQ,
 899                                                     .max_wr = 1,
 900                                                     .max_sge = 1,
 901                                                     .pd = priv->sh->cdev->pd,
 902                                                     .cq = cq,
 903                                                 });
 904                         if (wq) {
 905                                 /* Counter is assigned only on RDY state. */
 906                                 int ret = mlx5_glue->modify_wq(wq,
 907                                                  &(struct ibv_wq_attr){
 908                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 909                                                  .wq_state = IBV_WQS_RDY,
 910                                                 });
 911
 912                                 if (ret == 0)
 913                                         mlx5_devx_cmd_wq_query(wq,
 914                                                          &priv->counter_set_id);
 915                                 claim_zero(mlx5_glue->destroy_wq(wq));
 916                         }
 917                         claim_zero(mlx5_glue->destroy_cq(cq));
 918                 }
 919         } else {
 920                 priv->counter_set_id = priv->q_counters->id;
 921         }
 922         if (priv->counter_set_id == 0)
 923                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 924                         "available.", dev->data->port_id);
 925 }
 926
 927 /**
 928  * Check if representor spawn info match devargs.
 929  *
 930  * @param spawn
 931  *   Verbs device parameters (name, port, switch_info) to spawn.
 932  * @param eth_da
 933  *   Device devargs to probe.
 934  *
 935  * @return
 936  *   Match result.
 937  */
 938 static bool
 939 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 940                        struct rte_eth_devargs *eth_da)
 941 {
 942         struct mlx5_switch_info *switch_info = &spawn->info;
 943         unsigned int p, f;
 944         uint16_t id;
 945         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 946                                                       eth_da->type);
 947
 948         switch (eth_da->type) {
 949         case RTE_ETH_REPRESENTOR_SF:
 950                 if (!(spawn->info.port_name == -1 &&
 951                       switch_info->name_type ==
 952                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 953                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 954                         rte_errno = EBUSY;
 955                         return false;
 956                 }
 957                 break;
 958         case RTE_ETH_REPRESENTOR_VF:
 959                 /* Allows HPF representor index -1 as exception. */
 960                 if (!(spawn->info.port_name == -1 &&
 961                       switch_info->name_type ==
 962                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 963                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 964                         rte_errno = EBUSY;
 965                         return false;
 966                 }
 967                 break;
 968         case RTE_ETH_REPRESENTOR_NONE:
 969                 rte_errno = EBUSY;
 970                 return false;
 971         default:
 972                 rte_errno = ENOTSUP;
 973                 DRV_LOG(ERR, "unsupported representor type");
 974                 return false;
 975         }
 976         /* Check representor ID: */
 977         for (p = 0; p < eth_da->nb_ports; ++p) {
 978                 if (spawn->pf_bond < 0) {
 979                         /* For non-LAG mode, allow and ignore pf. */
 980                         switch_info->pf_num = eth_da->ports[p];
 981                         repr_id = mlx5_representor_id_encode(switch_info,
 982                                                              eth_da->type);
 983                 }
 984                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 985                         id = MLX5_REPRESENTOR_ID
 986                                 (eth_da->ports[p], eth_da->type,
 987                                  eth_da->representor_ports[f]);
 988                         if (repr_id == id)
 989                                 return true;
 990                 }
 991         }
 992         rte_errno = EBUSY;
 993         return false;
 994 }
 995
 996 /**
 997  * Spawn an Ethernet device from Verbs information.
 998  *
 999  * @param dpdk_dev
1000  *   Backing DPDK device.
1001  * @param spawn
1002  *   Verbs device parameters (name, port, switch_info) to spawn.
1003  * @param config
1004  *   Device configuration parameters.
1005  * @param eth_da
1006  *   Device arguments.
1007  *
1008  * @return
1009  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1010  *   is set. The following errors are defined:
1011  *
1012  *   EBUSY: device is not supposed to be spawned.
1013  *   EEXIST: device is already spawned
1014  */
1015 static struct rte_eth_dev *
1016 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1017                struct mlx5_dev_spawn_data *spawn,
1018                struct mlx5_dev_config *config,
1019                struct rte_eth_devargs *eth_da)
1020 {
1021         const struct mlx5_switch_info *switch_info = &spawn->info;
1022         struct mlx5_dev_ctx_shared *sh = NULL;
1023         struct mlx5_hca_attr *hca_attr = &spawn->cdev->config.hca_attr;
1024         struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
1025         struct rte_eth_dev *eth_dev = NULL;
1026         struct mlx5_priv *priv = NULL;
1027         int err = 0;
1028         struct rte_ether_addr mac;
1029         char name[RTE_ETH_NAME_MAX_LEN];
1030         int own_domain_id = 0;
1031         uint16_t port_id;
1032         struct mlx5_port_info vport_info = { .query_flags = 0 };
1033         int nl_rdma = -1;
1034         int i;
1035
1036         /* Determine if this port representor is supposed to be spawned. */
1037         if (switch_info->representor && dpdk_dev->devargs &&
1038             !mlx5_representor_match(spawn, eth_da))
1039                 return NULL;
1040         /* Build device name. */
1041         if (spawn->pf_bond < 0) {
1042                 /* Single device. */
1043                 if (!switch_info->representor)
1044                         strlcpy(name, dpdk_dev->name, sizeof(name));
1045                 else
1046                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
1047                                  dpdk_dev->name,
1048                                  switch_info->name_type ==
1049                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1050                                  switch_info->port_name);
1051         } else {
1052                 /* Bonding device. */
1053                 if (!switch_info->representor) {
1054                         err = snprintf(name, sizeof(name), "%s_%s",
1055                                        dpdk_dev->name, spawn->phys_dev_name);
1056                 } else {
1057                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
1058                                 dpdk_dev->name, spawn->phys_dev_name,
1059                                 switch_info->ctrl_num,
1060                                 switch_info->pf_num,
1061                                 switch_info->name_type ==
1062                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1063                                 switch_info->port_name);
1064                 }
1065         }
1066         if (err >= (int)sizeof(name))
1067                 DRV_LOG(WARNING, "device name overflow %s", name);
1068         /* check if the device is already spawned */
1069         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1070                 rte_errno = EEXIST;
1071                 return NULL;
1072         }
1073         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1074         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1075                 struct mlx5_mp_id mp_id;
1076
1077                 eth_dev = rte_eth_dev_attach_secondary(name);
1078                 if (eth_dev == NULL) {
1079                         DRV_LOG(ERR, "can not attach rte ethdev");
1080                         rte_errno = ENOMEM;
1081                         return NULL;
1082                 }
1083                 eth_dev->device = dpdk_dev;
1084                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1085                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1086                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1087                 err = mlx5_proc_priv_init(eth_dev);
1088                 if (err)
1089                         return NULL;
1090                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
1091                 /* Receive command fd from primary process */
1092                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1093                 if (err < 0)
1094                         goto err_secondary;
1095                 /* Remap UAR for Tx queues. */
1096                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1097                 if (err)
1098                         goto err_secondary;
1099                 /*
1100                  * Ethdev pointer is still required as input since
1101                  * the primary device is not accessible from the
1102                  * secondary process.
1103                  */
1104                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1105                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1106                 return eth_dev;
1107 err_secondary:
1108                 mlx5_dev_close(eth_dev);
1109                 return NULL;
1110         }
1111         /* Process parameters. */
1112         err = mlx5_args(config, dpdk_dev->devargs);
1113         if (err) {
1114                 DRV_LOG(ERR, "failed to process device arguments: %s",
1115                         strerror(rte_errno));
1116                 return NULL;
1117         }
1118         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
1119         if (!sh)
1120                 return NULL;
1121         /* Update final values for devargs before check sibling config. */
1122         if (config->dv_flow_en && !sh->dev_cap.dv_flow_en) {
1123                 DRV_LOG(WARNING, "DV flow is not supported.");
1124                 config->dv_flow_en = 0;
1125         }
1126         if (config->dv_esw_en && !sh->dev_cap.dv_esw_en) {
1127                 DRV_LOG(WARNING, "E-Switch DV flow is not supported.");
1128                 config->dv_esw_en = 0;
1129         }
1130         if (config->dv_miss_info && config->dv_esw_en)
1131                 config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
1132         if (!config->dv_esw_en &&
1133             config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1134                 DRV_LOG(WARNING,
1135                         "Metadata mode %u is not supported (no E-Switch).",
1136                         config->dv_xmeta_en);
1137                 config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1138         }
1139         /* Check sibling device configurations. */
1140         err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);
1141         if (err)
1142                 goto error;
1143         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1144         /* Check port status. */
1145         if (spawn->phys_port <= UINT8_MAX) {
1146                 /* Legacy Verbs api only support u8 port number. */
1147                 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1148                                             &port_attr);
1149                 if (err) {
1150                         DRV_LOG(ERR, "port query failed: %s", strerror(err));
1151                         goto error;
1152                 }
1153                 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1154                         DRV_LOG(ERR, "port is not configured in Ethernet mode");
1155                         err = EINVAL;
1156                         goto error;
1157                 }
1158         } else if (nl_rdma >= 0) {
1159                 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1160                 err = mlx5_nl_port_state(nl_rdma,
1161                         spawn->phys_dev_name,
1162                         spawn->phys_port);
1163                 if (err < 0) {
1164                         DRV_LOG(INFO, "Failed to get netlink port state: %s",
1165                                 strerror(rte_errno));
1166                         err = -rte_errno;
1167                         goto error;
1168                 }
1169                 port_attr.state = (enum ibv_port_state)err;
1170         }
1171         if (port_attr.state != IBV_PORT_ACTIVE)
1172                 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1173                         mlx5_glue->port_state_str(port_attr.state),
1174                         port_attr.state);
1175         /* Allocate private eth device data. */
1176         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1177                            sizeof(*priv),
1178                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1179         if (priv == NULL) {
1180                 DRV_LOG(ERR, "priv allocation failure");
1181                 err = ENOMEM;
1182                 goto error;
1183         }
1184         priv->sh = sh;
1185         priv->dev_port = spawn->phys_port;
1186         priv->pci_dev = spawn->pci_dev;
1187         priv->mtu = RTE_ETHER_MTU;
1188         /* Some internal functions rely on Netlink sockets, open them now. */
1189         priv->nl_socket_rdma = nl_rdma;
1190         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1191         priv->representor = !!switch_info->representor;
1192         priv->master = !!switch_info->master;
1193         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1194         priv->vport_meta_tag = 0;
1195         priv->vport_meta_mask = 0;
1196         priv->pf_bond = spawn->pf_bond;
1197
1198         DRV_LOG(DEBUG,
1199                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1200                 priv->dev_port, dpdk_dev->bus->name,
1201                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1202                 priv->master, priv->representor, priv->pf_bond);
1203
1204         /*
1205          * If we have E-Switch we should determine the vport attributes.
1206          * E-Switch may use either source vport field or reg_c[0] metadata
1207          * register to match on vport index. The engaged part of metadata
1208          * register is defined by mask.
1209          */
1210         if (sh->esw_mode) {
1211                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1212                                                  spawn->phys_port,
1213                                                  &vport_info);
1214                 if (err) {
1215                         DRV_LOG(WARNING,
1216                                 "Cannot query devx port %d on device %s",
1217                                 spawn->phys_port, spawn->phys_dev_name);
1218                         vport_info.query_flags = 0;
1219                 }
1220         }
1221         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1222                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1223                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1224                 if (!priv->vport_meta_mask) {
1225                         DRV_LOG(ERR,
1226                                 "vport zero mask for port %d on bonding device %s",
1227                                 spawn->phys_port, spawn->phys_dev_name);
1228                         err = ENOTSUP;
1229                         goto error;
1230                 }
1231                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1232                         DRV_LOG(ERR,
1233                                 "Invalid vport tag for port %d on bonding device %s",
1234                                 spawn->phys_port, spawn->phys_dev_name);
1235                         err = ENOTSUP;
1236                         goto error;
1237                 }
1238         }
1239         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1240                 priv->vport_id = vport_info.vport_id;
1241         } else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1242                 DRV_LOG(ERR,
1243                         "Cannot deduce vport index for port %d on bonding device %s",
1244                         spawn->phys_port, spawn->phys_dev_name);
1245                 err = ENOTSUP;
1246                 goto error;
1247         } else {
1248                 /*
1249                  * Suppose vport index in compatible way. Kernel/rdma_core
1250                  * support single E-Switch per PF configurations only and
1251                  * vport_id field contains the vport index for associated VF,
1252                  * which is deduced from representor port name.
1253                  * For example, let's have the IB device port 10, it has
1254                  * attached network device eth0, which has port name attribute
1255                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1256                  * as 3 (2+1). This assigning schema should be changed if the
1257                  * multiple E-Switch instances per PF configurations or/and PCI
1258                  * subfunctions are added.
1259                  */
1260                 priv->vport_id = switch_info->representor ?
1261                                  switch_info->port_name + 1 : -1;
1262         }
1263         priv->representor_id = mlx5_representor_id_encode(switch_info,
1264                                                           eth_da->type);
1265         /*
1266          * Look for sibling devices in order to reuse their switch domain
1267          * if any, otherwise allocate one.
1268          */
1269         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1270                 const struct mlx5_priv *opriv =
1271                         rte_eth_devices[port_id].data->dev_private;
1272
1273                 if (!opriv ||
1274                     opriv->sh != priv->sh ||
1275                         opriv->domain_id ==
1276                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1277                         continue;
1278                 priv->domain_id = opriv->domain_id;
1279                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1280                         priv->dev_port, priv->domain_id);
1281                 break;
1282         }
1283         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1284                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1285                 if (err) {
1286                         err = rte_errno;
1287                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1288                                 strerror(rte_errno));
1289                         goto error;
1290                 }
1291                 own_domain_id = 1;
1292                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1293                         priv->dev_port, priv->domain_id);
1294         }
1295         if (config->hw_padding && !sh->dev_cap.hw_padding) {
1296                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1297                 config->hw_padding = 0;
1298         } else if (config->hw_padding) {
1299                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1300         }
1301         /*
1302          * MPW is disabled by default, while the Enhanced MPW is enabled
1303          * by default.
1304          */
1305         if (config->mps == MLX5_ARG_UNSET)
1306                 config->mps = (sh->dev_cap.mps == MLX5_MPW_ENHANCED) ?
1307                               MLX5_MPW_ENHANCED : MLX5_MPW_DISABLED;
1308         else
1309                 config->mps = config->mps ? sh->dev_cap.mps : MLX5_MPW_DISABLED;
1310         DRV_LOG(INFO, "%sMPS is %s",
1311                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1312                 config->mps == MLX5_MPW ? "legacy " : "",
1313                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1314         if (sh->cdev->config.devx) {
1315                 sh->steering_format_version = hca_attr->steering_format_version;
1316                 /* LRO is supported only when DV flow enabled. */
1317                 if (sh->dev_cap.lro_supported && config->dv_flow_en)
1318                         sh->dev_cap.lro_supported = 0;
1319                 if (sh->dev_cap.lro_supported) {
1320                         /*
1321                          * If LRO timeout is not configured by application,
1322                          * use the minimal supported value.
1323                          */
1324                         if (!config->lro_timeout)
1325                                 config->lro_timeout =
1326                                        hca_attr->lro_timer_supported_periods[0];
1327                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1328                                 config->lro_timeout);
1329                 }
1330 #if defined(HAVE_MLX5DV_DR) && \
1331         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1332          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1333                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1334                     config->dv_flow_en) {
1335                         uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
1336                         /*
1337                          * Meter needs two REG_C's for color match and pre-sfx
1338                          * flow match. Here get the REG_C for color match.
1339                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1340                          */
1341                         reg_c_mask &= 0xfc;
1342                         if (__builtin_popcount(reg_c_mask) < 1) {
1343                                 priv->mtr_en = 0;
1344                                 DRV_LOG(WARNING, "No available register for"
1345                                         " meter.");
1346                         } else {
1347                                 /*
1348                                  * The meter color register is used by the
1349                                  * flow-hit feature as well.
1350                                  * The flow-hit feature must use REG_C_3
1351                                  * Prefer REG_C_3 if it is available.
1352                                  */
1353                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1354                                         priv->mtr_color_reg = REG_C_3;
1355                                 else
1356                                         priv->mtr_color_reg = ffs(reg_c_mask)
1357                                                               - 1 + REG_C_0;
1358                                 priv->mtr_en = 1;
1359                                 priv->mtr_reg_share = hca_attr->qos.flow_meter;
1360                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1361                                         priv->mtr_color_reg);
1362                         }
1363                 }
1364                 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
1365                         uint32_t log_obj_size =
1366                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1367                         if (log_obj_size >=
1368                             hca_attr->qos.log_meter_aso_granularity &&
1369                             log_obj_size <=
1370                             hca_attr->qos.log_meter_aso_max_alloc)
1371                                 sh->meter_aso_en = 1;
1372                 }
1373                 if (priv->mtr_en) {
1374                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1375                         if (err) {
1376                                 err = -err;
1377                                 goto error;
1378                         }
1379                 }
1380                 if (hca_attr->flow.tunnel_header_0_1)
1381                         sh->tunnel_header_0_1 = 1;
1382 #endif
1383 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1384                 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
1385                         sh->flow_hit_aso_en = 1;
1386                         err = mlx5_flow_aso_age_mng_init(sh);
1387                         if (err) {
1388                                 err = -err;
1389                                 goto error;
1390                         }
1391                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1392                 }
1393 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1394 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1395         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1396                 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
1397                         err = mlx5_flow_aso_ct_mng_init(sh);
1398                         if (err) {
1399                                 err = -err;
1400                                 goto error;
1401                         }
1402                         DRV_LOG(DEBUG, "CT ASO is supported.");
1403                         sh->ct_aso_en = 1;
1404                 }
1405 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1406 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1407                 if (hca_attr->log_max_ft_sampler_num > 0  &&
1408                     config->dv_flow_en) {
1409                         priv->sampler_en = 1;
1410                         DRV_LOG(DEBUG, "Sampler enabled!");
1411                 } else {
1412                         priv->sampler_en = 0;
1413                         if (!hca_attr->log_max_ft_sampler_num)
1414                                 DRV_LOG(WARNING,
1415                                         "No available register for sampler.");
1416                         else
1417                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1418                 }
1419 #endif
1420         }
1421         if (config->cqe_comp && !sh->dev_cap.cqe_comp) {
1422                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported.");
1423                 config->cqe_comp = 0;
1424         }
1425         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1426             (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_flow_tag)) {
1427                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1428                                  " format isn't supported.");
1429                 config->cqe_comp = 0;
1430         }
1431         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1432             (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_l3_l4_tag)) {
1433                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1434                                  " format isn't supported.");
1435                 config->cqe_comp = 0;
1436         }
1437         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1438                         config->cqe_comp ? "" : "not ");
1439         if (config->tx_pp && !sh->dev_cap.txpp_en) {
1440                 DRV_LOG(ERR, "Packet pacing is not supported.");
1441                 err = ENODEV;
1442                 goto error;
1443         }
1444         if (config->std_delay_drop || config->hp_delay_drop) {
1445                 if (!hca_attr->rq_delay_drop) {
1446                         config->std_delay_drop = 0;
1447                         config->hp_delay_drop = 0;
1448                         DRV_LOG(WARNING,
1449                                 "dev_port-%u: Rxq delay drop is not supported",
1450                                 priv->dev_port);
1451                 }
1452         }
1453         /*
1454          * If HW has bug working with tunnel packet decapsulation and
1455          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1456          * bit. Then RTE_ETH_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1457          */
1458         if (sh->dev_cap.scatter_fcs_w_decap_disable && config->decap_en)
1459                 config->hw_fcs_strip = 0;
1460         else
1461                 config->hw_fcs_strip = sh->dev_cap.hw_fcs_strip;
1462         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1463                 (config->hw_fcs_strip ? "" : "not "));
1464         if (config->mprq.enabled && !sh->dev_cap.mprq.enabled) {
1465                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported.");
1466                 config->mprq.enabled = 0;
1467         }
1468         if (config->max_dump_files_num == 0)
1469                 config->max_dump_files_num = 128;
1470         eth_dev = rte_eth_dev_allocate(name);
1471         if (eth_dev == NULL) {
1472                 DRV_LOG(ERR, "can not allocate rte ethdev");
1473                 err = ENOMEM;
1474                 goto error;
1475         }
1476         if (priv->representor) {
1477                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1478                 eth_dev->data->representor_id = priv->representor_id;
1479                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1480                         struct mlx5_priv *opriv =
1481                                 rte_eth_devices[port_id].data->dev_private;
1482                         if (opriv &&
1483                             opriv->master &&
1484                             opriv->domain_id == priv->domain_id &&
1485                             opriv->sh == priv->sh) {
1486                                 eth_dev->data->backer_port_id = port_id;
1487                                 break;
1488                         }
1489                 }
1490                 if (port_id >= RTE_MAX_ETHPORTS)
1491                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1492         }
1493         priv->mp_id.port_id = eth_dev->data->port_id;
1494         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1495         /*
1496          * Store associated network device interface index. This index
1497          * is permanent throughout the lifetime of device. So, we may store
1498          * the ifindex here and use the cached value further.
1499          */
1500         MLX5_ASSERT(spawn->ifindex);
1501         priv->if_index = spawn->ifindex;
1502         priv->lag_affinity_idx = sh->refcnt - 1;
1503         eth_dev->data->dev_private = priv;
1504         priv->dev_data = eth_dev->data;
1505         eth_dev->data->mac_addrs = priv->mac;
1506         eth_dev->device = dpdk_dev;
1507         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1508         /* Configure the first MAC address by default. */
1509         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1510                 DRV_LOG(ERR,
1511                         "port %u cannot get MAC address, is mlx5_en"
1512                         " loaded? (errno: %s)",
1513                         eth_dev->data->port_id, strerror(rte_errno));
1514                 err = ENODEV;
1515                 goto error;
1516         }
1517         DRV_LOG(INFO,
1518                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1519                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1520 #ifdef RTE_LIBRTE_MLX5_DEBUG
1521         {
1522                 char ifname[MLX5_NAMESIZE];
1523
1524                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1525                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1526                                 eth_dev->data->port_id, ifname);
1527                 else
1528                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1529                                 eth_dev->data->port_id);
1530         }
1531 #endif
1532         /* Get actual MTU if possible. */
1533         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1534         if (err) {
1535                 err = rte_errno;
1536                 goto error;
1537         }
1538         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1539                 priv->mtu);
1540         /* Initialize burst functions to prevent crashes before link-up. */
1541         eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1542         eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1543         eth_dev->dev_ops = &mlx5_dev_ops;
1544         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1545         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1546         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1547         /* Register MAC address. */
1548         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1549         if (sh->dev_cap.vf && config->vf_nl_en)
1550                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1551                                       mlx5_ifindex(eth_dev),
1552                                       eth_dev->data->mac_addrs,
1553                                       MLX5_MAX_MAC_ADDRESSES);
1554         priv->ctrl_flows = 0;
1555         rte_spinlock_init(&priv->flow_list_lock);
1556         TAILQ_INIT(&priv->flow_meters);
1557         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1558         if (!priv->mtr_profile_tbl)
1559                 goto error;
1560         /* Bring Ethernet device up. */
1561         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1562                 eth_dev->data->port_id);
1563         mlx5_set_link_up(eth_dev);
1564         /*
1565          * Even though the interrupt handler is not installed yet,
1566          * interrupts will still trigger on the async_fd from
1567          * Verbs context returned by ibv_open_device().
1568          */
1569         mlx5_link_update(eth_dev, 0);
1570         /* Detect minimal data bytes to inline. */
1571         mlx5_set_min_inline(spawn, config);
1572         /* Store device configuration on private structure. */
1573         priv->config = *config;
1574         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1575                 icfg[i].release_mem_en = !!config->reclaim_mode;
1576                 if (config->reclaim_mode)
1577                         icfg[i].per_core_cache = 0;
1578                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1579                 if (!priv->flows[i])
1580                         goto error;
1581         }
1582         /* Create context for virtual machine VLAN workaround. */
1583         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1584         if (config->dv_flow_en) {
1585                 err = mlx5_alloc_shared_dr(priv);
1586                 if (err)
1587                         goto error;
1588                 if (mlx5_flex_item_port_init(eth_dev) < 0)
1589                         goto error;
1590         }
1591         if (sh->cdev->config.devx && config->dv_flow_en &&
1592             sh->dev_cap.dest_tir) {
1593                 priv->obj_ops = devx_obj_ops;
1594                 mlx5_queue_counter_id_prepare(eth_dev);
1595                 priv->obj_ops.lb_dummy_queue_create =
1596                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1597                 priv->obj_ops.lb_dummy_queue_release =
1598                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1599         } else if (spawn->max_port > UINT8_MAX) {
1600                 /* Verbs can't support ports larger than 255 by design. */
1601                 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1602                 err = ENOTSUP;
1603                 goto error;
1604         } else {
1605                 priv->obj_ops = ibv_obj_ops;
1606         }
1607         if (config->tx_pp &&
1608             priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1609                 /*
1610                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1611                  * packet pacing and already checked above.
1612                  * Hence, we should only make sure the SQs will be created
1613                  * with DevX, not with Verbs.
1614                  * Verbs allocates the SQ UAR on its own and it can't be shared
1615                  * with Clock Queue UAR as required for Tx scheduling.
1616                  */
1617                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1618                 err = ENODEV;
1619                 goto error;
1620         }
1621         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1622         if (!priv->drop_queue.hrxq)
1623                 goto error;
1624         /* Port representor shares the same max priority with pf port. */
1625         if (!priv->sh->flow_priority_check_flag) {
1626                 /* Supported Verbs flow priority number detection. */
1627                 err = mlx5_flow_discover_priorities(eth_dev);
1628                 priv->sh->flow_max_priority = err;
1629                 priv->sh->flow_priority_check_flag = 1;
1630         } else {
1631                 err = priv->sh->flow_max_priority;
1632         }
1633         if (err < 0) {
1634                 err = -err;
1635                 goto error;
1636         }
1637         mlx5_set_metadata_mask(eth_dev);
1638         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1639             !priv->sh->dv_regc0_mask) {
1640                 DRV_LOG(ERR, "metadata mode %u is not supported "
1641                              "(no metadata reg_c[0] is available)",
1642                              priv->config.dv_xmeta_en);
1643                         err = ENOTSUP;
1644                         goto error;
1645         }
1646         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1647                                        mlx5_hrxq_create_cb,
1648                                        mlx5_hrxq_match_cb,
1649                                        mlx5_hrxq_remove_cb,
1650                                        mlx5_hrxq_clone_cb,
1651                                        mlx5_hrxq_clone_free_cb);
1652         if (!priv->hrxqs)
1653                 goto error;
1654         rte_rwlock_init(&priv->ind_tbls_lock);
1655         /* Query availability of metadata reg_c's. */
1656         if (!priv->sh->metadata_regc_check_flag) {
1657                 err = mlx5_flow_discover_mreg_c(eth_dev);
1658                 if (err < 0) {
1659                         err = -err;
1660                         goto error;
1661                 }
1662         }
1663         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1664                 DRV_LOG(DEBUG,
1665                         "port %u extensive metadata register is not supported",
1666                         eth_dev->data->port_id);
1667                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1668                         DRV_LOG(ERR, "metadata mode %u is not supported "
1669                                      "(no metadata registers available)",
1670                                      priv->config.dv_xmeta_en);
1671                         err = ENOTSUP;
1672                         goto error;
1673                 }
1674         }
1675         if (priv->config.dv_flow_en &&
1676             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1677             mlx5_flow_ext_mreg_supported(eth_dev) &&
1678             priv->sh->dv_regc0_mask) {
1679                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1680                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1681                                                       false, true, eth_dev,
1682                                                       flow_dv_mreg_create_cb,
1683                                                       flow_dv_mreg_match_cb,
1684                                                       flow_dv_mreg_remove_cb,
1685                                                       flow_dv_mreg_clone_cb,
1686                                                     flow_dv_mreg_clone_free_cb);
1687                 if (!priv->mreg_cp_tbl) {
1688                         err = ENOMEM;
1689                         goto error;
1690                 }
1691         }
1692         rte_spinlock_init(&priv->shared_act_sl);
1693         mlx5_flow_counter_mode_config(eth_dev);
1694         mlx5_flow_drop_action_config(eth_dev);
1695         if (priv->config.dv_flow_en)
1696                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1697         return eth_dev;
1698 error:
1699         if (priv) {
1700                 if (priv->mreg_cp_tbl)
1701                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1702                 if (priv->sh)
1703                         mlx5_os_free_shared_dr(priv);
1704                 if (priv->nl_socket_route >= 0)
1705                         close(priv->nl_socket_route);
1706                 if (priv->vmwa_context)
1707                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1708                 if (eth_dev && priv->drop_queue.hrxq)
1709                         mlx5_drop_action_destroy(eth_dev);
1710                 if (priv->mtr_profile_tbl)
1711                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1712                 if (own_domain_id)
1713                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1714                 if (priv->hrxqs)
1715                         mlx5_list_destroy(priv->hrxqs);
1716                 if (eth_dev && priv->flex_item_map)
1717                         mlx5_flex_item_port_cleanup(eth_dev);
1718                 mlx5_free(priv);
1719                 if (eth_dev != NULL)
1720                         eth_dev->data->dev_private = NULL;
1721         }
1722         if (eth_dev != NULL) {
1723                 /* mac_addrs must not be freed alone because part of
1724                  * dev_private
1725                  **/
1726                 eth_dev->data->mac_addrs = NULL;
1727                 rte_eth_dev_release_port(eth_dev);
1728         }
1729         if (sh)
1730                 mlx5_free_shared_dev_ctx(sh);
1731         if (nl_rdma >= 0)
1732                 close(nl_rdma);
1733         MLX5_ASSERT(err > 0);
1734         rte_errno = err;
1735         return NULL;
1736 }
1737
1738 /**
1739  * Comparison callback to sort device data.
1740  *
1741  * This is meant to be used with qsort().
1742  *
1743  * @param a[in]
1744  *   Pointer to pointer to first data object.
1745  * @param b[in]
1746  *   Pointer to pointer to second data object.
1747  *
1748  * @return
1749  *   0 if both objects are equal, less than 0 if the first argument is less
1750  *   than the second, greater than 0 otherwise.
1751  */
1752 static int
1753 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1754 {
1755         const struct mlx5_switch_info *si_a =
1756                 &((const struct mlx5_dev_spawn_data *)a)->info;
1757         const struct mlx5_switch_info *si_b =
1758                 &((const struct mlx5_dev_spawn_data *)b)->info;
1759         int ret;
1760
1761         /* Master device first. */
1762         ret = si_b->master - si_a->master;
1763         if (ret)
1764                 return ret;
1765         /* Then representor devices. */
1766         ret = si_b->representor - si_a->representor;
1767         if (ret)
1768                 return ret;
1769         /* Unidentified devices come last in no specific order. */
1770         if (!si_a->representor)
1771                 return 0;
1772         /* Order representors by name. */
1773         return si_a->port_name - si_b->port_name;
1774 }
1775
1776 /**
1777  * Match PCI information for possible slaves of bonding device.
1778  *
1779  * @param[in] ibdev_name
1780  *   Name of Infiniband device.
1781  * @param[in] pci_dev
1782  *   Pointer to primary PCI address structure to match.
1783  * @param[in] nl_rdma
1784  *   Netlink RDMA group socket handle.
1785  * @param[in] owner
1786  *   Representor owner PF index.
1787  * @param[out] bond_info
1788  *   Pointer to bonding information.
1789  *
1790  * @return
1791  *   negative value if no bonding device found, otherwise
1792  *   positive index of slave PF in bonding.
1793  */
1794 static int
1795 mlx5_device_bond_pci_match(const char *ibdev_name,
1796                            const struct rte_pci_addr *pci_dev,
1797                            int nl_rdma, uint16_t owner,
1798                            struct mlx5_bond_info *bond_info)
1799 {
1800         char ifname[IF_NAMESIZE + 1];
1801         unsigned int ifindex;
1802         unsigned int np, i;
1803         FILE *bond_file = NULL, *file;
1804         int pf = -1;
1805         int ret;
1806         uint8_t cur_guid[32] = {0};
1807         uint8_t guid[32] = {0};
1808
1809         /*
1810          * Try to get master device name. If something goes wrong suppose
1811          * the lack of kernel support and no bonding devices.
1812          */
1813         memset(bond_info, 0, sizeof(*bond_info));
1814         if (nl_rdma < 0)
1815                 return -1;
1816         if (!strstr(ibdev_name, "bond"))
1817                 return -1;
1818         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1819         if (!np)
1820                 return -1;
1821         if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
1822                 return -1;
1823         /*
1824          * The master device might not be on the predefined port(not on port
1825          * index 1, it is not guaranteed), we have to scan all Infiniband
1826          * device ports and find master.
1827          */
1828         for (i = 1; i <= np; ++i) {
1829                 /* Check whether Infiniband port is populated. */
1830                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1831                 if (!ifindex)
1832                         continue;
1833                 if (!if_indextoname(ifindex, ifname))
1834                         continue;
1835                 /* Try to read bonding slave names from sysfs. */
1836                 MKSTR(slaves,
1837                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1838                 bond_file = fopen(slaves, "r");
1839                 if (bond_file)
1840                         break;
1841         }
1842         if (!bond_file)
1843                 return -1;
1844         /* Use safe format to check maximal buffer length. */
1845         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1846         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1847                 char tmp_str[IF_NAMESIZE + 32];
1848                 struct rte_pci_addr pci_addr;
1849                 struct mlx5_switch_info info;
1850                 int ret;
1851
1852                 /* Process slave interface names in the loop. */
1853                 snprintf(tmp_str, sizeof(tmp_str),
1854                          "/sys/class/net/%s", ifname);
1855                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1856                         DRV_LOG(WARNING,
1857                                 "Cannot get PCI address for netdev \"%s\".",
1858                                 ifname);
1859                         continue;
1860                 }
1861                 /* Slave interface PCI address match found. */
1862                 snprintf(tmp_str, sizeof(tmp_str),
1863                          "/sys/class/net/%s/phys_port_name", ifname);
1864                 file = fopen(tmp_str, "rb");
1865                 if (!file)
1866                         break;
1867                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1868                 if (fscanf(file, "%32s", tmp_str) == 1)
1869                         mlx5_translate_port_name(tmp_str, &info);
1870                 fclose(file);
1871                 /* Only process PF ports. */
1872                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1873                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1874                         continue;
1875                 /* Check max bonding member. */
1876                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1877                         DRV_LOG(WARNING, "bonding index out of range, "
1878                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1879                                 tmp_str);
1880                         break;
1881                 }
1882                 /* Get ifindex. */
1883                 snprintf(tmp_str, sizeof(tmp_str),
1884                          "/sys/class/net/%s/ifindex", ifname);
1885                 file = fopen(tmp_str, "rb");
1886                 if (!file)
1887                         break;
1888                 ret = fscanf(file, "%u", &ifindex);
1889                 fclose(file);
1890                 if (ret != 1)
1891                         break;
1892                 /* Save bonding info. */
1893                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1894                         sizeof(bond_info->ports[0].ifname));
1895                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1896                 bond_info->ports[info.port_name].ifindex = ifindex;
1897                 bond_info->n_port++;
1898                 /*
1899                  * Under socket direct mode, bonding will use
1900                  * system_image_guid as identification.
1901                  * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
1902                  * All bonding members should have the same guid even if driver
1903                  * is using PCIe BDF.
1904                  */
1905                 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
1906                 if (ret < 0)
1907                         break;
1908                 else if (ret > 0) {
1909                         if (!memcmp(guid, cur_guid, sizeof(guid)) &&
1910                             owner == info.port_name &&
1911                             (owner != 0 || (owner == 0 &&
1912                             !rte_pci_addr_cmp(pci_dev, &pci_addr))))
1913                                 pf = info.port_name;
1914                 } else if (pci_dev->domain == pci_addr.domain &&
1915                     pci_dev->bus == pci_addr.bus &&
1916                     pci_dev->devid == pci_addr.devid &&
1917                     ((pci_dev->function == 0 &&
1918                       pci_dev->function + owner == pci_addr.function) ||
1919                      (pci_dev->function == owner &&
1920                       pci_addr.function == owner)))
1921                         pf = info.port_name;
1922         }
1923         if (pf >= 0) {
1924                 /* Get bond interface info */
1925                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1926                                            bond_info->ifname);
1927                 if (ret)
1928                         DRV_LOG(ERR, "unable to get bond info: %s",
1929                                 strerror(rte_errno));
1930                 else
1931                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1932                                 ifindex, bond_info->ifindex, bond_info->ifname);
1933         }
1934         if (owner == 0 && pf != 0) {
1935                 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner",
1936                                 pci_dev->domain, pci_dev->bus, pci_dev->devid,
1937                                 pci_dev->function);
1938         }
1939         return pf;
1940 }
1941
1942 static void
1943 mlx5_os_config_default(struct mlx5_dev_config *config)
1944 {
1945         memset(config, 0, sizeof(*config));
1946         config->mps = MLX5_ARG_UNSET;
1947         config->cqe_comp = 1;
1948         config->rx_vec_en = 1;
1949         config->txq_inline_max = MLX5_ARG_UNSET;
1950         config->txq_inline_min = MLX5_ARG_UNSET;
1951         config->txq_inline_mpw = MLX5_ARG_UNSET;
1952         config->txqs_inline = MLX5_ARG_UNSET;
1953         config->vf_nl_en = 1;
1954         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1955         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1956         config->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
1957         config->dv_esw_en = 1;
1958         config->dv_flow_en = 1;
1959         config->decap_en = 1;
1960         config->log_hp_size = MLX5_ARG_UNSET;
1961         config->allow_duplicate_pattern = 1;
1962         config->std_delay_drop = 0;
1963         config->hp_delay_drop = 0;
1964 }
1965
1966 /**
1967  * Register a PCI device within bonding.
1968  *
1969  * This function spawns Ethernet devices out of a given PCI device and
1970  * bonding owner PF index.
1971  *
1972  * @param[in] cdev
1973  *   Pointer to common mlx5 device structure.
1974  * @param[in] req_eth_da
1975  *   Requested ethdev device argument.
1976  * @param[in] owner_id
1977  *   Requested owner PF port ID within bonding device, default to 0.
1978  *
1979  * @return
1980  *   0 on success, a negative errno value otherwise and rte_errno is set.
1981  */
1982 static int
1983 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
1984                      struct rte_eth_devargs *req_eth_da,
1985                      uint16_t owner_id)
1986 {
1987         struct ibv_device **ibv_list;
1988         /*
1989          * Number of found IB Devices matching with requested PCI BDF.
1990          * nd != 1 means there are multiple IB devices over the same
1991          * PCI device and we have representors and master.
1992          */
1993         unsigned int nd = 0;
1994         /*
1995          * Number of found IB device Ports. nd = 1 and np = 1..n means
1996          * we have the single multiport IB device, and there may be
1997          * representors attached to some of found ports.
1998          */
1999         unsigned int np = 0;
2000         /*
2001          * Number of DPDK ethernet devices to Spawn - either over
2002          * multiple IB devices or multiple ports of single IB device.
2003          * Actually this is the number of iterations to spawn.
2004          */
2005         unsigned int ns = 0;
2006         /*
2007          * Bonding device
2008          *   < 0 - no bonding device (single one)
2009          *  >= 0 - bonding device (value is slave PF index)
2010          */
2011         int bd = -1;
2012         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2013         struct mlx5_dev_spawn_data *list = NULL;
2014         struct mlx5_dev_config dev_config;
2015         struct rte_eth_devargs eth_da = *req_eth_da;
2016         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2017         struct mlx5_bond_info bond_info;
2018         int ret = -1;
2019
2020         errno = 0;
2021         ibv_list = mlx5_glue->get_device_list(&ret);
2022         if (!ibv_list) {
2023                 rte_errno = errno ? errno : ENOSYS;
2024                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2025                 return -rte_errno;
2026         }
2027         /*
2028          * First scan the list of all Infiniband devices to find
2029          * matching ones, gathering into the list.
2030          */
2031         struct ibv_device *ibv_match[ret + 1];
2032         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2033         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2034         unsigned int i;
2035
2036         while (ret-- > 0) {
2037                 struct rte_pci_addr pci_addr;
2038
2039                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2040                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2041                                                 nl_rdma, owner_id, &bond_info);
2042                 if (bd >= 0) {
2043                         /*
2044                          * Bonding device detected. Only one match is allowed,
2045                          * the bonding is supported over multi-port IB device,
2046                          * there should be no matches on representor PCI
2047                          * functions or non VF LAG bonding devices with
2048                          * specified address.
2049                          */
2050                         if (nd) {
2051                                 DRV_LOG(ERR,
2052                                         "multiple PCI match on bonding device"
2053                                         "\"%s\" found", ibv_list[ret]->name);
2054                                 rte_errno = ENOENT;
2055                                 ret = -rte_errno;
2056                                 goto exit;
2057                         }
2058                         /* Amend owner pci address if owner PF ID specified. */
2059                         if (eth_da.nb_representor_ports)
2060                                 owner_pci.function += owner_id;
2061                         DRV_LOG(INFO,
2062                                 "PCI information matches for slave %d bonding device \"%s\"",
2063                                 bd, ibv_list[ret]->name);
2064                         ibv_match[nd++] = ibv_list[ret];
2065                         break;
2066                 } else {
2067                         /* Bonding device not found. */
2068                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2069                                               &pci_addr))
2070                                 continue;
2071                         if (owner_pci.domain != pci_addr.domain ||
2072                             owner_pci.bus != pci_addr.bus ||
2073                             owner_pci.devid != pci_addr.devid ||
2074                             owner_pci.function != pci_addr.function)
2075                                 continue;
2076                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2077                                 ibv_list[ret]->name);
2078                         ibv_match[nd++] = ibv_list[ret];
2079                 }
2080         }
2081         ibv_match[nd] = NULL;
2082         if (!nd) {
2083                 /* No device matches, just complain and bail out. */
2084                 DRV_LOG(WARNING,
2085                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2086                         " are kernel drivers loaded?",
2087                         owner_pci.domain, owner_pci.bus,
2088                         owner_pci.devid, owner_pci.function);
2089                 rte_errno = ENOENT;
2090                 ret = -rte_errno;
2091                 goto exit;
2092         }
2093         if (nd == 1) {
2094                 /*
2095                  * Found single matching device may have multiple ports.
2096                  * Each port may be representor, we have to check the port
2097                  * number and check the representors existence.
2098                  */
2099                 if (nl_rdma >= 0)
2100                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2101                 if (!np)
2102                         DRV_LOG(WARNING,
2103                                 "Cannot get IB device \"%s\" ports number.",
2104                                 ibv_match[0]->name);
2105                 if (bd >= 0 && !np) {
2106                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2107                         rte_errno = ENOENT;
2108                         ret = -rte_errno;
2109                         goto exit;
2110                 }
2111         }
2112         /* Now we can determine the maximal amount of devices to be spawned. */
2113         list = mlx5_malloc(MLX5_MEM_ZERO,
2114                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2115                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2116         if (!list) {
2117                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2118                 rte_errno = ENOMEM;
2119                 ret = -rte_errno;
2120                 goto exit;
2121         }
2122         if (bd >= 0 || np > 1) {
2123                 /*
2124                  * Single IB device with multiple ports found,
2125                  * it may be E-Switch master device and representors.
2126                  * We have to perform identification through the ports.
2127                  */
2128                 MLX5_ASSERT(nl_rdma >= 0);
2129                 MLX5_ASSERT(ns == 0);
2130                 MLX5_ASSERT(nd == 1);
2131                 MLX5_ASSERT(np);
2132                 for (i = 1; i <= np; ++i) {
2133                         list[ns].bond_info = &bond_info;
2134                         list[ns].max_port = np;
2135                         list[ns].phys_port = i;
2136                         list[ns].phys_dev_name = ibv_match[0]->name;
2137                         list[ns].eth_dev = NULL;
2138                         list[ns].pci_dev = pci_dev;
2139                         list[ns].cdev = cdev;
2140                         list[ns].pf_bond = bd;
2141                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2142                                                            ibv_match[0]->name,
2143                                                            i);
2144                         if (!list[ns].ifindex) {
2145                                 /*
2146                                  * No network interface index found for the
2147                                  * specified port, it means there is no
2148                                  * representor on this port. It's OK,
2149                                  * there can be disabled ports, for example
2150                                  * if sriov_numvfs < sriov_totalvfs.
2151                                  */
2152                                 continue;
2153                         }
2154                         ret = -1;
2155                         if (nl_route >= 0)
2156                                 ret = mlx5_nl_switch_info(nl_route,
2157                                                           list[ns].ifindex,
2158                                                           &list[ns].info);
2159                         if (ret || (!list[ns].info.representor &&
2160                                     !list[ns].info.master)) {
2161                                 /*
2162                                  * We failed to recognize representors with
2163                                  * Netlink, let's try to perform the task
2164                                  * with sysfs.
2165                                  */
2166                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2167                                                              &list[ns].info);
2168                         }
2169                         if (!ret && bd >= 0) {
2170                                 switch (list[ns].info.name_type) {
2171                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2172                                         if (np == 1) {
2173                                                 /*
2174                                                  * Force standalone bonding
2175                                                  * device for ROCE LAG
2176                                                  * configurations.
2177                                                  */
2178                                                 list[ns].info.master = 0;
2179                                                 list[ns].info.representor = 0;
2180                                         }
2181                                         if (list[ns].info.port_name == bd)
2182                                                 ns++;
2183                                         break;
2184                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2185                                         /* Fallthrough */
2186                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2187                                         /* Fallthrough */
2188                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2189                                         if (list[ns].info.pf_num == bd)
2190                                                 ns++;
2191                                         break;
2192                                 default:
2193                                         break;
2194                                 }
2195                                 continue;
2196                         }
2197                         if (!ret && (list[ns].info.representor ^
2198                                      list[ns].info.master))
2199                                 ns++;
2200                 }
2201                 if (!ns) {
2202                         DRV_LOG(ERR,
2203                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2204                         rte_errno = ENOENT;
2205                         ret = -rte_errno;
2206                         goto exit;
2207                 }
2208         } else {
2209                 /*
2210                  * The existence of several matching entries (nd > 1) means
2211                  * port representors have been instantiated. No existing Verbs
2212                  * call nor sysfs entries can tell them apart, this can only
2213                  * be done through Netlink calls assuming kernel drivers are
2214                  * recent enough to support them.
2215                  *
2216                  * In the event of identification failure through Netlink,
2217                  * try again through sysfs, then:
2218                  *
2219                  * 1. A single IB device matches (nd == 1) with single
2220                  *    port (np=0/1) and is not a representor, assume
2221                  *    no switch support.
2222                  *
2223                  * 2. Otherwise no safe assumptions can be made;
2224                  *    complain louder and bail out.
2225                  */
2226                 for (i = 0; i != nd; ++i) {
2227                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2228                         list[ns].bond_info = NULL;
2229                         list[ns].max_port = 1;
2230                         list[ns].phys_port = 1;
2231                         list[ns].phys_dev_name = ibv_match[i]->name;
2232                         list[ns].eth_dev = NULL;
2233                         list[ns].pci_dev = pci_dev;
2234                         list[ns].cdev = cdev;
2235                         list[ns].pf_bond = -1;
2236                         list[ns].ifindex = 0;
2237                         if (nl_rdma >= 0)
2238                                 list[ns].ifindex = mlx5_nl_ifindex
2239                                                             (nl_rdma,
2240                                                              ibv_match[i]->name,
2241                                                              1);
2242                         if (!list[ns].ifindex) {
2243                                 char ifname[IF_NAMESIZE];
2244
2245                                 /*
2246                                  * Netlink failed, it may happen with old
2247                                  * ib_core kernel driver (before 4.16).
2248                                  * We can assume there is old driver because
2249                                  * here we are processing single ports IB
2250                                  * devices. Let's try sysfs to retrieve
2251                                  * the ifindex. The method works for
2252                                  * master device only.
2253                                  */
2254                                 if (nd > 1) {
2255                                         /*
2256                                          * Multiple devices found, assume
2257                                          * representors, can not distinguish
2258                                          * master/representor and retrieve
2259                                          * ifindex via sysfs.
2260                                          */
2261                                         continue;
2262                                 }
2263                                 ret = mlx5_get_ifname_sysfs
2264                                         (ibv_match[i]->ibdev_path, ifname);
2265                                 if (!ret)
2266                                         list[ns].ifindex =
2267                                                 if_nametoindex(ifname);
2268                                 if (!list[ns].ifindex) {
2269                                         /*
2270                                          * No network interface index found
2271                                          * for the specified device, it means
2272                                          * there it is neither representor
2273                                          * nor master.
2274                                          */
2275                                         continue;
2276                                 }
2277                         }
2278                         ret = -1;
2279                         if (nl_route >= 0)
2280                                 ret = mlx5_nl_switch_info(nl_route,
2281                                                           list[ns].ifindex,
2282                                                           &list[ns].info);
2283                         if (ret || (!list[ns].info.representor &&
2284                                     !list[ns].info.master)) {
2285                                 /*
2286                                  * We failed to recognize representors with
2287                                  * Netlink, let's try to perform the task
2288                                  * with sysfs.
2289                                  */
2290                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2291                                                              &list[ns].info);
2292                         }
2293                         if (!ret && (list[ns].info.representor ^
2294                                      list[ns].info.master)) {
2295                                 ns++;
2296                         } else if ((nd == 1) &&
2297                                    !list[ns].info.representor &&
2298                                    !list[ns].info.master) {
2299                                 /*
2300                                  * Single IB device with one physical port and
2301                                  * attached network device.
2302                                  * May be SRIOV is not enabled or there is no
2303                                  * representors.
2304                                  */
2305                                 DRV_LOG(INFO, "No E-Switch support detected.");
2306                                 ns++;
2307                                 break;
2308                         }
2309                 }
2310                 if (!ns) {
2311                         DRV_LOG(ERR,
2312                                 "Unable to recognize master/representors on the multiple IB devices.");
2313                         rte_errno = ENOENT;
2314                         ret = -rte_errno;
2315                         goto exit;
2316                 }
2317                 /*
2318                  * New kernels may add the switch_id attribute for the case
2319                  * there is no E-Switch and we wrongly recognized the only
2320                  * device as master. Override this if there is the single
2321                  * device with single port and new device name format present.
2322                  */
2323                 if (nd == 1 &&
2324                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2325                         list[0].info.master = 0;
2326                         list[0].info.representor = 0;
2327                 }
2328         }
2329         MLX5_ASSERT(ns);
2330         /*
2331          * Sort list to probe devices in natural order for users convenience
2332          * (i.e. master first, then representors from lowest to highest ID).
2333          */
2334         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2335         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2336                 /* Set devargs default values. */
2337                 if (eth_da.nb_mh_controllers == 0) {
2338                         eth_da.nb_mh_controllers = 1;
2339                         eth_da.mh_controllers[0] = 0;
2340                 }
2341                 if (eth_da.nb_ports == 0 && ns > 0) {
2342                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2343                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2344                                         pci_dev->device.devargs->args);
2345                         eth_da.nb_ports = 1;
2346                         eth_da.ports[0] = list[0].info.pf_num;
2347                 }
2348                 if (eth_da.nb_representor_ports == 0) {
2349                         eth_da.nb_representor_ports = 1;
2350                         eth_da.representor_ports[0] = 0;
2351                 }
2352         }
2353         for (i = 0; i != ns; ++i) {
2354                 uint32_t restore;
2355
2356                 /* Default configuration. */
2357                 mlx5_os_config_default(&dev_config);
2358                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2359                                                  &dev_config, &eth_da);
2360                 if (!list[i].eth_dev) {
2361                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2362                                 break;
2363                         /* Device is disabled or already spawned. Ignore it. */
2364                         continue;
2365                 }
2366                 restore = list[i].eth_dev->data->dev_flags;
2367                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2368                 /**
2369                  * Each representor has a dedicated interrupts vector.
2370                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2371                  * representor eth_dev object because representor and PF
2372                  * share the same PCI address.
2373                  * Override representor device with a dedicated
2374                  * interrupts handle here.
2375                  * Representor interrupts handle is released in mlx5_dev_stop().
2376                  */
2377                 if (list[i].info.representor) {
2378                         struct rte_intr_handle *intr_handle =
2379                                 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2380                         if (intr_handle == NULL) {
2381                                 DRV_LOG(ERR,
2382                                         "port %u failed to allocate memory for interrupt handler "
2383                                         "Rx interrupts will not be supported",
2384                                         i);
2385                                 rte_errno = ENOMEM;
2386                                 ret = -rte_errno;
2387                                 goto exit;
2388                         }
2389                         list[i].eth_dev->intr_handle = intr_handle;
2390                 }
2391                 /* Restore non-PCI flags cleared by the above call. */
2392                 list[i].eth_dev->data->dev_flags |= restore;
2393                 rte_eth_dev_probing_finish(list[i].eth_dev);
2394         }
2395         if (i != ns) {
2396                 DRV_LOG(ERR,
2397                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2398                         " encountering an error: %s",
2399                         owner_pci.domain, owner_pci.bus,
2400                         owner_pci.devid, owner_pci.function,
2401                         strerror(rte_errno));
2402                 ret = -rte_errno;
2403                 /* Roll back. */
2404                 while (i--) {
2405                         if (!list[i].eth_dev)
2406                                 continue;
2407                         mlx5_dev_close(list[i].eth_dev);
2408                         /* mac_addrs must not be freed because in dev_private */
2409                         list[i].eth_dev->data->mac_addrs = NULL;
2410                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2411                 }
2412                 /* Restore original error. */
2413                 rte_errno = -ret;
2414         } else {
2415                 ret = 0;
2416         }
2417 exit:
2418         /*
2419          * Do the routine cleanup:
2420          * - close opened Netlink sockets
2421          * - free allocated spawn data array
2422          * - free the Infiniband device list
2423          */
2424         if (nl_rdma >= 0)
2425                 close(nl_rdma);
2426         if (nl_route >= 0)
2427                 close(nl_route);
2428         if (list)
2429                 mlx5_free(list);
2430         MLX5_ASSERT(ibv_list);
2431         mlx5_glue->free_device_list(ibv_list);
2432         return ret;
2433 }
2434
2435 static int
2436 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2437                           struct rte_eth_devargs *eth_da)
2438 {
2439         int ret = 0;
2440
2441         if (dev->devargs == NULL)
2442                 return 0;
2443         memset(eth_da, 0, sizeof(*eth_da));
2444         /* Parse representor information first from class argument. */
2445         if (dev->devargs->cls_str)
2446                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2447         if (ret != 0) {
2448                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2449                         dev->devargs->cls_str);
2450                 return -rte_errno;
2451         }
2452         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2453                 /* Parse legacy device argument */
2454                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2455                 if (ret) {
2456                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2457                                 dev->devargs->args);
2458                         return -rte_errno;
2459                 }
2460         }
2461         return 0;
2462 }
2463
2464 /**
2465  * Callback to register a PCI device.
2466  *
2467  * This function spawns Ethernet devices out of a given PCI device.
2468  *
2469  * @param[in] cdev
2470  *   Pointer to common mlx5 device structure.
2471  *
2472  * @return
2473  *   0 on success, a negative errno value otherwise and rte_errno is set.
2474  */
2475 static int
2476 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2477 {
2478         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2479         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2480         int ret = 0;
2481         uint16_t p;
2482
2483         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2484         if (ret != 0)
2485                 return ret;
2486
2487         if (eth_da.nb_ports > 0) {
2488                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2489                 for (p = 0; p < eth_da.nb_ports; p++) {
2490                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2491                                                    eth_da.ports[p]);
2492                         if (ret)
2493                                 break;
2494                 }
2495                 if (ret) {
2496                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2497                                 "aborted due to prodding failure of PF %u",
2498                                 pci_dev->addr.domain, pci_dev->addr.bus,
2499                                 pci_dev->addr.devid, pci_dev->addr.function,
2500                                 eth_da.ports[p]);
2501                         mlx5_net_remove(cdev);
2502                 }
2503         } else {
2504                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2505         }
2506         return ret;
2507 }
2508
2509 /* Probe a single SF device on auxiliary bus, no representor support. */
2510 static int
2511 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2512 {
2513         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2514         struct mlx5_dev_config config;
2515         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2516         struct rte_device *dev = cdev->dev;
2517         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2518         struct rte_eth_dev *eth_dev;
2519         int ret = 0;
2520
2521         /* Parse ethdev devargs. */
2522         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2523         if (ret != 0)
2524                 return ret;
2525         /* Set default config data. */
2526         mlx5_os_config_default(&config);
2527         /* Init spawn data. */
2528         spawn.max_port = 1;
2529         spawn.phys_port = 1;
2530         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2531         ret = mlx5_auxiliary_get_ifindex(dev->name);
2532         if (ret < 0) {
2533                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2534                 return ret;
2535         }
2536         spawn.ifindex = ret;
2537         spawn.cdev = cdev;
2538         /* Spawn device. */
2539         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2540         if (eth_dev == NULL)
2541                 return -rte_errno;
2542         /* Post create. */
2543         eth_dev->intr_handle = adev->intr_handle;
2544         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2545                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2546                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2547                 eth_dev->data->numa_node = dev->numa_node;
2548         }
2549         rte_eth_dev_probing_finish(eth_dev);
2550         return 0;
2551 }
2552
2553 /**
2554  * Net class driver callback to probe a device.
2555  *
2556  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2557  *
2558  * @param[in] cdev
2559  *   Pointer to the common mlx5 device.
2560  *
2561  * @return
2562  *   0 on success, a negative errno value otherwise and rte_errno is set.
2563  */
2564 int
2565 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2566 {
2567         int ret;
2568
2569         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2570                 mlx5_pmd_socket_init();
2571         ret = mlx5_init_once();
2572         if (ret) {
2573                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2574                         strerror(rte_errno));
2575                 return -rte_errno;
2576         }
2577         if (mlx5_dev_is_pci(cdev->dev))
2578                 return mlx5_os_pci_probe(cdev);
2579         else
2580                 return mlx5_os_auxiliary_probe(cdev);
2581 }
2582
2583 /**
2584  * Cleanup resources when the last device is closed.
2585  */
2586 void
2587 mlx5_os_net_cleanup(void)
2588 {
2589         mlx5_pmd_socket_uninit();
2590 }
2591
2592 /**
2593  * Install shared asynchronous device events handler.
2594  * This function is implemented to support event sharing
2595  * between multiple ports of single IB device.
2596  *
2597  * @param sh
2598  *   Pointer to mlx5_dev_ctx_shared object.
2599  */
2600 void
2601 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2602 {
2603         int ret;
2604         int flags;
2605         struct ibv_context *ctx = sh->cdev->ctx;
2606
2607         sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2608         if (sh->intr_handle == NULL) {
2609                 DRV_LOG(ERR, "Fail to allocate intr_handle");
2610                 rte_errno = ENOMEM;
2611                 return;
2612         }
2613         rte_intr_fd_set(sh->intr_handle, -1);
2614
2615         flags = fcntl(ctx->async_fd, F_GETFL);
2616         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2617         if (ret) {
2618                 DRV_LOG(INFO, "failed to change file descriptor async event"
2619                         " queue");
2620         } else {
2621                 rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
2622                 rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
2623                 if (rte_intr_callback_register(sh->intr_handle,
2624                                         mlx5_dev_interrupt_handler, sh)) {
2625                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2626                         rte_intr_fd_set(sh->intr_handle, -1);
2627                 }
2628         }
2629         if (sh->cdev->config.devx) {
2630 #ifdef HAVE_IBV_DEVX_ASYNC
2631                 sh->intr_handle_devx =
2632                         rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2633                 if (!sh->intr_handle_devx) {
2634                         DRV_LOG(ERR, "Fail to allocate intr_handle");
2635                         rte_errno = ENOMEM;
2636                         return;
2637                 }
2638                 rte_intr_fd_set(sh->intr_handle_devx, -1);
2639                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2640                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2641                 if (!devx_comp) {
2642                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2643                         return;
2644                 }
2645                 flags = fcntl(devx_comp->fd, F_GETFL);
2646                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2647                 if (ret) {
2648                         DRV_LOG(INFO, "failed to change file descriptor"
2649                                 " devx comp");
2650                         return;
2651                 }
2652                 rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
2653                 rte_intr_type_set(sh->intr_handle_devx,
2654                                          RTE_INTR_HANDLE_EXT);
2655                 if (rte_intr_callback_register(sh->intr_handle_devx,
2656                                         mlx5_dev_interrupt_handler_devx, sh)) {
2657                         DRV_LOG(INFO, "Fail to install the devx shared"
2658                                 " interrupt.");
2659                         rte_intr_fd_set(sh->intr_handle_devx, -1);
2660                 }
2661 #endif /* HAVE_IBV_DEVX_ASYNC */
2662         }
2663 }
2664
2665 /**
2666  * Uninstall shared asynchronous device events handler.
2667  * This function is implemented to support event sharing
2668  * between multiple ports of single IB device.
2669  *
2670  * @param dev
2671  *   Pointer to mlx5_dev_ctx_shared object.
2672  */
2673 void
2674 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2675 {
2676         if (rte_intr_fd_get(sh->intr_handle) >= 0)
2677                 mlx5_intr_callback_unregister(sh->intr_handle,
2678                                               mlx5_dev_interrupt_handler, sh);
2679         rte_intr_instance_free(sh->intr_handle);
2680 #ifdef HAVE_IBV_DEVX_ASYNC
2681         if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
2682                 rte_intr_callback_unregister(sh->intr_handle_devx,
2683                                   mlx5_dev_interrupt_handler_devx, sh);
2684         rte_intr_instance_free(sh->intr_handle_devx);
2685         if (sh->devx_comp)
2686                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2687 #endif
2688 }
2689
2690 /**
2691  * Read statistics by a named counter.
2692  *
2693  * @param[in] priv
2694  *   Pointer to the private device data structure.
2695  * @param[in] ctr_name
2696  *   Pointer to the name of the statistic counter to read
2697  * @param[out] stat
2698  *   Pointer to read statistic value.
2699  * @return
2700  *   0 on success and stat is valud, 1 if failed to read the value
2701  *   rte_errno is set.
2702  *
2703  */
2704 int
2705 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2706                       uint64_t *stat)
2707 {
2708         int fd;
2709
2710         if (priv->sh) {
2711                 if (priv->q_counters != NULL &&
2712                     strcmp(ctr_name, "out_of_buffer") == 0)
2713                         return mlx5_devx_cmd_queue_counter_query
2714                                         (priv->q_counters, 0, (uint32_t *)stat);
2715                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2716                       priv->sh->ibdev_path,
2717                       priv->dev_port,
2718                       ctr_name);
2719                 fd = open(path, O_RDONLY);
2720                 /*
2721                  * in switchdev the file location is not per port
2722                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2723                  */
2724                 if (fd == -1) {
2725                         MKSTR(path1, "%s/hw_counters/%s",
2726                               priv->sh->ibdev_path,
2727                               ctr_name);
2728                         fd = open(path1, O_RDONLY);
2729                 }
2730                 if (fd != -1) {
2731                         char buf[21] = {'\0'};
2732                         ssize_t n = read(fd, buf, sizeof(buf));
2733
2734                         close(fd);
2735                         if (n != -1) {
2736                                 *stat = strtoull(buf, NULL, 10);
2737                                 return 0;
2738                         }
2739                 }
2740         }
2741         *stat = 0;
2742         return 1;
2743 }
2744
2745 /**
2746  * Remove a MAC address from device
2747  *
2748  * @param dev
2749  *   Pointer to Ethernet device structure.
2750  * @param index
2751  *   MAC address index.
2752  */
2753 void
2754 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2755 {
2756         struct mlx5_priv *priv = dev->data->dev_private;
2757         const int vf = priv->sh->dev_cap.vf;
2758
2759         if (vf)
2760                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2761                                         mlx5_ifindex(dev), priv->mac_own,
2762                                         &dev->data->mac_addrs[index], index);
2763 }
2764
2765 /**
2766  * Adds a MAC address to the device
2767  *
2768  * @param dev
2769  *   Pointer to Ethernet device structure.
2770  * @param mac_addr
2771  *   MAC address to register.
2772  * @param index
2773  *   MAC address index.
2774  *
2775  * @return
2776  *   0 on success, a negative errno value otherwise
2777  */
2778 int
2779 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2780                      uint32_t index)
2781 {
2782         struct mlx5_priv *priv = dev->data->dev_private;
2783         const int vf = priv->sh->dev_cap.vf;
2784         int ret = 0;
2785
2786         if (vf)
2787                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2788                                            mlx5_ifindex(dev), priv->mac_own,
2789                                            mac, index);
2790         return ret;
2791 }
2792
2793 /**
2794  * Modify a VF MAC address
2795  *
2796  * @param priv
2797  *   Pointer to device private data.
2798  * @param mac_addr
2799  *   MAC address to modify into.
2800  * @param iface_idx
2801  *   Net device interface index
2802  * @param vf_index
2803  *   VF index
2804  *
2805  * @return
2806  *   0 on success, a negative errno value otherwise
2807  */
2808 int
2809 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2810                            unsigned int iface_idx,
2811                            struct rte_ether_addr *mac_addr,
2812                            int vf_index)
2813 {
2814         return mlx5_nl_vf_mac_addr_modify
2815                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2816 }
2817
2818 /**
2819  * Set device promiscuous mode
2820  *
2821  * @param dev
2822  *   Pointer to Ethernet device structure.
2823  * @param enable
2824  *   0 - promiscuous is disabled, otherwise - enabled
2825  *
2826  * @return
2827  *   0 on success, a negative error value otherwise
2828  */
2829 int
2830 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2831 {
2832         struct mlx5_priv *priv = dev->data->dev_private;
2833
2834         return mlx5_nl_promisc(priv->nl_socket_route,
2835                                mlx5_ifindex(dev), !!enable);
2836 }
2837
2838 /**
2839  * Set device promiscuous mode
2840  *
2841  * @param dev
2842  *   Pointer to Ethernet device structure.
2843  * @param enable
2844  *   0 - all multicase is disabled, otherwise - enabled
2845  *
2846  * @return
2847  *   0 on success, a negative error value otherwise
2848  */
2849 int
2850 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2851 {
2852         struct mlx5_priv *priv = dev->data->dev_private;
2853
2854         return mlx5_nl_allmulti(priv->nl_socket_route,
2855                                 mlx5_ifindex(dev), !!enable);
2856 }
2857
2858 /**
2859  * Flush device MAC addresses
2860  *
2861  * @param dev
2862  *   Pointer to Ethernet device structure.
2863  *
2864  */
2865 void
2866 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2867 {
2868         struct mlx5_priv *priv = dev->data->dev_private;
2869
2870         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2871                                dev->data->mac_addrs,
2872                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2873 }