drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 120         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 121         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 122         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 123         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 124         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 125         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 126         device_attr->max_rwq_indirection_table_size =
 127                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 128         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 129         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 130
 131         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 132         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 133         if (err)
 134                 return err;
 135
 136         device_attr->flags = dv_attr.flags;
 137         device_attr->comp_mask = dv_attr.comp_mask;
 138 #ifdef HAVE_IBV_MLX5_MOD_SWP
 139         device_attr->sw_parsing_offloads =
 140                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 141 #endif
 142         device_attr->min_single_stride_log_num_of_bytes =
 143                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 144         device_attr->max_single_stride_log_num_of_bytes =
 145                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 146         device_attr->min_single_wqe_log_num_of_strides =
 147                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 148         device_attr->max_single_wqe_log_num_of_strides =
 149                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 150         device_attr->stride_supported_qpts =
 151                 dv_attr.striding_rq_caps.supported_qpts;
 152 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 153         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 154 #endif
 155
 156         return err;
 157 }
 158
 159 /**
 160  * Verbs callback to allocate a memory. This function should allocate the space
 161  * according to the size provided residing inside a huge page.
 162  * Please note that all allocation must respect the alignment from libmlx5
 163  * (i.e. currently rte_mem_page_size()).
 164  *
 165  * @param[in] size
 166  *   The size in bytes of the memory to allocate.
 167  * @param[in] data
 168  *   A pointer to the callback data.
 169  *
 170  * @return
 171  *   Allocated buffer, NULL otherwise and rte_errno is set.
 172  */
 173 static void *
 174 mlx5_alloc_verbs_buf(size_t size, void *data)
 175 {
 176         struct mlx5_dev_ctx_shared *sh = data;
 177         void *ret;
 178         size_t alignment = rte_mem_page_size();
 179         if (alignment == (size_t)-1) {
 180                 DRV_LOG(ERR, "Failed to get mem page size");
 181                 rte_errno = ENOMEM;
 182                 return NULL;
 183         }
 184
 185         MLX5_ASSERT(data != NULL);
 186         ret = mlx5_malloc(0, size, alignment, sh->numa_node);
 187         if (!ret && size)
 188                 rte_errno = ENOMEM;
 189         return ret;
 190 }
 191
 192 /**
 193  * Verbs callback to free a memory.
 194  *
 195  * @param[in] ptr
 196  *   A pointer to the memory to free.
 197  * @param[in] data
 198  *   A pointer to the callback data.
 199  */
 200 static void
 201 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 202 {
 203         MLX5_ASSERT(data != NULL);
 204         mlx5_free(ptr);
 205 }
 206
 207 /**
 208  * Initialize DR related data within private structure.
 209  * Routine checks the reference counter and does actual
 210  * resources creation/initialization only if counter is zero.
 211  *
 212  * @param[in] priv
 213  *   Pointer to the private device data structure.
 214  *
 215  * @return
 216  *   Zero on success, positive error code otherwise.
 217  */
 218 static int
 219 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 220 {
 221         struct mlx5_dev_ctx_shared *sh = priv->sh;
 222         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 223         int err;
 224
 225         MLX5_ASSERT(sh && sh->refcnt);
 226         if (sh->refcnt > 1)
 227                 return 0;
 228         err = mlx5_alloc_table_hash_list(priv);
 229         if (err)
 230                 goto error;
 231         /* The resources below are only valid with DV support. */
 232 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 233         /* Init port id action cache list. */
 234         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 235         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 236                              flow_dv_port_id_create_cb,
 237                              flow_dv_port_id_match_cb,
 238                              flow_dv_port_id_remove_cb);
 239         /* Init push vlan action cache list. */
 240         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 241         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 242                              flow_dv_push_vlan_create_cb,
 243                              flow_dv_push_vlan_match_cb,
 244                              flow_dv_push_vlan_remove_cb);
 245         /* Init sample action cache list. */
 246         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 247         mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,
 248                              flow_dv_sample_create_cb,
 249                              flow_dv_sample_match_cb,
 250                              flow_dv_sample_remove_cb);
 251         /* Init dest array action cache list. */
 252         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 253         mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,
 254                              flow_dv_dest_array_create_cb,
 255                              flow_dv_dest_array_match_cb,
 256                              flow_dv_dest_array_remove_cb);
 257         /* Create tags hash list table. */
 258         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 259         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 260                                           MLX5_HLIST_WRITE_MOST,
 261                                           flow_dv_tag_create_cb,
 262                                           flow_dv_tag_match_cb,
 263                                           flow_dv_tag_remove_cb);
 264         if (!sh->tag_table) {
 265                 DRV_LOG(ERR, "tags with hash creation failed.");
 266                 err = ENOMEM;
 267                 goto error;
 268         }
 269         sh->tag_table->ctx = sh;
 270         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 271         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 272                                             0, MLX5_HLIST_WRITE_MOST |
 273                                             MLX5_HLIST_DIRECT_KEY,
 274                                             flow_dv_modify_create_cb,
 275                                             flow_dv_modify_match_cb,
 276                                             flow_dv_modify_remove_cb);
 277         if (!sh->modify_cmds) {
 278                 DRV_LOG(ERR, "hdr modify hash creation failed");
 279                 err = ENOMEM;
 280                 goto error;
 281         }
 282         sh->modify_cmds->ctx = sh;
 283         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 284         sh->encaps_decaps = mlx5_hlist_create(s,
 285                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 286                                               0, MLX5_HLIST_DIRECT_KEY |
 287                                               MLX5_HLIST_WRITE_MOST,
 288                                               flow_dv_encap_decap_create_cb,
 289                                               flow_dv_encap_decap_match_cb,
 290                                               flow_dv_encap_decap_remove_cb);
 291         if (!sh->encaps_decaps) {
 292                 DRV_LOG(ERR, "encap decap hash creation failed");
 293                 err = ENOMEM;
 294                 goto error;
 295         }
 296         sh->encaps_decaps->ctx = sh;
 297 #endif
 298 #ifdef HAVE_MLX5DV_DR
 299         void *domain;
 300
 301         /* Reference counter is zero, we should initialize structures. */
 302         domain = mlx5_glue->dr_create_domain(sh->ctx,
 303                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 304         if (!domain) {
 305                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 306                 err = errno;
 307                 goto error;
 308         }
 309         sh->rx_domain = domain;
 310         domain = mlx5_glue->dr_create_domain(sh->ctx,
 311                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 312         if (!domain) {
 313                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 314                 err = errno;
 315                 goto error;
 316         }
 317         sh->tx_domain = domain;
 318 #ifdef HAVE_MLX5DV_DR_ESWITCH
 319         if (priv->config.dv_esw_en) {
 320                 domain  = mlx5_glue->dr_create_domain
 321                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 322                 if (!domain) {
 323                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 324                         err = errno;
 325                         goto error;
 326                 }
 327                 sh->fdb_domain = domain;
 328                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 329         }
 330 #endif
 331         if (!sh->tunnel_hub)
 332                 err = mlx5_alloc_tunnel_hub(sh);
 333         if (err) {
 334                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 335                 goto error;
 336         }
 337         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 338                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 339                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 340                 if (sh->fdb_domain)
 341                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 342         }
 343         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 344 #endif /* HAVE_MLX5DV_DR */
 345         sh->default_miss_action =
 346                         mlx5_glue->dr_create_flow_action_default_miss();
 347         if (!sh->default_miss_action)
 348                 DRV_LOG(WARNING, "Default miss action is not supported.");
 349         return 0;
 350 error:
 351         /* Rollback the created objects. */
 352         if (sh->rx_domain) {
 353                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 354                 sh->rx_domain = NULL;
 355         }
 356         if (sh->tx_domain) {
 357                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 358                 sh->tx_domain = NULL;
 359         }
 360         if (sh->fdb_domain) {
 361                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 362                 sh->fdb_domain = NULL;
 363         }
 364         if (sh->esw_drop_action) {
 365                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 366                 sh->esw_drop_action = NULL;
 367         }
 368         if (sh->pop_vlan_action) {
 369                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 370                 sh->pop_vlan_action = NULL;
 371         }
 372         if (sh->encaps_decaps) {
 373                 mlx5_hlist_destroy(sh->encaps_decaps);
 374                 sh->encaps_decaps = NULL;
 375         }
 376         if (sh->modify_cmds) {
 377                 mlx5_hlist_destroy(sh->modify_cmds);
 378                 sh->modify_cmds = NULL;
 379         }
 380         if (sh->tag_table) {
 381                 /* tags should be destroyed with flow before. */
 382                 mlx5_hlist_destroy(sh->tag_table);
 383                 sh->tag_table = NULL;
 384         }
 385         if (sh->tunnel_hub) {
 386                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 387                 sh->tunnel_hub = NULL;
 388         }
 389         mlx5_free_table_hash_list(priv);
 390         return err;
 391 }
 392
 393 /**
 394  * Destroy DR related data within private structure.
 395  *
 396  * @param[in] priv
 397  *   Pointer to the private device data structure.
 398  */
 399 void
 400 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 401 {
 402         struct mlx5_dev_ctx_shared *sh = priv->sh;
 403
 404         MLX5_ASSERT(sh && sh->refcnt);
 405         if (sh->refcnt > 1)
 406                 return;
 407 #ifdef HAVE_MLX5DV_DR
 408         if (sh->rx_domain) {
 409                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 410                 sh->rx_domain = NULL;
 411         }
 412         if (sh->tx_domain) {
 413                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 414                 sh->tx_domain = NULL;
 415         }
 416 #ifdef HAVE_MLX5DV_DR_ESWITCH
 417         if (sh->fdb_domain) {
 418                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 419                 sh->fdb_domain = NULL;
 420         }
 421         if (sh->esw_drop_action) {
 422                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 423                 sh->esw_drop_action = NULL;
 424         }
 425 #endif
 426         if (sh->pop_vlan_action) {
 427                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 428                 sh->pop_vlan_action = NULL;
 429         }
 430 #endif /* HAVE_MLX5DV_DR */
 431         if (sh->default_miss_action)
 432                 mlx5_glue->destroy_flow_action
 433                                 (sh->default_miss_action);
 434         if (sh->encaps_decaps) {
 435                 mlx5_hlist_destroy(sh->encaps_decaps);
 436                 sh->encaps_decaps = NULL;
 437         }
 438         if (sh->modify_cmds) {
 439                 mlx5_hlist_destroy(sh->modify_cmds);
 440                 sh->modify_cmds = NULL;
 441         }
 442         if (sh->tag_table) {
 443                 /* tags should be destroyed with flow before. */
 444                 mlx5_hlist_destroy(sh->tag_table);
 445                 sh->tag_table = NULL;
 446         }
 447         if (sh->tunnel_hub) {
 448                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 449                 sh->tunnel_hub = NULL;
 450         }
 451         mlx5_cache_list_destroy(&sh->port_id_action_list);
 452         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 453         mlx5_free_table_hash_list(priv);
 454 }
 455
 456 /**
 457  * Initialize shared data between primary and secondary process.
 458  *
 459  * A memzone is reserved by primary process and secondary processes attach to
 460  * the memzone.
 461  *
 462  * @return
 463  *   0 on success, a negative errno value otherwise and rte_errno is set.
 464  */
 465 static int
 466 mlx5_init_shared_data(void)
 467 {
 468         const struct rte_memzone *mz;
 469         int ret = 0;
 470
 471         rte_spinlock_lock(&mlx5_shared_data_lock);
 472         if (mlx5_shared_data == NULL) {
 473                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 474                         /* Allocate shared memory. */
 475                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 476                                                  sizeof(*mlx5_shared_data),
 477                                                  SOCKET_ID_ANY, 0);
 478                         if (mz == NULL) {
 479                                 DRV_LOG(ERR,
 480                                         "Cannot allocate mlx5 shared data");
 481                                 ret = -rte_errno;
 482                                 goto error;
 483                         }
 484                         mlx5_shared_data = mz->addr;
 485                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 486                         rte_spinlock_init(&mlx5_shared_data->lock);
 487                 } else {
 488                         /* Lookup allocated shared memory. */
 489                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 490                         if (mz == NULL) {
 491                                 DRV_LOG(ERR,
 492                                         "Cannot attach mlx5 shared data");
 493                                 ret = -rte_errno;
 494                                 goto error;
 495                         }
 496                         mlx5_shared_data = mz->addr;
 497                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 498                 }
 499         }
 500 error:
 501         rte_spinlock_unlock(&mlx5_shared_data_lock);
 502         return ret;
 503 }
 504
 505 /**
 506  * PMD global initialization.
 507  *
 508  * Independent from individual device, this function initializes global
 509  * per-PMD data structures distinguishing primary and secondary processes.
 510  * Hence, each initialization is called once per a process.
 511  *
 512  * @return
 513  *   0 on success, a negative errno value otherwise and rte_errno is set.
 514  */
 515 static int
 516 mlx5_init_once(void)
 517 {
 518         struct mlx5_shared_data *sd;
 519         struct mlx5_local_data *ld = &mlx5_local_data;
 520         int ret = 0;
 521
 522         if (mlx5_init_shared_data())
 523                 return -rte_errno;
 524         sd = mlx5_shared_data;
 525         MLX5_ASSERT(sd);
 526         rte_spinlock_lock(&sd->lock);
 527         switch (rte_eal_process_type()) {
 528         case RTE_PROC_PRIMARY:
 529                 if (sd->init_done)
 530                         break;
 531                 LIST_INIT(&sd->mem_event_cb_list);
 532                 rte_rwlock_init(&sd->mem_event_rwlock);
 533                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 534                                                 mlx5_mr_mem_event_cb, NULL);
 535                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 536                                            mlx5_mp_os_primary_handle);
 537                 if (ret)
 538                         goto out;
 539                 sd->init_done = true;
 540                 break;
 541         case RTE_PROC_SECONDARY:
 542                 if (ld->init_done)
 543                         break;
 544                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 545                                              mlx5_mp_os_secondary_handle);
 546                 if (ret)
 547                         goto out;
 548                 ++sd->secondary_cnt;
 549                 ld->init_done = true;
 550                 break;
 551         default:
 552                 break;
 553         }
 554 out:
 555         rte_spinlock_unlock(&sd->lock);
 556         return ret;
 557 }
 558
 559 /**
 560  * Create the Tx queue DevX/Verbs object.
 561  *
 562  * @param dev
 563  *   Pointer to Ethernet device.
 564  * @param idx
 565  *   Queue index in DPDK Tx queue array.
 566  *
 567  * @return
 568  *   0 on success, a negative errno value otherwise and rte_errno is set.
 569  */
 570 static int
 571 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 572 {
 573         struct mlx5_priv *priv = dev->data->dev_private;
 574         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 575         struct mlx5_txq_ctrl *txq_ctrl =
 576                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 577
 578         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 579                 return mlx5_txq_devx_obj_new(dev, idx);
 580 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 581         if (!priv->config.dv_esw_en)
 582                 return mlx5_txq_devx_obj_new(dev, idx);
 583 #endif
 584         return mlx5_txq_ibv_obj_new(dev, idx);
 585 }
 586
 587 /**
 588  * Release an Tx DevX/verbs queue object.
 589  *
 590  * @param txq_obj
 591  *   DevX/Verbs Tx queue object.
 592  */
 593 static void
 594 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 595 {
 596         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 597                 mlx5_txq_devx_obj_release(txq_obj);
 598                 return;
 599         }
 600 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 601         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 602                 mlx5_txq_devx_obj_release(txq_obj);
 603                 return;
 604         }
 605 #endif
 606         mlx5_txq_ibv_obj_release(txq_obj);
 607 }
 608
 609 /**
 610  * DV flow counter mode detect and config.
 611  *
 612  * @param dev
 613  *   Pointer to rte_eth_dev structure.
 614  *
 615  */
 616 static void
 617 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 618 {
 619 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 620         struct mlx5_priv *priv = dev->data->dev_private;
 621         struct mlx5_dev_ctx_shared *sh = priv->sh;
 622         bool fallback;
 623
 624 #ifndef HAVE_IBV_DEVX_ASYNC
 625         fallback = true;
 626 #else
 627         fallback = false;
 628         if (!priv->config.devx || !priv->config.dv_flow_en ||
 629             !priv->config.hca_attr.flow_counters_dump ||
 630             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 631             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 632                 fallback = true;
 633 #endif
 634         if (fallback)
 635                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 636                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 637                         priv->config.hca_attr.flow_counters_dump,
 638                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 639         /* Initialize fallback mode only on the port initializes sh. */
 640         if (sh->refcnt == 1)
 641                 sh->cmng.counter_fallback = fallback;
 642         else if (fallback != sh->cmng.counter_fallback)
 643                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 644                         "with others:%d.", PORT_ID(priv), fallback);
 645 #endif
 646 }
 647
 648 static void
 649 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 650 {
 651         struct mlx5_priv *priv = dev->data->dev_private;
 652         void *ctx = priv->sh->ctx;
 653
 654         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 655         if (!priv->q_counters) {
 656                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 657                 struct ibv_wq *wq;
 658
 659                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 660                         "by DevX - fall-back to use the kernel driver global "
 661                         "queue counter.", dev->data->port_id);
 662                 /* Create WQ by kernel and query its queue counter ID. */
 663                 if (cq) {
 664                         wq = mlx5_glue->create_wq(ctx,
 665                                                   &(struct ibv_wq_init_attr){
 666                                                     .wq_type = IBV_WQT_RQ,
 667                                                     .max_wr = 1,
 668                                                     .max_sge = 1,
 669                                                     .pd = priv->sh->pd,
 670                                                     .cq = cq,
 671                                                 });
 672                         if (wq) {
 673                                 /* Counter is assigned only on RDY state. */
 674                                 int ret = mlx5_glue->modify_wq(wq,
 675                                                  &(struct ibv_wq_attr){
 676                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 677                                                  .wq_state = IBV_WQS_RDY,
 678                                                 });
 679
 680                                 if (ret == 0)
 681                                         mlx5_devx_cmd_wq_query(wq,
 682                                                          &priv->counter_set_id);
 683                                 claim_zero(mlx5_glue->destroy_wq(wq));
 684                         }
 685                         claim_zero(mlx5_glue->destroy_cq(cq));
 686                 }
 687         } else {
 688                 priv->counter_set_id = priv->q_counters->id;
 689         }
 690         if (priv->counter_set_id == 0)
 691                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 692                         "available.", dev->data->port_id);
 693 }
 694
 695 /**
 696  * Spawn an Ethernet device from Verbs information.
 697  *
 698  * @param dpdk_dev
 699  *   Backing DPDK device.
 700  * @param spawn
 701  *   Verbs device parameters (name, port, switch_info) to spawn.
 702  * @param config
 703  *   Device configuration parameters.
 704  *
 705  * @return
 706  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 707  *   is set. The following errors are defined:
 708  *
 709  *   EBUSY: device is not supposed to be spawned.
 710  *   EEXIST: device is already spawned
 711  */
 712 static struct rte_eth_dev *
 713 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 714                struct mlx5_dev_spawn_data *spawn,
 715                struct mlx5_dev_config *config)
 716 {
 717         const struct mlx5_switch_info *switch_info = &spawn->info;
 718         struct mlx5_dev_ctx_shared *sh = NULL;
 719         struct ibv_port_attr port_attr;
 720         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 721         struct rte_eth_dev *eth_dev = NULL;
 722         struct mlx5_priv *priv = NULL;
 723         int err = 0;
 724         unsigned int hw_padding = 0;
 725         unsigned int mps;
 726         unsigned int tunnel_en = 0;
 727         unsigned int mpls_en = 0;
 728         unsigned int swp = 0;
 729         unsigned int mprq = 0;
 730         unsigned int mprq_min_stride_size_n = 0;
 731         unsigned int mprq_max_stride_size_n = 0;
 732         unsigned int mprq_min_stride_num_n = 0;
 733         unsigned int mprq_max_stride_num_n = 0;
 734         struct rte_ether_addr mac;
 735         char name[RTE_ETH_NAME_MAX_LEN];
 736         int own_domain_id = 0;
 737         uint16_t port_id;
 738         unsigned int i;
 739 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 740         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 741 #endif
 742
 743         /* Determine if this port representor is supposed to be spawned. */
 744         if (switch_info->representor && dpdk_dev->devargs) {
 745                 struct rte_eth_devargs eth_da;
 746
 747                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 748                 if (err) {
 749                         rte_errno = -err;
 750                         DRV_LOG(ERR, "failed to process device arguments: %s",
 751                                 strerror(rte_errno));
 752                         return NULL;
 753                 }
 754                 if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) {
 755                         /* Representor not specified. */
 756                         rte_errno = EBUSY;
 757                         return NULL;
 758                 }
 759                 if (eth_da.type != RTE_ETH_REPRESENTOR_VF) {
 760                         rte_errno = ENOTSUP;
 761                         DRV_LOG(ERR, "unsupported representor type: %s",
 762                                 dpdk_dev->devargs->args);
 763                         return NULL;
 764                 }
 765                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 766                         if (eth_da.representor_ports[i] ==
 767                             (uint16_t)switch_info->port_name)
 768                                 break;
 769                 if (i == eth_da.nb_representor_ports) {
 770                         rte_errno = EBUSY;
 771                         return NULL;
 772                 }
 773         }
 774         /* Build device name. */
 775         if (spawn->pf_bond <  0) {
 776                 /* Single device. */
 777                 if (!switch_info->representor)
 778                         strlcpy(name, dpdk_dev->name, sizeof(name));
 779                 else
 780                         snprintf(name, sizeof(name), "%s_representor_%u",
 781                                  dpdk_dev->name, switch_info->port_name);
 782         } else {
 783                 /* Bonding device. */
 784                 if (!switch_info->representor)
 785                         snprintf(name, sizeof(name), "%s_%s",
 786                                  dpdk_dev->name,
 787                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 788                 else
 789                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 790                                  dpdk_dev->name,
 791                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 792                                  switch_info->port_name);
 793         }
 794         /* check if the device is already spawned */
 795         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 796                 rte_errno = EEXIST;
 797                 return NULL;
 798         }
 799         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 800         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 801                 struct mlx5_mp_id mp_id;
 802
 803                 eth_dev = rte_eth_dev_attach_secondary(name);
 804                 if (eth_dev == NULL) {
 805                         DRV_LOG(ERR, "can not attach rte ethdev");
 806                         rte_errno = ENOMEM;
 807                         return NULL;
 808                 }
 809                 priv = eth_dev->data->dev_private;
 810                 if (priv->sh->bond_dev != UINT16_MAX)
 811                         /* For bonding port, use primary PCI device. */
 812                         eth_dev->device =
 813                                 rte_eth_devices[priv->sh->bond_dev].device;
 814                 else
 815                         eth_dev->device = dpdk_dev;
 816                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 817                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 818                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 819                 err = mlx5_proc_priv_init(eth_dev);
 820                 if (err)
 821                         return NULL;
 822                 mp_id.port_id = eth_dev->data->port_id;
 823                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 824                 /* Receive command fd from primary process */
 825                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 826                 if (err < 0)
 827                         goto err_secondary;
 828                 /* Remap UAR for Tx queues. */
 829                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 830                 if (err)
 831                         goto err_secondary;
 832                 /*
 833                  * Ethdev pointer is still required as input since
 834                  * the primary device is not accessible from the
 835                  * secondary process.
 836                  */
 837                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 838                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 839                 return eth_dev;
 840 err_secondary:
 841                 mlx5_dev_close(eth_dev);
 842                 return NULL;
 843         }
 844         /*
 845          * Some parameters ("tx_db_nc" in particularly) are needed in
 846          * advance to create dv/verbs device context. We proceed the
 847          * devargs here to get ones, and later proceed devargs again
 848          * to override some hardware settings.
 849          */
 850         err = mlx5_args(config, dpdk_dev->devargs);
 851         if (err) {
 852                 err = rte_errno;
 853                 DRV_LOG(ERR, "failed to process device arguments: %s",
 854                         strerror(rte_errno));
 855                 goto error;
 856         }
 857         if (config->dv_miss_info) {
 858                 if (switch_info->master || switch_info->representor)
 859                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 860         }
 861         mlx5_malloc_mem_select(config->sys_mem_en);
 862         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 863         if (!sh)
 864                 return NULL;
 865         config->devx = sh->devx;
 866 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 867         config->dest_tir = 1;
 868 #endif
 869 #ifdef HAVE_IBV_MLX5_MOD_SWP
 870         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 871 #endif
 872         /*
 873          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 874          * as all ConnectX-5 devices.
 875          */
 876 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 877         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 878 #endif
 879 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 880         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 881 #endif
 882         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 883         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 884                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 885                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 886                         mps = MLX5_MPW_ENHANCED;
 887                 } else {
 888                         DRV_LOG(DEBUG, "MPW is supported");
 889                         mps = MLX5_MPW;
 890                 }
 891         } else {
 892                 DRV_LOG(DEBUG, "MPW isn't supported");
 893                 mps = MLX5_MPW_DISABLED;
 894         }
 895 #ifdef HAVE_IBV_MLX5_MOD_SWP
 896         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 897                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 898         DRV_LOG(DEBUG, "SWP support: %u", swp);
 899 #endif
 900         config->swp = !!swp;
 901 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 902         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 903                 struct mlx5dv_striding_rq_caps mprq_caps =
 904                         dv_attr.striding_rq_caps;
 905
 906                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 907                         mprq_caps.min_single_stride_log_num_of_bytes);
 908                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 909                         mprq_caps.max_single_stride_log_num_of_bytes);
 910                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 911                         mprq_caps.min_single_wqe_log_num_of_strides);
 912                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 913                         mprq_caps.max_single_wqe_log_num_of_strides);
 914                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 915                         mprq_caps.supported_qpts);
 916                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 917                 mprq = 1;
 918                 mprq_min_stride_size_n =
 919                         mprq_caps.min_single_stride_log_num_of_bytes;
 920                 mprq_max_stride_size_n =
 921                         mprq_caps.max_single_stride_log_num_of_bytes;
 922                 mprq_min_stride_num_n =
 923                         mprq_caps.min_single_wqe_log_num_of_strides;
 924                 mprq_max_stride_num_n =
 925                         mprq_caps.max_single_wqe_log_num_of_strides;
 926         }
 927 #endif
 928         /* Rx CQE compression is enabled by default. */
 929         config->cqe_comp = 1;
 930 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 931         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 932                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 933                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 934                              (dv_attr.tunnel_offloads_caps &
 935                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 936                              (dv_attr.tunnel_offloads_caps &
 937                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 938         }
 939         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 940                 tunnel_en ? "" : "not ");
 941 #else
 942         DRV_LOG(WARNING,
 943                 "tunnel offloading disabled due to old OFED/rdma-core version");
 944 #endif
 945         config->tunnel_en = tunnel_en;
 946 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 947         mpls_en = ((dv_attr.tunnel_offloads_caps &
 948                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 949                    (dv_attr.tunnel_offloads_caps &
 950                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 951         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 952                 mpls_en ? "" : "not ");
 953 #else
 954         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 955                 " old OFED/rdma-core version or firmware configuration");
 956 #endif
 957         config->mpls_en = mpls_en;
 958         /* Check port status. */
 959         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 960         if (err) {
 961                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 962                 goto error;
 963         }
 964         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 965                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 966                 err = EINVAL;
 967                 goto error;
 968         }
 969         if (port_attr.state != IBV_PORT_ACTIVE)
 970                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 971                         mlx5_glue->port_state_str(port_attr.state),
 972                         port_attr.state);
 973         /* Allocate private eth device data. */
 974         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 975                            sizeof(*priv),
 976                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 977         if (priv == NULL) {
 978                 DRV_LOG(ERR, "priv allocation failure");
 979                 err = ENOMEM;
 980                 goto error;
 981         }
 982         priv->sh = sh;
 983         priv->dev_port = spawn->phys_port;
 984         priv->pci_dev = spawn->pci_dev;
 985         priv->mtu = RTE_ETHER_MTU;
 986         /* Some internal functions rely on Netlink sockets, open them now. */
 987         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 988         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 989         priv->representor = !!switch_info->representor;
 990         priv->master = !!switch_info->master;
 991         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 992         priv->vport_meta_tag = 0;
 993         priv->vport_meta_mask = 0;
 994         priv->pf_bond = spawn->pf_bond;
 995 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 996         /*
 997          * The DevX port query API is implemented. E-Switch may use
 998          * either vport or reg_c[0] metadata register to match on
 999          * vport index. The engaged part of metadata register is
1000          * defined by mask.
1001          */
1002         if (switch_info->representor || switch_info->master) {
1003                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1004                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1005                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
1006                                                  &devx_port);
1007                 if (err) {
1008                         DRV_LOG(WARNING,
1009                                 "can't query devx port %d on device %s",
1010                                 spawn->phys_port,
1011                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
1012                         devx_port.comp_mask = 0;
1013                 }
1014         }
1015         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1016                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1017                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1018                 if (!priv->vport_meta_mask) {
1019                         DRV_LOG(ERR, "vport zero mask for port %d"
1020                                      " on bonding device %s",
1021                                      spawn->phys_port,
1022                                      mlx5_os_get_dev_device_name
1023                                                         (spawn->phys_dev));
1024                         err = ENOTSUP;
1025                         goto error;
1026                 }
1027                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1028                         DRV_LOG(ERR, "invalid vport tag for port %d"
1029                                      " on bonding device %s",
1030                                      spawn->phys_port,
1031                                      mlx5_os_get_dev_device_name
1032                                                         (spawn->phys_dev));
1033                         err = ENOTSUP;
1034                         goto error;
1035                 }
1036         }
1037         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1038                 priv->vport_id = devx_port.vport_num;
1039         } else if (spawn->pf_bond >= 0) {
1040                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1041                              " on bonding device %s",
1042                              spawn->phys_port,
1043                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1044                 err = ENOTSUP;
1045                 goto error;
1046         } else {
1047                 /* Suppose vport index in compatible way. */
1048                 priv->vport_id = switch_info->representor ?
1049                                  switch_info->port_name + 1 : -1;
1050         }
1051 #else
1052         /*
1053          * Kernel/rdma_core support single E-Switch per PF configurations
1054          * only and vport_id field contains the vport index for
1055          * associated VF, which is deduced from representor port name.
1056          * For example, let's have the IB device port 10, it has
1057          * attached network device eth0, which has port name attribute
1058          * pf0vf2, we can deduce the VF number as 2, and set vport index
1059          * as 3 (2+1). This assigning schema should be changed if the
1060          * multiple E-Switch instances per PF configurations or/and PCI
1061          * subfunctions are added.
1062          */
1063         priv->vport_id = switch_info->representor ?
1064                          switch_info->port_name + 1 : -1;
1065 #endif
1066         /* representor_id field keeps the unmodified VF index. */
1067         priv->representor_id = switch_info->representor ?
1068                                switch_info->port_name : -1;
1069         /*
1070          * Look for sibling devices in order to reuse their switch domain
1071          * if any, otherwise allocate one.
1072          */
1073         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1074                 const struct mlx5_priv *opriv =
1075                         rte_eth_devices[port_id].data->dev_private;
1076
1077                 if (!opriv ||
1078                     opriv->sh != priv->sh ||
1079                         opriv->domain_id ==
1080                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1081                         continue;
1082                 priv->domain_id = opriv->domain_id;
1083                 break;
1084         }
1085         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1086                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1087                 if (err) {
1088                         err = rte_errno;
1089                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1090                                 strerror(rte_errno));
1091                         goto error;
1092                 }
1093                 own_domain_id = 1;
1094         }
1095         /* Override some values set by hardware configuration. */
1096         mlx5_args(config, dpdk_dev->devargs);
1097         err = mlx5_dev_check_sibling_config(priv, config);
1098         if (err)
1099                 goto error;
1100         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1101                             IBV_DEVICE_RAW_IP_CSUM);
1102         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1103                 (config->hw_csum ? "" : "not "));
1104 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1105         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1106         DRV_LOG(DEBUG, "counters are not supported");
1107 #endif
1108 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1109         if (config->dv_flow_en) {
1110                 DRV_LOG(WARNING, "DV flow is not supported");
1111                 config->dv_flow_en = 0;
1112         }
1113 #endif
1114         config->ind_table_max_size =
1115                 sh->device_attr.max_rwq_indirection_table_size;
1116         /*
1117          * Remove this check once DPDK supports larger/variable
1118          * indirection tables.
1119          */
1120         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1121                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1122         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1123                 config->ind_table_max_size);
1124         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1125                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1126         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1127                 (config->hw_vlan_strip ? "" : "not "));
1128         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1129                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1130 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1131         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1132 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1133         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1134                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1135 #endif
1136         if (config->hw_padding && !hw_padding) {
1137                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1138                 config->hw_padding = 0;
1139         } else if (config->hw_padding) {
1140                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1141         }
1142         config->tso = (sh->device_attr.max_tso > 0 &&
1143                       (sh->device_attr.tso_supported_qpts &
1144                        (1 << IBV_QPT_RAW_PACKET)));
1145         if (config->tso)
1146                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1147         /*
1148          * MPW is disabled by default, while the Enhanced MPW is enabled
1149          * by default.
1150          */
1151         if (config->mps == MLX5_ARG_UNSET)
1152                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1153                                                           MLX5_MPW_DISABLED;
1154         else
1155                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1156         DRV_LOG(INFO, "%sMPS is %s",
1157                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1158                 config->mps == MLX5_MPW ? "legacy " : "",
1159                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1160         if (config->devx) {
1161                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1162                 if (err) {
1163                         err = -err;
1164                         goto error;
1165                 }
1166                 /* Check relax ordering support. */
1167                 if (!haswell_broadwell_cpu) {
1168                         sh->cmng.relaxed_ordering_write =
1169                                 config->hca_attr.relaxed_ordering_write;
1170                         sh->cmng.relaxed_ordering_read =
1171                                 config->hca_attr.relaxed_ordering_read;
1172                 } else {
1173                         sh->cmng.relaxed_ordering_read = 0;
1174                         sh->cmng.relaxed_ordering_write = 0;
1175                 }
1176                 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1177                 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1178                 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1179                 /* Check for LRO support. */
1180                 if (config->dest_tir && config->hca_attr.lro_cap &&
1181                     config->dv_flow_en) {
1182                         /* TBD check tunnel lro caps. */
1183                         config->lro.supported = config->hca_attr.lro_cap;
1184                         DRV_LOG(DEBUG, "Device supports LRO");
1185                         /*
1186                          * If LRO timeout is not configured by application,
1187                          * use the minimal supported value.
1188                          */
1189                         if (!config->lro.timeout)
1190                                 config->lro.timeout =
1191                                 config->hca_attr.lro_timer_supported_periods[0];
1192                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1193                                 config->lro.timeout);
1194                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1195                                 "required for coalescing is %d bytes",
1196                                 config->hca_attr.lro_min_mss_size);
1197                 }
1198 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1199                 if (config->hca_attr.qos.sup &&
1200                     config->hca_attr.qos.flow_meter_old &&
1201                     config->dv_flow_en) {
1202                         uint8_t reg_c_mask =
1203                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1204                         /*
1205                          * Meter needs two REG_C's for color match and pre-sfx
1206                          * flow match. Here get the REG_C for color match.
1207                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1208                          */
1209                         reg_c_mask &= 0xfc;
1210                         if (__builtin_popcount(reg_c_mask) < 1) {
1211                                 priv->mtr_en = 0;
1212                                 DRV_LOG(WARNING, "No available register for"
1213                                         " meter.");
1214                         } else {
1215                                 /*
1216                                  * The meter color register is used by the
1217                                  * flow-hit feature as well.
1218                                  * The flow-hit feature must use REG_C_3
1219                                  * Prefer REG_C_3 if it is available.
1220                                  */
1221                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1222                                         priv->mtr_color_reg = REG_C_3;
1223                                 else
1224                                         priv->mtr_color_reg = ffs(reg_c_mask)
1225                                                               - 1 + REG_C_0;
1226                                 priv->mtr_en = 1;
1227                                 priv->mtr_reg_share =
1228                                       config->hca_attr.qos.flow_meter;
1229                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1230                                         priv->mtr_color_reg);
1231                         }
1232                 }
1233 #endif
1234 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1235                 if (config->hca_attr.flow_hit_aso &&
1236                     priv->mtr_color_reg == REG_C_3) {
1237                         sh->flow_hit_aso_en = 1;
1238                         err = mlx5_flow_aso_age_mng_init(sh);
1239                         if (err) {
1240                                 err = -err;
1241                                 goto error;
1242                         }
1243                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1244                 }
1245 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1246 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1247                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1248                     config->dv_flow_en) {
1249                         priv->sampler_en = 1;
1250                         DRV_LOG(DEBUG, "Sampler enabled!");
1251                 } else {
1252                         priv->sampler_en = 0;
1253                         if (!config->hca_attr.log_max_ft_sampler_num)
1254                                 DRV_LOG(WARNING,
1255                                         "No available register for sampler.");
1256                         else
1257                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1258                 }
1259 #endif
1260         }
1261         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1262             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1263                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1264                 config->cqe_comp = 0;
1265         }
1266         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1267             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1268                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1269                                  " format isn't supported.");
1270                 config->cqe_comp = 0;
1271         }
1272         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1273             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1274                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1275                                  " format isn't supported.");
1276                 config->cqe_comp = 0;
1277         }
1278         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1279                         config->cqe_comp ? "" : "not ");
1280         if (config->tx_pp) {
1281                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1282                         config->hca_attr.dev_freq_khz);
1283                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1284                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1285                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1286                         config->hca_attr.cross_channel ? "" : "not ");
1287                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1288                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1289                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1290                         config->hca_attr.non_wire_sq ? "" : "not ");
1291                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1292                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1293                         config->hca_attr.log_max_static_sq_wq);
1294                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1295                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1296                 if (!config->devx) {
1297                         DRV_LOG(ERR, "DevX is required for packet pacing");
1298                         err = ENODEV;
1299                         goto error;
1300                 }
1301                 if (!config->hca_attr.qos.packet_pacing) {
1302                         DRV_LOG(ERR, "Packet pacing is not supported");
1303                         err = ENODEV;
1304                         goto error;
1305                 }
1306                 if (!config->hca_attr.cross_channel) {
1307                         DRV_LOG(ERR, "Cross channel operations are"
1308                                      " required for packet pacing");
1309                         err = ENODEV;
1310                         goto error;
1311                 }
1312                 if (!config->hca_attr.wqe_index_ignore) {
1313                         DRV_LOG(ERR, "WQE index ignore feature is"
1314                                      " required for packet pacing");
1315                         err = ENODEV;
1316                         goto error;
1317                 }
1318                 if (!config->hca_attr.non_wire_sq) {
1319                         DRV_LOG(ERR, "Non-wire SQ feature is"
1320                                      " required for packet pacing");
1321                         err = ENODEV;
1322                         goto error;
1323                 }
1324                 if (!config->hca_attr.log_max_static_sq_wq) {
1325                         DRV_LOG(ERR, "Static WQE SQ feature is"
1326                                      " required for packet pacing");
1327                         err = ENODEV;
1328                         goto error;
1329                 }
1330                 if (!config->hca_attr.qos.wqe_rate_pp) {
1331                         DRV_LOG(ERR, "WQE rate mode is required"
1332                                      " for packet pacing");
1333                         err = ENODEV;
1334                         goto error;
1335                 }
1336 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1337                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1338                              " can't create queues for packet pacing");
1339                 err = ENODEV;
1340                 goto error;
1341 #endif
1342         }
1343         if (config->devx) {
1344                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1345
1346                 err = config->hca_attr.access_register_user ?
1347                         mlx5_devx_cmd_register_read
1348                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1349                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1350                 if (!err) {
1351                         uint32_t ts_mode;
1352
1353                         /* MTUTC register is read successfully. */
1354                         ts_mode = MLX5_GET(register_mtutc, reg,
1355                                            time_stamp_mode);
1356                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1357                                 config->rt_timestamp = 1;
1358                 } else {
1359                         /* Kernel does not support register reading. */
1360                         if (config->hca_attr.dev_freq_khz ==
1361                                                  (NS_PER_S / MS_PER_S))
1362                                 config->rt_timestamp = 1;
1363                 }
1364         }
1365         /*
1366          * If HW has bug working with tunnel packet decapsulation and
1367          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1368          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1369          */
1370         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1371                 config->hw_fcs_strip = 0;
1372         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1373                 (config->hw_fcs_strip ? "" : "not "));
1374         if (config->mprq.enabled && mprq) {
1375                 if (config->mprq.stride_num_n &&
1376                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1377                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1378                         config->mprq.stride_num_n =
1379                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1380                                                 mprq_min_stride_num_n),
1381                                         mprq_max_stride_num_n);
1382                         DRV_LOG(WARNING,
1383                                 "the number of strides"
1384                                 " for Multi-Packet RQ is out of range,"
1385                                 " setting default value (%u)",
1386                                 1 << config->mprq.stride_num_n);
1387                 }
1388                 if (config->mprq.stride_size_n &&
1389                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1390                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1391                         config->mprq.stride_size_n =
1392                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1393                                                 mprq_min_stride_size_n),
1394                                         mprq_max_stride_size_n);
1395                         DRV_LOG(WARNING,
1396                                 "the size of a stride"
1397                                 " for Multi-Packet RQ is out of range,"
1398                                 " setting default value (%u)",
1399                                 1 << config->mprq.stride_size_n);
1400                 }
1401                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1402                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1403         } else if (config->mprq.enabled && !mprq) {
1404                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1405                 config->mprq.enabled = 0;
1406         }
1407         if (config->max_dump_files_num == 0)
1408                 config->max_dump_files_num = 128;
1409         eth_dev = rte_eth_dev_allocate(name);
1410         if (eth_dev == NULL) {
1411                 DRV_LOG(ERR, "can not allocate rte ethdev");
1412                 err = ENOMEM;
1413                 goto error;
1414         }
1415         if (priv->representor) {
1416                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1417                 eth_dev->data->representor_id = priv->representor_id;
1418         }
1419         priv->mp_id.port_id = eth_dev->data->port_id;
1420         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1421         /*
1422          * Store associated network device interface index. This index
1423          * is permanent throughout the lifetime of device. So, we may store
1424          * the ifindex here and use the cached value further.
1425          */
1426         MLX5_ASSERT(spawn->ifindex);
1427         priv->if_index = spawn->ifindex;
1428         if (priv->pf_bond >= 0 && priv->master) {
1429                 /* Get bond interface info */
1430                 err = mlx5_sysfs_bond_info(priv->if_index,
1431                                      &priv->bond_ifindex,
1432                                      priv->bond_name);
1433                 if (err)
1434                         DRV_LOG(ERR, "unable to get bond info: %s",
1435                                 strerror(rte_errno));
1436                 else
1437                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1438                                 priv->if_index, priv->bond_ifindex,
1439                                 priv->bond_name);
1440         }
1441         eth_dev->data->dev_private = priv;
1442         priv->dev_data = eth_dev->data;
1443         eth_dev->data->mac_addrs = priv->mac;
1444         if (spawn->pf_bond < 0) {
1445                 eth_dev->device = dpdk_dev;
1446         } else {
1447                 /* Use primary bond PCI as device. */
1448                 if (sh->bond_dev == UINT16_MAX) {
1449                         sh->bond_dev = eth_dev->data->port_id;
1450                         eth_dev->device = dpdk_dev;
1451                 } else {
1452                         eth_dev->device = rte_eth_devices[sh->bond_dev].device;
1453                 }
1454         }
1455         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1456         /* Configure the first MAC address by default. */
1457         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1458                 DRV_LOG(ERR,
1459                         "port %u cannot get MAC address, is mlx5_en"
1460                         " loaded? (errno: %s)",
1461                         eth_dev->data->port_id, strerror(rte_errno));
1462                 err = ENODEV;
1463                 goto error;
1464         }
1465         DRV_LOG(INFO,
1466                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1467                 eth_dev->data->port_id,
1468                 mac.addr_bytes[0], mac.addr_bytes[1],
1469                 mac.addr_bytes[2], mac.addr_bytes[3],
1470                 mac.addr_bytes[4], mac.addr_bytes[5]);
1471 #ifdef RTE_LIBRTE_MLX5_DEBUG
1472         {
1473                 char ifname[MLX5_NAMESIZE];
1474
1475                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1476                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1477                                 eth_dev->data->port_id, ifname);
1478                 else
1479                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1480                                 eth_dev->data->port_id);
1481         }
1482 #endif
1483         /* Get actual MTU if possible. */
1484         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1485         if (err) {
1486                 err = rte_errno;
1487                 goto error;
1488         }
1489         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1490                 priv->mtu);
1491         /* Initialize burst functions to prevent crashes before link-up. */
1492         eth_dev->rx_pkt_burst = removed_rx_burst;
1493         eth_dev->tx_pkt_burst = removed_tx_burst;
1494         eth_dev->dev_ops = &mlx5_dev_ops;
1495         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1496         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1497         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1498         /* Register MAC address. */
1499         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1500         if (config->vf && config->vf_nl_en)
1501                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1502                                       mlx5_ifindex(eth_dev),
1503                                       eth_dev->data->mac_addrs,
1504                                       MLX5_MAX_MAC_ADDRESSES);
1505         priv->flows = 0;
1506         priv->ctrl_flows = 0;
1507         rte_spinlock_init(&priv->flow_list_lock);
1508         TAILQ_INIT(&priv->flow_meters);
1509         TAILQ_INIT(&priv->flow_meter_profiles);
1510         /* Hint libmlx5 to use PMD allocator for data plane resources */
1511         mlx5_glue->dv_set_context_attr(sh->ctx,
1512                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1513                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1514                                 .alloc = &mlx5_alloc_verbs_buf,
1515                                 .free = &mlx5_free_verbs_buf,
1516                                 .data = sh,
1517                         }));
1518         /* Bring Ethernet device up. */
1519         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1520                 eth_dev->data->port_id);
1521         mlx5_set_link_up(eth_dev);
1522         /*
1523          * Even though the interrupt handler is not installed yet,
1524          * interrupts will still trigger on the async_fd from
1525          * Verbs context returned by ibv_open_device().
1526          */
1527         mlx5_link_update(eth_dev, 0);
1528 #ifdef HAVE_MLX5DV_DR_ESWITCH
1529         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1530               (switch_info->representor || switch_info->master)))
1531                 config->dv_esw_en = 0;
1532 #else
1533         config->dv_esw_en = 0;
1534 #endif
1535         /* Detect minimal data bytes to inline. */
1536         mlx5_set_min_inline(spawn, config);
1537         /* Store device configuration on private structure. */
1538         priv->config = *config;
1539         /* Create context for virtual machine VLAN workaround. */
1540         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1541         if (config->dv_flow_en) {
1542                 err = mlx5_alloc_shared_dr(priv);
1543                 if (err)
1544                         goto error;
1545         }
1546         if (config->devx && config->dv_flow_en && config->dest_tir) {
1547                 priv->obj_ops = devx_obj_ops;
1548                 priv->obj_ops.drop_action_create =
1549                                                 ibv_obj_ops.drop_action_create;
1550                 priv->obj_ops.drop_action_destroy =
1551                                                 ibv_obj_ops.drop_action_destroy;
1552 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1553                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1554 #else
1555                 if (config->dv_esw_en)
1556                         priv->obj_ops.txq_obj_modify =
1557                                                 ibv_obj_ops.txq_obj_modify;
1558 #endif
1559                 /* Use specific wrappers for Tx object. */
1560                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1561                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1562                 mlx5_queue_counter_id_prepare(eth_dev);
1563
1564         } else {
1565                 priv->obj_ops = ibv_obj_ops;
1566         }
1567         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1568         if (!priv->drop_queue.hrxq)
1569                 goto error;
1570         /* Supported Verbs flow priority number detection. */
1571         err = mlx5_flow_discover_priorities(eth_dev);
1572         if (err < 0) {
1573                 err = -err;
1574                 goto error;
1575         }
1576         priv->config.flow_prio = err;
1577         if (!priv->config.dv_esw_en &&
1578             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1579                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1580                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1581                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1582         }
1583         mlx5_set_metadata_mask(eth_dev);
1584         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1585             !priv->sh->dv_regc0_mask) {
1586                 DRV_LOG(ERR, "metadata mode %u is not supported "
1587                              "(no metadata reg_c[0] is available)",
1588                              priv->config.dv_xmeta_en);
1589                         err = ENOTSUP;
1590                         goto error;
1591         }
1592         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1593                              mlx5_hrxq_create_cb,
1594                              mlx5_hrxq_match_cb,
1595                              mlx5_hrxq_remove_cb);
1596         /* Query availability of metadata reg_c's. */
1597         err = mlx5_flow_discover_mreg_c(eth_dev);
1598         if (err < 0) {
1599                 err = -err;
1600                 goto error;
1601         }
1602         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1603                 DRV_LOG(DEBUG,
1604                         "port %u extensive metadata register is not supported",
1605                         eth_dev->data->port_id);
1606                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1607                         DRV_LOG(ERR, "metadata mode %u is not supported "
1608                                      "(no metadata registers available)",
1609                                      priv->config.dv_xmeta_en);
1610                         err = ENOTSUP;
1611                         goto error;
1612                 }
1613         }
1614         if (priv->config.dv_flow_en &&
1615             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1616             mlx5_flow_ext_mreg_supported(eth_dev) &&
1617             priv->sh->dv_regc0_mask) {
1618                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1619                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1620                                                       0, 0,
1621                                                       flow_dv_mreg_create_cb,
1622                                                       flow_dv_mreg_match_cb,
1623                                                       flow_dv_mreg_remove_cb);
1624                 if (!priv->mreg_cp_tbl) {
1625                         err = ENOMEM;
1626                         goto error;
1627                 }
1628                 priv->mreg_cp_tbl->ctx = eth_dev;
1629         }
1630         rte_spinlock_init(&priv->shared_act_sl);
1631         mlx5_flow_counter_mode_config(eth_dev);
1632         if (priv->config.dv_flow_en)
1633                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1634         return eth_dev;
1635 error:
1636         if (priv) {
1637                 if (priv->mreg_cp_tbl)
1638                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1639                 if (priv->sh)
1640                         mlx5_os_free_shared_dr(priv);
1641                 if (priv->nl_socket_route >= 0)
1642                         close(priv->nl_socket_route);
1643                 if (priv->nl_socket_rdma >= 0)
1644                         close(priv->nl_socket_rdma);
1645                 if (priv->vmwa_context)
1646                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1647                 if (eth_dev && priv->drop_queue.hrxq)
1648                         mlx5_drop_action_destroy(eth_dev);
1649                 if (own_domain_id)
1650                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1651                 mlx5_cache_list_destroy(&priv->hrxqs);
1652                 mlx5_free(priv);
1653                 if (eth_dev != NULL)
1654                         eth_dev->data->dev_private = NULL;
1655         }
1656         if (eth_dev != NULL) {
1657                 /* mac_addrs must not be freed alone because part of
1658                  * dev_private
1659                  **/
1660                 eth_dev->data->mac_addrs = NULL;
1661                 rte_eth_dev_release_port(eth_dev);
1662         }
1663         if (sh)
1664                 mlx5_free_shared_dev_ctx(sh);
1665         MLX5_ASSERT(err > 0);
1666         rte_errno = err;
1667         return NULL;
1668 }
1669
1670 /**
1671  * Comparison callback to sort device data.
1672  *
1673  * This is meant to be used with qsort().
1674  *
1675  * @param a[in]
1676  *   Pointer to pointer to first data object.
1677  * @param b[in]
1678  *   Pointer to pointer to second data object.
1679  *
1680  * @return
1681  *   0 if both objects are equal, less than 0 if the first argument is less
1682  *   than the second, greater than 0 otherwise.
1683  */
1684 static int
1685 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1686 {
1687         const struct mlx5_switch_info *si_a =
1688                 &((const struct mlx5_dev_spawn_data *)a)->info;
1689         const struct mlx5_switch_info *si_b =
1690                 &((const struct mlx5_dev_spawn_data *)b)->info;
1691         int ret;
1692
1693         /* Master device first. */
1694         ret = si_b->master - si_a->master;
1695         if (ret)
1696                 return ret;
1697         /* Then representor devices. */
1698         ret = si_b->representor - si_a->representor;
1699         if (ret)
1700                 return ret;
1701         /* Unidentified devices come last in no specific order. */
1702         if (!si_a->representor)
1703                 return 0;
1704         /* Order representors by name. */
1705         return si_a->port_name - si_b->port_name;
1706 }
1707
1708 /**
1709  * Match PCI information for possible slaves of bonding device.
1710  *
1711  * @param[in] ibv_dev
1712  *   Pointer to Infiniband device structure.
1713  * @param[in] pci_dev
1714  *   Pointer to PCI device structure to match PCI address.
1715  * @param[in] nl_rdma
1716  *   Netlink RDMA group socket handle.
1717  *
1718  * @return
1719  *   negative value if no bonding device found, otherwise
1720  *   positive index of slave PF in bonding.
1721  */
1722 static int
1723 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1724                            const struct rte_pci_device *pci_dev,
1725                            int nl_rdma)
1726 {
1727         char ifname[IF_NAMESIZE + 1];
1728         unsigned int ifindex;
1729         unsigned int np, i;
1730         FILE *file = NULL;
1731         int pf = -1;
1732
1733         /*
1734          * Try to get master device name. If something goes
1735          * wrong suppose the lack of kernel support and no
1736          * bonding devices.
1737          */
1738         if (nl_rdma < 0)
1739                 return -1;
1740         if (!strstr(ibv_dev->name, "bond"))
1741                 return -1;
1742         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1743         if (!np)
1744                 return -1;
1745         /*
1746          * The Master device might not be on the predefined
1747          * port (not on port index 1, it is not garanted),
1748          * we have to scan all Infiniband device port and
1749          * find master.
1750          */
1751         for (i = 1; i <= np; ++i) {
1752                 /* Check whether Infiniband port is populated. */
1753                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1754                 if (!ifindex)
1755                         continue;
1756                 if (!if_indextoname(ifindex, ifname))
1757                         continue;
1758                 /* Try to read bonding slave names from sysfs. */
1759                 MKSTR(slaves,
1760                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1761                 file = fopen(slaves, "r");
1762                 if (file)
1763                         break;
1764         }
1765         if (!file)
1766                 return -1;
1767         /* Use safe format to check maximal buffer length. */
1768         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1769         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1770                 char tmp_str[IF_NAMESIZE + 32];
1771                 struct rte_pci_addr pci_addr;
1772                 struct mlx5_switch_info info;
1773
1774                 /* Process slave interface names in the loop. */
1775                 snprintf(tmp_str, sizeof(tmp_str),
1776                          "/sys/class/net/%s", ifname);
1777                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1778                         DRV_LOG(WARNING, "can not get PCI address"
1779                                          " for netdev \"%s\"", ifname);
1780                         continue;
1781                 }
1782                 if (pci_dev->addr.domain != pci_addr.domain ||
1783                     pci_dev->addr.bus != pci_addr.bus ||
1784                     pci_dev->addr.devid != pci_addr.devid ||
1785                     pci_dev->addr.function != pci_addr.function)
1786                         continue;
1787                 /* Slave interface PCI address match found. */
1788                 fclose(file);
1789                 snprintf(tmp_str, sizeof(tmp_str),
1790                          "/sys/class/net/%s/phys_port_name", ifname);
1791                 file = fopen(tmp_str, "rb");
1792                 if (!file)
1793                         break;
1794                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1795                 if (fscanf(file, "%32s", tmp_str) == 1)
1796                         mlx5_translate_port_name(tmp_str, &info);
1797                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1798                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1799                         pf = info.port_name;
1800                 break;
1801         }
1802         if (file)
1803                 fclose(file);
1804         return pf;
1805 }
1806
1807 /**
1808  * DPDK callback to register a PCI device.
1809  *
1810  * This function spawns Ethernet devices out of a given PCI device.
1811  *
1812  * @param[in] pci_drv
1813  *   PCI driver structure (mlx5_driver).
1814  * @param[in] pci_dev
1815  *   PCI device information.
1816  *
1817  * @return
1818  *   0 on success, a negative errno value otherwise and rte_errno is set.
1819  */
1820 int
1821 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1822                   struct rte_pci_device *pci_dev)
1823 {
1824         struct ibv_device **ibv_list;
1825         /*
1826          * Number of found IB Devices matching with requested PCI BDF.
1827          * nd != 1 means there are multiple IB devices over the same
1828          * PCI device and we have representors and master.
1829          */
1830         unsigned int nd = 0;
1831         /*
1832          * Number of found IB device Ports. nd = 1 and np = 1..n means
1833          * we have the single multiport IB device, and there may be
1834          * representors attached to some of found ports.
1835          */
1836         unsigned int np = 0;
1837         /*
1838          * Number of DPDK ethernet devices to Spawn - either over
1839          * multiple IB devices or multiple ports of single IB device.
1840          * Actually this is the number of iterations to spawn.
1841          */
1842         unsigned int ns = 0;
1843         /*
1844          * Bonding device
1845          *   < 0 - no bonding device (single one)
1846          *  >= 0 - bonding device (value is slave PF index)
1847          */
1848         int bd = -1;
1849         struct mlx5_dev_spawn_data *list = NULL;
1850         struct mlx5_dev_config dev_config;
1851         unsigned int dev_config_vf;
1852         int ret;
1853
1854         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1855                 mlx5_pmd_socket_init();
1856         ret = mlx5_init_once();
1857         if (ret) {
1858                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1859                         strerror(rte_errno));
1860                 return -rte_errno;
1861         }
1862         errno = 0;
1863         ibv_list = mlx5_glue->get_device_list(&ret);
1864         if (!ibv_list) {
1865                 rte_errno = errno ? errno : ENOSYS;
1866                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1867                 return -rte_errno;
1868         }
1869         /*
1870          * First scan the list of all Infiniband devices to find
1871          * matching ones, gathering into the list.
1872          */
1873         struct ibv_device *ibv_match[ret + 1];
1874         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1875         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1876         unsigned int i;
1877
1878         while (ret-- > 0) {
1879                 struct rte_pci_addr pci_addr;
1880
1881                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1882                 bd = mlx5_device_bond_pci_match
1883                                 (ibv_list[ret], pci_dev, nl_rdma);
1884                 if (bd >= 0) {
1885                         /*
1886                          * Bonding device detected. Only one match is allowed,
1887                          * the bonding is supported over multi-port IB device,
1888                          * there should be no matches on representor PCI
1889                          * functions or non VF LAG bonding devices with
1890                          * specified address.
1891                          */
1892                         if (nd) {
1893                                 DRV_LOG(ERR,
1894                                         "multiple PCI match on bonding device"
1895                                         "\"%s\" found", ibv_list[ret]->name);
1896                                 rte_errno = ENOENT;
1897                                 ret = -rte_errno;
1898                                 goto exit;
1899                         }
1900                         DRV_LOG(INFO, "PCI information matches for"
1901                                       " slave %d bonding device \"%s\"",
1902                                       bd, ibv_list[ret]->name);
1903                         ibv_match[nd++] = ibv_list[ret];
1904                         break;
1905                 }
1906                 if (mlx5_dev_to_pci_addr
1907                         (ibv_list[ret]->ibdev_path, &pci_addr))
1908                         continue;
1909                 if (pci_dev->addr.domain != pci_addr.domain ||
1910                     pci_dev->addr.bus != pci_addr.bus ||
1911                     pci_dev->addr.devid != pci_addr.devid ||
1912                     pci_dev->addr.function != pci_addr.function)
1913                         continue;
1914                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1915                         ibv_list[ret]->name);
1916                 ibv_match[nd++] = ibv_list[ret];
1917         }
1918         ibv_match[nd] = NULL;
1919         if (!nd) {
1920                 /* No device matches, just complain and bail out. */
1921                 DRV_LOG(WARNING,
1922                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1923                         " are kernel drivers loaded?",
1924                         pci_dev->addr.domain, pci_dev->addr.bus,
1925                         pci_dev->addr.devid, pci_dev->addr.function);
1926                 rte_errno = ENOENT;
1927                 ret = -rte_errno;
1928                 goto exit;
1929         }
1930         if (nd == 1) {
1931                 /*
1932                  * Found single matching device may have multiple ports.
1933                  * Each port may be representor, we have to check the port
1934                  * number and check the representors existence.
1935                  */
1936                 if (nl_rdma >= 0)
1937                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1938                 if (!np)
1939                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1940                                          " ports number", ibv_match[0]->name);
1941                 if (bd >= 0 && !np) {
1942                         DRV_LOG(ERR, "can not get ports"
1943                                      " for bonding device");
1944                         rte_errno = ENOENT;
1945                         ret = -rte_errno;
1946                         goto exit;
1947                 }
1948         }
1949 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1950         if (bd >= 0) {
1951                 /*
1952                  * This may happen if there is VF LAG kernel support and
1953                  * application is compiled with older rdma_core library.
1954                  */
1955                 DRV_LOG(ERR,
1956                         "No kernel/verbs support for VF LAG bonding found.");
1957                 rte_errno = ENOTSUP;
1958                 ret = -rte_errno;
1959                 goto exit;
1960         }
1961 #endif
1962         /*
1963          * Now we can determine the maximal
1964          * amount of devices to be spawned.
1965          */
1966         list = mlx5_malloc(MLX5_MEM_ZERO,
1967                            sizeof(struct mlx5_dev_spawn_data) *
1968                            (np ? np : nd),
1969                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1970         if (!list) {
1971                 DRV_LOG(ERR, "spawn data array allocation failure");
1972                 rte_errno = ENOMEM;
1973                 ret = -rte_errno;
1974                 goto exit;
1975         }
1976         if (bd >= 0 || np > 1) {
1977                 /*
1978                  * Single IB device with multiple ports found,
1979                  * it may be E-Switch master device and representors.
1980                  * We have to perform identification through the ports.
1981                  */
1982                 MLX5_ASSERT(nl_rdma >= 0);
1983                 MLX5_ASSERT(ns == 0);
1984                 MLX5_ASSERT(nd == 1);
1985                 MLX5_ASSERT(np);
1986                 for (i = 1; i <= np; ++i) {
1987                         list[ns].max_port = np;
1988                         list[ns].phys_port = i;
1989                         list[ns].phys_dev = ibv_match[0];
1990                         list[ns].eth_dev = NULL;
1991                         list[ns].pci_dev = pci_dev;
1992                         list[ns].pf_bond = bd;
1993                         list[ns].ifindex = mlx5_nl_ifindex
1994                                 (nl_rdma,
1995                                 mlx5_os_get_dev_device_name
1996                                                 (list[ns].phys_dev), i);
1997                         if (!list[ns].ifindex) {
1998                                 /*
1999                                  * No network interface index found for the
2000                                  * specified port, it means there is no
2001                                  * representor on this port. It's OK,
2002                                  * there can be disabled ports, for example
2003                                  * if sriov_numvfs < sriov_totalvfs.
2004                                  */
2005                                 continue;
2006                         }
2007                         ret = -1;
2008                         if (nl_route >= 0)
2009                                 ret = mlx5_nl_switch_info
2010                                                (nl_route,
2011                                                 list[ns].ifindex,
2012                                                 &list[ns].info);
2013                         if (ret || (!list[ns].info.representor &&
2014                                     !list[ns].info.master)) {
2015                                 /*
2016                                  * We failed to recognize representors with
2017                                  * Netlink, let's try to perform the task
2018                                  * with sysfs.
2019                                  */
2020                                 ret =  mlx5_sysfs_switch_info
2021                                                 (list[ns].ifindex,
2022                                                  &list[ns].info);
2023                         }
2024 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2025                         if (!ret && bd >= 0) {
2026                                 switch (list[ns].info.name_type) {
2027                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2028                                         if (list[ns].info.port_name == bd)
2029                                                 ns++;
2030                                         break;
2031                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2032                                         /* Fallthrough */
2033                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2034                                         if (list[ns].info.pf_num == bd)
2035                                                 ns++;
2036                                         break;
2037                                 default:
2038                                         break;
2039                                 }
2040                                 continue;
2041                         }
2042 #endif
2043                         if (!ret && (list[ns].info.representor ^
2044                                      list[ns].info.master))
2045                                 ns++;
2046                 }
2047                 if (!ns) {
2048                         DRV_LOG(ERR,
2049                                 "unable to recognize master/representors"
2050                                 " on the IB device with multiple ports");
2051                         rte_errno = ENOENT;
2052                         ret = -rte_errno;
2053                         goto exit;
2054                 }
2055         } else {
2056                 /*
2057                  * The existence of several matching entries (nd > 1) means
2058                  * port representors have been instantiated. No existing Verbs
2059                  * call nor sysfs entries can tell them apart, this can only
2060                  * be done through Netlink calls assuming kernel drivers are
2061                  * recent enough to support them.
2062                  *
2063                  * In the event of identification failure through Netlink,
2064                  * try again through sysfs, then:
2065                  *
2066                  * 1. A single IB device matches (nd == 1) with single
2067                  *    port (np=0/1) and is not a representor, assume
2068                  *    no switch support.
2069                  *
2070                  * 2. Otherwise no safe assumptions can be made;
2071                  *    complain louder and bail out.
2072                  */
2073                 for (i = 0; i != nd; ++i) {
2074                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2075                         list[ns].max_port = 1;
2076                         list[ns].phys_port = 1;
2077                         list[ns].phys_dev = ibv_match[i];
2078                         list[ns].eth_dev = NULL;
2079                         list[ns].pci_dev = pci_dev;
2080                         list[ns].pf_bond = -1;
2081                         list[ns].ifindex = 0;
2082                         if (nl_rdma >= 0)
2083                                 list[ns].ifindex = mlx5_nl_ifindex
2084                                 (nl_rdma,
2085                                 mlx5_os_get_dev_device_name
2086                                                 (list[ns].phys_dev), 1);
2087                         if (!list[ns].ifindex) {
2088                                 char ifname[IF_NAMESIZE];
2089
2090                                 /*
2091                                  * Netlink failed, it may happen with old
2092                                  * ib_core kernel driver (before 4.16).
2093                                  * We can assume there is old driver because
2094                                  * here we are processing single ports IB
2095                                  * devices. Let's try sysfs to retrieve
2096                                  * the ifindex. The method works for
2097                                  * master device only.
2098                                  */
2099                                 if (nd > 1) {
2100                                         /*
2101                                          * Multiple devices found, assume
2102                                          * representors, can not distinguish
2103                                          * master/representor and retrieve
2104                                          * ifindex via sysfs.
2105                                          */
2106                                         continue;
2107                                 }
2108                                 ret = mlx5_get_ifname_sysfs
2109                                         (ibv_match[i]->ibdev_path, ifname);
2110                                 if (!ret)
2111                                         list[ns].ifindex =
2112                                                 if_nametoindex(ifname);
2113                                 if (!list[ns].ifindex) {
2114                                         /*
2115                                          * No network interface index found
2116                                          * for the specified device, it means
2117                                          * there it is neither representor
2118                                          * nor master.
2119                                          */
2120                                         continue;
2121                                 }
2122                         }
2123                         ret = -1;
2124                         if (nl_route >= 0)
2125                                 ret = mlx5_nl_switch_info
2126                                                (nl_route,
2127                                                 list[ns].ifindex,
2128                                                 &list[ns].info);
2129                         if (ret || (!list[ns].info.representor &&
2130                                     !list[ns].info.master)) {
2131                                 /*
2132                                  * We failed to recognize representors with
2133                                  * Netlink, let's try to perform the task
2134                                  * with sysfs.
2135                                  */
2136                                 ret =  mlx5_sysfs_switch_info
2137                                                 (list[ns].ifindex,
2138                                                  &list[ns].info);
2139                         }
2140                         if (!ret && (list[ns].info.representor ^
2141                                      list[ns].info.master)) {
2142                                 ns++;
2143                         } else if ((nd == 1) &&
2144                                    !list[ns].info.representor &&
2145                                    !list[ns].info.master) {
2146                                 /*
2147                                  * Single IB device with
2148                                  * one physical port and
2149                                  * attached network device.
2150                                  * May be SRIOV is not enabled
2151                                  * or there is no representors.
2152                                  */
2153                                 DRV_LOG(INFO, "no E-Switch support detected");
2154                                 ns++;
2155                                 break;
2156                         }
2157                 }
2158                 if (!ns) {
2159                         DRV_LOG(ERR,
2160                                 "unable to recognize master/representors"
2161                                 " on the multiple IB devices");
2162                         rte_errno = ENOENT;
2163                         ret = -rte_errno;
2164                         goto exit;
2165                 }
2166         }
2167         MLX5_ASSERT(ns);
2168         /*
2169          * Sort list to probe devices in natural order for users convenience
2170          * (i.e. master first, then representors from lowest to highest ID).
2171          */
2172         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2173         /* Device specific configuration. */
2174         switch (pci_dev->id.device_id) {
2175         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2176         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2177         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2178         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2179         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2180         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2181         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2182                 dev_config_vf = 1;
2183                 break;
2184         default:
2185                 dev_config_vf = 0;
2186                 break;
2187         }
2188         for (i = 0; i != ns; ++i) {
2189                 uint32_t restore;
2190
2191                 /* Default configuration. */
2192                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2193                 dev_config.vf = dev_config_vf;
2194                 dev_config.mps = MLX5_ARG_UNSET;
2195                 dev_config.dbnc = MLX5_ARG_UNSET;
2196                 dev_config.rx_vec_en = 1;
2197                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2198                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2199                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2200                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2201                 dev_config.vf_nl_en = 1;
2202                 dev_config.mr_ext_memseg_en = 1;
2203                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2204                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2205                 dev_config.dv_esw_en = 1;
2206                 dev_config.dv_flow_en = 1;
2207                 dev_config.decap_en = 1;
2208                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2209                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2210                                                  &list[i],
2211                                                  &dev_config);
2212                 if (!list[i].eth_dev) {
2213                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2214                                 break;
2215                         /* Device is disabled or already spawned. Ignore it. */
2216                         continue;
2217                 }
2218                 restore = list[i].eth_dev->data->dev_flags;
2219                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2220                 /* Restore non-PCI flags cleared by the above call. */
2221                 list[i].eth_dev->data->dev_flags |= restore;
2222                 rte_eth_dev_probing_finish(list[i].eth_dev);
2223         }
2224         if (i != ns) {
2225                 DRV_LOG(ERR,
2226                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2227                         " encountering an error: %s",
2228                         pci_dev->addr.domain, pci_dev->addr.bus,
2229                         pci_dev->addr.devid, pci_dev->addr.function,
2230                         strerror(rte_errno));
2231                 ret = -rte_errno;
2232                 /* Roll back. */
2233                 while (i--) {
2234                         if (!list[i].eth_dev)
2235                                 continue;
2236                         mlx5_dev_close(list[i].eth_dev);
2237                         /* mac_addrs must not be freed because in dev_private */
2238                         list[i].eth_dev->data->mac_addrs = NULL;
2239                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2240                 }
2241                 /* Restore original error. */
2242                 rte_errno = -ret;
2243         } else {
2244                 ret = 0;
2245         }
2246 exit:
2247         /*
2248          * Do the routine cleanup:
2249          * - close opened Netlink sockets
2250          * - free allocated spawn data array
2251          * - free the Infiniband device list
2252          */
2253         if (nl_rdma >= 0)
2254                 close(nl_rdma);
2255         if (nl_route >= 0)
2256                 close(nl_route);
2257         if (list)
2258                 mlx5_free(list);
2259         MLX5_ASSERT(ibv_list);
2260         mlx5_glue->free_device_list(ibv_list);
2261         return ret;
2262 }
2263
2264 static int
2265 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2266 {
2267         char *env;
2268         int value;
2269
2270         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2271         /* Get environment variable to store. */
2272         env = getenv(MLX5_SHUT_UP_BF);
2273         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2274         if (config->dbnc == MLX5_ARG_UNSET)
2275                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2276         else
2277                 setenv(MLX5_SHUT_UP_BF,
2278                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2279         return value;
2280 }
2281
2282 static void
2283 mlx5_restore_doorbell_mapping_env(int value)
2284 {
2285         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2286         /* Restore the original environment variable state. */
2287         if (value == MLX5_ARG_UNSET)
2288                 unsetenv(MLX5_SHUT_UP_BF);
2289         else
2290                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2291 }
2292
2293 /**
2294  * Extract pdn of PD object using DV API.
2295  *
2296  * @param[in] pd
2297  *   Pointer to the verbs PD object.
2298  * @param[out] pdn
2299  *   Pointer to the PD object number variable.
2300  *
2301  * @return
2302  *   0 on success, error value otherwise.
2303  */
2304 int
2305 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2306 {
2307 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2308         struct mlx5dv_obj obj;
2309         struct mlx5dv_pd pd_info;
2310         int ret = 0;
2311
2312         obj.pd.in = pd;
2313         obj.pd.out = &pd_info;
2314         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2315         if (ret) {
2316                 DRV_LOG(DEBUG, "Fail to get PD object info");
2317                 return ret;
2318         }
2319         *pdn = pd_info.pdn;
2320         return 0;
2321 #else
2322         (void)pd;
2323         (void)pdn;
2324         return -ENOTSUP;
2325 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2326 }
2327
2328 /**
2329  * Function API to open IB device.
2330  *
2331  * This function calls the Linux glue APIs to open a device.
2332  *
2333  * @param[in] spawn
2334  *   Pointer to the IB device attributes (name, port, etc).
2335  * @param[out] config
2336  *   Pointer to device configuration structure.
2337  * @param[out] sh
2338  *   Pointer to shared context structure.
2339  *
2340  * @return
2341  *   0 on success, a positive error value otherwise.
2342  */
2343 int
2344 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2345                      const struct mlx5_dev_config *config,
2346                      struct mlx5_dev_ctx_shared *sh)
2347 {
2348         int dbmap_env;
2349         int err = 0;
2350
2351         sh->numa_node = spawn->pci_dev->device.numa_node;
2352         pthread_mutex_init(&sh->txpp.mutex, NULL);
2353         /*
2354          * Configure environment variable "MLX5_BF_SHUT_UP"
2355          * before the device creation. The rdma_core library
2356          * checks the variable at device creation and
2357          * stores the result internally.
2358          */
2359         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2360         /* Try to open IB device with DV first, then usual Verbs. */
2361         errno = 0;
2362         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2363         if (sh->ctx) {
2364                 sh->devx = 1;
2365                 DRV_LOG(DEBUG, "DevX is supported");
2366                 /* The device is created, no need for environment. */
2367                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2368         } else {
2369                 /* The environment variable is still configured. */
2370                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2371                 err = errno ? errno : ENODEV;
2372                 /*
2373                  * The environment variable is not needed anymore,
2374                  * all device creation attempts are completed.
2375                  */
2376                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2377                 if (!sh->ctx)
2378                         return err;
2379                 DRV_LOG(DEBUG, "DevX is NOT supported");
2380                 err = 0;
2381         }
2382         if (!err && sh->ctx) {
2383                 /* Hint libmlx5 to use PMD allocator for data plane resources */
2384                 mlx5_glue->dv_set_context_attr(sh->ctx,
2385                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2386                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2387                                 .alloc = &mlx5_alloc_verbs_buf,
2388                                 .free = &mlx5_free_verbs_buf,
2389                                 .data = sh,
2390                         }));
2391         }
2392         return err;
2393 }
2394
2395 /**
2396  * Install shared asynchronous device events handler.
2397  * This function is implemented to support event sharing
2398  * between multiple ports of single IB device.
2399  *
2400  * @param sh
2401  *   Pointer to mlx5_dev_ctx_shared object.
2402  */
2403 void
2404 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2405 {
2406         int ret;
2407         int flags;
2408
2409         sh->intr_handle.fd = -1;
2410         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2411         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2412                     F_SETFL, flags | O_NONBLOCK);
2413         if (ret) {
2414                 DRV_LOG(INFO, "failed to change file descriptor async event"
2415                         " queue");
2416         } else {
2417                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2418                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2419                 if (rte_intr_callback_register(&sh->intr_handle,
2420                                         mlx5_dev_interrupt_handler, sh)) {
2421                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2422                         sh->intr_handle.fd = -1;
2423                 }
2424         }
2425         if (sh->devx) {
2426 #ifdef HAVE_IBV_DEVX_ASYNC
2427                 sh->intr_handle_devx.fd = -1;
2428                 sh->devx_comp =
2429                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2430                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2431                 if (!devx_comp) {
2432                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2433                         return;
2434                 }
2435                 flags = fcntl(devx_comp->fd, F_GETFL);
2436                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2437                 if (ret) {
2438                         DRV_LOG(INFO, "failed to change file descriptor"
2439                                 " devx comp");
2440                         return;
2441                 }
2442                 sh->intr_handle_devx.fd = devx_comp->fd;
2443                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2444                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2445                                         mlx5_dev_interrupt_handler_devx, sh)) {
2446                         DRV_LOG(INFO, "Fail to install the devx shared"
2447                                 " interrupt.");
2448                         sh->intr_handle_devx.fd = -1;
2449                 }
2450 #endif /* HAVE_IBV_DEVX_ASYNC */
2451         }
2452 }
2453
2454 /**
2455  * Uninstall shared asynchronous device events handler.
2456  * This function is implemented to support event sharing
2457  * between multiple ports of single IB device.
2458  *
2459  * @param dev
2460  *   Pointer to mlx5_dev_ctx_shared object.
2461  */
2462 void
2463 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2464 {
2465         if (sh->intr_handle.fd >= 0)
2466                 mlx5_intr_callback_unregister(&sh->intr_handle,
2467                                               mlx5_dev_interrupt_handler, sh);
2468 #ifdef HAVE_IBV_DEVX_ASYNC
2469         if (sh->intr_handle_devx.fd >= 0)
2470                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2471                                   mlx5_dev_interrupt_handler_devx, sh);
2472         if (sh->devx_comp)
2473                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2474 #endif
2475 }
2476
2477 /**
2478  * Read statistics by a named counter.
2479  *
2480  * @param[in] priv
2481  *   Pointer to the private device data structure.
2482  * @param[in] ctr_name
2483  *   Pointer to the name of the statistic counter to read
2484  * @param[out] stat
2485  *   Pointer to read statistic value.
2486  * @return
2487  *   0 on success and stat is valud, 1 if failed to read the value
2488  *   rte_errno is set.
2489  *
2490  */
2491 int
2492 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2493                       uint64_t *stat)
2494 {
2495         int fd;
2496
2497         if (priv->sh) {
2498                 if (priv->q_counters != NULL &&
2499                     strcmp(ctr_name, "out_of_buffer") == 0)
2500                         return mlx5_devx_cmd_queue_counter_query(priv->sh->ctx,
2501                                                            0, (uint32_t *)stat);
2502                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2503                       priv->sh->ibdev_path,
2504                       priv->dev_port,
2505                       ctr_name);
2506                 fd = open(path, O_RDONLY);
2507                 /*
2508                  * in switchdev the file location is not per port
2509                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2510                  */
2511                 if (fd == -1) {
2512                         MKSTR(path1, "%s/hw_counters/%s",
2513                               priv->sh->ibdev_path,
2514                               ctr_name);
2515                         fd = open(path1, O_RDONLY);
2516                 }
2517                 if (fd != -1) {
2518                         char buf[21] = {'\0'};
2519                         ssize_t n = read(fd, buf, sizeof(buf));
2520
2521                         close(fd);
2522                         if (n != -1) {
2523                                 *stat = strtoull(buf, NULL, 10);
2524                                 return 0;
2525                         }
2526                 }
2527         }
2528         *stat = 0;
2529         return 1;
2530 }
2531
2532 /**
2533  * Set the reg_mr and dereg_mr call backs
2534  *
2535  * @param reg_mr_cb[out]
2536  *   Pointer to reg_mr func
2537  * @param dereg_mr_cb[out]
2538  *   Pointer to dereg_mr func
2539  *
2540  */
2541 void
2542 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2543                       mlx5_dereg_mr_t *dereg_mr_cb)
2544 {
2545         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2546         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2547 }
2548
2549 /**
2550  * Remove a MAC address from device
2551  *
2552  * @param dev
2553  *   Pointer to Ethernet device structure.
2554  * @param index
2555  *   MAC address index.
2556  */
2557 void
2558 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2559 {
2560         struct mlx5_priv *priv = dev->data->dev_private;
2561         const int vf = priv->config.vf;
2562
2563         if (vf)
2564                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2565                                         mlx5_ifindex(dev), priv->mac_own,
2566                                         &dev->data->mac_addrs[index], index);
2567 }
2568
2569 /**
2570  * Adds a MAC address to the device
2571  *
2572  * @param dev
2573  *   Pointer to Ethernet device structure.
2574  * @param mac_addr
2575  *   MAC address to register.
2576  * @param index
2577  *   MAC address index.
2578  *
2579  * @return
2580  *   0 on success, a negative errno value otherwise
2581  */
2582 int
2583 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2584                      uint32_t index)
2585 {
2586         struct mlx5_priv *priv = dev->data->dev_private;
2587         const int vf = priv->config.vf;
2588         int ret = 0;
2589
2590         if (vf)
2591                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2592                                            mlx5_ifindex(dev), priv->mac_own,
2593                                            mac, index);
2594         return ret;
2595 }
2596
2597 /**
2598  * Modify a VF MAC address
2599  *
2600  * @param priv
2601  *   Pointer to device private data.
2602  * @param mac_addr
2603  *   MAC address to modify into.
2604  * @param iface_idx
2605  *   Net device interface index
2606  * @param vf_index
2607  *   VF index
2608  *
2609  * @return
2610  *   0 on success, a negative errno value otherwise
2611  */
2612 int
2613 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2614                            unsigned int iface_idx,
2615                            struct rte_ether_addr *mac_addr,
2616                            int vf_index)
2617 {
2618         return mlx5_nl_vf_mac_addr_modify
2619                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2620 }
2621
2622 /**
2623  * Set device promiscuous mode
2624  *
2625  * @param dev
2626  *   Pointer to Ethernet device structure.
2627  * @param enable
2628  *   0 - promiscuous is disabled, otherwise - enabled
2629  *
2630  * @return
2631  *   0 on success, a negative error value otherwise
2632  */
2633 int
2634 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2635 {
2636         struct mlx5_priv *priv = dev->data->dev_private;
2637
2638         return mlx5_nl_promisc(priv->nl_socket_route,
2639                                mlx5_ifindex(dev), !!enable);
2640 }
2641
2642 /**
2643  * Set device promiscuous mode
2644  *
2645  * @param dev
2646  *   Pointer to Ethernet device structure.
2647  * @param enable
2648  *   0 - all multicase is disabled, otherwise - enabled
2649  *
2650  * @return
2651  *   0 on success, a negative error value otherwise
2652  */
2653 int
2654 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2655 {
2656         struct mlx5_priv *priv = dev->data->dev_private;
2657
2658         return mlx5_nl_allmulti(priv->nl_socket_route,
2659                                 mlx5_ifindex(dev), !!enable);
2660 }
2661
2662 /**
2663  * Flush device MAC addresses
2664  *
2665  * @param dev
2666  *   Pointer to Ethernet device structure.
2667  *
2668  */
2669 void
2670 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2671 {
2672         struct mlx5_priv *priv = dev->data->dev_private;
2673
2674         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2675                                dev->data->mac_addrs,
2676                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2677 }