drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 120         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 121         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 122         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 123         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 124         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 125         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 126         device_attr->max_rwq_indirection_table_size =
 127                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 128         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 129         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 130
 131         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 132         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 133         if (err)
 134                 return err;
 135
 136         device_attr->flags = dv_attr.flags;
 137         device_attr->comp_mask = dv_attr.comp_mask;
 138 #ifdef HAVE_IBV_MLX5_MOD_SWP
 139         device_attr->sw_parsing_offloads =
 140                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 141 #endif
 142         device_attr->min_single_stride_log_num_of_bytes =
 143                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 144         device_attr->max_single_stride_log_num_of_bytes =
 145                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 146         device_attr->min_single_wqe_log_num_of_strides =
 147                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 148         device_attr->max_single_wqe_log_num_of_strides =
 149                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 150         device_attr->stride_supported_qpts =
 151                 dv_attr.striding_rq_caps.supported_qpts;
 152 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 153         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 154 #endif
 155
 156         return err;
 157 }
 158
 159 /**
 160  * Verbs callback to allocate a memory. This function should allocate the space
 161  * according to the size provided residing inside a huge page.
 162  * Please note that all allocation must respect the alignment from libmlx5
 163  * (i.e. currently rte_mem_page_size()).
 164  *
 165  * @param[in] size
 166  *   The size in bytes of the memory to allocate.
 167  * @param[in] data
 168  *   A pointer to the callback data.
 169  *
 170  * @return
 171  *   Allocated buffer, NULL otherwise and rte_errno is set.
 172  */
 173 static void *
 174 mlx5_alloc_verbs_buf(size_t size, void *data)
 175 {
 176         struct mlx5_dev_ctx_shared *sh = data;
 177         void *ret;
 178         size_t alignment = rte_mem_page_size();
 179         if (alignment == (size_t)-1) {
 180                 DRV_LOG(ERR, "Failed to get mem page size");
 181                 rte_errno = ENOMEM;
 182                 return NULL;
 183         }
 184
 185         MLX5_ASSERT(data != NULL);
 186         ret = mlx5_malloc(0, size, alignment, sh->numa_node);
 187         if (!ret && size)
 188                 rte_errno = ENOMEM;
 189         return ret;
 190 }
 191
 192 /**
 193  * Verbs callback to free a memory.
 194  *
 195  * @param[in] ptr
 196  *   A pointer to the memory to free.
 197  * @param[in] data
 198  *   A pointer to the callback data.
 199  */
 200 static void
 201 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 202 {
 203         MLX5_ASSERT(data != NULL);
 204         mlx5_free(ptr);
 205 }
 206
 207 /**
 208  * Initialize DR related data within private structure.
 209  * Routine checks the reference counter and does actual
 210  * resources creation/initialization only if counter is zero.
 211  *
 212  * @param[in] priv
 213  *   Pointer to the private device data structure.
 214  *
 215  * @return
 216  *   Zero on success, positive error code otherwise.
 217  */
 218 static int
 219 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 220 {
 221         struct mlx5_dev_ctx_shared *sh = priv->sh;
 222         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 223         int err;
 224
 225         MLX5_ASSERT(sh && sh->refcnt);
 226         if (sh->refcnt > 1)
 227                 return 0;
 228         err = mlx5_alloc_table_hash_list(priv);
 229         if (err)
 230                 goto error;
 231         /* The resources below are only valid with DV support. */
 232 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 233         /* Init port id action cache list. */
 234         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 235         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 236                              flow_dv_port_id_create_cb,
 237                              flow_dv_port_id_match_cb,
 238                              flow_dv_port_id_remove_cb);
 239         /* Init push vlan action cache list. */
 240         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 241         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 242                              flow_dv_push_vlan_create_cb,
 243                              flow_dv_push_vlan_match_cb,
 244                              flow_dv_push_vlan_remove_cb);
 245         /* Init sample action cache list. */
 246         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 247         mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,
 248                              flow_dv_sample_create_cb,
 249                              flow_dv_sample_match_cb,
 250                              flow_dv_sample_remove_cb);
 251         /* Init dest array action cache list. */
 252         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 253         mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,
 254                              flow_dv_dest_array_create_cb,
 255                              flow_dv_dest_array_match_cb,
 256                              flow_dv_dest_array_remove_cb);
 257         /* Create tags hash list table. */
 258         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 259         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 260                                           MLX5_HLIST_WRITE_MOST,
 261                                           flow_dv_tag_create_cb,
 262                                           flow_dv_tag_match_cb,
 263                                           flow_dv_tag_remove_cb);
 264         if (!sh->tag_table) {
 265                 DRV_LOG(ERR, "tags with hash creation failed.");
 266                 err = ENOMEM;
 267                 goto error;
 268         }
 269         sh->tag_table->ctx = sh;
 270         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 271         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 272                                             0, MLX5_HLIST_WRITE_MOST |
 273                                             MLX5_HLIST_DIRECT_KEY,
 274                                             flow_dv_modify_create_cb,
 275                                             flow_dv_modify_match_cb,
 276                                             flow_dv_modify_remove_cb);
 277         if (!sh->modify_cmds) {
 278                 DRV_LOG(ERR, "hdr modify hash creation failed");
 279                 err = ENOMEM;
 280                 goto error;
 281         }
 282         sh->modify_cmds->ctx = sh;
 283         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 284         sh->encaps_decaps = mlx5_hlist_create(s,
 285                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 286                                               0, MLX5_HLIST_DIRECT_KEY |
 287                                               MLX5_HLIST_WRITE_MOST,
 288                                               flow_dv_encap_decap_create_cb,
 289                                               flow_dv_encap_decap_match_cb,
 290                                               flow_dv_encap_decap_remove_cb);
 291         if (!sh->encaps_decaps) {
 292                 DRV_LOG(ERR, "encap decap hash creation failed");
 293                 err = ENOMEM;
 294                 goto error;
 295         }
 296         sh->encaps_decaps->ctx = sh;
 297 #endif
 298 #ifdef HAVE_MLX5DV_DR
 299         void *domain;
 300
 301         /* Reference counter is zero, we should initialize structures. */
 302         domain = mlx5_glue->dr_create_domain(sh->ctx,
 303                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 304         if (!domain) {
 305                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 306                 err = errno;
 307                 goto error;
 308         }
 309         sh->rx_domain = domain;
 310         domain = mlx5_glue->dr_create_domain(sh->ctx,
 311                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 312         if (!domain) {
 313                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 314                 err = errno;
 315                 goto error;
 316         }
 317         sh->tx_domain = domain;
 318 #ifdef HAVE_MLX5DV_DR_ESWITCH
 319         if (priv->config.dv_esw_en) {
 320                 domain  = mlx5_glue->dr_create_domain
 321                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 322                 if (!domain) {
 323                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 324                         err = errno;
 325                         goto error;
 326                 }
 327                 sh->fdb_domain = domain;
 328         }
 329         /*
 330          * The drop action is just some dummy placeholder in rdma-core. It
 331          * does not belong to domains and has no any attributes, and, can be
 332          * shared by the entire device.
 333          */
 334         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 335         if (!sh->dr_drop_action) {
 336                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 337                 err = errno;
 338                 goto error;
 339         }
 340 #endif
 341         if (!sh->tunnel_hub)
 342                 err = mlx5_alloc_tunnel_hub(sh);
 343         if (err) {
 344                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 345                 goto error;
 346         }
 347         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 348                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 349                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 350                 if (sh->fdb_domain)
 351                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 352         }
 353         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 354 #endif /* HAVE_MLX5DV_DR */
 355         sh->default_miss_action =
 356                         mlx5_glue->dr_create_flow_action_default_miss();
 357         if (!sh->default_miss_action)
 358                 DRV_LOG(WARNING, "Default miss action is not supported.");
 359         return 0;
 360 error:
 361         /* Rollback the created objects. */
 362         if (sh->rx_domain) {
 363                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 364                 sh->rx_domain = NULL;
 365         }
 366         if (sh->tx_domain) {
 367                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 368                 sh->tx_domain = NULL;
 369         }
 370         if (sh->fdb_domain) {
 371                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 372                 sh->fdb_domain = NULL;
 373         }
 374         if (sh->dr_drop_action) {
 375                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 376                 sh->dr_drop_action = NULL;
 377         }
 378         if (sh->pop_vlan_action) {
 379                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 380                 sh->pop_vlan_action = NULL;
 381         }
 382         if (sh->encaps_decaps) {
 383                 mlx5_hlist_destroy(sh->encaps_decaps);
 384                 sh->encaps_decaps = NULL;
 385         }
 386         if (sh->modify_cmds) {
 387                 mlx5_hlist_destroy(sh->modify_cmds);
 388                 sh->modify_cmds = NULL;
 389         }
 390         if (sh->tag_table) {
 391                 /* tags should be destroyed with flow before. */
 392                 mlx5_hlist_destroy(sh->tag_table);
 393                 sh->tag_table = NULL;
 394         }
 395         if (sh->tunnel_hub) {
 396                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 397                 sh->tunnel_hub = NULL;
 398         }
 399         mlx5_free_table_hash_list(priv);
 400         return err;
 401 }
 402
 403 /**
 404  * Destroy DR related data within private structure.
 405  *
 406  * @param[in] priv
 407  *   Pointer to the private device data structure.
 408  */
 409 void
 410 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 411 {
 412         struct mlx5_dev_ctx_shared *sh = priv->sh;
 413
 414         MLX5_ASSERT(sh && sh->refcnt);
 415         if (sh->refcnt > 1)
 416                 return;
 417 #ifdef HAVE_MLX5DV_DR
 418         if (sh->rx_domain) {
 419                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 420                 sh->rx_domain = NULL;
 421         }
 422         if (sh->tx_domain) {
 423                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 424                 sh->tx_domain = NULL;
 425         }
 426 #ifdef HAVE_MLX5DV_DR_ESWITCH
 427         if (sh->fdb_domain) {
 428                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 429                 sh->fdb_domain = NULL;
 430         }
 431         if (sh->dr_drop_action) {
 432                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 433                 sh->dr_drop_action = NULL;
 434         }
 435 #endif
 436         if (sh->pop_vlan_action) {
 437                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 438                 sh->pop_vlan_action = NULL;
 439         }
 440 #endif /* HAVE_MLX5DV_DR */
 441         if (sh->default_miss_action)
 442                 mlx5_glue->destroy_flow_action
 443                                 (sh->default_miss_action);
 444         if (sh->encaps_decaps) {
 445                 mlx5_hlist_destroy(sh->encaps_decaps);
 446                 sh->encaps_decaps = NULL;
 447         }
 448         if (sh->modify_cmds) {
 449                 mlx5_hlist_destroy(sh->modify_cmds);
 450                 sh->modify_cmds = NULL;
 451         }
 452         if (sh->tag_table) {
 453                 /* tags should be destroyed with flow before. */
 454                 mlx5_hlist_destroy(sh->tag_table);
 455                 sh->tag_table = NULL;
 456         }
 457         if (sh->tunnel_hub) {
 458                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 459                 sh->tunnel_hub = NULL;
 460         }
 461         mlx5_cache_list_destroy(&sh->port_id_action_list);
 462         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 463         mlx5_free_table_hash_list(priv);
 464 }
 465
 466 /**
 467  * Initialize shared data between primary and secondary process.
 468  *
 469  * A memzone is reserved by primary process and secondary processes attach to
 470  * the memzone.
 471  *
 472  * @return
 473  *   0 on success, a negative errno value otherwise and rte_errno is set.
 474  */
 475 static int
 476 mlx5_init_shared_data(void)
 477 {
 478         const struct rte_memzone *mz;
 479         int ret = 0;
 480
 481         rte_spinlock_lock(&mlx5_shared_data_lock);
 482         if (mlx5_shared_data == NULL) {
 483                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 484                         /* Allocate shared memory. */
 485                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 486                                                  sizeof(*mlx5_shared_data),
 487                                                  SOCKET_ID_ANY, 0);
 488                         if (mz == NULL) {
 489                                 DRV_LOG(ERR,
 490                                         "Cannot allocate mlx5 shared data");
 491                                 ret = -rte_errno;
 492                                 goto error;
 493                         }
 494                         mlx5_shared_data = mz->addr;
 495                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 496                         rte_spinlock_init(&mlx5_shared_data->lock);
 497                 } else {
 498                         /* Lookup allocated shared memory. */
 499                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 500                         if (mz == NULL) {
 501                                 DRV_LOG(ERR,
 502                                         "Cannot attach mlx5 shared data");
 503                                 ret = -rte_errno;
 504                                 goto error;
 505                         }
 506                         mlx5_shared_data = mz->addr;
 507                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 508                 }
 509         }
 510 error:
 511         rte_spinlock_unlock(&mlx5_shared_data_lock);
 512         return ret;
 513 }
 514
 515 /**
 516  * PMD global initialization.
 517  *
 518  * Independent from individual device, this function initializes global
 519  * per-PMD data structures distinguishing primary and secondary processes.
 520  * Hence, each initialization is called once per a process.
 521  *
 522  * @return
 523  *   0 on success, a negative errno value otherwise and rte_errno is set.
 524  */
 525 static int
 526 mlx5_init_once(void)
 527 {
 528         struct mlx5_shared_data *sd;
 529         struct mlx5_local_data *ld = &mlx5_local_data;
 530         int ret = 0;
 531
 532         if (mlx5_init_shared_data())
 533                 return -rte_errno;
 534         sd = mlx5_shared_data;
 535         MLX5_ASSERT(sd);
 536         rte_spinlock_lock(&sd->lock);
 537         switch (rte_eal_process_type()) {
 538         case RTE_PROC_PRIMARY:
 539                 if (sd->init_done)
 540                         break;
 541                 LIST_INIT(&sd->mem_event_cb_list);
 542                 rte_rwlock_init(&sd->mem_event_rwlock);
 543                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 544                                                 mlx5_mr_mem_event_cb, NULL);
 545                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 546                                            mlx5_mp_os_primary_handle);
 547                 if (ret)
 548                         goto out;
 549                 sd->init_done = true;
 550                 break;
 551         case RTE_PROC_SECONDARY:
 552                 if (ld->init_done)
 553                         break;
 554                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 555                                              mlx5_mp_os_secondary_handle);
 556                 if (ret)
 557                         goto out;
 558                 ++sd->secondary_cnt;
 559                 ld->init_done = true;
 560                 break;
 561         default:
 562                 break;
 563         }
 564 out:
 565         rte_spinlock_unlock(&sd->lock);
 566         return ret;
 567 }
 568
 569 /**
 570  * Create the Tx queue DevX/Verbs object.
 571  *
 572  * @param dev
 573  *   Pointer to Ethernet device.
 574  * @param idx
 575  *   Queue index in DPDK Tx queue array.
 576  *
 577  * @return
 578  *   0 on success, a negative errno value otherwise and rte_errno is set.
 579  */
 580 static int
 581 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 582 {
 583         struct mlx5_priv *priv = dev->data->dev_private;
 584         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 585         struct mlx5_txq_ctrl *txq_ctrl =
 586                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 587
 588         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 589                 return mlx5_txq_devx_obj_new(dev, idx);
 590 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 591         if (!priv->config.dv_esw_en)
 592                 return mlx5_txq_devx_obj_new(dev, idx);
 593 #endif
 594         return mlx5_txq_ibv_obj_new(dev, idx);
 595 }
 596
 597 /**
 598  * Release an Tx DevX/verbs queue object.
 599  *
 600  * @param txq_obj
 601  *   DevX/Verbs Tx queue object.
 602  */
 603 static void
 604 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 605 {
 606         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 607                 mlx5_txq_devx_obj_release(txq_obj);
 608                 return;
 609         }
 610 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 611         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 612                 mlx5_txq_devx_obj_release(txq_obj);
 613                 return;
 614         }
 615 #endif
 616         mlx5_txq_ibv_obj_release(txq_obj);
 617 }
 618
 619 /**
 620  * DV flow counter mode detect and config.
 621  *
 622  * @param dev
 623  *   Pointer to rte_eth_dev structure.
 624  *
 625  */
 626 static void
 627 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 628 {
 629 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 630         struct mlx5_priv *priv = dev->data->dev_private;
 631         struct mlx5_dev_ctx_shared *sh = priv->sh;
 632         bool fallback;
 633
 634 #ifndef HAVE_IBV_DEVX_ASYNC
 635         fallback = true;
 636 #else
 637         fallback = false;
 638         if (!priv->config.devx || !priv->config.dv_flow_en ||
 639             !priv->config.hca_attr.flow_counters_dump ||
 640             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 641             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 642                 fallback = true;
 643 #endif
 644         if (fallback)
 645                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 646                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 647                         priv->config.hca_attr.flow_counters_dump,
 648                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 649         /* Initialize fallback mode only on the port initializes sh. */
 650         if (sh->refcnt == 1)
 651                 sh->cmng.counter_fallback = fallback;
 652         else if (fallback != sh->cmng.counter_fallback)
 653                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 654                         "with others:%d.", PORT_ID(priv), fallback);
 655 #endif
 656 }
 657
 658 static void
 659 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 660 {
 661         struct mlx5_priv *priv = dev->data->dev_private;
 662         void *ctx = priv->sh->ctx;
 663
 664         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 665         if (!priv->q_counters) {
 666                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 667                 struct ibv_wq *wq;
 668
 669                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 670                         "by DevX - fall-back to use the kernel driver global "
 671                         "queue counter.", dev->data->port_id);
 672                 /* Create WQ by kernel and query its queue counter ID. */
 673                 if (cq) {
 674                         wq = mlx5_glue->create_wq(ctx,
 675                                                   &(struct ibv_wq_init_attr){
 676                                                     .wq_type = IBV_WQT_RQ,
 677                                                     .max_wr = 1,
 678                                                     .max_sge = 1,
 679                                                     .pd = priv->sh->pd,
 680                                                     .cq = cq,
 681                                                 });
 682                         if (wq) {
 683                                 /* Counter is assigned only on RDY state. */
 684                                 int ret = mlx5_glue->modify_wq(wq,
 685                                                  &(struct ibv_wq_attr){
 686                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 687                                                  .wq_state = IBV_WQS_RDY,
 688                                                 });
 689
 690                                 if (ret == 0)
 691                                         mlx5_devx_cmd_wq_query(wq,
 692                                                          &priv->counter_set_id);
 693                                 claim_zero(mlx5_glue->destroy_wq(wq));
 694                         }
 695                         claim_zero(mlx5_glue->destroy_cq(cq));
 696                 }
 697         } else {
 698                 priv->counter_set_id = priv->q_counters->id;
 699         }
 700         if (priv->counter_set_id == 0)
 701                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 702                         "available.", dev->data->port_id);
 703 }
 704
 705 /**
 706  * Check if representor spawn info match devargs.
 707  *
 708  * @param spawn
 709  *   Verbs device parameters (name, port, switch_info) to spawn.
 710  * @param eth_da
 711  *   Device devargs to probe.
 712  *
 713  * @return
 714  *   Match result.
 715  */
 716 static bool
 717 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 718                        struct rte_eth_devargs *eth_da)
 719 {
 720         struct mlx5_switch_info *switch_info = &spawn->info;
 721         unsigned int p, f;
 722         uint16_t id;
 723         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 724                                                       eth_da->type);
 725
 726         switch (eth_da->type) {
 727         case RTE_ETH_REPRESENTOR_SF:
 728                 if (!(spawn->info.port_name == -1 &&
 729                       switch_info->name_type ==
 730                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 731                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 732                         rte_errno = EBUSY;
 733                         return false;
 734                 }
 735                 break;
 736         case RTE_ETH_REPRESENTOR_VF:
 737                 /* Allows HPF representor index -1 as exception. */
 738                 if (!(spawn->info.port_name == -1 &&
 739                       switch_info->name_type ==
 740                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 741                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 742                         rte_errno = EBUSY;
 743                         return false;
 744                 }
 745                 break;
 746         case RTE_ETH_REPRESENTOR_NONE:
 747                 rte_errno = EBUSY;
 748                 return false;
 749         default:
 750                 rte_errno = ENOTSUP;
 751                 DRV_LOG(ERR, "unsupported representor type");
 752                 return false;
 753         }
 754         /* Check representor ID: */
 755         for (p = 0; p < eth_da->nb_ports; ++p) {
 756                 if (spawn->pf_bond < 0) {
 757                         /* For non-LAG mode, allow and ignore pf. */
 758                         switch_info->pf_num = eth_da->ports[p];
 759                         repr_id = mlx5_representor_id_encode(switch_info,
 760                                                              eth_da->type);
 761                 }
 762                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 763                         id = MLX5_REPRESENTOR_ID
 764                                 (eth_da->ports[p], eth_da->type,
 765                                  eth_da->representor_ports[f]);
 766                         if (repr_id == id)
 767                                 return true;
 768                 }
 769         }
 770         rte_errno = EBUSY;
 771         return false;
 772 }
 773
 774
 775 /**
 776  * Spawn an Ethernet device from Verbs information.
 777  *
 778  * @param dpdk_dev
 779  *   Backing DPDK device.
 780  * @param spawn
 781  *   Verbs device parameters (name, port, switch_info) to spawn.
 782  * @param config
 783  *   Device configuration parameters.
 784  * @param config
 785  *   Device arguments.
 786  *
 787  * @return
 788  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 789  *   is set. The following errors are defined:
 790  *
 791  *   EBUSY: device is not supposed to be spawned.
 792  *   EEXIST: device is already spawned
 793  */
 794 static struct rte_eth_dev *
 795 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 796                struct mlx5_dev_spawn_data *spawn,
 797                struct mlx5_dev_config *config,
 798                struct rte_eth_devargs *eth_da)
 799 {
 800         const struct mlx5_switch_info *switch_info = &spawn->info;
 801         struct mlx5_dev_ctx_shared *sh = NULL;
 802         struct ibv_port_attr port_attr;
 803         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 804         struct rte_eth_dev *eth_dev = NULL;
 805         struct mlx5_priv *priv = NULL;
 806         int err = 0;
 807         unsigned int hw_padding = 0;
 808         unsigned int mps;
 809         unsigned int tunnel_en = 0;
 810         unsigned int mpls_en = 0;
 811         unsigned int swp = 0;
 812         unsigned int mprq = 0;
 813         unsigned int mprq_min_stride_size_n = 0;
 814         unsigned int mprq_max_stride_size_n = 0;
 815         unsigned int mprq_min_stride_num_n = 0;
 816         unsigned int mprq_max_stride_num_n = 0;
 817         struct rte_ether_addr mac;
 818         char name[RTE_ETH_NAME_MAX_LEN];
 819         int own_domain_id = 0;
 820         uint16_t port_id;
 821 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 822         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 823 #endif
 824
 825         /* Determine if this port representor is supposed to be spawned. */
 826         if (switch_info->representor && dpdk_dev->devargs &&
 827             !mlx5_representor_match(spawn, eth_da))
 828                 return NULL;
 829         /* Build device name. */
 830         if (spawn->pf_bond < 0) {
 831                 /* Single device. */
 832                 if (!switch_info->representor)
 833                         strlcpy(name, dpdk_dev->name, sizeof(name));
 834                 else
 835                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 836                                  dpdk_dev->name,
 837                                  switch_info->name_type ==
 838                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 839                                  switch_info->port_name);
 840         } else {
 841                 /* Bonding device. */
 842                 if (!switch_info->representor) {
 843                         err = snprintf(name, sizeof(name), "%s_%s",
 844                                  dpdk_dev->name,
 845                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 846                 } else {
 847                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 848                                 dpdk_dev->name,
 849                                 mlx5_os_get_dev_device_name(spawn->phys_dev),
 850                                 switch_info->ctrl_num,
 851                                 switch_info->pf_num,
 852                                 switch_info->name_type ==
 853                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 854                                 switch_info->port_name);
 855                 }
 856         }
 857         if (err >= (int)sizeof(name))
 858                 DRV_LOG(WARNING, "device name overflow %s", name);
 859         /* check if the device is already spawned */
 860         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 861                 rte_errno = EEXIST;
 862                 return NULL;
 863         }
 864         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 865         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 866                 struct mlx5_mp_id mp_id;
 867
 868                 eth_dev = rte_eth_dev_attach_secondary(name);
 869                 if (eth_dev == NULL) {
 870                         DRV_LOG(ERR, "can not attach rte ethdev");
 871                         rte_errno = ENOMEM;
 872                         return NULL;
 873                 }
 874                 eth_dev->device = dpdk_dev;
 875                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 876                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 877                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 878                 err = mlx5_proc_priv_init(eth_dev);
 879                 if (err)
 880                         return NULL;
 881                 mp_id.port_id = eth_dev->data->port_id;
 882                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 883                 /* Receive command fd from primary process */
 884                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 885                 if (err < 0)
 886                         goto err_secondary;
 887                 /* Remap UAR for Tx queues. */
 888                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 889                 if (err)
 890                         goto err_secondary;
 891                 /*
 892                  * Ethdev pointer is still required as input since
 893                  * the primary device is not accessible from the
 894                  * secondary process.
 895                  */
 896                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 897                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 898                 return eth_dev;
 899 err_secondary:
 900                 mlx5_dev_close(eth_dev);
 901                 return NULL;
 902         }
 903         /*
 904          * Some parameters ("tx_db_nc" in particularly) are needed in
 905          * advance to create dv/verbs device context. We proceed the
 906          * devargs here to get ones, and later proceed devargs again
 907          * to override some hardware settings.
 908          */
 909         err = mlx5_args(config, dpdk_dev->devargs);
 910         if (err) {
 911                 err = rte_errno;
 912                 DRV_LOG(ERR, "failed to process device arguments: %s",
 913                         strerror(rte_errno));
 914                 goto error;
 915         }
 916         if (config->dv_miss_info) {
 917                 if (switch_info->master || switch_info->representor)
 918                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 919         }
 920         mlx5_malloc_mem_select(config->sys_mem_en);
 921         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 922         if (!sh)
 923                 return NULL;
 924         config->devx = sh->devx;
 925 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 926         config->dest_tir = 1;
 927 #endif
 928 #ifdef HAVE_IBV_MLX5_MOD_SWP
 929         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 930 #endif
 931         /*
 932          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 933          * as all ConnectX-5 devices.
 934          */
 935 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 936         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 937 #endif
 938 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 939         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 940 #endif
 941         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 942         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 943                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 944                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 945                         mps = MLX5_MPW_ENHANCED;
 946                 } else {
 947                         DRV_LOG(DEBUG, "MPW is supported");
 948                         mps = MLX5_MPW;
 949                 }
 950         } else {
 951                 DRV_LOG(DEBUG, "MPW isn't supported");
 952                 mps = MLX5_MPW_DISABLED;
 953         }
 954 #ifdef HAVE_IBV_MLX5_MOD_SWP
 955         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 956                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 957         DRV_LOG(DEBUG, "SWP support: %u", swp);
 958 #endif
 959         config->swp = !!swp;
 960 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 961         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 962                 struct mlx5dv_striding_rq_caps mprq_caps =
 963                         dv_attr.striding_rq_caps;
 964
 965                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 966                         mprq_caps.min_single_stride_log_num_of_bytes);
 967                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 968                         mprq_caps.max_single_stride_log_num_of_bytes);
 969                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 970                         mprq_caps.min_single_wqe_log_num_of_strides);
 971                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 972                         mprq_caps.max_single_wqe_log_num_of_strides);
 973                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 974                         mprq_caps.supported_qpts);
 975                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 976                 mprq = 1;
 977                 mprq_min_stride_size_n =
 978                         mprq_caps.min_single_stride_log_num_of_bytes;
 979                 mprq_max_stride_size_n =
 980                         mprq_caps.max_single_stride_log_num_of_bytes;
 981                 mprq_min_stride_num_n =
 982                         mprq_caps.min_single_wqe_log_num_of_strides;
 983                 mprq_max_stride_num_n =
 984                         mprq_caps.max_single_wqe_log_num_of_strides;
 985         }
 986 #endif
 987         /* Rx CQE compression is enabled by default. */
 988         config->cqe_comp = 1;
 989 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 990         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 991                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 992                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 993                              (dv_attr.tunnel_offloads_caps &
 994                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 995                              (dv_attr.tunnel_offloads_caps &
 996                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 997         }
 998         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 999                 tunnel_en ? "" : "not ");
1000 #else
1001         DRV_LOG(WARNING,
1002                 "tunnel offloading disabled due to old OFED/rdma-core version");
1003 #endif
1004         config->tunnel_en = tunnel_en;
1005 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1006         mpls_en = ((dv_attr.tunnel_offloads_caps &
1007                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1008                    (dv_attr.tunnel_offloads_caps &
1009                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1010         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1011                 mpls_en ? "" : "not ");
1012 #else
1013         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1014                 " old OFED/rdma-core version or firmware configuration");
1015 #endif
1016         config->mpls_en = mpls_en;
1017         /* Check port status. */
1018         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
1019         if (err) {
1020                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1021                 goto error;
1022         }
1023         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1024                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1025                 err = EINVAL;
1026                 goto error;
1027         }
1028         if (port_attr.state != IBV_PORT_ACTIVE)
1029                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1030                         mlx5_glue->port_state_str(port_attr.state),
1031                         port_attr.state);
1032         /* Allocate private eth device data. */
1033         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1034                            sizeof(*priv),
1035                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1036         if (priv == NULL) {
1037                 DRV_LOG(ERR, "priv allocation failure");
1038                 err = ENOMEM;
1039                 goto error;
1040         }
1041         priv->sh = sh;
1042         priv->dev_port = spawn->phys_port;
1043         priv->pci_dev = spawn->pci_dev;
1044         priv->mtu = RTE_ETHER_MTU;
1045         /* Some internal functions rely on Netlink sockets, open them now. */
1046         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1047         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1048         priv->representor = !!switch_info->representor;
1049         priv->master = !!switch_info->master;
1050         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1051         priv->vport_meta_tag = 0;
1052         priv->vport_meta_mask = 0;
1053         priv->pf_bond = spawn->pf_bond;
1054 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1055         /*
1056          * The DevX port query API is implemented. E-Switch may use
1057          * either vport or reg_c[0] metadata register to match on
1058          * vport index. The engaged part of metadata register is
1059          * defined by mask.
1060          */
1061         if (switch_info->representor || switch_info->master) {
1062                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1063                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1064                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
1065                                                  &devx_port);
1066                 if (err) {
1067                         DRV_LOG(WARNING,
1068                                 "can't query devx port %d on device %s",
1069                                 spawn->phys_port,
1070                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
1071                         devx_port.comp_mask = 0;
1072                 }
1073         }
1074         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1075                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1076                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1077                 if (!priv->vport_meta_mask) {
1078                         DRV_LOG(ERR, "vport zero mask for port %d"
1079                                      " on bonding device %s",
1080                                      spawn->phys_port,
1081                                      mlx5_os_get_dev_device_name
1082                                                         (spawn->phys_dev));
1083                         err = ENOTSUP;
1084                         goto error;
1085                 }
1086                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1087                         DRV_LOG(ERR, "invalid vport tag for port %d"
1088                                      " on bonding device %s",
1089                                      spawn->phys_port,
1090                                      mlx5_os_get_dev_device_name
1091                                                         (spawn->phys_dev));
1092                         err = ENOTSUP;
1093                         goto error;
1094                 }
1095         }
1096         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1097                 priv->vport_id = devx_port.vport_num;
1098         } else if (spawn->pf_bond >= 0) {
1099                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1100                              " on bonding device %s",
1101                              spawn->phys_port,
1102                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1103                 err = ENOTSUP;
1104                 goto error;
1105         } else {
1106                 /* Suppose vport index in compatible way. */
1107                 priv->vport_id = switch_info->representor ?
1108                                  switch_info->port_name + 1 : -1;
1109         }
1110 #else
1111         /*
1112          * Kernel/rdma_core support single E-Switch per PF configurations
1113          * only and vport_id field contains the vport index for
1114          * associated VF, which is deduced from representor port name.
1115          * For example, let's have the IB device port 10, it has
1116          * attached network device eth0, which has port name attribute
1117          * pf0vf2, we can deduce the VF number as 2, and set vport index
1118          * as 3 (2+1). This assigning schema should be changed if the
1119          * multiple E-Switch instances per PF configurations or/and PCI
1120          * subfunctions are added.
1121          */
1122         priv->vport_id = switch_info->representor ?
1123                          switch_info->port_name + 1 : -1;
1124 #endif
1125         priv->representor_id = mlx5_representor_id_encode(switch_info,
1126                                                           eth_da->type);
1127         /*
1128          * Look for sibling devices in order to reuse their switch domain
1129          * if any, otherwise allocate one.
1130          */
1131         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1132                 const struct mlx5_priv *opriv =
1133                         rte_eth_devices[port_id].data->dev_private;
1134
1135                 if (!opriv ||
1136                     opriv->sh != priv->sh ||
1137                         opriv->domain_id ==
1138                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1139                         continue;
1140                 priv->domain_id = opriv->domain_id;
1141                 break;
1142         }
1143         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1144                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1145                 if (err) {
1146                         err = rte_errno;
1147                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1148                                 strerror(rte_errno));
1149                         goto error;
1150                 }
1151                 own_domain_id = 1;
1152         }
1153         /* Override some values set by hardware configuration. */
1154         mlx5_args(config, dpdk_dev->devargs);
1155         err = mlx5_dev_check_sibling_config(priv, config);
1156         if (err)
1157                 goto error;
1158         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1159                             IBV_DEVICE_RAW_IP_CSUM);
1160         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1161                 (config->hw_csum ? "" : "not "));
1162 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1163         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1164         DRV_LOG(DEBUG, "counters are not supported");
1165 #endif
1166 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1167         if (config->dv_flow_en) {
1168                 DRV_LOG(WARNING, "DV flow is not supported");
1169                 config->dv_flow_en = 0;
1170         }
1171 #endif
1172         config->ind_table_max_size =
1173                 sh->device_attr.max_rwq_indirection_table_size;
1174         /*
1175          * Remove this check once DPDK supports larger/variable
1176          * indirection tables.
1177          */
1178         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1179                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1180         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1181                 config->ind_table_max_size);
1182         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1183                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1184         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1185                 (config->hw_vlan_strip ? "" : "not "));
1186         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1187                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1188 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1189         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1190 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1191         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1192                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1193 #endif
1194         if (config->hw_padding && !hw_padding) {
1195                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1196                 config->hw_padding = 0;
1197         } else if (config->hw_padding) {
1198                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1199         }
1200         config->tso = (sh->device_attr.max_tso > 0 &&
1201                       (sh->device_attr.tso_supported_qpts &
1202                        (1 << IBV_QPT_RAW_PACKET)));
1203         if (config->tso)
1204                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1205         /*
1206          * MPW is disabled by default, while the Enhanced MPW is enabled
1207          * by default.
1208          */
1209         if (config->mps == MLX5_ARG_UNSET)
1210                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1211                                                           MLX5_MPW_DISABLED;
1212         else
1213                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1214         DRV_LOG(INFO, "%sMPS is %s",
1215                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1216                 config->mps == MLX5_MPW ? "legacy " : "",
1217                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1218         if (config->devx) {
1219                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1220                 if (err) {
1221                         err = -err;
1222                         goto error;
1223                 }
1224                 /* Check relax ordering support. */
1225                 if (!haswell_broadwell_cpu) {
1226                         sh->cmng.relaxed_ordering_write =
1227                                 config->hca_attr.relaxed_ordering_write;
1228                         sh->cmng.relaxed_ordering_read =
1229                                 config->hca_attr.relaxed_ordering_read;
1230                 } else {
1231                         sh->cmng.relaxed_ordering_read = 0;
1232                         sh->cmng.relaxed_ordering_write = 0;
1233                 }
1234                 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1235                 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1236                 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1237                 /* Check for LRO support. */
1238                 if (config->dest_tir && config->hca_attr.lro_cap &&
1239                     config->dv_flow_en) {
1240                         /* TBD check tunnel lro caps. */
1241                         config->lro.supported = config->hca_attr.lro_cap;
1242                         DRV_LOG(DEBUG, "Device supports LRO");
1243                         /*
1244                          * If LRO timeout is not configured by application,
1245                          * use the minimal supported value.
1246                          */
1247                         if (!config->lro.timeout)
1248                                 config->lro.timeout =
1249                                 config->hca_attr.lro_timer_supported_periods[0];
1250                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1251                                 config->lro.timeout);
1252                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1253                                 "required for coalescing is %d bytes",
1254                                 config->hca_attr.lro_min_mss_size);
1255                 }
1256 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1257                 if (config->hca_attr.qos.sup &&
1258                     config->hca_attr.qos.flow_meter_old &&
1259                     config->dv_flow_en) {
1260                         uint8_t reg_c_mask =
1261                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1262                         /*
1263                          * Meter needs two REG_C's for color match and pre-sfx
1264                          * flow match. Here get the REG_C for color match.
1265                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1266                          */
1267                         reg_c_mask &= 0xfc;
1268                         if (__builtin_popcount(reg_c_mask) < 1) {
1269                                 priv->mtr_en = 0;
1270                                 DRV_LOG(WARNING, "No available register for"
1271                                         " meter.");
1272                         } else {
1273                                 /*
1274                                  * The meter color register is used by the
1275                                  * flow-hit feature as well.
1276                                  * The flow-hit feature must use REG_C_3
1277                                  * Prefer REG_C_3 if it is available.
1278                                  */
1279                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1280                                         priv->mtr_color_reg = REG_C_3;
1281                                 else
1282                                         priv->mtr_color_reg = ffs(reg_c_mask)
1283                                                               - 1 + REG_C_0;
1284                                 priv->mtr_en = 1;
1285                                 priv->mtr_reg_share =
1286                                       config->hca_attr.qos.flow_meter;
1287                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1288                                         priv->mtr_color_reg);
1289                         }
1290                 }
1291 #endif
1292 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1293                 if (config->hca_attr.flow_hit_aso &&
1294                     priv->mtr_color_reg == REG_C_3) {
1295                         sh->flow_hit_aso_en = 1;
1296                         err = mlx5_flow_aso_age_mng_init(sh);
1297                         if (err) {
1298                                 err = -err;
1299                                 goto error;
1300                         }
1301                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1302                 }
1303 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1304 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1305                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1306                     config->dv_flow_en) {
1307                         priv->sampler_en = 1;
1308                         DRV_LOG(DEBUG, "Sampler enabled!");
1309                 } else {
1310                         priv->sampler_en = 0;
1311                         if (!config->hca_attr.log_max_ft_sampler_num)
1312                                 DRV_LOG(WARNING,
1313                                         "No available register for sampler.");
1314                         else
1315                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1316                 }
1317 #endif
1318         }
1319         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1320             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1321                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1322                 config->cqe_comp = 0;
1323         }
1324         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1325             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1326                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1327                                  " format isn't supported.");
1328                 config->cqe_comp = 0;
1329         }
1330         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1331             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1332                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1333                                  " format isn't supported.");
1334                 config->cqe_comp = 0;
1335         }
1336         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1337                         config->cqe_comp ? "" : "not ");
1338         if (config->tx_pp) {
1339                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1340                         config->hca_attr.dev_freq_khz);
1341                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1342                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1343                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1344                         config->hca_attr.cross_channel ? "" : "not ");
1345                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1346                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1347                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1348                         config->hca_attr.non_wire_sq ? "" : "not ");
1349                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1350                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1351                         config->hca_attr.log_max_static_sq_wq);
1352                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1353                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1354                 if (!config->devx) {
1355                         DRV_LOG(ERR, "DevX is required for packet pacing");
1356                         err = ENODEV;
1357                         goto error;
1358                 }
1359                 if (!config->hca_attr.qos.packet_pacing) {
1360                         DRV_LOG(ERR, "Packet pacing is not supported");
1361                         err = ENODEV;
1362                         goto error;
1363                 }
1364                 if (!config->hca_attr.cross_channel) {
1365                         DRV_LOG(ERR, "Cross channel operations are"
1366                                      " required for packet pacing");
1367                         err = ENODEV;
1368                         goto error;
1369                 }
1370                 if (!config->hca_attr.wqe_index_ignore) {
1371                         DRV_LOG(ERR, "WQE index ignore feature is"
1372                                      " required for packet pacing");
1373                         err = ENODEV;
1374                         goto error;
1375                 }
1376                 if (!config->hca_attr.non_wire_sq) {
1377                         DRV_LOG(ERR, "Non-wire SQ feature is"
1378                                      " required for packet pacing");
1379                         err = ENODEV;
1380                         goto error;
1381                 }
1382                 if (!config->hca_attr.log_max_static_sq_wq) {
1383                         DRV_LOG(ERR, "Static WQE SQ feature is"
1384                                      " required for packet pacing");
1385                         err = ENODEV;
1386                         goto error;
1387                 }
1388                 if (!config->hca_attr.qos.wqe_rate_pp) {
1389                         DRV_LOG(ERR, "WQE rate mode is required"
1390                                      " for packet pacing");
1391                         err = ENODEV;
1392                         goto error;
1393                 }
1394 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1395                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1396                              " can't create queues for packet pacing");
1397                 err = ENODEV;
1398                 goto error;
1399 #endif
1400         }
1401         if (config->devx) {
1402                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1403
1404                 err = config->hca_attr.access_register_user ?
1405                         mlx5_devx_cmd_register_read
1406                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1407                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1408                 if (!err) {
1409                         uint32_t ts_mode;
1410
1411                         /* MTUTC register is read successfully. */
1412                         ts_mode = MLX5_GET(register_mtutc, reg,
1413                                            time_stamp_mode);
1414                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1415                                 config->rt_timestamp = 1;
1416                 } else {
1417                         /* Kernel does not support register reading. */
1418                         if (config->hca_attr.dev_freq_khz ==
1419                                                  (NS_PER_S / MS_PER_S))
1420                                 config->rt_timestamp = 1;
1421                 }
1422         }
1423         /*
1424          * If HW has bug working with tunnel packet decapsulation and
1425          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1426          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1427          */
1428         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1429                 config->hw_fcs_strip = 0;
1430         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1431                 (config->hw_fcs_strip ? "" : "not "));
1432         if (config->mprq.enabled && mprq) {
1433                 if (config->mprq.stride_num_n &&
1434                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1435                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1436                         config->mprq.stride_num_n =
1437                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1438                                                 mprq_min_stride_num_n),
1439                                         mprq_max_stride_num_n);
1440                         DRV_LOG(WARNING,
1441                                 "the number of strides"
1442                                 " for Multi-Packet RQ is out of range,"
1443                                 " setting default value (%u)",
1444                                 1 << config->mprq.stride_num_n);
1445                 }
1446                 if (config->mprq.stride_size_n &&
1447                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1448                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1449                         config->mprq.stride_size_n =
1450                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1451                                                 mprq_min_stride_size_n),
1452                                         mprq_max_stride_size_n);
1453                         DRV_LOG(WARNING,
1454                                 "the size of a stride"
1455                                 " for Multi-Packet RQ is out of range,"
1456                                 " setting default value (%u)",
1457                                 1 << config->mprq.stride_size_n);
1458                 }
1459                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1460                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1461         } else if (config->mprq.enabled && !mprq) {
1462                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1463                 config->mprq.enabled = 0;
1464         }
1465         if (config->max_dump_files_num == 0)
1466                 config->max_dump_files_num = 128;
1467         eth_dev = rte_eth_dev_allocate(name);
1468         if (eth_dev == NULL) {
1469                 DRV_LOG(ERR, "can not allocate rte ethdev");
1470                 err = ENOMEM;
1471                 goto error;
1472         }
1473         if (priv->representor) {
1474                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1475                 eth_dev->data->representor_id = priv->representor_id;
1476         }
1477         priv->mp_id.port_id = eth_dev->data->port_id;
1478         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1479         /*
1480          * Store associated network device interface index. This index
1481          * is permanent throughout the lifetime of device. So, we may store
1482          * the ifindex here and use the cached value further.
1483          */
1484         MLX5_ASSERT(spawn->ifindex);
1485         priv->if_index = spawn->ifindex;
1486         eth_dev->data->dev_private = priv;
1487         priv->dev_data = eth_dev->data;
1488         eth_dev->data->mac_addrs = priv->mac;
1489         eth_dev->device = dpdk_dev;
1490         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1491         /* Configure the first MAC address by default. */
1492         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1493                 DRV_LOG(ERR,
1494                         "port %u cannot get MAC address, is mlx5_en"
1495                         " loaded? (errno: %s)",
1496                         eth_dev->data->port_id, strerror(rte_errno));
1497                 err = ENODEV;
1498                 goto error;
1499         }
1500         DRV_LOG(INFO,
1501                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1502                 eth_dev->data->port_id,
1503                 mac.addr_bytes[0], mac.addr_bytes[1],
1504                 mac.addr_bytes[2], mac.addr_bytes[3],
1505                 mac.addr_bytes[4], mac.addr_bytes[5]);
1506 #ifdef RTE_LIBRTE_MLX5_DEBUG
1507         {
1508                 char ifname[MLX5_NAMESIZE];
1509
1510                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1511                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1512                                 eth_dev->data->port_id, ifname);
1513                 else
1514                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1515                                 eth_dev->data->port_id);
1516         }
1517 #endif
1518         /* Get actual MTU if possible. */
1519         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1520         if (err) {
1521                 err = rte_errno;
1522                 goto error;
1523         }
1524         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1525                 priv->mtu);
1526         /* Initialize burst functions to prevent crashes before link-up. */
1527         eth_dev->rx_pkt_burst = removed_rx_burst;
1528         eth_dev->tx_pkt_burst = removed_tx_burst;
1529         eth_dev->dev_ops = &mlx5_dev_ops;
1530         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1531         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1532         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1533         /* Register MAC address. */
1534         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1535         if (config->vf && config->vf_nl_en)
1536                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1537                                       mlx5_ifindex(eth_dev),
1538                                       eth_dev->data->mac_addrs,
1539                                       MLX5_MAX_MAC_ADDRESSES);
1540         priv->flows = 0;
1541         priv->ctrl_flows = 0;
1542         rte_spinlock_init(&priv->flow_list_lock);
1543         TAILQ_INIT(&priv->flow_meters);
1544         TAILQ_INIT(&priv->flow_meter_profiles);
1545         /* Hint libmlx5 to use PMD allocator for data plane resources */
1546         mlx5_glue->dv_set_context_attr(sh->ctx,
1547                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1548                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1549                                 .alloc = &mlx5_alloc_verbs_buf,
1550                                 .free = &mlx5_free_verbs_buf,
1551                                 .data = sh,
1552                         }));
1553         /* Bring Ethernet device up. */
1554         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1555                 eth_dev->data->port_id);
1556         mlx5_set_link_up(eth_dev);
1557         /*
1558          * Even though the interrupt handler is not installed yet,
1559          * interrupts will still trigger on the async_fd from
1560          * Verbs context returned by ibv_open_device().
1561          */
1562         mlx5_link_update(eth_dev, 0);
1563 #ifdef HAVE_MLX5DV_DR_ESWITCH
1564         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1565               (switch_info->representor || switch_info->master)))
1566                 config->dv_esw_en = 0;
1567 #else
1568         config->dv_esw_en = 0;
1569 #endif
1570         /* Detect minimal data bytes to inline. */
1571         mlx5_set_min_inline(spawn, config);
1572         /* Store device configuration on private structure. */
1573         priv->config = *config;
1574         /* Create context for virtual machine VLAN workaround. */
1575         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1576         if (config->dv_flow_en) {
1577                 err = mlx5_alloc_shared_dr(priv);
1578                 if (err)
1579                         goto error;
1580         }
1581         if (config->devx && config->dv_flow_en && config->dest_tir) {
1582                 priv->obj_ops = devx_obj_ops;
1583                 priv->obj_ops.drop_action_create =
1584                                                 ibv_obj_ops.drop_action_create;
1585                 priv->obj_ops.drop_action_destroy =
1586                                                 ibv_obj_ops.drop_action_destroy;
1587 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1588                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1589 #else
1590                 if (config->dv_esw_en)
1591                         priv->obj_ops.txq_obj_modify =
1592                                                 ibv_obj_ops.txq_obj_modify;
1593 #endif
1594                 /* Use specific wrappers for Tx object. */
1595                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1596                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1597                 mlx5_queue_counter_id_prepare(eth_dev);
1598
1599         } else {
1600                 priv->obj_ops = ibv_obj_ops;
1601         }
1602         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1603         if (!priv->drop_queue.hrxq)
1604                 goto error;
1605         /* Supported Verbs flow priority number detection. */
1606         err = mlx5_flow_discover_priorities(eth_dev);
1607         if (err < 0) {
1608                 err = -err;
1609                 goto error;
1610         }
1611         priv->config.flow_prio = err;
1612         if (!priv->config.dv_esw_en &&
1613             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1614                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1615                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1616                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1617         }
1618         mlx5_set_metadata_mask(eth_dev);
1619         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1620             !priv->sh->dv_regc0_mask) {
1621                 DRV_LOG(ERR, "metadata mode %u is not supported "
1622                              "(no metadata reg_c[0] is available)",
1623                              priv->config.dv_xmeta_en);
1624                         err = ENOTSUP;
1625                         goto error;
1626         }
1627         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1628                              mlx5_hrxq_create_cb,
1629                              mlx5_hrxq_match_cb,
1630                              mlx5_hrxq_remove_cb);
1631         /* Query availability of metadata reg_c's. */
1632         err = mlx5_flow_discover_mreg_c(eth_dev);
1633         if (err < 0) {
1634                 err = -err;
1635                 goto error;
1636         }
1637         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1638                 DRV_LOG(DEBUG,
1639                         "port %u extensive metadata register is not supported",
1640                         eth_dev->data->port_id);
1641                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1642                         DRV_LOG(ERR, "metadata mode %u is not supported "
1643                                      "(no metadata registers available)",
1644                                      priv->config.dv_xmeta_en);
1645                         err = ENOTSUP;
1646                         goto error;
1647                 }
1648         }
1649         if (priv->config.dv_flow_en &&
1650             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1651             mlx5_flow_ext_mreg_supported(eth_dev) &&
1652             priv->sh->dv_regc0_mask) {
1653                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1654                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1655                                                       0, 0,
1656                                                       flow_dv_mreg_create_cb,
1657                                                       flow_dv_mreg_match_cb,
1658                                                       flow_dv_mreg_remove_cb);
1659                 if (!priv->mreg_cp_tbl) {
1660                         err = ENOMEM;
1661                         goto error;
1662                 }
1663                 priv->mreg_cp_tbl->ctx = eth_dev;
1664         }
1665         rte_spinlock_init(&priv->shared_act_sl);
1666         mlx5_flow_counter_mode_config(eth_dev);
1667         if (priv->config.dv_flow_en)
1668                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1669         return eth_dev;
1670 error:
1671         if (priv) {
1672                 if (priv->mreg_cp_tbl)
1673                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1674                 if (priv->sh)
1675                         mlx5_os_free_shared_dr(priv);
1676                 if (priv->nl_socket_route >= 0)
1677                         close(priv->nl_socket_route);
1678                 if (priv->nl_socket_rdma >= 0)
1679                         close(priv->nl_socket_rdma);
1680                 if (priv->vmwa_context)
1681                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1682                 if (eth_dev && priv->drop_queue.hrxq)
1683                         mlx5_drop_action_destroy(eth_dev);
1684                 if (own_domain_id)
1685                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1686                 mlx5_cache_list_destroy(&priv->hrxqs);
1687                 mlx5_free(priv);
1688                 if (eth_dev != NULL)
1689                         eth_dev->data->dev_private = NULL;
1690         }
1691         if (eth_dev != NULL) {
1692                 /* mac_addrs must not be freed alone because part of
1693                  * dev_private
1694                  **/
1695                 eth_dev->data->mac_addrs = NULL;
1696                 rte_eth_dev_release_port(eth_dev);
1697         }
1698         if (sh)
1699                 mlx5_free_shared_dev_ctx(sh);
1700         MLX5_ASSERT(err > 0);
1701         rte_errno = err;
1702         return NULL;
1703 }
1704
1705 /**
1706  * Comparison callback to sort device data.
1707  *
1708  * This is meant to be used with qsort().
1709  *
1710  * @param a[in]
1711  *   Pointer to pointer to first data object.
1712  * @param b[in]
1713  *   Pointer to pointer to second data object.
1714  *
1715  * @return
1716  *   0 if both objects are equal, less than 0 if the first argument is less
1717  *   than the second, greater than 0 otherwise.
1718  */
1719 static int
1720 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1721 {
1722         const struct mlx5_switch_info *si_a =
1723                 &((const struct mlx5_dev_spawn_data *)a)->info;
1724         const struct mlx5_switch_info *si_b =
1725                 &((const struct mlx5_dev_spawn_data *)b)->info;
1726         int ret;
1727
1728         /* Master device first. */
1729         ret = si_b->master - si_a->master;
1730         if (ret)
1731                 return ret;
1732         /* Then representor devices. */
1733         ret = si_b->representor - si_a->representor;
1734         if (ret)
1735                 return ret;
1736         /* Unidentified devices come last in no specific order. */
1737         if (!si_a->representor)
1738                 return 0;
1739         /* Order representors by name. */
1740         return si_a->port_name - si_b->port_name;
1741 }
1742
1743 /**
1744  * Match PCI information for possible slaves of bonding device.
1745  *
1746  * @param[in] ibv_dev
1747  *   Pointer to Infiniband device structure.
1748  * @param[in] pci_dev
1749  *   Pointer to primary PCI address structure to match.
1750  * @param[in] nl_rdma
1751  *   Netlink RDMA group socket handle.
1752  * @param[in] owner
1753  *   Rerepsentor owner PF index.
1754  * @param[out] bond_info
1755  *   Pointer to bonding information.
1756  *
1757  * @return
1758  *   negative value if no bonding device found, otherwise
1759  *   positive index of slave PF in bonding.
1760  */
1761 static int
1762 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1763                            const struct rte_pci_addr *pci_dev,
1764                            int nl_rdma, uint16_t owner,
1765                            struct mlx5_bond_info *bond_info)
1766 {
1767         char ifname[IF_NAMESIZE + 1];
1768         unsigned int ifindex;
1769         unsigned int np, i;
1770         FILE *bond_file = NULL, *file;
1771         int pf = -1;
1772         int ret;
1773
1774         /*
1775          * Try to get master device name. If something goes
1776          * wrong suppose the lack of kernel support and no
1777          * bonding devices.
1778          */
1779         memset(bond_info, 0, sizeof(*bond_info));
1780         if (nl_rdma < 0)
1781                 return -1;
1782         if (!strstr(ibv_dev->name, "bond"))
1783                 return -1;
1784         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1785         if (!np)
1786                 return -1;
1787         /*
1788          * The Master device might not be on the predefined
1789          * port (not on port index 1, it is not garanted),
1790          * we have to scan all Infiniband device port and
1791          * find master.
1792          */
1793         for (i = 1; i <= np; ++i) {
1794                 /* Check whether Infiniband port is populated. */
1795                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1796                 if (!ifindex)
1797                         continue;
1798                 if (!if_indextoname(ifindex, ifname))
1799                         continue;
1800                 /* Try to read bonding slave names from sysfs. */
1801                 MKSTR(slaves,
1802                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1803                 bond_file = fopen(slaves, "r");
1804                 if (bond_file)
1805                         break;
1806         }
1807         if (!bond_file)
1808                 return -1;
1809         /* Use safe format to check maximal buffer length. */
1810         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1811         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1812                 char tmp_str[IF_NAMESIZE + 32];
1813                 struct rte_pci_addr pci_addr;
1814                 struct mlx5_switch_info info;
1815
1816                 /* Process slave interface names in the loop. */
1817                 snprintf(tmp_str, sizeof(tmp_str),
1818                          "/sys/class/net/%s", ifname);
1819                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1820                         DRV_LOG(WARNING, "can not get PCI address"
1821                                          " for netdev \"%s\"", ifname);
1822                         continue;
1823                 }
1824                 /* Slave interface PCI address match found. */
1825                 snprintf(tmp_str, sizeof(tmp_str),
1826                          "/sys/class/net/%s/phys_port_name", ifname);
1827                 file = fopen(tmp_str, "rb");
1828                 if (!file)
1829                         break;
1830                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1831                 if (fscanf(file, "%32s", tmp_str) == 1)
1832                         mlx5_translate_port_name(tmp_str, &info);
1833                 fclose(file);
1834                 /* Only process PF ports. */
1835                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1836                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1837                         continue;
1838                 /* Check max bonding member. */
1839                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1840                         DRV_LOG(WARNING, "bonding index out of range, "
1841                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1842                                 tmp_str);
1843                         break;
1844                 }
1845                 /* Match PCI address. */
1846                 if (pci_dev->domain == pci_addr.domain &&
1847                     pci_dev->bus == pci_addr.bus &&
1848                     pci_dev->devid == pci_addr.devid &&
1849                     pci_dev->function + owner == pci_addr.function)
1850                         pf = info.port_name;
1851                 /* Get ifindex. */
1852                 snprintf(tmp_str, sizeof(tmp_str),
1853                          "/sys/class/net/%s/ifindex", ifname);
1854                 file = fopen(tmp_str, "rb");
1855                 if (!file)
1856                         break;
1857                 ret = fscanf(file, "%u", &ifindex);
1858                 fclose(file);
1859                 if (ret != 1)
1860                         break;
1861                 /* Save bonding info. */
1862                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1863                         sizeof(bond_info->ports[0].ifname));
1864                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1865                 bond_info->ports[info.port_name].ifindex = ifindex;
1866                 bond_info->n_port++;
1867         }
1868         if (pf >= 0) {
1869                 /* Get bond interface info */
1870                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1871                                            bond_info->ifname);
1872                 if (ret)
1873                         DRV_LOG(ERR, "unable to get bond info: %s",
1874                                 strerror(rte_errno));
1875                 else
1876                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1877                                 ifindex, bond_info->ifindex, bond_info->ifname);
1878         }
1879         return pf;
1880 }
1881
1882 /**
1883  * Register a PCI device within bonding.
1884  *
1885  * This function spawns Ethernet devices out of a given PCI device and
1886  * bonding owner PF index.
1887  *
1888  * @param[in] pci_dev
1889  *   PCI device information.
1890  * @param[in] req_eth_da
1891  *   Requested ethdev device argument.
1892  * @param[in] owner_id
1893  *   Requested owner PF port ID within bonding device, default to 0.
1894  *
1895  * @return
1896  *   0 on success, a negative errno value otherwise and rte_errno is set.
1897  */
1898 static int
1899 mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
1900                      struct rte_eth_devargs *req_eth_da,
1901                      uint16_t owner_id)
1902 {
1903         struct ibv_device **ibv_list;
1904         /*
1905          * Number of found IB Devices matching with requested PCI BDF.
1906          * nd != 1 means there are multiple IB devices over the same
1907          * PCI device and we have representors and master.
1908          */
1909         unsigned int nd = 0;
1910         /*
1911          * Number of found IB device Ports. nd = 1 and np = 1..n means
1912          * we have the single multiport IB device, and there may be
1913          * representors attached to some of found ports.
1914          */
1915         unsigned int np = 0;
1916         /*
1917          * Number of DPDK ethernet devices to Spawn - either over
1918          * multiple IB devices or multiple ports of single IB device.
1919          * Actually this is the number of iterations to spawn.
1920          */
1921         unsigned int ns = 0;
1922         /*
1923          * Bonding device
1924          *   < 0 - no bonding device (single one)
1925          *  >= 0 - bonding device (value is slave PF index)
1926          */
1927         int bd = -1;
1928         struct mlx5_dev_spawn_data *list = NULL;
1929         struct mlx5_dev_config dev_config;
1930         unsigned int dev_config_vf;
1931         struct rte_eth_devargs eth_da = *req_eth_da;
1932         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
1933         struct mlx5_bond_info bond_info;
1934         int ret = -1;
1935
1936         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1937                 mlx5_pmd_socket_init();
1938         ret = mlx5_init_once();
1939         if (ret) {
1940                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1941                         strerror(rte_errno));
1942                 return -rte_errno;
1943         }
1944         errno = 0;
1945         ibv_list = mlx5_glue->get_device_list(&ret);
1946         if (!ibv_list) {
1947                 rte_errno = errno ? errno : ENOSYS;
1948                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1949                 return -rte_errno;
1950         }
1951         /*
1952          * First scan the list of all Infiniband devices to find
1953          * matching ones, gathering into the list.
1954          */
1955         struct ibv_device *ibv_match[ret + 1];
1956         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1957         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1958         unsigned int i;
1959
1960         while (ret-- > 0) {
1961                 struct rte_pci_addr pci_addr;
1962
1963                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1964                 bd = mlx5_device_bond_pci_match
1965                                 (ibv_list[ret], &owner_pci, nl_rdma, owner_id,
1966                                  &bond_info);
1967                 if (bd >= 0) {
1968                         /*
1969                          * Bonding device detected. Only one match is allowed,
1970                          * the bonding is supported over multi-port IB device,
1971                          * there should be no matches on representor PCI
1972                          * functions or non VF LAG bonding devices with
1973                          * specified address.
1974                          */
1975                         if (nd) {
1976                                 DRV_LOG(ERR,
1977                                         "multiple PCI match on bonding device"
1978                                         "\"%s\" found", ibv_list[ret]->name);
1979                                 rte_errno = ENOENT;
1980                                 ret = -rte_errno;
1981                                 goto exit;
1982                         }
1983                         /* Amend owner pci address if owner PF ID specified. */
1984                         if (eth_da.nb_representor_ports)
1985                                 owner_pci.function += owner_id;
1986                         DRV_LOG(INFO, "PCI information matches for"
1987                                       " slave %d bonding device \"%s\"",
1988                                       bd, ibv_list[ret]->name);
1989                         ibv_match[nd++] = ibv_list[ret];
1990                         break;
1991                 } else {
1992                         /* Bonding device not found. */
1993                         if (mlx5_dev_to_pci_addr
1994                                 (ibv_list[ret]->ibdev_path, &pci_addr))
1995                                 continue;
1996                         if (owner_pci.domain != pci_addr.domain ||
1997                             owner_pci.bus != pci_addr.bus ||
1998                             owner_pci.devid != pci_addr.devid ||
1999                             owner_pci.function != pci_addr.function)
2000                                 continue;
2001                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2002                                 ibv_list[ret]->name);
2003                         ibv_match[nd++] = ibv_list[ret];
2004                 }
2005         }
2006         ibv_match[nd] = NULL;
2007         if (!nd) {
2008                 /* No device matches, just complain and bail out. */
2009                 DRV_LOG(WARNING,
2010                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2011                         " are kernel drivers loaded?",
2012                         owner_pci.domain, owner_pci.bus,
2013                         owner_pci.devid, owner_pci.function);
2014                 rte_errno = ENOENT;
2015                 ret = -rte_errno;
2016                 goto exit;
2017         }
2018         if (nd == 1) {
2019                 /*
2020                  * Found single matching device may have multiple ports.
2021                  * Each port may be representor, we have to check the port
2022                  * number and check the representors existence.
2023                  */
2024                 if (nl_rdma >= 0)
2025                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2026                 if (!np)
2027                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2028                                          " ports number", ibv_match[0]->name);
2029                 if (bd >= 0 && !np) {
2030                         DRV_LOG(ERR, "can not get ports"
2031                                      " for bonding device");
2032                         rte_errno = ENOENT;
2033                         ret = -rte_errno;
2034                         goto exit;
2035                 }
2036         }
2037 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2038         if (bd >= 0) {
2039                 /*
2040                  * This may happen if there is VF LAG kernel support and
2041                  * application is compiled with older rdma_core library.
2042                  */
2043                 DRV_LOG(ERR,
2044                         "No kernel/verbs support for VF LAG bonding found.");
2045                 rte_errno = ENOTSUP;
2046                 ret = -rte_errno;
2047                 goto exit;
2048         }
2049 #endif
2050         /*
2051          * Now we can determine the maximal
2052          * amount of devices to be spawned.
2053          */
2054         list = mlx5_malloc(MLX5_MEM_ZERO,
2055                            sizeof(struct mlx5_dev_spawn_data) *
2056                            (np ? np : nd),
2057                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2058         if (!list) {
2059                 DRV_LOG(ERR, "spawn data array allocation failure");
2060                 rte_errno = ENOMEM;
2061                 ret = -rte_errno;
2062                 goto exit;
2063         }
2064         if (bd >= 0 || np > 1) {
2065                 /*
2066                  * Single IB device with multiple ports found,
2067                  * it may be E-Switch master device and representors.
2068                  * We have to perform identification through the ports.
2069                  */
2070                 MLX5_ASSERT(nl_rdma >= 0);
2071                 MLX5_ASSERT(ns == 0);
2072                 MLX5_ASSERT(nd == 1);
2073                 MLX5_ASSERT(np);
2074                 for (i = 1; i <= np; ++i) {
2075                         list[ns].bond_info = &bond_info;
2076                         list[ns].max_port = np;
2077                         list[ns].phys_port = i;
2078                         list[ns].phys_dev = ibv_match[0];
2079                         list[ns].eth_dev = NULL;
2080                         list[ns].pci_dev = pci_dev;
2081                         list[ns].pf_bond = bd;
2082                         list[ns].ifindex = mlx5_nl_ifindex
2083                                 (nl_rdma,
2084                                 mlx5_os_get_dev_device_name
2085                                                 (list[ns].phys_dev), i);
2086                         if (!list[ns].ifindex) {
2087                                 /*
2088                                  * No network interface index found for the
2089                                  * specified port, it means there is no
2090                                  * representor on this port. It's OK,
2091                                  * there can be disabled ports, for example
2092                                  * if sriov_numvfs < sriov_totalvfs.
2093                                  */
2094                                 continue;
2095                         }
2096                         ret = -1;
2097                         if (nl_route >= 0)
2098                                 ret = mlx5_nl_switch_info
2099                                                (nl_route,
2100                                                 list[ns].ifindex,
2101                                                 &list[ns].info);
2102                         if (ret || (!list[ns].info.representor &&
2103                                     !list[ns].info.master)) {
2104                                 /*
2105                                  * We failed to recognize representors with
2106                                  * Netlink, let's try to perform the task
2107                                  * with sysfs.
2108                                  */
2109                                 ret =  mlx5_sysfs_switch_info
2110                                                 (list[ns].ifindex,
2111                                                  &list[ns].info);
2112                         }
2113 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2114                         if (!ret && bd >= 0) {
2115                                 switch (list[ns].info.name_type) {
2116                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2117                                         if (list[ns].info.port_name == bd)
2118                                                 ns++;
2119                                         break;
2120                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2121                                         /* Fallthrough */
2122                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2123                                         /* Fallthrough */
2124                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2125                                         if (list[ns].info.pf_num == bd)
2126                                                 ns++;
2127                                         break;
2128                                 default:
2129                                         break;
2130                                 }
2131                                 continue;
2132                         }
2133 #endif
2134                         if (!ret && (list[ns].info.representor ^
2135                                      list[ns].info.master))
2136                                 ns++;
2137                 }
2138                 if (!ns) {
2139                         DRV_LOG(ERR,
2140                                 "unable to recognize master/representors"
2141                                 " on the IB device with multiple ports");
2142                         rte_errno = ENOENT;
2143                         ret = -rte_errno;
2144                         goto exit;
2145                 }
2146         } else {
2147                 /*
2148                  * The existence of several matching entries (nd > 1) means
2149                  * port representors have been instantiated. No existing Verbs
2150                  * call nor sysfs entries can tell them apart, this can only
2151                  * be done through Netlink calls assuming kernel drivers are
2152                  * recent enough to support them.
2153                  *
2154                  * In the event of identification failure through Netlink,
2155                  * try again through sysfs, then:
2156                  *
2157                  * 1. A single IB device matches (nd == 1) with single
2158                  *    port (np=0/1) and is not a representor, assume
2159                  *    no switch support.
2160                  *
2161                  * 2. Otherwise no safe assumptions can be made;
2162                  *    complain louder and bail out.
2163                  */
2164                 for (i = 0; i != nd; ++i) {
2165                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2166                         list[ns].bond_info = NULL;
2167                         list[ns].max_port = 1;
2168                         list[ns].phys_port = 1;
2169                         list[ns].phys_dev = ibv_match[i];
2170                         list[ns].eth_dev = NULL;
2171                         list[ns].pci_dev = pci_dev;
2172                         list[ns].pf_bond = -1;
2173                         list[ns].ifindex = 0;
2174                         if (nl_rdma >= 0)
2175                                 list[ns].ifindex = mlx5_nl_ifindex
2176                                 (nl_rdma,
2177                                 mlx5_os_get_dev_device_name
2178                                                 (list[ns].phys_dev), 1);
2179                         if (!list[ns].ifindex) {
2180                                 char ifname[IF_NAMESIZE];
2181
2182                                 /*
2183                                  * Netlink failed, it may happen with old
2184                                  * ib_core kernel driver (before 4.16).
2185                                  * We can assume there is old driver because
2186                                  * here we are processing single ports IB
2187                                  * devices. Let's try sysfs to retrieve
2188                                  * the ifindex. The method works for
2189                                  * master device only.
2190                                  */
2191                                 if (nd > 1) {
2192                                         /*
2193                                          * Multiple devices found, assume
2194                                          * representors, can not distinguish
2195                                          * master/representor and retrieve
2196                                          * ifindex via sysfs.
2197                                          */
2198                                         continue;
2199                                 }
2200                                 ret = mlx5_get_ifname_sysfs
2201                                         (ibv_match[i]->ibdev_path, ifname);
2202                                 if (!ret)
2203                                         list[ns].ifindex =
2204                                                 if_nametoindex(ifname);
2205                                 if (!list[ns].ifindex) {
2206                                         /*
2207                                          * No network interface index found
2208                                          * for the specified device, it means
2209                                          * there it is neither representor
2210                                          * nor master.
2211                                          */
2212                                         continue;
2213                                 }
2214                         }
2215                         ret = -1;
2216                         if (nl_route >= 0)
2217                                 ret = mlx5_nl_switch_info
2218                                                (nl_route,
2219                                                 list[ns].ifindex,
2220                                                 &list[ns].info);
2221                         if (ret || (!list[ns].info.representor &&
2222                                     !list[ns].info.master)) {
2223                                 /*
2224                                  * We failed to recognize representors with
2225                                  * Netlink, let's try to perform the task
2226                                  * with sysfs.
2227                                  */
2228                                 ret =  mlx5_sysfs_switch_info
2229                                                 (list[ns].ifindex,
2230                                                  &list[ns].info);
2231                         }
2232                         if (!ret && (list[ns].info.representor ^
2233                                      list[ns].info.master)) {
2234                                 ns++;
2235                         } else if ((nd == 1) &&
2236                                    !list[ns].info.representor &&
2237                                    !list[ns].info.master) {
2238                                 /*
2239                                  * Single IB device with
2240                                  * one physical port and
2241                                  * attached network device.
2242                                  * May be SRIOV is not enabled
2243                                  * or there is no representors.
2244                                  */
2245                                 DRV_LOG(INFO, "no E-Switch support detected");
2246                                 ns++;
2247                                 break;
2248                         }
2249                 }
2250                 if (!ns) {
2251                         DRV_LOG(ERR,
2252                                 "unable to recognize master/representors"
2253                                 " on the multiple IB devices");
2254                         rte_errno = ENOENT;
2255                         ret = -rte_errno;
2256                         goto exit;
2257                 }
2258         }
2259         MLX5_ASSERT(ns);
2260         /*
2261          * Sort list to probe devices in natural order for users convenience
2262          * (i.e. master first, then representors from lowest to highest ID).
2263          */
2264         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2265         /* Device specific configuration. */
2266         switch (pci_dev->id.device_id) {
2267         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2268         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2269         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2270         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2271         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2272         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2273         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2274                 dev_config_vf = 1;
2275                 break;
2276         default:
2277                 dev_config_vf = 0;
2278                 break;
2279         }
2280         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2281                 /* Set devargs default values. */
2282                 if (eth_da.nb_mh_controllers == 0) {
2283                         eth_da.nb_mh_controllers = 1;
2284                         eth_da.mh_controllers[0] = 0;
2285                 }
2286                 if (eth_da.nb_ports == 0 && ns > 0) {
2287                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2288                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2289                                         pci_dev->device.devargs->args);
2290                         eth_da.nb_ports = 1;
2291                         eth_da.ports[0] = list[0].info.pf_num;
2292                 }
2293                 if (eth_da.nb_representor_ports == 0) {
2294                         eth_da.nb_representor_ports = 1;
2295                         eth_da.representor_ports[0] = 0;
2296                 }
2297         }
2298         for (i = 0; i != ns; ++i) {
2299                 uint32_t restore;
2300
2301                 /* Default configuration. */
2302                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2303                 dev_config.vf = dev_config_vf;
2304                 dev_config.mps = MLX5_ARG_UNSET;
2305                 dev_config.dbnc = MLX5_ARG_UNSET;
2306                 dev_config.rx_vec_en = 1;
2307                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2308                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2309                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2310                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2311                 dev_config.vf_nl_en = 1;
2312                 dev_config.mr_ext_memseg_en = 1;
2313                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2314                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2315                 dev_config.dv_esw_en = 1;
2316                 dev_config.dv_flow_en = 1;
2317                 dev_config.decap_en = 1;
2318                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2319                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2320                                                  &list[i],
2321                                                  &dev_config,
2322                                                  &eth_da);
2323                 if (!list[i].eth_dev) {
2324                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2325                                 break;
2326                         /* Device is disabled or already spawned. Ignore it. */
2327                         continue;
2328                 }
2329                 restore = list[i].eth_dev->data->dev_flags;
2330                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2331                 /* Restore non-PCI flags cleared by the above call. */
2332                 list[i].eth_dev->data->dev_flags |= restore;
2333                 rte_eth_dev_probing_finish(list[i].eth_dev);
2334         }
2335         if (i != ns) {
2336                 DRV_LOG(ERR,
2337                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2338                         " encountering an error: %s",
2339                         owner_pci.domain, owner_pci.bus,
2340                         owner_pci.devid, owner_pci.function,
2341                         strerror(rte_errno));
2342                 ret = -rte_errno;
2343                 /* Roll back. */
2344                 while (i--) {
2345                         if (!list[i].eth_dev)
2346                                 continue;
2347                         mlx5_dev_close(list[i].eth_dev);
2348                         /* mac_addrs must not be freed because in dev_private */
2349                         list[i].eth_dev->data->mac_addrs = NULL;
2350                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2351                 }
2352                 /* Restore original error. */
2353                 rte_errno = -ret;
2354         } else {
2355                 ret = 0;
2356         }
2357 exit:
2358         /*
2359          * Do the routine cleanup:
2360          * - close opened Netlink sockets
2361          * - free allocated spawn data array
2362          * - free the Infiniband device list
2363          */
2364         if (nl_rdma >= 0)
2365                 close(nl_rdma);
2366         if (nl_route >= 0)
2367                 close(nl_route);
2368         if (list)
2369                 mlx5_free(list);
2370         MLX5_ASSERT(ibv_list);
2371         mlx5_glue->free_device_list(ibv_list);
2372         return ret;
2373 }
2374
2375 /**
2376  * DPDK callback to register a PCI device.
2377  *
2378  * This function spawns Ethernet devices out of a given PCI device.
2379  *
2380  * @param[in] pci_drv
2381  *   PCI driver structure (mlx5_driver).
2382  * @param[in] pci_dev
2383  *   PCI device information.
2384  *
2385  * @return
2386  *   0 on success, a negative errno value otherwise and rte_errno is set.
2387  */
2388 int
2389 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2390                   struct rte_pci_device *pci_dev)
2391 {
2392         struct rte_eth_devargs eth_da = { .type = RTE_ETH_REPRESENTOR_NONE };
2393         int ret = 0;
2394         uint16_t p;
2395
2396         if (pci_dev->device.devargs) {
2397                 /* Parse representor information from device argument. */
2398                 if (pci_dev->device.devargs->cls_str)
2399                         ret = rte_eth_devargs_parse
2400                                 (pci_dev->device.devargs->cls_str, &eth_da);
2401                 if (ret) {
2402                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2403                                 pci_dev->device.devargs->cls_str);
2404                         return -rte_errno;
2405                 }
2406                 if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) {
2407                         /* Support legacy device argument */
2408                         ret = rte_eth_devargs_parse
2409                                 (pci_dev->device.devargs->args, &eth_da);
2410                         if (ret) {
2411                                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2412                                         pci_dev->device.devargs->args);
2413                                 return -rte_errno;
2414                         }
2415                 }
2416         }
2417
2418         if (eth_da.nb_ports > 0) {
2419                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2420                 for (p = 0; p < eth_da.nb_ports; p++)
2421                         ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da,
2422                                                    eth_da.ports[p]);
2423         } else {
2424                 ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da, 0);
2425         }
2426         return ret;
2427 }
2428
2429 static int
2430 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2431 {
2432         char *env;
2433         int value;
2434
2435         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2436         /* Get environment variable to store. */
2437         env = getenv(MLX5_SHUT_UP_BF);
2438         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2439         if (config->dbnc == MLX5_ARG_UNSET)
2440                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2441         else
2442                 setenv(MLX5_SHUT_UP_BF,
2443                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2444         return value;
2445 }
2446
2447 static void
2448 mlx5_restore_doorbell_mapping_env(int value)
2449 {
2450         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2451         /* Restore the original environment variable state. */
2452         if (value == MLX5_ARG_UNSET)
2453                 unsetenv(MLX5_SHUT_UP_BF);
2454         else
2455                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2456 }
2457
2458 /**
2459  * Extract pdn of PD object using DV API.
2460  *
2461  * @param[in] pd
2462  *   Pointer to the verbs PD object.
2463  * @param[out] pdn
2464  *   Pointer to the PD object number variable.
2465  *
2466  * @return
2467  *   0 on success, error value otherwise.
2468  */
2469 int
2470 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2471 {
2472 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2473         struct mlx5dv_obj obj;
2474         struct mlx5dv_pd pd_info;
2475         int ret = 0;
2476
2477         obj.pd.in = pd;
2478         obj.pd.out = &pd_info;
2479         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2480         if (ret) {
2481                 DRV_LOG(DEBUG, "Fail to get PD object info");
2482                 return ret;
2483         }
2484         *pdn = pd_info.pdn;
2485         return 0;
2486 #else
2487         (void)pd;
2488         (void)pdn;
2489         return -ENOTSUP;
2490 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2491 }
2492
2493 /**
2494  * Function API to open IB device.
2495  *
2496  * This function calls the Linux glue APIs to open a device.
2497  *
2498  * @param[in] spawn
2499  *   Pointer to the IB device attributes (name, port, etc).
2500  * @param[out] config
2501  *   Pointer to device configuration structure.
2502  * @param[out] sh
2503  *   Pointer to shared context structure.
2504  *
2505  * @return
2506  *   0 on success, a positive error value otherwise.
2507  */
2508 int
2509 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2510                      const struct mlx5_dev_config *config,
2511                      struct mlx5_dev_ctx_shared *sh)
2512 {
2513         int dbmap_env;
2514         int err = 0;
2515
2516         sh->numa_node = spawn->pci_dev->device.numa_node;
2517         pthread_mutex_init(&sh->txpp.mutex, NULL);
2518         /*
2519          * Configure environment variable "MLX5_BF_SHUT_UP"
2520          * before the device creation. The rdma_core library
2521          * checks the variable at device creation and
2522          * stores the result internally.
2523          */
2524         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2525         /* Try to open IB device with DV first, then usual Verbs. */
2526         errno = 0;
2527         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2528         if (sh->ctx) {
2529                 sh->devx = 1;
2530                 DRV_LOG(DEBUG, "DevX is supported");
2531                 /* The device is created, no need for environment. */
2532                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2533         } else {
2534                 /* The environment variable is still configured. */
2535                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2536                 err = errno ? errno : ENODEV;
2537                 /*
2538                  * The environment variable is not needed anymore,
2539                  * all device creation attempts are completed.
2540                  */
2541                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2542                 if (!sh->ctx)
2543                         return err;
2544                 DRV_LOG(DEBUG, "DevX is NOT supported");
2545                 err = 0;
2546         }
2547         if (!err && sh->ctx) {
2548                 /* Hint libmlx5 to use PMD allocator for data plane resources */
2549                 mlx5_glue->dv_set_context_attr(sh->ctx,
2550                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2551                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2552                                 .alloc = &mlx5_alloc_verbs_buf,
2553                                 .free = &mlx5_free_verbs_buf,
2554                                 .data = sh,
2555                         }));
2556         }
2557         return err;
2558 }
2559
2560 /**
2561  * Install shared asynchronous device events handler.
2562  * This function is implemented to support event sharing
2563  * between multiple ports of single IB device.
2564  *
2565  * @param sh
2566  *   Pointer to mlx5_dev_ctx_shared object.
2567  */
2568 void
2569 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2570 {
2571         int ret;
2572         int flags;
2573
2574         sh->intr_handle.fd = -1;
2575         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2576         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2577                     F_SETFL, flags | O_NONBLOCK);
2578         if (ret) {
2579                 DRV_LOG(INFO, "failed to change file descriptor async event"
2580                         " queue");
2581         } else {
2582                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2583                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2584                 if (rte_intr_callback_register(&sh->intr_handle,
2585                                         mlx5_dev_interrupt_handler, sh)) {
2586                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2587                         sh->intr_handle.fd = -1;
2588                 }
2589         }
2590         if (sh->devx) {
2591 #ifdef HAVE_IBV_DEVX_ASYNC
2592                 sh->intr_handle_devx.fd = -1;
2593                 sh->devx_comp =
2594                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2595                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2596                 if (!devx_comp) {
2597                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2598                         return;
2599                 }
2600                 flags = fcntl(devx_comp->fd, F_GETFL);
2601                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2602                 if (ret) {
2603                         DRV_LOG(INFO, "failed to change file descriptor"
2604                                 " devx comp");
2605                         return;
2606                 }
2607                 sh->intr_handle_devx.fd = devx_comp->fd;
2608                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2609                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2610                                         mlx5_dev_interrupt_handler_devx, sh)) {
2611                         DRV_LOG(INFO, "Fail to install the devx shared"
2612                                 " interrupt.");
2613                         sh->intr_handle_devx.fd = -1;
2614                 }
2615 #endif /* HAVE_IBV_DEVX_ASYNC */
2616         }
2617 }
2618
2619 /**
2620  * Uninstall shared asynchronous device events handler.
2621  * This function is implemented to support event sharing
2622  * between multiple ports of single IB device.
2623  *
2624  * @param dev
2625  *   Pointer to mlx5_dev_ctx_shared object.
2626  */
2627 void
2628 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2629 {
2630         if (sh->intr_handle.fd >= 0)
2631                 mlx5_intr_callback_unregister(&sh->intr_handle,
2632                                               mlx5_dev_interrupt_handler, sh);
2633 #ifdef HAVE_IBV_DEVX_ASYNC
2634         if (sh->intr_handle_devx.fd >= 0)
2635                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2636                                   mlx5_dev_interrupt_handler_devx, sh);
2637         if (sh->devx_comp)
2638                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2639 #endif
2640 }
2641
2642 /**
2643  * Read statistics by a named counter.
2644  *
2645  * @param[in] priv
2646  *   Pointer to the private device data structure.
2647  * @param[in] ctr_name
2648  *   Pointer to the name of the statistic counter to read
2649  * @param[out] stat
2650  *   Pointer to read statistic value.
2651  * @return
2652  *   0 on success and stat is valud, 1 if failed to read the value
2653  *   rte_errno is set.
2654  *
2655  */
2656 int
2657 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2658                       uint64_t *stat)
2659 {
2660         int fd;
2661
2662         if (priv->sh) {
2663                 if (priv->q_counters != NULL &&
2664                     strcmp(ctr_name, "out_of_buffer") == 0)
2665                         return mlx5_devx_cmd_queue_counter_query(priv->sh->ctx,
2666                                                            0, (uint32_t *)stat);
2667                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2668                       priv->sh->ibdev_path,
2669                       priv->dev_port,
2670                       ctr_name);
2671                 fd = open(path, O_RDONLY);
2672                 /*
2673                  * in switchdev the file location is not per port
2674                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2675                  */
2676                 if (fd == -1) {
2677                         MKSTR(path1, "%s/hw_counters/%s",
2678                               priv->sh->ibdev_path,
2679                               ctr_name);
2680                         fd = open(path1, O_RDONLY);
2681                 }
2682                 if (fd != -1) {
2683                         char buf[21] = {'\0'};
2684                         ssize_t n = read(fd, buf, sizeof(buf));
2685
2686                         close(fd);
2687                         if (n != -1) {
2688                                 *stat = strtoull(buf, NULL, 10);
2689                                 return 0;
2690                         }
2691                 }
2692         }
2693         *stat = 0;
2694         return 1;
2695 }
2696
2697 /**
2698  * Set the reg_mr and dereg_mr call backs
2699  *
2700  * @param reg_mr_cb[out]
2701  *   Pointer to reg_mr func
2702  * @param dereg_mr_cb[out]
2703  *   Pointer to dereg_mr func
2704  *
2705  */
2706 void
2707 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2708                       mlx5_dereg_mr_t *dereg_mr_cb)
2709 {
2710         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2711         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2712 }
2713
2714 /**
2715  * Remove a MAC address from device
2716  *
2717  * @param dev
2718  *   Pointer to Ethernet device structure.
2719  * @param index
2720  *   MAC address index.
2721  */
2722 void
2723 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2724 {
2725         struct mlx5_priv *priv = dev->data->dev_private;
2726         const int vf = priv->config.vf;
2727
2728         if (vf)
2729                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2730                                         mlx5_ifindex(dev), priv->mac_own,
2731                                         &dev->data->mac_addrs[index], index);
2732 }
2733
2734 /**
2735  * Adds a MAC address to the device
2736  *
2737  * @param dev
2738  *   Pointer to Ethernet device structure.
2739  * @param mac_addr
2740  *   MAC address to register.
2741  * @param index
2742  *   MAC address index.
2743  *
2744  * @return
2745  *   0 on success, a negative errno value otherwise
2746  */
2747 int
2748 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2749                      uint32_t index)
2750 {
2751         struct mlx5_priv *priv = dev->data->dev_private;
2752         const int vf = priv->config.vf;
2753         int ret = 0;
2754
2755         if (vf)
2756                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2757                                            mlx5_ifindex(dev), priv->mac_own,
2758                                            mac, index);
2759         return ret;
2760 }
2761
2762 /**
2763  * Modify a VF MAC address
2764  *
2765  * @param priv
2766  *   Pointer to device private data.
2767  * @param mac_addr
2768  *   MAC address to modify into.
2769  * @param iface_idx
2770  *   Net device interface index
2771  * @param vf_index
2772  *   VF index
2773  *
2774  * @return
2775  *   0 on success, a negative errno value otherwise
2776  */
2777 int
2778 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2779                            unsigned int iface_idx,
2780                            struct rte_ether_addr *mac_addr,
2781                            int vf_index)
2782 {
2783         return mlx5_nl_vf_mac_addr_modify
2784                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2785 }
2786
2787 /**
2788  * Set device promiscuous mode
2789  *
2790  * @param dev
2791  *   Pointer to Ethernet device structure.
2792  * @param enable
2793  *   0 - promiscuous is disabled, otherwise - enabled
2794  *
2795  * @return
2796  *   0 on success, a negative error value otherwise
2797  */
2798 int
2799 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2800 {
2801         struct mlx5_priv *priv = dev->data->dev_private;
2802
2803         return mlx5_nl_promisc(priv->nl_socket_route,
2804                                mlx5_ifindex(dev), !!enable);
2805 }
2806
2807 /**
2808  * Set device promiscuous mode
2809  *
2810  * @param dev
2811  *   Pointer to Ethernet device structure.
2812  * @param enable
2813  *   0 - all multicase is disabled, otherwise - enabled
2814  *
2815  * @return
2816  *   0 on success, a negative error value otherwise
2817  */
2818 int
2819 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2820 {
2821         struct mlx5_priv *priv = dev->data->dev_private;
2822
2823         return mlx5_nl_allmulti(priv->nl_socket_route,
2824                                 mlx5_ifindex(dev), !!enable);
2825 }
2826
2827 /**
2828  * Flush device MAC addresses
2829  *
2830  * @param dev
2831  *   Pointer to Ethernet device structure.
2832  *
2833  */
2834 void
2835 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2836 {
2837         struct mlx5_priv *priv = dev->data->dev_private;
2838
2839         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2840                                dev->data->mac_addrs,
2841                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2842 }