drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 120         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 121         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 122         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 123         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 124         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 125         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 126         device_attr->max_rwq_indirection_table_size =
 127                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 128         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 129         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 130
 131         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 132         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 133         if (err)
 134                 return err;
 135
 136         device_attr->flags = dv_attr.flags;
 137         device_attr->comp_mask = dv_attr.comp_mask;
 138 #ifdef HAVE_IBV_MLX5_MOD_SWP
 139         device_attr->sw_parsing_offloads =
 140                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 141 #endif
 142         device_attr->min_single_stride_log_num_of_bytes =
 143                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 144         device_attr->max_single_stride_log_num_of_bytes =
 145                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 146         device_attr->min_single_wqe_log_num_of_strides =
 147                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 148         device_attr->max_single_wqe_log_num_of_strides =
 149                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 150         device_attr->stride_supported_qpts =
 151                 dv_attr.striding_rq_caps.supported_qpts;
 152 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 153         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 154 #endif
 155
 156         return err;
 157 }
 158
 159 /**
 160  * Verbs callback to allocate a memory. This function should allocate the space
 161  * according to the size provided residing inside a huge page.
 162  * Please note that all allocation must respect the alignment from libmlx5
 163  * (i.e. currently rte_mem_page_size()).
 164  *
 165  * @param[in] size
 166  *   The size in bytes of the memory to allocate.
 167  * @param[in] data
 168  *   A pointer to the callback data.
 169  *
 170  * @return
 171  *   Allocated buffer, NULL otherwise and rte_errno is set.
 172  */
 173 static void *
 174 mlx5_alloc_verbs_buf(size_t size, void *data)
 175 {
 176         struct mlx5_dev_ctx_shared *sh = data;
 177         void *ret;
 178         size_t alignment = rte_mem_page_size();
 179         if (alignment == (size_t)-1) {
 180                 DRV_LOG(ERR, "Failed to get mem page size");
 181                 rte_errno = ENOMEM;
 182                 return NULL;
 183         }
 184
 185         MLX5_ASSERT(data != NULL);
 186         ret = mlx5_malloc(0, size, alignment, sh->numa_node);
 187         if (!ret && size)
 188                 rte_errno = ENOMEM;
 189         return ret;
 190 }
 191
 192 /**
 193  * Verbs callback to free a memory.
 194  *
 195  * @param[in] ptr
 196  *   A pointer to the memory to free.
 197  * @param[in] data
 198  *   A pointer to the callback data.
 199  */
 200 static void
 201 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 202 {
 203         MLX5_ASSERT(data != NULL);
 204         mlx5_free(ptr);
 205 }
 206
 207 /**
 208  * Initialize DR related data within private structure.
 209  * Routine checks the reference counter and does actual
 210  * resources creation/initialization only if counter is zero.
 211  *
 212  * @param[in] priv
 213  *   Pointer to the private device data structure.
 214  *
 215  * @return
 216  *   Zero on success, positive error code otherwise.
 217  */
 218 static int
 219 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 220 {
 221         struct mlx5_dev_ctx_shared *sh = priv->sh;
 222         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 223         int err;
 224
 225         MLX5_ASSERT(sh && sh->refcnt);
 226         if (sh->refcnt > 1)
 227                 return 0;
 228         err = mlx5_alloc_table_hash_list(priv);
 229         if (err)
 230                 goto error;
 231         /* The resources below are only valid with DV support. */
 232 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 233         /* Init port id action cache list. */
 234         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 235         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 236                              flow_dv_port_id_create_cb,
 237                              flow_dv_port_id_match_cb,
 238                              flow_dv_port_id_remove_cb);
 239         /* Init push vlan action cache list. */
 240         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 241         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 242                              flow_dv_push_vlan_create_cb,
 243                              flow_dv_push_vlan_match_cb,
 244                              flow_dv_push_vlan_remove_cb);
 245         /* Init sample action cache list. */
 246         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 247         mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,
 248                              flow_dv_sample_create_cb,
 249                              flow_dv_sample_match_cb,
 250                              flow_dv_sample_remove_cb);
 251         /* Init dest array action cache list. */
 252         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 253         mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,
 254                              flow_dv_dest_array_create_cb,
 255                              flow_dv_dest_array_match_cb,
 256                              flow_dv_dest_array_remove_cb);
 257         /* Create tags hash list table. */
 258         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 259         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 260                                           MLX5_HLIST_WRITE_MOST,
 261                                           flow_dv_tag_create_cb,
 262                                           flow_dv_tag_match_cb,
 263                                           flow_dv_tag_remove_cb);
 264         if (!sh->tag_table) {
 265                 DRV_LOG(ERR, "tags with hash creation failed.");
 266                 err = ENOMEM;
 267                 goto error;
 268         }
 269         sh->tag_table->ctx = sh;
 270         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 271         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 272                                             0, MLX5_HLIST_WRITE_MOST |
 273                                             MLX5_HLIST_DIRECT_KEY,
 274                                             flow_dv_modify_create_cb,
 275                                             flow_dv_modify_match_cb,
 276                                             flow_dv_modify_remove_cb);
 277         if (!sh->modify_cmds) {
 278                 DRV_LOG(ERR, "hdr modify hash creation failed");
 279                 err = ENOMEM;
 280                 goto error;
 281         }
 282         sh->modify_cmds->ctx = sh;
 283         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 284         sh->encaps_decaps = mlx5_hlist_create(s,
 285                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 286                                               0, MLX5_HLIST_DIRECT_KEY |
 287                                               MLX5_HLIST_WRITE_MOST,
 288                                               flow_dv_encap_decap_create_cb,
 289                                               flow_dv_encap_decap_match_cb,
 290                                               flow_dv_encap_decap_remove_cb);
 291         if (!sh->encaps_decaps) {
 292                 DRV_LOG(ERR, "encap decap hash creation failed");
 293                 err = ENOMEM;
 294                 goto error;
 295         }
 296         sh->encaps_decaps->ctx = sh;
 297 #endif
 298 #ifdef HAVE_MLX5DV_DR
 299         void *domain;
 300
 301         /* Reference counter is zero, we should initialize structures. */
 302         domain = mlx5_glue->dr_create_domain(sh->ctx,
 303                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 304         if (!domain) {
 305                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 306                 err = errno;
 307                 goto error;
 308         }
 309         sh->rx_domain = domain;
 310         domain = mlx5_glue->dr_create_domain(sh->ctx,
 311                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 312         if (!domain) {
 313                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 314                 err = errno;
 315                 goto error;
 316         }
 317         sh->tx_domain = domain;
 318 #ifdef HAVE_MLX5DV_DR_ESWITCH
 319         if (priv->config.dv_esw_en) {
 320                 domain  = mlx5_glue->dr_create_domain
 321                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 322                 if (!domain) {
 323                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 324                         err = errno;
 325                         goto error;
 326                 }
 327                 sh->fdb_domain = domain;
 328                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 329         }
 330 #endif
 331         if (!sh->tunnel_hub)
 332                 err = mlx5_alloc_tunnel_hub(sh);
 333         if (err) {
 334                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 335                 goto error;
 336         }
 337         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 338                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 339                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 340                 if (sh->fdb_domain)
 341                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 342         }
 343         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 344 #endif /* HAVE_MLX5DV_DR */
 345         sh->default_miss_action =
 346                         mlx5_glue->dr_create_flow_action_default_miss();
 347         if (!sh->default_miss_action)
 348                 DRV_LOG(WARNING, "Default miss action is not supported.");
 349         return 0;
 350 error:
 351         /* Rollback the created objects. */
 352         if (sh->rx_domain) {
 353                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 354                 sh->rx_domain = NULL;
 355         }
 356         if (sh->tx_domain) {
 357                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 358                 sh->tx_domain = NULL;
 359         }
 360         if (sh->fdb_domain) {
 361                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 362                 sh->fdb_domain = NULL;
 363         }
 364         if (sh->esw_drop_action) {
 365                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 366                 sh->esw_drop_action = NULL;
 367         }
 368         if (sh->pop_vlan_action) {
 369                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 370                 sh->pop_vlan_action = NULL;
 371         }
 372         if (sh->encaps_decaps) {
 373                 mlx5_hlist_destroy(sh->encaps_decaps);
 374                 sh->encaps_decaps = NULL;
 375         }
 376         if (sh->modify_cmds) {
 377                 mlx5_hlist_destroy(sh->modify_cmds);
 378                 sh->modify_cmds = NULL;
 379         }
 380         if (sh->tag_table) {
 381                 /* tags should be destroyed with flow before. */
 382                 mlx5_hlist_destroy(sh->tag_table);
 383                 sh->tag_table = NULL;
 384         }
 385         if (sh->tunnel_hub) {
 386                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 387                 sh->tunnel_hub = NULL;
 388         }
 389         mlx5_free_table_hash_list(priv);
 390         return err;
 391 }
 392
 393 /**
 394  * Destroy DR related data within private structure.
 395  *
 396  * @param[in] priv
 397  *   Pointer to the private device data structure.
 398  */
 399 void
 400 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 401 {
 402         struct mlx5_dev_ctx_shared *sh = priv->sh;
 403
 404         MLX5_ASSERT(sh && sh->refcnt);
 405         if (sh->refcnt > 1)
 406                 return;
 407 #ifdef HAVE_MLX5DV_DR
 408         if (sh->rx_domain) {
 409                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 410                 sh->rx_domain = NULL;
 411         }
 412         if (sh->tx_domain) {
 413                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 414                 sh->tx_domain = NULL;
 415         }
 416 #ifdef HAVE_MLX5DV_DR_ESWITCH
 417         if (sh->fdb_domain) {
 418                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 419                 sh->fdb_domain = NULL;
 420         }
 421         if (sh->esw_drop_action) {
 422                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 423                 sh->esw_drop_action = NULL;
 424         }
 425 #endif
 426         if (sh->pop_vlan_action) {
 427                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 428                 sh->pop_vlan_action = NULL;
 429         }
 430 #endif /* HAVE_MLX5DV_DR */
 431         if (sh->default_miss_action)
 432                 mlx5_glue->destroy_flow_action
 433                                 (sh->default_miss_action);
 434         if (sh->encaps_decaps) {
 435                 mlx5_hlist_destroy(sh->encaps_decaps);
 436                 sh->encaps_decaps = NULL;
 437         }
 438         if (sh->modify_cmds) {
 439                 mlx5_hlist_destroy(sh->modify_cmds);
 440                 sh->modify_cmds = NULL;
 441         }
 442         if (sh->tag_table) {
 443                 /* tags should be destroyed with flow before. */
 444                 mlx5_hlist_destroy(sh->tag_table);
 445                 sh->tag_table = NULL;
 446         }
 447         if (sh->tunnel_hub) {
 448                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 449                 sh->tunnel_hub = NULL;
 450         }
 451         mlx5_cache_list_destroy(&sh->port_id_action_list);
 452         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 453         mlx5_free_table_hash_list(priv);
 454 }
 455
 456 /**
 457  * Initialize shared data between primary and secondary process.
 458  *
 459  * A memzone is reserved by primary process and secondary processes attach to
 460  * the memzone.
 461  *
 462  * @return
 463  *   0 on success, a negative errno value otherwise and rte_errno is set.
 464  */
 465 static int
 466 mlx5_init_shared_data(void)
 467 {
 468         const struct rte_memzone *mz;
 469         int ret = 0;
 470
 471         rte_spinlock_lock(&mlx5_shared_data_lock);
 472         if (mlx5_shared_data == NULL) {
 473                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 474                         /* Allocate shared memory. */
 475                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 476                                                  sizeof(*mlx5_shared_data),
 477                                                  SOCKET_ID_ANY, 0);
 478                         if (mz == NULL) {
 479                                 DRV_LOG(ERR,
 480                                         "Cannot allocate mlx5 shared data");
 481                                 ret = -rte_errno;
 482                                 goto error;
 483                         }
 484                         mlx5_shared_data = mz->addr;
 485                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 486                         rte_spinlock_init(&mlx5_shared_data->lock);
 487                 } else {
 488                         /* Lookup allocated shared memory. */
 489                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 490                         if (mz == NULL) {
 491                                 DRV_LOG(ERR,
 492                                         "Cannot attach mlx5 shared data");
 493                                 ret = -rte_errno;
 494                                 goto error;
 495                         }
 496                         mlx5_shared_data = mz->addr;
 497                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 498                 }
 499         }
 500 error:
 501         rte_spinlock_unlock(&mlx5_shared_data_lock);
 502         return ret;
 503 }
 504
 505 /**
 506  * PMD global initialization.
 507  *
 508  * Independent from individual device, this function initializes global
 509  * per-PMD data structures distinguishing primary and secondary processes.
 510  * Hence, each initialization is called once per a process.
 511  *
 512  * @return
 513  *   0 on success, a negative errno value otherwise and rte_errno is set.
 514  */
 515 static int
 516 mlx5_init_once(void)
 517 {
 518         struct mlx5_shared_data *sd;
 519         struct mlx5_local_data *ld = &mlx5_local_data;
 520         int ret = 0;
 521
 522         if (mlx5_init_shared_data())
 523                 return -rte_errno;
 524         sd = mlx5_shared_data;
 525         MLX5_ASSERT(sd);
 526         rte_spinlock_lock(&sd->lock);
 527         switch (rte_eal_process_type()) {
 528         case RTE_PROC_PRIMARY:
 529                 if (sd->init_done)
 530                         break;
 531                 LIST_INIT(&sd->mem_event_cb_list);
 532                 rte_rwlock_init(&sd->mem_event_rwlock);
 533                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 534                                                 mlx5_mr_mem_event_cb, NULL);
 535                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 536                                            mlx5_mp_os_primary_handle);
 537                 if (ret)
 538                         goto out;
 539                 sd->init_done = true;
 540                 break;
 541         case RTE_PROC_SECONDARY:
 542                 if (ld->init_done)
 543                         break;
 544                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 545                                              mlx5_mp_os_secondary_handle);
 546                 if (ret)
 547                         goto out;
 548                 ++sd->secondary_cnt;
 549                 ld->init_done = true;
 550                 break;
 551         default:
 552                 break;
 553         }
 554 out:
 555         rte_spinlock_unlock(&sd->lock);
 556         return ret;
 557 }
 558
 559 /**
 560  * Create the Tx queue DevX/Verbs object.
 561  *
 562  * @param dev
 563  *   Pointer to Ethernet device.
 564  * @param idx
 565  *   Queue index in DPDK Tx queue array.
 566  *
 567  * @return
 568  *   0 on success, a negative errno value otherwise and rte_errno is set.
 569  */
 570 static int
 571 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 572 {
 573         struct mlx5_priv *priv = dev->data->dev_private;
 574         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 575         struct mlx5_txq_ctrl *txq_ctrl =
 576                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 577
 578         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 579                 return mlx5_txq_devx_obj_new(dev, idx);
 580 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 581         if (!priv->config.dv_esw_en)
 582                 return mlx5_txq_devx_obj_new(dev, idx);
 583 #endif
 584         return mlx5_txq_ibv_obj_new(dev, idx);
 585 }
 586
 587 /**
 588  * Release an Tx DevX/verbs queue object.
 589  *
 590  * @param txq_obj
 591  *   DevX/Verbs Tx queue object.
 592  */
 593 static void
 594 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 595 {
 596         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 597                 mlx5_txq_devx_obj_release(txq_obj);
 598                 return;
 599         }
 600 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 601         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 602                 mlx5_txq_devx_obj_release(txq_obj);
 603                 return;
 604         }
 605 #endif
 606         mlx5_txq_ibv_obj_release(txq_obj);
 607 }
 608
 609 /**
 610  * DV flow counter mode detect and config.
 611  *
 612  * @param dev
 613  *   Pointer to rte_eth_dev structure.
 614  *
 615  */
 616 static void
 617 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 618 {
 619 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 620         struct mlx5_priv *priv = dev->data->dev_private;
 621         struct mlx5_dev_ctx_shared *sh = priv->sh;
 622         bool fallback;
 623
 624 #ifndef HAVE_IBV_DEVX_ASYNC
 625         fallback = true;
 626 #else
 627         fallback = false;
 628         if (!priv->config.devx || !priv->config.dv_flow_en ||
 629             !priv->config.hca_attr.flow_counters_dump ||
 630             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 631             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 632                 fallback = true;
 633 #endif
 634         if (fallback)
 635                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 636                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 637                         priv->config.hca_attr.flow_counters_dump,
 638                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 639         /* Initialize fallback mode only on the port initializes sh. */
 640         if (sh->refcnt == 1)
 641                 sh->cmng.counter_fallback = fallback;
 642         else if (fallback != sh->cmng.counter_fallback)
 643                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 644                         "with others:%d.", PORT_ID(priv), fallback);
 645 #endif
 646 }
 647
 648 static void
 649 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 650 {
 651         struct mlx5_priv *priv = dev->data->dev_private;
 652         void *ctx = priv->sh->ctx;
 653
 654         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 655         if (!priv->q_counters) {
 656                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 657                 struct ibv_wq *wq;
 658
 659                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 660                         "by DevX - fall-back to use the kernel driver global "
 661                         "queue counter.", dev->data->port_id);
 662                 /* Create WQ by kernel and query its queue counter ID. */
 663                 if (cq) {
 664                         wq = mlx5_glue->create_wq(ctx,
 665                                                   &(struct ibv_wq_init_attr){
 666                                                     .wq_type = IBV_WQT_RQ,
 667                                                     .max_wr = 1,
 668                                                     .max_sge = 1,
 669                                                     .pd = priv->sh->pd,
 670                                                     .cq = cq,
 671                                                 });
 672                         if (wq) {
 673                                 /* Counter is assigned only on RDY state. */
 674                                 int ret = mlx5_glue->modify_wq(wq,
 675                                                  &(struct ibv_wq_attr){
 676                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 677                                                  .wq_state = IBV_WQS_RDY,
 678                                                 });
 679
 680                                 if (ret == 0)
 681                                         mlx5_devx_cmd_wq_query(wq,
 682                                                          &priv->counter_set_id);
 683                                 claim_zero(mlx5_glue->destroy_wq(wq));
 684                         }
 685                         claim_zero(mlx5_glue->destroy_cq(cq));
 686                 }
 687         } else {
 688                 priv->counter_set_id = priv->q_counters->id;
 689         }
 690         if (priv->counter_set_id == 0)
 691                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 692                         "available.", dev->data->port_id);
 693 }
 694
 695 /**
 696  * Spawn an Ethernet device from Verbs information.
 697  *
 698  * @param dpdk_dev
 699  *   Backing DPDK device.
 700  * @param spawn
 701  *   Verbs device parameters (name, port, switch_info) to spawn.
 702  * @param config
 703  *   Device configuration parameters.
 704  *
 705  * @return
 706  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 707  *   is set. The following errors are defined:
 708  *
 709  *   EBUSY: device is not supposed to be spawned.
 710  *   EEXIST: device is already spawned
 711  */
 712 static struct rte_eth_dev *
 713 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 714                struct mlx5_dev_spawn_data *spawn,
 715                struct mlx5_dev_config *config)
 716 {
 717         const struct mlx5_switch_info *switch_info = &spawn->info;
 718         struct mlx5_dev_ctx_shared *sh = NULL;
 719         struct ibv_port_attr port_attr;
 720         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 721         struct rte_eth_dev *eth_dev = NULL;
 722         struct mlx5_priv *priv = NULL;
 723         int err = 0;
 724         unsigned int hw_padding = 0;
 725         unsigned int mps;
 726         unsigned int tunnel_en = 0;
 727         unsigned int mpls_en = 0;
 728         unsigned int swp = 0;
 729         unsigned int mprq = 0;
 730         unsigned int mprq_min_stride_size_n = 0;
 731         unsigned int mprq_max_stride_size_n = 0;
 732         unsigned int mprq_min_stride_num_n = 0;
 733         unsigned int mprq_max_stride_num_n = 0;
 734         struct rte_ether_addr mac;
 735         char name[RTE_ETH_NAME_MAX_LEN];
 736         int own_domain_id = 0;
 737         uint16_t port_id;
 738         unsigned int i;
 739 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 740         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 741 #endif
 742
 743         /* Determine if this port representor is supposed to be spawned. */
 744         if (switch_info->representor && dpdk_dev->devargs) {
 745                 struct rte_eth_devargs eth_da;
 746
 747                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 748                 if (err) {
 749                         rte_errno = -err;
 750                         DRV_LOG(ERR, "failed to process device arguments: %s",
 751                                 strerror(rte_errno));
 752                         return NULL;
 753                 }
 754                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 755                         if (eth_da.representor_ports[i] ==
 756                             (uint16_t)switch_info->port_name)
 757                                 break;
 758                 if (i == eth_da.nb_representor_ports) {
 759                         rte_errno = EBUSY;
 760                         return NULL;
 761                 }
 762         }
 763         /* Build device name. */
 764         if (spawn->pf_bond <  0) {
 765                 /* Single device. */
 766                 if (!switch_info->representor)
 767                         strlcpy(name, dpdk_dev->name, sizeof(name));
 768                 else
 769                         snprintf(name, sizeof(name), "%s_representor_%u",
 770                                  dpdk_dev->name, switch_info->port_name);
 771         } else {
 772                 /* Bonding device. */
 773                 if (!switch_info->representor)
 774                         snprintf(name, sizeof(name), "%s_%s",
 775                                  dpdk_dev->name,
 776                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 777                 else
 778                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 779                                  dpdk_dev->name,
 780                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 781                                  switch_info->port_name);
 782         }
 783         /* check if the device is already spawned */
 784         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 785                 rte_errno = EEXIST;
 786                 return NULL;
 787         }
 788         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 789         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 790                 struct mlx5_mp_id mp_id;
 791
 792                 eth_dev = rte_eth_dev_attach_secondary(name);
 793                 if (eth_dev == NULL) {
 794                         DRV_LOG(ERR, "can not attach rte ethdev");
 795                         rte_errno = ENOMEM;
 796                         return NULL;
 797                 }
 798                 priv = eth_dev->data->dev_private;
 799                 if (priv->sh->bond_dev != UINT16_MAX)
 800                         /* For bonding port, use primary PCI device. */
 801                         eth_dev->device =
 802                                 rte_eth_devices[priv->sh->bond_dev].device;
 803                 else
 804                         eth_dev->device = dpdk_dev;
 805                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 806                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 807                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 808                 err = mlx5_proc_priv_init(eth_dev);
 809                 if (err)
 810                         return NULL;
 811                 mp_id.port_id = eth_dev->data->port_id;
 812                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 813                 /* Receive command fd from primary process */
 814                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 815                 if (err < 0)
 816                         goto err_secondary;
 817                 /* Remap UAR for Tx queues. */
 818                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 819                 if (err)
 820                         goto err_secondary;
 821                 /*
 822                  * Ethdev pointer is still required as input since
 823                  * the primary device is not accessible from the
 824                  * secondary process.
 825                  */
 826                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 827                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 828                 return eth_dev;
 829 err_secondary:
 830                 mlx5_dev_close(eth_dev);
 831                 return NULL;
 832         }
 833         /*
 834          * Some parameters ("tx_db_nc" in particularly) are needed in
 835          * advance to create dv/verbs device context. We proceed the
 836          * devargs here to get ones, and later proceed devargs again
 837          * to override some hardware settings.
 838          */
 839         err = mlx5_args(config, dpdk_dev->devargs);
 840         if (err) {
 841                 err = rte_errno;
 842                 DRV_LOG(ERR, "failed to process device arguments: %s",
 843                         strerror(rte_errno));
 844                 goto error;
 845         }
 846         if (config->dv_miss_info) {
 847                 if (switch_info->master || switch_info->representor)
 848                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 849         }
 850         mlx5_malloc_mem_select(config->sys_mem_en);
 851         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 852         if (!sh)
 853                 return NULL;
 854         config->devx = sh->devx;
 855 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 856         config->dest_tir = 1;
 857 #endif
 858 #ifdef HAVE_IBV_MLX5_MOD_SWP
 859         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 860 #endif
 861         /*
 862          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 863          * as all ConnectX-5 devices.
 864          */
 865 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 866         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 867 #endif
 868 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 869         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 870 #endif
 871         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 872         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 873                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 874                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 875                         mps = MLX5_MPW_ENHANCED;
 876                 } else {
 877                         DRV_LOG(DEBUG, "MPW is supported");
 878                         mps = MLX5_MPW;
 879                 }
 880         } else {
 881                 DRV_LOG(DEBUG, "MPW isn't supported");
 882                 mps = MLX5_MPW_DISABLED;
 883         }
 884 #ifdef HAVE_IBV_MLX5_MOD_SWP
 885         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 886                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 887         DRV_LOG(DEBUG, "SWP support: %u", swp);
 888 #endif
 889         config->swp = !!swp;
 890 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 891         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 892                 struct mlx5dv_striding_rq_caps mprq_caps =
 893                         dv_attr.striding_rq_caps;
 894
 895                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 896                         mprq_caps.min_single_stride_log_num_of_bytes);
 897                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 898                         mprq_caps.max_single_stride_log_num_of_bytes);
 899                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 900                         mprq_caps.min_single_wqe_log_num_of_strides);
 901                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 902                         mprq_caps.max_single_wqe_log_num_of_strides);
 903                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 904                         mprq_caps.supported_qpts);
 905                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 906                 mprq = 1;
 907                 mprq_min_stride_size_n =
 908                         mprq_caps.min_single_stride_log_num_of_bytes;
 909                 mprq_max_stride_size_n =
 910                         mprq_caps.max_single_stride_log_num_of_bytes;
 911                 mprq_min_stride_num_n =
 912                         mprq_caps.min_single_wqe_log_num_of_strides;
 913                 mprq_max_stride_num_n =
 914                         mprq_caps.max_single_wqe_log_num_of_strides;
 915         }
 916 #endif
 917         /* Rx CQE compression is enabled by default. */
 918         config->cqe_comp = 1;
 919 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 920         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 921                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 922                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 923                              (dv_attr.tunnel_offloads_caps &
 924                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 925                              (dv_attr.tunnel_offloads_caps &
 926                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 927         }
 928         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 929                 tunnel_en ? "" : "not ");
 930 #else
 931         DRV_LOG(WARNING,
 932                 "tunnel offloading disabled due to old OFED/rdma-core version");
 933 #endif
 934         config->tunnel_en = tunnel_en;
 935 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 936         mpls_en = ((dv_attr.tunnel_offloads_caps &
 937                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 938                    (dv_attr.tunnel_offloads_caps &
 939                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 940         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 941                 mpls_en ? "" : "not ");
 942 #else
 943         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 944                 " old OFED/rdma-core version or firmware configuration");
 945 #endif
 946         config->mpls_en = mpls_en;
 947         /* Check port status. */
 948         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 949         if (err) {
 950                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 951                 goto error;
 952         }
 953         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 954                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 955                 err = EINVAL;
 956                 goto error;
 957         }
 958         if (port_attr.state != IBV_PORT_ACTIVE)
 959                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 960                         mlx5_glue->port_state_str(port_attr.state),
 961                         port_attr.state);
 962         /* Allocate private eth device data. */
 963         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 964                            sizeof(*priv),
 965                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 966         if (priv == NULL) {
 967                 DRV_LOG(ERR, "priv allocation failure");
 968                 err = ENOMEM;
 969                 goto error;
 970         }
 971         priv->sh = sh;
 972         priv->dev_port = spawn->phys_port;
 973         priv->pci_dev = spawn->pci_dev;
 974         priv->mtu = RTE_ETHER_MTU;
 975         /* Some internal functions rely on Netlink sockets, open them now. */
 976         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 977         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 978         priv->representor = !!switch_info->representor;
 979         priv->master = !!switch_info->master;
 980         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 981         priv->vport_meta_tag = 0;
 982         priv->vport_meta_mask = 0;
 983         priv->pf_bond = spawn->pf_bond;
 984 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 985         /*
 986          * The DevX port query API is implemented. E-Switch may use
 987          * either vport or reg_c[0] metadata register to match on
 988          * vport index. The engaged part of metadata register is
 989          * defined by mask.
 990          */
 991         if (switch_info->representor || switch_info->master) {
 992                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 993                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 994                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 995                                                  &devx_port);
 996                 if (err) {
 997                         DRV_LOG(WARNING,
 998                                 "can't query devx port %d on device %s",
 999                                 spawn->phys_port,
1000                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
1001                         devx_port.comp_mask = 0;
1002                 }
1003         }
1004         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1005                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1006                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1007                 if (!priv->vport_meta_mask) {
1008                         DRV_LOG(ERR, "vport zero mask for port %d"
1009                                      " on bonding device %s",
1010                                      spawn->phys_port,
1011                                      mlx5_os_get_dev_device_name
1012                                                         (spawn->phys_dev));
1013                         err = ENOTSUP;
1014                         goto error;
1015                 }
1016                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1017                         DRV_LOG(ERR, "invalid vport tag for port %d"
1018                                      " on bonding device %s",
1019                                      spawn->phys_port,
1020                                      mlx5_os_get_dev_device_name
1021                                                         (spawn->phys_dev));
1022                         err = ENOTSUP;
1023                         goto error;
1024                 }
1025         }
1026         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1027                 priv->vport_id = devx_port.vport_num;
1028         } else if (spawn->pf_bond >= 0) {
1029                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1030                              " on bonding device %s",
1031                              spawn->phys_port,
1032                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1033                 err = ENOTSUP;
1034                 goto error;
1035         } else {
1036                 /* Suppose vport index in compatible way. */
1037                 priv->vport_id = switch_info->representor ?
1038                                  switch_info->port_name + 1 : -1;
1039         }
1040 #else
1041         /*
1042          * Kernel/rdma_core support single E-Switch per PF configurations
1043          * only and vport_id field contains the vport index for
1044          * associated VF, which is deduced from representor port name.
1045          * For example, let's have the IB device port 10, it has
1046          * attached network device eth0, which has port name attribute
1047          * pf0vf2, we can deduce the VF number as 2, and set vport index
1048          * as 3 (2+1). This assigning schema should be changed if the
1049          * multiple E-Switch instances per PF configurations or/and PCI
1050          * subfunctions are added.
1051          */
1052         priv->vport_id = switch_info->representor ?
1053                          switch_info->port_name + 1 : -1;
1054 #endif
1055         /* representor_id field keeps the unmodified VF index. */
1056         priv->representor_id = switch_info->representor ?
1057                                switch_info->port_name : -1;
1058         /*
1059          * Look for sibling devices in order to reuse their switch domain
1060          * if any, otherwise allocate one.
1061          */
1062         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1063                 const struct mlx5_priv *opriv =
1064                         rte_eth_devices[port_id].data->dev_private;
1065
1066                 if (!opriv ||
1067                     opriv->sh != priv->sh ||
1068                         opriv->domain_id ==
1069                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1070                         continue;
1071                 priv->domain_id = opriv->domain_id;
1072                 break;
1073         }
1074         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1075                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1076                 if (err) {
1077                         err = rte_errno;
1078                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1079                                 strerror(rte_errno));
1080                         goto error;
1081                 }
1082                 own_domain_id = 1;
1083         }
1084         /* Override some values set by hardware configuration. */
1085         mlx5_args(config, dpdk_dev->devargs);
1086         err = mlx5_dev_check_sibling_config(priv, config);
1087         if (err)
1088                 goto error;
1089         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1090                             IBV_DEVICE_RAW_IP_CSUM);
1091         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1092                 (config->hw_csum ? "" : "not "));
1093 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1094         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1095         DRV_LOG(DEBUG, "counters are not supported");
1096 #endif
1097 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1098         if (config->dv_flow_en) {
1099                 DRV_LOG(WARNING, "DV flow is not supported");
1100                 config->dv_flow_en = 0;
1101         }
1102 #endif
1103         config->ind_table_max_size =
1104                 sh->device_attr.max_rwq_indirection_table_size;
1105         /*
1106          * Remove this check once DPDK supports larger/variable
1107          * indirection tables.
1108          */
1109         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1110                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1111         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1112                 config->ind_table_max_size);
1113         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1114                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1115         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1116                 (config->hw_vlan_strip ? "" : "not "));
1117         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1118                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1119 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1120         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1121 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1122         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1123                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1124 #endif
1125         if (config->hw_padding && !hw_padding) {
1126                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1127                 config->hw_padding = 0;
1128         } else if (config->hw_padding) {
1129                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1130         }
1131         config->tso = (sh->device_attr.max_tso > 0 &&
1132                       (sh->device_attr.tso_supported_qpts &
1133                        (1 << IBV_QPT_RAW_PACKET)));
1134         if (config->tso)
1135                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1136         /*
1137          * MPW is disabled by default, while the Enhanced MPW is enabled
1138          * by default.
1139          */
1140         if (config->mps == MLX5_ARG_UNSET)
1141                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1142                                                           MLX5_MPW_DISABLED;
1143         else
1144                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1145         DRV_LOG(INFO, "%sMPS is %s",
1146                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1147                 config->mps == MLX5_MPW ? "legacy " : "",
1148                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1149         if (config->devx) {
1150                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1151                 if (err) {
1152                         err = -err;
1153                         goto error;
1154                 }
1155                 /* Check relax ordering support. */
1156                 if (!haswell_broadwell_cpu) {
1157                         sh->cmng.relaxed_ordering_write =
1158                                 config->hca_attr.relaxed_ordering_write;
1159                         sh->cmng.relaxed_ordering_read =
1160                                 config->hca_attr.relaxed_ordering_read;
1161                 } else {
1162                         sh->cmng.relaxed_ordering_read = 0;
1163                         sh->cmng.relaxed_ordering_write = 0;
1164                 }
1165                 /* Check for LRO support. */
1166                 if (config->dest_tir && config->hca_attr.lro_cap &&
1167                     config->dv_flow_en) {
1168                         /* TBD check tunnel lro caps. */
1169                         config->lro.supported = config->hca_attr.lro_cap;
1170                         DRV_LOG(DEBUG, "Device supports LRO");
1171                         /*
1172                          * If LRO timeout is not configured by application,
1173                          * use the minimal supported value.
1174                          */
1175                         if (!config->lro.timeout)
1176                                 config->lro.timeout =
1177                                 config->hca_attr.lro_timer_supported_periods[0];
1178                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1179                                 config->lro.timeout);
1180                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1181                                 "required for coalescing is %d bytes",
1182                                 config->hca_attr.lro_min_mss_size);
1183                 }
1184 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1185                 if (config->hca_attr.qos.sup &&
1186                     config->hca_attr.qos.flow_meter_old &&
1187                     config->dv_flow_en) {
1188                         uint8_t reg_c_mask =
1189                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1190                         /*
1191                          * Meter needs two REG_C's for color match and pre-sfx
1192                          * flow match. Here get the REG_C for color match.
1193                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1194                          */
1195                         reg_c_mask &= 0xfc;
1196                         if (__builtin_popcount(reg_c_mask) < 1) {
1197                                 priv->mtr_en = 0;
1198                                 DRV_LOG(WARNING, "No available register for"
1199                                         " meter.");
1200                         } else {
1201                                 /*
1202                                  * The meter color register is used by the
1203                                  * flow-hit feature as well.
1204                                  * The flow-hit feature must use REG_C_3
1205                                  * Prefer REG_C_3 if it is available.
1206                                  */
1207                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1208                                         priv->mtr_color_reg = REG_C_3;
1209                                 else
1210                                         priv->mtr_color_reg = ffs(reg_c_mask)
1211                                                               - 1 + REG_C_0;
1212                                 priv->mtr_en = 1;
1213                                 priv->mtr_reg_share =
1214                                       config->hca_attr.qos.flow_meter;
1215                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1216                                         priv->mtr_color_reg);
1217                         }
1218                 }
1219 #endif
1220 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1221                 if (config->hca_attr.flow_hit_aso &&
1222                     priv->mtr_color_reg == REG_C_3) {
1223                         sh->flow_hit_aso_en = 1;
1224                         err = mlx5_flow_aso_age_mng_init(sh);
1225                         if (err) {
1226                                 err = -err;
1227                                 goto error;
1228                         }
1229                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1230                 }
1231 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1232 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1233                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1234                     config->dv_flow_en) {
1235                         priv->sampler_en = 1;
1236                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1237                 } else {
1238                         priv->sampler_en = 0;
1239                         if (!config->hca_attr.log_max_ft_sampler_num)
1240                                 DRV_LOG(WARNING, "No available register for"
1241                                                 " Sampler.");
1242                         else
1243                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1244                 }
1245 #endif
1246         }
1247         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1248             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1249                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1250                 config->cqe_comp = 0;
1251         }
1252         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1253             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1254                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1255                                  " format isn't supported.");
1256                 config->cqe_comp = 0;
1257         }
1258         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1259             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1260                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1261                                  " format isn't supported.");
1262                 config->cqe_comp = 0;
1263         }
1264         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1265                         config->cqe_comp ? "" : "not ");
1266         if (config->tx_pp) {
1267                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1268                         config->hca_attr.dev_freq_khz);
1269                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1270                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1271                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1272                         config->hca_attr.cross_channel ? "" : "not ");
1273                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1274                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1275                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1276                         config->hca_attr.non_wire_sq ? "" : "not ");
1277                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1278                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1279                         config->hca_attr.log_max_static_sq_wq);
1280                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1281                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1282                 if (!config->devx) {
1283                         DRV_LOG(ERR, "DevX is required for packet pacing");
1284                         err = ENODEV;
1285                         goto error;
1286                 }
1287                 if (!config->hca_attr.qos.packet_pacing) {
1288                         DRV_LOG(ERR, "Packet pacing is not supported");
1289                         err = ENODEV;
1290                         goto error;
1291                 }
1292                 if (!config->hca_attr.cross_channel) {
1293                         DRV_LOG(ERR, "Cross channel operations are"
1294                                      " required for packet pacing");
1295                         err = ENODEV;
1296                         goto error;
1297                 }
1298                 if (!config->hca_attr.wqe_index_ignore) {
1299                         DRV_LOG(ERR, "WQE index ignore feature is"
1300                                      " required for packet pacing");
1301                         err = ENODEV;
1302                         goto error;
1303                 }
1304                 if (!config->hca_attr.non_wire_sq) {
1305                         DRV_LOG(ERR, "Non-wire SQ feature is"
1306                                      " required for packet pacing");
1307                         err = ENODEV;
1308                         goto error;
1309                 }
1310                 if (!config->hca_attr.log_max_static_sq_wq) {
1311                         DRV_LOG(ERR, "Static WQE SQ feature is"
1312                                      " required for packet pacing");
1313                         err = ENODEV;
1314                         goto error;
1315                 }
1316                 if (!config->hca_attr.qos.wqe_rate_pp) {
1317                         DRV_LOG(ERR, "WQE rate mode is required"
1318                                      " for packet pacing");
1319                         err = ENODEV;
1320                         goto error;
1321                 }
1322 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1323                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1324                              " can't create queues for packet pacing");
1325                 err = ENODEV;
1326                 goto error;
1327 #endif
1328         }
1329         if (config->devx) {
1330                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1331
1332                 err = config->hca_attr.access_register_user ?
1333                         mlx5_devx_cmd_register_read
1334                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1335                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1336                 if (!err) {
1337                         uint32_t ts_mode;
1338
1339                         /* MTUTC register is read successfully. */
1340                         ts_mode = MLX5_GET(register_mtutc, reg,
1341                                            time_stamp_mode);
1342                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1343                                 config->rt_timestamp = 1;
1344                 } else {
1345                         /* Kernel does not support register reading. */
1346                         if (config->hca_attr.dev_freq_khz ==
1347                                                  (NS_PER_S / MS_PER_S))
1348                                 config->rt_timestamp = 1;
1349                 }
1350         }
1351         /*
1352          * If HW has bug working with tunnel packet decapsulation and
1353          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1354          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1355          */
1356         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1357                 config->hw_fcs_strip = 0;
1358         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1359                 (config->hw_fcs_strip ? "" : "not "));
1360         if (config->mprq.enabled && mprq) {
1361                 if (config->mprq.stride_num_n &&
1362                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1363                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1364                         config->mprq.stride_num_n =
1365                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1366                                                 mprq_min_stride_num_n),
1367                                         mprq_max_stride_num_n);
1368                         DRV_LOG(WARNING,
1369                                 "the number of strides"
1370                                 " for Multi-Packet RQ is out of range,"
1371                                 " setting default value (%u)",
1372                                 1 << config->mprq.stride_num_n);
1373                 }
1374                 if (config->mprq.stride_size_n &&
1375                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1376                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1377                         config->mprq.stride_size_n =
1378                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1379                                                 mprq_min_stride_size_n),
1380                                         mprq_max_stride_size_n);
1381                         DRV_LOG(WARNING,
1382                                 "the size of a stride"
1383                                 " for Multi-Packet RQ is out of range,"
1384                                 " setting default value (%u)",
1385                                 1 << config->mprq.stride_size_n);
1386                 }
1387                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1388                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1389         } else if (config->mprq.enabled && !mprq) {
1390                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1391                 config->mprq.enabled = 0;
1392         }
1393         if (config->max_dump_files_num == 0)
1394                 config->max_dump_files_num = 128;
1395         eth_dev = rte_eth_dev_allocate(name);
1396         if (eth_dev == NULL) {
1397                 DRV_LOG(ERR, "can not allocate rte ethdev");
1398                 err = ENOMEM;
1399                 goto error;
1400         }
1401         if (priv->representor) {
1402                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1403                 eth_dev->data->representor_id = priv->representor_id;
1404         }
1405         priv->mp_id.port_id = eth_dev->data->port_id;
1406         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1407         /*
1408          * Store associated network device interface index. This index
1409          * is permanent throughout the lifetime of device. So, we may store
1410          * the ifindex here and use the cached value further.
1411          */
1412         MLX5_ASSERT(spawn->ifindex);
1413         priv->if_index = spawn->ifindex;
1414         if (priv->pf_bond >= 0 && priv->master) {
1415                 /* Get bond interface info */
1416                 err = mlx5_sysfs_bond_info(priv->if_index,
1417                                      &priv->bond_ifindex,
1418                                      priv->bond_name);
1419                 if (err)
1420                         DRV_LOG(ERR, "unable to get bond info: %s",
1421                                 strerror(rte_errno));
1422                 else
1423                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1424                                 priv->if_index, priv->bond_ifindex,
1425                                 priv->bond_name);
1426         }
1427         eth_dev->data->dev_private = priv;
1428         priv->dev_data = eth_dev->data;
1429         eth_dev->data->mac_addrs = priv->mac;
1430         if (spawn->pf_bond < 0) {
1431                 eth_dev->device = dpdk_dev;
1432         } else {
1433                 /* Use primary bond PCI as device. */
1434                 if (sh->bond_dev == UINT16_MAX) {
1435                         sh->bond_dev = eth_dev->data->port_id;
1436                         eth_dev->device = dpdk_dev;
1437                 } else {
1438                         eth_dev->device = rte_eth_devices[sh->bond_dev].device;
1439                 }
1440         }
1441         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1442         /* Configure the first MAC address by default. */
1443         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1444                 DRV_LOG(ERR,
1445                         "port %u cannot get MAC address, is mlx5_en"
1446                         " loaded? (errno: %s)",
1447                         eth_dev->data->port_id, strerror(rte_errno));
1448                 err = ENODEV;
1449                 goto error;
1450         }
1451         DRV_LOG(INFO,
1452                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1453                 eth_dev->data->port_id,
1454                 mac.addr_bytes[0], mac.addr_bytes[1],
1455                 mac.addr_bytes[2], mac.addr_bytes[3],
1456                 mac.addr_bytes[4], mac.addr_bytes[5]);
1457 #ifdef RTE_LIBRTE_MLX5_DEBUG
1458         {
1459                 char ifname[MLX5_NAMESIZE];
1460
1461                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1462                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1463                                 eth_dev->data->port_id, ifname);
1464                 else
1465                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1466                                 eth_dev->data->port_id);
1467         }
1468 #endif
1469         /* Get actual MTU if possible. */
1470         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1471         if (err) {
1472                 err = rte_errno;
1473                 goto error;
1474         }
1475         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1476                 priv->mtu);
1477         /* Initialize burst functions to prevent crashes before link-up. */
1478         eth_dev->rx_pkt_burst = removed_rx_burst;
1479         eth_dev->tx_pkt_burst = removed_tx_burst;
1480         eth_dev->dev_ops = &mlx5_dev_ops;
1481         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1482         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1483         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1484         /* Register MAC address. */
1485         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1486         if (config->vf && config->vf_nl_en)
1487                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1488                                       mlx5_ifindex(eth_dev),
1489                                       eth_dev->data->mac_addrs,
1490                                       MLX5_MAX_MAC_ADDRESSES);
1491         priv->flows = 0;
1492         priv->ctrl_flows = 0;
1493         rte_spinlock_init(&priv->flow_list_lock);
1494         TAILQ_INIT(&priv->flow_meters);
1495         TAILQ_INIT(&priv->flow_meter_profiles);
1496         /* Hint libmlx5 to use PMD allocator for data plane resources */
1497         mlx5_glue->dv_set_context_attr(sh->ctx,
1498                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1499                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1500                                 .alloc = &mlx5_alloc_verbs_buf,
1501                                 .free = &mlx5_free_verbs_buf,
1502                                 .data = sh,
1503                         }));
1504         /* Bring Ethernet device up. */
1505         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1506                 eth_dev->data->port_id);
1507         mlx5_set_link_up(eth_dev);
1508         /*
1509          * Even though the interrupt handler is not installed yet,
1510          * interrupts will still trigger on the async_fd from
1511          * Verbs context returned by ibv_open_device().
1512          */
1513         mlx5_link_update(eth_dev, 0);
1514 #ifdef HAVE_MLX5DV_DR_ESWITCH
1515         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1516               (switch_info->representor || switch_info->master)))
1517                 config->dv_esw_en = 0;
1518 #else
1519         config->dv_esw_en = 0;
1520 #endif
1521         /* Detect minimal data bytes to inline. */
1522         mlx5_set_min_inline(spawn, config);
1523         /* Store device configuration on private structure. */
1524         priv->config = *config;
1525         /* Create context for virtual machine VLAN workaround. */
1526         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1527         if (config->dv_flow_en) {
1528                 err = mlx5_alloc_shared_dr(priv);
1529                 if (err)
1530                         goto error;
1531         }
1532         if (config->devx && config->dv_flow_en && config->dest_tir) {
1533                 priv->obj_ops = devx_obj_ops;
1534                 priv->obj_ops.drop_action_create =
1535                                                 ibv_obj_ops.drop_action_create;
1536                 priv->obj_ops.drop_action_destroy =
1537                                                 ibv_obj_ops.drop_action_destroy;
1538 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1539                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1540 #else
1541                 if (config->dv_esw_en)
1542                         priv->obj_ops.txq_obj_modify =
1543                                                 ibv_obj_ops.txq_obj_modify;
1544 #endif
1545                 /* Use specific wrappers for Tx object. */
1546                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1547                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1548                 mlx5_queue_counter_id_prepare(eth_dev);
1549
1550         } else {
1551                 priv->obj_ops = ibv_obj_ops;
1552         }
1553         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1554         if (!priv->drop_queue.hrxq)
1555                 goto error;
1556         /* Supported Verbs flow priority number detection. */
1557         err = mlx5_flow_discover_priorities(eth_dev);
1558         if (err < 0) {
1559                 err = -err;
1560                 goto error;
1561         }
1562         priv->config.flow_prio = err;
1563         if (!priv->config.dv_esw_en &&
1564             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1565                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1566                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1567                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1568         }
1569         mlx5_set_metadata_mask(eth_dev);
1570         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1571             !priv->sh->dv_regc0_mask) {
1572                 DRV_LOG(ERR, "metadata mode %u is not supported "
1573                              "(no metadata reg_c[0] is available)",
1574                              priv->config.dv_xmeta_en);
1575                         err = ENOTSUP;
1576                         goto error;
1577         }
1578         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1579                              mlx5_hrxq_create_cb,
1580                              mlx5_hrxq_match_cb,
1581                              mlx5_hrxq_remove_cb);
1582         /* Query availability of metadata reg_c's. */
1583         err = mlx5_flow_discover_mreg_c(eth_dev);
1584         if (err < 0) {
1585                 err = -err;
1586                 goto error;
1587         }
1588         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1589                 DRV_LOG(DEBUG,
1590                         "port %u extensive metadata register is not supported",
1591                         eth_dev->data->port_id);
1592                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1593                         DRV_LOG(ERR, "metadata mode %u is not supported "
1594                                      "(no metadata registers available)",
1595                                      priv->config.dv_xmeta_en);
1596                         err = ENOTSUP;
1597                         goto error;
1598                 }
1599         }
1600         if (priv->config.dv_flow_en &&
1601             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1602             mlx5_flow_ext_mreg_supported(eth_dev) &&
1603             priv->sh->dv_regc0_mask) {
1604                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1605                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1606                                                       0, 0,
1607                                                       flow_dv_mreg_create_cb,
1608                                                       flow_dv_mreg_match_cb,
1609                                                       flow_dv_mreg_remove_cb);
1610                 if (!priv->mreg_cp_tbl) {
1611                         err = ENOMEM;
1612                         goto error;
1613                 }
1614                 priv->mreg_cp_tbl->ctx = eth_dev;
1615         }
1616         rte_spinlock_init(&priv->shared_act_sl);
1617         mlx5_flow_counter_mode_config(eth_dev);
1618         if (priv->config.dv_flow_en)
1619                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1620         return eth_dev;
1621 error:
1622         if (priv) {
1623                 if (priv->mreg_cp_tbl)
1624                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1625                 if (priv->sh)
1626                         mlx5_os_free_shared_dr(priv);
1627                 if (priv->nl_socket_route >= 0)
1628                         close(priv->nl_socket_route);
1629                 if (priv->nl_socket_rdma >= 0)
1630                         close(priv->nl_socket_rdma);
1631                 if (priv->vmwa_context)
1632                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1633                 if (eth_dev && priv->drop_queue.hrxq)
1634                         mlx5_drop_action_destroy(eth_dev);
1635                 if (own_domain_id)
1636                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1637                 mlx5_cache_list_destroy(&priv->hrxqs);
1638                 mlx5_free(priv);
1639                 if (eth_dev != NULL)
1640                         eth_dev->data->dev_private = NULL;
1641         }
1642         if (eth_dev != NULL) {
1643                 /* mac_addrs must not be freed alone because part of
1644                  * dev_private
1645                  **/
1646                 eth_dev->data->mac_addrs = NULL;
1647                 rte_eth_dev_release_port(eth_dev);
1648         }
1649         if (sh)
1650                 mlx5_free_shared_dev_ctx(sh);
1651         MLX5_ASSERT(err > 0);
1652         rte_errno = err;
1653         return NULL;
1654 }
1655
1656 /**
1657  * Comparison callback to sort device data.
1658  *
1659  * This is meant to be used with qsort().
1660  *
1661  * @param a[in]
1662  *   Pointer to pointer to first data object.
1663  * @param b[in]
1664  *   Pointer to pointer to second data object.
1665  *
1666  * @return
1667  *   0 if both objects are equal, less than 0 if the first argument is less
1668  *   than the second, greater than 0 otherwise.
1669  */
1670 static int
1671 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1672 {
1673         const struct mlx5_switch_info *si_a =
1674                 &((const struct mlx5_dev_spawn_data *)a)->info;
1675         const struct mlx5_switch_info *si_b =
1676                 &((const struct mlx5_dev_spawn_data *)b)->info;
1677         int ret;
1678
1679         /* Master device first. */
1680         ret = si_b->master - si_a->master;
1681         if (ret)
1682                 return ret;
1683         /* Then representor devices. */
1684         ret = si_b->representor - si_a->representor;
1685         if (ret)
1686                 return ret;
1687         /* Unidentified devices come last in no specific order. */
1688         if (!si_a->representor)
1689                 return 0;
1690         /* Order representors by name. */
1691         return si_a->port_name - si_b->port_name;
1692 }
1693
1694 /**
1695  * Match PCI information for possible slaves of bonding device.
1696  *
1697  * @param[in] ibv_dev
1698  *   Pointer to Infiniband device structure.
1699  * @param[in] pci_dev
1700  *   Pointer to PCI device structure to match PCI address.
1701  * @param[in] nl_rdma
1702  *   Netlink RDMA group socket handle.
1703  *
1704  * @return
1705  *   negative value if no bonding device found, otherwise
1706  *   positive index of slave PF in bonding.
1707  */
1708 static int
1709 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1710                            const struct rte_pci_device *pci_dev,
1711                            int nl_rdma)
1712 {
1713         char ifname[IF_NAMESIZE + 1];
1714         unsigned int ifindex;
1715         unsigned int np, i;
1716         FILE *file = NULL;
1717         int pf = -1;
1718
1719         /*
1720          * Try to get master device name. If something goes
1721          * wrong suppose the lack of kernel support and no
1722          * bonding devices.
1723          */
1724         if (nl_rdma < 0)
1725                 return -1;
1726         if (!strstr(ibv_dev->name, "bond"))
1727                 return -1;
1728         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1729         if (!np)
1730                 return -1;
1731         /*
1732          * The Master device might not be on the predefined
1733          * port (not on port index 1, it is not garanted),
1734          * we have to scan all Infiniband device port and
1735          * find master.
1736          */
1737         for (i = 1; i <= np; ++i) {
1738                 /* Check whether Infiniband port is populated. */
1739                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1740                 if (!ifindex)
1741                         continue;
1742                 if (!if_indextoname(ifindex, ifname))
1743                         continue;
1744                 /* Try to read bonding slave names from sysfs. */
1745                 MKSTR(slaves,
1746                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1747                 file = fopen(slaves, "r");
1748                 if (file)
1749                         break;
1750         }
1751         if (!file)
1752                 return -1;
1753         /* Use safe format to check maximal buffer length. */
1754         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1755         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1756                 char tmp_str[IF_NAMESIZE + 32];
1757                 struct rte_pci_addr pci_addr;
1758                 struct mlx5_switch_info info;
1759
1760                 /* Process slave interface names in the loop. */
1761                 snprintf(tmp_str, sizeof(tmp_str),
1762                          "/sys/class/net/%s", ifname);
1763                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1764                         DRV_LOG(WARNING, "can not get PCI address"
1765                                          " for netdev \"%s\"", ifname);
1766                         continue;
1767                 }
1768                 if (pci_dev->addr.domain != pci_addr.domain ||
1769                     pci_dev->addr.bus != pci_addr.bus ||
1770                     pci_dev->addr.devid != pci_addr.devid ||
1771                     pci_dev->addr.function != pci_addr.function)
1772                         continue;
1773                 /* Slave interface PCI address match found. */
1774                 fclose(file);
1775                 snprintf(tmp_str, sizeof(tmp_str),
1776                          "/sys/class/net/%s/phys_port_name", ifname);
1777                 file = fopen(tmp_str, "rb");
1778                 if (!file)
1779                         break;
1780                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1781                 if (fscanf(file, "%32s", tmp_str) == 1)
1782                         mlx5_translate_port_name(tmp_str, &info);
1783                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1784                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1785                         pf = info.port_name;
1786                 break;
1787         }
1788         if (file)
1789                 fclose(file);
1790         return pf;
1791 }
1792
1793 /**
1794  * DPDK callback to register a PCI device.
1795  *
1796  * This function spawns Ethernet devices out of a given PCI device.
1797  *
1798  * @param[in] pci_drv
1799  *   PCI driver structure (mlx5_driver).
1800  * @param[in] pci_dev
1801  *   PCI device information.
1802  *
1803  * @return
1804  *   0 on success, a negative errno value otherwise and rte_errno is set.
1805  */
1806 int
1807 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1808                   struct rte_pci_device *pci_dev)
1809 {
1810         struct ibv_device **ibv_list;
1811         /*
1812          * Number of found IB Devices matching with requested PCI BDF.
1813          * nd != 1 means there are multiple IB devices over the same
1814          * PCI device and we have representors and master.
1815          */
1816         unsigned int nd = 0;
1817         /*
1818          * Number of found IB device Ports. nd = 1 and np = 1..n means
1819          * we have the single multiport IB device, and there may be
1820          * representors attached to some of found ports.
1821          */
1822         unsigned int np = 0;
1823         /*
1824          * Number of DPDK ethernet devices to Spawn - either over
1825          * multiple IB devices or multiple ports of single IB device.
1826          * Actually this is the number of iterations to spawn.
1827          */
1828         unsigned int ns = 0;
1829         /*
1830          * Bonding device
1831          *   < 0 - no bonding device (single one)
1832          *  >= 0 - bonding device (value is slave PF index)
1833          */
1834         int bd = -1;
1835         struct mlx5_dev_spawn_data *list = NULL;
1836         struct mlx5_dev_config dev_config;
1837         unsigned int dev_config_vf;
1838         int ret;
1839
1840         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1841                 mlx5_pmd_socket_init();
1842         ret = mlx5_init_once();
1843         if (ret) {
1844                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1845                         strerror(rte_errno));
1846                 return -rte_errno;
1847         }
1848         errno = 0;
1849         ibv_list = mlx5_glue->get_device_list(&ret);
1850         if (!ibv_list) {
1851                 rte_errno = errno ? errno : ENOSYS;
1852                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1853                 return -rte_errno;
1854         }
1855         /*
1856          * First scan the list of all Infiniband devices to find
1857          * matching ones, gathering into the list.
1858          */
1859         struct ibv_device *ibv_match[ret + 1];
1860         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1861         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1862         unsigned int i;
1863
1864         while (ret-- > 0) {
1865                 struct rte_pci_addr pci_addr;
1866
1867                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1868                 bd = mlx5_device_bond_pci_match
1869                                 (ibv_list[ret], pci_dev, nl_rdma);
1870                 if (bd >= 0) {
1871                         /*
1872                          * Bonding device detected. Only one match is allowed,
1873                          * the bonding is supported over multi-port IB device,
1874                          * there should be no matches on representor PCI
1875                          * functions or non VF LAG bonding devices with
1876                          * specified address.
1877                          */
1878                         if (nd) {
1879                                 DRV_LOG(ERR,
1880                                         "multiple PCI match on bonding device"
1881                                         "\"%s\" found", ibv_list[ret]->name);
1882                                 rte_errno = ENOENT;
1883                                 ret = -rte_errno;
1884                                 goto exit;
1885                         }
1886                         DRV_LOG(INFO, "PCI information matches for"
1887                                       " slave %d bonding device \"%s\"",
1888                                       bd, ibv_list[ret]->name);
1889                         ibv_match[nd++] = ibv_list[ret];
1890                         break;
1891                 }
1892                 if (mlx5_dev_to_pci_addr
1893                         (ibv_list[ret]->ibdev_path, &pci_addr))
1894                         continue;
1895                 if (pci_dev->addr.domain != pci_addr.domain ||
1896                     pci_dev->addr.bus != pci_addr.bus ||
1897                     pci_dev->addr.devid != pci_addr.devid ||
1898                     pci_dev->addr.function != pci_addr.function)
1899                         continue;
1900                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1901                         ibv_list[ret]->name);
1902                 ibv_match[nd++] = ibv_list[ret];
1903         }
1904         ibv_match[nd] = NULL;
1905         if (!nd) {
1906                 /* No device matches, just complain and bail out. */
1907                 DRV_LOG(WARNING,
1908                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1909                         " are kernel drivers loaded?",
1910                         pci_dev->addr.domain, pci_dev->addr.bus,
1911                         pci_dev->addr.devid, pci_dev->addr.function);
1912                 rte_errno = ENOENT;
1913                 ret = -rte_errno;
1914                 goto exit;
1915         }
1916         if (nd == 1) {
1917                 /*
1918                  * Found single matching device may have multiple ports.
1919                  * Each port may be representor, we have to check the port
1920                  * number and check the representors existence.
1921                  */
1922                 if (nl_rdma >= 0)
1923                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1924                 if (!np)
1925                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1926                                          " ports number", ibv_match[0]->name);
1927                 if (bd >= 0 && !np) {
1928                         DRV_LOG(ERR, "can not get ports"
1929                                      " for bonding device");
1930                         rte_errno = ENOENT;
1931                         ret = -rte_errno;
1932                         goto exit;
1933                 }
1934         }
1935 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1936         if (bd >= 0) {
1937                 /*
1938                  * This may happen if there is VF LAG kernel support and
1939                  * application is compiled with older rdma_core library.
1940                  */
1941                 DRV_LOG(ERR,
1942                         "No kernel/verbs support for VF LAG bonding found.");
1943                 rte_errno = ENOTSUP;
1944                 ret = -rte_errno;
1945                 goto exit;
1946         }
1947 #endif
1948         /*
1949          * Now we can determine the maximal
1950          * amount of devices to be spawned.
1951          */
1952         list = mlx5_malloc(MLX5_MEM_ZERO,
1953                            sizeof(struct mlx5_dev_spawn_data) *
1954                            (np ? np : nd),
1955                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1956         if (!list) {
1957                 DRV_LOG(ERR, "spawn data array allocation failure");
1958                 rte_errno = ENOMEM;
1959                 ret = -rte_errno;
1960                 goto exit;
1961         }
1962         if (bd >= 0 || np > 1) {
1963                 /*
1964                  * Single IB device with multiple ports found,
1965                  * it may be E-Switch master device and representors.
1966                  * We have to perform identification through the ports.
1967                  */
1968                 MLX5_ASSERT(nl_rdma >= 0);
1969                 MLX5_ASSERT(ns == 0);
1970                 MLX5_ASSERT(nd == 1);
1971                 MLX5_ASSERT(np);
1972                 for (i = 1; i <= np; ++i) {
1973                         list[ns].max_port = np;
1974                         list[ns].phys_port = i;
1975                         list[ns].phys_dev = ibv_match[0];
1976                         list[ns].eth_dev = NULL;
1977                         list[ns].pci_dev = pci_dev;
1978                         list[ns].pf_bond = bd;
1979                         list[ns].ifindex = mlx5_nl_ifindex
1980                                 (nl_rdma,
1981                                 mlx5_os_get_dev_device_name
1982                                                 (list[ns].phys_dev), i);
1983                         if (!list[ns].ifindex) {
1984                                 /*
1985                                  * No network interface index found for the
1986                                  * specified port, it means there is no
1987                                  * representor on this port. It's OK,
1988                                  * there can be disabled ports, for example
1989                                  * if sriov_numvfs < sriov_totalvfs.
1990                                  */
1991                                 continue;
1992                         }
1993                         ret = -1;
1994                         if (nl_route >= 0)
1995                                 ret = mlx5_nl_switch_info
1996                                                (nl_route,
1997                                                 list[ns].ifindex,
1998                                                 &list[ns].info);
1999                         if (ret || (!list[ns].info.representor &&
2000                                     !list[ns].info.master)) {
2001                                 /*
2002                                  * We failed to recognize representors with
2003                                  * Netlink, let's try to perform the task
2004                                  * with sysfs.
2005                                  */
2006                                 ret =  mlx5_sysfs_switch_info
2007                                                 (list[ns].ifindex,
2008                                                  &list[ns].info);
2009                         }
2010 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2011                         if (!ret && bd >= 0) {
2012                                 switch (list[ns].info.name_type) {
2013                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2014                                         if (list[ns].info.port_name == bd)
2015                                                 ns++;
2016                                         break;
2017                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2018                                         /* Fallthrough */
2019                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2020                                         if (list[ns].info.pf_num == bd)
2021                                                 ns++;
2022                                         break;
2023                                 default:
2024                                         break;
2025                                 }
2026                                 continue;
2027                         }
2028 #endif
2029                         if (!ret && (list[ns].info.representor ^
2030                                      list[ns].info.master))
2031                                 ns++;
2032                 }
2033                 if (!ns) {
2034                         DRV_LOG(ERR,
2035                                 "unable to recognize master/representors"
2036                                 " on the IB device with multiple ports");
2037                         rte_errno = ENOENT;
2038                         ret = -rte_errno;
2039                         goto exit;
2040                 }
2041         } else {
2042                 /*
2043                  * The existence of several matching entries (nd > 1) means
2044                  * port representors have been instantiated. No existing Verbs
2045                  * call nor sysfs entries can tell them apart, this can only
2046                  * be done through Netlink calls assuming kernel drivers are
2047                  * recent enough to support them.
2048                  *
2049                  * In the event of identification failure through Netlink,
2050                  * try again through sysfs, then:
2051                  *
2052                  * 1. A single IB device matches (nd == 1) with single
2053                  *    port (np=0/1) and is not a representor, assume
2054                  *    no switch support.
2055                  *
2056                  * 2. Otherwise no safe assumptions can be made;
2057                  *    complain louder and bail out.
2058                  */
2059                 for (i = 0; i != nd; ++i) {
2060                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2061                         list[ns].max_port = 1;
2062                         list[ns].phys_port = 1;
2063                         list[ns].phys_dev = ibv_match[i];
2064                         list[ns].eth_dev = NULL;
2065                         list[ns].pci_dev = pci_dev;
2066                         list[ns].pf_bond = -1;
2067                         list[ns].ifindex = 0;
2068                         if (nl_rdma >= 0)
2069                                 list[ns].ifindex = mlx5_nl_ifindex
2070                                 (nl_rdma,
2071                                 mlx5_os_get_dev_device_name
2072                                                 (list[ns].phys_dev), 1);
2073                         if (!list[ns].ifindex) {
2074                                 char ifname[IF_NAMESIZE];
2075
2076                                 /*
2077                                  * Netlink failed, it may happen with old
2078                                  * ib_core kernel driver (before 4.16).
2079                                  * We can assume there is old driver because
2080                                  * here we are processing single ports IB
2081                                  * devices. Let's try sysfs to retrieve
2082                                  * the ifindex. The method works for
2083                                  * master device only.
2084                                  */
2085                                 if (nd > 1) {
2086                                         /*
2087                                          * Multiple devices found, assume
2088                                          * representors, can not distinguish
2089                                          * master/representor and retrieve
2090                                          * ifindex via sysfs.
2091                                          */
2092                                         continue;
2093                                 }
2094                                 ret = mlx5_get_ifname_sysfs
2095                                         (ibv_match[i]->ibdev_path, ifname);
2096                                 if (!ret)
2097                                         list[ns].ifindex =
2098                                                 if_nametoindex(ifname);
2099                                 if (!list[ns].ifindex) {
2100                                         /*
2101                                          * No network interface index found
2102                                          * for the specified device, it means
2103                                          * there it is neither representor
2104                                          * nor master.
2105                                          */
2106                                         continue;
2107                                 }
2108                         }
2109                         ret = -1;
2110                         if (nl_route >= 0)
2111                                 ret = mlx5_nl_switch_info
2112                                                (nl_route,
2113                                                 list[ns].ifindex,
2114                                                 &list[ns].info);
2115                         if (ret || (!list[ns].info.representor &&
2116                                     !list[ns].info.master)) {
2117                                 /*
2118                                  * We failed to recognize representors with
2119                                  * Netlink, let's try to perform the task
2120                                  * with sysfs.
2121                                  */
2122                                 ret =  mlx5_sysfs_switch_info
2123                                                 (list[ns].ifindex,
2124                                                  &list[ns].info);
2125                         }
2126                         if (!ret && (list[ns].info.representor ^
2127                                      list[ns].info.master)) {
2128                                 ns++;
2129                         } else if ((nd == 1) &&
2130                                    !list[ns].info.representor &&
2131                                    !list[ns].info.master) {
2132                                 /*
2133                                  * Single IB device with
2134                                  * one physical port and
2135                                  * attached network device.
2136                                  * May be SRIOV is not enabled
2137                                  * or there is no representors.
2138                                  */
2139                                 DRV_LOG(INFO, "no E-Switch support detected");
2140                                 ns++;
2141                                 break;
2142                         }
2143                 }
2144                 if (!ns) {
2145                         DRV_LOG(ERR,
2146                                 "unable to recognize master/representors"
2147                                 " on the multiple IB devices");
2148                         rte_errno = ENOENT;
2149                         ret = -rte_errno;
2150                         goto exit;
2151                 }
2152         }
2153         MLX5_ASSERT(ns);
2154         /*
2155          * Sort list to probe devices in natural order for users convenience
2156          * (i.e. master first, then representors from lowest to highest ID).
2157          */
2158         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2159         /* Device specific configuration. */
2160         switch (pci_dev->id.device_id) {
2161         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2162         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2163         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2164         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2165         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2166         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2167         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2168                 dev_config_vf = 1;
2169                 break;
2170         default:
2171                 dev_config_vf = 0;
2172                 break;
2173         }
2174         for (i = 0; i != ns; ++i) {
2175                 uint32_t restore;
2176
2177                 /* Default configuration. */
2178                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2179                 dev_config.vf = dev_config_vf;
2180                 dev_config.mps = MLX5_ARG_UNSET;
2181                 dev_config.dbnc = MLX5_ARG_UNSET;
2182                 dev_config.rx_vec_en = 1;
2183                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2184                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2185                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2186                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2187                 dev_config.vf_nl_en = 1;
2188                 dev_config.mr_ext_memseg_en = 1;
2189                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2190                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2191                 dev_config.dv_esw_en = 1;
2192                 dev_config.dv_flow_en = 1;
2193                 dev_config.decap_en = 1;
2194                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2195                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2196                                                  &list[i],
2197                                                  &dev_config);
2198                 if (!list[i].eth_dev) {
2199                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2200                                 break;
2201                         /* Device is disabled or already spawned. Ignore it. */
2202                         continue;
2203                 }
2204                 restore = list[i].eth_dev->data->dev_flags;
2205                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2206                 /* Restore non-PCI flags cleared by the above call. */
2207                 list[i].eth_dev->data->dev_flags |= restore;
2208                 rte_eth_dev_probing_finish(list[i].eth_dev);
2209         }
2210         if (i != ns) {
2211                 DRV_LOG(ERR,
2212                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2213                         " encountering an error: %s",
2214                         pci_dev->addr.domain, pci_dev->addr.bus,
2215                         pci_dev->addr.devid, pci_dev->addr.function,
2216                         strerror(rte_errno));
2217                 ret = -rte_errno;
2218                 /* Roll back. */
2219                 while (i--) {
2220                         if (!list[i].eth_dev)
2221                                 continue;
2222                         mlx5_dev_close(list[i].eth_dev);
2223                         /* mac_addrs must not be freed because in dev_private */
2224                         list[i].eth_dev->data->mac_addrs = NULL;
2225                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2226                 }
2227                 /* Restore original error. */
2228                 rte_errno = -ret;
2229         } else {
2230                 ret = 0;
2231         }
2232 exit:
2233         /*
2234          * Do the routine cleanup:
2235          * - close opened Netlink sockets
2236          * - free allocated spawn data array
2237          * - free the Infiniband device list
2238          */
2239         if (nl_rdma >= 0)
2240                 close(nl_rdma);
2241         if (nl_route >= 0)
2242                 close(nl_route);
2243         if (list)
2244                 mlx5_free(list);
2245         MLX5_ASSERT(ibv_list);
2246         mlx5_glue->free_device_list(ibv_list);
2247         return ret;
2248 }
2249
2250 static int
2251 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2252 {
2253         char *env;
2254         int value;
2255
2256         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2257         /* Get environment variable to store. */
2258         env = getenv(MLX5_SHUT_UP_BF);
2259         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2260         if (config->dbnc == MLX5_ARG_UNSET)
2261                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2262         else
2263                 setenv(MLX5_SHUT_UP_BF,
2264                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2265         return value;
2266 }
2267
2268 static void
2269 mlx5_restore_doorbell_mapping_env(int value)
2270 {
2271         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2272         /* Restore the original environment variable state. */
2273         if (value == MLX5_ARG_UNSET)
2274                 unsetenv(MLX5_SHUT_UP_BF);
2275         else
2276                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2277 }
2278
2279 /**
2280  * Extract pdn of PD object using DV API.
2281  *
2282  * @param[in] pd
2283  *   Pointer to the verbs PD object.
2284  * @param[out] pdn
2285  *   Pointer to the PD object number variable.
2286  *
2287  * @return
2288  *   0 on success, error value otherwise.
2289  */
2290 int
2291 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2292 {
2293 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2294         struct mlx5dv_obj obj;
2295         struct mlx5dv_pd pd_info;
2296         int ret = 0;
2297
2298         obj.pd.in = pd;
2299         obj.pd.out = &pd_info;
2300         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2301         if (ret) {
2302                 DRV_LOG(DEBUG, "Fail to get PD object info");
2303                 return ret;
2304         }
2305         *pdn = pd_info.pdn;
2306         return 0;
2307 #else
2308         (void)pd;
2309         (void)pdn;
2310         return -ENOTSUP;
2311 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2312 }
2313
2314 /**
2315  * Function API to open IB device.
2316  *
2317  * This function calls the Linux glue APIs to open a device.
2318  *
2319  * @param[in] spawn
2320  *   Pointer to the IB device attributes (name, port, etc).
2321  * @param[out] config
2322  *   Pointer to device configuration structure.
2323  * @param[out] sh
2324  *   Pointer to shared context structure.
2325  *
2326  * @return
2327  *   0 on success, a positive error value otherwise.
2328  */
2329 int
2330 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2331                      const struct mlx5_dev_config *config,
2332                      struct mlx5_dev_ctx_shared *sh)
2333 {
2334         int dbmap_env;
2335         int err = 0;
2336
2337         sh->numa_node = spawn->pci_dev->device.numa_node;
2338         pthread_mutex_init(&sh->txpp.mutex, NULL);
2339         /*
2340          * Configure environment variable "MLX5_BF_SHUT_UP"
2341          * before the device creation. The rdma_core library
2342          * checks the variable at device creation and
2343          * stores the result internally.
2344          */
2345         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2346         /* Try to open IB device with DV first, then usual Verbs. */
2347         errno = 0;
2348         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2349         if (sh->ctx) {
2350                 sh->devx = 1;
2351                 DRV_LOG(DEBUG, "DevX is supported");
2352                 /* The device is created, no need for environment. */
2353                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2354         } else {
2355                 /* The environment variable is still configured. */
2356                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2357                 err = errno ? errno : ENODEV;
2358                 /*
2359                  * The environment variable is not needed anymore,
2360                  * all device creation attempts are completed.
2361                  */
2362                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2363                 if (!sh->ctx)
2364                         return err;
2365                 DRV_LOG(DEBUG, "DevX is NOT supported");
2366                 err = 0;
2367         }
2368         if (!err && sh->ctx) {
2369                 /* Hint libmlx5 to use PMD allocator for data plane resources */
2370                 mlx5_glue->dv_set_context_attr(sh->ctx,
2371                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2372                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2373                                 .alloc = &mlx5_alloc_verbs_buf,
2374                                 .free = &mlx5_free_verbs_buf,
2375                                 .data = sh,
2376                         }));
2377         }
2378         return err;
2379 }
2380
2381 /**
2382  * Install shared asynchronous device events handler.
2383  * This function is implemented to support event sharing
2384  * between multiple ports of single IB device.
2385  *
2386  * @param sh
2387  *   Pointer to mlx5_dev_ctx_shared object.
2388  */
2389 void
2390 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2391 {
2392         int ret;
2393         int flags;
2394
2395         sh->intr_handle.fd = -1;
2396         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2397         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2398                     F_SETFL, flags | O_NONBLOCK);
2399         if (ret) {
2400                 DRV_LOG(INFO, "failed to change file descriptor async event"
2401                         " queue");
2402         } else {
2403                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2404                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2405                 if (rte_intr_callback_register(&sh->intr_handle,
2406                                         mlx5_dev_interrupt_handler, sh)) {
2407                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2408                         sh->intr_handle.fd = -1;
2409                 }
2410         }
2411         if (sh->devx) {
2412 #ifdef HAVE_IBV_DEVX_ASYNC
2413                 sh->intr_handle_devx.fd = -1;
2414                 sh->devx_comp =
2415                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2416                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2417                 if (!devx_comp) {
2418                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2419                         return;
2420                 }
2421                 flags = fcntl(devx_comp->fd, F_GETFL);
2422                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2423                 if (ret) {
2424                         DRV_LOG(INFO, "failed to change file descriptor"
2425                                 " devx comp");
2426                         return;
2427                 }
2428                 sh->intr_handle_devx.fd = devx_comp->fd;
2429                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2430                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2431                                         mlx5_dev_interrupt_handler_devx, sh)) {
2432                         DRV_LOG(INFO, "Fail to install the devx shared"
2433                                 " interrupt.");
2434                         sh->intr_handle_devx.fd = -1;
2435                 }
2436 #endif /* HAVE_IBV_DEVX_ASYNC */
2437         }
2438 }
2439
2440 /**
2441  * Uninstall shared asynchronous device events handler.
2442  * This function is implemented to support event sharing
2443  * between multiple ports of single IB device.
2444  *
2445  * @param dev
2446  *   Pointer to mlx5_dev_ctx_shared object.
2447  */
2448 void
2449 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2450 {
2451         if (sh->intr_handle.fd >= 0)
2452                 mlx5_intr_callback_unregister(&sh->intr_handle,
2453                                               mlx5_dev_interrupt_handler, sh);
2454 #ifdef HAVE_IBV_DEVX_ASYNC
2455         if (sh->intr_handle_devx.fd >= 0)
2456                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2457                                   mlx5_dev_interrupt_handler_devx, sh);
2458         if (sh->devx_comp)
2459                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2460 #endif
2461 }
2462
2463 /**
2464  * Read statistics by a named counter.
2465  *
2466  * @param[in] priv
2467  *   Pointer to the private device data structure.
2468  * @param[in] ctr_name
2469  *   Pointer to the name of the statistic counter to read
2470  * @param[out] stat
2471  *   Pointer to read statistic value.
2472  * @return
2473  *   0 on success and stat is valud, 1 if failed to read the value
2474  *   rte_errno is set.
2475  *
2476  */
2477 int
2478 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2479                       uint64_t *stat)
2480 {
2481         int fd;
2482
2483         if (priv->sh) {
2484                 if (priv->q_counters != NULL &&
2485                     strcmp(ctr_name, "out_of_buffer") == 0)
2486                         return mlx5_devx_cmd_queue_counter_query(priv->sh->ctx,
2487                                                            0, (uint32_t *)stat);
2488                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2489                       priv->sh->ibdev_path,
2490                       priv->dev_port,
2491                       ctr_name);
2492                 fd = open(path, O_RDONLY);
2493                 /*
2494                  * in switchdev the file location is not per port
2495                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2496                  */
2497                 if (fd == -1) {
2498                         MKSTR(path1, "%s/hw_counters/%s",
2499                               priv->sh->ibdev_path,
2500                               ctr_name);
2501                         fd = open(path1, O_RDONLY);
2502                 }
2503                 if (fd != -1) {
2504                         char buf[21] = {'\0'};
2505                         ssize_t n = read(fd, buf, sizeof(buf));
2506
2507                         close(fd);
2508                         if (n != -1) {
2509                                 *stat = strtoull(buf, NULL, 10);
2510                                 return 0;
2511                         }
2512                 }
2513         }
2514         *stat = 0;
2515         return 1;
2516 }
2517
2518 /**
2519  * Set the reg_mr and dereg_mr call backs
2520  *
2521  * @param reg_mr_cb[out]
2522  *   Pointer to reg_mr func
2523  * @param dereg_mr_cb[out]
2524  *   Pointer to dereg_mr func
2525  *
2526  */
2527 void
2528 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2529                       mlx5_dereg_mr_t *dereg_mr_cb)
2530 {
2531         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2532         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2533 }
2534
2535 /**
2536  * Remove a MAC address from device
2537  *
2538  * @param dev
2539  *   Pointer to Ethernet device structure.
2540  * @param index
2541  *   MAC address index.
2542  */
2543 void
2544 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2545 {
2546         struct mlx5_priv *priv = dev->data->dev_private;
2547         const int vf = priv->config.vf;
2548
2549         if (vf)
2550                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2551                                         mlx5_ifindex(dev), priv->mac_own,
2552                                         &dev->data->mac_addrs[index], index);
2553 }
2554
2555 /**
2556  * Adds a MAC address to the device
2557  *
2558  * @param dev
2559  *   Pointer to Ethernet device structure.
2560  * @param mac_addr
2561  *   MAC address to register.
2562  * @param index
2563  *   MAC address index.
2564  *
2565  * @return
2566  *   0 on success, a negative errno value otherwise
2567  */
2568 int
2569 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2570                      uint32_t index)
2571 {
2572         struct mlx5_priv *priv = dev->data->dev_private;
2573         const int vf = priv->config.vf;
2574         int ret = 0;
2575
2576         if (vf)
2577                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2578                                            mlx5_ifindex(dev), priv->mac_own,
2579                                            mac, index);
2580         return ret;
2581 }
2582
2583 /**
2584  * Modify a VF MAC address
2585  *
2586  * @param priv
2587  *   Pointer to device private data.
2588  * @param mac_addr
2589  *   MAC address to modify into.
2590  * @param iface_idx
2591  *   Net device interface index
2592  * @param vf_index
2593  *   VF index
2594  *
2595  * @return
2596  *   0 on success, a negative errno value otherwise
2597  */
2598 int
2599 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2600                            unsigned int iface_idx,
2601                            struct rte_ether_addr *mac_addr,
2602                            int vf_index)
2603 {
2604         return mlx5_nl_vf_mac_addr_modify
2605                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2606 }
2607
2608 /**
2609  * Set device promiscuous mode
2610  *
2611  * @param dev
2612  *   Pointer to Ethernet device structure.
2613  * @param enable
2614  *   0 - promiscuous is disabled, otherwise - enabled
2615  *
2616  * @return
2617  *   0 on success, a negative error value otherwise
2618  */
2619 int
2620 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2621 {
2622         struct mlx5_priv *priv = dev->data->dev_private;
2623
2624         return mlx5_nl_promisc(priv->nl_socket_route,
2625                                mlx5_ifindex(dev), !!enable);
2626 }
2627
2628 /**
2629  * Set device promiscuous mode
2630  *
2631  * @param dev
2632  *   Pointer to Ethernet device structure.
2633  * @param enable
2634  *   0 - all multicase is disabled, otherwise - enabled
2635  *
2636  * @return
2637  *   0 on success, a negative error value otherwise
2638  */
2639 int
2640 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2641 {
2642         struct mlx5_priv *priv = dev->data->dev_private;
2643
2644         return mlx5_nl_allmulti(priv->nl_socket_route,
2645                                 mlx5_ifindex(dev), !!enable);
2646 }
2647
2648 /**
2649  * Flush device MAC addresses
2650  *
2651  * @param dev
2652  *   Pointer to Ethernet device structure.
2653  *
2654  */
2655 void
2656 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2657 {
2658         struct mlx5_priv *priv = dev->data->dev_private;
2659
2660         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2661                                dev->data->mac_addrs,
2662                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2663 }